1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Nonzero means do not generate NOTEs for source line numbers. */
76 static int no_line_numbers;
78 /* Commonly used rtx's, so that we only need space for one copy.
79 These are initialized once for the entire compilation.
80 All of these are unique; no other rtx-object will be equal to any
83 rtx global_rtl[GR_MAX];
85 /* Commonly used RTL for hard registers. These objects are not necessarily
86 unique, so we allocate them separately from global_rtl. They are
87 initialized once per compilation unit, then copied into regno_reg_rtx
88 at the beginning of each function. */
89 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
91 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
92 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
93 record a copy of const[012]_rtx. */
95 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
99 REAL_VALUE_TYPE dconst0;
100 REAL_VALUE_TYPE dconst1;
101 REAL_VALUE_TYPE dconst2;
102 REAL_VALUE_TYPE dconst3;
103 REAL_VALUE_TYPE dconst10;
104 REAL_VALUE_TYPE dconstm1;
105 REAL_VALUE_TYPE dconstm2;
106 REAL_VALUE_TYPE dconsthalf;
107 REAL_VALUE_TYPE dconstthird;
108 REAL_VALUE_TYPE dconstsqrt2;
109 REAL_VALUE_TYPE dconste;
111 /* All references to the following fixed hard registers go through
112 these unique rtl objects. On machines where the frame-pointer and
113 arg-pointer are the same register, they use the same unique object.
115 After register allocation, other rtl objects which used to be pseudo-regs
116 may be clobbered to refer to the frame-pointer register.
117 But references that were originally to the frame-pointer can be
118 distinguished from the others because they contain frame_pointer_rtx.
120 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
121 tricky: until register elimination has taken place hard_frame_pointer_rtx
122 should be used if it is being set, and frame_pointer_rtx otherwise. After
123 register elimination hard_frame_pointer_rtx should always be used.
124 On machines where the two registers are same (most) then these are the
127 In an inline procedure, the stack and frame pointer rtxs may not be
128 used for anything else. */
129 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
130 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
131 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
133 /* This is used to implement __builtin_return_address for some machines.
134 See for instance the MIPS port. */
135 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
137 /* We make one copy of (const_int C) where C is in
138 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
139 to save space during the compilation and simplify comparisons of
142 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
144 /* A hash table storing CONST_INTs whose absolute value is greater
145 than MAX_SAVED_CONST_INT. */
147 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
148 htab_t const_int_htab;
150 /* A hash table storing memory attribute structures. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
152 htab_t mem_attrs_htab;
154 /* A hash table storing register attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
156 htab_t reg_attrs_htab;
158 /* A hash table storing all CONST_DOUBLEs. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
160 htab_t const_double_htab;
162 #define first_insn (cfun->emit->x_first_insn)
163 #define last_insn (cfun->emit->x_last_insn)
164 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
165 #define last_location (cfun->emit->x_last_location)
166 #define first_label_num (cfun->emit->x_first_label_num)
168 static rtx make_call_insn_raw (rtx);
169 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
170 static void unshare_all_decls (tree);
171 static void reset_used_decls (tree);
172 static void mark_label_nuses (rtx);
173 static hashval_t const_int_htab_hash (const void *);
174 static int const_int_htab_eq (const void *, const void *);
175 static hashval_t const_double_htab_hash (const void *);
176 static int const_double_htab_eq (const void *, const void *);
177 static rtx lookup_const_double (rtx);
178 static hashval_t mem_attrs_htab_hash (const void *);
179 static int mem_attrs_htab_eq (const void *, const void *);
180 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
182 static hashval_t reg_attrs_htab_hash (const void *);
183 static int reg_attrs_htab_eq (const void *, const void *);
184 static reg_attrs *get_reg_attrs (tree, int);
185 static tree component_ref_for_mem_expr (tree);
186 static rtx gen_const_vector (enum machine_mode, int);
187 static void copy_rtx_if_shared_1 (rtx *orig);
189 /* Probability of the conditional branch currently proceeded by try_split.
190 Set to -1 otherwise. */
191 int split_branch_probability = -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (const void *x)
198 return (hashval_t) INTVAL ((rtx) x);
201 /* Returns nonzero if the value represented by X (which is really a
202 CONST_INT) is the same as that given by Y (which is really a
206 const_int_htab_eq (const void *x, const void *y)
208 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
211 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
213 const_double_htab_hash (const void *x)
218 if (GET_MODE (value) == VOIDmode)
219 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
222 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
223 /* MODE is used in the comparison, so it should be in the hash. */
224 h ^= GET_MODE (value);
229 /* Returns nonzero if the value represented by X (really a ...)
230 is the same as that represented by Y (really a ...) */
232 const_double_htab_eq (const void *x, const void *y)
234 rtx a = (rtx)x, b = (rtx)y;
236 if (GET_MODE (a) != GET_MODE (b))
238 if (GET_MODE (a) == VOIDmode)
239 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
240 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
242 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
243 CONST_DOUBLE_REAL_VALUE (b));
246 /* Returns a hash code for X (which is a really a mem_attrs *). */
249 mem_attrs_htab_hash (const void *x)
251 mem_attrs *p = (mem_attrs *) x;
253 return (p->alias ^ (p->align * 1000)
254 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
255 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
256 ^ (size_t) iterative_hash_expr (p->expr, 0));
259 /* Returns nonzero if the value represented by X (which is really a
260 mem_attrs *) is the same as that given by Y (which is also really a
264 mem_attrs_htab_eq (const void *x, const void *y)
266 mem_attrs *p = (mem_attrs *) x;
267 mem_attrs *q = (mem_attrs *) y;
269 return (p->alias == q->alias && p->offset == q->offset
270 && p->size == q->size && p->align == q->align
271 && (p->expr == q->expr
272 || (p->expr != NULL_TREE && q->expr != NULL_TREE
273 && operand_equal_p (p->expr, q->expr, 0))));
276 /* Allocate a new mem_attrs structure and insert it into the hash table if
277 one identical to it is not already in the table. We are doing this for
281 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
282 unsigned int align, enum machine_mode mode)
287 /* If everything is the default, we can just return zero.
288 This must match what the corresponding MEM_* macros return when the
289 field is not present. */
290 if (alias == 0 && expr == 0 && offset == 0
292 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
293 && (STRICT_ALIGNMENT && mode != BLKmode
294 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
299 attrs.offset = offset;
303 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
306 *slot = ggc_alloc (sizeof (mem_attrs));
307 memcpy (*slot, &attrs, sizeof (mem_attrs));
313 /* Returns a hash code for X (which is a really a reg_attrs *). */
316 reg_attrs_htab_hash (const void *x)
318 reg_attrs *p = (reg_attrs *) x;
320 return ((p->offset * 1000) ^ (long) p->decl);
323 /* Returns nonzero if the value represented by X (which is really a
324 reg_attrs *) is the same as that given by Y (which is also really a
328 reg_attrs_htab_eq (const void *x, const void *y)
330 reg_attrs *p = (reg_attrs *) x;
331 reg_attrs *q = (reg_attrs *) y;
333 return (p->decl == q->decl && p->offset == q->offset);
335 /* Allocate a new reg_attrs structure and insert it into the hash table if
336 one identical to it is not already in the table. We are doing this for
340 get_reg_attrs (tree decl, int offset)
345 /* If everything is the default, we can just return zero. */
346 if (decl == 0 && offset == 0)
350 attrs.offset = offset;
352 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
355 *slot = ggc_alloc (sizeof (reg_attrs));
356 memcpy (*slot, &attrs, sizeof (reg_attrs));
362 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
363 don't attempt to share with the various global pieces of rtl (such as
364 frame_pointer_rtx). */
367 gen_raw_REG (enum machine_mode mode, int regno)
369 rtx x = gen_rtx_raw_REG (mode, regno);
370 ORIGINAL_REGNO (x) = regno;
374 /* There are some RTL codes that require special attention; the generation
375 functions do the raw handling. If you add to this list, modify
376 special_rtx in gengenrtl.c as well. */
379 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
383 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
384 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
386 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
387 if (const_true_rtx && arg == STORE_FLAG_VALUE)
388 return const_true_rtx;
391 /* Look up the CONST_INT in the hash table. */
392 slot = htab_find_slot_with_hash (const_int_htab, &arg,
393 (hashval_t) arg, INSERT);
395 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
401 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
403 return GEN_INT (trunc_int_for_mode (c, mode));
406 /* CONST_DOUBLEs might be created from pairs of integers, or from
407 REAL_VALUE_TYPEs. Also, their length is known only at run time,
408 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
410 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
411 hash table. If so, return its counterpart; otherwise add it
412 to the hash table and return it. */
414 lookup_const_double (rtx real)
416 void **slot = htab_find_slot (const_double_htab, real, INSERT);
423 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
424 VALUE in mode MODE. */
426 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
428 rtx real = rtx_alloc (CONST_DOUBLE);
429 PUT_MODE (real, mode);
433 return lookup_const_double (real);
436 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
437 of ints: I0 is the low-order word and I1 is the high-order word.
438 Do not use this routine for non-integer modes; convert to
439 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
442 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
447 /* There are the following cases (note that there are no modes with
448 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
450 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
452 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
453 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
454 from copies of the sign bit, and sign of i0 and i1 are the same), then
455 we return a CONST_INT for i0.
456 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
457 if (mode != VOIDmode)
459 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
460 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
461 /* We can get a 0 for an error mark. */
462 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
463 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
465 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
466 return gen_int_mode (i0, mode);
468 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
471 /* If this integer fits in one word, return a CONST_INT. */
472 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
475 /* We use VOIDmode for integers. */
476 value = rtx_alloc (CONST_DOUBLE);
477 PUT_MODE (value, VOIDmode);
479 CONST_DOUBLE_LOW (value) = i0;
480 CONST_DOUBLE_HIGH (value) = i1;
482 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
483 XWINT (value, i) = 0;
485 return lookup_const_double (value);
489 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
491 /* In case the MD file explicitly references the frame pointer, have
492 all such references point to the same frame pointer. This is
493 used during frame pointer elimination to distinguish the explicit
494 references to these registers from pseudos that happened to be
497 If we have eliminated the frame pointer or arg pointer, we will
498 be using it as a normal register, for example as a spill
499 register. In such cases, we might be accessing it in a mode that
500 is not Pmode and therefore cannot use the pre-allocated rtx.
502 Also don't do this when we are making new REGs in reload, since
503 we don't want to get confused with the real pointers. */
505 if (mode == Pmode && !reload_in_progress)
507 if (regno == FRAME_POINTER_REGNUM
508 && (!reload_completed || frame_pointer_needed))
509 return frame_pointer_rtx;
510 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
511 if (regno == HARD_FRAME_POINTER_REGNUM
512 && (!reload_completed || frame_pointer_needed))
513 return hard_frame_pointer_rtx;
515 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
516 if (regno == ARG_POINTER_REGNUM)
517 return arg_pointer_rtx;
519 #ifdef RETURN_ADDRESS_POINTER_REGNUM
520 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
521 return return_address_pointer_rtx;
523 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
524 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
525 return pic_offset_table_rtx;
526 if (regno == STACK_POINTER_REGNUM)
527 return stack_pointer_rtx;
531 /* If the per-function register table has been set up, try to re-use
532 an existing entry in that table to avoid useless generation of RTL.
534 This code is disabled for now until we can fix the various backends
535 which depend on having non-shared hard registers in some cases. Long
536 term we want to re-enable this code as it can significantly cut down
537 on the amount of useless RTL that gets generated.
539 We'll also need to fix some code that runs after reload that wants to
540 set ORIGINAL_REGNO. */
545 && regno < FIRST_PSEUDO_REGISTER
546 && reg_raw_mode[regno] == mode)
547 return regno_reg_rtx[regno];
550 return gen_raw_REG (mode, regno);
554 gen_rtx_MEM (enum machine_mode mode, rtx addr)
556 rtx rt = gen_rtx_raw_MEM (mode, addr);
558 /* This field is not cleared by the mere allocation of the rtx, so
565 /* Generate a memory referring to non-trapping constant memory. */
568 gen_const_mem (enum machine_mode mode, rtx addr)
570 rtx mem = gen_rtx_MEM (mode, addr);
571 MEM_READONLY_P (mem) = 1;
572 MEM_NOTRAP_P (mem) = 1;
576 /* Generate a MEM referring to fixed portions of the frame, e.g., register
580 gen_frame_mem (enum machine_mode mode, rtx addr)
582 rtx mem = gen_rtx_MEM (mode, addr);
583 MEM_NOTRAP_P (mem) = 1;
584 set_mem_alias_set (mem, get_frame_alias_set ());
588 /* Generate a MEM referring to a temporary use of the stack, not part
589 of the fixed stack frame. For example, something which is pushed
590 by a target splitter. */
592 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
594 rtx mem = gen_rtx_MEM (mode, addr);
595 MEM_NOTRAP_P (mem) = 1;
596 if (!current_function_calls_alloca)
597 set_mem_alias_set (mem, get_frame_alias_set ());
601 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
602 this construct would be valid, and false otherwise. */
605 validate_subreg (enum machine_mode omode, enum machine_mode imode,
606 rtx reg, unsigned int offset)
608 unsigned int isize = GET_MODE_SIZE (imode);
609 unsigned int osize = GET_MODE_SIZE (omode);
611 /* All subregs must be aligned. */
612 if (offset % osize != 0)
615 /* The subreg offset cannot be outside the inner object. */
619 /* ??? This should not be here. Temporarily continue to allow word_mode
620 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
621 Generally, backends are doing something sketchy but it'll take time to
623 if (omode == word_mode)
625 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
626 is the culprit here, and not the backends. */
627 else if (osize >= UNITS_PER_WORD && isize >= osize)
629 /* Allow component subregs of complex and vector. Though given the below
630 extraction rules, it's not always clear what that means. */
631 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
632 && GET_MODE_INNER (imode) == omode)
634 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
635 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
636 represent this. It's questionable if this ought to be represented at
637 all -- why can't this all be hidden in post-reload splitters that make
638 arbitrarily mode changes to the registers themselves. */
639 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
641 /* Subregs involving floating point modes are not allowed to
642 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
643 (subreg:SI (reg:DF) 0) isn't. */
644 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
650 /* Paradoxical subregs must have offset zero. */
654 /* This is a normal subreg. Verify that the offset is representable. */
656 /* For hard registers, we already have most of these rules collected in
657 subreg_offset_representable_p. */
658 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
660 unsigned int regno = REGNO (reg);
662 #ifdef CANNOT_CHANGE_MODE_CLASS
663 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
664 && GET_MODE_INNER (imode) == omode)
666 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
670 return subreg_offset_representable_p (regno, imode, offset, omode);
673 /* For pseudo registers, we want most of the same checks. Namely:
674 If the register no larger than a word, the subreg must be lowpart.
675 If the register is larger than a word, the subreg must be the lowpart
676 of a subword. A subreg does *not* perform arbitrary bit extraction.
677 Given that we've already checked mode/offset alignment, we only have
678 to check subword subregs here. */
679 if (osize < UNITS_PER_WORD)
681 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
682 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
683 if (offset % UNITS_PER_WORD != low_off)
690 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
692 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
693 return gen_rtx_raw_SUBREG (mode, reg, offset);
696 /* Generate a SUBREG representing the least-significant part of REG if MODE
697 is smaller than mode of REG, otherwise paradoxical SUBREG. */
700 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
702 enum machine_mode inmode;
704 inmode = GET_MODE (reg);
705 if (inmode == VOIDmode)
707 return gen_rtx_SUBREG (mode, reg,
708 subreg_lowpart_offset (mode, inmode));
711 /* gen_rtvec (n, [rt1, ..., rtn])
713 ** This routine creates an rtvec and stores within it the
714 ** pointers to rtx's which are its arguments.
719 gen_rtvec (int n, ...)
728 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
730 vector = alloca (n * sizeof (rtx));
732 for (i = 0; i < n; i++)
733 vector[i] = va_arg (p, rtx);
735 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
739 return gen_rtvec_v (save_n, vector);
743 gen_rtvec_v (int n, rtx *argp)
749 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
751 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
753 for (i = 0; i < n; i++)
754 rt_val->elem[i] = *argp++;
759 /* Generate a REG rtx for a new pseudo register of mode MODE.
760 This pseudo is assigned the next sequential register number. */
763 gen_reg_rtx (enum machine_mode mode)
765 struct function *f = cfun;
768 /* Don't let anything called after initial flow analysis create new
770 gcc_assert (!no_new_pseudos);
772 if (generating_concat_p
773 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
774 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
776 /* For complex modes, don't make a single pseudo.
777 Instead, make a CONCAT of two pseudos.
778 This allows noncontiguous allocation of the real and imaginary parts,
779 which makes much better code. Besides, allocating DCmode
780 pseudos overstrains reload on some machines like the 386. */
781 rtx realpart, imagpart;
782 enum machine_mode partmode = GET_MODE_INNER (mode);
784 realpart = gen_reg_rtx (partmode);
785 imagpart = gen_reg_rtx (partmode);
786 return gen_rtx_CONCAT (mode, realpart, imagpart);
789 /* Make sure regno_pointer_align, and regno_reg_rtx are large
790 enough to have an element for this pseudo reg number. */
792 if (reg_rtx_no == f->emit->regno_pointer_align_length)
794 int old_size = f->emit->regno_pointer_align_length;
798 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
799 memset (new + old_size, 0, old_size);
800 f->emit->regno_pointer_align = (unsigned char *) new;
802 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
803 old_size * 2 * sizeof (rtx));
804 memset (new1 + old_size, 0, old_size * sizeof (rtx));
805 regno_reg_rtx = new1;
807 f->emit->regno_pointer_align_length = old_size * 2;
810 val = gen_raw_REG (mode, reg_rtx_no);
811 regno_reg_rtx[reg_rtx_no++] = val;
815 /* Update NEW with the same attributes as REG, but offsetted by OFFSET.
816 Do the big endian correction if needed. */
819 update_reg_offset (rtx new, rtx reg, int offset)
822 HOST_WIDE_INT var_size;
824 /* PR middle-end/14084
825 The problem appears when a variable is stored in a larger register
826 and later it is used in the original mode or some mode in between
827 or some part of variable is accessed.
829 On little endian machines there is no problem because
830 the REG_OFFSET of the start of the variable is the same when
831 accessed in any mode (it is 0).
833 However, this is not true on big endian machines.
834 The offset of the start of the variable is different when accessed
836 When we are taking a part of the REG we have to change the OFFSET
837 from offset WRT size of mode of REG to offset WRT size of variable.
839 If we would not do the big endian correction the resulting REG_OFFSET
840 would be larger than the size of the DECL.
842 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
844 REG.mode MODE DECL size old offset new offset description
845 DI SI 4 4 0 int32 in SImode
846 DI SI 1 4 0 char in SImode
847 DI QI 1 7 0 char in QImode
848 DI QI 4 5 1 1st element in QImode
850 DI HI 4 6 2 1st element in HImode
853 If the size of DECL is equal or greater than the size of REG
854 we can't do this correction because the register holds the
855 whole variable or a part of the variable and thus the REG_OFFSET
856 is already correct. */
858 decl = REG_EXPR (reg);
859 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
862 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (GET_MODE (new))
863 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
864 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
868 /* Convert machine endian to little endian WRT size of mode of REG. */
869 if (WORDS_BIG_ENDIAN)
870 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
871 / UNITS_PER_WORD) * UNITS_PER_WORD;
873 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
875 if (BYTES_BIG_ENDIAN)
876 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
879 offset_le += offset % UNITS_PER_WORD;
881 if (offset_le >= var_size)
883 /* MODE is wider than the variable so the new reg will cover
884 the whole variable so the resulting OFFSET should be 0. */
889 /* Convert little endian to machine endian WRT size of variable. */
890 if (WORDS_BIG_ENDIAN)
891 offset = ((var_size - 1 - offset_le)
892 / UNITS_PER_WORD) * UNITS_PER_WORD;
894 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
896 if (BYTES_BIG_ENDIAN)
897 offset += ((var_size - 1 - offset_le)
900 offset += offset_le % UNITS_PER_WORD;
904 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
905 REG_OFFSET (reg) + offset);
908 /* Generate a register with same attributes as REG, but offsetted by
912 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
915 rtx new = gen_rtx_REG (mode, regno);
917 update_reg_offset (new, reg, offset);
921 /* Generate a new pseudo-register with the same attributes as REG, but
922 offsetted by OFFSET. */
925 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
927 rtx new = gen_reg_rtx (mode);
929 update_reg_offset (new, reg, offset);
933 /* Set the decl for MEM to DECL. */
936 set_reg_attrs_from_mem (rtx reg, rtx mem)
938 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
940 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
943 /* Set the register attributes for registers contained in PARM_RTX.
944 Use needed values from memory attributes of MEM. */
947 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
949 if (REG_P (parm_rtx))
950 set_reg_attrs_from_mem (parm_rtx, mem);
951 else if (GET_CODE (parm_rtx) == PARALLEL)
953 /* Check for a NULL entry in the first slot, used to indicate that the
954 parameter goes both on the stack and in registers. */
955 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
956 for (; i < XVECLEN (parm_rtx, 0); i++)
958 rtx x = XVECEXP (parm_rtx, 0, i);
959 if (REG_P (XEXP (x, 0)))
960 REG_ATTRS (XEXP (x, 0))
961 = get_reg_attrs (MEM_EXPR (mem),
962 INTVAL (XEXP (x, 1)));
967 /* Assign the RTX X to declaration T. */
969 set_decl_rtl (tree t, rtx x)
971 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
975 /* For register, we maintain the reverse information too. */
977 REG_ATTRS (x) = get_reg_attrs (t, 0);
978 else if (GET_CODE (x) == SUBREG)
979 REG_ATTRS (SUBREG_REG (x))
980 = get_reg_attrs (t, -SUBREG_BYTE (x));
981 if (GET_CODE (x) == CONCAT)
983 if (REG_P (XEXP (x, 0)))
984 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
985 if (REG_P (XEXP (x, 1)))
986 REG_ATTRS (XEXP (x, 1))
987 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
989 if (GET_CODE (x) == PARALLEL)
992 for (i = 0; i < XVECLEN (x, 0); i++)
994 rtx y = XVECEXP (x, 0, i);
995 if (REG_P (XEXP (y, 0)))
996 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1001 /* Assign the RTX X to parameter declaration T. */
1003 set_decl_incoming_rtl (tree t, rtx x)
1005 DECL_INCOMING_RTL (t) = x;
1009 /* For register, we maintain the reverse information too. */
1011 REG_ATTRS (x) = get_reg_attrs (t, 0);
1012 else if (GET_CODE (x) == SUBREG)
1013 REG_ATTRS (SUBREG_REG (x))
1014 = get_reg_attrs (t, -SUBREG_BYTE (x));
1015 if (GET_CODE (x) == CONCAT)
1017 if (REG_P (XEXP (x, 0)))
1018 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1019 if (REG_P (XEXP (x, 1)))
1020 REG_ATTRS (XEXP (x, 1))
1021 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1023 if (GET_CODE (x) == PARALLEL)
1027 /* Check for a NULL entry, used to indicate that the parameter goes
1028 both on the stack and in registers. */
1029 if (XEXP (XVECEXP (x, 0, 0), 0))
1034 for (i = start; i < XVECLEN (x, 0); i++)
1036 rtx y = XVECEXP (x, 0, i);
1037 if (REG_P (XEXP (y, 0)))
1038 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1043 /* Identify REG (which may be a CONCAT) as a user register. */
1046 mark_user_reg (rtx reg)
1048 if (GET_CODE (reg) == CONCAT)
1050 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1051 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1055 gcc_assert (REG_P (reg));
1056 REG_USERVAR_P (reg) = 1;
1060 /* Identify REG as a probable pointer register and show its alignment
1061 as ALIGN, if nonzero. */
1064 mark_reg_pointer (rtx reg, int align)
1066 if (! REG_POINTER (reg))
1068 REG_POINTER (reg) = 1;
1071 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1073 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1074 /* We can no-longer be sure just how aligned this pointer is. */
1075 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1078 /* Return 1 plus largest pseudo reg number used in the current function. */
1086 /* Return 1 + the largest label number used so far in the current function. */
1089 max_label_num (void)
1094 /* Return first label number used in this function (if any were used). */
1097 get_first_label_num (void)
1099 return first_label_num;
1102 /* If the rtx for label was created during the expansion of a nested
1103 function, then first_label_num won't include this label number.
1104 Fix this now so that array indicies work later. */
1107 maybe_set_first_label_num (rtx x)
1109 if (CODE_LABEL_NUMBER (x) < first_label_num)
1110 first_label_num = CODE_LABEL_NUMBER (x);
1113 /* Return a value representing some low-order bits of X, where the number
1114 of low-order bits is given by MODE. Note that no conversion is done
1115 between floating-point and fixed-point values, rather, the bit
1116 representation is returned.
1118 This function handles the cases in common between gen_lowpart, below,
1119 and two variants in cse.c and combine.c. These are the cases that can
1120 be safely handled at all points in the compilation.
1122 If this is not a case we can handle, return 0. */
1125 gen_lowpart_common (enum machine_mode mode, rtx x)
1127 int msize = GET_MODE_SIZE (mode);
1130 enum machine_mode innermode;
1132 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1133 so we have to make one up. Yuk. */
1134 innermode = GET_MODE (x);
1135 if (GET_CODE (x) == CONST_INT
1136 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1137 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1138 else if (innermode == VOIDmode)
1139 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1141 xsize = GET_MODE_SIZE (innermode);
1143 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1145 if (innermode == mode)
1148 /* MODE must occupy no more words than the mode of X. */
1149 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1150 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1153 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1154 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1157 offset = subreg_lowpart_offset (mode, innermode);
1159 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1160 && (GET_MODE_CLASS (mode) == MODE_INT
1161 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1163 /* If we are getting the low-order part of something that has been
1164 sign- or zero-extended, we can either just use the object being
1165 extended or make a narrower extension. If we want an even smaller
1166 piece than the size of the object being extended, call ourselves
1169 This case is used mostly by combine and cse. */
1171 if (GET_MODE (XEXP (x, 0)) == mode)
1173 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1174 return gen_lowpart_common (mode, XEXP (x, 0));
1175 else if (msize < xsize)
1176 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1178 else if (GET_CODE (x) == SUBREG || REG_P (x)
1179 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1180 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1181 return simplify_gen_subreg (mode, x, innermode, offset);
1183 /* Otherwise, we can't do this. */
1188 gen_highpart (enum machine_mode mode, rtx x)
1190 unsigned int msize = GET_MODE_SIZE (mode);
1193 /* This case loses if X is a subreg. To catch bugs early,
1194 complain if an invalid MODE is used even in other cases. */
1195 gcc_assert (msize <= UNITS_PER_WORD
1196 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1198 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1199 subreg_highpart_offset (mode, GET_MODE (x)));
1200 gcc_assert (result);
1202 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1203 the target if we have a MEM. gen_highpart must return a valid operand,
1204 emitting code if necessary to do so. */
1207 result = validize_mem (result);
1208 gcc_assert (result);
1214 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1215 be VOIDmode constant. */
1217 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1219 if (GET_MODE (exp) != VOIDmode)
1221 gcc_assert (GET_MODE (exp) == innermode);
1222 return gen_highpart (outermode, exp);
1224 return simplify_gen_subreg (outermode, exp, innermode,
1225 subreg_highpart_offset (outermode, innermode));
1228 /* Return offset in bytes to get OUTERMODE low part
1229 of the value in mode INNERMODE stored in memory in target format. */
1232 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1234 unsigned int offset = 0;
1235 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1239 if (WORDS_BIG_ENDIAN)
1240 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1241 if (BYTES_BIG_ENDIAN)
1242 offset += difference % UNITS_PER_WORD;
1248 /* Return offset in bytes to get OUTERMODE high part
1249 of the value in mode INNERMODE stored in memory in target format. */
1251 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1253 unsigned int offset = 0;
1254 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1256 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1260 if (! WORDS_BIG_ENDIAN)
1261 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1262 if (! BYTES_BIG_ENDIAN)
1263 offset += difference % UNITS_PER_WORD;
1269 /* Return 1 iff X, assumed to be a SUBREG,
1270 refers to the least significant part of its containing reg.
1271 If X is not a SUBREG, always return 1 (it is its own low part!). */
1274 subreg_lowpart_p (rtx x)
1276 if (GET_CODE (x) != SUBREG)
1278 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1281 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1282 == SUBREG_BYTE (x));
1285 /* Return subword OFFSET of operand OP.
1286 The word number, OFFSET, is interpreted as the word number starting
1287 at the low-order address. OFFSET 0 is the low-order word if not
1288 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1290 If we cannot extract the required word, we return zero. Otherwise,
1291 an rtx corresponding to the requested word will be returned.
1293 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1294 reload has completed, a valid address will always be returned. After
1295 reload, if a valid address cannot be returned, we return zero.
1297 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1298 it is the responsibility of the caller.
1300 MODE is the mode of OP in case it is a CONST_INT.
1302 ??? This is still rather broken for some cases. The problem for the
1303 moment is that all callers of this thing provide no 'goal mode' to
1304 tell us to work with. This exists because all callers were written
1305 in a word based SUBREG world.
1306 Now use of this function can be deprecated by simplify_subreg in most
1311 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1313 if (mode == VOIDmode)
1314 mode = GET_MODE (op);
1316 gcc_assert (mode != VOIDmode);
1318 /* If OP is narrower than a word, fail. */
1320 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1323 /* If we want a word outside OP, return zero. */
1325 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1328 /* Form a new MEM at the requested address. */
1331 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1333 if (! validate_address)
1336 else if (reload_completed)
1338 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1342 return replace_equiv_address (new, XEXP (new, 0));
1345 /* Rest can be handled by simplify_subreg. */
1346 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1349 /* Similar to `operand_subword', but never return 0. If we can't
1350 extract the required subword, put OP into a register and try again.
1351 The second attempt must succeed. We always validate the address in
1354 MODE is the mode of OP, in case it is CONST_INT. */
1357 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1359 rtx result = operand_subword (op, offset, 1, mode);
1364 if (mode != BLKmode && mode != VOIDmode)
1366 /* If this is a register which can not be accessed by words, copy it
1367 to a pseudo register. */
1369 op = copy_to_reg (op);
1371 op = force_reg (mode, op);
1374 result = operand_subword (op, offset, 1, mode);
1375 gcc_assert (result);
1380 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1381 or (2) a component ref of something variable. Represent the later with
1382 a NULL expression. */
1385 component_ref_for_mem_expr (tree ref)
1387 tree inner = TREE_OPERAND (ref, 0);
1389 if (TREE_CODE (inner) == COMPONENT_REF)
1390 inner = component_ref_for_mem_expr (inner);
1393 /* Now remove any conversions: they don't change what the underlying
1394 object is. Likewise for SAVE_EXPR. */
1395 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1396 || TREE_CODE (inner) == NON_LVALUE_EXPR
1397 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1398 || TREE_CODE (inner) == SAVE_EXPR)
1399 inner = TREE_OPERAND (inner, 0);
1401 if (! DECL_P (inner))
1405 if (inner == TREE_OPERAND (ref, 0))
1408 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1409 TREE_OPERAND (ref, 1), NULL_TREE);
1412 /* Returns 1 if both MEM_EXPR can be considered equal
1416 mem_expr_equal_p (tree expr1, tree expr2)
1421 if (! expr1 || ! expr2)
1424 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1427 if (TREE_CODE (expr1) == COMPONENT_REF)
1429 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1430 TREE_OPERAND (expr2, 0))
1431 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1432 TREE_OPERAND (expr2, 1));
1434 if (INDIRECT_REF_P (expr1))
1435 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1436 TREE_OPERAND (expr2, 0));
1438 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1439 have been resolved here. */
1440 gcc_assert (DECL_P (expr1));
1442 /* Decls with different pointers can't be equal. */
1446 /* Given REF, a MEM, and T, either the type of X or the expression
1447 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1448 if we are making a new object of this type. BITPOS is nonzero if
1449 there is an offset outstanding on T that will be applied later. */
1452 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1453 HOST_WIDE_INT bitpos)
1455 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1456 tree expr = MEM_EXPR (ref);
1457 rtx offset = MEM_OFFSET (ref);
1458 rtx size = MEM_SIZE (ref);
1459 unsigned int align = MEM_ALIGN (ref);
1460 HOST_WIDE_INT apply_bitpos = 0;
1463 /* It can happen that type_for_mode was given a mode for which there
1464 is no language-level type. In which case it returns NULL, which
1469 type = TYPE_P (t) ? t : TREE_TYPE (t);
1470 if (type == error_mark_node)
1473 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1474 wrong answer, as it assumes that DECL_RTL already has the right alias
1475 info. Callers should not set DECL_RTL until after the call to
1476 set_mem_attributes. */
1477 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1479 /* Get the alias set from the expression or type (perhaps using a
1480 front-end routine) and use it. */
1481 alias = get_alias_set (t);
1483 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1484 MEM_IN_STRUCT_P (ref)
1485 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1486 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1488 /* If we are making an object of this type, or if this is a DECL, we know
1489 that it is a scalar if the type is not an aggregate. */
1490 if ((objectp || DECL_P (t))
1491 && ! AGGREGATE_TYPE_P (type)
1492 && TREE_CODE (type) != COMPLEX_TYPE)
1493 MEM_SCALAR_P (ref) = 1;
1495 /* We can set the alignment from the type if we are making an object,
1496 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1497 if (objectp || TREE_CODE (t) == INDIRECT_REF
1498 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1499 || TYPE_ALIGN_OK (type))
1500 align = MAX (align, TYPE_ALIGN (type));
1502 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1504 if (integer_zerop (TREE_OPERAND (t, 1)))
1505 /* We don't know anything about the alignment. */
1506 align = BITS_PER_UNIT;
1508 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1511 /* If the size is known, we can set that. */
1512 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1513 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1515 /* If T is not a type, we may be able to deduce some more information about
1521 if (TREE_THIS_VOLATILE (t))
1522 MEM_VOLATILE_P (ref) = 1;
1524 /* Now remove any conversions: they don't change what the underlying
1525 object is. Likewise for SAVE_EXPR. */
1526 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1527 || TREE_CODE (t) == NON_LVALUE_EXPR
1528 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1529 || TREE_CODE (t) == SAVE_EXPR)
1530 t = TREE_OPERAND (t, 0);
1532 /* We may look through structure-like accesses for the purposes of
1533 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1535 while (TREE_CODE (base) == COMPONENT_REF
1536 || TREE_CODE (base) == REALPART_EXPR
1537 || TREE_CODE (base) == IMAGPART_EXPR
1538 || TREE_CODE (base) == BIT_FIELD_REF)
1539 base = TREE_OPERAND (base, 0);
1543 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1544 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1546 MEM_NOTRAP_P (ref) = 1;
1549 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1551 base = get_base_address (base);
1552 if (base && DECL_P (base)
1553 && TREE_READONLY (base)
1554 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1556 tree base_type = TREE_TYPE (base);
1557 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1558 || DECL_ARTIFICIAL (base));
1559 MEM_READONLY_P (ref) = 1;
1562 /* If this expression uses it's parent's alias set, mark it such
1563 that we won't change it. */
1564 if (component_uses_parent_alias_set (t))
1565 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1567 /* If this is a decl, set the attributes of the MEM from it. */
1571 offset = const0_rtx;
1572 apply_bitpos = bitpos;
1573 size = (DECL_SIZE_UNIT (t)
1574 && host_integerp (DECL_SIZE_UNIT (t), 1)
1575 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1576 align = DECL_ALIGN (t);
1579 /* If this is a constant, we know the alignment. */
1580 else if (CONSTANT_CLASS_P (t))
1582 align = TYPE_ALIGN (type);
1583 #ifdef CONSTANT_ALIGNMENT
1584 align = CONSTANT_ALIGNMENT (t, align);
1588 /* If this is a field reference and not a bit-field, record it. */
1589 /* ??? There is some information that can be gleened from bit-fields,
1590 such as the word offset in the structure that might be modified.
1591 But skip it for now. */
1592 else if (TREE_CODE (t) == COMPONENT_REF
1593 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1595 expr = component_ref_for_mem_expr (t);
1596 offset = const0_rtx;
1597 apply_bitpos = bitpos;
1598 /* ??? Any reason the field size would be different than
1599 the size we got from the type? */
1602 /* If this is an array reference, look for an outer field reference. */
1603 else if (TREE_CODE (t) == ARRAY_REF)
1605 tree off_tree = size_zero_node;
1606 /* We can't modify t, because we use it at the end of the
1612 tree index = TREE_OPERAND (t2, 1);
1613 tree low_bound = array_ref_low_bound (t2);
1614 tree unit_size = array_ref_element_size (t2);
1616 /* We assume all arrays have sizes that are a multiple of a byte.
1617 First subtract the lower bound, if any, in the type of the
1618 index, then convert to sizetype and multiply by the size of
1619 the array element. */
1620 if (! integer_zerop (low_bound))
1621 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1624 off_tree = size_binop (PLUS_EXPR,
1625 size_binop (MULT_EXPR,
1626 fold_convert (sizetype,
1630 t2 = TREE_OPERAND (t2, 0);
1632 while (TREE_CODE (t2) == ARRAY_REF);
1638 if (host_integerp (off_tree, 1))
1640 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1641 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1642 align = DECL_ALIGN (t2);
1643 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1645 offset = GEN_INT (ioff);
1646 apply_bitpos = bitpos;
1649 else if (TREE_CODE (t2) == COMPONENT_REF)
1651 expr = component_ref_for_mem_expr (t2);
1652 if (host_integerp (off_tree, 1))
1654 offset = GEN_INT (tree_low_cst (off_tree, 1));
1655 apply_bitpos = bitpos;
1657 /* ??? Any reason the field size would be different than
1658 the size we got from the type? */
1660 else if (flag_argument_noalias > 1
1661 && (INDIRECT_REF_P (t2))
1662 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1669 /* If this is a Fortran indirect argument reference, record the
1671 else if (flag_argument_noalias > 1
1672 && (INDIRECT_REF_P (t))
1673 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1680 /* If we modified OFFSET based on T, then subtract the outstanding
1681 bit position offset. Similarly, increase the size of the accessed
1682 object to contain the negative offset. */
1685 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1687 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1690 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1692 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1693 we're overlapping. */
1698 /* Now set the attributes we computed above. */
1700 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1702 /* If this is already known to be a scalar or aggregate, we are done. */
1703 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1706 /* If it is a reference into an aggregate, this is part of an aggregate.
1707 Otherwise we don't know. */
1708 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1709 || TREE_CODE (t) == ARRAY_RANGE_REF
1710 || TREE_CODE (t) == BIT_FIELD_REF)
1711 MEM_IN_STRUCT_P (ref) = 1;
1715 set_mem_attributes (rtx ref, tree t, int objectp)
1717 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1720 /* Set the decl for MEM to DECL. */
1723 set_mem_attrs_from_reg (rtx mem, rtx reg)
1726 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1727 GEN_INT (REG_OFFSET (reg)),
1728 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1731 /* Set the alias set of MEM to SET. */
1734 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1736 #ifdef ENABLE_CHECKING
1737 /* If the new and old alias sets don't conflict, something is wrong. */
1738 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1741 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1742 MEM_SIZE (mem), MEM_ALIGN (mem),
1746 /* Set the alignment of MEM to ALIGN bits. */
1749 set_mem_align (rtx mem, unsigned int align)
1751 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1752 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1756 /* Set the expr for MEM to EXPR. */
1759 set_mem_expr (rtx mem, tree expr)
1762 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1763 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1766 /* Set the offset of MEM to OFFSET. */
1769 set_mem_offset (rtx mem, rtx offset)
1771 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1772 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1776 /* Set the size of MEM to SIZE. */
1779 set_mem_size (rtx mem, rtx size)
1781 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1782 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1786 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1787 and its address changed to ADDR. (VOIDmode means don't change the mode.
1788 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1789 returned memory location is required to be valid. The memory
1790 attributes are not changed. */
1793 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1797 gcc_assert (MEM_P (memref));
1798 if (mode == VOIDmode)
1799 mode = GET_MODE (memref);
1801 addr = XEXP (memref, 0);
1802 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1803 && (!validate || memory_address_p (mode, addr)))
1808 if (reload_in_progress || reload_completed)
1809 gcc_assert (memory_address_p (mode, addr));
1811 addr = memory_address (mode, addr);
1814 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1817 new = gen_rtx_MEM (mode, addr);
1818 MEM_COPY_ATTRIBUTES (new, memref);
1822 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1823 way we are changing MEMREF, so we only preserve the alias set. */
1826 change_address (rtx memref, enum machine_mode mode, rtx addr)
1828 rtx new = change_address_1 (memref, mode, addr, 1), size;
1829 enum machine_mode mmode = GET_MODE (new);
1832 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1833 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1835 /* If there are no changes, just return the original memory reference. */
1838 if (MEM_ATTRS (memref) == 0
1839 || (MEM_EXPR (memref) == NULL
1840 && MEM_OFFSET (memref) == NULL
1841 && MEM_SIZE (memref) == size
1842 && MEM_ALIGN (memref) == align))
1845 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1846 MEM_COPY_ATTRIBUTES (new, memref);
1850 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1855 /* Return a memory reference like MEMREF, but with its mode changed
1856 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1857 nonzero, the memory address is forced to be valid.
1858 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1859 and caller is responsible for adjusting MEMREF base register. */
1862 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1863 int validate, int adjust)
1865 rtx addr = XEXP (memref, 0);
1867 rtx memoffset = MEM_OFFSET (memref);
1869 unsigned int memalign = MEM_ALIGN (memref);
1871 /* If there are no changes, just return the original memory reference. */
1872 if (mode == GET_MODE (memref) && !offset
1873 && (!validate || memory_address_p (mode, addr)))
1876 /* ??? Prefer to create garbage instead of creating shared rtl.
1877 This may happen even if offset is nonzero -- consider
1878 (plus (plus reg reg) const_int) -- so do this always. */
1879 addr = copy_rtx (addr);
1883 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1884 object, we can merge it into the LO_SUM. */
1885 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1887 && (unsigned HOST_WIDE_INT) offset
1888 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1889 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1890 plus_constant (XEXP (addr, 1), offset));
1892 addr = plus_constant (addr, offset);
1895 new = change_address_1 (memref, mode, addr, validate);
1897 /* Compute the new values of the memory attributes due to this adjustment.
1898 We add the offsets and update the alignment. */
1900 memoffset = GEN_INT (offset + INTVAL (memoffset));
1902 /* Compute the new alignment by taking the MIN of the alignment and the
1903 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1908 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1910 /* We can compute the size in a number of ways. */
1911 if (GET_MODE (new) != BLKmode)
1912 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1913 else if (MEM_SIZE (memref))
1914 size = plus_constant (MEM_SIZE (memref), -offset);
1916 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1917 memoffset, size, memalign, GET_MODE (new));
1919 /* At some point, we should validate that this offset is within the object,
1920 if all the appropriate values are known. */
1924 /* Return a memory reference like MEMREF, but with its mode changed
1925 to MODE and its address changed to ADDR, which is assumed to be
1926 MEMREF offseted by OFFSET bytes. If VALIDATE is
1927 nonzero, the memory address is forced to be valid. */
1930 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1931 HOST_WIDE_INT offset, int validate)
1933 memref = change_address_1 (memref, VOIDmode, addr, validate);
1934 return adjust_address_1 (memref, mode, offset, validate, 0);
1937 /* Return a memory reference like MEMREF, but whose address is changed by
1938 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1939 known to be in OFFSET (possibly 1). */
1942 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1944 rtx new, addr = XEXP (memref, 0);
1946 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1948 /* At this point we don't know _why_ the address is invalid. It
1949 could have secondary memory references, multiplies or anything.
1951 However, if we did go and rearrange things, we can wind up not
1952 being able to recognize the magic around pic_offset_table_rtx.
1953 This stuff is fragile, and is yet another example of why it is
1954 bad to expose PIC machinery too early. */
1955 if (! memory_address_p (GET_MODE (memref), new)
1956 && GET_CODE (addr) == PLUS
1957 && XEXP (addr, 0) == pic_offset_table_rtx)
1959 addr = force_reg (GET_MODE (addr), addr);
1960 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1963 update_temp_slot_address (XEXP (memref, 0), new);
1964 new = change_address_1 (memref, VOIDmode, new, 1);
1966 /* If there are no changes, just return the original memory reference. */
1970 /* Update the alignment to reflect the offset. Reset the offset, which
1973 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1974 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1979 /* Return a memory reference like MEMREF, but with its address changed to
1980 ADDR. The caller is asserting that the actual piece of memory pointed
1981 to is the same, just the form of the address is being changed, such as
1982 by putting something into a register. */
1985 replace_equiv_address (rtx memref, rtx addr)
1987 /* change_address_1 copies the memory attribute structure without change
1988 and that's exactly what we want here. */
1989 update_temp_slot_address (XEXP (memref, 0), addr);
1990 return change_address_1 (memref, VOIDmode, addr, 1);
1993 /* Likewise, but the reference is not required to be valid. */
1996 replace_equiv_address_nv (rtx memref, rtx addr)
1998 return change_address_1 (memref, VOIDmode, addr, 0);
2001 /* Return a memory reference like MEMREF, but with its mode widened to
2002 MODE and offset by OFFSET. This would be used by targets that e.g.
2003 cannot issue QImode memory operations and have to use SImode memory
2004 operations plus masking logic. */
2007 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2009 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2010 tree expr = MEM_EXPR (new);
2011 rtx memoffset = MEM_OFFSET (new);
2012 unsigned int size = GET_MODE_SIZE (mode);
2014 /* If there are no changes, just return the original memory reference. */
2018 /* If we don't know what offset we were at within the expression, then
2019 we can't know if we've overstepped the bounds. */
2025 if (TREE_CODE (expr) == COMPONENT_REF)
2027 tree field = TREE_OPERAND (expr, 1);
2028 tree offset = component_ref_field_offset (expr);
2030 if (! DECL_SIZE_UNIT (field))
2036 /* Is the field at least as large as the access? If so, ok,
2037 otherwise strip back to the containing structure. */
2038 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2039 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2040 && INTVAL (memoffset) >= 0)
2043 if (! host_integerp (offset, 1))
2049 expr = TREE_OPERAND (expr, 0);
2051 = (GEN_INT (INTVAL (memoffset)
2052 + tree_low_cst (offset, 1)
2053 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2056 /* Similarly for the decl. */
2057 else if (DECL_P (expr)
2058 && DECL_SIZE_UNIT (expr)
2059 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2060 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2061 && (! memoffset || INTVAL (memoffset) >= 0))
2065 /* The widened memory access overflows the expression, which means
2066 that it could alias another expression. Zap it. */
2073 memoffset = NULL_RTX;
2075 /* The widened memory may alias other stuff, so zap the alias set. */
2076 /* ??? Maybe use get_alias_set on any remaining expression. */
2078 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2079 MEM_ALIGN (new), mode);
2084 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2087 gen_label_rtx (void)
2089 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2090 NULL, label_num++, NULL);
2093 /* For procedure integration. */
2095 /* Install new pointers to the first and last insns in the chain.
2096 Also, set cur_insn_uid to one higher than the last in use.
2097 Used for an inline-procedure after copying the insn chain. */
2100 set_new_first_and_last_insn (rtx first, rtx last)
2108 for (insn = first; insn; insn = NEXT_INSN (insn))
2109 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2114 /* Go through all the RTL insn bodies and copy any invalid shared
2115 structure. This routine should only be called once. */
2118 unshare_all_rtl_1 (tree fndecl, rtx insn)
2122 /* Make sure that virtual parameters are not shared. */
2123 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2124 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2126 /* Make sure that virtual stack slots are not shared. */
2127 unshare_all_decls (DECL_INITIAL (fndecl));
2129 /* Unshare just about everything else. */
2130 unshare_all_rtl_in_chain (insn);
2132 /* Make sure the addresses of stack slots found outside the insn chain
2133 (such as, in DECL_RTL of a variable) are not shared
2134 with the insn chain.
2136 This special care is necessary when the stack slot MEM does not
2137 actually appear in the insn chain. If it does appear, its address
2138 is unshared from all else at that point. */
2139 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2142 /* Go through all the RTL insn bodies and copy any invalid shared
2143 structure, again. This is a fairly expensive thing to do so it
2144 should be done sparingly. */
2147 unshare_all_rtl_again (rtx insn)
2152 for (p = insn; p; p = NEXT_INSN (p))
2155 reset_used_flags (PATTERN (p));
2156 reset_used_flags (REG_NOTES (p));
2157 reset_used_flags (LOG_LINKS (p));
2160 /* Make sure that virtual stack slots are not shared. */
2161 reset_used_decls (DECL_INITIAL (cfun->decl));
2163 /* Make sure that virtual parameters are not shared. */
2164 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2165 reset_used_flags (DECL_RTL (decl));
2167 reset_used_flags (stack_slot_list);
2169 unshare_all_rtl_1 (cfun->decl, insn);
2173 unshare_all_rtl (void)
2175 unshare_all_rtl_1 (current_function_decl, get_insns ());
2179 struct tree_opt_pass pass_unshare_all_rtl =
2181 "unshare", /* name */
2183 unshare_all_rtl, /* execute */
2186 0, /* static_pass_number */
2188 0, /* properties_required */
2189 0, /* properties_provided */
2190 0, /* properties_destroyed */
2191 0, /* todo_flags_start */
2192 TODO_dump_func, /* todo_flags_finish */
2197 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2198 Recursively does the same for subexpressions. */
2201 verify_rtx_sharing (rtx orig, rtx insn)
2206 const char *format_ptr;
2211 code = GET_CODE (x);
2213 /* These types may be freely shared. */
2228 /* SCRATCH must be shared because they represent distinct values. */
2230 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2235 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2236 a LABEL_REF, it isn't sharable. */
2237 if (GET_CODE (XEXP (x, 0)) == PLUS
2238 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2239 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2244 /* A MEM is allowed to be shared if its address is constant. */
2245 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2246 || reload_completed || reload_in_progress)
2255 /* This rtx may not be shared. If it has already been seen,
2256 replace it with a copy of itself. */
2257 #ifdef ENABLE_CHECKING
2258 if (RTX_FLAG (x, used))
2260 error ("invalid rtl sharing found in the insn");
2262 error ("shared rtx");
2264 internal_error ("internal consistency failure");
2267 gcc_assert (!RTX_FLAG (x, used));
2269 RTX_FLAG (x, used) = 1;
2271 /* Now scan the subexpressions recursively. */
2273 format_ptr = GET_RTX_FORMAT (code);
2275 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2277 switch (*format_ptr++)
2280 verify_rtx_sharing (XEXP (x, i), insn);
2284 if (XVEC (x, i) != NULL)
2287 int len = XVECLEN (x, i);
2289 for (j = 0; j < len; j++)
2291 /* We allow sharing of ASM_OPERANDS inside single
2293 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2294 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2296 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2298 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2307 /* Go through all the RTL insn bodies and check that there is no unexpected
2308 sharing in between the subexpressions. */
2311 verify_rtl_sharing (void)
2315 for (p = get_insns (); p; p = NEXT_INSN (p))
2318 reset_used_flags (PATTERN (p));
2319 reset_used_flags (REG_NOTES (p));
2320 reset_used_flags (LOG_LINKS (p));
2321 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2324 rtx q, sequence = PATTERN (p);
2326 for (i = 0; i < XVECLEN (sequence, 0); i++)
2328 q = XVECEXP (sequence, 0, i);
2329 gcc_assert (INSN_P (q));
2330 reset_used_flags (PATTERN (q));
2331 reset_used_flags (REG_NOTES (q));
2332 reset_used_flags (LOG_LINKS (q));
2337 for (p = get_insns (); p; p = NEXT_INSN (p))
2340 verify_rtx_sharing (PATTERN (p), p);
2341 verify_rtx_sharing (REG_NOTES (p), p);
2342 verify_rtx_sharing (LOG_LINKS (p), p);
2346 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2347 Assumes the mark bits are cleared at entry. */
2350 unshare_all_rtl_in_chain (rtx insn)
2352 for (; insn; insn = NEXT_INSN (insn))
2355 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2356 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2357 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2361 /* Go through all virtual stack slots of a function and copy any
2362 shared structure. */
2364 unshare_all_decls (tree blk)
2368 /* Copy shared decls. */
2369 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2370 if (DECL_RTL_SET_P (t))
2371 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2373 /* Now process sub-blocks. */
2374 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2375 unshare_all_decls (t);
2378 /* Go through all virtual stack slots of a function and mark them as
2381 reset_used_decls (tree blk)
2386 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2387 if (DECL_RTL_SET_P (t))
2388 reset_used_flags (DECL_RTL (t));
2390 /* Now process sub-blocks. */
2391 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2392 reset_used_decls (t);
2395 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2396 Recursively does the same for subexpressions. Uses
2397 copy_rtx_if_shared_1 to reduce stack space. */
2400 copy_rtx_if_shared (rtx orig)
2402 copy_rtx_if_shared_1 (&orig);
2406 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2407 use. Recursively does the same for subexpressions. */
2410 copy_rtx_if_shared_1 (rtx *orig1)
2416 const char *format_ptr;
2420 /* Repeat is used to turn tail-recursion into iteration. */
2427 code = GET_CODE (x);
2429 /* These types may be freely shared. */
2443 /* SCRATCH must be shared because they represent distinct values. */
2446 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2451 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2452 a LABEL_REF, it isn't sharable. */
2453 if (GET_CODE (XEXP (x, 0)) == PLUS
2454 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2455 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2464 /* The chain of insns is not being copied. */
2471 /* This rtx may not be shared. If it has already been seen,
2472 replace it with a copy of itself. */
2474 if (RTX_FLAG (x, used))
2476 x = shallow_copy_rtx (x);
2479 RTX_FLAG (x, used) = 1;
2481 /* Now scan the subexpressions recursively.
2482 We can store any replaced subexpressions directly into X
2483 since we know X is not shared! Any vectors in X
2484 must be copied if X was copied. */
2486 format_ptr = GET_RTX_FORMAT (code);
2487 length = GET_RTX_LENGTH (code);
2490 for (i = 0; i < length; i++)
2492 switch (*format_ptr++)
2496 copy_rtx_if_shared_1 (last_ptr);
2497 last_ptr = &XEXP (x, i);
2501 if (XVEC (x, i) != NULL)
2504 int len = XVECLEN (x, i);
2506 /* Copy the vector iff I copied the rtx and the length
2508 if (copied && len > 0)
2509 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2511 /* Call recursively on all inside the vector. */
2512 for (j = 0; j < len; j++)
2515 copy_rtx_if_shared_1 (last_ptr);
2516 last_ptr = &XVECEXP (x, i, j);
2531 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2532 to look for shared sub-parts. */
2535 reset_used_flags (rtx x)
2539 const char *format_ptr;
2542 /* Repeat is used to turn tail-recursion into iteration. */
2547 code = GET_CODE (x);
2549 /* These types may be freely shared so we needn't do any resetting
2570 /* The chain of insns is not being copied. */
2577 RTX_FLAG (x, used) = 0;
2579 format_ptr = GET_RTX_FORMAT (code);
2580 length = GET_RTX_LENGTH (code);
2582 for (i = 0; i < length; i++)
2584 switch (*format_ptr++)
2592 reset_used_flags (XEXP (x, i));
2596 for (j = 0; j < XVECLEN (x, i); j++)
2597 reset_used_flags (XVECEXP (x, i, j));
2603 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2604 to look for shared sub-parts. */
2607 set_used_flags (rtx x)
2611 const char *format_ptr;
2616 code = GET_CODE (x);
2618 /* These types may be freely shared so we needn't do any resetting
2639 /* The chain of insns is not being copied. */
2646 RTX_FLAG (x, used) = 1;
2648 format_ptr = GET_RTX_FORMAT (code);
2649 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2651 switch (*format_ptr++)
2654 set_used_flags (XEXP (x, i));
2658 for (j = 0; j < XVECLEN (x, i); j++)
2659 set_used_flags (XVECEXP (x, i, j));
2665 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2666 Return X or the rtx for the pseudo reg the value of X was copied into.
2667 OTHER must be valid as a SET_DEST. */
2670 make_safe_from (rtx x, rtx other)
2673 switch (GET_CODE (other))
2676 other = SUBREG_REG (other);
2678 case STRICT_LOW_PART:
2681 other = XEXP (other, 0);
2690 && GET_CODE (x) != SUBREG)
2692 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2693 || reg_mentioned_p (other, x))))
2695 rtx temp = gen_reg_rtx (GET_MODE (x));
2696 emit_move_insn (temp, x);
2702 /* Emission of insns (adding them to the doubly-linked list). */
2704 /* Return the first insn of the current sequence or current function. */
2712 /* Specify a new insn as the first in the chain. */
2715 set_first_insn (rtx insn)
2717 gcc_assert (!PREV_INSN (insn));
2721 /* Return the last insn emitted in current sequence or current function. */
2724 get_last_insn (void)
2729 /* Specify a new insn as the last in the chain. */
2732 set_last_insn (rtx insn)
2734 gcc_assert (!NEXT_INSN (insn));
2738 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2741 get_last_insn_anywhere (void)
2743 struct sequence_stack *stack;
2746 for (stack = seq_stack; stack; stack = stack->next)
2747 if (stack->last != 0)
2752 /* Return the first nonnote insn emitted in current sequence or current
2753 function. This routine looks inside SEQUENCEs. */
2756 get_first_nonnote_insn (void)
2758 rtx insn = first_insn;
2763 for (insn = next_insn (insn);
2764 insn && NOTE_P (insn);
2765 insn = next_insn (insn))
2769 if (NONJUMP_INSN_P (insn)
2770 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2771 insn = XVECEXP (PATTERN (insn), 0, 0);
2778 /* Return the last nonnote insn emitted in current sequence or current
2779 function. This routine looks inside SEQUENCEs. */
2782 get_last_nonnote_insn (void)
2784 rtx insn = last_insn;
2789 for (insn = previous_insn (insn);
2790 insn && NOTE_P (insn);
2791 insn = previous_insn (insn))
2795 if (NONJUMP_INSN_P (insn)
2796 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2797 insn = XVECEXP (PATTERN (insn), 0,
2798 XVECLEN (PATTERN (insn), 0) - 1);
2805 /* Return a number larger than any instruction's uid in this function. */
2810 return cur_insn_uid;
2813 /* Return the next insn. If it is a SEQUENCE, return the first insn
2817 next_insn (rtx insn)
2821 insn = NEXT_INSN (insn);
2822 if (insn && NONJUMP_INSN_P (insn)
2823 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2824 insn = XVECEXP (PATTERN (insn), 0, 0);
2830 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2834 previous_insn (rtx insn)
2838 insn = PREV_INSN (insn);
2839 if (insn && NONJUMP_INSN_P (insn)
2840 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2841 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2847 /* Return the next insn after INSN that is not a NOTE. This routine does not
2848 look inside SEQUENCEs. */
2851 next_nonnote_insn (rtx insn)
2855 insn = NEXT_INSN (insn);
2856 if (insn == 0 || !NOTE_P (insn))
2863 /* Return the previous insn before INSN that is not a NOTE. This routine does
2864 not look inside SEQUENCEs. */
2867 prev_nonnote_insn (rtx insn)
2871 insn = PREV_INSN (insn);
2872 if (insn == 0 || !NOTE_P (insn))
2879 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2880 or 0, if there is none. This routine does not look inside
2884 next_real_insn (rtx insn)
2888 insn = NEXT_INSN (insn);
2889 if (insn == 0 || INSN_P (insn))
2896 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2897 or 0, if there is none. This routine does not look inside
2901 prev_real_insn (rtx insn)
2905 insn = PREV_INSN (insn);
2906 if (insn == 0 || INSN_P (insn))
2913 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2914 This routine does not look inside SEQUENCEs. */
2917 last_call_insn (void)
2921 for (insn = get_last_insn ();
2922 insn && !CALL_P (insn);
2923 insn = PREV_INSN (insn))
2929 /* Find the next insn after INSN that really does something. This routine
2930 does not look inside SEQUENCEs. Until reload has completed, this is the
2931 same as next_real_insn. */
2934 active_insn_p (rtx insn)
2936 return (CALL_P (insn) || JUMP_P (insn)
2937 || (NONJUMP_INSN_P (insn)
2938 && (! reload_completed
2939 || (GET_CODE (PATTERN (insn)) != USE
2940 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2944 next_active_insn (rtx insn)
2948 insn = NEXT_INSN (insn);
2949 if (insn == 0 || active_insn_p (insn))
2956 /* Find the last insn before INSN that really does something. This routine
2957 does not look inside SEQUENCEs. Until reload has completed, this is the
2958 same as prev_real_insn. */
2961 prev_active_insn (rtx insn)
2965 insn = PREV_INSN (insn);
2966 if (insn == 0 || active_insn_p (insn))
2973 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2976 next_label (rtx insn)
2980 insn = NEXT_INSN (insn);
2981 if (insn == 0 || LABEL_P (insn))
2988 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2991 prev_label (rtx insn)
2995 insn = PREV_INSN (insn);
2996 if (insn == 0 || LABEL_P (insn))
3003 /* Return the last label to mark the same position as LABEL. Return null
3004 if LABEL itself is null. */
3007 skip_consecutive_labels (rtx label)
3011 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3019 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3020 and REG_CC_USER notes so we can find it. */
3023 link_cc0_insns (rtx insn)
3025 rtx user = next_nonnote_insn (insn);
3027 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3028 user = XVECEXP (PATTERN (user), 0, 0);
3030 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3032 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3035 /* Return the next insn that uses CC0 after INSN, which is assumed to
3036 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3037 applied to the result of this function should yield INSN).
3039 Normally, this is simply the next insn. However, if a REG_CC_USER note
3040 is present, it contains the insn that uses CC0.
3042 Return 0 if we can't find the insn. */
3045 next_cc0_user (rtx insn)
3047 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3050 return XEXP (note, 0);
3052 insn = next_nonnote_insn (insn);
3053 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3054 insn = XVECEXP (PATTERN (insn), 0, 0);
3056 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3062 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3063 note, it is the previous insn. */
3066 prev_cc0_setter (rtx insn)
3068 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3071 return XEXP (note, 0);
3073 insn = prev_nonnote_insn (insn);
3074 gcc_assert (sets_cc0_p (PATTERN (insn)));
3081 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3084 find_auto_inc (rtx *xp, void *data)
3089 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3092 switch (GET_CODE (x))
3100 if (rtx_equal_p (reg, XEXP (x, 0)))
3111 /* Increment the label uses for all labels present in rtx. */
3114 mark_label_nuses (rtx x)
3120 code = GET_CODE (x);
3121 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3122 LABEL_NUSES (XEXP (x, 0))++;
3124 fmt = GET_RTX_FORMAT (code);
3125 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3128 mark_label_nuses (XEXP (x, i));
3129 else if (fmt[i] == 'E')
3130 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3131 mark_label_nuses (XVECEXP (x, i, j));
3136 /* Try splitting insns that can be split for better scheduling.
3137 PAT is the pattern which might split.
3138 TRIAL is the insn providing PAT.
3139 LAST is nonzero if we should return the last insn of the sequence produced.
3141 If this routine succeeds in splitting, it returns the first or last
3142 replacement insn depending on the value of LAST. Otherwise, it
3143 returns TRIAL. If the insn to be returned can be split, it will be. */
3146 try_split (rtx pat, rtx trial, int last)
3148 rtx before = PREV_INSN (trial);
3149 rtx after = NEXT_INSN (trial);
3150 int has_barrier = 0;
3154 rtx insn_last, insn;
3157 if (any_condjump_p (trial)
3158 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3159 split_branch_probability = INTVAL (XEXP (note, 0));
3160 probability = split_branch_probability;
3162 seq = split_insns (pat, trial);
3164 split_branch_probability = -1;
3166 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3167 We may need to handle this specially. */
3168 if (after && BARRIER_P (after))
3171 after = NEXT_INSN (after);
3177 /* Avoid infinite loop if any insn of the result matches
3178 the original pattern. */
3182 if (INSN_P (insn_last)
3183 && rtx_equal_p (PATTERN (insn_last), pat))
3185 if (!NEXT_INSN (insn_last))
3187 insn_last = NEXT_INSN (insn_last);
3191 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3195 mark_jump_label (PATTERN (insn), insn, 0);
3197 if (probability != -1
3198 && any_condjump_p (insn)
3199 && !find_reg_note (insn, REG_BR_PROB, 0))
3201 /* We can preserve the REG_BR_PROB notes only if exactly
3202 one jump is created, otherwise the machine description
3203 is responsible for this step using
3204 split_branch_probability variable. */
3205 gcc_assert (njumps == 1);
3207 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3208 GEN_INT (probability),
3214 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3215 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3218 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3221 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3224 *p = CALL_INSN_FUNCTION_USAGE (trial);
3225 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3229 /* Copy notes, particularly those related to the CFG. */
3230 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3232 switch (REG_NOTE_KIND (note))
3235 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3238 || (flag_non_call_exceptions && INSN_P (insn)
3239 && may_trap_p (PATTERN (insn))))
3241 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3249 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3253 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3259 case REG_NON_LOCAL_GOTO:
3260 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3264 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3272 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3274 rtx reg = XEXP (note, 0);
3275 if (!FIND_REG_INC_NOTE (insn, reg)
3276 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3277 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, reg,
3288 /* If there are LABELS inside the split insns increment the
3289 usage count so we don't delete the label. */
3290 if (NONJUMP_INSN_P (trial))
3293 while (insn != NULL_RTX)
3295 if (NONJUMP_INSN_P (insn))
3296 mark_label_nuses (PATTERN (insn));
3298 insn = PREV_INSN (insn);
3302 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3304 delete_insn (trial);
3306 emit_barrier_after (tem);
3308 /* Recursively call try_split for each new insn created; by the
3309 time control returns here that insn will be fully split, so
3310 set LAST and continue from the insn after the one returned.
3311 We can't use next_active_insn here since AFTER may be a note.
3312 Ignore deleted insns, which can be occur if not optimizing. */
3313 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3314 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3315 tem = try_split (PATTERN (tem), tem, 1);
3317 /* Return either the first or the last insn, depending on which was
3320 ? (after ? PREV_INSN (after) : last_insn)
3321 : NEXT_INSN (before);
3324 /* Make and return an INSN rtx, initializing all its slots.
3325 Store PATTERN in the pattern slots. */
3328 make_insn_raw (rtx pattern)
3332 insn = rtx_alloc (INSN);
3334 INSN_UID (insn) = cur_insn_uid++;
3335 PATTERN (insn) = pattern;
3336 INSN_CODE (insn) = -1;
3337 LOG_LINKS (insn) = NULL;
3338 REG_NOTES (insn) = NULL;
3339 INSN_LOCATOR (insn) = curr_insn_locator ();
3340 BLOCK_FOR_INSN (insn) = NULL;
3342 #ifdef ENABLE_RTL_CHECKING
3345 && (returnjump_p (insn)
3346 || (GET_CODE (insn) == SET
3347 && SET_DEST (insn) == pc_rtx)))
3349 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3357 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3360 make_jump_insn_raw (rtx pattern)
3364 insn = rtx_alloc (JUMP_INSN);
3365 INSN_UID (insn) = cur_insn_uid++;
3367 PATTERN (insn) = pattern;
3368 INSN_CODE (insn) = -1;
3369 LOG_LINKS (insn) = NULL;
3370 REG_NOTES (insn) = NULL;
3371 JUMP_LABEL (insn) = NULL;
3372 INSN_LOCATOR (insn) = curr_insn_locator ();
3373 BLOCK_FOR_INSN (insn) = NULL;
3378 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3381 make_call_insn_raw (rtx pattern)
3385 insn = rtx_alloc (CALL_INSN);
3386 INSN_UID (insn) = cur_insn_uid++;
3388 PATTERN (insn) = pattern;
3389 INSN_CODE (insn) = -1;
3390 LOG_LINKS (insn) = NULL;
3391 REG_NOTES (insn) = NULL;
3392 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3393 INSN_LOCATOR (insn) = curr_insn_locator ();
3394 BLOCK_FOR_INSN (insn) = NULL;
3399 /* Add INSN to the end of the doubly-linked list.
3400 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3405 PREV_INSN (insn) = last_insn;
3406 NEXT_INSN (insn) = 0;
3408 if (NULL != last_insn)
3409 NEXT_INSN (last_insn) = insn;
3411 if (NULL == first_insn)
3417 /* Add INSN into the doubly-linked list after insn AFTER. This and
3418 the next should be the only functions called to insert an insn once
3419 delay slots have been filled since only they know how to update a
3423 add_insn_after (rtx insn, rtx after)
3425 rtx next = NEXT_INSN (after);
3428 gcc_assert (!optimize || !INSN_DELETED_P (after));
3430 NEXT_INSN (insn) = next;
3431 PREV_INSN (insn) = after;
3435 PREV_INSN (next) = insn;
3436 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3437 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3439 else if (last_insn == after)
3443 struct sequence_stack *stack = seq_stack;
3444 /* Scan all pending sequences too. */
3445 for (; stack; stack = stack->next)
3446 if (after == stack->last)
3455 if (!BARRIER_P (after)
3456 && !BARRIER_P (insn)
3457 && (bb = BLOCK_FOR_INSN (after)))
3459 set_block_for_insn (insn, bb);
3461 bb->flags |= BB_DIRTY;
3462 /* Should not happen as first in the BB is always
3463 either NOTE or LABEL. */
3464 if (BB_END (bb) == after
3465 /* Avoid clobbering of structure when creating new BB. */
3466 && !BARRIER_P (insn)
3468 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3472 NEXT_INSN (after) = insn;
3473 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3475 rtx sequence = PATTERN (after);
3476 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3480 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3481 the previous should be the only functions called to insert an insn once
3482 delay slots have been filled since only they know how to update a
3486 add_insn_before (rtx insn, rtx before)
3488 rtx prev = PREV_INSN (before);
3491 gcc_assert (!optimize || !INSN_DELETED_P (before));
3493 PREV_INSN (insn) = prev;
3494 NEXT_INSN (insn) = before;
3498 NEXT_INSN (prev) = insn;
3499 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3501 rtx sequence = PATTERN (prev);
3502 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3505 else if (first_insn == before)
3509 struct sequence_stack *stack = seq_stack;
3510 /* Scan all pending sequences too. */
3511 for (; stack; stack = stack->next)
3512 if (before == stack->first)
3514 stack->first = insn;
3521 if (!BARRIER_P (before)
3522 && !BARRIER_P (insn)
3523 && (bb = BLOCK_FOR_INSN (before)))
3525 set_block_for_insn (insn, bb);
3527 bb->flags |= BB_DIRTY;
3528 /* Should not happen as first in the BB is always either NOTE or
3530 gcc_assert (BB_HEAD (bb) != insn
3531 /* Avoid clobbering of structure when creating new BB. */
3534 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK));
3537 PREV_INSN (before) = insn;
3538 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3539 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3542 /* Remove an insn from its doubly-linked list. This function knows how
3543 to handle sequences. */
3545 remove_insn (rtx insn)
3547 rtx next = NEXT_INSN (insn);
3548 rtx prev = PREV_INSN (insn);
3553 NEXT_INSN (prev) = next;
3554 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3556 rtx sequence = PATTERN (prev);
3557 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3560 else if (first_insn == insn)
3564 struct sequence_stack *stack = seq_stack;
3565 /* Scan all pending sequences too. */
3566 for (; stack; stack = stack->next)
3567 if (insn == stack->first)
3569 stack->first = next;
3578 PREV_INSN (next) = prev;
3579 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3580 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3582 else if (last_insn == insn)
3586 struct sequence_stack *stack = seq_stack;
3587 /* Scan all pending sequences too. */
3588 for (; stack; stack = stack->next)
3589 if (insn == stack->last)
3597 if (!BARRIER_P (insn)
3598 && (bb = BLOCK_FOR_INSN (insn)))
3601 bb->flags |= BB_DIRTY;
3602 if (BB_HEAD (bb) == insn)
3604 /* Never ever delete the basic block note without deleting whole
3606 gcc_assert (!NOTE_P (insn));
3607 BB_HEAD (bb) = next;
3609 if (BB_END (bb) == insn)
3614 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3617 add_function_usage_to (rtx call_insn, rtx call_fusage)
3619 gcc_assert (call_insn && CALL_P (call_insn));
3621 /* Put the register usage information on the CALL. If there is already
3622 some usage information, put ours at the end. */
3623 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3627 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3628 link = XEXP (link, 1))
3631 XEXP (link, 1) = call_fusage;
3634 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3637 /* Delete all insns made since FROM.
3638 FROM becomes the new last instruction. */
3641 delete_insns_since (rtx from)
3646 NEXT_INSN (from) = 0;
3650 /* This function is deprecated, please use sequences instead.
3652 Move a consecutive bunch of insns to a different place in the chain.
3653 The insns to be moved are those between FROM and TO.
3654 They are moved to a new position after the insn AFTER.
3655 AFTER must not be FROM or TO or any insn in between.
3657 This function does not know about SEQUENCEs and hence should not be
3658 called after delay-slot filling has been done. */
3661 reorder_insns_nobb (rtx from, rtx to, rtx after)
3663 /* Splice this bunch out of where it is now. */
3664 if (PREV_INSN (from))
3665 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3667 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3668 if (last_insn == to)
3669 last_insn = PREV_INSN (from);
3670 if (first_insn == from)
3671 first_insn = NEXT_INSN (to);
3673 /* Make the new neighbors point to it and it to them. */
3674 if (NEXT_INSN (after))
3675 PREV_INSN (NEXT_INSN (after)) = to;
3677 NEXT_INSN (to) = NEXT_INSN (after);
3678 PREV_INSN (from) = after;
3679 NEXT_INSN (after) = from;
3680 if (after == last_insn)
3684 /* Same as function above, but take care to update BB boundaries. */
3686 reorder_insns (rtx from, rtx to, rtx after)
3688 rtx prev = PREV_INSN (from);
3689 basic_block bb, bb2;
3691 reorder_insns_nobb (from, to, after);
3693 if (!BARRIER_P (after)
3694 && (bb = BLOCK_FOR_INSN (after)))
3697 bb->flags |= BB_DIRTY;
3699 if (!BARRIER_P (from)
3700 && (bb2 = BLOCK_FOR_INSN (from)))
3702 if (BB_END (bb2) == to)
3703 BB_END (bb2) = prev;
3704 bb2->flags |= BB_DIRTY;
3707 if (BB_END (bb) == after)
3710 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3712 set_block_for_insn (x, bb);
3717 /* Emit insn(s) of given code and pattern
3718 at a specified place within the doubly-linked list.
3720 All of the emit_foo global entry points accept an object
3721 X which is either an insn list or a PATTERN of a single
3724 There are thus a few canonical ways to generate code and
3725 emit it at a specific place in the instruction stream. For
3726 example, consider the instruction named SPOT and the fact that
3727 we would like to emit some instructions before SPOT. We might
3731 ... emit the new instructions ...
3732 insns_head = get_insns ();
3735 emit_insn_before (insns_head, SPOT);
3737 It used to be common to generate SEQUENCE rtl instead, but that
3738 is a relic of the past which no longer occurs. The reason is that
3739 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3740 generated would almost certainly die right after it was created. */
3742 /* Make X be output before the instruction BEFORE. */
3745 emit_insn_before_noloc (rtx x, rtx before)
3750 gcc_assert (before);
3755 switch (GET_CODE (x))
3766 rtx next = NEXT_INSN (insn);
3767 add_insn_before (insn, before);
3773 #ifdef ENABLE_RTL_CHECKING
3780 last = make_insn_raw (x);
3781 add_insn_before (last, before);
3788 /* Make an instruction with body X and code JUMP_INSN
3789 and output it before the instruction BEFORE. */
3792 emit_jump_insn_before_noloc (rtx x, rtx before)
3794 rtx insn, last = NULL_RTX;
3796 gcc_assert (before);
3798 switch (GET_CODE (x))
3809 rtx next = NEXT_INSN (insn);
3810 add_insn_before (insn, before);
3816 #ifdef ENABLE_RTL_CHECKING
3823 last = make_jump_insn_raw (x);
3824 add_insn_before (last, before);
3831 /* Make an instruction with body X and code CALL_INSN
3832 and output it before the instruction BEFORE. */
3835 emit_call_insn_before_noloc (rtx x, rtx before)
3837 rtx last = NULL_RTX, insn;
3839 gcc_assert (before);
3841 switch (GET_CODE (x))
3852 rtx next = NEXT_INSN (insn);
3853 add_insn_before (insn, before);
3859 #ifdef ENABLE_RTL_CHECKING
3866 last = make_call_insn_raw (x);
3867 add_insn_before (last, before);
3874 /* Make an insn of code BARRIER
3875 and output it before the insn BEFORE. */
3878 emit_barrier_before (rtx before)
3880 rtx insn = rtx_alloc (BARRIER);
3882 INSN_UID (insn) = cur_insn_uid++;
3884 add_insn_before (insn, before);
3888 /* Emit the label LABEL before the insn BEFORE. */
3891 emit_label_before (rtx label, rtx before)
3893 /* This can be called twice for the same label as a result of the
3894 confusion that follows a syntax error! So make it harmless. */
3895 if (INSN_UID (label) == 0)
3897 INSN_UID (label) = cur_insn_uid++;
3898 add_insn_before (label, before);
3904 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3907 emit_note_before (int subtype, rtx before)
3909 rtx note = rtx_alloc (NOTE);
3910 INSN_UID (note) = cur_insn_uid++;
3911 #ifndef USE_MAPPED_LOCATION
3912 NOTE_SOURCE_FILE (note) = 0;
3914 NOTE_LINE_NUMBER (note) = subtype;
3915 BLOCK_FOR_INSN (note) = NULL;
3917 add_insn_before (note, before);
3921 /* Helper for emit_insn_after, handles lists of instructions
3924 static rtx emit_insn_after_1 (rtx, rtx);
3927 emit_insn_after_1 (rtx first, rtx after)
3933 if (!BARRIER_P (after)
3934 && (bb = BLOCK_FOR_INSN (after)))
3936 bb->flags |= BB_DIRTY;
3937 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3938 if (!BARRIER_P (last))
3939 set_block_for_insn (last, bb);
3940 if (!BARRIER_P (last))
3941 set_block_for_insn (last, bb);
3942 if (BB_END (bb) == after)
3946 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3949 after_after = NEXT_INSN (after);
3951 NEXT_INSN (after) = first;
3952 PREV_INSN (first) = after;
3953 NEXT_INSN (last) = after_after;
3955 PREV_INSN (after_after) = last;
3957 if (after == last_insn)
3962 /* Make X be output after the insn AFTER. */
3965 emit_insn_after_noloc (rtx x, rtx after)
3974 switch (GET_CODE (x))
3982 last = emit_insn_after_1 (x, after);
3985 #ifdef ENABLE_RTL_CHECKING
3992 last = make_insn_raw (x);
3993 add_insn_after (last, after);
4001 /* Make an insn of code JUMP_INSN with body X
4002 and output it after the insn AFTER. */
4005 emit_jump_insn_after_noloc (rtx x, rtx after)
4011 switch (GET_CODE (x))
4019 last = emit_insn_after_1 (x, after);
4022 #ifdef ENABLE_RTL_CHECKING
4029 last = make_jump_insn_raw (x);
4030 add_insn_after (last, after);
4037 /* Make an instruction with body X and code CALL_INSN
4038 and output it after the instruction AFTER. */
4041 emit_call_insn_after_noloc (rtx x, rtx after)
4047 switch (GET_CODE (x))
4055 last = emit_insn_after_1 (x, after);
4058 #ifdef ENABLE_RTL_CHECKING
4065 last = make_call_insn_raw (x);
4066 add_insn_after (last, after);
4073 /* Make an insn of code BARRIER
4074 and output it after the insn AFTER. */
4077 emit_barrier_after (rtx after)
4079 rtx insn = rtx_alloc (BARRIER);
4081 INSN_UID (insn) = cur_insn_uid++;
4083 add_insn_after (insn, after);
4087 /* Emit the label LABEL after the insn AFTER. */
4090 emit_label_after (rtx label, rtx after)
4092 /* This can be called twice for the same label
4093 as a result of the confusion that follows a syntax error!
4094 So make it harmless. */
4095 if (INSN_UID (label) == 0)
4097 INSN_UID (label) = cur_insn_uid++;
4098 add_insn_after (label, after);
4104 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4107 emit_note_after (int subtype, rtx after)
4109 rtx note = rtx_alloc (NOTE);
4110 INSN_UID (note) = cur_insn_uid++;
4111 #ifndef USE_MAPPED_LOCATION
4112 NOTE_SOURCE_FILE (note) = 0;
4114 NOTE_LINE_NUMBER (note) = subtype;
4115 BLOCK_FOR_INSN (note) = NULL;
4116 add_insn_after (note, after);
4120 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4122 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4124 rtx last = emit_insn_after_noloc (pattern, after);
4126 if (pattern == NULL_RTX || !loc)
4129 after = NEXT_INSN (after);
4132 if (active_insn_p (after) && !INSN_LOCATOR (after))
4133 INSN_LOCATOR (after) = loc;
4136 after = NEXT_INSN (after);
4141 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4143 emit_insn_after (rtx pattern, rtx after)
4146 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4148 return emit_insn_after_noloc (pattern, after);
4151 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4153 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4155 rtx last = emit_jump_insn_after_noloc (pattern, after);
4157 if (pattern == NULL_RTX || !loc)
4160 after = NEXT_INSN (after);
4163 if (active_insn_p (after) && !INSN_LOCATOR (after))
4164 INSN_LOCATOR (after) = loc;
4167 after = NEXT_INSN (after);
4172 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4174 emit_jump_insn_after (rtx pattern, rtx after)
4177 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4179 return emit_jump_insn_after_noloc (pattern, after);
4182 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4184 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4186 rtx last = emit_call_insn_after_noloc (pattern, after);
4188 if (pattern == NULL_RTX || !loc)
4191 after = NEXT_INSN (after);
4194 if (active_insn_p (after) && !INSN_LOCATOR (after))
4195 INSN_LOCATOR (after) = loc;
4198 after = NEXT_INSN (after);
4203 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4205 emit_call_insn_after (rtx pattern, rtx after)
4208 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4210 return emit_call_insn_after_noloc (pattern, after);
4213 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4215 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4217 rtx first = PREV_INSN (before);
4218 rtx last = emit_insn_before_noloc (pattern, before);
4220 if (pattern == NULL_RTX || !loc)
4224 first = get_insns ();
4226 first = NEXT_INSN (first);
4229 if (active_insn_p (first) && !INSN_LOCATOR (first))
4230 INSN_LOCATOR (first) = loc;
4233 first = NEXT_INSN (first);
4238 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4240 emit_insn_before (rtx pattern, rtx before)
4242 if (INSN_P (before))
4243 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4245 return emit_insn_before_noloc (pattern, before);
4248 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4250 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4252 rtx first = PREV_INSN (before);
4253 rtx last = emit_jump_insn_before_noloc (pattern, before);
4255 if (pattern == NULL_RTX)
4258 first = NEXT_INSN (first);
4261 if (active_insn_p (first) && !INSN_LOCATOR (first))
4262 INSN_LOCATOR (first) = loc;
4265 first = NEXT_INSN (first);
4270 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4272 emit_jump_insn_before (rtx pattern, rtx before)
4274 if (INSN_P (before))
4275 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4277 return emit_jump_insn_before_noloc (pattern, before);
4280 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4282 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4284 rtx first = PREV_INSN (before);
4285 rtx last = emit_call_insn_before_noloc (pattern, before);
4287 if (pattern == NULL_RTX)
4290 first = NEXT_INSN (first);
4293 if (active_insn_p (first) && !INSN_LOCATOR (first))
4294 INSN_LOCATOR (first) = loc;
4297 first = NEXT_INSN (first);
4302 /* like emit_call_insn_before_noloc,
4303 but set insn_locator according to before. */
4305 emit_call_insn_before (rtx pattern, rtx before)
4307 if (INSN_P (before))
4308 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4310 return emit_call_insn_before_noloc (pattern, before);
4313 /* Take X and emit it at the end of the doubly-linked
4316 Returns the last insn emitted. */
4321 rtx last = last_insn;
4327 switch (GET_CODE (x))
4338 rtx next = NEXT_INSN (insn);
4345 #ifdef ENABLE_RTL_CHECKING
4352 last = make_insn_raw (x);
4360 /* Make an insn of code JUMP_INSN with pattern X
4361 and add it to the end of the doubly-linked list. */
4364 emit_jump_insn (rtx x)
4366 rtx last = NULL_RTX, insn;
4368 switch (GET_CODE (x))
4379 rtx next = NEXT_INSN (insn);
4386 #ifdef ENABLE_RTL_CHECKING
4393 last = make_jump_insn_raw (x);
4401 /* Make an insn of code CALL_INSN with pattern X
4402 and add it to the end of the doubly-linked list. */
4405 emit_call_insn (rtx x)
4409 switch (GET_CODE (x))
4417 insn = emit_insn (x);
4420 #ifdef ENABLE_RTL_CHECKING
4427 insn = make_call_insn_raw (x);
4435 /* Add the label LABEL to the end of the doubly-linked list. */
4438 emit_label (rtx label)
4440 /* This can be called twice for the same label
4441 as a result of the confusion that follows a syntax error!
4442 So make it harmless. */
4443 if (INSN_UID (label) == 0)
4445 INSN_UID (label) = cur_insn_uid++;
4451 /* Make an insn of code BARRIER
4452 and add it to the end of the doubly-linked list. */
4457 rtx barrier = rtx_alloc (BARRIER);
4458 INSN_UID (barrier) = cur_insn_uid++;
4463 /* Emit a copy of note ORIG. */
4466 emit_note_copy (rtx orig)
4470 note = rtx_alloc (NOTE);
4472 INSN_UID (note) = cur_insn_uid++;
4473 NOTE_DATA (note) = NOTE_DATA (orig);
4474 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4475 BLOCK_FOR_INSN (note) = NULL;
4481 /* Make an insn of code NOTE or type NOTE_NO
4482 and add it to the end of the doubly-linked list. */
4485 emit_note (int note_no)
4489 note = rtx_alloc (NOTE);
4490 INSN_UID (note) = cur_insn_uid++;
4491 NOTE_LINE_NUMBER (note) = note_no;
4492 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4493 BLOCK_FOR_INSN (note) = NULL;
4498 /* Cause next statement to emit a line note even if the line number
4502 force_next_line_note (void)
4504 #ifdef USE_MAPPED_LOCATION
4507 last_location.line = -1;
4511 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4512 note of this type already exists, remove it first. */
4515 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4517 rtx note = find_reg_note (insn, kind, NULL_RTX);
4523 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4524 has multiple sets (some callers assume single_set
4525 means the insn only has one set, when in fact it
4526 means the insn only has one * useful * set). */
4527 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4533 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4534 It serves no useful purpose and breaks eliminate_regs. */
4535 if (GET_CODE (datum) == ASM_OPERANDS)
4545 XEXP (note, 0) = datum;
4549 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4550 return REG_NOTES (insn);
4553 /* Return an indication of which type of insn should have X as a body.
4554 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4556 static enum rtx_code
4557 classify_insn (rtx x)
4561 if (GET_CODE (x) == CALL)
4563 if (GET_CODE (x) == RETURN)
4565 if (GET_CODE (x) == SET)
4567 if (SET_DEST (x) == pc_rtx)
4569 else if (GET_CODE (SET_SRC (x)) == CALL)
4574 if (GET_CODE (x) == PARALLEL)
4577 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4578 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4580 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4581 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4583 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4584 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4590 /* Emit the rtl pattern X as an appropriate kind of insn.
4591 If X is a label, it is simply added into the insn chain. */
4596 enum rtx_code code = classify_insn (x);
4601 return emit_label (x);
4603 return emit_insn (x);
4606 rtx insn = emit_jump_insn (x);
4607 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4608 return emit_barrier ();
4612 return emit_call_insn (x);
4618 /* Space for free sequence stack entries. */
4619 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4621 /* Begin emitting insns to a sequence. If this sequence will contain
4622 something that might cause the compiler to pop arguments to function
4623 calls (because those pops have previously been deferred; see
4624 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4625 before calling this function. That will ensure that the deferred
4626 pops are not accidentally emitted in the middle of this sequence. */
4629 start_sequence (void)
4631 struct sequence_stack *tem;
4633 if (free_sequence_stack != NULL)
4635 tem = free_sequence_stack;
4636 free_sequence_stack = tem->next;
4639 tem = ggc_alloc (sizeof (struct sequence_stack));
4641 tem->next = seq_stack;
4642 tem->first = first_insn;
4643 tem->last = last_insn;
4651 /* Set up the insn chain starting with FIRST as the current sequence,
4652 saving the previously current one. See the documentation for
4653 start_sequence for more information about how to use this function. */
4656 push_to_sequence (rtx first)
4662 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4668 /* Set up the outer-level insn chain
4669 as the current sequence, saving the previously current one. */
4672 push_topmost_sequence (void)
4674 struct sequence_stack *stack, *top = NULL;
4678 for (stack = seq_stack; stack; stack = stack->next)
4681 first_insn = top->first;
4682 last_insn = top->last;
4685 /* After emitting to the outer-level insn chain, update the outer-level
4686 insn chain, and restore the previous saved state. */
4689 pop_topmost_sequence (void)
4691 struct sequence_stack *stack, *top = NULL;
4693 for (stack = seq_stack; stack; stack = stack->next)
4696 top->first = first_insn;
4697 top->last = last_insn;
4702 /* After emitting to a sequence, restore previous saved state.
4704 To get the contents of the sequence just made, you must call
4705 `get_insns' *before* calling here.
4707 If the compiler might have deferred popping arguments while
4708 generating this sequence, and this sequence will not be immediately
4709 inserted into the instruction stream, use do_pending_stack_adjust
4710 before calling get_insns. That will ensure that the deferred
4711 pops are inserted into this sequence, and not into some random
4712 location in the instruction stream. See INHIBIT_DEFER_POP for more
4713 information about deferred popping of arguments. */
4718 struct sequence_stack *tem = seq_stack;
4720 first_insn = tem->first;
4721 last_insn = tem->last;
4722 seq_stack = tem->next;
4724 memset (tem, 0, sizeof (*tem));
4725 tem->next = free_sequence_stack;
4726 free_sequence_stack = tem;
4729 /* Return 1 if currently emitting into a sequence. */
4732 in_sequence_p (void)
4734 return seq_stack != 0;
4737 /* Put the various virtual registers into REGNO_REG_RTX. */
4740 init_virtual_regs (struct emit_status *es)
4742 rtx *ptr = es->x_regno_reg_rtx;
4743 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4744 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4745 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4746 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4747 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4751 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4752 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4753 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4754 static int copy_insn_n_scratches;
4756 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4757 copied an ASM_OPERANDS.
4758 In that case, it is the original input-operand vector. */
4759 static rtvec orig_asm_operands_vector;
4761 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4762 copied an ASM_OPERANDS.
4763 In that case, it is the copied input-operand vector. */
4764 static rtvec copy_asm_operands_vector;
4766 /* Likewise for the constraints vector. */
4767 static rtvec orig_asm_constraints_vector;
4768 static rtvec copy_asm_constraints_vector;
4770 /* Recursively create a new copy of an rtx for copy_insn.
4771 This function differs from copy_rtx in that it handles SCRATCHes and
4772 ASM_OPERANDs properly.
4773 Normally, this function is not used directly; use copy_insn as front end.
4774 However, you could first copy an insn pattern with copy_insn and then use
4775 this function afterwards to properly copy any REG_NOTEs containing
4779 copy_insn_1 (rtx orig)
4784 const char *format_ptr;
4786 code = GET_CODE (orig);
4800 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4805 for (i = 0; i < copy_insn_n_scratches; i++)
4806 if (copy_insn_scratch_in[i] == orig)
4807 return copy_insn_scratch_out[i];
4811 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4812 a LABEL_REF, it isn't sharable. */
4813 if (GET_CODE (XEXP (orig, 0)) == PLUS
4814 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4815 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4819 /* A MEM with a constant address is not sharable. The problem is that
4820 the constant address may need to be reloaded. If the mem is shared,
4821 then reloading one copy of this mem will cause all copies to appear
4822 to have been reloaded. */
4828 /* Copy the various flags, fields, and other information. We assume
4829 that all fields need copying, and then clear the fields that should
4830 not be copied. That is the sensible default behavior, and forces
4831 us to explicitly document why we are *not* copying a flag. */
4832 copy = shallow_copy_rtx (orig);
4834 /* We do not copy the USED flag, which is used as a mark bit during
4835 walks over the RTL. */
4836 RTX_FLAG (copy, used) = 0;
4838 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4841 RTX_FLAG (copy, jump) = 0;
4842 RTX_FLAG (copy, call) = 0;
4843 RTX_FLAG (copy, frame_related) = 0;
4846 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4848 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4849 switch (*format_ptr++)
4852 if (XEXP (orig, i) != NULL)
4853 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4858 if (XVEC (orig, i) == orig_asm_constraints_vector)
4859 XVEC (copy, i) = copy_asm_constraints_vector;
4860 else if (XVEC (orig, i) == orig_asm_operands_vector)
4861 XVEC (copy, i) = copy_asm_operands_vector;
4862 else if (XVEC (orig, i) != NULL)
4864 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4865 for (j = 0; j < XVECLEN (copy, i); j++)
4866 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4877 /* These are left unchanged. */
4884 if (code == SCRATCH)
4886 i = copy_insn_n_scratches++;
4887 gcc_assert (i < MAX_RECOG_OPERANDS);
4888 copy_insn_scratch_in[i] = orig;
4889 copy_insn_scratch_out[i] = copy;
4891 else if (code == ASM_OPERANDS)
4893 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4894 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4895 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4896 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4902 /* Create a new copy of an rtx.
4903 This function differs from copy_rtx in that it handles SCRATCHes and
4904 ASM_OPERANDs properly.
4905 INSN doesn't really have to be a full INSN; it could be just the
4908 copy_insn (rtx insn)
4910 copy_insn_n_scratches = 0;
4911 orig_asm_operands_vector = 0;
4912 orig_asm_constraints_vector = 0;
4913 copy_asm_operands_vector = 0;
4914 copy_asm_constraints_vector = 0;
4915 return copy_insn_1 (insn);
4918 /* Initialize data structures and variables in this file
4919 before generating rtl for each function. */
4924 struct function *f = cfun;
4926 f->emit = ggc_alloc (sizeof (struct emit_status));
4930 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4931 last_location = UNKNOWN_LOCATION;
4932 first_label_num = label_num;
4935 /* Init the tables that describe all the pseudo regs. */
4937 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4939 f->emit->regno_pointer_align
4940 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
4941 * sizeof (unsigned char));
4944 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
4946 /* Put copies of all the hard registers into regno_reg_rtx. */
4947 memcpy (regno_reg_rtx,
4948 static_regno_reg_rtx,
4949 FIRST_PSEUDO_REGISTER * sizeof (rtx));
4951 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4952 init_virtual_regs (f->emit);
4954 /* Indicate that the virtual registers and stack locations are
4956 REG_POINTER (stack_pointer_rtx) = 1;
4957 REG_POINTER (frame_pointer_rtx) = 1;
4958 REG_POINTER (hard_frame_pointer_rtx) = 1;
4959 REG_POINTER (arg_pointer_rtx) = 1;
4961 REG_POINTER (virtual_incoming_args_rtx) = 1;
4962 REG_POINTER (virtual_stack_vars_rtx) = 1;
4963 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4964 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4965 REG_POINTER (virtual_cfa_rtx) = 1;
4967 #ifdef STACK_BOUNDARY
4968 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4969 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4970 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4971 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4973 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4974 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4975 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4976 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4977 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4980 #ifdef INIT_EXPANDERS
4985 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
4988 gen_const_vector (enum machine_mode mode, int constant)
4993 enum machine_mode inner;
4995 units = GET_MODE_NUNITS (mode);
4996 inner = GET_MODE_INNER (mode);
4998 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5000 v = rtvec_alloc (units);
5002 /* We need to call this function after we set the scalar const_tiny_rtx
5004 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5006 for (i = 0; i < units; ++i)
5007 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5009 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5013 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5014 all elements are zero, and the one vector when all elements are one. */
5016 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5018 enum machine_mode inner = GET_MODE_INNER (mode);
5019 int nunits = GET_MODE_NUNITS (mode);
5023 /* Check to see if all of the elements have the same value. */
5024 x = RTVEC_ELT (v, nunits - 1);
5025 for (i = nunits - 2; i >= 0; i--)
5026 if (RTVEC_ELT (v, i) != x)
5029 /* If the values are all the same, check to see if we can use one of the
5030 standard constant vectors. */
5033 if (x == CONST0_RTX (inner))
5034 return CONST0_RTX (mode);
5035 else if (x == CONST1_RTX (inner))
5036 return CONST1_RTX (mode);
5039 return gen_rtx_raw_CONST_VECTOR (mode, v);
5042 /* Create some permanent unique rtl objects shared between all functions.
5043 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5046 init_emit_once (int line_numbers)
5049 enum machine_mode mode;
5050 enum machine_mode double_mode;
5052 /* We need reg_raw_mode, so initialize the modes now. */
5053 init_reg_modes_once ();
5055 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5057 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5058 const_int_htab_eq, NULL);
5060 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5061 const_double_htab_eq, NULL);
5063 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5064 mem_attrs_htab_eq, NULL);
5065 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5066 reg_attrs_htab_eq, NULL);
5068 no_line_numbers = ! line_numbers;
5070 /* Compute the word and byte modes. */
5072 byte_mode = VOIDmode;
5073 word_mode = VOIDmode;
5074 double_mode = VOIDmode;
5076 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5078 mode = GET_MODE_WIDER_MODE (mode))
5080 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5081 && byte_mode == VOIDmode)
5084 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5085 && word_mode == VOIDmode)
5089 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5091 mode = GET_MODE_WIDER_MODE (mode))
5093 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5094 && double_mode == VOIDmode)
5098 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5100 /* Assign register numbers to the globally defined register rtx.
5101 This must be done at runtime because the register number field
5102 is in a union and some compilers can't initialize unions. */
5104 pc_rtx = gen_rtx_PC (VOIDmode);
5105 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5106 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5107 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5108 if (hard_frame_pointer_rtx == 0)
5109 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5110 HARD_FRAME_POINTER_REGNUM);
5111 if (arg_pointer_rtx == 0)
5112 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5113 virtual_incoming_args_rtx =
5114 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5115 virtual_stack_vars_rtx =
5116 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5117 virtual_stack_dynamic_rtx =
5118 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5119 virtual_outgoing_args_rtx =
5120 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5121 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5123 /* Initialize RTL for commonly used hard registers. These are
5124 copied into regno_reg_rtx as we begin to compile each function. */
5125 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5126 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5128 #ifdef INIT_EXPANDERS
5129 /* This is to initialize {init|mark|free}_machine_status before the first
5130 call to push_function_context_to. This is needed by the Chill front
5131 end which calls push_function_context_to before the first call to
5132 init_function_start. */
5136 /* Create the unique rtx's for certain rtx codes and operand values. */
5138 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5139 tries to use these variables. */
5140 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5141 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5142 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5144 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5145 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5146 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5148 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5150 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5151 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5152 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5153 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5154 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5155 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5156 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5158 dconsthalf = dconst1;
5159 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5161 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5163 /* Initialize mathematical constants for constant folding builtins.
5164 These constants need to be given to at least 160 bits precision. */
5165 real_from_string (&dconstsqrt2,
5166 "1.4142135623730950488016887242096980785696718753769480731766797379907");
5167 real_from_string (&dconste,
5168 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5170 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5172 REAL_VALUE_TYPE *r =
5173 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5175 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5177 mode = GET_MODE_WIDER_MODE (mode))
5178 const_tiny_rtx[i][(int) mode] =
5179 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5181 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5183 mode = GET_MODE_WIDER_MODE (mode))
5184 const_tiny_rtx[i][(int) mode] =
5185 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5187 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5189 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5191 mode = GET_MODE_WIDER_MODE (mode))
5192 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5194 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5196 mode = GET_MODE_WIDER_MODE (mode))
5197 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5200 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5202 mode = GET_MODE_WIDER_MODE (mode))
5204 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5205 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5208 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5210 mode = GET_MODE_WIDER_MODE (mode))
5212 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5213 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5216 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5217 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5218 const_tiny_rtx[0][i] = const0_rtx;
5220 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5221 if (STORE_FLAG_VALUE == 1)
5222 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5224 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5225 return_address_pointer_rtx
5226 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5229 #ifdef STATIC_CHAIN_REGNUM
5230 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5232 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5233 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5234 static_chain_incoming_rtx
5235 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5238 static_chain_incoming_rtx = static_chain_rtx;
5242 static_chain_rtx = STATIC_CHAIN;
5244 #ifdef STATIC_CHAIN_INCOMING
5245 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5247 static_chain_incoming_rtx = static_chain_rtx;
5251 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5252 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5255 /* Produce exact duplicate of insn INSN after AFTER.
5256 Care updating of libcall regions if present. */
5259 emit_copy_of_insn_after (rtx insn, rtx after)
5262 rtx note1, note2, link;
5264 switch (GET_CODE (insn))
5267 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5271 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5275 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5276 if (CALL_INSN_FUNCTION_USAGE (insn))
5277 CALL_INSN_FUNCTION_USAGE (new)
5278 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5279 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5280 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5287 /* Update LABEL_NUSES. */
5288 mark_jump_label (PATTERN (new), new, 0);
5290 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5292 /* If the old insn is frame related, then so is the new one. This is
5293 primarily needed for IA-64 unwind info which marks epilogue insns,
5294 which may be duplicated by the basic block reordering code. */
5295 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5297 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5299 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5300 if (REG_NOTE_KIND (link) != REG_LABEL)
5302 if (GET_CODE (link) == EXPR_LIST)
5304 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5305 copy_insn_1 (XEXP (link, 0)), REG_NOTES (new));
5308 = gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5309 XEXP (link, 0), REG_NOTES (new));
5312 /* Fix the libcall sequences. */
5313 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5316 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5318 XEXP (note1, 0) = p;
5319 XEXP (note2, 0) = new;
5321 INSN_CODE (new) = INSN_CODE (insn);
5325 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5327 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5329 if (hard_reg_clobbers[mode][regno])
5330 return hard_reg_clobbers[mode][regno];
5332 return (hard_reg_clobbers[mode][regno] =
5333 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5336 #include "gt-emit-rtl.h"