1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconstm2;
115 REAL_VALUE_TYPE dconsthalf;
117 /* All references to the following fixed hard registers go through
118 these unique rtl objects. On machines where the frame-pointer and
119 arg-pointer are the same register, they use the same unique object.
121 After register allocation, other rtl objects which used to be pseudo-regs
122 may be clobbered to refer to the frame-pointer register.
123 But references that were originally to the frame-pointer can be
124 distinguished from the others because they contain frame_pointer_rtx.
126 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
127 tricky: until register elimination has taken place hard_frame_pointer_rtx
128 should be used if it is being set, and frame_pointer_rtx otherwise. After
129 register elimination hard_frame_pointer_rtx should always be used.
130 On machines where the two registers are same (most) then these are the
133 In an inline procedure, the stack and frame pointer rtxs may not be
134 used for anything else. */
135 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
136 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
137 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
138 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
139 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
141 /* This is used to implement __builtin_return_address for some machines.
142 See for instance the MIPS port. */
143 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
145 /* We make one copy of (const_int C) where C is in
146 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
147 to save space during the compilation and simplify comparisons of
150 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
152 /* A hash table storing CONST_INTs whose absolute value is greater
153 than MAX_SAVED_CONST_INT. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
156 htab_t const_int_htab;
158 /* A hash table storing memory attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
160 htab_t mem_attrs_htab;
162 /* A hash table storing register attribute structures. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
164 htab_t reg_attrs_htab;
166 /* A hash table storing all CONST_DOUBLEs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
168 htab_t const_double_htab;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_location (cfun->emit->x_last_location)
174 #define first_label_num (cfun->emit->x_first_label_num)
176 static rtx make_jump_insn_raw (rtx);
177 static rtx make_call_insn_raw (rtx);
178 static rtx find_line_note (rtx);
179 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
180 static void unshare_all_rtl_1 (rtx);
181 static void unshare_all_decls (tree);
182 static void reset_used_decls (tree);
183 static void mark_label_nuses (rtx);
184 static hashval_t const_int_htab_hash (const void *);
185 static int const_int_htab_eq (const void *, const void *);
186 static hashval_t const_double_htab_hash (const void *);
187 static int const_double_htab_eq (const void *, const void *);
188 static rtx lookup_const_double (rtx);
189 static hashval_t mem_attrs_htab_hash (const void *);
190 static int mem_attrs_htab_eq (const void *, const void *);
191 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
193 static hashval_t reg_attrs_htab_hash (const void *);
194 static int reg_attrs_htab_eq (const void *, const void *);
195 static reg_attrs *get_reg_attrs (tree, int);
196 static tree component_ref_for_mem_expr (tree);
197 static rtx gen_const_vector_0 (enum machine_mode);
198 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
200 /* Probability of the conditional branch currently proceeded by try_split.
201 Set to -1 otherwise. */
202 int split_branch_probability = -1;
204 /* Returns a hash code for X (which is a really a CONST_INT). */
207 const_int_htab_hash (const void *x)
209 return (hashval_t) INTVAL ((struct rtx_def *) x);
212 /* Returns nonzero if the value represented by X (which is really a
213 CONST_INT) is the same as that given by Y (which is really a
217 const_int_htab_eq (const void *x, const void *y)
219 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
222 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
224 const_double_htab_hash (const void *x)
229 if (GET_MODE (value) == VOIDmode)
230 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
233 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h ^= GET_MODE (value);
240 /* Returns nonzero if the value represented by X (really a ...)
241 is the same as that represented by Y (really a ...) */
243 const_double_htab_eq (const void *x, const void *y)
245 rtx a = (rtx)x, b = (rtx)y;
247 if (GET_MODE (a) != GET_MODE (b))
249 if (GET_MODE (a) == VOIDmode)
250 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
251 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
253 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
254 CONST_DOUBLE_REAL_VALUE (b));
257 /* Returns a hash code for X (which is a really a mem_attrs *). */
260 mem_attrs_htab_hash (const void *x)
262 mem_attrs *p = (mem_attrs *) x;
264 return (p->alias ^ (p->align * 1000)
265 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
266 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
270 /* Returns nonzero if the value represented by X (which is really a
271 mem_attrs *) is the same as that given by Y (which is also really a
275 mem_attrs_htab_eq (const void *x, const void *y)
277 mem_attrs *p = (mem_attrs *) x;
278 mem_attrs *q = (mem_attrs *) y;
280 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
281 && p->size == q->size && p->align == q->align);
284 /* Allocate a new mem_attrs structure and insert it into the hash table if
285 one identical to it is not already in the table. We are doing this for
289 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
290 unsigned int align, enum machine_mode mode)
295 /* If everything is the default, we can just return zero.
296 This must match what the corresponding MEM_* macros return when the
297 field is not present. */
298 if (alias == 0 && expr == 0 && offset == 0
300 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
301 && (STRICT_ALIGNMENT && mode != BLKmode
302 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
307 attrs.offset = offset;
311 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
314 *slot = ggc_alloc (sizeof (mem_attrs));
315 memcpy (*slot, &attrs, sizeof (mem_attrs));
321 /* Returns a hash code for X (which is a really a reg_attrs *). */
324 reg_attrs_htab_hash (const void *x)
326 reg_attrs *p = (reg_attrs *) x;
328 return ((p->offset * 1000) ^ (long) p->decl);
331 /* Returns nonzero if the value represented by X (which is really a
332 reg_attrs *) is the same as that given by Y (which is also really a
336 reg_attrs_htab_eq (const void *x, const void *y)
338 reg_attrs *p = (reg_attrs *) x;
339 reg_attrs *q = (reg_attrs *) y;
341 return (p->decl == q->decl && p->offset == q->offset);
343 /* Allocate a new reg_attrs structure and insert it into the hash table if
344 one identical to it is not already in the table. We are doing this for
348 get_reg_attrs (tree decl, int offset)
353 /* If everything is the default, we can just return zero. */
354 if (decl == 0 && offset == 0)
358 attrs.offset = offset;
360 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
363 *slot = ggc_alloc (sizeof (reg_attrs));
364 memcpy (*slot, &attrs, sizeof (reg_attrs));
370 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
371 don't attempt to share with the various global pieces of rtl (such as
372 frame_pointer_rtx). */
375 gen_raw_REG (enum machine_mode mode, int regno)
377 rtx x = gen_rtx_raw_REG (mode, regno);
378 ORIGINAL_REGNO (x) = regno;
382 /* There are some RTL codes that require special attention; the generation
383 functions do the raw handling. If you add to this list, modify
384 special_rtx in gengenrtl.c as well. */
387 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
391 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
392 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
394 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
395 if (const_true_rtx && arg == STORE_FLAG_VALUE)
396 return const_true_rtx;
399 /* Look up the CONST_INT in the hash table. */
400 slot = htab_find_slot_with_hash (const_int_htab, &arg,
401 (hashval_t) arg, INSERT);
403 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
409 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
411 return GEN_INT (trunc_int_for_mode (c, mode));
414 /* CONST_DOUBLEs might be created from pairs of integers, or from
415 REAL_VALUE_TYPEs. Also, their length is known only at run time,
416 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
418 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
419 hash table. If so, return its counterpart; otherwise add it
420 to the hash table and return it. */
422 lookup_const_double (rtx real)
424 void **slot = htab_find_slot (const_double_htab, real, INSERT);
431 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
432 VALUE in mode MODE. */
434 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
436 rtx real = rtx_alloc (CONST_DOUBLE);
437 PUT_MODE (real, mode);
439 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
441 return lookup_const_double (real);
444 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
445 of ints: I0 is the low-order word and I1 is the high-order word.
446 Do not use this routine for non-integer modes; convert to
447 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
450 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
455 if (mode != VOIDmode)
458 if (GET_MODE_CLASS (mode) != MODE_INT
459 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
460 /* We can get a 0 for an error mark. */
461 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
462 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
465 /* We clear out all bits that don't belong in MODE, unless they and
466 our sign bit are all one. So we get either a reasonable negative
467 value or a reasonable unsigned value for this mode. */
468 width = GET_MODE_BITSIZE (mode);
469 if (width < HOST_BITS_PER_WIDE_INT
470 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
471 != ((HOST_WIDE_INT) (-1) << (width - 1))))
472 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
473 else if (width == HOST_BITS_PER_WIDE_INT
474 && ! (i1 == ~0 && i0 < 0))
476 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
477 /* We cannot represent this value as a constant. */
480 /* If this would be an entire word for the target, but is not for
481 the host, then sign-extend on the host so that the number will
482 look the same way on the host that it would on the target.
484 For example, when building a 64 bit alpha hosted 32 bit sparc
485 targeted compiler, then we want the 32 bit unsigned value -1 to be
486 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
487 The latter confuses the sparc backend. */
489 if (width < HOST_BITS_PER_WIDE_INT
490 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
491 i0 |= ((HOST_WIDE_INT) (-1) << width);
493 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
496 ??? Strictly speaking, this is wrong if we create a CONST_INT for
497 a large unsigned constant with the size of MODE being
498 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
499 in a wider mode. In that case we will mis-interpret it as a
502 Unfortunately, the only alternative is to make a CONST_DOUBLE for
503 any constant in any mode if it is an unsigned constant larger
504 than the maximum signed integer in an int on the host. However,
505 doing this will break everyone that always expects to see a
506 CONST_INT for SImode and smaller.
508 We have always been making CONST_INTs in this case, so nothing
509 new is being broken. */
511 if (width <= HOST_BITS_PER_WIDE_INT)
512 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
515 /* If this integer fits in one word, return a CONST_INT. */
516 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
519 /* We use VOIDmode for integers. */
520 value = rtx_alloc (CONST_DOUBLE);
521 PUT_MODE (value, VOIDmode);
523 CONST_DOUBLE_LOW (value) = i0;
524 CONST_DOUBLE_HIGH (value) = i1;
526 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
527 XWINT (value, i) = 0;
529 return lookup_const_double (value);
533 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
535 /* In case the MD file explicitly references the frame pointer, have
536 all such references point to the same frame pointer. This is
537 used during frame pointer elimination to distinguish the explicit
538 references to these registers from pseudos that happened to be
541 If we have eliminated the frame pointer or arg pointer, we will
542 be using it as a normal register, for example as a spill
543 register. In such cases, we might be accessing it in a mode that
544 is not Pmode and therefore cannot use the pre-allocated rtx.
546 Also don't do this when we are making new REGs in reload, since
547 we don't want to get confused with the real pointers. */
549 if (mode == Pmode && !reload_in_progress)
551 if (regno == FRAME_POINTER_REGNUM
552 && (!reload_completed || frame_pointer_needed))
553 return frame_pointer_rtx;
554 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
555 if (regno == HARD_FRAME_POINTER_REGNUM
556 && (!reload_completed || frame_pointer_needed))
557 return hard_frame_pointer_rtx;
559 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
560 if (regno == ARG_POINTER_REGNUM)
561 return arg_pointer_rtx;
563 #ifdef RETURN_ADDRESS_POINTER_REGNUM
564 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
565 return return_address_pointer_rtx;
567 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
568 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
569 return pic_offset_table_rtx;
570 if (regno == STACK_POINTER_REGNUM)
571 return stack_pointer_rtx;
575 /* If the per-function register table has been set up, try to re-use
576 an existing entry in that table to avoid useless generation of RTL.
578 This code is disabled for now until we can fix the various backends
579 which depend on having non-shared hard registers in some cases. Long
580 term we want to re-enable this code as it can significantly cut down
581 on the amount of useless RTL that gets generated.
583 We'll also need to fix some code that runs after reload that wants to
584 set ORIGINAL_REGNO. */
589 && regno < FIRST_PSEUDO_REGISTER
590 && reg_raw_mode[regno] == mode)
591 return regno_reg_rtx[regno];
594 return gen_raw_REG (mode, regno);
598 gen_rtx_MEM (enum machine_mode mode, rtx addr)
600 rtx rt = gen_rtx_raw_MEM (mode, addr);
602 /* This field is not cleared by the mere allocation of the rtx, so
610 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
612 /* This is the most common failure type.
613 Catch it early so we can see who does it. */
614 if ((offset % GET_MODE_SIZE (mode)) != 0)
617 /* This check isn't usable right now because combine will
618 throw arbitrary crap like a CALL into a SUBREG in
619 gen_lowpart_for_combine so we must just eat it. */
621 /* Check for this too. */
622 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
625 return gen_rtx_raw_SUBREG (mode, reg, offset);
628 /* Generate a SUBREG representing the least-significant part of REG if MODE
629 is smaller than mode of REG, otherwise paradoxical SUBREG. */
632 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
634 enum machine_mode inmode;
636 inmode = GET_MODE (reg);
637 if (inmode == VOIDmode)
639 return gen_rtx_SUBREG (mode, reg,
640 subreg_lowpart_offset (mode, inmode));
643 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
645 ** This routine generates an RTX of the size specified by
646 ** <code>, which is an RTX code. The RTX structure is initialized
647 ** from the arguments <element1> through <elementn>, which are
648 ** interpreted according to the specific RTX type's format. The
649 ** special machine mode associated with the rtx (if any) is specified
652 ** gen_rtx can be invoked in a way which resembles the lisp-like
653 ** rtx it will generate. For example, the following rtx structure:
655 ** (plus:QI (mem:QI (reg:SI 1))
656 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
658 ** ...would be generated by the following C code:
660 ** gen_rtx (PLUS, QImode,
661 ** gen_rtx (MEM, QImode,
662 ** gen_rtx (REG, SImode, 1)),
663 ** gen_rtx (MEM, QImode,
664 ** gen_rtx (PLUS, SImode,
665 ** gen_rtx (REG, SImode, 2),
666 ** gen_rtx (REG, SImode, 3)))),
671 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
673 int i; /* Array indices... */
674 const char *fmt; /* Current rtx's format... */
675 rtx rt_val; /* RTX to return to caller... */
683 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
688 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
689 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
691 rt_val = immed_double_const (arg0, arg1, mode);
696 rt_val = gen_rtx_REG (mode, va_arg (p, int));
700 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
704 rt_val = rtx_alloc (code); /* Allocate the storage space. */
705 rt_val->mode = mode; /* Store the machine mode... */
707 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
708 for (i = 0; i < GET_RTX_LENGTH (code); i++)
712 case '0': /* Field with unknown use. Zero it. */
713 X0EXP (rt_val, i) = NULL_RTX;
716 case 'i': /* An integer? */
717 XINT (rt_val, i) = va_arg (p, int);
720 case 'w': /* A wide integer? */
721 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
724 case 's': /* A string? */
725 XSTR (rt_val, i) = va_arg (p, char *);
728 case 'e': /* An expression? */
729 case 'u': /* An insn? Same except when printing. */
730 XEXP (rt_val, i) = va_arg (p, rtx);
733 case 'E': /* An RTX vector? */
734 XVEC (rt_val, i) = va_arg (p, rtvec);
737 case 'b': /* A bitmap? */
738 XBITMAP (rt_val, i) = va_arg (p, bitmap);
741 case 't': /* A tree? */
742 XTREE (rt_val, i) = va_arg (p, tree);
756 /* gen_rtvec (n, [rt1, ..., rtn])
758 ** This routine creates an rtvec and stores within it the
759 ** pointers to rtx's which are its arguments.
764 gen_rtvec (int n, ...)
773 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
775 vector = (rtx *) alloca (n * sizeof (rtx));
777 for (i = 0; i < n; i++)
778 vector[i] = va_arg (p, rtx);
780 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
784 return gen_rtvec_v (save_n, vector);
788 gen_rtvec_v (int n, rtx *argp)
794 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
796 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
798 for (i = 0; i < n; i++)
799 rt_val->elem[i] = *argp++;
804 /* Generate a REG rtx for a new pseudo register of mode MODE.
805 This pseudo is assigned the next sequential register number. */
808 gen_reg_rtx (enum machine_mode mode)
810 struct function *f = cfun;
813 /* Don't let anything called after initial flow analysis create new
818 if (generating_concat_p
819 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
820 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
822 /* For complex modes, don't make a single pseudo.
823 Instead, make a CONCAT of two pseudos.
824 This allows noncontiguous allocation of the real and imaginary parts,
825 which makes much better code. Besides, allocating DCmode
826 pseudos overstrains reload on some machines like the 386. */
827 rtx realpart, imagpart;
828 enum machine_mode partmode = GET_MODE_INNER (mode);
830 realpart = gen_reg_rtx (partmode);
831 imagpart = gen_reg_rtx (partmode);
832 return gen_rtx_CONCAT (mode, realpart, imagpart);
835 /* Make sure regno_pointer_align, and regno_reg_rtx are large
836 enough to have an element for this pseudo reg number. */
838 if (reg_rtx_no == f->emit->regno_pointer_align_length)
840 int old_size = f->emit->regno_pointer_align_length;
844 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
845 memset (new + old_size, 0, old_size);
846 f->emit->regno_pointer_align = (unsigned char *) new;
848 new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx,
849 old_size * 2 * sizeof (rtx));
850 memset (new1 + old_size, 0, old_size * sizeof (rtx));
851 regno_reg_rtx = new1;
853 f->emit->regno_pointer_align_length = old_size * 2;
856 val = gen_raw_REG (mode, reg_rtx_no);
857 regno_reg_rtx[reg_rtx_no++] = val;
861 /* Generate an register with same attributes as REG,
862 but offsetted by OFFSET. */
865 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
867 rtx new = gen_rtx_REG (mode, regno);
868 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
869 REG_OFFSET (reg) + offset);
873 /* Set the decl for MEM to DECL. */
876 set_reg_attrs_from_mem (rtx reg, rtx mem)
878 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
880 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
883 /* Set the register attributes for registers contained in PARM_RTX.
884 Use needed values from memory attributes of MEM. */
887 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
889 if (GET_CODE (parm_rtx) == REG)
890 set_reg_attrs_from_mem (parm_rtx, mem);
891 else if (GET_CODE (parm_rtx) == PARALLEL)
893 /* Check for a NULL entry in the first slot, used to indicate that the
894 parameter goes both on the stack and in registers. */
895 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
896 for (; i < XVECLEN (parm_rtx, 0); i++)
898 rtx x = XVECEXP (parm_rtx, 0, i);
899 if (GET_CODE (XEXP (x, 0)) == REG)
900 REG_ATTRS (XEXP (x, 0))
901 = get_reg_attrs (MEM_EXPR (mem),
902 INTVAL (XEXP (x, 1)));
907 /* Assign the RTX X to declaration T. */
909 set_decl_rtl (tree t, rtx x)
911 DECL_CHECK (t)->decl.rtl = x;
915 /* For register, we maitain the reverse information too. */
916 if (GET_CODE (x) == REG)
917 REG_ATTRS (x) = get_reg_attrs (t, 0);
918 else if (GET_CODE (x) == SUBREG)
919 REG_ATTRS (SUBREG_REG (x))
920 = get_reg_attrs (t, -SUBREG_BYTE (x));
921 if (GET_CODE (x) == CONCAT)
923 if (REG_P (XEXP (x, 0)))
924 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
925 if (REG_P (XEXP (x, 1)))
926 REG_ATTRS (XEXP (x, 1))
927 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
929 if (GET_CODE (x) == PARALLEL)
932 for (i = 0; i < XVECLEN (x, 0); i++)
934 rtx y = XVECEXP (x, 0, i);
935 if (REG_P (XEXP (y, 0)))
936 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
941 /* Identify REG (which may be a CONCAT) as a user register. */
944 mark_user_reg (rtx reg)
946 if (GET_CODE (reg) == CONCAT)
948 REG_USERVAR_P (XEXP (reg, 0)) = 1;
949 REG_USERVAR_P (XEXP (reg, 1)) = 1;
951 else if (GET_CODE (reg) == REG)
952 REG_USERVAR_P (reg) = 1;
957 /* Identify REG as a probable pointer register and show its alignment
958 as ALIGN, if nonzero. */
961 mark_reg_pointer (rtx reg, int align)
963 if (! REG_POINTER (reg))
965 REG_POINTER (reg) = 1;
968 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
970 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
971 /* We can no-longer be sure just how aligned this pointer is */
972 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
975 /* Return 1 plus largest pseudo reg number used in the current function. */
983 /* Return 1 + the largest label number used so far in the current function. */
988 if (last_label_num && label_num == base_label_num)
989 return last_label_num;
993 /* Return first label number used in this function (if any were used). */
996 get_first_label_num (void)
998 return first_label_num;
1001 /* Return the final regno of X, which is a SUBREG of a hard
1004 subreg_hard_regno (rtx x, int check_mode)
1006 enum machine_mode mode = GET_MODE (x);
1007 unsigned int byte_offset, base_regno, final_regno;
1008 rtx reg = SUBREG_REG (x);
1010 /* This is where we attempt to catch illegal subregs
1011 created by the compiler. */
1012 if (GET_CODE (x) != SUBREG
1013 || GET_CODE (reg) != REG)
1015 base_regno = REGNO (reg);
1016 if (base_regno >= FIRST_PSEUDO_REGISTER)
1018 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1020 #ifdef ENABLE_CHECKING
1021 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1022 SUBREG_BYTE (x), mode))
1025 /* Catch non-congruent offsets too. */
1026 byte_offset = SUBREG_BYTE (x);
1027 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1030 final_regno = subreg_regno (x);
1035 /* Return a value representing some low-order bits of X, where the number
1036 of low-order bits is given by MODE. Note that no conversion is done
1037 between floating-point and fixed-point values, rather, the bit
1038 representation is returned.
1040 This function handles the cases in common between gen_lowpart, below,
1041 and two variants in cse.c and combine.c. These are the cases that can
1042 be safely handled at all points in the compilation.
1044 If this is not a case we can handle, return 0. */
1047 gen_lowpart_common (enum machine_mode mode, rtx x)
1049 int msize = GET_MODE_SIZE (mode);
1050 int xsize = GET_MODE_SIZE (GET_MODE (x));
1053 if (GET_MODE (x) == mode)
1056 /* MODE must occupy no more words than the mode of X. */
1057 if (GET_MODE (x) != VOIDmode
1058 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1059 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
1062 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1063 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1064 && GET_MODE (x) != VOIDmode && msize > xsize)
1067 offset = subreg_lowpart_offset (mode, GET_MODE (x));
1069 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1070 && (GET_MODE_CLASS (mode) == MODE_INT
1071 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1073 /* If we are getting the low-order part of something that has been
1074 sign- or zero-extended, we can either just use the object being
1075 extended or make a narrower extension. If we want an even smaller
1076 piece than the size of the object being extended, call ourselves
1079 This case is used mostly by combine and cse. */
1081 if (GET_MODE (XEXP (x, 0)) == mode)
1083 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1084 return gen_lowpart_common (mode, XEXP (x, 0));
1085 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
1086 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1088 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1089 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1090 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1091 else if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
1092 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1093 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1094 from the low-order part of the constant. */
1095 else if ((GET_MODE_CLASS (mode) == MODE_INT
1096 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1097 && GET_MODE (x) == VOIDmode
1098 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1100 /* If MODE is twice the host word size, X is already the desired
1101 representation. Otherwise, if MODE is wider than a word, we can't
1102 do this. If MODE is exactly a word, return just one CONST_INT. */
1104 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1106 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1108 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1109 return (GET_CODE (x) == CONST_INT ? x
1110 : GEN_INT (CONST_DOUBLE_LOW (x)));
1113 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1114 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1115 : CONST_DOUBLE_LOW (x));
1117 /* Sign extend to HOST_WIDE_INT. */
1118 val = trunc_int_for_mode (val, mode);
1120 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1125 /* The floating-point emulator can handle all conversions between
1126 FP and integer operands. This simplifies reload because it
1127 doesn't have to deal with constructs like (subreg:DI
1128 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1129 /* Single-precision floats are always 32-bits and double-precision
1130 floats are always 64-bits. */
1132 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1133 && GET_MODE_BITSIZE (mode) == 32
1134 && GET_CODE (x) == CONST_INT)
1137 long i = INTVAL (x);
1139 real_from_target (&r, &i, mode);
1140 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1142 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1143 && GET_MODE_BITSIZE (mode) == 64
1144 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1145 && GET_MODE (x) == VOIDmode)
1148 HOST_WIDE_INT low, high;
1151 if (GET_CODE (x) == CONST_INT)
1154 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1158 low = CONST_DOUBLE_LOW (x);
1159 high = CONST_DOUBLE_HIGH (x);
1162 if (HOST_BITS_PER_WIDE_INT > 32)
1163 high = low >> 31 >> 1;
1165 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1167 if (WORDS_BIG_ENDIAN)
1168 i[0] = high, i[1] = low;
1170 i[0] = low, i[1] = high;
1172 real_from_target (&r, i, mode);
1173 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1175 else if ((GET_MODE_CLASS (mode) == MODE_INT
1176 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1177 && GET_CODE (x) == CONST_DOUBLE
1178 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1181 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1182 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1184 /* Convert 'r' into an array of four 32-bit words in target word
1186 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1187 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1190 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1193 i[3 - 3 * endian] = 0;
1196 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1197 i[2 - 2 * endian] = 0;
1198 i[3 - 2 * endian] = 0;
1201 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1202 i[3 - 3 * endian] = 0;
1205 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1210 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1212 #if HOST_BITS_PER_WIDE_INT == 32
1213 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1215 if (HOST_BITS_PER_WIDE_INT != 64)
1218 return immed_double_const ((((unsigned long) i[3 * endian])
1219 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1220 (((unsigned long) i[2 - endian])
1221 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1225 /* If MODE is a condition code and X is a CONST_INT, the value of X
1226 must already have been "recognized" by the back-end, and we can
1227 assume that it is valid for this mode. */
1228 else if (GET_MODE_CLASS (mode) == MODE_CC
1229 && GET_CODE (x) == CONST_INT)
1232 /* Otherwise, we can't do this. */
1236 /* Return the constant real or imaginary part (which has mode MODE)
1237 of a complex value X. The IMAGPART_P argument determines whether
1238 the real or complex component should be returned. This function
1239 returns NULL_RTX if the component isn't a constant. */
1242 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1246 if (GET_CODE (x) == MEM
1247 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1249 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1250 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1252 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1253 if (TREE_CODE (part) == REAL_CST
1254 || TREE_CODE (part) == INTEGER_CST)
1255 return expand_expr (part, NULL_RTX, mode, 0);
1261 /* Return the real part (which has mode MODE) of a complex value X.
1262 This always comes at the low address in memory. */
1265 gen_realpart (enum machine_mode mode, rtx x)
1269 /* Handle complex constants. */
1270 part = gen_complex_constant_part (mode, x, 0);
1271 if (part != NULL_RTX)
1274 if (WORDS_BIG_ENDIAN
1275 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1277 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1279 ("can't access real part of complex value in hard register");
1280 else if (WORDS_BIG_ENDIAN)
1281 return gen_highpart (mode, x);
1283 return gen_lowpart (mode, x);
1286 /* Return the imaginary part (which has mode MODE) of a complex value X.
1287 This always comes at the high address in memory. */
1290 gen_imagpart (enum machine_mode mode, rtx x)
1294 /* Handle complex constants. */
1295 part = gen_complex_constant_part (mode, x, 1);
1296 if (part != NULL_RTX)
1299 if (WORDS_BIG_ENDIAN)
1300 return gen_lowpart (mode, x);
1301 else if (! WORDS_BIG_ENDIAN
1302 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1304 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1306 ("can't access imaginary part of complex value in hard register");
1308 return gen_highpart (mode, x);
1311 /* Return 1 iff X, assumed to be a SUBREG,
1312 refers to the real part of the complex value in its containing reg.
1313 Complex values are always stored with the real part in the first word,
1314 regardless of WORDS_BIG_ENDIAN. */
1317 subreg_realpart_p (rtx x)
1319 if (GET_CODE (x) != SUBREG)
1322 return ((unsigned int) SUBREG_BYTE (x)
1323 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1326 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1327 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1328 least-significant part of X.
1329 MODE specifies how big a part of X to return;
1330 it usually should not be larger than a word.
1331 If X is a MEM whose address is a QUEUED, the value may be so also. */
1334 gen_lowpart (enum machine_mode mode, rtx x)
1336 rtx result = gen_lowpart_common (mode, x);
1340 else if (GET_CODE (x) == REG)
1342 /* Must be a hard reg that's not valid in MODE. */
1343 result = gen_lowpart_common (mode, copy_to_reg (x));
1348 else if (GET_CODE (x) == MEM)
1350 /* The only additional case we can do is MEM. */
1353 /* The following exposes the use of "x" to CSE. */
1354 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1355 && SCALAR_INT_MODE_P (GET_MODE (x))
1356 && ! no_new_pseudos)
1357 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1359 if (WORDS_BIG_ENDIAN)
1360 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1361 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1363 if (BYTES_BIG_ENDIAN)
1364 /* Adjust the address so that the address-after-the-data
1366 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1367 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1369 return adjust_address (x, mode, offset);
1371 else if (GET_CODE (x) == ADDRESSOF)
1372 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1377 /* Like `gen_lowpart', but refer to the most significant part.
1378 This is used to access the imaginary part of a complex number. */
1381 gen_highpart (enum machine_mode mode, rtx x)
1383 unsigned int msize = GET_MODE_SIZE (mode);
1386 /* This case loses if X is a subreg. To catch bugs early,
1387 complain if an invalid MODE is used even in other cases. */
1388 if (msize > UNITS_PER_WORD
1389 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1392 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1393 subreg_highpart_offset (mode, GET_MODE (x)));
1395 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1396 the target if we have a MEM. gen_highpart must return a valid operand,
1397 emitting code if necessary to do so. */
1398 if (result != NULL_RTX && GET_CODE (result) == MEM)
1399 result = validize_mem (result);
1406 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1407 be VOIDmode constant. */
1409 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1411 if (GET_MODE (exp) != VOIDmode)
1413 if (GET_MODE (exp) != innermode)
1415 return gen_highpart (outermode, exp);
1417 return simplify_gen_subreg (outermode, exp, innermode,
1418 subreg_highpart_offset (outermode, innermode));
1421 /* Return offset in bytes to get OUTERMODE low part
1422 of the value in mode INNERMODE stored in memory in target format. */
1425 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1427 unsigned int offset = 0;
1428 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1432 if (WORDS_BIG_ENDIAN)
1433 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1434 if (BYTES_BIG_ENDIAN)
1435 offset += difference % UNITS_PER_WORD;
1441 /* Return offset in bytes to get OUTERMODE high part
1442 of the value in mode INNERMODE stored in memory in target format. */
1444 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1446 unsigned int offset = 0;
1447 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1449 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1454 if (! WORDS_BIG_ENDIAN)
1455 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1456 if (! BYTES_BIG_ENDIAN)
1457 offset += difference % UNITS_PER_WORD;
1463 /* Return 1 iff X, assumed to be a SUBREG,
1464 refers to the least significant part of its containing reg.
1465 If X is not a SUBREG, always return 1 (it is its own low part!). */
1468 subreg_lowpart_p (rtx x)
1470 if (GET_CODE (x) != SUBREG)
1472 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1475 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1476 == SUBREG_BYTE (x));
1480 /* Helper routine for all the constant cases of operand_subword.
1481 Some places invoke this directly. */
1484 constant_subword (rtx op, int offset, enum machine_mode mode)
1486 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1489 /* If OP is already an integer word, return it. */
1490 if (GET_MODE_CLASS (mode) == MODE_INT
1491 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1494 /* The output is some bits, the width of the target machine's word.
1495 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1497 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1498 && GET_MODE_CLASS (mode) == MODE_FLOAT
1499 && GET_MODE_BITSIZE (mode) == 64
1500 && GET_CODE (op) == CONST_DOUBLE)
1505 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1506 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1508 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1509 which the words are written depends on the word endianness.
1510 ??? This is a potential portability problem and should
1511 be fixed at some point.
1513 We must exercise caution with the sign bit. By definition there
1514 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1515 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1516 So we explicitly mask and sign-extend as necessary. */
1517 if (BITS_PER_WORD == 32)
1520 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1521 return GEN_INT (val);
1523 #if HOST_BITS_PER_WIDE_INT >= 64
1524 else if (BITS_PER_WORD >= 64 && offset == 0)
1526 val = k[! WORDS_BIG_ENDIAN];
1527 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1528 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1529 return GEN_INT (val);
1532 else if (BITS_PER_WORD == 16)
1534 val = k[offset >> 1];
1535 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1537 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1538 return GEN_INT (val);
1543 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1544 && GET_MODE_CLASS (mode) == MODE_FLOAT
1545 && GET_MODE_BITSIZE (mode) > 64
1546 && GET_CODE (op) == CONST_DOUBLE)
1551 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1552 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1554 if (BITS_PER_WORD == 32)
1557 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1558 return GEN_INT (val);
1560 #if HOST_BITS_PER_WIDE_INT >= 64
1561 else if (BITS_PER_WORD >= 64 && offset <= 1)
1563 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1564 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1565 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1566 return GEN_INT (val);
1573 /* Single word float is a little harder, since single- and double-word
1574 values often do not have the same high-order bits. We have already
1575 verified that we want the only defined word of the single-word value. */
1576 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1577 && GET_MODE_BITSIZE (mode) == 32
1578 && GET_CODE (op) == CONST_DOUBLE)
1583 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1584 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1586 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1588 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1590 if (BITS_PER_WORD == 16)
1592 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1594 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1597 return GEN_INT (val);
1600 /* The only remaining cases that we can handle are integers.
1601 Convert to proper endianness now since these cases need it.
1602 At this point, offset == 0 means the low-order word.
1604 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1605 in general. However, if OP is (const_int 0), we can just return
1608 if (op == const0_rtx)
1611 if (GET_MODE_CLASS (mode) != MODE_INT
1612 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1613 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1616 if (WORDS_BIG_ENDIAN)
1617 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1619 /* Find out which word on the host machine this value is in and get
1620 it from the constant. */
1621 val = (offset / size_ratio == 0
1622 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1623 : (GET_CODE (op) == CONST_INT
1624 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1626 /* Get the value we want into the low bits of val. */
1627 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1628 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1630 val = trunc_int_for_mode (val, word_mode);
1632 return GEN_INT (val);
1635 /* Return subword OFFSET of operand OP.
1636 The word number, OFFSET, is interpreted as the word number starting
1637 at the low-order address. OFFSET 0 is the low-order word if not
1638 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1640 If we cannot extract the required word, we return zero. Otherwise,
1641 an rtx corresponding to the requested word will be returned.
1643 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1644 reload has completed, a valid address will always be returned. After
1645 reload, if a valid address cannot be returned, we return zero.
1647 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1648 it is the responsibility of the caller.
1650 MODE is the mode of OP in case it is a CONST_INT.
1652 ??? This is still rather broken for some cases. The problem for the
1653 moment is that all callers of this thing provide no 'goal mode' to
1654 tell us to work with. This exists because all callers were written
1655 in a word based SUBREG world.
1656 Now use of this function can be deprecated by simplify_subreg in most
1661 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1663 if (mode == VOIDmode)
1664 mode = GET_MODE (op);
1666 if (mode == VOIDmode)
1669 /* If OP is narrower than a word, fail. */
1671 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1674 /* If we want a word outside OP, return zero. */
1676 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1679 /* Form a new MEM at the requested address. */
1680 if (GET_CODE (op) == MEM)
1682 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1684 if (! validate_address)
1687 else if (reload_completed)
1689 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1693 return replace_equiv_address (new, XEXP (new, 0));
1696 /* Rest can be handled by simplify_subreg. */
1697 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1700 /* Similar to `operand_subword', but never return 0. If we can't extract
1701 the required subword, put OP into a register and try again. If that fails,
1702 abort. We always validate the address in this case.
1704 MODE is the mode of OP, in case it is CONST_INT. */
1707 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1709 rtx result = operand_subword (op, offset, 1, mode);
1714 if (mode != BLKmode && mode != VOIDmode)
1716 /* If this is a register which can not be accessed by words, copy it
1717 to a pseudo register. */
1718 if (GET_CODE (op) == REG)
1719 op = copy_to_reg (op);
1721 op = force_reg (mode, op);
1724 result = operand_subword (op, offset, 1, mode);
1731 /* Given a compare instruction, swap the operands.
1732 A test instruction is changed into a compare of 0 against the operand. */
1735 reverse_comparison (rtx insn)
1737 rtx body = PATTERN (insn);
1740 if (GET_CODE (body) == SET)
1741 comp = SET_SRC (body);
1743 comp = SET_SRC (XVECEXP (body, 0, 0));
1745 if (GET_CODE (comp) == COMPARE)
1747 rtx op0 = XEXP (comp, 0);
1748 rtx op1 = XEXP (comp, 1);
1749 XEXP (comp, 0) = op1;
1750 XEXP (comp, 1) = op0;
1754 rtx new = gen_rtx_COMPARE (VOIDmode,
1755 CONST0_RTX (GET_MODE (comp)), comp);
1756 if (GET_CODE (body) == SET)
1757 SET_SRC (body) = new;
1759 SET_SRC (XVECEXP (body, 0, 0)) = new;
1763 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1764 or (2) a component ref of something variable. Represent the later with
1765 a NULL expression. */
1768 component_ref_for_mem_expr (tree ref)
1770 tree inner = TREE_OPERAND (ref, 0);
1772 if (TREE_CODE (inner) == COMPONENT_REF)
1773 inner = component_ref_for_mem_expr (inner);
1776 tree placeholder_ptr = 0;
1778 /* Now remove any conversions: they don't change what the underlying
1779 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1780 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1781 || TREE_CODE (inner) == NON_LVALUE_EXPR
1782 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1783 || TREE_CODE (inner) == SAVE_EXPR
1784 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1785 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1786 inner = find_placeholder (inner, &placeholder_ptr);
1788 inner = TREE_OPERAND (inner, 0);
1790 if (! DECL_P (inner))
1794 if (inner == TREE_OPERAND (ref, 0))
1797 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1798 TREE_OPERAND (ref, 1));
1801 /* Given REF, a MEM, and T, either the type of X or the expression
1802 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1803 if we are making a new object of this type. BITPOS is nonzero if
1804 there is an offset outstanding on T that will be applied later. */
1807 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1808 HOST_WIDE_INT bitpos)
1810 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1811 tree expr = MEM_EXPR (ref);
1812 rtx offset = MEM_OFFSET (ref);
1813 rtx size = MEM_SIZE (ref);
1814 unsigned int align = MEM_ALIGN (ref);
1815 HOST_WIDE_INT apply_bitpos = 0;
1818 /* It can happen that type_for_mode was given a mode for which there
1819 is no language-level type. In which case it returns NULL, which
1824 type = TYPE_P (t) ? t : TREE_TYPE (t);
1826 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1827 wrong answer, as it assumes that DECL_RTL already has the right alias
1828 info. Callers should not set DECL_RTL until after the call to
1829 set_mem_attributes. */
1830 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1833 /* Get the alias set from the expression or type (perhaps using a
1834 front-end routine) and use it. */
1835 alias = get_alias_set (t);
1837 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1838 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1839 RTX_UNCHANGING_P (ref)
1840 |= ((lang_hooks.honor_readonly
1841 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1842 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1844 /* If we are making an object of this type, or if this is a DECL, we know
1845 that it is a scalar if the type is not an aggregate. */
1846 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1847 MEM_SCALAR_P (ref) = 1;
1849 /* We can set the alignment from the type if we are making an object,
1850 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1851 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1852 align = MAX (align, TYPE_ALIGN (type));
1854 /* If the size is known, we can set that. */
1855 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1856 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1858 /* If T is not a type, we may be able to deduce some more information about
1862 maybe_set_unchanging (ref, t);
1863 if (TREE_THIS_VOLATILE (t))
1864 MEM_VOLATILE_P (ref) = 1;
1866 /* Now remove any conversions: they don't change what the underlying
1867 object is. Likewise for SAVE_EXPR. */
1868 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1869 || TREE_CODE (t) == NON_LVALUE_EXPR
1870 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1871 || TREE_CODE (t) == SAVE_EXPR)
1872 t = TREE_OPERAND (t, 0);
1874 /* If this expression can't be addressed (e.g., it contains a reference
1875 to a non-addressable field), show we don't change its alias set. */
1876 if (! can_address_p (t))
1877 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1879 /* If this is a decl, set the attributes of the MEM from it. */
1883 offset = const0_rtx;
1884 apply_bitpos = bitpos;
1885 size = (DECL_SIZE_UNIT (t)
1886 && host_integerp (DECL_SIZE_UNIT (t), 1)
1887 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1888 align = DECL_ALIGN (t);
1891 /* If this is a constant, we know the alignment. */
1892 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1894 align = TYPE_ALIGN (type);
1895 #ifdef CONSTANT_ALIGNMENT
1896 align = CONSTANT_ALIGNMENT (t, align);
1900 /* If this is a field reference and not a bit-field, record it. */
1901 /* ??? There is some information that can be gleened from bit-fields,
1902 such as the word offset in the structure that might be modified.
1903 But skip it for now. */
1904 else if (TREE_CODE (t) == COMPONENT_REF
1905 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1907 expr = component_ref_for_mem_expr (t);
1908 offset = const0_rtx;
1909 apply_bitpos = bitpos;
1910 /* ??? Any reason the field size would be different than
1911 the size we got from the type? */
1914 /* If this is an array reference, look for an outer field reference. */
1915 else if (TREE_CODE (t) == ARRAY_REF)
1917 tree off_tree = size_zero_node;
1921 tree index = TREE_OPERAND (t, 1);
1922 tree array = TREE_OPERAND (t, 0);
1923 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1924 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1925 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1927 /* We assume all arrays have sizes that are a multiple of a byte.
1928 First subtract the lower bound, if any, in the type of the
1929 index, then convert to sizetype and multiply by the size of the
1931 if (low_bound != 0 && ! integer_zerop (low_bound))
1932 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1935 /* If the index has a self-referential type, pass it to a
1936 WITH_RECORD_EXPR; if the component size is, pass our
1937 component to one. */
1938 if (CONTAINS_PLACEHOLDER_P (index))
1939 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t);
1940 if (CONTAINS_PLACEHOLDER_P (unit_size))
1941 unit_size = build (WITH_RECORD_EXPR, sizetype,
1945 = fold (build (PLUS_EXPR, sizetype,
1946 fold (build (MULT_EXPR, sizetype,
1950 t = TREE_OPERAND (t, 0);
1952 while (TREE_CODE (t) == ARRAY_REF);
1958 if (host_integerp (off_tree, 1))
1960 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1961 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1962 align = DECL_ALIGN (t);
1963 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1965 offset = GEN_INT (ioff);
1966 apply_bitpos = bitpos;
1969 else if (TREE_CODE (t) == COMPONENT_REF)
1971 expr = component_ref_for_mem_expr (t);
1972 if (host_integerp (off_tree, 1))
1974 offset = GEN_INT (tree_low_cst (off_tree, 1));
1975 apply_bitpos = bitpos;
1977 /* ??? Any reason the field size would be different than
1978 the size we got from the type? */
1980 else if (flag_argument_noalias > 1
1981 && TREE_CODE (t) == INDIRECT_REF
1982 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1989 /* If this is a Fortran indirect argument reference, record the
1991 else if (flag_argument_noalias > 1
1992 && TREE_CODE (t) == INDIRECT_REF
1993 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2000 /* If we modified OFFSET based on T, then subtract the outstanding
2001 bit position offset. Similarly, increase the size of the accessed
2002 object to contain the negative offset. */
2005 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
2007 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
2010 /* Now set the attributes we computed above. */
2012 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
2014 /* If this is already known to be a scalar or aggregate, we are done. */
2015 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
2018 /* If it is a reference into an aggregate, this is part of an aggregate.
2019 Otherwise we don't know. */
2020 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
2021 || TREE_CODE (t) == ARRAY_RANGE_REF
2022 || TREE_CODE (t) == BIT_FIELD_REF)
2023 MEM_IN_STRUCT_P (ref) = 1;
2027 set_mem_attributes (rtx ref, tree t, int objectp)
2029 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2032 /* Set the decl for MEM to DECL. */
2035 set_mem_attrs_from_reg (rtx mem, rtx reg)
2038 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
2039 GEN_INT (REG_OFFSET (reg)),
2040 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2043 /* Set the alias set of MEM to SET. */
2046 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
2048 #ifdef ENABLE_CHECKING
2049 /* If the new and old alias sets don't conflict, something is wrong. */
2050 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
2054 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
2055 MEM_SIZE (mem), MEM_ALIGN (mem),
2059 /* Set the alignment of MEM to ALIGN bits. */
2062 set_mem_align (rtx mem, unsigned int align)
2064 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2065 MEM_OFFSET (mem), MEM_SIZE (mem), align,
2069 /* Set the expr for MEM to EXPR. */
2072 set_mem_expr (rtx mem, tree expr)
2075 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
2076 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2079 /* Set the offset of MEM to OFFSET. */
2082 set_mem_offset (rtx mem, rtx offset)
2084 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2085 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
2089 /* Set the size of MEM to SIZE. */
2092 set_mem_size (rtx mem, rtx size)
2094 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2095 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
2099 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2100 and its address changed to ADDR. (VOIDmode means don't change the mode.
2101 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2102 returned memory location is required to be valid. The memory
2103 attributes are not changed. */
2106 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
2110 if (GET_CODE (memref) != MEM)
2112 if (mode == VOIDmode)
2113 mode = GET_MODE (memref);
2115 addr = XEXP (memref, 0);
2119 if (reload_in_progress || reload_completed)
2121 if (! memory_address_p (mode, addr))
2125 addr = memory_address (mode, addr);
2128 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2131 new = gen_rtx_MEM (mode, addr);
2132 MEM_COPY_ATTRIBUTES (new, memref);
2136 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2137 way we are changing MEMREF, so we only preserve the alias set. */
2140 change_address (rtx memref, enum machine_mode mode, rtx addr)
2142 rtx new = change_address_1 (memref, mode, addr, 1);
2143 enum machine_mode mmode = GET_MODE (new);
2146 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2147 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2148 (mmode == BLKmode ? BITS_PER_UNIT
2149 : GET_MODE_ALIGNMENT (mmode)),
2155 /* Return a memory reference like MEMREF, but with its mode changed
2156 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2157 nonzero, the memory address is forced to be valid.
2158 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2159 and caller is responsible for adjusting MEMREF base register. */
2162 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2163 int validate, int adjust)
2165 rtx addr = XEXP (memref, 0);
2167 rtx memoffset = MEM_OFFSET (memref);
2169 unsigned int memalign = MEM_ALIGN (memref);
2171 /* ??? Prefer to create garbage instead of creating shared rtl.
2172 This may happen even if offset is nonzero -- consider
2173 (plus (plus reg reg) const_int) -- so do this always. */
2174 addr = copy_rtx (addr);
2178 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2179 object, we can merge it into the LO_SUM. */
2180 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2182 && (unsigned HOST_WIDE_INT) offset
2183 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2184 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2185 plus_constant (XEXP (addr, 1), offset));
2187 addr = plus_constant (addr, offset);
2190 new = change_address_1 (memref, mode, addr, validate);
2192 /* Compute the new values of the memory attributes due to this adjustment.
2193 We add the offsets and update the alignment. */
2195 memoffset = GEN_INT (offset + INTVAL (memoffset));
2197 /* Compute the new alignment by taking the MIN of the alignment and the
2198 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2203 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2205 /* We can compute the size in a number of ways. */
2206 if (GET_MODE (new) != BLKmode)
2207 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2208 else if (MEM_SIZE (memref))
2209 size = plus_constant (MEM_SIZE (memref), -offset);
2211 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2212 memoffset, size, memalign, GET_MODE (new));
2214 /* At some point, we should validate that this offset is within the object,
2215 if all the appropriate values are known. */
2219 /* Return a memory reference like MEMREF, but with its mode changed
2220 to MODE and its address changed to ADDR, which is assumed to be
2221 MEMREF offseted by OFFSET bytes. If VALIDATE is
2222 nonzero, the memory address is forced to be valid. */
2225 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2226 HOST_WIDE_INT offset, int validate)
2228 memref = change_address_1 (memref, VOIDmode, addr, validate);
2229 return adjust_address_1 (memref, mode, offset, validate, 0);
2232 /* Return a memory reference like MEMREF, but whose address is changed by
2233 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2234 known to be in OFFSET (possibly 1). */
2237 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2239 rtx new, addr = XEXP (memref, 0);
2241 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2243 /* At this point we don't know _why_ the address is invalid. It
2244 could have secondary memory refereces, multiplies or anything.
2246 However, if we did go and rearrange things, we can wind up not
2247 being able to recognize the magic around pic_offset_table_rtx.
2248 This stuff is fragile, and is yet another example of why it is
2249 bad to expose PIC machinery too early. */
2250 if (! memory_address_p (GET_MODE (memref), new)
2251 && GET_CODE (addr) == PLUS
2252 && XEXP (addr, 0) == pic_offset_table_rtx)
2254 addr = force_reg (GET_MODE (addr), addr);
2255 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2258 update_temp_slot_address (XEXP (memref, 0), new);
2259 new = change_address_1 (memref, VOIDmode, new, 1);
2261 /* Update the alignment to reflect the offset. Reset the offset, which
2264 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2265 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2270 /* Return a memory reference like MEMREF, but with its address changed to
2271 ADDR. The caller is asserting that the actual piece of memory pointed
2272 to is the same, just the form of the address is being changed, such as
2273 by putting something into a register. */
2276 replace_equiv_address (rtx memref, rtx addr)
2278 /* change_address_1 copies the memory attribute structure without change
2279 and that's exactly what we want here. */
2280 update_temp_slot_address (XEXP (memref, 0), addr);
2281 return change_address_1 (memref, VOIDmode, addr, 1);
2284 /* Likewise, but the reference is not required to be valid. */
2287 replace_equiv_address_nv (rtx memref, rtx addr)
2289 return change_address_1 (memref, VOIDmode, addr, 0);
2292 /* Return a memory reference like MEMREF, but with its mode widened to
2293 MODE and offset by OFFSET. This would be used by targets that e.g.
2294 cannot issue QImode memory operations and have to use SImode memory
2295 operations plus masking logic. */
2298 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2300 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2301 tree expr = MEM_EXPR (new);
2302 rtx memoffset = MEM_OFFSET (new);
2303 unsigned int size = GET_MODE_SIZE (mode);
2305 /* If we don't know what offset we were at within the expression, then
2306 we can't know if we've overstepped the bounds. */
2312 if (TREE_CODE (expr) == COMPONENT_REF)
2314 tree field = TREE_OPERAND (expr, 1);
2316 if (! DECL_SIZE_UNIT (field))
2322 /* Is the field at least as large as the access? If so, ok,
2323 otherwise strip back to the containing structure. */
2324 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2325 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2326 && INTVAL (memoffset) >= 0)
2329 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2335 expr = TREE_OPERAND (expr, 0);
2336 memoffset = (GEN_INT (INTVAL (memoffset)
2337 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2338 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2341 /* Similarly for the decl. */
2342 else if (DECL_P (expr)
2343 && DECL_SIZE_UNIT (expr)
2344 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2345 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2346 && (! memoffset || INTVAL (memoffset) >= 0))
2350 /* The widened memory access overflows the expression, which means
2351 that it could alias another expression. Zap it. */
2358 memoffset = NULL_RTX;
2360 /* The widened memory may alias other stuff, so zap the alias set. */
2361 /* ??? Maybe use get_alias_set on any remaining expression. */
2363 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2364 MEM_ALIGN (new), mode);
2369 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2372 gen_label_rtx (void)
2374 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2375 NULL, label_num++, NULL);
2378 /* For procedure integration. */
2380 /* Install new pointers to the first and last insns in the chain.
2381 Also, set cur_insn_uid to one higher than the last in use.
2382 Used for an inline-procedure after copying the insn chain. */
2385 set_new_first_and_last_insn (rtx first, rtx last)
2393 for (insn = first; insn; insn = NEXT_INSN (insn))
2394 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2399 /* Set the range of label numbers found in the current function.
2400 This is used when belatedly compiling an inline function. */
2403 set_new_first_and_last_label_num (int first, int last)
2405 base_label_num = label_num;
2406 first_label_num = first;
2407 last_label_num = last;
2410 /* Set the last label number found in the current function.
2411 This is used when belatedly compiling an inline function. */
2414 set_new_last_label_num (int last)
2416 base_label_num = label_num;
2417 last_label_num = last;
2420 /* Restore all variables describing the current status from the structure *P.
2421 This is used after a nested function. */
2424 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2429 /* Go through all the RTL insn bodies and copy any invalid shared
2430 structure. This routine should only be called once. */
2433 unshare_all_rtl (tree fndecl, rtx insn)
2437 /* Make sure that virtual parameters are not shared. */
2438 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2439 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2441 /* Make sure that virtual stack slots are not shared. */
2442 unshare_all_decls (DECL_INITIAL (fndecl));
2444 /* Unshare just about everything else. */
2445 unshare_all_rtl_1 (insn);
2447 /* Make sure the addresses of stack slots found outside the insn chain
2448 (such as, in DECL_RTL of a variable) are not shared
2449 with the insn chain.
2451 This special care is necessary when the stack slot MEM does not
2452 actually appear in the insn chain. If it does appear, its address
2453 is unshared from all else at that point. */
2454 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2457 /* Go through all the RTL insn bodies and copy any invalid shared
2458 structure, again. This is a fairly expensive thing to do so it
2459 should be done sparingly. */
2462 unshare_all_rtl_again (rtx insn)
2467 for (p = insn; p; p = NEXT_INSN (p))
2470 reset_used_flags (PATTERN (p));
2471 reset_used_flags (REG_NOTES (p));
2472 reset_used_flags (LOG_LINKS (p));
2475 /* Make sure that virtual stack slots are not shared. */
2476 reset_used_decls (DECL_INITIAL (cfun->decl));
2478 /* Make sure that virtual parameters are not shared. */
2479 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2480 reset_used_flags (DECL_RTL (decl));
2482 reset_used_flags (stack_slot_list);
2484 unshare_all_rtl (cfun->decl, insn);
2487 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2488 Assumes the mark bits are cleared at entry. */
2491 unshare_all_rtl_1 (rtx insn)
2493 for (; insn; insn = NEXT_INSN (insn))
2496 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2497 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2498 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2502 /* Go through all virtual stack slots of a function and copy any
2503 shared structure. */
2505 unshare_all_decls (tree blk)
2509 /* Copy shared decls. */
2510 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2511 if (DECL_RTL_SET_P (t))
2512 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2514 /* Now process sub-blocks. */
2515 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2516 unshare_all_decls (t);
2519 /* Go through all virtual stack slots of a function and mark them as
2522 reset_used_decls (tree blk)
2527 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2528 if (DECL_RTL_SET_P (t))
2529 reset_used_flags (DECL_RTL (t));
2531 /* Now process sub-blocks. */
2532 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2533 reset_used_decls (t);
2536 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2537 placed in the result directly, rather than being copied. MAY_SHARE is
2538 either a MEM of an EXPR_LIST of MEMs. */
2541 copy_most_rtx (rtx orig, rtx may_share)
2546 const char *format_ptr;
2548 if (orig == may_share
2549 || (GET_CODE (may_share) == EXPR_LIST
2550 && in_expr_list_p (may_share, orig)))
2553 code = GET_CODE (orig);
2571 copy = rtx_alloc (code);
2572 PUT_MODE (copy, GET_MODE (orig));
2573 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2574 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2575 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2576 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2577 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2579 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2581 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2583 switch (*format_ptr++)
2586 XEXP (copy, i) = XEXP (orig, i);
2587 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2588 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2592 XEXP (copy, i) = XEXP (orig, i);
2597 XVEC (copy, i) = XVEC (orig, i);
2598 if (XVEC (orig, i) != NULL)
2600 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2601 for (j = 0; j < XVECLEN (copy, i); j++)
2602 XVECEXP (copy, i, j)
2603 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2608 XWINT (copy, i) = XWINT (orig, i);
2613 XINT (copy, i) = XINT (orig, i);
2617 XTREE (copy, i) = XTREE (orig, i);
2622 XSTR (copy, i) = XSTR (orig, i);
2626 /* Copy this through the wide int field; that's safest. */
2627 X0WINT (copy, i) = X0WINT (orig, i);
2637 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2638 Recursively does the same for subexpressions. */
2641 copy_rtx_if_shared (rtx orig)
2646 const char *format_ptr;
2652 code = GET_CODE (x);
2654 /* These types may be freely shared. */
2668 /* SCRATCH must be shared because they represent distinct values. */
2672 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2673 a LABEL_REF, it isn't sharable. */
2674 if (GET_CODE (XEXP (x, 0)) == PLUS
2675 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2676 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2685 /* The chain of insns is not being copied. */
2689 /* A MEM is allowed to be shared if its address is constant.
2691 We used to allow sharing of MEMs which referenced
2692 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2693 that can lose. instantiate_virtual_regs will not unshare
2694 the MEMs, and combine may change the structure of the address
2695 because it looks safe and profitable in one context, but
2696 in some other context it creates unrecognizable RTL. */
2697 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2706 /* This rtx may not be shared. If it has already been seen,
2707 replace it with a copy of itself. */
2709 if (RTX_FLAG (x, used))
2713 copy = rtx_alloc (code);
2715 (sizeof (*copy) - sizeof (copy->fld)
2716 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2720 RTX_FLAG (x, used) = 1;
2722 /* Now scan the subexpressions recursively.
2723 We can store any replaced subexpressions directly into X
2724 since we know X is not shared! Any vectors in X
2725 must be copied if X was copied. */
2727 format_ptr = GET_RTX_FORMAT (code);
2729 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2731 switch (*format_ptr++)
2734 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2738 if (XVEC (x, i) != NULL)
2741 int len = XVECLEN (x, i);
2743 if (copied && len > 0)
2744 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2745 for (j = 0; j < len; j++)
2746 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2754 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2755 to look for shared sub-parts. */
2758 reset_used_flags (rtx x)
2762 const char *format_ptr;
2767 code = GET_CODE (x);
2769 /* These types may be freely shared so we needn't do any resetting
2791 /* The chain of insns is not being copied. */
2798 RTX_FLAG (x, used) = 0;
2800 format_ptr = GET_RTX_FORMAT (code);
2801 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2803 switch (*format_ptr++)
2806 reset_used_flags (XEXP (x, i));
2810 for (j = 0; j < XVECLEN (x, i); j++)
2811 reset_used_flags (XVECEXP (x, i, j));
2817 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2818 Return X or the rtx for the pseudo reg the value of X was copied into.
2819 OTHER must be valid as a SET_DEST. */
2822 make_safe_from (rtx x, rtx other)
2825 switch (GET_CODE (other))
2828 other = SUBREG_REG (other);
2830 case STRICT_LOW_PART:
2833 other = XEXP (other, 0);
2839 if ((GET_CODE (other) == MEM
2841 && GET_CODE (x) != REG
2842 && GET_CODE (x) != SUBREG)
2843 || (GET_CODE (other) == REG
2844 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2845 || reg_mentioned_p (other, x))))
2847 rtx temp = gen_reg_rtx (GET_MODE (x));
2848 emit_move_insn (temp, x);
2854 /* Emission of insns (adding them to the doubly-linked list). */
2856 /* Return the first insn of the current sequence or current function. */
2864 /* Specify a new insn as the first in the chain. */
2867 set_first_insn (rtx insn)
2869 if (PREV_INSN (insn) != 0)
2874 /* Return the last insn emitted in current sequence or current function. */
2877 get_last_insn (void)
2882 /* Specify a new insn as the last in the chain. */
2885 set_last_insn (rtx insn)
2887 if (NEXT_INSN (insn) != 0)
2892 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2895 get_last_insn_anywhere (void)
2897 struct sequence_stack *stack;
2900 for (stack = seq_stack; stack; stack = stack->next)
2901 if (stack->last != 0)
2906 /* Return the first nonnote insn emitted in current sequence or current
2907 function. This routine looks inside SEQUENCEs. */
2910 get_first_nonnote_insn (void)
2912 rtx insn = first_insn;
2916 insn = next_insn (insn);
2917 if (insn == 0 || GET_CODE (insn) != NOTE)
2924 /* Return the last nonnote insn emitted in current sequence or current
2925 function. This routine looks inside SEQUENCEs. */
2928 get_last_nonnote_insn (void)
2930 rtx insn = last_insn;
2934 insn = previous_insn (insn);
2935 if (insn == 0 || GET_CODE (insn) != NOTE)
2942 /* Return a number larger than any instruction's uid in this function. */
2947 return cur_insn_uid;
2950 /* Renumber instructions so that no instruction UIDs are wasted. */
2953 renumber_insns (FILE *stream)
2957 /* If we're not supposed to renumber instructions, don't. */
2958 if (!flag_renumber_insns)
2961 /* If there aren't that many instructions, then it's not really
2962 worth renumbering them. */
2963 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2968 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2971 fprintf (stream, "Renumbering insn %d to %d\n",
2972 INSN_UID (insn), cur_insn_uid);
2973 INSN_UID (insn) = cur_insn_uid++;
2977 /* Return the next insn. If it is a SEQUENCE, return the first insn
2981 next_insn (rtx insn)
2985 insn = NEXT_INSN (insn);
2986 if (insn && GET_CODE (insn) == INSN
2987 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2988 insn = XVECEXP (PATTERN (insn), 0, 0);
2994 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2998 previous_insn (rtx insn)
3002 insn = PREV_INSN (insn);
3003 if (insn && GET_CODE (insn) == INSN
3004 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3005 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3011 /* Return the next insn after INSN that is not a NOTE. This routine does not
3012 look inside SEQUENCEs. */
3015 next_nonnote_insn (rtx insn)
3019 insn = NEXT_INSN (insn);
3020 if (insn == 0 || GET_CODE (insn) != NOTE)
3027 /* Return the previous insn before INSN that is not a NOTE. This routine does
3028 not look inside SEQUENCEs. */
3031 prev_nonnote_insn (rtx insn)
3035 insn = PREV_INSN (insn);
3036 if (insn == 0 || GET_CODE (insn) != NOTE)
3043 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3044 or 0, if there is none. This routine does not look inside
3048 next_real_insn (rtx insn)
3052 insn = NEXT_INSN (insn);
3053 if (insn == 0 || GET_CODE (insn) == INSN
3054 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3061 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3062 or 0, if there is none. This routine does not look inside
3066 prev_real_insn (rtx insn)
3070 insn = PREV_INSN (insn);
3071 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3072 || GET_CODE (insn) == JUMP_INSN)
3079 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3080 This routine does not look inside SEQUENCEs. */
3083 last_call_insn (void)
3087 for (insn = get_last_insn ();
3088 insn && GET_CODE (insn) != CALL_INSN;
3089 insn = PREV_INSN (insn))
3095 /* Find the next insn after INSN that really does something. This routine
3096 does not look inside SEQUENCEs. Until reload has completed, this is the
3097 same as next_real_insn. */
3100 active_insn_p (rtx insn)
3102 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3103 || (GET_CODE (insn) == INSN
3104 && (! reload_completed
3105 || (GET_CODE (PATTERN (insn)) != USE
3106 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3110 next_active_insn (rtx insn)
3114 insn = NEXT_INSN (insn);
3115 if (insn == 0 || active_insn_p (insn))
3122 /* Find the last insn before INSN that really does something. This routine
3123 does not look inside SEQUENCEs. Until reload has completed, this is the
3124 same as prev_real_insn. */
3127 prev_active_insn (rtx insn)
3131 insn = PREV_INSN (insn);
3132 if (insn == 0 || active_insn_p (insn))
3139 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3142 next_label (rtx insn)
3146 insn = NEXT_INSN (insn);
3147 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3154 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3157 prev_label (rtx insn)
3161 insn = PREV_INSN (insn);
3162 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3170 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3171 and REG_CC_USER notes so we can find it. */
3174 link_cc0_insns (rtx insn)
3176 rtx user = next_nonnote_insn (insn);
3178 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3179 user = XVECEXP (PATTERN (user), 0, 0);
3181 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3183 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3186 /* Return the next insn that uses CC0 after INSN, which is assumed to
3187 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3188 applied to the result of this function should yield INSN).
3190 Normally, this is simply the next insn. However, if a REG_CC_USER note
3191 is present, it contains the insn that uses CC0.
3193 Return 0 if we can't find the insn. */
3196 next_cc0_user (rtx insn)
3198 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3201 return XEXP (note, 0);
3203 insn = next_nonnote_insn (insn);
3204 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3205 insn = XVECEXP (PATTERN (insn), 0, 0);
3207 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3213 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3214 note, it is the previous insn. */
3217 prev_cc0_setter (rtx insn)
3219 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3222 return XEXP (note, 0);
3224 insn = prev_nonnote_insn (insn);
3225 if (! sets_cc0_p (PATTERN (insn)))
3232 /* Increment the label uses for all labels present in rtx. */
3235 mark_label_nuses (rtx x)
3241 code = GET_CODE (x);
3242 if (code == LABEL_REF)
3243 LABEL_NUSES (XEXP (x, 0))++;
3245 fmt = GET_RTX_FORMAT (code);
3246 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3249 mark_label_nuses (XEXP (x, i));
3250 else if (fmt[i] == 'E')
3251 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3252 mark_label_nuses (XVECEXP (x, i, j));
3257 /* Try splitting insns that can be split for better scheduling.
3258 PAT is the pattern which might split.
3259 TRIAL is the insn providing PAT.
3260 LAST is nonzero if we should return the last insn of the sequence produced.
3262 If this routine succeeds in splitting, it returns the first or last
3263 replacement insn depending on the value of LAST. Otherwise, it
3264 returns TRIAL. If the insn to be returned can be split, it will be. */
3267 try_split (rtx pat, rtx trial, int last)
3269 rtx before = PREV_INSN (trial);
3270 rtx after = NEXT_INSN (trial);
3271 int has_barrier = 0;
3275 rtx insn_last, insn;
3278 if (any_condjump_p (trial)
3279 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3280 split_branch_probability = INTVAL (XEXP (note, 0));
3281 probability = split_branch_probability;
3283 seq = split_insns (pat, trial);
3285 split_branch_probability = -1;
3287 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3288 We may need to handle this specially. */
3289 if (after && GET_CODE (after) == BARRIER)
3292 after = NEXT_INSN (after);
3298 /* Avoid infinite loop if any insn of the result matches
3299 the original pattern. */
3303 if (INSN_P (insn_last)
3304 && rtx_equal_p (PATTERN (insn_last), pat))
3306 if (!NEXT_INSN (insn_last))
3308 insn_last = NEXT_INSN (insn_last);
3312 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3314 if (GET_CODE (insn) == JUMP_INSN)
3316 mark_jump_label (PATTERN (insn), insn, 0);
3318 if (probability != -1
3319 && any_condjump_p (insn)
3320 && !find_reg_note (insn, REG_BR_PROB, 0))
3322 /* We can preserve the REG_BR_PROB notes only if exactly
3323 one jump is created, otherwise the machine description
3324 is responsible for this step using
3325 split_branch_probability variable. */
3329 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3330 GEN_INT (probability),
3336 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3337 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3338 if (GET_CODE (trial) == CALL_INSN)
3340 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3341 if (GET_CODE (insn) == CALL_INSN)
3343 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3346 *p = CALL_INSN_FUNCTION_USAGE (trial);
3347 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3351 /* Copy notes, particularly those related to the CFG. */
3352 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3354 switch (REG_NOTE_KIND (note))
3358 while (insn != NULL_RTX)
3360 if (GET_CODE (insn) == CALL_INSN
3361 || (flag_non_call_exceptions
3362 && may_trap_p (PATTERN (insn))))
3364 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3367 insn = PREV_INSN (insn);
3373 case REG_ALWAYS_RETURN:
3375 while (insn != NULL_RTX)
3377 if (GET_CODE (insn) == CALL_INSN)
3379 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3382 insn = PREV_INSN (insn);
3386 case REG_NON_LOCAL_GOTO:
3388 while (insn != NULL_RTX)
3390 if (GET_CODE (insn) == JUMP_INSN)
3392 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3395 insn = PREV_INSN (insn);
3404 /* If there are LABELS inside the split insns increment the
3405 usage count so we don't delete the label. */
3406 if (GET_CODE (trial) == INSN)
3409 while (insn != NULL_RTX)
3411 if (GET_CODE (insn) == INSN)
3412 mark_label_nuses (PATTERN (insn));
3414 insn = PREV_INSN (insn);
3418 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3420 delete_insn (trial);
3422 emit_barrier_after (tem);
3424 /* Recursively call try_split for each new insn created; by the
3425 time control returns here that insn will be fully split, so
3426 set LAST and continue from the insn after the one returned.
3427 We can't use next_active_insn here since AFTER may be a note.
3428 Ignore deleted insns, which can be occur if not optimizing. */
3429 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3430 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3431 tem = try_split (PATTERN (tem), tem, 1);
3433 /* Return either the first or the last insn, depending on which was
3436 ? (after ? PREV_INSN (after) : last_insn)
3437 : NEXT_INSN (before);
3440 /* Make and return an INSN rtx, initializing all its slots.
3441 Store PATTERN in the pattern slots. */
3444 make_insn_raw (rtx pattern)
3448 insn = rtx_alloc (INSN);
3450 INSN_UID (insn) = cur_insn_uid++;
3451 PATTERN (insn) = pattern;
3452 INSN_CODE (insn) = -1;
3453 LOG_LINKS (insn) = NULL;
3454 REG_NOTES (insn) = NULL;
3455 INSN_LOCATOR (insn) = 0;
3456 BLOCK_FOR_INSN (insn) = NULL;
3458 #ifdef ENABLE_RTL_CHECKING
3461 && (returnjump_p (insn)
3462 || (GET_CODE (insn) == SET
3463 && SET_DEST (insn) == pc_rtx)))
3465 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3473 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3476 make_jump_insn_raw (rtx pattern)
3480 insn = rtx_alloc (JUMP_INSN);
3481 INSN_UID (insn) = cur_insn_uid++;
3483 PATTERN (insn) = pattern;
3484 INSN_CODE (insn) = -1;
3485 LOG_LINKS (insn) = NULL;
3486 REG_NOTES (insn) = NULL;
3487 JUMP_LABEL (insn) = NULL;
3488 INSN_LOCATOR (insn) = 0;
3489 BLOCK_FOR_INSN (insn) = NULL;
3494 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3497 make_call_insn_raw (rtx pattern)
3501 insn = rtx_alloc (CALL_INSN);
3502 INSN_UID (insn) = cur_insn_uid++;
3504 PATTERN (insn) = pattern;
3505 INSN_CODE (insn) = -1;
3506 LOG_LINKS (insn) = NULL;
3507 REG_NOTES (insn) = NULL;
3508 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3509 INSN_LOCATOR (insn) = 0;
3510 BLOCK_FOR_INSN (insn) = NULL;
3515 /* Add INSN to the end of the doubly-linked list.
3516 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3521 PREV_INSN (insn) = last_insn;
3522 NEXT_INSN (insn) = 0;
3524 if (NULL != last_insn)
3525 NEXT_INSN (last_insn) = insn;
3527 if (NULL == first_insn)
3533 /* Add INSN into the doubly-linked list after insn AFTER. This and
3534 the next should be the only functions called to insert an insn once
3535 delay slots have been filled since only they know how to update a
3539 add_insn_after (rtx insn, rtx after)
3541 rtx next = NEXT_INSN (after);
3544 if (optimize && INSN_DELETED_P (after))
3547 NEXT_INSN (insn) = next;
3548 PREV_INSN (insn) = after;
3552 PREV_INSN (next) = insn;
3553 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3554 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3556 else if (last_insn == after)
3560 struct sequence_stack *stack = seq_stack;
3561 /* Scan all pending sequences too. */
3562 for (; stack; stack = stack->next)
3563 if (after == stack->last)
3573 if (GET_CODE (after) != BARRIER
3574 && GET_CODE (insn) != BARRIER
3575 && (bb = BLOCK_FOR_INSN (after)))
3577 set_block_for_insn (insn, bb);
3579 bb->flags |= BB_DIRTY;
3580 /* Should not happen as first in the BB is always
3581 either NOTE or LABEL. */
3582 if (bb->end == after
3583 /* Avoid clobbering of structure when creating new BB. */
3584 && GET_CODE (insn) != BARRIER
3585 && (GET_CODE (insn) != NOTE
3586 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3590 NEXT_INSN (after) = insn;
3591 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3593 rtx sequence = PATTERN (after);
3594 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3598 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3599 the previous should be the only functions called to insert an insn once
3600 delay slots have been filled since only they know how to update a
3604 add_insn_before (rtx insn, rtx before)
3606 rtx prev = PREV_INSN (before);
3609 if (optimize && INSN_DELETED_P (before))
3612 PREV_INSN (insn) = prev;
3613 NEXT_INSN (insn) = before;
3617 NEXT_INSN (prev) = insn;
3618 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3620 rtx sequence = PATTERN (prev);
3621 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3624 else if (first_insn == before)
3628 struct sequence_stack *stack = seq_stack;
3629 /* Scan all pending sequences too. */
3630 for (; stack; stack = stack->next)
3631 if (before == stack->first)
3633 stack->first = insn;
3641 if (GET_CODE (before) != BARRIER
3642 && GET_CODE (insn) != BARRIER
3643 && (bb = BLOCK_FOR_INSN (before)))
3645 set_block_for_insn (insn, bb);
3647 bb->flags |= BB_DIRTY;
3648 /* Should not happen as first in the BB is always
3649 either NOTE or LABEl. */
3650 if (bb->head == insn
3651 /* Avoid clobbering of structure when creating new BB. */
3652 && GET_CODE (insn) != BARRIER
3653 && (GET_CODE (insn) != NOTE
3654 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3658 PREV_INSN (before) = insn;
3659 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3660 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3663 /* Remove an insn from its doubly-linked list. This function knows how
3664 to handle sequences. */
3666 remove_insn (rtx insn)
3668 rtx next = NEXT_INSN (insn);
3669 rtx prev = PREV_INSN (insn);
3674 NEXT_INSN (prev) = next;
3675 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3677 rtx sequence = PATTERN (prev);
3678 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3681 else if (first_insn == insn)
3685 struct sequence_stack *stack = seq_stack;
3686 /* Scan all pending sequences too. */
3687 for (; stack; stack = stack->next)
3688 if (insn == stack->first)
3690 stack->first = next;
3700 PREV_INSN (next) = prev;
3701 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3702 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3704 else if (last_insn == insn)
3708 struct sequence_stack *stack = seq_stack;
3709 /* Scan all pending sequences too. */
3710 for (; stack; stack = stack->next)
3711 if (insn == stack->last)
3720 if (GET_CODE (insn) != BARRIER
3721 && (bb = BLOCK_FOR_INSN (insn)))
3724 bb->flags |= BB_DIRTY;
3725 if (bb->head == insn)
3727 /* Never ever delete the basic block note without deleting whole
3729 if (GET_CODE (insn) == NOTE)
3733 if (bb->end == insn)
3738 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3741 add_function_usage_to (rtx call_insn, rtx call_fusage)
3743 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3746 /* Put the register usage information on the CALL. If there is already
3747 some usage information, put ours at the end. */
3748 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3752 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3753 link = XEXP (link, 1))
3756 XEXP (link, 1) = call_fusage;
3759 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3762 /* Delete all insns made since FROM.
3763 FROM becomes the new last instruction. */
3766 delete_insns_since (rtx from)
3771 NEXT_INSN (from) = 0;
3775 /* This function is deprecated, please use sequences instead.
3777 Move a consecutive bunch of insns to a different place in the chain.
3778 The insns to be moved are those between FROM and TO.
3779 They are moved to a new position after the insn AFTER.
3780 AFTER must not be FROM or TO or any insn in between.
3782 This function does not know about SEQUENCEs and hence should not be
3783 called after delay-slot filling has been done. */
3786 reorder_insns_nobb (rtx from, rtx to, rtx after)
3788 /* Splice this bunch out of where it is now. */
3789 if (PREV_INSN (from))
3790 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3792 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3793 if (last_insn == to)
3794 last_insn = PREV_INSN (from);
3795 if (first_insn == from)
3796 first_insn = NEXT_INSN (to);
3798 /* Make the new neighbors point to it and it to them. */
3799 if (NEXT_INSN (after))
3800 PREV_INSN (NEXT_INSN (after)) = to;
3802 NEXT_INSN (to) = NEXT_INSN (after);
3803 PREV_INSN (from) = after;
3804 NEXT_INSN (after) = from;
3805 if (after == last_insn)
3809 /* Same as function above, but take care to update BB boundaries. */
3811 reorder_insns (rtx from, rtx to, rtx after)
3813 rtx prev = PREV_INSN (from);
3814 basic_block bb, bb2;
3816 reorder_insns_nobb (from, to, after);
3818 if (GET_CODE (after) != BARRIER
3819 && (bb = BLOCK_FOR_INSN (after)))
3822 bb->flags |= BB_DIRTY;
3824 if (GET_CODE (from) != BARRIER
3825 && (bb2 = BLOCK_FOR_INSN (from)))
3829 bb2->flags |= BB_DIRTY;
3832 if (bb->end == after)
3835 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3836 set_block_for_insn (x, bb);
3840 /* Return the line note insn preceding INSN. */
3843 find_line_note (rtx insn)
3845 if (no_line_numbers)
3848 for (; insn; insn = PREV_INSN (insn))
3849 if (GET_CODE (insn) == NOTE
3850 && NOTE_LINE_NUMBER (insn) >= 0)
3856 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3857 of the moved insns when debugging. This may insert a note between AFTER
3858 and FROM, and another one after TO. */
3861 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
3863 rtx from_line = find_line_note (from);
3864 rtx after_line = find_line_note (after);
3866 reorder_insns (from, to, after);
3868 if (from_line == after_line)
3872 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3873 NOTE_LINE_NUMBER (from_line),
3876 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3877 NOTE_LINE_NUMBER (after_line),
3881 /* Remove unnecessary notes from the instruction stream. */
3884 remove_unnecessary_notes (void)
3886 rtx block_stack = NULL_RTX;
3887 rtx eh_stack = NULL_RTX;
3892 /* We must not remove the first instruction in the function because
3893 the compiler depends on the first instruction being a note. */
3894 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3896 /* Remember what's next. */
3897 next = NEXT_INSN (insn);
3899 /* We're only interested in notes. */
3900 if (GET_CODE (insn) != NOTE)
3903 switch (NOTE_LINE_NUMBER (insn))
3905 case NOTE_INSN_DELETED:
3906 case NOTE_INSN_LOOP_END_TOP_COND:
3910 case NOTE_INSN_EH_REGION_BEG:
3911 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3914 case NOTE_INSN_EH_REGION_END:
3915 /* Too many end notes. */
3916 if (eh_stack == NULL_RTX)
3918 /* Mismatched nesting. */
3919 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3922 eh_stack = XEXP (eh_stack, 1);
3923 free_INSN_LIST_node (tmp);
3926 case NOTE_INSN_BLOCK_BEG:
3927 /* By now, all notes indicating lexical blocks should have
3928 NOTE_BLOCK filled in. */
3929 if (NOTE_BLOCK (insn) == NULL_TREE)
3931 block_stack = alloc_INSN_LIST (insn, block_stack);
3934 case NOTE_INSN_BLOCK_END:
3935 /* Too many end notes. */
3936 if (block_stack == NULL_RTX)
3938 /* Mismatched nesting. */
3939 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3942 block_stack = XEXP (block_stack, 1);
3943 free_INSN_LIST_node (tmp);
3945 /* Scan back to see if there are any non-note instructions
3946 between INSN and the beginning of this block. If not,
3947 then there is no PC range in the generated code that will
3948 actually be in this block, so there's no point in
3949 remembering the existence of the block. */
3950 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3952 /* This block contains a real instruction. Note that we
3953 don't include labels; if the only thing in the block
3954 is a label, then there are still no PC values that
3955 lie within the block. */
3959 /* We're only interested in NOTEs. */
3960 if (GET_CODE (tmp) != NOTE)
3963 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3965 /* We just verified that this BLOCK matches us with
3966 the block_stack check above. Never delete the
3967 BLOCK for the outermost scope of the function; we
3968 can refer to names from that scope even if the
3969 block notes are messed up. */
3970 if (! is_body_block (NOTE_BLOCK (insn))
3971 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3978 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3979 /* There's a nested block. We need to leave the
3980 current block in place since otherwise the debugger
3981 wouldn't be able to show symbols from our block in
3982 the nested block. */
3988 /* Too many begin notes. */
3989 if (block_stack || eh_stack)
3994 /* Emit insn(s) of given code and pattern
3995 at a specified place within the doubly-linked list.
3997 All of the emit_foo global entry points accept an object
3998 X which is either an insn list or a PATTERN of a single
4001 There are thus a few canonical ways to generate code and
4002 emit it at a specific place in the instruction stream. For
4003 example, consider the instruction named SPOT and the fact that
4004 we would like to emit some instructions before SPOT. We might
4008 ... emit the new instructions ...
4009 insns_head = get_insns ();
4012 emit_insn_before (insns_head, SPOT);
4014 It used to be common to generate SEQUENCE rtl instead, but that
4015 is a relic of the past which no longer occurs. The reason is that
4016 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4017 generated would almost certainly die right after it was created. */
4019 /* Make X be output before the instruction BEFORE. */
4022 emit_insn_before (rtx x, rtx before)
4027 #ifdef ENABLE_RTL_CHECKING
4028 if (before == NULL_RTX)
4035 switch (GET_CODE (x))
4046 rtx next = NEXT_INSN (insn);
4047 add_insn_before (insn, before);
4053 #ifdef ENABLE_RTL_CHECKING
4060 last = make_insn_raw (x);
4061 add_insn_before (last, before);
4068 /* Make an instruction with body X and code JUMP_INSN
4069 and output it before the instruction BEFORE. */
4072 emit_jump_insn_before (rtx x, rtx before)
4074 rtx insn, last = NULL_RTX;
4076 #ifdef ENABLE_RTL_CHECKING
4077 if (before == NULL_RTX)
4081 switch (GET_CODE (x))
4092 rtx next = NEXT_INSN (insn);
4093 add_insn_before (insn, before);
4099 #ifdef ENABLE_RTL_CHECKING
4106 last = make_jump_insn_raw (x);
4107 add_insn_before (last, before);
4114 /* Make an instruction with body X and code CALL_INSN
4115 and output it before the instruction BEFORE. */
4118 emit_call_insn_before (rtx x, rtx before)
4120 rtx last = NULL_RTX, insn;
4122 #ifdef ENABLE_RTL_CHECKING
4123 if (before == NULL_RTX)
4127 switch (GET_CODE (x))
4138 rtx next = NEXT_INSN (insn);
4139 add_insn_before (insn, before);
4145 #ifdef ENABLE_RTL_CHECKING
4152 last = make_call_insn_raw (x);
4153 add_insn_before (last, before);
4160 /* Make an insn of code BARRIER
4161 and output it before the insn BEFORE. */
4164 emit_barrier_before (rtx before)
4166 rtx insn = rtx_alloc (BARRIER);
4168 INSN_UID (insn) = cur_insn_uid++;
4170 add_insn_before (insn, before);
4174 /* Emit the label LABEL before the insn BEFORE. */
4177 emit_label_before (rtx label, rtx before)
4179 /* This can be called twice for the same label as a result of the
4180 confusion that follows a syntax error! So make it harmless. */
4181 if (INSN_UID (label) == 0)
4183 INSN_UID (label) = cur_insn_uid++;
4184 add_insn_before (label, before);
4190 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4193 emit_note_before (int subtype, rtx before)
4195 rtx note = rtx_alloc (NOTE);
4196 INSN_UID (note) = cur_insn_uid++;
4197 NOTE_SOURCE_FILE (note) = 0;
4198 NOTE_LINE_NUMBER (note) = subtype;
4199 BLOCK_FOR_INSN (note) = NULL;
4201 add_insn_before (note, before);
4205 /* Helper for emit_insn_after, handles lists of instructions
4208 static rtx emit_insn_after_1 (rtx, rtx);
4211 emit_insn_after_1 (rtx first, rtx after)
4217 if (GET_CODE (after) != BARRIER
4218 && (bb = BLOCK_FOR_INSN (after)))
4220 bb->flags |= BB_DIRTY;
4221 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4222 if (GET_CODE (last) != BARRIER)
4223 set_block_for_insn (last, bb);
4224 if (GET_CODE (last) != BARRIER)
4225 set_block_for_insn (last, bb);
4226 if (bb->end == after)
4230 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4233 after_after = NEXT_INSN (after);
4235 NEXT_INSN (after) = first;
4236 PREV_INSN (first) = after;
4237 NEXT_INSN (last) = after_after;
4239 PREV_INSN (after_after) = last;
4241 if (after == last_insn)
4246 /* Make X be output after the insn AFTER. */
4249 emit_insn_after (rtx x, rtx after)
4253 #ifdef ENABLE_RTL_CHECKING
4254 if (after == NULL_RTX)
4261 switch (GET_CODE (x))
4269 last = emit_insn_after_1 (x, after);
4272 #ifdef ENABLE_RTL_CHECKING
4279 last = make_insn_raw (x);
4280 add_insn_after (last, after);
4287 /* Similar to emit_insn_after, except that line notes are to be inserted so
4288 as to act as if this insn were at FROM. */
4291 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4293 rtx from_line = find_line_note (from);
4294 rtx after_line = find_line_note (after);
4295 rtx insn = emit_insn_after (x, after);
4298 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4299 NOTE_LINE_NUMBER (from_line),
4303 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4304 NOTE_LINE_NUMBER (after_line),
4308 /* Make an insn of code JUMP_INSN with body X
4309 and output it after the insn AFTER. */
4312 emit_jump_insn_after (rtx x, rtx after)
4316 #ifdef ENABLE_RTL_CHECKING
4317 if (after == NULL_RTX)
4321 switch (GET_CODE (x))
4329 last = emit_insn_after_1 (x, after);
4332 #ifdef ENABLE_RTL_CHECKING
4339 last = make_jump_insn_raw (x);
4340 add_insn_after (last, after);
4347 /* Make an instruction with body X and code CALL_INSN
4348 and output it after the instruction AFTER. */
4351 emit_call_insn_after (rtx x, rtx after)
4355 #ifdef ENABLE_RTL_CHECKING
4356 if (after == NULL_RTX)
4360 switch (GET_CODE (x))
4368 last = emit_insn_after_1 (x, after);
4371 #ifdef ENABLE_RTL_CHECKING
4378 last = make_call_insn_raw (x);
4379 add_insn_after (last, after);
4386 /* Make an insn of code BARRIER
4387 and output it after the insn AFTER. */
4390 emit_barrier_after (rtx after)
4392 rtx insn = rtx_alloc (BARRIER);
4394 INSN_UID (insn) = cur_insn_uid++;
4396 add_insn_after (insn, after);
4400 /* Emit the label LABEL after the insn AFTER. */
4403 emit_label_after (rtx label, rtx after)
4405 /* This can be called twice for the same label
4406 as a result of the confusion that follows a syntax error!
4407 So make it harmless. */
4408 if (INSN_UID (label) == 0)
4410 INSN_UID (label) = cur_insn_uid++;
4411 add_insn_after (label, after);
4417 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4420 emit_note_after (int subtype, rtx after)
4422 rtx note = rtx_alloc (NOTE);
4423 INSN_UID (note) = cur_insn_uid++;
4424 NOTE_SOURCE_FILE (note) = 0;
4425 NOTE_LINE_NUMBER (note) = subtype;
4426 BLOCK_FOR_INSN (note) = NULL;
4427 add_insn_after (note, after);
4431 /* Emit a line note for FILE and LINE after the insn AFTER. */
4434 emit_line_note_after (const char *file, int line, rtx after)
4440 if (no_line_numbers)
4446 note = rtx_alloc (NOTE);
4447 INSN_UID (note) = cur_insn_uid++;
4448 NOTE_SOURCE_FILE (note) = file;
4449 NOTE_LINE_NUMBER (note) = line;
4450 BLOCK_FOR_INSN (note) = NULL;
4451 add_insn_after (note, after);
4455 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4457 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4459 rtx last = emit_insn_after (pattern, after);
4461 after = NEXT_INSN (after);
4464 if (active_insn_p (after))
4465 INSN_LOCATOR (after) = loc;
4468 after = NEXT_INSN (after);
4473 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4475 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4477 rtx last = emit_jump_insn_after (pattern, after);
4479 after = NEXT_INSN (after);
4482 if (active_insn_p (after))
4483 INSN_LOCATOR (after) = loc;
4486 after = NEXT_INSN (after);
4491 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4493 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4495 rtx last = emit_call_insn_after (pattern, after);
4497 after = NEXT_INSN (after);
4500 if (active_insn_p (after))
4501 INSN_LOCATOR (after) = loc;
4504 after = NEXT_INSN (after);
4509 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4511 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4513 rtx first = PREV_INSN (before);
4514 rtx last = emit_insn_before (pattern, before);
4516 first = NEXT_INSN (first);
4519 if (active_insn_p (first))
4520 INSN_LOCATOR (first) = loc;
4523 first = NEXT_INSN (first);
4528 /* Take X and emit it at the end of the doubly-linked
4531 Returns the last insn emitted. */
4536 rtx last = last_insn;
4542 switch (GET_CODE (x))
4553 rtx next = NEXT_INSN (insn);
4560 #ifdef ENABLE_RTL_CHECKING
4567 last = make_insn_raw (x);
4575 /* Make an insn of code JUMP_INSN with pattern X
4576 and add it to the end of the doubly-linked list. */
4579 emit_jump_insn (rtx x)
4581 rtx last = NULL_RTX, insn;
4583 switch (GET_CODE (x))
4594 rtx next = NEXT_INSN (insn);
4601 #ifdef ENABLE_RTL_CHECKING
4608 last = make_jump_insn_raw (x);
4616 /* Make an insn of code CALL_INSN with pattern X
4617 and add it to the end of the doubly-linked list. */
4620 emit_call_insn (rtx x)
4624 switch (GET_CODE (x))
4632 insn = emit_insn (x);
4635 #ifdef ENABLE_RTL_CHECKING
4642 insn = make_call_insn_raw (x);
4650 /* Add the label LABEL to the end of the doubly-linked list. */
4653 emit_label (rtx label)
4655 /* This can be called twice for the same label
4656 as a result of the confusion that follows a syntax error!
4657 So make it harmless. */
4658 if (INSN_UID (label) == 0)
4660 INSN_UID (label) = cur_insn_uid++;
4666 /* Make an insn of code BARRIER
4667 and add it to the end of the doubly-linked list. */
4672 rtx barrier = rtx_alloc (BARRIER);
4673 INSN_UID (barrier) = cur_insn_uid++;
4678 /* Make an insn of code NOTE
4679 with data-fields specified by FILE and LINE
4680 and add it to the end of the doubly-linked list,
4681 but only if line-numbers are desired for debugging info. */
4684 emit_line_note (const char *file, int line)
4691 set_file_and_line_for_stmt (file, line);
4693 if (file && last_location.file && !strcmp (file, last_location.file)
4694 && line == last_location.line)
4696 last_location.file = file;
4697 last_location.line = line;
4699 if (no_line_numbers)
4705 note = emit_note (line);
4706 NOTE_SOURCE_FILE (note) = file;
4711 /* Make an insn of code NOTE or type NOTE_NO
4712 and add it to the end of the doubly-linked list. */
4715 emit_note (int note_no)
4719 note = rtx_alloc (NOTE);
4720 INSN_UID (note) = cur_insn_uid++;
4721 NOTE_LINE_NUMBER (note) = note_no;
4722 NOTE_DATA (note) = 0;
4723 BLOCK_FOR_INSN (note) = NULL;
4728 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4731 emit_line_note_force (const char *file, int line)
4733 last_location.line = -1;
4734 return emit_line_note (file, line);
4737 /* Cause next statement to emit a line note even if the line number
4738 has not changed. This is used at the beginning of a function. */
4741 force_next_line_note (void)
4743 last_location.line = -1;
4746 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4747 note of this type already exists, remove it first. */
4750 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4752 rtx note = find_reg_note (insn, kind, NULL_RTX);
4758 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4759 has multiple sets (some callers assume single_set
4760 means the insn only has one set, when in fact it
4761 means the insn only has one * useful * set). */
4762 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4769 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4770 It serves no useful purpose and breaks eliminate_regs. */
4771 if (GET_CODE (datum) == ASM_OPERANDS)
4781 XEXP (note, 0) = datum;
4785 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4786 return REG_NOTES (insn);
4789 /* Return an indication of which type of insn should have X as a body.
4790 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4793 classify_insn (rtx x)
4795 if (GET_CODE (x) == CODE_LABEL)
4797 if (GET_CODE (x) == CALL)
4799 if (GET_CODE (x) == RETURN)
4801 if (GET_CODE (x) == SET)
4803 if (SET_DEST (x) == pc_rtx)
4805 else if (GET_CODE (SET_SRC (x)) == CALL)
4810 if (GET_CODE (x) == PARALLEL)
4813 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4814 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4816 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4817 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4819 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4820 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4826 /* Emit the rtl pattern X as an appropriate kind of insn.
4827 If X is a label, it is simply added into the insn chain. */
4832 enum rtx_code code = classify_insn (x);
4834 if (code == CODE_LABEL)
4835 return emit_label (x);
4836 else if (code == INSN)
4837 return emit_insn (x);
4838 else if (code == JUMP_INSN)
4840 rtx insn = emit_jump_insn (x);
4841 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4842 return emit_barrier ();
4845 else if (code == CALL_INSN)
4846 return emit_call_insn (x);
4851 /* Space for free sequence stack entries. */
4852 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4854 /* Begin emitting insns to a sequence which can be packaged in an
4855 RTL_EXPR. If this sequence will contain something that might cause
4856 the compiler to pop arguments to function calls (because those
4857 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4858 details), use do_pending_stack_adjust before calling this function.
4859 That will ensure that the deferred pops are not accidentally
4860 emitted in the middle of this sequence. */
4863 start_sequence (void)
4865 struct sequence_stack *tem;
4867 if (free_sequence_stack != NULL)
4869 tem = free_sequence_stack;
4870 free_sequence_stack = tem->next;
4873 tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack));
4875 tem->next = seq_stack;
4876 tem->first = first_insn;
4877 tem->last = last_insn;
4878 tem->sequence_rtl_expr = seq_rtl_expr;
4886 /* Similarly, but indicate that this sequence will be placed in T, an
4887 RTL_EXPR. See the documentation for start_sequence for more
4888 information about how to use this function. */
4891 start_sequence_for_rtl_expr (tree t)
4898 /* Set up the insn chain starting with FIRST as the current sequence,
4899 saving the previously current one. See the documentation for
4900 start_sequence for more information about how to use this function. */
4903 push_to_sequence (rtx first)
4909 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4915 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4918 push_to_full_sequence (rtx first, rtx last)
4923 /* We really should have the end of the insn chain here. */
4924 if (last && NEXT_INSN (last))
4928 /* Set up the outer-level insn chain
4929 as the current sequence, saving the previously current one. */
4932 push_topmost_sequence (void)
4934 struct sequence_stack *stack, *top = NULL;
4938 for (stack = seq_stack; stack; stack = stack->next)
4941 first_insn = top->first;
4942 last_insn = top->last;
4943 seq_rtl_expr = top->sequence_rtl_expr;
4946 /* After emitting to the outer-level insn chain, update the outer-level
4947 insn chain, and restore the previous saved state. */
4950 pop_topmost_sequence (void)
4952 struct sequence_stack *stack, *top = NULL;
4954 for (stack = seq_stack; stack; stack = stack->next)
4957 top->first = first_insn;
4958 top->last = last_insn;
4959 /* ??? Why don't we save seq_rtl_expr here? */
4964 /* After emitting to a sequence, restore previous saved state.
4966 To get the contents of the sequence just made, you must call
4967 `get_insns' *before* calling here.
4969 If the compiler might have deferred popping arguments while
4970 generating this sequence, and this sequence will not be immediately
4971 inserted into the instruction stream, use do_pending_stack_adjust
4972 before calling get_insns. That will ensure that the deferred
4973 pops are inserted into this sequence, and not into some random
4974 location in the instruction stream. See INHIBIT_DEFER_POP for more
4975 information about deferred popping of arguments. */
4980 struct sequence_stack *tem = seq_stack;
4982 first_insn = tem->first;
4983 last_insn = tem->last;
4984 seq_rtl_expr = tem->sequence_rtl_expr;
4985 seq_stack = tem->next;
4987 memset (tem, 0, sizeof (*tem));
4988 tem->next = free_sequence_stack;
4989 free_sequence_stack = tem;
4992 /* This works like end_sequence, but records the old sequence in FIRST
4996 end_full_sequence (rtx *first, rtx *last)
4998 *first = first_insn;
5003 /* Return 1 if currently emitting into a sequence. */
5006 in_sequence_p (void)
5008 return seq_stack != 0;
5011 /* Put the various virtual registers into REGNO_REG_RTX. */
5014 init_virtual_regs (struct emit_status *es)
5016 rtx *ptr = es->x_regno_reg_rtx;
5017 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5018 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5019 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5020 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5021 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5025 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5026 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5027 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5028 static int copy_insn_n_scratches;
5030 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5031 copied an ASM_OPERANDS.
5032 In that case, it is the original input-operand vector. */
5033 static rtvec orig_asm_operands_vector;
5035 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5036 copied an ASM_OPERANDS.
5037 In that case, it is the copied input-operand vector. */
5038 static rtvec copy_asm_operands_vector;
5040 /* Likewise for the constraints vector. */
5041 static rtvec orig_asm_constraints_vector;
5042 static rtvec copy_asm_constraints_vector;
5044 /* Recursively create a new copy of an rtx for copy_insn.
5045 This function differs from copy_rtx in that it handles SCRATCHes and
5046 ASM_OPERANDs properly.
5047 Normally, this function is not used directly; use copy_insn as front end.
5048 However, you could first copy an insn pattern with copy_insn and then use
5049 this function afterwards to properly copy any REG_NOTEs containing
5053 copy_insn_1 (rtx orig)
5058 const char *format_ptr;
5060 code = GET_CODE (orig);
5077 for (i = 0; i < copy_insn_n_scratches; i++)
5078 if (copy_insn_scratch_in[i] == orig)
5079 return copy_insn_scratch_out[i];
5083 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5084 a LABEL_REF, it isn't sharable. */
5085 if (GET_CODE (XEXP (orig, 0)) == PLUS
5086 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5087 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5091 /* A MEM with a constant address is not sharable. The problem is that
5092 the constant address may need to be reloaded. If the mem is shared,
5093 then reloading one copy of this mem will cause all copies to appear
5094 to have been reloaded. */
5100 copy = rtx_alloc (code);
5102 /* Copy the various flags, and other information. We assume that
5103 all fields need copying, and then clear the fields that should
5104 not be copied. That is the sensible default behavior, and forces
5105 us to explicitly document why we are *not* copying a flag. */
5106 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
5108 /* We do not copy the USED flag, which is used as a mark bit during
5109 walks over the RTL. */
5110 RTX_FLAG (copy, used) = 0;
5112 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5113 if (GET_RTX_CLASS (code) == 'i')
5115 RTX_FLAG (copy, jump) = 0;
5116 RTX_FLAG (copy, call) = 0;
5117 RTX_FLAG (copy, frame_related) = 0;
5120 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5122 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5124 copy->fld[i] = orig->fld[i];
5125 switch (*format_ptr++)
5128 if (XEXP (orig, i) != NULL)
5129 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5134 if (XVEC (orig, i) == orig_asm_constraints_vector)
5135 XVEC (copy, i) = copy_asm_constraints_vector;
5136 else if (XVEC (orig, i) == orig_asm_operands_vector)
5137 XVEC (copy, i) = copy_asm_operands_vector;
5138 else if (XVEC (orig, i) != NULL)
5140 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5141 for (j = 0; j < XVECLEN (copy, i); j++)
5142 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5153 /* These are left unchanged. */
5161 if (code == SCRATCH)
5163 i = copy_insn_n_scratches++;
5164 if (i >= MAX_RECOG_OPERANDS)
5166 copy_insn_scratch_in[i] = orig;
5167 copy_insn_scratch_out[i] = copy;
5169 else if (code == ASM_OPERANDS)
5171 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5172 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5173 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5174 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5180 /* Create a new copy of an rtx.
5181 This function differs from copy_rtx in that it handles SCRATCHes and
5182 ASM_OPERANDs properly.
5183 INSN doesn't really have to be a full INSN; it could be just the
5186 copy_insn (rtx insn)
5188 copy_insn_n_scratches = 0;
5189 orig_asm_operands_vector = 0;
5190 orig_asm_constraints_vector = 0;
5191 copy_asm_operands_vector = 0;
5192 copy_asm_constraints_vector = 0;
5193 return copy_insn_1 (insn);
5196 /* Initialize data structures and variables in this file
5197 before generating rtl for each function. */
5202 struct function *f = cfun;
5204 f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status));
5207 seq_rtl_expr = NULL;
5209 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5210 last_location.line = 0;
5211 last_location.file = 0;
5212 first_label_num = label_num;
5216 /* Init the tables that describe all the pseudo regs. */
5218 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5220 f->emit->regno_pointer_align
5221 = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5222 * sizeof (unsigned char));
5225 = (rtx *) ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5227 /* Put copies of all the hard registers into regno_reg_rtx. */
5228 memcpy (regno_reg_rtx,
5229 static_regno_reg_rtx,
5230 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5232 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5233 init_virtual_regs (f->emit);
5235 /* Indicate that the virtual registers and stack locations are
5237 REG_POINTER (stack_pointer_rtx) = 1;
5238 REG_POINTER (frame_pointer_rtx) = 1;
5239 REG_POINTER (hard_frame_pointer_rtx) = 1;
5240 REG_POINTER (arg_pointer_rtx) = 1;
5242 REG_POINTER (virtual_incoming_args_rtx) = 1;
5243 REG_POINTER (virtual_stack_vars_rtx) = 1;
5244 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5245 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5246 REG_POINTER (virtual_cfa_rtx) = 1;
5248 #ifdef STACK_BOUNDARY
5249 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5250 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5251 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5252 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5254 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5255 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5256 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5257 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5258 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5261 #ifdef INIT_EXPANDERS
5266 /* Generate the constant 0. */
5269 gen_const_vector_0 (enum machine_mode mode)
5274 enum machine_mode inner;
5276 units = GET_MODE_NUNITS (mode);
5277 inner = GET_MODE_INNER (mode);
5279 v = rtvec_alloc (units);
5281 /* We need to call this function after we to set CONST0_RTX first. */
5282 if (!CONST0_RTX (inner))
5285 for (i = 0; i < units; ++i)
5286 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5288 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5292 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5293 all elements are zero. */
5295 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5297 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5300 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5301 if (RTVEC_ELT (v, i) != inner_zero)
5302 return gen_rtx_raw_CONST_VECTOR (mode, v);
5303 return CONST0_RTX (mode);
5306 /* Create some permanent unique rtl objects shared between all functions.
5307 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5310 init_emit_once (int line_numbers)
5313 enum machine_mode mode;
5314 enum machine_mode double_mode;
5316 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5318 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5319 const_int_htab_eq, NULL);
5321 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5322 const_double_htab_eq, NULL);
5324 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5325 mem_attrs_htab_eq, NULL);
5326 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5327 reg_attrs_htab_eq, NULL);
5329 no_line_numbers = ! line_numbers;
5331 /* Compute the word and byte modes. */
5333 byte_mode = VOIDmode;
5334 word_mode = VOIDmode;
5335 double_mode = VOIDmode;
5337 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5338 mode = GET_MODE_WIDER_MODE (mode))
5340 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5341 && byte_mode == VOIDmode)
5344 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5345 && word_mode == VOIDmode)
5349 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5350 mode = GET_MODE_WIDER_MODE (mode))
5352 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5353 && double_mode == VOIDmode)
5357 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5359 /* Assign register numbers to the globally defined register rtx.
5360 This must be done at runtime because the register number field
5361 is in a union and some compilers can't initialize unions. */
5363 pc_rtx = gen_rtx (PC, VOIDmode);
5364 cc0_rtx = gen_rtx (CC0, VOIDmode);
5365 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5366 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5367 if (hard_frame_pointer_rtx == 0)
5368 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5369 HARD_FRAME_POINTER_REGNUM);
5370 if (arg_pointer_rtx == 0)
5371 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5372 virtual_incoming_args_rtx =
5373 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5374 virtual_stack_vars_rtx =
5375 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5376 virtual_stack_dynamic_rtx =
5377 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5378 virtual_outgoing_args_rtx =
5379 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5380 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5382 /* Initialize RTL for commonly used hard registers. These are
5383 copied into regno_reg_rtx as we begin to compile each function. */
5384 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5385 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5387 #ifdef INIT_EXPANDERS
5388 /* This is to initialize {init|mark|free}_machine_status before the first
5389 call to push_function_context_to. This is needed by the Chill front
5390 end which calls push_function_context_to before the first call to
5391 init_function_start. */
5395 /* Create the unique rtx's for certain rtx codes and operand values. */
5397 /* Don't use gen_rtx here since gen_rtx in this case
5398 tries to use these variables. */
5399 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5400 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5401 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5403 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5404 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5405 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5407 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5409 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5410 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5411 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5412 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5413 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5415 dconsthalf = dconst1;
5418 for (i = 0; i <= 2; i++)
5420 REAL_VALUE_TYPE *r =
5421 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5423 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5424 mode = GET_MODE_WIDER_MODE (mode))
5425 const_tiny_rtx[i][(int) mode] =
5426 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5428 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5430 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5431 mode = GET_MODE_WIDER_MODE (mode))
5432 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5434 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5436 mode = GET_MODE_WIDER_MODE (mode))
5437 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5440 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5442 mode = GET_MODE_WIDER_MODE (mode))
5443 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5445 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5447 mode = GET_MODE_WIDER_MODE (mode))
5448 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5450 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5451 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5452 const_tiny_rtx[0][i] = const0_rtx;
5454 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5455 if (STORE_FLAG_VALUE == 1)
5456 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5458 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5459 return_address_pointer_rtx
5460 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5464 struct_value_rtx = STRUCT_VALUE;
5466 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5469 #ifdef STRUCT_VALUE_INCOMING
5470 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5472 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5473 struct_value_incoming_rtx
5474 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5476 struct_value_incoming_rtx = struct_value_rtx;
5480 #ifdef STATIC_CHAIN_REGNUM
5481 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5483 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5484 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5485 static_chain_incoming_rtx
5486 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5489 static_chain_incoming_rtx = static_chain_rtx;
5493 static_chain_rtx = STATIC_CHAIN;
5495 #ifdef STATIC_CHAIN_INCOMING
5496 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5498 static_chain_incoming_rtx = static_chain_rtx;
5502 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5503 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5506 /* Query and clear/ restore no_line_numbers. This is used by the
5507 switch / case handling in stmt.c to give proper line numbers in
5508 warnings about unreachable code. */
5511 force_line_numbers (void)
5513 int old = no_line_numbers;
5515 no_line_numbers = 0;
5517 force_next_line_note ();
5522 restore_line_number_status (int old_value)
5524 no_line_numbers = old_value;
5527 /* Produce exact duplicate of insn INSN after AFTER.
5528 Care updating of libcall regions if present. */
5531 emit_copy_of_insn_after (rtx insn, rtx after)
5534 rtx note1, note2, link;
5536 switch (GET_CODE (insn))
5539 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5543 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5547 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5548 if (CALL_INSN_FUNCTION_USAGE (insn))
5549 CALL_INSN_FUNCTION_USAGE (new)
5550 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5551 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5552 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5559 /* Update LABEL_NUSES. */
5560 mark_jump_label (PATTERN (new), new, 0);
5562 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5564 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5566 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5567 if (REG_NOTE_KIND (link) != REG_LABEL)
5569 if (GET_CODE (link) == EXPR_LIST)
5571 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5576 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5581 /* Fix the libcall sequences. */
5582 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5585 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5587 XEXP (note1, 0) = p;
5588 XEXP (note2, 0) = new;
5590 INSN_CODE (new) = INSN_CODE (insn);
5594 #include "gt-emit-rtl.h"