1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
108 REAL_VALUE_TYPE dconst0;
109 REAL_VALUE_TYPE dconst1;
110 REAL_VALUE_TYPE dconst2;
111 REAL_VALUE_TYPE dconst3;
112 REAL_VALUE_TYPE dconst10;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconstm2;
115 REAL_VALUE_TYPE dconsthalf;
116 REAL_VALUE_TYPE dconstthird;
117 REAL_VALUE_TYPE dconstpi;
118 REAL_VALUE_TYPE dconste;
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_location (cfun->emit->x_last_location)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw (rtx);
178 static rtx make_call_insn_raw (rtx);
179 static rtx find_line_note (rtx);
180 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
181 static void unshare_all_decls (tree);
182 static void reset_used_decls (tree);
183 static void mark_label_nuses (rtx);
184 static hashval_t const_int_htab_hash (const void *);
185 static int const_int_htab_eq (const void *, const void *);
186 static hashval_t const_double_htab_hash (const void *);
187 static int const_double_htab_eq (const void *, const void *);
188 static rtx lookup_const_double (rtx);
189 static hashval_t mem_attrs_htab_hash (const void *);
190 static int mem_attrs_htab_eq (const void *, const void *);
191 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
193 static hashval_t reg_attrs_htab_hash (const void *);
194 static int reg_attrs_htab_eq (const void *, const void *);
195 static reg_attrs *get_reg_attrs (tree, int);
196 static tree component_ref_for_mem_expr (tree);
197 static rtx gen_const_vector_0 (enum machine_mode);
198 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
199 static void copy_rtx_if_shared_1 (rtx *orig);
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability = -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (const void *x)
210 return (hashval_t) INTVAL ((rtx) x);
213 /* Returns nonzero if the value represented by X (which is really a
214 CONST_INT) is the same as that given by Y (which is really a
218 const_int_htab_eq (const void *x, const void *y)
220 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
223 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
225 const_double_htab_hash (const void *x)
230 if (GET_MODE (value) == VOIDmode)
231 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
234 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
235 /* MODE is used in the comparison, so it should be in the hash. */
236 h ^= GET_MODE (value);
241 /* Returns nonzero if the value represented by X (really a ...)
242 is the same as that represented by Y (really a ...) */
244 const_double_htab_eq (const void *x, const void *y)
246 rtx a = (rtx)x, b = (rtx)y;
248 if (GET_MODE (a) != GET_MODE (b))
250 if (GET_MODE (a) == VOIDmode)
251 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
252 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
254 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
255 CONST_DOUBLE_REAL_VALUE (b));
258 /* Returns a hash code for X (which is a really a mem_attrs *). */
261 mem_attrs_htab_hash (const void *x)
263 mem_attrs *p = (mem_attrs *) x;
265 return (p->alias ^ (p->align * 1000)
266 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
267 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
271 /* Returns nonzero if the value represented by X (which is really a
272 mem_attrs *) is the same as that given by Y (which is also really a
276 mem_attrs_htab_eq (const void *x, const void *y)
278 mem_attrs *p = (mem_attrs *) x;
279 mem_attrs *q = (mem_attrs *) y;
281 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
282 && p->size == q->size && p->align == q->align);
285 /* Allocate a new mem_attrs structure and insert it into the hash table if
286 one identical to it is not already in the table. We are doing this for
290 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
291 unsigned int align, enum machine_mode mode)
296 /* If everything is the default, we can just return zero.
297 This must match what the corresponding MEM_* macros return when the
298 field is not present. */
299 if (alias == 0 && expr == 0 && offset == 0
301 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
302 && (STRICT_ALIGNMENT && mode != BLKmode
303 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
308 attrs.offset = offset;
312 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
315 *slot = ggc_alloc (sizeof (mem_attrs));
316 memcpy (*slot, &attrs, sizeof (mem_attrs));
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x)
327 reg_attrs *p = (reg_attrs *) x;
329 return ((p->offset * 1000) ^ (long) p->decl);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x, const void *y)
339 reg_attrs *p = (reg_attrs *) x;
340 reg_attrs *q = (reg_attrs *) y;
342 return (p->decl == q->decl && p->offset == q->offset);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl, int offset)
354 /* If everything is the default, we can just return zero. */
355 if (decl == 0 && offset == 0)
359 attrs.offset = offset;
361 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
364 *slot = ggc_alloc (sizeof (reg_attrs));
365 memcpy (*slot, &attrs, sizeof (reg_attrs));
371 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
372 don't attempt to share with the various global pieces of rtl (such as
373 frame_pointer_rtx). */
376 gen_raw_REG (enum machine_mode mode, int regno)
378 rtx x = gen_rtx_raw_REG (mode, regno);
379 ORIGINAL_REGNO (x) = regno;
383 /* There are some RTL codes that require special attention; the generation
384 functions do the raw handling. If you add to this list, modify
385 special_rtx in gengenrtl.c as well. */
388 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
392 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
393 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
395 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
396 if (const_true_rtx && arg == STORE_FLAG_VALUE)
397 return const_true_rtx;
400 /* Look up the CONST_INT in the hash table. */
401 slot = htab_find_slot_with_hash (const_int_htab, &arg,
402 (hashval_t) arg, INSERT);
404 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
410 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
412 return GEN_INT (trunc_int_for_mode (c, mode));
415 /* CONST_DOUBLEs might be created from pairs of integers, or from
416 REAL_VALUE_TYPEs. Also, their length is known only at run time,
417 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
419 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
420 hash table. If so, return its counterpart; otherwise add it
421 to the hash table and return it. */
423 lookup_const_double (rtx real)
425 void **slot = htab_find_slot (const_double_htab, real, INSERT);
432 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
433 VALUE in mode MODE. */
435 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
437 rtx real = rtx_alloc (CONST_DOUBLE);
438 PUT_MODE (real, mode);
440 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
442 return lookup_const_double (real);
445 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
446 of ints: I0 is the low-order word and I1 is the high-order word.
447 Do not use this routine for non-integer modes; convert to
448 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
451 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
456 if (mode != VOIDmode)
459 if (GET_MODE_CLASS (mode) != MODE_INT
460 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
461 /* We can get a 0 for an error mark. */
462 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
463 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
466 /* We clear out all bits that don't belong in MODE, unless they and
467 our sign bit are all one. So we get either a reasonable negative
468 value or a reasonable unsigned value for this mode. */
469 width = GET_MODE_BITSIZE (mode);
470 if (width < HOST_BITS_PER_WIDE_INT
471 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
472 != ((HOST_WIDE_INT) (-1) << (width - 1))))
473 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
474 else if (width == HOST_BITS_PER_WIDE_INT
475 && ! (i1 == ~0 && i0 < 0))
477 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
478 /* We cannot represent this value as a constant. */
481 /* If this would be an entire word for the target, but is not for
482 the host, then sign-extend on the host so that the number will
483 look the same way on the host that it would on the target.
485 For example, when building a 64 bit alpha hosted 32 bit sparc
486 targeted compiler, then we want the 32 bit unsigned value -1 to be
487 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
488 The latter confuses the sparc backend. */
490 if (width < HOST_BITS_PER_WIDE_INT
491 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
492 i0 |= ((HOST_WIDE_INT) (-1) << width);
494 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
497 ??? Strictly speaking, this is wrong if we create a CONST_INT for
498 a large unsigned constant with the size of MODE being
499 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
500 in a wider mode. In that case we will mis-interpret it as a
503 Unfortunately, the only alternative is to make a CONST_DOUBLE for
504 any constant in any mode if it is an unsigned constant larger
505 than the maximum signed integer in an int on the host. However,
506 doing this will break everyone that always expects to see a
507 CONST_INT for SImode and smaller.
509 We have always been making CONST_INTs in this case, so nothing
510 new is being broken. */
512 if (width <= HOST_BITS_PER_WIDE_INT)
513 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
516 /* If this integer fits in one word, return a CONST_INT. */
517 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
520 /* We use VOIDmode for integers. */
521 value = rtx_alloc (CONST_DOUBLE);
522 PUT_MODE (value, VOIDmode);
524 CONST_DOUBLE_LOW (value) = i0;
525 CONST_DOUBLE_HIGH (value) = i1;
527 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
528 XWINT (value, i) = 0;
530 return lookup_const_double (value);
534 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
536 /* In case the MD file explicitly references the frame pointer, have
537 all such references point to the same frame pointer. This is
538 used during frame pointer elimination to distinguish the explicit
539 references to these registers from pseudos that happened to be
542 If we have eliminated the frame pointer or arg pointer, we will
543 be using it as a normal register, for example as a spill
544 register. In such cases, we might be accessing it in a mode that
545 is not Pmode and therefore cannot use the pre-allocated rtx.
547 Also don't do this when we are making new REGs in reload, since
548 we don't want to get confused with the real pointers. */
550 if (mode == Pmode && !reload_in_progress)
552 if (regno == FRAME_POINTER_REGNUM
553 && (!reload_completed || frame_pointer_needed))
554 return frame_pointer_rtx;
555 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
556 if (regno == HARD_FRAME_POINTER_REGNUM
557 && (!reload_completed || frame_pointer_needed))
558 return hard_frame_pointer_rtx;
560 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
561 if (regno == ARG_POINTER_REGNUM)
562 return arg_pointer_rtx;
564 #ifdef RETURN_ADDRESS_POINTER_REGNUM
565 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
566 return return_address_pointer_rtx;
568 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
569 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
570 return pic_offset_table_rtx;
571 if (regno == STACK_POINTER_REGNUM)
572 return stack_pointer_rtx;
576 /* If the per-function register table has been set up, try to re-use
577 an existing entry in that table to avoid useless generation of RTL.
579 This code is disabled for now until we can fix the various backends
580 which depend on having non-shared hard registers in some cases. Long
581 term we want to re-enable this code as it can significantly cut down
582 on the amount of useless RTL that gets generated.
584 We'll also need to fix some code that runs after reload that wants to
585 set ORIGINAL_REGNO. */
590 && regno < FIRST_PSEUDO_REGISTER
591 && reg_raw_mode[regno] == mode)
592 return regno_reg_rtx[regno];
595 return gen_raw_REG (mode, regno);
599 gen_rtx_MEM (enum machine_mode mode, rtx addr)
601 rtx rt = gen_rtx_raw_MEM (mode, addr);
603 /* This field is not cleared by the mere allocation of the rtx, so
611 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
613 /* This is the most common failure type.
614 Catch it early so we can see who does it. */
615 if ((offset % GET_MODE_SIZE (mode)) != 0)
618 /* This check isn't usable right now because combine will
619 throw arbitrary crap like a CALL into a SUBREG in
620 gen_lowpart_for_combine so we must just eat it. */
622 /* Check for this too. */
623 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
626 return gen_rtx_raw_SUBREG (mode, reg, offset);
629 /* Generate a SUBREG representing the least-significant part of REG if MODE
630 is smaller than mode of REG, otherwise paradoxical SUBREG. */
633 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
635 enum machine_mode inmode;
637 inmode = GET_MODE (reg);
638 if (inmode == VOIDmode)
640 return gen_rtx_SUBREG (mode, reg,
641 subreg_lowpart_offset (mode, inmode));
644 /* gen_rtvec (n, [rt1, ..., rtn])
646 ** This routine creates an rtvec and stores within it the
647 ** pointers to rtx's which are its arguments.
652 gen_rtvec (int n, ...)
661 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
663 vector = alloca (n * sizeof (rtx));
665 for (i = 0; i < n; i++)
666 vector[i] = va_arg (p, rtx);
668 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
672 return gen_rtvec_v (save_n, vector);
676 gen_rtvec_v (int n, rtx *argp)
682 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
684 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
686 for (i = 0; i < n; i++)
687 rt_val->elem[i] = *argp++;
692 /* Generate a REG rtx for a new pseudo register of mode MODE.
693 This pseudo is assigned the next sequential register number. */
696 gen_reg_rtx (enum machine_mode mode)
698 struct function *f = cfun;
701 /* Don't let anything called after initial flow analysis create new
706 if (generating_concat_p
707 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
708 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
710 /* For complex modes, don't make a single pseudo.
711 Instead, make a CONCAT of two pseudos.
712 This allows noncontiguous allocation of the real and imaginary parts,
713 which makes much better code. Besides, allocating DCmode
714 pseudos overstrains reload on some machines like the 386. */
715 rtx realpart, imagpart;
716 enum machine_mode partmode = GET_MODE_INNER (mode);
718 realpart = gen_reg_rtx (partmode);
719 imagpart = gen_reg_rtx (partmode);
720 return gen_rtx_CONCAT (mode, realpart, imagpart);
723 /* Make sure regno_pointer_align, and regno_reg_rtx are large
724 enough to have an element for this pseudo reg number. */
726 if (reg_rtx_no == f->emit->regno_pointer_align_length)
728 int old_size = f->emit->regno_pointer_align_length;
732 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
733 memset (new + old_size, 0, old_size);
734 f->emit->regno_pointer_align = (unsigned char *) new;
736 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
737 old_size * 2 * sizeof (rtx));
738 memset (new1 + old_size, 0, old_size * sizeof (rtx));
739 regno_reg_rtx = new1;
741 f->emit->regno_pointer_align_length = old_size * 2;
744 val = gen_raw_REG (mode, reg_rtx_no);
745 regno_reg_rtx[reg_rtx_no++] = val;
749 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
750 Do the big endian correction if needed. */
753 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
755 rtx new = gen_rtx_REG (mode, regno);
757 HOST_WIDE_INT var_size;
759 /* PR middle-end/14084
760 The problem appears when a variable is stored in a larger register
761 and later it is used in the original mode or some mode in between
762 or some part of variable is accessed.
764 On little endian machines there is no problem because
765 the REG_OFFSET of the start of the variable is the same when
766 accessed in any mode (it is 0).
768 However, this is not true on big endian machines.
769 The offset of the start of the variable is different when accessed
771 When we are taking a part of the REG we have to change the OFFSET
772 from offset WRT size of mode of REG to offset WRT size of variable.
774 If we would not do the big endian correction the resulting REG_OFFSET
775 would be larger than the size of the DECL.
777 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
779 REG.mode MODE DECL size old offset new offset description
780 DI SI 4 4 0 int32 in SImode
781 DI SI 1 4 0 char in SImode
782 DI QI 1 7 0 char in QImode
783 DI QI 4 5 1 1st element in QImode
785 DI HI 4 6 2 1st element in HImode
788 If the size of DECL is equal or greater than the size of REG
789 we can't do this correction because the register holds the
790 whole variable or a part of the variable and thus the REG_OFFSET
791 is already correct. */
793 decl = REG_EXPR (reg);
794 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
797 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
798 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
799 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
803 /* Convert machine endian to little endian WRT size of mode of REG. */
804 if (WORDS_BIG_ENDIAN)
805 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
806 / UNITS_PER_WORD) * UNITS_PER_WORD;
808 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
810 if (BYTES_BIG_ENDIAN)
811 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
814 offset_le += offset % UNITS_PER_WORD;
816 if (offset_le >= var_size)
818 /* MODE is wider than the variable so the new reg will cover
819 the whole variable so the resulting OFFSET should be 0. */
824 /* Convert little endian to machine endian WRT size of variable. */
825 if (WORDS_BIG_ENDIAN)
826 offset = ((var_size - 1 - offset_le)
827 / UNITS_PER_WORD) * UNITS_PER_WORD;
829 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
831 if (BYTES_BIG_ENDIAN)
832 offset += ((var_size - 1 - offset_le)
835 offset += offset_le % UNITS_PER_WORD;
839 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
840 REG_OFFSET (reg) + offset);
844 /* Set the decl for MEM to DECL. */
847 set_reg_attrs_from_mem (rtx reg, rtx mem)
849 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
851 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
854 /* Set the register attributes for registers contained in PARM_RTX.
855 Use needed values from memory attributes of MEM. */
858 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
860 if (REG_P (parm_rtx))
861 set_reg_attrs_from_mem (parm_rtx, mem);
862 else if (GET_CODE (parm_rtx) == PARALLEL)
864 /* Check for a NULL entry in the first slot, used to indicate that the
865 parameter goes both on the stack and in registers. */
866 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
867 for (; i < XVECLEN (parm_rtx, 0); i++)
869 rtx x = XVECEXP (parm_rtx, 0, i);
870 if (REG_P (XEXP (x, 0)))
871 REG_ATTRS (XEXP (x, 0))
872 = get_reg_attrs (MEM_EXPR (mem),
873 INTVAL (XEXP (x, 1)));
878 /* Assign the RTX X to declaration T. */
880 set_decl_rtl (tree t, rtx x)
882 DECL_CHECK (t)->decl.rtl = x;
886 /* For register, we maintain the reverse information too. */
888 REG_ATTRS (x) = get_reg_attrs (t, 0);
889 else if (GET_CODE (x) == SUBREG)
890 REG_ATTRS (SUBREG_REG (x))
891 = get_reg_attrs (t, -SUBREG_BYTE (x));
892 if (GET_CODE (x) == CONCAT)
894 if (REG_P (XEXP (x, 0)))
895 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
896 if (REG_P (XEXP (x, 1)))
897 REG_ATTRS (XEXP (x, 1))
898 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
900 if (GET_CODE (x) == PARALLEL)
903 for (i = 0; i < XVECLEN (x, 0); i++)
905 rtx y = XVECEXP (x, 0, i);
906 if (REG_P (XEXP (y, 0)))
907 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
912 /* Assign the RTX X to parameter declaration T. */
914 set_decl_incoming_rtl (tree t, rtx x)
916 DECL_INCOMING_RTL (t) = x;
920 /* For register, we maintain the reverse information too. */
922 REG_ATTRS (x) = get_reg_attrs (t, 0);
923 else if (GET_CODE (x) == SUBREG)
924 REG_ATTRS (SUBREG_REG (x))
925 = get_reg_attrs (t, -SUBREG_BYTE (x));
926 if (GET_CODE (x) == CONCAT)
928 if (REG_P (XEXP (x, 0)))
929 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
930 if (REG_P (XEXP (x, 1)))
931 REG_ATTRS (XEXP (x, 1))
932 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
934 if (GET_CODE (x) == PARALLEL)
938 /* Check for a NULL entry, used to indicate that the parameter goes
939 both on the stack and in registers. */
940 if (XEXP (XVECEXP (x, 0, 0), 0))
945 for (i = start; i < XVECLEN (x, 0); i++)
947 rtx y = XVECEXP (x, 0, i);
948 if (REG_P (XEXP (y, 0)))
949 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
954 /* Identify REG (which may be a CONCAT) as a user register. */
957 mark_user_reg (rtx reg)
959 if (GET_CODE (reg) == CONCAT)
961 REG_USERVAR_P (XEXP (reg, 0)) = 1;
962 REG_USERVAR_P (XEXP (reg, 1)) = 1;
964 else if (REG_P (reg))
965 REG_USERVAR_P (reg) = 1;
970 /* Identify REG as a probable pointer register and show its alignment
971 as ALIGN, if nonzero. */
974 mark_reg_pointer (rtx reg, int align)
976 if (! REG_POINTER (reg))
978 REG_POINTER (reg) = 1;
981 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
983 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
984 /* We can no-longer be sure just how aligned this pointer is. */
985 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
988 /* Return 1 plus largest pseudo reg number used in the current function. */
996 /* Return 1 + the largest label number used so far in the current function. */
1001 if (last_label_num && label_num == base_label_num)
1002 return last_label_num;
1006 /* Return first label number used in this function (if any were used). */
1009 get_first_label_num (void)
1011 return first_label_num;
1014 /* If the rtx for label was created during the expansion of a nested
1015 function, then first_label_num won't include this label number.
1016 Fix this now so that array indicies work later. */
1019 maybe_set_first_label_num (rtx x)
1021 if (CODE_LABEL_NUMBER (x) < first_label_num)
1022 first_label_num = CODE_LABEL_NUMBER (x);
1025 /* Return the final regno of X, which is a SUBREG of a hard
1028 subreg_hard_regno (rtx x, int check_mode)
1030 enum machine_mode mode = GET_MODE (x);
1031 unsigned int byte_offset, base_regno, final_regno;
1032 rtx reg = SUBREG_REG (x);
1034 /* This is where we attempt to catch illegal subregs
1035 created by the compiler. */
1036 if (GET_CODE (x) != SUBREG
1039 base_regno = REGNO (reg);
1040 if (base_regno >= FIRST_PSEUDO_REGISTER)
1042 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1044 #ifdef ENABLE_CHECKING
1045 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1046 SUBREG_BYTE (x), mode))
1049 /* Catch non-congruent offsets too. */
1050 byte_offset = SUBREG_BYTE (x);
1051 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1054 final_regno = subreg_regno (x);
1059 /* Return a value representing some low-order bits of X, where the number
1060 of low-order bits is given by MODE. Note that no conversion is done
1061 between floating-point and fixed-point values, rather, the bit
1062 representation is returned.
1064 This function handles the cases in common between gen_lowpart, below,
1065 and two variants in cse.c and combine.c. These are the cases that can
1066 be safely handled at all points in the compilation.
1068 If this is not a case we can handle, return 0. */
1071 gen_lowpart_common (enum machine_mode mode, rtx x)
1073 int msize = GET_MODE_SIZE (mode);
1076 enum machine_mode innermode;
1078 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1079 so we have to make one up. Yuk. */
1080 innermode = GET_MODE (x);
1081 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1082 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1083 else if (innermode == VOIDmode)
1084 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1086 xsize = GET_MODE_SIZE (innermode);
1088 if (innermode == VOIDmode || innermode == BLKmode)
1091 if (innermode == mode)
1094 /* MODE must occupy no more words than the mode of X. */
1095 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1096 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1099 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1100 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1103 offset = subreg_lowpart_offset (mode, innermode);
1105 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1106 && (GET_MODE_CLASS (mode) == MODE_INT
1107 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1109 /* If we are getting the low-order part of something that has been
1110 sign- or zero-extended, we can either just use the object being
1111 extended or make a narrower extension. If we want an even smaller
1112 piece than the size of the object being extended, call ourselves
1115 This case is used mostly by combine and cse. */
1117 if (GET_MODE (XEXP (x, 0)) == mode)
1119 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1120 return gen_lowpart_common (mode, XEXP (x, 0));
1121 else if (msize < xsize)
1122 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1124 else if (GET_CODE (x) == SUBREG || REG_P (x)
1125 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1126 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1127 return simplify_gen_subreg (mode, x, innermode, offset);
1129 /* Otherwise, we can't do this. */
1133 /* Return the constant real or imaginary part (which has mode MODE)
1134 of a complex value X. The IMAGPART_P argument determines whether
1135 the real or complex component should be returned. This function
1136 returns NULL_RTX if the component isn't a constant. */
1139 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1144 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1146 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1147 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1149 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1150 if (TREE_CODE (part) == REAL_CST
1151 || TREE_CODE (part) == INTEGER_CST)
1152 return expand_expr (part, NULL_RTX, mode, 0);
1158 /* Return the real part (which has mode MODE) of a complex value X.
1159 This always comes at the low address in memory. */
1162 gen_realpart (enum machine_mode mode, rtx x)
1166 /* Handle complex constants. */
1167 part = gen_complex_constant_part (mode, x, 0);
1168 if (part != NULL_RTX)
1171 if (WORDS_BIG_ENDIAN
1172 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1174 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1176 ("can't access real part of complex value in hard register");
1177 else if (WORDS_BIG_ENDIAN)
1178 return gen_highpart (mode, x);
1180 return gen_lowpart (mode, x);
1183 /* Return the imaginary part (which has mode MODE) of a complex value X.
1184 This always comes at the high address in memory. */
1187 gen_imagpart (enum machine_mode mode, rtx x)
1191 /* Handle complex constants. */
1192 part = gen_complex_constant_part (mode, x, 1);
1193 if (part != NULL_RTX)
1196 if (WORDS_BIG_ENDIAN)
1197 return gen_lowpart (mode, x);
1198 else if (! WORDS_BIG_ENDIAN
1199 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1201 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1203 ("can't access imaginary part of complex value in hard register");
1205 return gen_highpart (mode, x);
1209 gen_highpart (enum machine_mode mode, rtx x)
1211 unsigned int msize = GET_MODE_SIZE (mode);
1214 /* This case loses if X is a subreg. To catch bugs early,
1215 complain if an invalid MODE is used even in other cases. */
1216 if (msize > UNITS_PER_WORD
1217 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1220 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1221 subreg_highpart_offset (mode, GET_MODE (x)));
1223 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1224 the target if we have a MEM. gen_highpart must return a valid operand,
1225 emitting code if necessary to do so. */
1226 if (result != NULL_RTX && MEM_P (result))
1227 result = validize_mem (result);
1234 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1235 be VOIDmode constant. */
1237 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1239 if (GET_MODE (exp) != VOIDmode)
1241 if (GET_MODE (exp) != innermode)
1243 return gen_highpart (outermode, exp);
1245 return simplify_gen_subreg (outermode, exp, innermode,
1246 subreg_highpart_offset (outermode, innermode));
1249 /* Return offset in bytes to get OUTERMODE low part
1250 of the value in mode INNERMODE stored in memory in target format. */
1253 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1255 unsigned int offset = 0;
1256 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1260 if (WORDS_BIG_ENDIAN)
1261 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1262 if (BYTES_BIG_ENDIAN)
1263 offset += difference % UNITS_PER_WORD;
1269 /* Return offset in bytes to get OUTERMODE high part
1270 of the value in mode INNERMODE stored in memory in target format. */
1272 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1274 unsigned int offset = 0;
1275 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1277 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1282 if (! WORDS_BIG_ENDIAN)
1283 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1284 if (! BYTES_BIG_ENDIAN)
1285 offset += difference % UNITS_PER_WORD;
1291 /* Return 1 iff X, assumed to be a SUBREG,
1292 refers to the least significant part of its containing reg.
1293 If X is not a SUBREG, always return 1 (it is its own low part!). */
1296 subreg_lowpart_p (rtx x)
1298 if (GET_CODE (x) != SUBREG)
1300 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1303 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1304 == SUBREG_BYTE (x));
1307 /* Return subword OFFSET of operand OP.
1308 The word number, OFFSET, is interpreted as the word number starting
1309 at the low-order address. OFFSET 0 is the low-order word if not
1310 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1312 If we cannot extract the required word, we return zero. Otherwise,
1313 an rtx corresponding to the requested word will be returned.
1315 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1316 reload has completed, a valid address will always be returned. After
1317 reload, if a valid address cannot be returned, we return zero.
1319 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1320 it is the responsibility of the caller.
1322 MODE is the mode of OP in case it is a CONST_INT.
1324 ??? This is still rather broken for some cases. The problem for the
1325 moment is that all callers of this thing provide no 'goal mode' to
1326 tell us to work with. This exists because all callers were written
1327 in a word based SUBREG world.
1328 Now use of this function can be deprecated by simplify_subreg in most
1333 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1335 if (mode == VOIDmode)
1336 mode = GET_MODE (op);
1338 if (mode == VOIDmode)
1341 /* If OP is narrower than a word, fail. */
1343 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1346 /* If we want a word outside OP, return zero. */
1348 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1351 /* Form a new MEM at the requested address. */
1354 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1356 if (! validate_address)
1359 else if (reload_completed)
1361 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1365 return replace_equiv_address (new, XEXP (new, 0));
1368 /* Rest can be handled by simplify_subreg. */
1369 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1372 /* Similar to `operand_subword', but never return 0. If we can't extract
1373 the required subword, put OP into a register and try again. If that fails,
1374 abort. We always validate the address in this case.
1376 MODE is the mode of OP, in case it is CONST_INT. */
1379 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1381 rtx result = operand_subword (op, offset, 1, mode);
1386 if (mode != BLKmode && mode != VOIDmode)
1388 /* If this is a register which can not be accessed by words, copy it
1389 to a pseudo register. */
1391 op = copy_to_reg (op);
1393 op = force_reg (mode, op);
1396 result = operand_subword (op, offset, 1, mode);
1403 /* Given a compare instruction, swap the operands.
1404 A test instruction is changed into a compare of 0 against the operand. */
1407 reverse_comparison (rtx insn)
1409 rtx body = PATTERN (insn);
1412 if (GET_CODE (body) == SET)
1413 comp = SET_SRC (body);
1415 comp = SET_SRC (XVECEXP (body, 0, 0));
1417 if (GET_CODE (comp) == COMPARE)
1419 rtx op0 = XEXP (comp, 0);
1420 rtx op1 = XEXP (comp, 1);
1421 XEXP (comp, 0) = op1;
1422 XEXP (comp, 1) = op0;
1426 rtx new = gen_rtx_COMPARE (VOIDmode,
1427 CONST0_RTX (GET_MODE (comp)), comp);
1428 if (GET_CODE (body) == SET)
1429 SET_SRC (body) = new;
1431 SET_SRC (XVECEXP (body, 0, 0)) = new;
1435 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1436 or (2) a component ref of something variable. Represent the later with
1437 a NULL expression. */
1440 component_ref_for_mem_expr (tree ref)
1442 tree inner = TREE_OPERAND (ref, 0);
1444 if (TREE_CODE (inner) == COMPONENT_REF)
1445 inner = component_ref_for_mem_expr (inner);
1448 /* Now remove any conversions: they don't change what the underlying
1449 object is. Likewise for SAVE_EXPR. */
1450 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1451 || TREE_CODE (inner) == NON_LVALUE_EXPR
1452 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1453 || TREE_CODE (inner) == SAVE_EXPR)
1454 inner = TREE_OPERAND (inner, 0);
1456 if (! DECL_P (inner))
1460 if (inner == TREE_OPERAND (ref, 0))
1463 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1464 TREE_OPERAND (ref, 1), NULL_TREE);
1467 /* Returns 1 if both MEM_EXPR can be considered equal
1471 mem_expr_equal_p (tree expr1, tree expr2)
1476 if (! expr1 || ! expr2)
1479 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1482 if (TREE_CODE (expr1) == COMPONENT_REF)
1484 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1485 TREE_OPERAND (expr2, 0))
1486 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1487 TREE_OPERAND (expr2, 1));
1489 if (TREE_CODE (expr1) == INDIRECT_REF)
1490 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1491 TREE_OPERAND (expr2, 0));
1493 /* Decls with different pointers can't be equal. */
1497 abort(); /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1498 have been resolved here. */
1501 /* Given REF, a MEM, and T, either the type of X or the expression
1502 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1503 if we are making a new object of this type. BITPOS is nonzero if
1504 there is an offset outstanding on T that will be applied later. */
1507 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1508 HOST_WIDE_INT bitpos)
1510 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1511 tree expr = MEM_EXPR (ref);
1512 rtx offset = MEM_OFFSET (ref);
1513 rtx size = MEM_SIZE (ref);
1514 unsigned int align = MEM_ALIGN (ref);
1515 HOST_WIDE_INT apply_bitpos = 0;
1518 /* It can happen that type_for_mode was given a mode for which there
1519 is no language-level type. In which case it returns NULL, which
1524 type = TYPE_P (t) ? t : TREE_TYPE (t);
1525 if (type == error_mark_node)
1528 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1529 wrong answer, as it assumes that DECL_RTL already has the right alias
1530 info. Callers should not set DECL_RTL until after the call to
1531 set_mem_attributes. */
1532 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1535 /* Get the alias set from the expression or type (perhaps using a
1536 front-end routine) and use it. */
1537 alias = get_alias_set (t);
1539 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1540 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1541 RTX_UNCHANGING_P (ref)
1542 |= ((lang_hooks.honor_readonly
1543 && (TYPE_READONLY (type) || (t != type && TREE_READONLY (t))))
1544 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1545 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1546 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (t);
1548 /* If we are making an object of this type, or if this is a DECL, we know
1549 that it is a scalar if the type is not an aggregate. */
1550 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1551 MEM_SCALAR_P (ref) = 1;
1553 /* We can set the alignment from the type if we are making an object,
1554 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1555 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1556 align = MAX (align, TYPE_ALIGN (type));
1558 /* If the size is known, we can set that. */
1559 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1560 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1562 /* If T is not a type, we may be able to deduce some more information about
1566 maybe_set_unchanging (ref, t);
1567 if (TREE_THIS_VOLATILE (t))
1568 MEM_VOLATILE_P (ref) = 1;
1570 /* Now remove any conversions: they don't change what the underlying
1571 object is. Likewise for SAVE_EXPR. */
1572 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1573 || TREE_CODE (t) == NON_LVALUE_EXPR
1574 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1575 || TREE_CODE (t) == SAVE_EXPR)
1576 t = TREE_OPERAND (t, 0);
1578 /* If this expression can't be addressed (e.g., it contains a reference
1579 to a non-addressable field), show we don't change its alias set. */
1580 if (! can_address_p (t))
1581 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1583 /* If this is a decl, set the attributes of the MEM from it. */
1587 offset = const0_rtx;
1588 apply_bitpos = bitpos;
1589 size = (DECL_SIZE_UNIT (t)
1590 && host_integerp (DECL_SIZE_UNIT (t), 1)
1591 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1592 align = DECL_ALIGN (t);
1595 /* If this is a constant, we know the alignment. */
1596 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1598 align = TYPE_ALIGN (type);
1599 #ifdef CONSTANT_ALIGNMENT
1600 align = CONSTANT_ALIGNMENT (t, align);
1604 /* If this is a field reference and not a bit-field, record it. */
1605 /* ??? There is some information that can be gleened from bit-fields,
1606 such as the word offset in the structure that might be modified.
1607 But skip it for now. */
1608 else if (TREE_CODE (t) == COMPONENT_REF
1609 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1611 expr = component_ref_for_mem_expr (t);
1612 offset = const0_rtx;
1613 apply_bitpos = bitpos;
1614 /* ??? Any reason the field size would be different than
1615 the size we got from the type? */
1618 /* If this is an array reference, look for an outer field reference. */
1619 else if (TREE_CODE (t) == ARRAY_REF)
1621 tree off_tree = size_zero_node;
1622 /* We can't modify t, because we use it at the end of the
1628 tree index = TREE_OPERAND (t2, 1);
1629 tree low_bound = array_ref_low_bound (t2);
1630 tree unit_size = array_ref_element_size (t2);
1632 /* We assume all arrays have sizes that are a multiple of a byte.
1633 First subtract the lower bound, if any, in the type of the
1634 index, then convert to sizetype and multiply by the size of
1635 the array element. */
1636 if (! integer_zerop (low_bound))
1637 index = fold (build2 (MINUS_EXPR, TREE_TYPE (index),
1640 off_tree = size_binop (PLUS_EXPR,
1641 size_binop (MULT_EXPR, convert (sizetype,
1645 t2 = TREE_OPERAND (t2, 0);
1647 while (TREE_CODE (t2) == ARRAY_REF);
1653 if (host_integerp (off_tree, 1))
1655 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1656 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1657 align = DECL_ALIGN (t2);
1658 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1660 offset = GEN_INT (ioff);
1661 apply_bitpos = bitpos;
1664 else if (TREE_CODE (t2) == COMPONENT_REF)
1666 expr = component_ref_for_mem_expr (t2);
1667 if (host_integerp (off_tree, 1))
1669 offset = GEN_INT (tree_low_cst (off_tree, 1));
1670 apply_bitpos = bitpos;
1672 /* ??? Any reason the field size would be different than
1673 the size we got from the type? */
1675 else if (flag_argument_noalias > 1
1676 && TREE_CODE (t2) == INDIRECT_REF
1677 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1684 /* If this is a Fortran indirect argument reference, record the
1686 else if (flag_argument_noalias > 1
1687 && TREE_CODE (t) == INDIRECT_REF
1688 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1695 /* If we modified OFFSET based on T, then subtract the outstanding
1696 bit position offset. Similarly, increase the size of the accessed
1697 object to contain the negative offset. */
1700 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1702 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1705 /* Now set the attributes we computed above. */
1707 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1709 /* If this is already known to be a scalar or aggregate, we are done. */
1710 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1713 /* If it is a reference into an aggregate, this is part of an aggregate.
1714 Otherwise we don't know. */
1715 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1716 || TREE_CODE (t) == ARRAY_RANGE_REF
1717 || TREE_CODE (t) == BIT_FIELD_REF)
1718 MEM_IN_STRUCT_P (ref) = 1;
1722 set_mem_attributes (rtx ref, tree t, int objectp)
1724 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1727 /* Set the decl for MEM to DECL. */
1730 set_mem_attrs_from_reg (rtx mem, rtx reg)
1733 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1734 GEN_INT (REG_OFFSET (reg)),
1735 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1738 /* Set the alias set of MEM to SET. */
1741 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1743 #ifdef ENABLE_CHECKING
1744 /* If the new and old alias sets don't conflict, something is wrong. */
1745 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1749 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1750 MEM_SIZE (mem), MEM_ALIGN (mem),
1754 /* Set the alignment of MEM to ALIGN bits. */
1757 set_mem_align (rtx mem, unsigned int align)
1759 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1760 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1764 /* Set the expr for MEM to EXPR. */
1767 set_mem_expr (rtx mem, tree expr)
1770 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1771 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1774 /* Set the offset of MEM to OFFSET. */
1777 set_mem_offset (rtx mem, rtx offset)
1779 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1780 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1784 /* Set the size of MEM to SIZE. */
1787 set_mem_size (rtx mem, rtx size)
1789 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1790 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1794 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1795 and its address changed to ADDR. (VOIDmode means don't change the mode.
1796 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1797 returned memory location is required to be valid. The memory
1798 attributes are not changed. */
1801 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1805 if (!MEM_P (memref))
1807 if (mode == VOIDmode)
1808 mode = GET_MODE (memref);
1810 addr = XEXP (memref, 0);
1811 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1812 && (!validate || memory_address_p (mode, addr)))
1817 if (reload_in_progress || reload_completed)
1819 if (! memory_address_p (mode, addr))
1823 addr = memory_address (mode, addr);
1826 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1829 new = gen_rtx_MEM (mode, addr);
1830 MEM_COPY_ATTRIBUTES (new, memref);
1834 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1835 way we are changing MEMREF, so we only preserve the alias set. */
1838 change_address (rtx memref, enum machine_mode mode, rtx addr)
1840 rtx new = change_address_1 (memref, mode, addr, 1), size;
1841 enum machine_mode mmode = GET_MODE (new);
1844 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1845 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1847 /* If there are no changes, just return the original memory reference. */
1850 if (MEM_ATTRS (memref) == 0
1851 || (MEM_EXPR (memref) == NULL
1852 && MEM_OFFSET (memref) == NULL
1853 && MEM_SIZE (memref) == size
1854 && MEM_ALIGN (memref) == align))
1857 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1858 MEM_COPY_ATTRIBUTES (new, memref);
1862 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1867 /* Return a memory reference like MEMREF, but with its mode changed
1868 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1869 nonzero, the memory address is forced to be valid.
1870 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1871 and caller is responsible for adjusting MEMREF base register. */
1874 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1875 int validate, int adjust)
1877 rtx addr = XEXP (memref, 0);
1879 rtx memoffset = MEM_OFFSET (memref);
1881 unsigned int memalign = MEM_ALIGN (memref);
1883 /* If there are no changes, just return the original memory reference. */
1884 if (mode == GET_MODE (memref) && !offset
1885 && (!validate || memory_address_p (mode, addr)))
1888 /* ??? Prefer to create garbage instead of creating shared rtl.
1889 This may happen even if offset is nonzero -- consider
1890 (plus (plus reg reg) const_int) -- so do this always. */
1891 addr = copy_rtx (addr);
1895 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1896 object, we can merge it into the LO_SUM. */
1897 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1899 && (unsigned HOST_WIDE_INT) offset
1900 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1901 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1902 plus_constant (XEXP (addr, 1), offset));
1904 addr = plus_constant (addr, offset);
1907 new = change_address_1 (memref, mode, addr, validate);
1909 /* Compute the new values of the memory attributes due to this adjustment.
1910 We add the offsets and update the alignment. */
1912 memoffset = GEN_INT (offset + INTVAL (memoffset));
1914 /* Compute the new alignment by taking the MIN of the alignment and the
1915 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1920 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1922 /* We can compute the size in a number of ways. */
1923 if (GET_MODE (new) != BLKmode)
1924 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1925 else if (MEM_SIZE (memref))
1926 size = plus_constant (MEM_SIZE (memref), -offset);
1928 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1929 memoffset, size, memalign, GET_MODE (new));
1931 /* At some point, we should validate that this offset is within the object,
1932 if all the appropriate values are known. */
1936 /* Return a memory reference like MEMREF, but with its mode changed
1937 to MODE and its address changed to ADDR, which is assumed to be
1938 MEMREF offseted by OFFSET bytes. If VALIDATE is
1939 nonzero, the memory address is forced to be valid. */
1942 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1943 HOST_WIDE_INT offset, int validate)
1945 memref = change_address_1 (memref, VOIDmode, addr, validate);
1946 return adjust_address_1 (memref, mode, offset, validate, 0);
1949 /* Return a memory reference like MEMREF, but whose address is changed by
1950 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1951 known to be in OFFSET (possibly 1). */
1954 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1956 rtx new, addr = XEXP (memref, 0);
1958 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1960 /* At this point we don't know _why_ the address is invalid. It
1961 could have secondary memory references, multiplies or anything.
1963 However, if we did go and rearrange things, we can wind up not
1964 being able to recognize the magic around pic_offset_table_rtx.
1965 This stuff is fragile, and is yet another example of why it is
1966 bad to expose PIC machinery too early. */
1967 if (! memory_address_p (GET_MODE (memref), new)
1968 && GET_CODE (addr) == PLUS
1969 && XEXP (addr, 0) == pic_offset_table_rtx)
1971 addr = force_reg (GET_MODE (addr), addr);
1972 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1975 update_temp_slot_address (XEXP (memref, 0), new);
1976 new = change_address_1 (memref, VOIDmode, new, 1);
1978 /* If there are no changes, just return the original memory reference. */
1982 /* Update the alignment to reflect the offset. Reset the offset, which
1985 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1986 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1991 /* Return a memory reference like MEMREF, but with its address changed to
1992 ADDR. The caller is asserting that the actual piece of memory pointed
1993 to is the same, just the form of the address is being changed, such as
1994 by putting something into a register. */
1997 replace_equiv_address (rtx memref, rtx addr)
1999 /* change_address_1 copies the memory attribute structure without change
2000 and that's exactly what we want here. */
2001 update_temp_slot_address (XEXP (memref, 0), addr);
2002 return change_address_1 (memref, VOIDmode, addr, 1);
2005 /* Likewise, but the reference is not required to be valid. */
2008 replace_equiv_address_nv (rtx memref, rtx addr)
2010 return change_address_1 (memref, VOIDmode, addr, 0);
2013 /* Return a memory reference like MEMREF, but with its mode widened to
2014 MODE and offset by OFFSET. This would be used by targets that e.g.
2015 cannot issue QImode memory operations and have to use SImode memory
2016 operations plus masking logic. */
2019 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2021 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2022 tree expr = MEM_EXPR (new);
2023 rtx memoffset = MEM_OFFSET (new);
2024 unsigned int size = GET_MODE_SIZE (mode);
2026 /* If there are no changes, just return the original memory reference. */
2030 /* If we don't know what offset we were at within the expression, then
2031 we can't know if we've overstepped the bounds. */
2037 if (TREE_CODE (expr) == COMPONENT_REF)
2039 tree field = TREE_OPERAND (expr, 1);
2040 tree offset = component_ref_field_offset (expr);
2042 if (! DECL_SIZE_UNIT (field))
2048 /* Is the field at least as large as the access? If so, ok,
2049 otherwise strip back to the containing structure. */
2050 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2051 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2052 && INTVAL (memoffset) >= 0)
2055 if (! host_integerp (offset, 1))
2061 expr = TREE_OPERAND (expr, 0);
2063 = (GEN_INT (INTVAL (memoffset)
2064 + tree_low_cst (offset, 1)
2065 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2068 /* Similarly for the decl. */
2069 else if (DECL_P (expr)
2070 && DECL_SIZE_UNIT (expr)
2071 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2072 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2073 && (! memoffset || INTVAL (memoffset) >= 0))
2077 /* The widened memory access overflows the expression, which means
2078 that it could alias another expression. Zap it. */
2085 memoffset = NULL_RTX;
2087 /* The widened memory may alias other stuff, so zap the alias set. */
2088 /* ??? Maybe use get_alias_set on any remaining expression. */
2090 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2091 MEM_ALIGN (new), mode);
2096 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2099 gen_label_rtx (void)
2101 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2102 NULL, label_num++, NULL);
2105 /* For procedure integration. */
2107 /* Install new pointers to the first and last insns in the chain.
2108 Also, set cur_insn_uid to one higher than the last in use.
2109 Used for an inline-procedure after copying the insn chain. */
2112 set_new_first_and_last_insn (rtx first, rtx last)
2120 for (insn = first; insn; insn = NEXT_INSN (insn))
2121 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2126 /* Set the last label number found in the current function.
2127 This is used when belatedly compiling an inline function. */
2130 set_new_last_label_num (int last)
2132 base_label_num = label_num;
2133 last_label_num = last;
2136 /* Restore all variables describing the current status from the structure *P.
2137 This is used after a nested function. */
2140 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2145 /* Go through all the RTL insn bodies and copy any invalid shared
2146 structure. This routine should only be called once. */
2149 unshare_all_rtl_1 (tree fndecl, rtx insn)
2153 /* Make sure that virtual parameters are not shared. */
2154 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2155 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2157 /* Make sure that virtual stack slots are not shared. */
2158 unshare_all_decls (DECL_INITIAL (fndecl));
2160 /* Unshare just about everything else. */
2161 unshare_all_rtl_in_chain (insn);
2163 /* Make sure the addresses of stack slots found outside the insn chain
2164 (such as, in DECL_RTL of a variable) are not shared
2165 with the insn chain.
2167 This special care is necessary when the stack slot MEM does not
2168 actually appear in the insn chain. If it does appear, its address
2169 is unshared from all else at that point. */
2170 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2173 /* Go through all the RTL insn bodies and copy any invalid shared
2174 structure, again. This is a fairly expensive thing to do so it
2175 should be done sparingly. */
2178 unshare_all_rtl_again (rtx insn)
2183 for (p = insn; p; p = NEXT_INSN (p))
2186 reset_used_flags (PATTERN (p));
2187 reset_used_flags (REG_NOTES (p));
2188 reset_used_flags (LOG_LINKS (p));
2191 /* Make sure that virtual stack slots are not shared. */
2192 reset_used_decls (DECL_INITIAL (cfun->decl));
2194 /* Make sure that virtual parameters are not shared. */
2195 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2196 reset_used_flags (DECL_RTL (decl));
2198 reset_used_flags (stack_slot_list);
2200 unshare_all_rtl_1 (cfun->decl, insn);
2204 unshare_all_rtl (void)
2206 unshare_all_rtl_1 (current_function_decl, get_insns ());
2209 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2210 Recursively does the same for subexpressions. */
2213 verify_rtx_sharing (rtx orig, rtx insn)
2218 const char *format_ptr;
2223 code = GET_CODE (x);
2225 /* These types may be freely shared. */
2240 /* SCRATCH must be shared because they represent distinct values. */
2242 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2247 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2248 a LABEL_REF, it isn't sharable. */
2249 if (GET_CODE (XEXP (x, 0)) == PLUS
2250 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2251 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2256 /* A MEM is allowed to be shared if its address is constant. */
2257 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2258 || reload_completed || reload_in_progress)
2267 /* This rtx may not be shared. If it has already been seen,
2268 replace it with a copy of itself. */
2270 if (RTX_FLAG (x, used))
2272 error ("Invalid rtl sharing found in the insn");
2274 error ("Shared rtx");
2278 RTX_FLAG (x, used) = 1;
2280 /* Now scan the subexpressions recursively. */
2282 format_ptr = GET_RTX_FORMAT (code);
2284 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2286 switch (*format_ptr++)
2289 verify_rtx_sharing (XEXP (x, i), insn);
2293 if (XVEC (x, i) != NULL)
2296 int len = XVECLEN (x, i);
2298 for (j = 0; j < len; j++)
2300 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2301 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2302 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2303 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2305 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2314 /* Go through all the RTL insn bodies and check that there is no unexpected
2315 sharing in between the subexpressions. */
2318 verify_rtl_sharing (void)
2322 for (p = get_insns (); p; p = NEXT_INSN (p))
2325 reset_used_flags (PATTERN (p));
2326 reset_used_flags (REG_NOTES (p));
2327 reset_used_flags (LOG_LINKS (p));
2330 for (p = get_insns (); p; p = NEXT_INSN (p))
2333 verify_rtx_sharing (PATTERN (p), p);
2334 verify_rtx_sharing (REG_NOTES (p), p);
2335 verify_rtx_sharing (LOG_LINKS (p), p);
2339 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2340 Assumes the mark bits are cleared at entry. */
2343 unshare_all_rtl_in_chain (rtx insn)
2345 for (; insn; insn = NEXT_INSN (insn))
2348 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2349 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2350 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2354 /* Go through all virtual stack slots of a function and copy any
2355 shared structure. */
2357 unshare_all_decls (tree blk)
2361 /* Copy shared decls. */
2362 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2363 if (DECL_RTL_SET_P (t))
2364 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2366 /* Now process sub-blocks. */
2367 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2368 unshare_all_decls (t);
2371 /* Go through all virtual stack slots of a function and mark them as
2374 reset_used_decls (tree blk)
2379 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2380 if (DECL_RTL_SET_P (t))
2381 reset_used_flags (DECL_RTL (t));
2383 /* Now process sub-blocks. */
2384 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2385 reset_used_decls (t);
2388 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2389 placed in the result directly, rather than being copied. MAY_SHARE is
2390 either a MEM of an EXPR_LIST of MEMs. */
2393 copy_most_rtx (rtx orig, rtx may_share)
2398 const char *format_ptr;
2400 if (orig == may_share
2401 || (GET_CODE (may_share) == EXPR_LIST
2402 && in_expr_list_p (may_share, orig)))
2405 code = GET_CODE (orig);
2422 copy = rtx_alloc (code);
2423 PUT_MODE (copy, GET_MODE (orig));
2424 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2425 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2426 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2427 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2428 RTX_FLAG (copy, return_val) = RTX_FLAG (orig, return_val);
2430 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2432 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2434 switch (*format_ptr++)
2437 XEXP (copy, i) = XEXP (orig, i);
2438 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2439 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2443 XEXP (copy, i) = XEXP (orig, i);
2448 XVEC (copy, i) = XVEC (orig, i);
2449 if (XVEC (orig, i) != NULL)
2451 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2452 for (j = 0; j < XVECLEN (copy, i); j++)
2453 XVECEXP (copy, i, j)
2454 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2459 XWINT (copy, i) = XWINT (orig, i);
2464 XINT (copy, i) = XINT (orig, i);
2468 XTREE (copy, i) = XTREE (orig, i);
2473 XSTR (copy, i) = XSTR (orig, i);
2477 X0ANY (copy, i) = X0ANY (orig, i);
2487 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2488 Recursively does the same for subexpressions. Uses
2489 copy_rtx_if_shared_1 to reduce stack space. */
2492 copy_rtx_if_shared (rtx orig)
2494 copy_rtx_if_shared_1 (&orig);
2498 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2499 use. Recursively does the same for subexpressions. */
2502 copy_rtx_if_shared_1 (rtx *orig1)
2508 const char *format_ptr;
2512 /* Repeat is used to turn tail-recursion into iteration. */
2519 code = GET_CODE (x);
2521 /* These types may be freely shared. */
2535 /* SCRATCH must be shared because they represent distinct values. */
2538 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2543 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2544 a LABEL_REF, it isn't sharable. */
2545 if (GET_CODE (XEXP (x, 0)) == PLUS
2546 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2547 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2556 /* The chain of insns is not being copied. */
2563 /* This rtx may not be shared. If it has already been seen,
2564 replace it with a copy of itself. */
2566 if (RTX_FLAG (x, used))
2570 copy = rtx_alloc (code);
2571 memcpy (copy, x, RTX_SIZE (code));
2575 RTX_FLAG (x, used) = 1;
2577 /* Now scan the subexpressions recursively.
2578 We can store any replaced subexpressions directly into X
2579 since we know X is not shared! Any vectors in X
2580 must be copied if X was copied. */
2582 format_ptr = GET_RTX_FORMAT (code);
2583 length = GET_RTX_LENGTH (code);
2586 for (i = 0; i < length; i++)
2588 switch (*format_ptr++)
2592 copy_rtx_if_shared_1 (last_ptr);
2593 last_ptr = &XEXP (x, i);
2597 if (XVEC (x, i) != NULL)
2600 int len = XVECLEN (x, i);
2602 /* Copy the vector iff I copied the rtx and the length
2604 if (copied && len > 0)
2605 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2607 /* Call recursively on all inside the vector. */
2608 for (j = 0; j < len; j++)
2611 copy_rtx_if_shared_1 (last_ptr);
2612 last_ptr = &XVECEXP (x, i, j);
2627 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2628 to look for shared sub-parts. */
2631 reset_used_flags (rtx x)
2635 const char *format_ptr;
2638 /* Repeat is used to turn tail-recursion into iteration. */
2643 code = GET_CODE (x);
2645 /* These types may be freely shared so we needn't do any resetting
2666 /* The chain of insns is not being copied. */
2673 RTX_FLAG (x, used) = 0;
2675 format_ptr = GET_RTX_FORMAT (code);
2676 length = GET_RTX_LENGTH (code);
2678 for (i = 0; i < length; i++)
2680 switch (*format_ptr++)
2688 reset_used_flags (XEXP (x, i));
2692 for (j = 0; j < XVECLEN (x, i); j++)
2693 reset_used_flags (XVECEXP (x, i, j));
2699 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2700 to look for shared sub-parts. */
2703 set_used_flags (rtx x)
2707 const char *format_ptr;
2712 code = GET_CODE (x);
2714 /* These types may be freely shared so we needn't do any resetting
2735 /* The chain of insns is not being copied. */
2742 RTX_FLAG (x, used) = 1;
2744 format_ptr = GET_RTX_FORMAT (code);
2745 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2747 switch (*format_ptr++)
2750 set_used_flags (XEXP (x, i));
2754 for (j = 0; j < XVECLEN (x, i); j++)
2755 set_used_flags (XVECEXP (x, i, j));
2761 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2762 Return X or the rtx for the pseudo reg the value of X was copied into.
2763 OTHER must be valid as a SET_DEST. */
2766 make_safe_from (rtx x, rtx other)
2769 switch (GET_CODE (other))
2772 other = SUBREG_REG (other);
2774 case STRICT_LOW_PART:
2777 other = XEXP (other, 0);
2786 && GET_CODE (x) != SUBREG)
2788 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2789 || reg_mentioned_p (other, x))))
2791 rtx temp = gen_reg_rtx (GET_MODE (x));
2792 emit_move_insn (temp, x);
2798 /* Emission of insns (adding them to the doubly-linked list). */
2800 /* Return the first insn of the current sequence or current function. */
2808 /* Specify a new insn as the first in the chain. */
2811 set_first_insn (rtx insn)
2813 if (PREV_INSN (insn) != 0)
2818 /* Return the last insn emitted in current sequence or current function. */
2821 get_last_insn (void)
2826 /* Specify a new insn as the last in the chain. */
2829 set_last_insn (rtx insn)
2831 if (NEXT_INSN (insn) != 0)
2836 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2839 get_last_insn_anywhere (void)
2841 struct sequence_stack *stack;
2844 for (stack = seq_stack; stack; stack = stack->next)
2845 if (stack->last != 0)
2850 /* Return the first nonnote insn emitted in current sequence or current
2851 function. This routine looks inside SEQUENCEs. */
2854 get_first_nonnote_insn (void)
2856 rtx insn = first_insn;
2860 insn = next_insn (insn);
2861 if (insn == 0 || !NOTE_P (insn))
2868 /* Return the last nonnote insn emitted in current sequence or current
2869 function. This routine looks inside SEQUENCEs. */
2872 get_last_nonnote_insn (void)
2874 rtx insn = last_insn;
2878 insn = previous_insn (insn);
2879 if (insn == 0 || !NOTE_P (insn))
2886 /* Return a number larger than any instruction's uid in this function. */
2891 return cur_insn_uid;
2894 /* Renumber instructions so that no instruction UIDs are wasted. */
2897 renumber_insns (FILE *stream)
2901 /* If we're not supposed to renumber instructions, don't. */
2902 if (!flag_renumber_insns)
2905 /* If there aren't that many instructions, then it's not really
2906 worth renumbering them. */
2907 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2912 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2915 fprintf (stream, "Renumbering insn %d to %d\n",
2916 INSN_UID (insn), cur_insn_uid);
2917 INSN_UID (insn) = cur_insn_uid++;
2921 /* Return the next insn. If it is a SEQUENCE, return the first insn
2925 next_insn (rtx insn)
2929 insn = NEXT_INSN (insn);
2930 if (insn && NONJUMP_INSN_P (insn)
2931 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2932 insn = XVECEXP (PATTERN (insn), 0, 0);
2938 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2942 previous_insn (rtx insn)
2946 insn = PREV_INSN (insn);
2947 if (insn && NONJUMP_INSN_P (insn)
2948 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2949 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2955 /* Return the next insn after INSN that is not a NOTE. This routine does not
2956 look inside SEQUENCEs. */
2959 next_nonnote_insn (rtx insn)
2963 insn = NEXT_INSN (insn);
2964 if (insn == 0 || !NOTE_P (insn))
2971 /* Return the previous insn before INSN that is not a NOTE. This routine does
2972 not look inside SEQUENCEs. */
2975 prev_nonnote_insn (rtx insn)
2979 insn = PREV_INSN (insn);
2980 if (insn == 0 || !NOTE_P (insn))
2987 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2988 or 0, if there is none. This routine does not look inside
2992 next_real_insn (rtx insn)
2996 insn = NEXT_INSN (insn);
2997 if (insn == 0 || INSN_P (insn))
3004 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3005 or 0, if there is none. This routine does not look inside
3009 prev_real_insn (rtx insn)
3013 insn = PREV_INSN (insn);
3014 if (insn == 0 || INSN_P (insn))
3021 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3022 This routine does not look inside SEQUENCEs. */
3025 last_call_insn (void)
3029 for (insn = get_last_insn ();
3030 insn && !CALL_P (insn);
3031 insn = PREV_INSN (insn))
3037 /* Find the next insn after INSN that really does something. This routine
3038 does not look inside SEQUENCEs. Until reload has completed, this is the
3039 same as next_real_insn. */
3042 active_insn_p (rtx insn)
3044 return (CALL_P (insn) || JUMP_P (insn)
3045 || (NONJUMP_INSN_P (insn)
3046 && (! reload_completed
3047 || (GET_CODE (PATTERN (insn)) != USE
3048 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3052 next_active_insn (rtx insn)
3056 insn = NEXT_INSN (insn);
3057 if (insn == 0 || active_insn_p (insn))
3064 /* Find the last insn before INSN that really does something. This routine
3065 does not look inside SEQUENCEs. Until reload has completed, this is the
3066 same as prev_real_insn. */
3069 prev_active_insn (rtx insn)
3073 insn = PREV_INSN (insn);
3074 if (insn == 0 || active_insn_p (insn))
3081 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3084 next_label (rtx insn)
3088 insn = NEXT_INSN (insn);
3089 if (insn == 0 || LABEL_P (insn))
3096 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3099 prev_label (rtx insn)
3103 insn = PREV_INSN (insn);
3104 if (insn == 0 || LABEL_P (insn))
3111 /* Return the last label to mark the same position as LABEL. Return null
3112 if LABEL itself is null. */
3115 skip_consecutive_labels (rtx label)
3119 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3127 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3128 and REG_CC_USER notes so we can find it. */
3131 link_cc0_insns (rtx insn)
3133 rtx user = next_nonnote_insn (insn);
3135 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3136 user = XVECEXP (PATTERN (user), 0, 0);
3138 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3140 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3143 /* Return the next insn that uses CC0 after INSN, which is assumed to
3144 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3145 applied to the result of this function should yield INSN).
3147 Normally, this is simply the next insn. However, if a REG_CC_USER note
3148 is present, it contains the insn that uses CC0.
3150 Return 0 if we can't find the insn. */
3153 next_cc0_user (rtx insn)
3155 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3158 return XEXP (note, 0);
3160 insn = next_nonnote_insn (insn);
3161 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3162 insn = XVECEXP (PATTERN (insn), 0, 0);
3164 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3170 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3171 note, it is the previous insn. */
3174 prev_cc0_setter (rtx insn)
3176 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3179 return XEXP (note, 0);
3181 insn = prev_nonnote_insn (insn);
3182 if (! sets_cc0_p (PATTERN (insn)))
3189 /* Increment the label uses for all labels present in rtx. */
3192 mark_label_nuses (rtx x)
3198 code = GET_CODE (x);
3199 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3200 LABEL_NUSES (XEXP (x, 0))++;
3202 fmt = GET_RTX_FORMAT (code);
3203 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3206 mark_label_nuses (XEXP (x, i));
3207 else if (fmt[i] == 'E')
3208 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3209 mark_label_nuses (XVECEXP (x, i, j));
3214 /* Try splitting insns that can be split for better scheduling.
3215 PAT is the pattern which might split.
3216 TRIAL is the insn providing PAT.
3217 LAST is nonzero if we should return the last insn of the sequence produced.
3219 If this routine succeeds in splitting, it returns the first or last
3220 replacement insn depending on the value of LAST. Otherwise, it
3221 returns TRIAL. If the insn to be returned can be split, it will be. */
3224 try_split (rtx pat, rtx trial, int last)
3226 rtx before = PREV_INSN (trial);
3227 rtx after = NEXT_INSN (trial);
3228 int has_barrier = 0;
3232 rtx insn_last, insn;
3235 if (any_condjump_p (trial)
3236 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3237 split_branch_probability = INTVAL (XEXP (note, 0));
3238 probability = split_branch_probability;
3240 seq = split_insns (pat, trial);
3242 split_branch_probability = -1;
3244 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3245 We may need to handle this specially. */
3246 if (after && BARRIER_P (after))
3249 after = NEXT_INSN (after);
3255 /* Avoid infinite loop if any insn of the result matches
3256 the original pattern. */
3260 if (INSN_P (insn_last)
3261 && rtx_equal_p (PATTERN (insn_last), pat))
3263 if (!NEXT_INSN (insn_last))
3265 insn_last = NEXT_INSN (insn_last);
3269 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3273 mark_jump_label (PATTERN (insn), insn, 0);
3275 if (probability != -1
3276 && any_condjump_p (insn)
3277 && !find_reg_note (insn, REG_BR_PROB, 0))
3279 /* We can preserve the REG_BR_PROB notes only if exactly
3280 one jump is created, otherwise the machine description
3281 is responsible for this step using
3282 split_branch_probability variable. */
3286 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3287 GEN_INT (probability),
3293 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3294 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3297 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3300 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3303 *p = CALL_INSN_FUNCTION_USAGE (trial);
3304 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3308 /* Copy notes, particularly those related to the CFG. */
3309 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3311 switch (REG_NOTE_KIND (note))
3315 while (insn != NULL_RTX)
3318 || (flag_non_call_exceptions
3319 && may_trap_p (PATTERN (insn))))
3321 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3324 insn = PREV_INSN (insn);
3330 case REG_ALWAYS_RETURN:
3332 while (insn != NULL_RTX)
3336 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3339 insn = PREV_INSN (insn);
3343 case REG_NON_LOCAL_GOTO:
3345 while (insn != NULL_RTX)
3349 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3352 insn = PREV_INSN (insn);
3361 /* If there are LABELS inside the split insns increment the
3362 usage count so we don't delete the label. */
3363 if (NONJUMP_INSN_P (trial))
3366 while (insn != NULL_RTX)
3368 if (NONJUMP_INSN_P (insn))
3369 mark_label_nuses (PATTERN (insn));
3371 insn = PREV_INSN (insn);
3375 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3377 delete_insn (trial);
3379 emit_barrier_after (tem);
3381 /* Recursively call try_split for each new insn created; by the
3382 time control returns here that insn will be fully split, so
3383 set LAST and continue from the insn after the one returned.
3384 We can't use next_active_insn here since AFTER may be a note.
3385 Ignore deleted insns, which can be occur if not optimizing. */
3386 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3387 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3388 tem = try_split (PATTERN (tem), tem, 1);
3390 /* Return either the first or the last insn, depending on which was
3393 ? (after ? PREV_INSN (after) : last_insn)
3394 : NEXT_INSN (before);
3397 /* Make and return an INSN rtx, initializing all its slots.
3398 Store PATTERN in the pattern slots. */
3401 make_insn_raw (rtx pattern)
3405 insn = rtx_alloc (INSN);
3407 INSN_UID (insn) = cur_insn_uid++;
3408 PATTERN (insn) = pattern;
3409 INSN_CODE (insn) = -1;
3410 LOG_LINKS (insn) = NULL;
3411 REG_NOTES (insn) = NULL;
3412 INSN_LOCATOR (insn) = 0;
3413 BLOCK_FOR_INSN (insn) = NULL;
3415 #ifdef ENABLE_RTL_CHECKING
3418 && (returnjump_p (insn)
3419 || (GET_CODE (insn) == SET
3420 && SET_DEST (insn) == pc_rtx)))
3422 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3430 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3433 make_jump_insn_raw (rtx pattern)
3437 insn = rtx_alloc (JUMP_INSN);
3438 INSN_UID (insn) = cur_insn_uid++;
3440 PATTERN (insn) = pattern;
3441 INSN_CODE (insn) = -1;
3442 LOG_LINKS (insn) = NULL;
3443 REG_NOTES (insn) = NULL;
3444 JUMP_LABEL (insn) = NULL;
3445 INSN_LOCATOR (insn) = 0;
3446 BLOCK_FOR_INSN (insn) = NULL;
3451 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3454 make_call_insn_raw (rtx pattern)
3458 insn = rtx_alloc (CALL_INSN);
3459 INSN_UID (insn) = cur_insn_uid++;
3461 PATTERN (insn) = pattern;
3462 INSN_CODE (insn) = -1;
3463 LOG_LINKS (insn) = NULL;
3464 REG_NOTES (insn) = NULL;
3465 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3466 INSN_LOCATOR (insn) = 0;
3467 BLOCK_FOR_INSN (insn) = NULL;
3472 /* Add INSN to the end of the doubly-linked list.
3473 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3478 PREV_INSN (insn) = last_insn;
3479 NEXT_INSN (insn) = 0;
3481 if (NULL != last_insn)
3482 NEXT_INSN (last_insn) = insn;
3484 if (NULL == first_insn)
3490 /* Add INSN into the doubly-linked list after insn AFTER. This and
3491 the next should be the only functions called to insert an insn once
3492 delay slots have been filled since only they know how to update a
3496 add_insn_after (rtx insn, rtx after)
3498 rtx next = NEXT_INSN (after);
3501 if (optimize && INSN_DELETED_P (after))
3504 NEXT_INSN (insn) = next;
3505 PREV_INSN (insn) = after;
3509 PREV_INSN (next) = insn;
3510 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3511 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3513 else if (last_insn == after)
3517 struct sequence_stack *stack = seq_stack;
3518 /* Scan all pending sequences too. */
3519 for (; stack; stack = stack->next)
3520 if (after == stack->last)
3530 if (!BARRIER_P (after)
3531 && !BARRIER_P (insn)
3532 && (bb = BLOCK_FOR_INSN (after)))
3534 set_block_for_insn (insn, bb);
3536 bb->flags |= BB_DIRTY;
3537 /* Should not happen as first in the BB is always
3538 either NOTE or LABEL. */
3539 if (BB_END (bb) == after
3540 /* Avoid clobbering of structure when creating new BB. */
3541 && !BARRIER_P (insn)
3543 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3547 NEXT_INSN (after) = insn;
3548 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3550 rtx sequence = PATTERN (after);
3551 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3555 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3556 the previous should be the only functions called to insert an insn once
3557 delay slots have been filled since only they know how to update a
3561 add_insn_before (rtx insn, rtx before)
3563 rtx prev = PREV_INSN (before);
3566 if (optimize && INSN_DELETED_P (before))
3569 PREV_INSN (insn) = prev;
3570 NEXT_INSN (insn) = before;
3574 NEXT_INSN (prev) = insn;
3575 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3577 rtx sequence = PATTERN (prev);
3578 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3581 else if (first_insn == before)
3585 struct sequence_stack *stack = seq_stack;
3586 /* Scan all pending sequences too. */
3587 for (; stack; stack = stack->next)
3588 if (before == stack->first)
3590 stack->first = insn;
3598 if (!BARRIER_P (before)
3599 && !BARRIER_P (insn)
3600 && (bb = BLOCK_FOR_INSN (before)))
3602 set_block_for_insn (insn, bb);
3604 bb->flags |= BB_DIRTY;
3605 /* Should not happen as first in the BB is always
3606 either NOTE or LABEl. */
3607 if (BB_HEAD (bb) == insn
3608 /* Avoid clobbering of structure when creating new BB. */
3609 && !BARRIER_P (insn)
3611 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3615 PREV_INSN (before) = insn;
3616 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3617 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3620 /* Remove an insn from its doubly-linked list. This function knows how
3621 to handle sequences. */
3623 remove_insn (rtx insn)
3625 rtx next = NEXT_INSN (insn);
3626 rtx prev = PREV_INSN (insn);
3631 NEXT_INSN (prev) = next;
3632 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3634 rtx sequence = PATTERN (prev);
3635 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3638 else if (first_insn == insn)
3642 struct sequence_stack *stack = seq_stack;
3643 /* Scan all pending sequences too. */
3644 for (; stack; stack = stack->next)
3645 if (insn == stack->first)
3647 stack->first = next;
3657 PREV_INSN (next) = prev;
3658 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3659 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3661 else if (last_insn == insn)
3665 struct sequence_stack *stack = seq_stack;
3666 /* Scan all pending sequences too. */
3667 for (; stack; stack = stack->next)
3668 if (insn == stack->last)
3677 if (!BARRIER_P (insn)
3678 && (bb = BLOCK_FOR_INSN (insn)))
3681 bb->flags |= BB_DIRTY;
3682 if (BB_HEAD (bb) == insn)
3684 /* Never ever delete the basic block note without deleting whole
3688 BB_HEAD (bb) = next;
3690 if (BB_END (bb) == insn)
3695 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3698 add_function_usage_to (rtx call_insn, rtx call_fusage)
3700 if (! call_insn || !CALL_P (call_insn))
3703 /* Put the register usage information on the CALL. If there is already
3704 some usage information, put ours at the end. */
3705 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3709 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3710 link = XEXP (link, 1))
3713 XEXP (link, 1) = call_fusage;
3716 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3719 /* Delete all insns made since FROM.
3720 FROM becomes the new last instruction. */
3723 delete_insns_since (rtx from)
3728 NEXT_INSN (from) = 0;
3732 /* This function is deprecated, please use sequences instead.
3734 Move a consecutive bunch of insns to a different place in the chain.
3735 The insns to be moved are those between FROM and TO.
3736 They are moved to a new position after the insn AFTER.
3737 AFTER must not be FROM or TO or any insn in between.
3739 This function does not know about SEQUENCEs and hence should not be
3740 called after delay-slot filling has been done. */
3743 reorder_insns_nobb (rtx from, rtx to, rtx after)
3745 /* Splice this bunch out of where it is now. */
3746 if (PREV_INSN (from))
3747 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3749 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3750 if (last_insn == to)
3751 last_insn = PREV_INSN (from);
3752 if (first_insn == from)
3753 first_insn = NEXT_INSN (to);
3755 /* Make the new neighbors point to it and it to them. */
3756 if (NEXT_INSN (after))
3757 PREV_INSN (NEXT_INSN (after)) = to;
3759 NEXT_INSN (to) = NEXT_INSN (after);
3760 PREV_INSN (from) = after;
3761 NEXT_INSN (after) = from;
3762 if (after == last_insn)
3766 /* Same as function above, but take care to update BB boundaries. */
3768 reorder_insns (rtx from, rtx to, rtx after)
3770 rtx prev = PREV_INSN (from);
3771 basic_block bb, bb2;
3773 reorder_insns_nobb (from, to, after);
3775 if (!BARRIER_P (after)
3776 && (bb = BLOCK_FOR_INSN (after)))
3779 bb->flags |= BB_DIRTY;
3781 if (!BARRIER_P (from)
3782 && (bb2 = BLOCK_FOR_INSN (from)))
3784 if (BB_END (bb2) == to)
3785 BB_END (bb2) = prev;
3786 bb2->flags |= BB_DIRTY;
3789 if (BB_END (bb) == after)
3792 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3794 set_block_for_insn (x, bb);
3798 /* Return the line note insn preceding INSN. */
3801 find_line_note (rtx insn)
3803 if (no_line_numbers)
3806 for (; insn; insn = PREV_INSN (insn))
3808 && NOTE_LINE_NUMBER (insn) >= 0)
3814 /* Remove unnecessary notes from the instruction stream. */
3817 remove_unnecessary_notes (void)
3819 rtx block_stack = NULL_RTX;
3820 rtx eh_stack = NULL_RTX;
3825 /* We must not remove the first instruction in the function because
3826 the compiler depends on the first instruction being a note. */
3827 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3829 /* Remember what's next. */
3830 next = NEXT_INSN (insn);
3832 /* We're only interested in notes. */
3836 switch (NOTE_LINE_NUMBER (insn))
3838 case NOTE_INSN_DELETED:
3842 case NOTE_INSN_EH_REGION_BEG:
3843 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3846 case NOTE_INSN_EH_REGION_END:
3847 /* Too many end notes. */
3848 if (eh_stack == NULL_RTX)
3850 /* Mismatched nesting. */
3851 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3854 eh_stack = XEXP (eh_stack, 1);
3855 free_INSN_LIST_node (tmp);
3858 case NOTE_INSN_BLOCK_BEG:
3859 /* By now, all notes indicating lexical blocks should have
3860 NOTE_BLOCK filled in. */
3861 if (NOTE_BLOCK (insn) == NULL_TREE)
3863 block_stack = alloc_INSN_LIST (insn, block_stack);
3866 case NOTE_INSN_BLOCK_END:
3867 /* Too many end notes. */
3868 if (block_stack == NULL_RTX)
3870 /* Mismatched nesting. */
3871 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3874 block_stack = XEXP (block_stack, 1);
3875 free_INSN_LIST_node (tmp);
3877 /* Scan back to see if there are any non-note instructions
3878 between INSN and the beginning of this block. If not,
3879 then there is no PC range in the generated code that will
3880 actually be in this block, so there's no point in
3881 remembering the existence of the block. */
3882 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3884 /* This block contains a real instruction. Note that we
3885 don't include labels; if the only thing in the block
3886 is a label, then there are still no PC values that
3887 lie within the block. */
3891 /* We're only interested in NOTEs. */
3895 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3897 /* We just verified that this BLOCK matches us with
3898 the block_stack check above. Never delete the
3899 BLOCK for the outermost scope of the function; we
3900 can refer to names from that scope even if the
3901 block notes are messed up. */
3902 if (! is_body_block (NOTE_BLOCK (insn))
3903 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3910 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3911 /* There's a nested block. We need to leave the
3912 current block in place since otherwise the debugger
3913 wouldn't be able to show symbols from our block in
3914 the nested block. */
3920 /* Too many begin notes. */
3921 if (block_stack || eh_stack)
3926 /* Emit insn(s) of given code and pattern
3927 at a specified place within the doubly-linked list.
3929 All of the emit_foo global entry points accept an object
3930 X which is either an insn list or a PATTERN of a single
3933 There are thus a few canonical ways to generate code and
3934 emit it at a specific place in the instruction stream. For
3935 example, consider the instruction named SPOT and the fact that
3936 we would like to emit some instructions before SPOT. We might
3940 ... emit the new instructions ...
3941 insns_head = get_insns ();
3944 emit_insn_before (insns_head, SPOT);
3946 It used to be common to generate SEQUENCE rtl instead, but that
3947 is a relic of the past which no longer occurs. The reason is that
3948 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3949 generated would almost certainly die right after it was created. */
3951 /* Make X be output before the instruction BEFORE. */
3954 emit_insn_before (rtx x, rtx before)
3959 #ifdef ENABLE_RTL_CHECKING
3960 if (before == NULL_RTX)
3967 switch (GET_CODE (x))
3978 rtx next = NEXT_INSN (insn);
3979 add_insn_before (insn, before);
3985 #ifdef ENABLE_RTL_CHECKING
3992 last = make_insn_raw (x);
3993 add_insn_before (last, before);
4000 /* Make an instruction with body X and code JUMP_INSN
4001 and output it before the instruction BEFORE. */
4004 emit_jump_insn_before (rtx x, rtx before)
4006 rtx insn, last = NULL_RTX;
4008 #ifdef ENABLE_RTL_CHECKING
4009 if (before == NULL_RTX)
4013 switch (GET_CODE (x))
4024 rtx next = NEXT_INSN (insn);
4025 add_insn_before (insn, before);
4031 #ifdef ENABLE_RTL_CHECKING
4038 last = make_jump_insn_raw (x);
4039 add_insn_before (last, before);
4046 /* Make an instruction with body X and code CALL_INSN
4047 and output it before the instruction BEFORE. */
4050 emit_call_insn_before (rtx x, rtx before)
4052 rtx last = NULL_RTX, insn;
4054 #ifdef ENABLE_RTL_CHECKING
4055 if (before == NULL_RTX)
4059 switch (GET_CODE (x))
4070 rtx next = NEXT_INSN (insn);
4071 add_insn_before (insn, before);
4077 #ifdef ENABLE_RTL_CHECKING
4084 last = make_call_insn_raw (x);
4085 add_insn_before (last, before);
4092 /* Make an insn of code BARRIER
4093 and output it before the insn BEFORE. */
4096 emit_barrier_before (rtx before)
4098 rtx insn = rtx_alloc (BARRIER);
4100 INSN_UID (insn) = cur_insn_uid++;
4102 add_insn_before (insn, before);
4106 /* Emit the label LABEL before the insn BEFORE. */
4109 emit_label_before (rtx label, rtx before)
4111 /* This can be called twice for the same label as a result of the
4112 confusion that follows a syntax error! So make it harmless. */
4113 if (INSN_UID (label) == 0)
4115 INSN_UID (label) = cur_insn_uid++;
4116 add_insn_before (label, before);
4122 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4125 emit_note_before (int subtype, rtx before)
4127 rtx note = rtx_alloc (NOTE);
4128 INSN_UID (note) = cur_insn_uid++;
4129 #ifndef USE_MAPPED_LOCATION
4130 NOTE_SOURCE_FILE (note) = 0;
4132 NOTE_LINE_NUMBER (note) = subtype;
4133 BLOCK_FOR_INSN (note) = NULL;
4135 add_insn_before (note, before);
4139 /* Helper for emit_insn_after, handles lists of instructions
4142 static rtx emit_insn_after_1 (rtx, rtx);
4145 emit_insn_after_1 (rtx first, rtx after)
4151 if (!BARRIER_P (after)
4152 && (bb = BLOCK_FOR_INSN (after)))
4154 bb->flags |= BB_DIRTY;
4155 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4156 if (!BARRIER_P (last))
4157 set_block_for_insn (last, bb);
4158 if (!BARRIER_P (last))
4159 set_block_for_insn (last, bb);
4160 if (BB_END (bb) == after)
4164 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4167 after_after = NEXT_INSN (after);
4169 NEXT_INSN (after) = first;
4170 PREV_INSN (first) = after;
4171 NEXT_INSN (last) = after_after;
4173 PREV_INSN (after_after) = last;
4175 if (after == last_insn)
4180 /* Make X be output after the insn AFTER. */
4183 emit_insn_after (rtx x, rtx after)
4187 #ifdef ENABLE_RTL_CHECKING
4188 if (after == NULL_RTX)
4195 switch (GET_CODE (x))
4203 last = emit_insn_after_1 (x, after);
4206 #ifdef ENABLE_RTL_CHECKING
4213 last = make_insn_raw (x);
4214 add_insn_after (last, after);
4221 /* Similar to emit_insn_after, except that line notes are to be inserted so
4222 as to act as if this insn were at FROM. */
4225 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4227 rtx from_line = find_line_note (from);
4228 rtx after_line = find_line_note (after);
4229 rtx insn = emit_insn_after (x, after);
4232 emit_note_copy_after (from_line, after);
4235 emit_note_copy_after (after_line, insn);
4238 /* Make an insn of code JUMP_INSN with body X
4239 and output it after the insn AFTER. */
4242 emit_jump_insn_after (rtx x, rtx after)
4246 #ifdef ENABLE_RTL_CHECKING
4247 if (after == NULL_RTX)
4251 switch (GET_CODE (x))
4259 last = emit_insn_after_1 (x, after);
4262 #ifdef ENABLE_RTL_CHECKING
4269 last = make_jump_insn_raw (x);
4270 add_insn_after (last, after);
4277 /* Make an instruction with body X and code CALL_INSN
4278 and output it after the instruction AFTER. */
4281 emit_call_insn_after (rtx x, rtx after)
4285 #ifdef ENABLE_RTL_CHECKING
4286 if (after == NULL_RTX)
4290 switch (GET_CODE (x))
4298 last = emit_insn_after_1 (x, after);
4301 #ifdef ENABLE_RTL_CHECKING
4308 last = make_call_insn_raw (x);
4309 add_insn_after (last, after);
4316 /* Make an insn of code BARRIER
4317 and output it after the insn AFTER. */
4320 emit_barrier_after (rtx after)
4322 rtx insn = rtx_alloc (BARRIER);
4324 INSN_UID (insn) = cur_insn_uid++;
4326 add_insn_after (insn, after);
4330 /* Emit the label LABEL after the insn AFTER. */
4333 emit_label_after (rtx label, rtx after)
4335 /* This can be called twice for the same label
4336 as a result of the confusion that follows a syntax error!
4337 So make it harmless. */
4338 if (INSN_UID (label) == 0)
4340 INSN_UID (label) = cur_insn_uid++;
4341 add_insn_after (label, after);
4347 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4350 emit_note_after (int subtype, rtx after)
4352 rtx note = rtx_alloc (NOTE);
4353 INSN_UID (note) = cur_insn_uid++;
4354 #ifndef USE_MAPPED_LOCATION
4355 NOTE_SOURCE_FILE (note) = 0;
4357 NOTE_LINE_NUMBER (note) = subtype;
4358 BLOCK_FOR_INSN (note) = NULL;
4359 add_insn_after (note, after);
4363 /* Emit a copy of note ORIG after the insn AFTER. */
4366 emit_note_copy_after (rtx orig, rtx after)
4370 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4376 note = rtx_alloc (NOTE);
4377 INSN_UID (note) = cur_insn_uid++;
4378 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4379 NOTE_DATA (note) = NOTE_DATA (orig);
4380 BLOCK_FOR_INSN (note) = NULL;
4381 add_insn_after (note, after);
4385 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4387 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4389 rtx last = emit_insn_after (pattern, after);
4391 if (pattern == NULL_RTX)
4394 after = NEXT_INSN (after);
4397 if (active_insn_p (after))
4398 INSN_LOCATOR (after) = loc;
4401 after = NEXT_INSN (after);
4406 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4408 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4410 rtx last = emit_jump_insn_after (pattern, after);
4412 if (pattern == NULL_RTX)
4415 after = NEXT_INSN (after);
4418 if (active_insn_p (after))
4419 INSN_LOCATOR (after) = loc;
4422 after = NEXT_INSN (after);
4427 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4429 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4431 rtx last = emit_call_insn_after (pattern, after);
4433 if (pattern == NULL_RTX)
4436 after = NEXT_INSN (after);
4439 if (active_insn_p (after))
4440 INSN_LOCATOR (after) = loc;
4443 after = NEXT_INSN (after);
4448 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4450 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4452 rtx first = PREV_INSN (before);
4453 rtx last = emit_insn_before (pattern, before);
4455 if (pattern == NULL_RTX)
4458 first = NEXT_INSN (first);
4461 if (active_insn_p (first))
4462 INSN_LOCATOR (first) = loc;
4465 first = NEXT_INSN (first);
4470 /* Take X and emit it at the end of the doubly-linked
4473 Returns the last insn emitted. */
4478 rtx last = last_insn;
4484 switch (GET_CODE (x))
4495 rtx next = NEXT_INSN (insn);
4502 #ifdef ENABLE_RTL_CHECKING
4509 last = make_insn_raw (x);
4517 /* Make an insn of code JUMP_INSN with pattern X
4518 and add it to the end of the doubly-linked list. */
4521 emit_jump_insn (rtx x)
4523 rtx last = NULL_RTX, insn;
4525 switch (GET_CODE (x))
4536 rtx next = NEXT_INSN (insn);
4543 #ifdef ENABLE_RTL_CHECKING
4550 last = make_jump_insn_raw (x);
4558 /* Make an insn of code CALL_INSN with pattern X
4559 and add it to the end of the doubly-linked list. */
4562 emit_call_insn (rtx x)
4566 switch (GET_CODE (x))
4574 insn = emit_insn (x);
4577 #ifdef ENABLE_RTL_CHECKING
4584 insn = make_call_insn_raw (x);
4592 /* Add the label LABEL to the end of the doubly-linked list. */
4595 emit_label (rtx label)
4597 /* This can be called twice for the same label
4598 as a result of the confusion that follows a syntax error!
4599 So make it harmless. */
4600 if (INSN_UID (label) == 0)
4602 INSN_UID (label) = cur_insn_uid++;
4608 /* Make an insn of code BARRIER
4609 and add it to the end of the doubly-linked list. */
4614 rtx barrier = rtx_alloc (BARRIER);
4615 INSN_UID (barrier) = cur_insn_uid++;
4620 /* Make line numbering NOTE insn for LOCATION add it to the end
4621 of the doubly-linked list, but only if line-numbers are desired for
4622 debugging info and it doesn't match the previous one. */
4625 emit_line_note (location_t location)
4629 set_file_and_line_for_stmt (location);
4631 #ifdef USE_MAPPED_LOCATION
4632 if (location == last_location)
4635 if (location.file && last_location.file
4636 && !strcmp (location.file, last_location.file)
4637 && location.line == last_location.line)
4640 last_location = location;
4642 if (no_line_numbers)
4648 #ifdef USE_MAPPED_LOCATION
4649 note = emit_note ((int) location);
4651 note = emit_note (location.line);
4652 NOTE_SOURCE_FILE (note) = location.file;
4658 /* Emit a copy of note ORIG. */
4661 emit_note_copy (rtx orig)
4665 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4671 note = rtx_alloc (NOTE);
4673 INSN_UID (note) = cur_insn_uid++;
4674 NOTE_DATA (note) = NOTE_DATA (orig);
4675 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4676 BLOCK_FOR_INSN (note) = NULL;
4682 /* Make an insn of code NOTE or type NOTE_NO
4683 and add it to the end of the doubly-linked list. */
4686 emit_note (int note_no)
4690 note = rtx_alloc (NOTE);
4691 INSN_UID (note) = cur_insn_uid++;
4692 NOTE_LINE_NUMBER (note) = note_no;
4693 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4694 BLOCK_FOR_INSN (note) = NULL;
4699 /* Cause next statement to emit a line note even if the line number
4703 force_next_line_note (void)
4705 #ifdef USE_MAPPED_LOCATION
4708 last_location.line = -1;
4712 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4713 note of this type already exists, remove it first. */
4716 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4718 rtx note = find_reg_note (insn, kind, NULL_RTX);
4724 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4725 has multiple sets (some callers assume single_set
4726 means the insn only has one set, when in fact it
4727 means the insn only has one * useful * set). */
4728 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4735 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4736 It serves no useful purpose and breaks eliminate_regs. */
4737 if (GET_CODE (datum) == ASM_OPERANDS)
4747 XEXP (note, 0) = datum;
4751 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4752 return REG_NOTES (insn);
4755 /* Return an indication of which type of insn should have X as a body.
4756 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4759 classify_insn (rtx x)
4763 if (GET_CODE (x) == CALL)
4765 if (GET_CODE (x) == RETURN)
4767 if (GET_CODE (x) == SET)
4769 if (SET_DEST (x) == pc_rtx)
4771 else if (GET_CODE (SET_SRC (x)) == CALL)
4776 if (GET_CODE (x) == PARALLEL)
4779 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4780 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4782 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4783 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4785 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4786 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4792 /* Emit the rtl pattern X as an appropriate kind of insn.
4793 If X is a label, it is simply added into the insn chain. */
4798 enum rtx_code code = classify_insn (x);
4800 if (code == CODE_LABEL)
4801 return emit_label (x);
4802 else if (code == INSN)
4803 return emit_insn (x);
4804 else if (code == JUMP_INSN)
4806 rtx insn = emit_jump_insn (x);
4807 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4808 return emit_barrier ();
4811 else if (code == CALL_INSN)
4812 return emit_call_insn (x);
4817 /* Space for free sequence stack entries. */
4818 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4820 /* Begin emitting insns to a sequence. If this sequence will contain
4821 something that might cause the compiler to pop arguments to function
4822 calls (because those pops have previously been deferred; see
4823 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4824 before calling this function. That will ensure that the deferred
4825 pops are not accidentally emitted in the middle of this sequence. */
4828 start_sequence (void)
4830 struct sequence_stack *tem;
4832 if (free_sequence_stack != NULL)
4834 tem = free_sequence_stack;
4835 free_sequence_stack = tem->next;
4838 tem = ggc_alloc (sizeof (struct sequence_stack));
4840 tem->next = seq_stack;
4841 tem->first = first_insn;
4842 tem->last = last_insn;
4850 /* Set up the insn chain starting with FIRST as the current sequence,
4851 saving the previously current one. See the documentation for
4852 start_sequence for more information about how to use this function. */
4855 push_to_sequence (rtx first)
4861 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4867 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4870 push_to_full_sequence (rtx first, rtx last)
4875 /* We really should have the end of the insn chain here. */
4876 if (last && NEXT_INSN (last))
4880 /* Set up the outer-level insn chain
4881 as the current sequence, saving the previously current one. */
4884 push_topmost_sequence (void)
4886 struct sequence_stack *stack, *top = NULL;
4890 for (stack = seq_stack; stack; stack = stack->next)
4893 first_insn = top->first;
4894 last_insn = top->last;
4897 /* After emitting to the outer-level insn chain, update the outer-level
4898 insn chain, and restore the previous saved state. */
4901 pop_topmost_sequence (void)
4903 struct sequence_stack *stack, *top = NULL;
4905 for (stack = seq_stack; stack; stack = stack->next)
4908 top->first = first_insn;
4909 top->last = last_insn;
4914 /* After emitting to a sequence, restore previous saved state.
4916 To get the contents of the sequence just made, you must call
4917 `get_insns' *before* calling here.
4919 If the compiler might have deferred popping arguments while
4920 generating this sequence, and this sequence will not be immediately
4921 inserted into the instruction stream, use do_pending_stack_adjust
4922 before calling get_insns. That will ensure that the deferred
4923 pops are inserted into this sequence, and not into some random
4924 location in the instruction stream. See INHIBIT_DEFER_POP for more
4925 information about deferred popping of arguments. */
4930 struct sequence_stack *tem = seq_stack;
4932 first_insn = tem->first;
4933 last_insn = tem->last;
4934 seq_stack = tem->next;
4936 memset (tem, 0, sizeof (*tem));
4937 tem->next = free_sequence_stack;
4938 free_sequence_stack = tem;
4941 /* Return 1 if currently emitting into a sequence. */
4944 in_sequence_p (void)
4946 return seq_stack != 0;
4949 /* Put the various virtual registers into REGNO_REG_RTX. */
4952 init_virtual_regs (struct emit_status *es)
4954 rtx *ptr = es->x_regno_reg_rtx;
4955 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4956 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4957 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4958 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4959 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4963 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4964 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4965 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4966 static int copy_insn_n_scratches;
4968 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4969 copied an ASM_OPERANDS.
4970 In that case, it is the original input-operand vector. */
4971 static rtvec orig_asm_operands_vector;
4973 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4974 copied an ASM_OPERANDS.
4975 In that case, it is the copied input-operand vector. */
4976 static rtvec copy_asm_operands_vector;
4978 /* Likewise for the constraints vector. */
4979 static rtvec orig_asm_constraints_vector;
4980 static rtvec copy_asm_constraints_vector;
4982 /* Recursively create a new copy of an rtx for copy_insn.
4983 This function differs from copy_rtx in that it handles SCRATCHes and
4984 ASM_OPERANDs properly.
4985 Normally, this function is not used directly; use copy_insn as front end.
4986 However, you could first copy an insn pattern with copy_insn and then use
4987 this function afterwards to properly copy any REG_NOTEs containing
4991 copy_insn_1 (rtx orig)
4996 const char *format_ptr;
4998 code = GET_CODE (orig);
5012 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5017 for (i = 0; i < copy_insn_n_scratches; i++)
5018 if (copy_insn_scratch_in[i] == orig)
5019 return copy_insn_scratch_out[i];
5023 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5024 a LABEL_REF, it isn't sharable. */
5025 if (GET_CODE (XEXP (orig, 0)) == PLUS
5026 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5027 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5031 /* A MEM with a constant address is not sharable. The problem is that
5032 the constant address may need to be reloaded. If the mem is shared,
5033 then reloading one copy of this mem will cause all copies to appear
5034 to have been reloaded. */
5040 copy = rtx_alloc (code);
5042 /* Copy the various flags, and other information. We assume that
5043 all fields need copying, and then clear the fields that should
5044 not be copied. That is the sensible default behavior, and forces
5045 us to explicitly document why we are *not* copying a flag. */
5046 memcpy (copy, orig, RTX_HDR_SIZE);
5048 /* We do not copy the USED flag, which is used as a mark bit during
5049 walks over the RTL. */
5050 RTX_FLAG (copy, used) = 0;
5052 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5055 RTX_FLAG (copy, jump) = 0;
5056 RTX_FLAG (copy, call) = 0;
5057 RTX_FLAG (copy, frame_related) = 0;
5060 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5062 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5064 copy->u.fld[i] = orig->u.fld[i];
5065 switch (*format_ptr++)
5068 if (XEXP (orig, i) != NULL)
5069 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5074 if (XVEC (orig, i) == orig_asm_constraints_vector)
5075 XVEC (copy, i) = copy_asm_constraints_vector;
5076 else if (XVEC (orig, i) == orig_asm_operands_vector)
5077 XVEC (copy, i) = copy_asm_operands_vector;
5078 else if (XVEC (orig, i) != NULL)
5080 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5081 for (j = 0; j < XVECLEN (copy, i); j++)
5082 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5093 /* These are left unchanged. */
5101 if (code == SCRATCH)
5103 i = copy_insn_n_scratches++;
5104 if (i >= MAX_RECOG_OPERANDS)
5106 copy_insn_scratch_in[i] = orig;
5107 copy_insn_scratch_out[i] = copy;
5109 else if (code == ASM_OPERANDS)
5111 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5112 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5113 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5114 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5120 /* Create a new copy of an rtx.
5121 This function differs from copy_rtx in that it handles SCRATCHes and
5122 ASM_OPERANDs properly.
5123 INSN doesn't really have to be a full INSN; it could be just the
5126 copy_insn (rtx insn)
5128 copy_insn_n_scratches = 0;
5129 orig_asm_operands_vector = 0;
5130 orig_asm_constraints_vector = 0;
5131 copy_asm_operands_vector = 0;
5132 copy_asm_constraints_vector = 0;
5133 return copy_insn_1 (insn);
5136 /* Initialize data structures and variables in this file
5137 before generating rtl for each function. */
5142 struct function *f = cfun;
5144 f->emit = ggc_alloc (sizeof (struct emit_status));
5148 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5149 last_location = UNKNOWN_LOCATION;
5150 first_label_num = label_num;
5154 /* Init the tables that describe all the pseudo regs. */
5156 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5158 f->emit->regno_pointer_align
5159 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5160 * sizeof (unsigned char));
5163 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5165 /* Put copies of all the hard registers into regno_reg_rtx. */
5166 memcpy (regno_reg_rtx,
5167 static_regno_reg_rtx,
5168 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5170 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5171 init_virtual_regs (f->emit);
5173 /* Indicate that the virtual registers and stack locations are
5175 REG_POINTER (stack_pointer_rtx) = 1;
5176 REG_POINTER (frame_pointer_rtx) = 1;
5177 REG_POINTER (hard_frame_pointer_rtx) = 1;
5178 REG_POINTER (arg_pointer_rtx) = 1;
5180 REG_POINTER (virtual_incoming_args_rtx) = 1;
5181 REG_POINTER (virtual_stack_vars_rtx) = 1;
5182 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5183 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5184 REG_POINTER (virtual_cfa_rtx) = 1;
5186 #ifdef STACK_BOUNDARY
5187 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5188 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5189 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5190 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5192 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5193 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5194 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5195 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5196 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5199 #ifdef INIT_EXPANDERS
5204 /* Generate the constant 0. */
5207 gen_const_vector_0 (enum machine_mode mode)
5212 enum machine_mode inner;
5214 units = GET_MODE_NUNITS (mode);
5215 inner = GET_MODE_INNER (mode);
5217 v = rtvec_alloc (units);
5219 /* We need to call this function after we to set CONST0_RTX first. */
5220 if (!CONST0_RTX (inner))
5223 for (i = 0; i < units; ++i)
5224 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5226 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5230 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5231 all elements are zero. */
5233 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5235 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5238 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5239 if (RTVEC_ELT (v, i) != inner_zero)
5240 return gen_rtx_raw_CONST_VECTOR (mode, v);
5241 return CONST0_RTX (mode);
5244 /* Create some permanent unique rtl objects shared between all functions.
5245 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5248 init_emit_once (int line_numbers)
5251 enum machine_mode mode;
5252 enum machine_mode double_mode;
5254 /* We need reg_raw_mode, so initialize the modes now. */
5255 init_reg_modes_once ();
5257 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5259 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5260 const_int_htab_eq, NULL);
5262 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5263 const_double_htab_eq, NULL);
5265 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5266 mem_attrs_htab_eq, NULL);
5267 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5268 reg_attrs_htab_eq, NULL);
5270 no_line_numbers = ! line_numbers;
5272 /* Compute the word and byte modes. */
5274 byte_mode = VOIDmode;
5275 word_mode = VOIDmode;
5276 double_mode = VOIDmode;
5278 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5279 mode = GET_MODE_WIDER_MODE (mode))
5281 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5282 && byte_mode == VOIDmode)
5285 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5286 && word_mode == VOIDmode)
5290 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5291 mode = GET_MODE_WIDER_MODE (mode))
5293 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5294 && double_mode == VOIDmode)
5298 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5300 /* Assign register numbers to the globally defined register rtx.
5301 This must be done at runtime because the register number field
5302 is in a union and some compilers can't initialize unions. */
5304 pc_rtx = gen_rtx_PC (VOIDmode);
5305 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5306 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5307 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5308 if (hard_frame_pointer_rtx == 0)
5309 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5310 HARD_FRAME_POINTER_REGNUM);
5311 if (arg_pointer_rtx == 0)
5312 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5313 virtual_incoming_args_rtx =
5314 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5315 virtual_stack_vars_rtx =
5316 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5317 virtual_stack_dynamic_rtx =
5318 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5319 virtual_outgoing_args_rtx =
5320 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5321 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5323 /* Initialize RTL for commonly used hard registers. These are
5324 copied into regno_reg_rtx as we begin to compile each function. */
5325 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5326 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5328 #ifdef INIT_EXPANDERS
5329 /* This is to initialize {init|mark|free}_machine_status before the first
5330 call to push_function_context_to. This is needed by the Chill front
5331 end which calls push_function_context_to before the first call to
5332 init_function_start. */
5336 /* Create the unique rtx's for certain rtx codes and operand values. */
5338 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5339 tries to use these variables. */
5340 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5341 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5342 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5344 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5345 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5346 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5348 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5350 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5351 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5352 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5353 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5354 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5355 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5356 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5358 dconsthalf = dconst1;
5359 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5361 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5363 /* Initialize mathematical constants for constant folding builtins.
5364 These constants need to be given to at least 160 bits precision. */
5365 real_from_string (&dconstpi,
5366 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5367 real_from_string (&dconste,
5368 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5370 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5372 REAL_VALUE_TYPE *r =
5373 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5375 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5376 mode = GET_MODE_WIDER_MODE (mode))
5377 const_tiny_rtx[i][(int) mode] =
5378 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5380 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5382 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5383 mode = GET_MODE_WIDER_MODE (mode))
5384 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5386 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5388 mode = GET_MODE_WIDER_MODE (mode))
5389 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5392 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5394 mode = GET_MODE_WIDER_MODE (mode))
5395 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5397 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5399 mode = GET_MODE_WIDER_MODE (mode))
5400 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5402 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5403 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5404 const_tiny_rtx[0][i] = const0_rtx;
5406 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5407 if (STORE_FLAG_VALUE == 1)
5408 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5410 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5411 return_address_pointer_rtx
5412 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5415 #ifdef STATIC_CHAIN_REGNUM
5416 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5418 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5419 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5420 static_chain_incoming_rtx
5421 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5424 static_chain_incoming_rtx = static_chain_rtx;
5428 static_chain_rtx = STATIC_CHAIN;
5430 #ifdef STATIC_CHAIN_INCOMING
5431 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5433 static_chain_incoming_rtx = static_chain_rtx;
5437 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5438 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5441 /* Produce exact duplicate of insn INSN after AFTER.
5442 Care updating of libcall regions if present. */
5445 emit_copy_of_insn_after (rtx insn, rtx after)
5448 rtx note1, note2, link;
5450 switch (GET_CODE (insn))
5453 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5457 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5461 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5462 if (CALL_INSN_FUNCTION_USAGE (insn))
5463 CALL_INSN_FUNCTION_USAGE (new)
5464 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5465 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5466 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5473 /* Update LABEL_NUSES. */
5474 mark_jump_label (PATTERN (new), new, 0);
5476 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5478 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5480 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5481 if (REG_NOTE_KIND (link) != REG_LABEL)
5483 if (GET_CODE (link) == EXPR_LIST)
5485 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5490 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5495 /* Fix the libcall sequences. */
5496 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5499 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5501 XEXP (note1, 0) = p;
5502 XEXP (note2, 0) = new;
5504 INSN_CODE (new) = INSN_CODE (insn);
5508 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5510 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5512 if (hard_reg_clobbers[mode][regno])
5513 return hard_reg_clobbers[mode][regno];
5515 return (hard_reg_clobbers[mode][regno] =
5516 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5519 #include "gt-emit-rtl.h"