1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* Datastructures maintained for currently processed function in RTL form. */
71 struct rtl_data x_rtl;
73 /* Indexed by pseudo register number, gives the rtx for that pseudo.
74 Allocated in parallel with regno_pointer_align.
75 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
76 with length attribute nested in top level structures. */
80 /* This is *not* reset after each function. It gives each CODE_LABEL
81 in the entire compilation a unique label number. */
83 static GTY(()) int label_num = 1;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconsthalf;
116 /* Record fixed-point constant 0 and 1. */
117 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
118 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 /* A hash table storing all CONST_FIXEDs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
173 htab_t const_fixed_htab;
175 #define first_insn (crtl->emit.x_first_insn)
176 #define last_insn (crtl->emit.x_last_insn)
177 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx make_call_insn_raw (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void set_used_decls (tree);
184 static void mark_label_nuses (rtx);
185 static hashval_t const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx lookup_const_double (rtx);
190 static hashval_t const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx lookup_const_fixed (rtx);
193 static hashval_t mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
197 static hashval_t reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs *get_reg_attrs (tree, int);
200 static tree component_ref_for_mem_expr (tree);
201 static rtx gen_const_vector (enum machine_mode, int);
202 static void copy_rtx_if_shared_1 (rtx *orig);
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability = -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (const void *x)
213 return (hashval_t) INTVAL ((const_rtx) x);
216 /* Returns nonzero if the value represented by X (which is really a
217 CONST_INT) is the same as that given by Y (which is really a
221 const_int_htab_eq (const void *x, const void *y)
223 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
226 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
228 const_double_htab_hash (const void *x)
230 const_rtx const value = (const_rtx) x;
233 if (GET_MODE (value) == VOIDmode)
234 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
237 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
238 /* MODE is used in the comparison, so it should be in the hash. */
239 h ^= GET_MODE (value);
244 /* Returns nonzero if the value represented by X (really a ...)
245 is the same as that represented by Y (really a ...) */
247 const_double_htab_eq (const void *x, const void *y)
249 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
251 if (GET_MODE (a) != GET_MODE (b))
253 if (GET_MODE (a) == VOIDmode)
254 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
255 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
257 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
258 CONST_DOUBLE_REAL_VALUE (b));
261 /* Returns a hash code for X (which is really a CONST_FIXED). */
264 const_fixed_htab_hash (const void *x)
266 const_rtx const value = (const_rtx) x;
269 h = fixed_hash (CONST_FIXED_VALUE (value));
270 /* MODE is used in the comparison, so it should be in the hash. */
271 h ^= GET_MODE (value);
275 /* Returns nonzero if the value represented by X (really a ...)
276 is the same as that represented by Y (really a ...). */
279 const_fixed_htab_eq (const void *x, const void *y)
281 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
283 if (GET_MODE (a) != GET_MODE (b))
285 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
288 /* Returns a hash code for X (which is a really a mem_attrs *). */
291 mem_attrs_htab_hash (const void *x)
293 const mem_attrs *const p = (const mem_attrs *) x;
295 return (p->alias ^ (p->align * 1000)
296 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
297 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
298 ^ (size_t) iterative_hash_expr (p->expr, 0));
301 /* Returns nonzero if the value represented by X (which is really a
302 mem_attrs *) is the same as that given by Y (which is also really a
306 mem_attrs_htab_eq (const void *x, const void *y)
308 const mem_attrs *const p = (const mem_attrs *) x;
309 const mem_attrs *const q = (const mem_attrs *) y;
311 return (p->alias == q->alias && p->offset == q->offset
312 && p->size == q->size && p->align == q->align
313 && (p->expr == q->expr
314 || (p->expr != NULL_TREE && q->expr != NULL_TREE
315 && operand_equal_p (p->expr, q->expr, 0))));
318 /* Allocate a new mem_attrs structure and insert it into the hash table if
319 one identical to it is not already in the table. We are doing this for
323 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
324 unsigned int align, enum machine_mode mode)
329 /* If everything is the default, we can just return zero.
330 This must match what the corresponding MEM_* macros return when the
331 field is not present. */
332 if (alias == 0 && expr == 0 && offset == 0
334 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
335 && (STRICT_ALIGNMENT && mode != BLKmode
336 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
341 attrs.offset = offset;
345 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
348 *slot = ggc_alloc (sizeof (mem_attrs));
349 memcpy (*slot, &attrs, sizeof (mem_attrs));
352 return (mem_attrs *) *slot;
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
358 reg_attrs_htab_hash (const void *x)
360 const reg_attrs *const p = (const reg_attrs *) x;
362 return ((p->offset * 1000) ^ (long) p->decl);
365 /* Returns nonzero if the value represented by X (which is really a
366 reg_attrs *) is the same as that given by Y (which is also really a
370 reg_attrs_htab_eq (const void *x, const void *y)
372 const reg_attrs *const p = (const reg_attrs *) x;
373 const reg_attrs *const q = (const reg_attrs *) y;
375 return (p->decl == q->decl && p->offset == q->offset);
377 /* Allocate a new reg_attrs structure and insert it into the hash table if
378 one identical to it is not already in the table. We are doing this for
382 get_reg_attrs (tree decl, int offset)
387 /* If everything is the default, we can just return zero. */
388 if (decl == 0 && offset == 0)
392 attrs.offset = offset;
394 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
397 *slot = ggc_alloc (sizeof (reg_attrs));
398 memcpy (*slot, &attrs, sizeof (reg_attrs));
401 return (reg_attrs *) *slot;
406 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
412 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
413 MEM_VOLATILE_P (x) = true;
419 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
420 don't attempt to share with the various global pieces of rtl (such as
421 frame_pointer_rtx). */
424 gen_raw_REG (enum machine_mode mode, int regno)
426 rtx x = gen_rtx_raw_REG (mode, regno);
427 ORIGINAL_REGNO (x) = regno;
431 /* There are some RTL codes that require special attention; the generation
432 functions do the raw handling. If you add to this list, modify
433 special_rtx in gengenrtl.c as well. */
436 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
440 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
441 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
443 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
444 if (const_true_rtx && arg == STORE_FLAG_VALUE)
445 return const_true_rtx;
448 /* Look up the CONST_INT in the hash table. */
449 slot = htab_find_slot_with_hash (const_int_htab, &arg,
450 (hashval_t) arg, INSERT);
452 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
458 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
460 return GEN_INT (trunc_int_for_mode (c, mode));
463 /* CONST_DOUBLEs might be created from pairs of integers, or from
464 REAL_VALUE_TYPEs. Also, their length is known only at run time,
465 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
467 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
468 hash table. If so, return its counterpart; otherwise add it
469 to the hash table and return it. */
471 lookup_const_double (rtx real)
473 void **slot = htab_find_slot (const_double_htab, real, INSERT);
480 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
481 VALUE in mode MODE. */
483 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
485 rtx real = rtx_alloc (CONST_DOUBLE);
486 PUT_MODE (real, mode);
490 return lookup_const_double (real);
493 /* Determine whether FIXED, a CONST_FIXED, already exists in the
494 hash table. If so, return its counterpart; otherwise add it
495 to the hash table and return it. */
498 lookup_const_fixed (rtx fixed)
500 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
507 /* Return a CONST_FIXED rtx for a fixed-point value specified by
508 VALUE in mode MODE. */
511 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
513 rtx fixed = rtx_alloc (CONST_FIXED);
514 PUT_MODE (fixed, mode);
518 return lookup_const_fixed (fixed);
521 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
522 of ints: I0 is the low-order word and I1 is the high-order word.
523 Do not use this routine for non-integer modes; convert to
524 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
527 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
532 /* There are the following cases (note that there are no modes with
533 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
535 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
537 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
538 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
539 from copies of the sign bit, and sign of i0 and i1 are the same), then
540 we return a CONST_INT for i0.
541 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
542 if (mode != VOIDmode)
544 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
545 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
546 /* We can get a 0 for an error mark. */
547 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
548 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
550 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
551 return gen_int_mode (i0, mode);
553 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
556 /* If this integer fits in one word, return a CONST_INT. */
557 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
560 /* We use VOIDmode for integers. */
561 value = rtx_alloc (CONST_DOUBLE);
562 PUT_MODE (value, VOIDmode);
564 CONST_DOUBLE_LOW (value) = i0;
565 CONST_DOUBLE_HIGH (value) = i1;
567 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
568 XWINT (value, i) = 0;
570 return lookup_const_double (value);
574 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
576 /* In case the MD file explicitly references the frame pointer, have
577 all such references point to the same frame pointer. This is
578 used during frame pointer elimination to distinguish the explicit
579 references to these registers from pseudos that happened to be
582 If we have eliminated the frame pointer or arg pointer, we will
583 be using it as a normal register, for example as a spill
584 register. In such cases, we might be accessing it in a mode that
585 is not Pmode and therefore cannot use the pre-allocated rtx.
587 Also don't do this when we are making new REGs in reload, since
588 we don't want to get confused with the real pointers. */
590 if (mode == Pmode && !reload_in_progress)
592 if (regno == FRAME_POINTER_REGNUM
593 && (!reload_completed || frame_pointer_needed))
594 return frame_pointer_rtx;
595 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
596 if (regno == HARD_FRAME_POINTER_REGNUM
597 && (!reload_completed || frame_pointer_needed))
598 return hard_frame_pointer_rtx;
600 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
601 if (regno == ARG_POINTER_REGNUM)
602 return arg_pointer_rtx;
604 #ifdef RETURN_ADDRESS_POINTER_REGNUM
605 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
606 return return_address_pointer_rtx;
608 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
609 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
610 return pic_offset_table_rtx;
611 if (regno == STACK_POINTER_REGNUM)
612 return stack_pointer_rtx;
616 /* If the per-function register table has been set up, try to re-use
617 an existing entry in that table to avoid useless generation of RTL.
619 This code is disabled for now until we can fix the various backends
620 which depend on having non-shared hard registers in some cases. Long
621 term we want to re-enable this code as it can significantly cut down
622 on the amount of useless RTL that gets generated.
624 We'll also need to fix some code that runs after reload that wants to
625 set ORIGINAL_REGNO. */
630 && regno < FIRST_PSEUDO_REGISTER
631 && reg_raw_mode[regno] == mode)
632 return regno_reg_rtx[regno];
635 return gen_raw_REG (mode, regno);
639 gen_rtx_MEM (enum machine_mode mode, rtx addr)
641 rtx rt = gen_rtx_raw_MEM (mode, addr);
643 /* This field is not cleared by the mere allocation of the rtx, so
650 /* Generate a memory referring to non-trapping constant memory. */
653 gen_const_mem (enum machine_mode mode, rtx addr)
655 rtx mem = gen_rtx_MEM (mode, addr);
656 MEM_READONLY_P (mem) = 1;
657 MEM_NOTRAP_P (mem) = 1;
661 /* Generate a MEM referring to fixed portions of the frame, e.g., register
665 gen_frame_mem (enum machine_mode mode, rtx addr)
667 rtx mem = gen_rtx_MEM (mode, addr);
668 MEM_NOTRAP_P (mem) = 1;
669 set_mem_alias_set (mem, get_frame_alias_set ());
673 /* Generate a MEM referring to a temporary use of the stack, not part
674 of the fixed stack frame. For example, something which is pushed
675 by a target splitter. */
677 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
679 rtx mem = gen_rtx_MEM (mode, addr);
680 MEM_NOTRAP_P (mem) = 1;
681 if (!cfun->calls_alloca)
682 set_mem_alias_set (mem, get_frame_alias_set ());
686 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
687 this construct would be valid, and false otherwise. */
690 validate_subreg (enum machine_mode omode, enum machine_mode imode,
691 const_rtx reg, unsigned int offset)
693 unsigned int isize = GET_MODE_SIZE (imode);
694 unsigned int osize = GET_MODE_SIZE (omode);
696 /* All subregs must be aligned. */
697 if (offset % osize != 0)
700 /* The subreg offset cannot be outside the inner object. */
704 /* ??? This should not be here. Temporarily continue to allow word_mode
705 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
706 Generally, backends are doing something sketchy but it'll take time to
708 if (omode == word_mode)
710 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
711 is the culprit here, and not the backends. */
712 else if (osize >= UNITS_PER_WORD && isize >= osize)
714 /* Allow component subregs of complex and vector. Though given the below
715 extraction rules, it's not always clear what that means. */
716 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
717 && GET_MODE_INNER (imode) == omode)
719 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
720 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
721 represent this. It's questionable if this ought to be represented at
722 all -- why can't this all be hidden in post-reload splitters that make
723 arbitrarily mode changes to the registers themselves. */
724 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
726 /* Subregs involving floating point modes are not allowed to
727 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
728 (subreg:SI (reg:DF) 0) isn't. */
729 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
735 /* Paradoxical subregs must have offset zero. */
739 /* This is a normal subreg. Verify that the offset is representable. */
741 /* For hard registers, we already have most of these rules collected in
742 subreg_offset_representable_p. */
743 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
745 unsigned int regno = REGNO (reg);
747 #ifdef CANNOT_CHANGE_MODE_CLASS
748 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
749 && GET_MODE_INNER (imode) == omode)
751 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
755 return subreg_offset_representable_p (regno, imode, offset, omode);
758 /* For pseudo registers, we want most of the same checks. Namely:
759 If the register no larger than a word, the subreg must be lowpart.
760 If the register is larger than a word, the subreg must be the lowpart
761 of a subword. A subreg does *not* perform arbitrary bit extraction.
762 Given that we've already checked mode/offset alignment, we only have
763 to check subword subregs here. */
764 if (osize < UNITS_PER_WORD)
766 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
767 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
768 if (offset % UNITS_PER_WORD != low_off)
775 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
777 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
778 return gen_rtx_raw_SUBREG (mode, reg, offset);
781 /* Generate a SUBREG representing the least-significant part of REG if MODE
782 is smaller than mode of REG, otherwise paradoxical SUBREG. */
785 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
787 enum machine_mode inmode;
789 inmode = GET_MODE (reg);
790 if (inmode == VOIDmode)
792 return gen_rtx_SUBREG (mode, reg,
793 subreg_lowpart_offset (mode, inmode));
797 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
800 gen_rtvec (int n, ...)
808 /* Don't allocate an empty rtvec... */
812 rt_val = rtvec_alloc (n);
814 for (i = 0; i < n; i++)
815 rt_val->elem[i] = va_arg (p, rtx);
822 gen_rtvec_v (int n, rtx *argp)
827 /* Don't allocate an empty rtvec... */
831 rt_val = rtvec_alloc (n);
833 for (i = 0; i < n; i++)
834 rt_val->elem[i] = *argp++;
839 /* Return the number of bytes between the start of an OUTER_MODE
840 in-memory value and the start of an INNER_MODE in-memory value,
841 given that the former is a lowpart of the latter. It may be a
842 paradoxical lowpart, in which case the offset will be negative
843 on big-endian targets. */
846 byte_lowpart_offset (enum machine_mode outer_mode,
847 enum machine_mode inner_mode)
849 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
850 return subreg_lowpart_offset (outer_mode, inner_mode);
852 return -subreg_lowpart_offset (inner_mode, outer_mode);
855 /* Generate a REG rtx for a new pseudo register of mode MODE.
856 This pseudo is assigned the next sequential register number. */
859 gen_reg_rtx (enum machine_mode mode)
862 unsigned int align = GET_MODE_ALIGNMENT (mode);
864 gcc_assert (can_create_pseudo_p ());
866 /* If a virtual register with bigger mode alignment is generated,
867 increase stack alignment estimation because it might be spilled
869 if (SUPPORTS_STACK_ALIGNMENT
870 && crtl->stack_alignment_estimated < align
871 && !crtl->stack_realign_processed)
872 crtl->stack_alignment_estimated = align;
874 if (generating_concat_p
875 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
876 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
878 /* For complex modes, don't make a single pseudo.
879 Instead, make a CONCAT of two pseudos.
880 This allows noncontiguous allocation of the real and imaginary parts,
881 which makes much better code. Besides, allocating DCmode
882 pseudos overstrains reload on some machines like the 386. */
883 rtx realpart, imagpart;
884 enum machine_mode partmode = GET_MODE_INNER (mode);
886 realpart = gen_reg_rtx (partmode);
887 imagpart = gen_reg_rtx (partmode);
888 return gen_rtx_CONCAT (mode, realpart, imagpart);
891 /* Make sure regno_pointer_align, and regno_reg_rtx are large
892 enough to have an element for this pseudo reg number. */
894 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
896 int old_size = crtl->emit.regno_pointer_align_length;
900 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
901 memset (tmp + old_size, 0, old_size);
902 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
904 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
905 memset (new1 + old_size, 0, old_size * sizeof (rtx));
906 regno_reg_rtx = new1;
908 crtl->emit.regno_pointer_align_length = old_size * 2;
911 val = gen_raw_REG (mode, reg_rtx_no);
912 regno_reg_rtx[reg_rtx_no++] = val;
916 /* Update NEW with the same attributes as REG, but with OFFSET added
917 to the REG_OFFSET. */
920 update_reg_offset (rtx new_rtx, rtx reg, int offset)
922 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
923 REG_OFFSET (reg) + offset);
926 /* Generate a register with same attributes as REG, but with OFFSET
927 added to the REG_OFFSET. */
930 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
933 rtx new_rtx = gen_rtx_REG (mode, regno);
935 update_reg_offset (new_rtx, reg, offset);
939 /* Generate a new pseudo-register with the same attributes as REG, but
940 with OFFSET added to the REG_OFFSET. */
943 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
945 rtx new_rtx = gen_reg_rtx (mode);
947 update_reg_offset (new_rtx, reg, offset);
951 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
952 new register is a (possibly paradoxical) lowpart of the old one. */
955 adjust_reg_mode (rtx reg, enum machine_mode mode)
957 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
958 PUT_MODE (reg, mode);
961 /* Copy REG's attributes from X, if X has any attributes. If REG and X
962 have different modes, REG is a (possibly paradoxical) lowpart of X. */
965 set_reg_attrs_from_value (rtx reg, rtx x)
969 /* Hard registers can be reused for multiple purposes within the same
970 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
972 if (HARD_REGISTER_P (reg))
975 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
978 if (MEM_OFFSET (x) && GET_CODE (MEM_OFFSET (x)) == CONST_INT)
980 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
982 mark_reg_pointer (reg, 0);
987 update_reg_offset (reg, x, offset);
989 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
993 /* Generate a REG rtx for a new pseudo register, copying the mode
994 and attributes from X. */
997 gen_reg_rtx_and_attrs (rtx x)
999 rtx reg = gen_reg_rtx (GET_MODE (x));
1000 set_reg_attrs_from_value (reg, x);
1004 /* Set the register attributes for registers contained in PARM_RTX.
1005 Use needed values from memory attributes of MEM. */
1008 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1010 if (REG_P (parm_rtx))
1011 set_reg_attrs_from_value (parm_rtx, mem);
1012 else if (GET_CODE (parm_rtx) == PARALLEL)
1014 /* Check for a NULL entry in the first slot, used to indicate that the
1015 parameter goes both on the stack and in registers. */
1016 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1017 for (; i < XVECLEN (parm_rtx, 0); i++)
1019 rtx x = XVECEXP (parm_rtx, 0, i);
1020 if (REG_P (XEXP (x, 0)))
1021 REG_ATTRS (XEXP (x, 0))
1022 = get_reg_attrs (MEM_EXPR (mem),
1023 INTVAL (XEXP (x, 1)));
1028 /* Set the REG_ATTRS for registers in value X, given that X represents
1032 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1034 if (GET_CODE (x) == SUBREG)
1036 gcc_assert (subreg_lowpart_p (x));
1041 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1043 if (GET_CODE (x) == CONCAT)
1045 if (REG_P (XEXP (x, 0)))
1046 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1047 if (REG_P (XEXP (x, 1)))
1048 REG_ATTRS (XEXP (x, 1))
1049 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1051 if (GET_CODE (x) == PARALLEL)
1055 /* Check for a NULL entry, used to indicate that the parameter goes
1056 both on the stack and in registers. */
1057 if (XEXP (XVECEXP (x, 0, 0), 0))
1062 for (i = start; i < XVECLEN (x, 0); i++)
1064 rtx y = XVECEXP (x, 0, i);
1065 if (REG_P (XEXP (y, 0)))
1066 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1071 /* Assign the RTX X to declaration T. */
1074 set_decl_rtl (tree t, rtx x)
1076 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1078 set_reg_attrs_for_decl_rtl (t, x);
1081 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1082 if the ABI requires the parameter to be passed by reference. */
1085 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1087 DECL_INCOMING_RTL (t) = x;
1088 if (x && !by_reference_p)
1089 set_reg_attrs_for_decl_rtl (t, x);
1092 /* Identify REG (which may be a CONCAT) as a user register. */
1095 mark_user_reg (rtx reg)
1097 if (GET_CODE (reg) == CONCAT)
1099 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1100 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1104 gcc_assert (REG_P (reg));
1105 REG_USERVAR_P (reg) = 1;
1109 /* Identify REG as a probable pointer register and show its alignment
1110 as ALIGN, if nonzero. */
1113 mark_reg_pointer (rtx reg, int align)
1115 if (! REG_POINTER (reg))
1117 REG_POINTER (reg) = 1;
1120 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1122 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1123 /* We can no-longer be sure just how aligned this pointer is. */
1124 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1127 /* Return 1 plus largest pseudo reg number used in the current function. */
1135 /* Return 1 + the largest label number used so far in the current function. */
1138 max_label_num (void)
1143 /* Return first label number used in this function (if any were used). */
1146 get_first_label_num (void)
1148 return first_label_num;
1151 /* If the rtx for label was created during the expansion of a nested
1152 function, then first_label_num won't include this label number.
1153 Fix this now so that array indices work later. */
1156 maybe_set_first_label_num (rtx x)
1158 if (CODE_LABEL_NUMBER (x) < first_label_num)
1159 first_label_num = CODE_LABEL_NUMBER (x);
1162 /* Return a value representing some low-order bits of X, where the number
1163 of low-order bits is given by MODE. Note that no conversion is done
1164 between floating-point and fixed-point values, rather, the bit
1165 representation is returned.
1167 This function handles the cases in common between gen_lowpart, below,
1168 and two variants in cse.c and combine.c. These are the cases that can
1169 be safely handled at all points in the compilation.
1171 If this is not a case we can handle, return 0. */
1174 gen_lowpart_common (enum machine_mode mode, rtx x)
1176 int msize = GET_MODE_SIZE (mode);
1179 enum machine_mode innermode;
1181 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1182 so we have to make one up. Yuk. */
1183 innermode = GET_MODE (x);
1184 if (GET_CODE (x) == CONST_INT
1185 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1186 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1187 else if (innermode == VOIDmode)
1188 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1190 xsize = GET_MODE_SIZE (innermode);
1192 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1194 if (innermode == mode)
1197 /* MODE must occupy no more words than the mode of X. */
1198 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1199 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1202 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1203 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1206 offset = subreg_lowpart_offset (mode, innermode);
1208 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1209 && (GET_MODE_CLASS (mode) == MODE_INT
1210 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1212 /* If we are getting the low-order part of something that has been
1213 sign- or zero-extended, we can either just use the object being
1214 extended or make a narrower extension. If we want an even smaller
1215 piece than the size of the object being extended, call ourselves
1218 This case is used mostly by combine and cse. */
1220 if (GET_MODE (XEXP (x, 0)) == mode)
1222 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1223 return gen_lowpart_common (mode, XEXP (x, 0));
1224 else if (msize < xsize)
1225 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1227 else if (GET_CODE (x) == SUBREG || REG_P (x)
1228 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1229 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1230 return simplify_gen_subreg (mode, x, innermode, offset);
1232 /* Otherwise, we can't do this. */
1237 gen_highpart (enum machine_mode mode, rtx x)
1239 unsigned int msize = GET_MODE_SIZE (mode);
1242 /* This case loses if X is a subreg. To catch bugs early,
1243 complain if an invalid MODE is used even in other cases. */
1244 gcc_assert (msize <= UNITS_PER_WORD
1245 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1247 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1248 subreg_highpart_offset (mode, GET_MODE (x)));
1249 gcc_assert (result);
1251 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1252 the target if we have a MEM. gen_highpart must return a valid operand,
1253 emitting code if necessary to do so. */
1256 result = validize_mem (result);
1257 gcc_assert (result);
1263 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1264 be VOIDmode constant. */
1266 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1268 if (GET_MODE (exp) != VOIDmode)
1270 gcc_assert (GET_MODE (exp) == innermode);
1271 return gen_highpart (outermode, exp);
1273 return simplify_gen_subreg (outermode, exp, innermode,
1274 subreg_highpart_offset (outermode, innermode));
1277 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1280 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1282 unsigned int offset = 0;
1283 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1287 if (WORDS_BIG_ENDIAN)
1288 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1289 if (BYTES_BIG_ENDIAN)
1290 offset += difference % UNITS_PER_WORD;
1296 /* Return offset in bytes to get OUTERMODE high part
1297 of the value in mode INNERMODE stored in memory in target format. */
1299 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1301 unsigned int offset = 0;
1302 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1304 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1308 if (! WORDS_BIG_ENDIAN)
1309 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1310 if (! BYTES_BIG_ENDIAN)
1311 offset += difference % UNITS_PER_WORD;
1317 /* Return 1 iff X, assumed to be a SUBREG,
1318 refers to the least significant part of its containing reg.
1319 If X is not a SUBREG, always return 1 (it is its own low part!). */
1322 subreg_lowpart_p (const_rtx x)
1324 if (GET_CODE (x) != SUBREG)
1326 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1329 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1330 == SUBREG_BYTE (x));
1333 /* Return subword OFFSET of operand OP.
1334 The word number, OFFSET, is interpreted as the word number starting
1335 at the low-order address. OFFSET 0 is the low-order word if not
1336 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1338 If we cannot extract the required word, we return zero. Otherwise,
1339 an rtx corresponding to the requested word will be returned.
1341 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1342 reload has completed, a valid address will always be returned. After
1343 reload, if a valid address cannot be returned, we return zero.
1345 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1346 it is the responsibility of the caller.
1348 MODE is the mode of OP in case it is a CONST_INT.
1350 ??? This is still rather broken for some cases. The problem for the
1351 moment is that all callers of this thing provide no 'goal mode' to
1352 tell us to work with. This exists because all callers were written
1353 in a word based SUBREG world.
1354 Now use of this function can be deprecated by simplify_subreg in most
1359 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1361 if (mode == VOIDmode)
1362 mode = GET_MODE (op);
1364 gcc_assert (mode != VOIDmode);
1366 /* If OP is narrower than a word, fail. */
1368 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1371 /* If we want a word outside OP, return zero. */
1373 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1376 /* Form a new MEM at the requested address. */
1379 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1381 if (! validate_address)
1384 else if (reload_completed)
1386 if (! strict_memory_address_p (word_mode, XEXP (new_rtx, 0)))
1390 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1393 /* Rest can be handled by simplify_subreg. */
1394 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1397 /* Similar to `operand_subword', but never return 0. If we can't
1398 extract the required subword, put OP into a register and try again.
1399 The second attempt must succeed. We always validate the address in
1402 MODE is the mode of OP, in case it is CONST_INT. */
1405 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1407 rtx result = operand_subword (op, offset, 1, mode);
1412 if (mode != BLKmode && mode != VOIDmode)
1414 /* If this is a register which can not be accessed by words, copy it
1415 to a pseudo register. */
1417 op = copy_to_reg (op);
1419 op = force_reg (mode, op);
1422 result = operand_subword (op, offset, 1, mode);
1423 gcc_assert (result);
1428 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1429 or (2) a component ref of something variable. Represent the later with
1430 a NULL expression. */
1433 component_ref_for_mem_expr (tree ref)
1435 tree inner = TREE_OPERAND (ref, 0);
1437 if (TREE_CODE (inner) == COMPONENT_REF)
1438 inner = component_ref_for_mem_expr (inner);
1441 /* Now remove any conversions: they don't change what the underlying
1442 object is. Likewise for SAVE_EXPR. */
1443 while (CONVERT_EXPR_P (inner)
1444 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1445 || TREE_CODE (inner) == SAVE_EXPR)
1446 inner = TREE_OPERAND (inner, 0);
1448 if (! DECL_P (inner))
1452 if (inner == TREE_OPERAND (ref, 0))
1455 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1456 TREE_OPERAND (ref, 1), NULL_TREE);
1459 /* Returns 1 if both MEM_EXPR can be considered equal
1463 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1468 if (! expr1 || ! expr2)
1471 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1474 if (TREE_CODE (expr1) == COMPONENT_REF)
1476 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1477 TREE_OPERAND (expr2, 0))
1478 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1479 TREE_OPERAND (expr2, 1));
1481 if (INDIRECT_REF_P (expr1))
1482 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1483 TREE_OPERAND (expr2, 0));
1485 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1486 have been resolved here. */
1487 gcc_assert (DECL_P (expr1));
1489 /* Decls with different pointers can't be equal. */
1493 /* Given REF (a MEM) and T, either the type of X or the expression
1494 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1495 if we are making a new object of this type. BITPOS is nonzero if
1496 there is an offset outstanding on T that will be applied later. */
1499 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1500 HOST_WIDE_INT bitpos)
1502 alias_set_type alias = MEM_ALIAS_SET (ref);
1503 tree expr = MEM_EXPR (ref);
1504 rtx offset = MEM_OFFSET (ref);
1505 rtx size = MEM_SIZE (ref);
1506 unsigned int align = MEM_ALIGN (ref);
1507 HOST_WIDE_INT apply_bitpos = 0;
1510 /* It can happen that type_for_mode was given a mode for which there
1511 is no language-level type. In which case it returns NULL, which
1516 type = TYPE_P (t) ? t : TREE_TYPE (t);
1517 if (type == error_mark_node)
1520 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1521 wrong answer, as it assumes that DECL_RTL already has the right alias
1522 info. Callers should not set DECL_RTL until after the call to
1523 set_mem_attributes. */
1524 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1526 /* Get the alias set from the expression or type (perhaps using a
1527 front-end routine) and use it. */
1528 alias = get_alias_set (t);
1530 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1531 MEM_IN_STRUCT_P (ref)
1532 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1533 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1535 /* If we are making an object of this type, or if this is a DECL, we know
1536 that it is a scalar if the type is not an aggregate. */
1537 if ((objectp || DECL_P (t))
1538 && ! AGGREGATE_TYPE_P (type)
1539 && TREE_CODE (type) != COMPLEX_TYPE)
1540 MEM_SCALAR_P (ref) = 1;
1542 /* We can set the alignment from the type if we are making an object,
1543 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1544 if (objectp || TREE_CODE (t) == INDIRECT_REF
1545 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1546 || TYPE_ALIGN_OK (type))
1547 align = MAX (align, TYPE_ALIGN (type));
1549 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1551 if (integer_zerop (TREE_OPERAND (t, 1)))
1552 /* We don't know anything about the alignment. */
1553 align = BITS_PER_UNIT;
1555 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1558 /* If the size is known, we can set that. */
1559 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1560 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1562 /* If T is not a type, we may be able to deduce some more information about
1567 bool align_computed = false;
1569 if (TREE_THIS_VOLATILE (t))
1570 MEM_VOLATILE_P (ref) = 1;
1572 /* Now remove any conversions: they don't change what the underlying
1573 object is. Likewise for SAVE_EXPR. */
1574 while (CONVERT_EXPR_P (t)
1575 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1576 || TREE_CODE (t) == SAVE_EXPR)
1577 t = TREE_OPERAND (t, 0);
1579 /* We may look through structure-like accesses for the purposes of
1580 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1582 while (TREE_CODE (base) == COMPONENT_REF
1583 || TREE_CODE (base) == REALPART_EXPR
1584 || TREE_CODE (base) == IMAGPART_EXPR
1585 || TREE_CODE (base) == BIT_FIELD_REF)
1586 base = TREE_OPERAND (base, 0);
1590 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1591 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1593 MEM_NOTRAP_P (ref) = 1;
1596 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1598 base = get_base_address (base);
1599 if (base && DECL_P (base)
1600 && TREE_READONLY (base)
1601 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1603 tree base_type = TREE_TYPE (base);
1604 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1605 || DECL_ARTIFICIAL (base));
1606 MEM_READONLY_P (ref) = 1;
1609 /* If this expression uses it's parent's alias set, mark it such
1610 that we won't change it. */
1611 if (component_uses_parent_alias_set (t))
1612 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1614 /* If this is a decl, set the attributes of the MEM from it. */
1618 offset = const0_rtx;
1619 apply_bitpos = bitpos;
1620 size = (DECL_SIZE_UNIT (t)
1621 && host_integerp (DECL_SIZE_UNIT (t), 1)
1622 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1623 align = DECL_ALIGN (t);
1624 align_computed = true;
1627 /* If this is a constant, we know the alignment. */
1628 else if (CONSTANT_CLASS_P (t))
1630 align = TYPE_ALIGN (type);
1631 #ifdef CONSTANT_ALIGNMENT
1632 align = CONSTANT_ALIGNMENT (t, align);
1634 align_computed = true;
1637 /* If this is a field reference and not a bit-field, record it. */
1638 /* ??? There is some information that can be gleaned from bit-fields,
1639 such as the word offset in the structure that might be modified.
1640 But skip it for now. */
1641 else if (TREE_CODE (t) == COMPONENT_REF
1642 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1644 expr = component_ref_for_mem_expr (t);
1645 offset = const0_rtx;
1646 apply_bitpos = bitpos;
1647 /* ??? Any reason the field size would be different than
1648 the size we got from the type? */
1651 /* If this is an array reference, look for an outer field reference. */
1652 else if (TREE_CODE (t) == ARRAY_REF)
1654 tree off_tree = size_zero_node;
1655 /* We can't modify t, because we use it at the end of the
1661 tree index = TREE_OPERAND (t2, 1);
1662 tree low_bound = array_ref_low_bound (t2);
1663 tree unit_size = array_ref_element_size (t2);
1665 /* We assume all arrays have sizes that are a multiple of a byte.
1666 First subtract the lower bound, if any, in the type of the
1667 index, then convert to sizetype and multiply by the size of
1668 the array element. */
1669 if (! integer_zerop (low_bound))
1670 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1673 off_tree = size_binop (PLUS_EXPR,
1674 size_binop (MULT_EXPR,
1675 fold_convert (sizetype,
1679 t2 = TREE_OPERAND (t2, 0);
1681 while (TREE_CODE (t2) == ARRAY_REF);
1687 if (host_integerp (off_tree, 1))
1689 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1690 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1691 align = DECL_ALIGN (t2);
1692 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1694 align_computed = true;
1695 offset = GEN_INT (ioff);
1696 apply_bitpos = bitpos;
1699 else if (TREE_CODE (t2) == COMPONENT_REF)
1701 expr = component_ref_for_mem_expr (t2);
1702 if (host_integerp (off_tree, 1))
1704 offset = GEN_INT (tree_low_cst (off_tree, 1));
1705 apply_bitpos = bitpos;
1707 /* ??? Any reason the field size would be different than
1708 the size we got from the type? */
1710 else if (flag_argument_noalias > 1
1711 && (INDIRECT_REF_P (t2))
1712 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1719 /* If this is a Fortran indirect argument reference, record the
1721 else if (flag_argument_noalias > 1
1722 && (INDIRECT_REF_P (t))
1723 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1729 if (!align_computed && !INDIRECT_REF_P (t))
1731 unsigned int obj_align
1732 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1733 align = MAX (align, obj_align);
1737 /* If we modified OFFSET based on T, then subtract the outstanding
1738 bit position offset. Similarly, increase the size of the accessed
1739 object to contain the negative offset. */
1742 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1744 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1747 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1749 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1750 we're overlapping. */
1755 /* Now set the attributes we computed above. */
1757 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1759 /* If this is already known to be a scalar or aggregate, we are done. */
1760 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1763 /* If it is a reference into an aggregate, this is part of an aggregate.
1764 Otherwise we don't know. */
1765 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1766 || TREE_CODE (t) == ARRAY_RANGE_REF
1767 || TREE_CODE (t) == BIT_FIELD_REF)
1768 MEM_IN_STRUCT_P (ref) = 1;
1772 set_mem_attributes (rtx ref, tree t, int objectp)
1774 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1777 /* Set MEM to the decl that REG refers to. */
1780 set_mem_attrs_from_reg (rtx mem, rtx reg)
1783 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1784 GEN_INT (REG_OFFSET (reg)),
1785 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1788 /* Set the alias set of MEM to SET. */
1791 set_mem_alias_set (rtx mem, alias_set_type set)
1793 #ifdef ENABLE_CHECKING
1794 /* If the new and old alias sets don't conflict, something is wrong. */
1795 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1798 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1799 MEM_SIZE (mem), MEM_ALIGN (mem),
1803 /* Set the alignment of MEM to ALIGN bits. */
1806 set_mem_align (rtx mem, unsigned int align)
1808 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1809 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1813 /* Set the expr for MEM to EXPR. */
1816 set_mem_expr (rtx mem, tree expr)
1819 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1820 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1823 /* Set the offset of MEM to OFFSET. */
1826 set_mem_offset (rtx mem, rtx offset)
1828 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1829 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1833 /* Set the size of MEM to SIZE. */
1836 set_mem_size (rtx mem, rtx size)
1838 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1839 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1843 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1844 and its address changed to ADDR. (VOIDmode means don't change the mode.
1845 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1846 returned memory location is required to be valid. The memory
1847 attributes are not changed. */
1850 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1854 gcc_assert (MEM_P (memref));
1855 if (mode == VOIDmode)
1856 mode = GET_MODE (memref);
1858 addr = XEXP (memref, 0);
1859 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1860 && (!validate || memory_address_p (mode, addr)))
1865 if (reload_in_progress || reload_completed)
1866 gcc_assert (memory_address_p (mode, addr));
1868 addr = memory_address (mode, addr);
1871 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1874 new_rtx = gen_rtx_MEM (mode, addr);
1875 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1879 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1880 way we are changing MEMREF, so we only preserve the alias set. */
1883 change_address (rtx memref, enum machine_mode mode, rtx addr)
1885 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1886 enum machine_mode mmode = GET_MODE (new_rtx);
1889 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1890 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1892 /* If there are no changes, just return the original memory reference. */
1893 if (new_rtx == memref)
1895 if (MEM_ATTRS (memref) == 0
1896 || (MEM_EXPR (memref) == NULL
1897 && MEM_OFFSET (memref) == NULL
1898 && MEM_SIZE (memref) == size
1899 && MEM_ALIGN (memref) == align))
1902 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1903 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1907 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1912 /* Return a memory reference like MEMREF, but with its mode changed
1913 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1914 nonzero, the memory address is forced to be valid.
1915 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1916 and caller is responsible for adjusting MEMREF base register. */
1919 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1920 int validate, int adjust)
1922 rtx addr = XEXP (memref, 0);
1924 rtx memoffset = MEM_OFFSET (memref);
1926 unsigned int memalign = MEM_ALIGN (memref);
1928 /* If there are no changes, just return the original memory reference. */
1929 if (mode == GET_MODE (memref) && !offset
1930 && (!validate || memory_address_p (mode, addr)))
1933 /* ??? Prefer to create garbage instead of creating shared rtl.
1934 This may happen even if offset is nonzero -- consider
1935 (plus (plus reg reg) const_int) -- so do this always. */
1936 addr = copy_rtx (addr);
1940 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1941 object, we can merge it into the LO_SUM. */
1942 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1944 && (unsigned HOST_WIDE_INT) offset
1945 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1946 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1947 plus_constant (XEXP (addr, 1), offset));
1949 addr = plus_constant (addr, offset);
1952 new_rtx = change_address_1 (memref, mode, addr, validate);
1954 /* Compute the new values of the memory attributes due to this adjustment.
1955 We add the offsets and update the alignment. */
1957 memoffset = GEN_INT (offset + INTVAL (memoffset));
1959 /* Compute the new alignment by taking the MIN of the alignment and the
1960 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1965 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1967 /* We can compute the size in a number of ways. */
1968 if (GET_MODE (new_rtx) != BLKmode)
1969 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
1970 else if (MEM_SIZE (memref))
1971 size = plus_constant (MEM_SIZE (memref), -offset);
1973 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1974 memoffset, size, memalign, GET_MODE (new_rtx));
1976 /* At some point, we should validate that this offset is within the object,
1977 if all the appropriate values are known. */
1981 /* Return a memory reference like MEMREF, but with its mode changed
1982 to MODE and its address changed to ADDR, which is assumed to be
1983 MEMREF offset by OFFSET bytes. If VALIDATE is
1984 nonzero, the memory address is forced to be valid. */
1987 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1988 HOST_WIDE_INT offset, int validate)
1990 memref = change_address_1 (memref, VOIDmode, addr, validate);
1991 return adjust_address_1 (memref, mode, offset, validate, 0);
1994 /* Return a memory reference like MEMREF, but whose address is changed by
1995 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1996 known to be in OFFSET (possibly 1). */
1999 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2001 rtx new_rtx, addr = XEXP (memref, 0);
2003 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2005 /* At this point we don't know _why_ the address is invalid. It
2006 could have secondary memory references, multiplies or anything.
2008 However, if we did go and rearrange things, we can wind up not
2009 being able to recognize the magic around pic_offset_table_rtx.
2010 This stuff is fragile, and is yet another example of why it is
2011 bad to expose PIC machinery too early. */
2012 if (! memory_address_p (GET_MODE (memref), new_rtx)
2013 && GET_CODE (addr) == PLUS
2014 && XEXP (addr, 0) == pic_offset_table_rtx)
2016 addr = force_reg (GET_MODE (addr), addr);
2017 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2020 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2021 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2023 /* If there are no changes, just return the original memory reference. */
2024 if (new_rtx == memref)
2027 /* Update the alignment to reflect the offset. Reset the offset, which
2030 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2031 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2032 GET_MODE (new_rtx));
2036 /* Return a memory reference like MEMREF, but with its address changed to
2037 ADDR. The caller is asserting that the actual piece of memory pointed
2038 to is the same, just the form of the address is being changed, such as
2039 by putting something into a register. */
2042 replace_equiv_address (rtx memref, rtx addr)
2044 /* change_address_1 copies the memory attribute structure without change
2045 and that's exactly what we want here. */
2046 update_temp_slot_address (XEXP (memref, 0), addr);
2047 return change_address_1 (memref, VOIDmode, addr, 1);
2050 /* Likewise, but the reference is not required to be valid. */
2053 replace_equiv_address_nv (rtx memref, rtx addr)
2055 return change_address_1 (memref, VOIDmode, addr, 0);
2058 /* Return a memory reference like MEMREF, but with its mode widened to
2059 MODE and offset by OFFSET. This would be used by targets that e.g.
2060 cannot issue QImode memory operations and have to use SImode memory
2061 operations plus masking logic. */
2064 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2066 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2067 tree expr = MEM_EXPR (new_rtx);
2068 rtx memoffset = MEM_OFFSET (new_rtx);
2069 unsigned int size = GET_MODE_SIZE (mode);
2071 /* If there are no changes, just return the original memory reference. */
2072 if (new_rtx == memref)
2075 /* If we don't know what offset we were at within the expression, then
2076 we can't know if we've overstepped the bounds. */
2082 if (TREE_CODE (expr) == COMPONENT_REF)
2084 tree field = TREE_OPERAND (expr, 1);
2085 tree offset = component_ref_field_offset (expr);
2087 if (! DECL_SIZE_UNIT (field))
2093 /* Is the field at least as large as the access? If so, ok,
2094 otherwise strip back to the containing structure. */
2095 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2096 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2097 && INTVAL (memoffset) >= 0)
2100 if (! host_integerp (offset, 1))
2106 expr = TREE_OPERAND (expr, 0);
2108 = (GEN_INT (INTVAL (memoffset)
2109 + tree_low_cst (offset, 1)
2110 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2113 /* Similarly for the decl. */
2114 else if (DECL_P (expr)
2115 && DECL_SIZE_UNIT (expr)
2116 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2117 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2118 && (! memoffset || INTVAL (memoffset) >= 0))
2122 /* The widened memory access overflows the expression, which means
2123 that it could alias another expression. Zap it. */
2130 memoffset = NULL_RTX;
2132 /* The widened memory may alias other stuff, so zap the alias set. */
2133 /* ??? Maybe use get_alias_set on any remaining expression. */
2135 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2136 MEM_ALIGN (new_rtx), mode);
2141 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2142 static GTY(()) tree spill_slot_decl;
2145 get_spill_slot_decl (bool force_build_p)
2147 tree d = spill_slot_decl;
2150 if (d || !force_build_p)
2153 d = build_decl (VAR_DECL, get_identifier ("%sfp"), void_type_node);
2154 DECL_ARTIFICIAL (d) = 1;
2155 DECL_IGNORED_P (d) = 1;
2157 TREE_THIS_NOTRAP (d) = 1;
2158 spill_slot_decl = d;
2160 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2161 MEM_NOTRAP_P (rd) = 1;
2162 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2163 NULL_RTX, 0, BLKmode);
2164 SET_DECL_RTL (d, rd);
2169 /* Given MEM, a result from assign_stack_local, fill in the memory
2170 attributes as appropriate for a register allocator spill slot.
2171 These slots are not aliasable by other memory. We arrange for
2172 them all to use a single MEM_EXPR, so that the aliasing code can
2173 work properly in the case of shared spill slots. */
2176 set_mem_attrs_for_spill (rtx mem)
2178 alias_set_type alias;
2182 expr = get_spill_slot_decl (true);
2183 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2185 /* We expect the incoming memory to be of the form:
2186 (mem:MODE (plus (reg sfp) (const_int offset)))
2187 with perhaps the plus missing for offset = 0. */
2188 addr = XEXP (mem, 0);
2189 offset = const0_rtx;
2190 if (GET_CODE (addr) == PLUS
2191 && GET_CODE (XEXP (addr, 1)) == CONST_INT)
2192 offset = XEXP (addr, 1);
2194 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2195 MEM_SIZE (mem), MEM_ALIGN (mem),
2197 MEM_NOTRAP_P (mem) = 1;
2200 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2203 gen_label_rtx (void)
2205 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2206 NULL, label_num++, NULL);
2209 /* For procedure integration. */
2211 /* Install new pointers to the first and last insns in the chain.
2212 Also, set cur_insn_uid to one higher than the last in use.
2213 Used for an inline-procedure after copying the insn chain. */
2216 set_new_first_and_last_insn (rtx first, rtx last)
2224 for (insn = first; insn; insn = NEXT_INSN (insn))
2225 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2230 /* Go through all the RTL insn bodies and copy any invalid shared
2231 structure. This routine should only be called once. */
2234 unshare_all_rtl_1 (rtx insn)
2236 /* Unshare just about everything else. */
2237 unshare_all_rtl_in_chain (insn);
2239 /* Make sure the addresses of stack slots found outside the insn chain
2240 (such as, in DECL_RTL of a variable) are not shared
2241 with the insn chain.
2243 This special care is necessary when the stack slot MEM does not
2244 actually appear in the insn chain. If it does appear, its address
2245 is unshared from all else at that point. */
2246 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2249 /* Go through all the RTL insn bodies and copy any invalid shared
2250 structure, again. This is a fairly expensive thing to do so it
2251 should be done sparingly. */
2254 unshare_all_rtl_again (rtx insn)
2259 for (p = insn; p; p = NEXT_INSN (p))
2262 reset_used_flags (PATTERN (p));
2263 reset_used_flags (REG_NOTES (p));
2266 /* Make sure that virtual stack slots are not shared. */
2267 set_used_decls (DECL_INITIAL (cfun->decl));
2269 /* Make sure that virtual parameters are not shared. */
2270 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2271 set_used_flags (DECL_RTL (decl));
2273 reset_used_flags (stack_slot_list);
2275 unshare_all_rtl_1 (insn);
2279 unshare_all_rtl (void)
2281 unshare_all_rtl_1 (get_insns ());
2285 struct rtl_opt_pass pass_unshare_all_rtl =
2289 "unshare", /* name */
2291 unshare_all_rtl, /* execute */
2294 0, /* static_pass_number */
2296 0, /* properties_required */
2297 0, /* properties_provided */
2298 0, /* properties_destroyed */
2299 0, /* todo_flags_start */
2300 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2305 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2306 Recursively does the same for subexpressions. */
2309 verify_rtx_sharing (rtx orig, rtx insn)
2314 const char *format_ptr;
2319 code = GET_CODE (x);
2321 /* These types may be freely shared. */
2337 /* SCRATCH must be shared because they represent distinct values. */
2339 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2344 if (shared_const_p (orig))
2349 /* A MEM is allowed to be shared if its address is constant. */
2350 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2351 || reload_completed || reload_in_progress)
2360 /* This rtx may not be shared. If it has already been seen,
2361 replace it with a copy of itself. */
2362 #ifdef ENABLE_CHECKING
2363 if (RTX_FLAG (x, used))
2365 error ("invalid rtl sharing found in the insn");
2367 error ("shared rtx");
2369 internal_error ("internal consistency failure");
2372 gcc_assert (!RTX_FLAG (x, used));
2374 RTX_FLAG (x, used) = 1;
2376 /* Now scan the subexpressions recursively. */
2378 format_ptr = GET_RTX_FORMAT (code);
2380 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2382 switch (*format_ptr++)
2385 verify_rtx_sharing (XEXP (x, i), insn);
2389 if (XVEC (x, i) != NULL)
2392 int len = XVECLEN (x, i);
2394 for (j = 0; j < len; j++)
2396 /* We allow sharing of ASM_OPERANDS inside single
2398 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2399 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2401 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2403 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2412 /* Go through all the RTL insn bodies and check that there is no unexpected
2413 sharing in between the subexpressions. */
2416 verify_rtl_sharing (void)
2420 for (p = get_insns (); p; p = NEXT_INSN (p))
2423 reset_used_flags (PATTERN (p));
2424 reset_used_flags (REG_NOTES (p));
2425 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2428 rtx q, sequence = PATTERN (p);
2430 for (i = 0; i < XVECLEN (sequence, 0); i++)
2432 q = XVECEXP (sequence, 0, i);
2433 gcc_assert (INSN_P (q));
2434 reset_used_flags (PATTERN (q));
2435 reset_used_flags (REG_NOTES (q));
2440 for (p = get_insns (); p; p = NEXT_INSN (p))
2443 verify_rtx_sharing (PATTERN (p), p);
2444 verify_rtx_sharing (REG_NOTES (p), p);
2448 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2449 Assumes the mark bits are cleared at entry. */
2452 unshare_all_rtl_in_chain (rtx insn)
2454 for (; insn; insn = NEXT_INSN (insn))
2457 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2458 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2462 /* Go through all virtual stack slots of a function and mark them as
2463 shared. We never replace the DECL_RTLs themselves with a copy,
2464 but expressions mentioned into a DECL_RTL cannot be shared with
2465 expressions in the instruction stream.
2467 Note that reload may convert pseudo registers into memories in-place.
2468 Pseudo registers are always shared, but MEMs never are. Thus if we
2469 reset the used flags on MEMs in the instruction stream, we must set
2470 them again on MEMs that appear in DECL_RTLs. */
2473 set_used_decls (tree blk)
2478 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2479 if (DECL_RTL_SET_P (t))
2480 set_used_flags (DECL_RTL (t));
2482 /* Now process sub-blocks. */
2483 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2487 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2488 Recursively does the same for subexpressions. Uses
2489 copy_rtx_if_shared_1 to reduce stack space. */
2492 copy_rtx_if_shared (rtx orig)
2494 copy_rtx_if_shared_1 (&orig);
2498 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2499 use. Recursively does the same for subexpressions. */
2502 copy_rtx_if_shared_1 (rtx *orig1)
2508 const char *format_ptr;
2512 /* Repeat is used to turn tail-recursion into iteration. */
2519 code = GET_CODE (x);
2521 /* These types may be freely shared. */
2536 /* SCRATCH must be shared because they represent distinct values. */
2539 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2544 if (shared_const_p (x))
2553 /* The chain of insns is not being copied. */
2560 /* This rtx may not be shared. If it has already been seen,
2561 replace it with a copy of itself. */
2563 if (RTX_FLAG (x, used))
2565 x = shallow_copy_rtx (x);
2568 RTX_FLAG (x, used) = 1;
2570 /* Now scan the subexpressions recursively.
2571 We can store any replaced subexpressions directly into X
2572 since we know X is not shared! Any vectors in X
2573 must be copied if X was copied. */
2575 format_ptr = GET_RTX_FORMAT (code);
2576 length = GET_RTX_LENGTH (code);
2579 for (i = 0; i < length; i++)
2581 switch (*format_ptr++)
2585 copy_rtx_if_shared_1 (last_ptr);
2586 last_ptr = &XEXP (x, i);
2590 if (XVEC (x, i) != NULL)
2593 int len = XVECLEN (x, i);
2595 /* Copy the vector iff I copied the rtx and the length
2597 if (copied && len > 0)
2598 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2600 /* Call recursively on all inside the vector. */
2601 for (j = 0; j < len; j++)
2604 copy_rtx_if_shared_1 (last_ptr);
2605 last_ptr = &XVECEXP (x, i, j);
2620 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2621 to look for shared sub-parts. */
2624 reset_used_flags (rtx x)
2628 const char *format_ptr;
2631 /* Repeat is used to turn tail-recursion into iteration. */
2636 code = GET_CODE (x);
2638 /* These types may be freely shared so we needn't do any resetting
2660 /* The chain of insns is not being copied. */
2667 RTX_FLAG (x, used) = 0;
2669 format_ptr = GET_RTX_FORMAT (code);
2670 length = GET_RTX_LENGTH (code);
2672 for (i = 0; i < length; i++)
2674 switch (*format_ptr++)
2682 reset_used_flags (XEXP (x, i));
2686 for (j = 0; j < XVECLEN (x, i); j++)
2687 reset_used_flags (XVECEXP (x, i, j));
2693 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2694 to look for shared sub-parts. */
2697 set_used_flags (rtx x)
2701 const char *format_ptr;
2706 code = GET_CODE (x);
2708 /* These types may be freely shared so we needn't do any resetting
2730 /* The chain of insns is not being copied. */
2737 RTX_FLAG (x, used) = 1;
2739 format_ptr = GET_RTX_FORMAT (code);
2740 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2742 switch (*format_ptr++)
2745 set_used_flags (XEXP (x, i));
2749 for (j = 0; j < XVECLEN (x, i); j++)
2750 set_used_flags (XVECEXP (x, i, j));
2756 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2757 Return X or the rtx for the pseudo reg the value of X was copied into.
2758 OTHER must be valid as a SET_DEST. */
2761 make_safe_from (rtx x, rtx other)
2764 switch (GET_CODE (other))
2767 other = SUBREG_REG (other);
2769 case STRICT_LOW_PART:
2772 other = XEXP (other, 0);
2781 && GET_CODE (x) != SUBREG)
2783 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2784 || reg_mentioned_p (other, x))))
2786 rtx temp = gen_reg_rtx (GET_MODE (x));
2787 emit_move_insn (temp, x);
2793 /* Emission of insns (adding them to the doubly-linked list). */
2795 /* Return the first insn of the current sequence or current function. */
2803 /* Specify a new insn as the first in the chain. */
2806 set_first_insn (rtx insn)
2808 gcc_assert (!PREV_INSN (insn));
2812 /* Return the last insn emitted in current sequence or current function. */
2815 get_last_insn (void)
2820 /* Specify a new insn as the last in the chain. */
2823 set_last_insn (rtx insn)
2825 gcc_assert (!NEXT_INSN (insn));
2829 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2832 get_last_insn_anywhere (void)
2834 struct sequence_stack *stack;
2837 for (stack = seq_stack; stack; stack = stack->next)
2838 if (stack->last != 0)
2843 /* Return the first nonnote insn emitted in current sequence or current
2844 function. This routine looks inside SEQUENCEs. */
2847 get_first_nonnote_insn (void)
2849 rtx insn = first_insn;
2854 for (insn = next_insn (insn);
2855 insn && NOTE_P (insn);
2856 insn = next_insn (insn))
2860 if (NONJUMP_INSN_P (insn)
2861 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2862 insn = XVECEXP (PATTERN (insn), 0, 0);
2869 /* Return the last nonnote insn emitted in current sequence or current
2870 function. This routine looks inside SEQUENCEs. */
2873 get_last_nonnote_insn (void)
2875 rtx insn = last_insn;
2880 for (insn = previous_insn (insn);
2881 insn && NOTE_P (insn);
2882 insn = previous_insn (insn))
2886 if (NONJUMP_INSN_P (insn)
2887 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2888 insn = XVECEXP (PATTERN (insn), 0,
2889 XVECLEN (PATTERN (insn), 0) - 1);
2896 /* Return a number larger than any instruction's uid in this function. */
2901 return cur_insn_uid;
2904 /* Return the next insn. If it is a SEQUENCE, return the first insn
2908 next_insn (rtx insn)
2912 insn = NEXT_INSN (insn);
2913 if (insn && NONJUMP_INSN_P (insn)
2914 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2915 insn = XVECEXP (PATTERN (insn), 0, 0);
2921 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2925 previous_insn (rtx insn)
2929 insn = PREV_INSN (insn);
2930 if (insn && NONJUMP_INSN_P (insn)
2931 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2932 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2938 /* Return the next insn after INSN that is not a NOTE. This routine does not
2939 look inside SEQUENCEs. */
2942 next_nonnote_insn (rtx insn)
2946 insn = NEXT_INSN (insn);
2947 if (insn == 0 || !NOTE_P (insn))
2954 /* Return the previous insn before INSN that is not a NOTE. This routine does
2955 not look inside SEQUENCEs. */
2958 prev_nonnote_insn (rtx insn)
2962 insn = PREV_INSN (insn);
2963 if (insn == 0 || !NOTE_P (insn))
2970 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2971 or 0, if there is none. This routine does not look inside
2975 next_real_insn (rtx insn)
2979 insn = NEXT_INSN (insn);
2980 if (insn == 0 || INSN_P (insn))
2987 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2988 or 0, if there is none. This routine does not look inside
2992 prev_real_insn (rtx insn)
2996 insn = PREV_INSN (insn);
2997 if (insn == 0 || INSN_P (insn))
3004 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3005 This routine does not look inside SEQUENCEs. */
3008 last_call_insn (void)
3012 for (insn = get_last_insn ();
3013 insn && !CALL_P (insn);
3014 insn = PREV_INSN (insn))
3020 /* Find the next insn after INSN that really does something. This routine
3021 does not look inside SEQUENCEs. Until reload has completed, this is the
3022 same as next_real_insn. */
3025 active_insn_p (const_rtx insn)
3027 return (CALL_P (insn) || JUMP_P (insn)
3028 || (NONJUMP_INSN_P (insn)
3029 && (! reload_completed
3030 || (GET_CODE (PATTERN (insn)) != USE
3031 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3035 next_active_insn (rtx insn)
3039 insn = NEXT_INSN (insn);
3040 if (insn == 0 || active_insn_p (insn))
3047 /* Find the last insn before INSN that really does something. This routine
3048 does not look inside SEQUENCEs. Until reload has completed, this is the
3049 same as prev_real_insn. */
3052 prev_active_insn (rtx insn)
3056 insn = PREV_INSN (insn);
3057 if (insn == 0 || active_insn_p (insn))
3064 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3067 next_label (rtx insn)
3071 insn = NEXT_INSN (insn);
3072 if (insn == 0 || LABEL_P (insn))
3079 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3082 prev_label (rtx insn)
3086 insn = PREV_INSN (insn);
3087 if (insn == 0 || LABEL_P (insn))
3094 /* Return the last label to mark the same position as LABEL. Return null
3095 if LABEL itself is null. */
3098 skip_consecutive_labels (rtx label)
3102 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3110 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3111 and REG_CC_USER notes so we can find it. */
3114 link_cc0_insns (rtx insn)
3116 rtx user = next_nonnote_insn (insn);
3118 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3119 user = XVECEXP (PATTERN (user), 0, 0);
3121 add_reg_note (user, REG_CC_SETTER, insn);
3122 add_reg_note (insn, REG_CC_USER, user);
3125 /* Return the next insn that uses CC0 after INSN, which is assumed to
3126 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3127 applied to the result of this function should yield INSN).
3129 Normally, this is simply the next insn. However, if a REG_CC_USER note
3130 is present, it contains the insn that uses CC0.
3132 Return 0 if we can't find the insn. */
3135 next_cc0_user (rtx insn)
3137 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3140 return XEXP (note, 0);
3142 insn = next_nonnote_insn (insn);
3143 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3144 insn = XVECEXP (PATTERN (insn), 0, 0);
3146 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3152 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3153 note, it is the previous insn. */
3156 prev_cc0_setter (rtx insn)
3158 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3161 return XEXP (note, 0);
3163 insn = prev_nonnote_insn (insn);
3164 gcc_assert (sets_cc0_p (PATTERN (insn)));
3171 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3174 find_auto_inc (rtx *xp, void *data)
3177 rtx reg = (rtx) data;
3179 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3182 switch (GET_CODE (x))
3190 if (rtx_equal_p (reg, XEXP (x, 0)))
3201 /* Increment the label uses for all labels present in rtx. */
3204 mark_label_nuses (rtx x)
3210 code = GET_CODE (x);
3211 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3212 LABEL_NUSES (XEXP (x, 0))++;
3214 fmt = GET_RTX_FORMAT (code);
3215 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3218 mark_label_nuses (XEXP (x, i));
3219 else if (fmt[i] == 'E')
3220 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3221 mark_label_nuses (XVECEXP (x, i, j));
3226 /* Try splitting insns that can be split for better scheduling.
3227 PAT is the pattern which might split.
3228 TRIAL is the insn providing PAT.
3229 LAST is nonzero if we should return the last insn of the sequence produced.
3231 If this routine succeeds in splitting, it returns the first or last
3232 replacement insn depending on the value of LAST. Otherwise, it
3233 returns TRIAL. If the insn to be returned can be split, it will be. */
3236 try_split (rtx pat, rtx trial, int last)
3238 rtx before = PREV_INSN (trial);
3239 rtx after = NEXT_INSN (trial);
3240 int has_barrier = 0;
3243 rtx insn_last, insn;
3246 if (any_condjump_p (trial)
3247 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3248 split_branch_probability = INTVAL (XEXP (note, 0));
3249 probability = split_branch_probability;
3251 seq = split_insns (pat, trial);
3253 split_branch_probability = -1;
3255 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3256 We may need to handle this specially. */
3257 if (after && BARRIER_P (after))
3260 after = NEXT_INSN (after);
3266 /* Avoid infinite loop if any insn of the result matches
3267 the original pattern. */
3271 if (INSN_P (insn_last)
3272 && rtx_equal_p (PATTERN (insn_last), pat))
3274 if (!NEXT_INSN (insn_last))
3276 insn_last = NEXT_INSN (insn_last);
3279 /* We will be adding the new sequence to the function. The splitters
3280 may have introduced invalid RTL sharing, so unshare the sequence now. */
3281 unshare_all_rtl_in_chain (seq);
3284 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3288 mark_jump_label (PATTERN (insn), insn, 0);
3290 if (probability != -1
3291 && any_condjump_p (insn)
3292 && !find_reg_note (insn, REG_BR_PROB, 0))
3294 /* We can preserve the REG_BR_PROB notes only if exactly
3295 one jump is created, otherwise the machine description
3296 is responsible for this step using
3297 split_branch_probability variable. */
3298 gcc_assert (njumps == 1);
3299 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3304 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3305 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3308 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3311 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3314 *p = CALL_INSN_FUNCTION_USAGE (trial);
3315 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3319 /* Copy notes, particularly those related to the CFG. */
3320 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3322 switch (REG_NOTE_KIND (note))
3325 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3328 || (flag_non_call_exceptions && INSN_P (insn)
3329 && may_trap_p (PATTERN (insn))))
3330 add_reg_note (insn, REG_EH_REGION, XEXP (note, 0));
3336 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3339 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3343 case REG_NON_LOCAL_GOTO:
3344 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3347 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3353 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3355 rtx reg = XEXP (note, 0);
3356 if (!FIND_REG_INC_NOTE (insn, reg)
3357 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3358 add_reg_note (insn, REG_INC, reg);
3368 /* If there are LABELS inside the split insns increment the
3369 usage count so we don't delete the label. */
3373 while (insn != NULL_RTX)
3375 /* JUMP_P insns have already been "marked" above. */
3376 if (NONJUMP_INSN_P (insn))
3377 mark_label_nuses (PATTERN (insn));
3379 insn = PREV_INSN (insn);
3383 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3385 delete_insn (trial);
3387 emit_barrier_after (tem);
3389 /* Recursively call try_split for each new insn created; by the
3390 time control returns here that insn will be fully split, so
3391 set LAST and continue from the insn after the one returned.
3392 We can't use next_active_insn here since AFTER may be a note.
3393 Ignore deleted insns, which can be occur if not optimizing. */
3394 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3395 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3396 tem = try_split (PATTERN (tem), tem, 1);
3398 /* Return either the first or the last insn, depending on which was
3401 ? (after ? PREV_INSN (after) : last_insn)
3402 : NEXT_INSN (before);
3405 /* Make and return an INSN rtx, initializing all its slots.
3406 Store PATTERN in the pattern slots. */
3409 make_insn_raw (rtx pattern)
3413 insn = rtx_alloc (INSN);
3415 INSN_UID (insn) = cur_insn_uid++;
3416 PATTERN (insn) = pattern;
3417 INSN_CODE (insn) = -1;
3418 REG_NOTES (insn) = NULL;
3419 INSN_LOCATOR (insn) = curr_insn_locator ();
3420 BLOCK_FOR_INSN (insn) = NULL;
3422 #ifdef ENABLE_RTL_CHECKING
3425 && (returnjump_p (insn)
3426 || (GET_CODE (insn) == SET
3427 && SET_DEST (insn) == pc_rtx)))
3429 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3437 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3440 make_jump_insn_raw (rtx pattern)
3444 insn = rtx_alloc (JUMP_INSN);
3445 INSN_UID (insn) = cur_insn_uid++;
3447 PATTERN (insn) = pattern;
3448 INSN_CODE (insn) = -1;
3449 REG_NOTES (insn) = NULL;
3450 JUMP_LABEL (insn) = NULL;
3451 INSN_LOCATOR (insn) = curr_insn_locator ();
3452 BLOCK_FOR_INSN (insn) = NULL;
3457 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3460 make_call_insn_raw (rtx pattern)
3464 insn = rtx_alloc (CALL_INSN);
3465 INSN_UID (insn) = cur_insn_uid++;
3467 PATTERN (insn) = pattern;
3468 INSN_CODE (insn) = -1;
3469 REG_NOTES (insn) = NULL;
3470 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3471 INSN_LOCATOR (insn) = curr_insn_locator ();
3472 BLOCK_FOR_INSN (insn) = NULL;
3477 /* Add INSN to the end of the doubly-linked list.
3478 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3483 PREV_INSN (insn) = last_insn;
3484 NEXT_INSN (insn) = 0;
3486 if (NULL != last_insn)
3487 NEXT_INSN (last_insn) = insn;
3489 if (NULL == first_insn)
3495 /* Add INSN into the doubly-linked list after insn AFTER. This and
3496 the next should be the only functions called to insert an insn once
3497 delay slots have been filled since only they know how to update a
3501 add_insn_after (rtx insn, rtx after, basic_block bb)
3503 rtx next = NEXT_INSN (after);
3505 gcc_assert (!optimize || !INSN_DELETED_P (after));
3507 NEXT_INSN (insn) = next;
3508 PREV_INSN (insn) = after;
3512 PREV_INSN (next) = insn;
3513 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3514 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3516 else if (last_insn == after)
3520 struct sequence_stack *stack = seq_stack;
3521 /* Scan all pending sequences too. */
3522 for (; stack; stack = stack->next)
3523 if (after == stack->last)
3532 if (!BARRIER_P (after)
3533 && !BARRIER_P (insn)
3534 && (bb = BLOCK_FOR_INSN (after)))
3536 set_block_for_insn (insn, bb);
3538 df_insn_rescan (insn);
3539 /* Should not happen as first in the BB is always
3540 either NOTE or LABEL. */
3541 if (BB_END (bb) == after
3542 /* Avoid clobbering of structure when creating new BB. */
3543 && !BARRIER_P (insn)
3544 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3548 NEXT_INSN (after) = insn;
3549 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3551 rtx sequence = PATTERN (after);
3552 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3556 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3557 the previous should be the only functions called to insert an insn
3558 once delay slots have been filled since only they know how to
3559 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3563 add_insn_before (rtx insn, rtx before, basic_block bb)
3565 rtx prev = PREV_INSN (before);
3567 gcc_assert (!optimize || !INSN_DELETED_P (before));
3569 PREV_INSN (insn) = prev;
3570 NEXT_INSN (insn) = before;
3574 NEXT_INSN (prev) = insn;
3575 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3577 rtx sequence = PATTERN (prev);
3578 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3581 else if (first_insn == before)
3585 struct sequence_stack *stack = seq_stack;
3586 /* Scan all pending sequences too. */
3587 for (; stack; stack = stack->next)
3588 if (before == stack->first)
3590 stack->first = insn;
3598 && !BARRIER_P (before)
3599 && !BARRIER_P (insn))
3600 bb = BLOCK_FOR_INSN (before);
3604 set_block_for_insn (insn, bb);
3606 df_insn_rescan (insn);
3607 /* Should not happen as first in the BB is always either NOTE or
3609 gcc_assert (BB_HEAD (bb) != insn
3610 /* Avoid clobbering of structure when creating new BB. */
3612 || NOTE_INSN_BASIC_BLOCK_P (insn));
3615 PREV_INSN (before) = insn;
3616 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3617 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3621 /* Replace insn with an deleted instruction note. */
3623 void set_insn_deleted (rtx insn)
3625 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3626 PUT_CODE (insn, NOTE);
3627 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3631 /* Remove an insn from its doubly-linked list. This function knows how
3632 to handle sequences. */
3634 remove_insn (rtx insn)
3636 rtx next = NEXT_INSN (insn);
3637 rtx prev = PREV_INSN (insn);
3640 /* Later in the code, the block will be marked dirty. */
3641 df_insn_delete (NULL, INSN_UID (insn));
3645 NEXT_INSN (prev) = next;
3646 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3648 rtx sequence = PATTERN (prev);
3649 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3652 else if (first_insn == insn)
3656 struct sequence_stack *stack = seq_stack;
3657 /* Scan all pending sequences too. */
3658 for (; stack; stack = stack->next)
3659 if (insn == stack->first)
3661 stack->first = next;
3670 PREV_INSN (next) = prev;
3671 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3672 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3674 else if (last_insn == insn)
3678 struct sequence_stack *stack = seq_stack;
3679 /* Scan all pending sequences too. */
3680 for (; stack; stack = stack->next)
3681 if (insn == stack->last)
3689 if (!BARRIER_P (insn)
3690 && (bb = BLOCK_FOR_INSN (insn)))
3693 df_set_bb_dirty (bb);
3694 if (BB_HEAD (bb) == insn)
3696 /* Never ever delete the basic block note without deleting whole
3698 gcc_assert (!NOTE_P (insn));
3699 BB_HEAD (bb) = next;
3701 if (BB_END (bb) == insn)
3706 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3709 add_function_usage_to (rtx call_insn, rtx call_fusage)
3711 gcc_assert (call_insn && CALL_P (call_insn));
3713 /* Put the register usage information on the CALL. If there is already
3714 some usage information, put ours at the end. */
3715 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3719 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3720 link = XEXP (link, 1))
3723 XEXP (link, 1) = call_fusage;
3726 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3729 /* Delete all insns made since FROM.
3730 FROM becomes the new last instruction. */
3733 delete_insns_since (rtx from)
3738 NEXT_INSN (from) = 0;
3742 /* This function is deprecated, please use sequences instead.
3744 Move a consecutive bunch of insns to a different place in the chain.
3745 The insns to be moved are those between FROM and TO.
3746 They are moved to a new position after the insn AFTER.
3747 AFTER must not be FROM or TO or any insn in between.
3749 This function does not know about SEQUENCEs and hence should not be
3750 called after delay-slot filling has been done. */
3753 reorder_insns_nobb (rtx from, rtx to, rtx after)
3755 /* Splice this bunch out of where it is now. */
3756 if (PREV_INSN (from))
3757 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3759 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3760 if (last_insn == to)
3761 last_insn = PREV_INSN (from);
3762 if (first_insn == from)
3763 first_insn = NEXT_INSN (to);
3765 /* Make the new neighbors point to it and it to them. */
3766 if (NEXT_INSN (after))
3767 PREV_INSN (NEXT_INSN (after)) = to;
3769 NEXT_INSN (to) = NEXT_INSN (after);
3770 PREV_INSN (from) = after;
3771 NEXT_INSN (after) = from;
3772 if (after == last_insn)
3776 /* Same as function above, but take care to update BB boundaries. */
3778 reorder_insns (rtx from, rtx to, rtx after)
3780 rtx prev = PREV_INSN (from);
3781 basic_block bb, bb2;
3783 reorder_insns_nobb (from, to, after);
3785 if (!BARRIER_P (after)
3786 && (bb = BLOCK_FOR_INSN (after)))
3789 df_set_bb_dirty (bb);
3791 if (!BARRIER_P (from)
3792 && (bb2 = BLOCK_FOR_INSN (from)))
3794 if (BB_END (bb2) == to)
3795 BB_END (bb2) = prev;
3796 df_set_bb_dirty (bb2);
3799 if (BB_END (bb) == after)
3802 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3804 df_insn_change_bb (x, bb);
3809 /* Emit insn(s) of given code and pattern
3810 at a specified place within the doubly-linked list.
3812 All of the emit_foo global entry points accept an object
3813 X which is either an insn list or a PATTERN of a single
3816 There are thus a few canonical ways to generate code and
3817 emit it at a specific place in the instruction stream. For
3818 example, consider the instruction named SPOT and the fact that
3819 we would like to emit some instructions before SPOT. We might
3823 ... emit the new instructions ...
3824 insns_head = get_insns ();
3827 emit_insn_before (insns_head, SPOT);
3829 It used to be common to generate SEQUENCE rtl instead, but that
3830 is a relic of the past which no longer occurs. The reason is that
3831 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3832 generated would almost certainly die right after it was created. */
3834 /* Make X be output before the instruction BEFORE. */
3837 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
3842 gcc_assert (before);
3847 switch (GET_CODE (x))
3858 rtx next = NEXT_INSN (insn);
3859 add_insn_before (insn, before, bb);
3865 #ifdef ENABLE_RTL_CHECKING
3872 last = make_insn_raw (x);
3873 add_insn_before (last, before, bb);
3880 /* Make an instruction with body X and code JUMP_INSN
3881 and output it before the instruction BEFORE. */
3884 emit_jump_insn_before_noloc (rtx x, rtx before)
3886 rtx insn, last = NULL_RTX;
3888 gcc_assert (before);
3890 switch (GET_CODE (x))
3901 rtx next = NEXT_INSN (insn);
3902 add_insn_before (insn, before, NULL);
3908 #ifdef ENABLE_RTL_CHECKING
3915 last = make_jump_insn_raw (x);
3916 add_insn_before (last, before, NULL);
3923 /* Make an instruction with body X and code CALL_INSN
3924 and output it before the instruction BEFORE. */
3927 emit_call_insn_before_noloc (rtx x, rtx before)
3929 rtx last = NULL_RTX, insn;
3931 gcc_assert (before);
3933 switch (GET_CODE (x))
3944 rtx next = NEXT_INSN (insn);
3945 add_insn_before (insn, before, NULL);
3951 #ifdef ENABLE_RTL_CHECKING
3958 last = make_call_insn_raw (x);
3959 add_insn_before (last, before, NULL);
3966 /* Make an insn of code BARRIER
3967 and output it before the insn BEFORE. */
3970 emit_barrier_before (rtx before)
3972 rtx insn = rtx_alloc (BARRIER);
3974 INSN_UID (insn) = cur_insn_uid++;
3976 add_insn_before (insn, before, NULL);
3980 /* Emit the label LABEL before the insn BEFORE. */
3983 emit_label_before (rtx label, rtx before)
3985 /* This can be called twice for the same label as a result of the
3986 confusion that follows a syntax error! So make it harmless. */
3987 if (INSN_UID (label) == 0)
3989 INSN_UID (label) = cur_insn_uid++;
3990 add_insn_before (label, before, NULL);
3996 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3999 emit_note_before (enum insn_note subtype, rtx before)
4001 rtx note = rtx_alloc (NOTE);
4002 INSN_UID (note) = cur_insn_uid++;
4003 NOTE_KIND (note) = subtype;
4004 BLOCK_FOR_INSN (note) = NULL;
4005 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4007 add_insn_before (note, before, NULL);
4011 /* Helper for emit_insn_after, handles lists of instructions
4015 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4019 if (!bb && !BARRIER_P (after))
4020 bb = BLOCK_FOR_INSN (after);
4024 df_set_bb_dirty (bb);
4025 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4026 if (!BARRIER_P (last))
4028 set_block_for_insn (last, bb);
4029 df_insn_rescan (last);
4031 if (!BARRIER_P (last))
4033 set_block_for_insn (last, bb);
4034 df_insn_rescan (last);
4036 if (BB_END (bb) == after)
4040 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4043 after_after = NEXT_INSN (after);
4045 NEXT_INSN (after) = first;
4046 PREV_INSN (first) = after;
4047 NEXT_INSN (last) = after_after;
4049 PREV_INSN (after_after) = last;
4051 if (after == last_insn)
4057 /* Make X be output after the insn AFTER and set the BB of insn. If
4058 BB is NULL, an attempt is made to infer the BB from AFTER. */
4061 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4070 switch (GET_CODE (x))
4078 last = emit_insn_after_1 (x, after, bb);
4081 #ifdef ENABLE_RTL_CHECKING
4088 last = make_insn_raw (x);
4089 add_insn_after (last, after, bb);
4097 /* Make an insn of code JUMP_INSN with body X
4098 and output it after the insn AFTER. */
4101 emit_jump_insn_after_noloc (rtx x, rtx after)
4107 switch (GET_CODE (x))
4115 last = emit_insn_after_1 (x, after, NULL);
4118 #ifdef ENABLE_RTL_CHECKING
4125 last = make_jump_insn_raw (x);
4126 add_insn_after (last, after, NULL);
4133 /* Make an instruction with body X and code CALL_INSN
4134 and output it after the instruction AFTER. */
4137 emit_call_insn_after_noloc (rtx x, rtx after)
4143 switch (GET_CODE (x))
4151 last = emit_insn_after_1 (x, after, NULL);
4154 #ifdef ENABLE_RTL_CHECKING
4161 last = make_call_insn_raw (x);
4162 add_insn_after (last, after, NULL);
4169 /* Make an insn of code BARRIER
4170 and output it after the insn AFTER. */
4173 emit_barrier_after (rtx after)
4175 rtx insn = rtx_alloc (BARRIER);
4177 INSN_UID (insn) = cur_insn_uid++;
4179 add_insn_after (insn, after, NULL);
4183 /* Emit the label LABEL after the insn AFTER. */
4186 emit_label_after (rtx label, rtx after)
4188 /* This can be called twice for the same label
4189 as a result of the confusion that follows a syntax error!
4190 So make it harmless. */
4191 if (INSN_UID (label) == 0)
4193 INSN_UID (label) = cur_insn_uid++;
4194 add_insn_after (label, after, NULL);
4200 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4203 emit_note_after (enum insn_note subtype, rtx after)
4205 rtx note = rtx_alloc (NOTE);
4206 INSN_UID (note) = cur_insn_uid++;
4207 NOTE_KIND (note) = subtype;
4208 BLOCK_FOR_INSN (note) = NULL;
4209 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4210 add_insn_after (note, after, NULL);
4214 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4216 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4218 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4220 if (pattern == NULL_RTX || !loc)
4223 after = NEXT_INSN (after);
4226 if (active_insn_p (after) && !INSN_LOCATOR (after))
4227 INSN_LOCATOR (after) = loc;
4230 after = NEXT_INSN (after);
4235 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4237 emit_insn_after (rtx pattern, rtx after)
4240 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4242 return emit_insn_after_noloc (pattern, after, NULL);
4245 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4247 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4249 rtx last = emit_jump_insn_after_noloc (pattern, after);
4251 if (pattern == NULL_RTX || !loc)
4254 after = NEXT_INSN (after);
4257 if (active_insn_p (after) && !INSN_LOCATOR (after))
4258 INSN_LOCATOR (after) = loc;
4261 after = NEXT_INSN (after);
4266 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4268 emit_jump_insn_after (rtx pattern, rtx after)
4271 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4273 return emit_jump_insn_after_noloc (pattern, after);
4276 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4278 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4280 rtx last = emit_call_insn_after_noloc (pattern, after);
4282 if (pattern == NULL_RTX || !loc)
4285 after = NEXT_INSN (after);
4288 if (active_insn_p (after) && !INSN_LOCATOR (after))
4289 INSN_LOCATOR (after) = loc;
4292 after = NEXT_INSN (after);
4297 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4299 emit_call_insn_after (rtx pattern, rtx after)
4302 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4304 return emit_call_insn_after_noloc (pattern, after);
4307 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4309 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4311 rtx first = PREV_INSN (before);
4312 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4314 if (pattern == NULL_RTX || !loc)
4318 first = get_insns ();
4320 first = NEXT_INSN (first);
4323 if (active_insn_p (first) && !INSN_LOCATOR (first))
4324 INSN_LOCATOR (first) = loc;
4327 first = NEXT_INSN (first);
4332 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4334 emit_insn_before (rtx pattern, rtx before)
4336 if (INSN_P (before))
4337 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4339 return emit_insn_before_noloc (pattern, before, NULL);
4342 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4344 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4346 rtx first = PREV_INSN (before);
4347 rtx last = emit_jump_insn_before_noloc (pattern, before);
4349 if (pattern == NULL_RTX)
4352 first = NEXT_INSN (first);
4355 if (active_insn_p (first) && !INSN_LOCATOR (first))
4356 INSN_LOCATOR (first) = loc;
4359 first = NEXT_INSN (first);
4364 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4366 emit_jump_insn_before (rtx pattern, rtx before)
4368 if (INSN_P (before))
4369 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4371 return emit_jump_insn_before_noloc (pattern, before);
4374 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4376 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4378 rtx first = PREV_INSN (before);
4379 rtx last = emit_call_insn_before_noloc (pattern, before);
4381 if (pattern == NULL_RTX)
4384 first = NEXT_INSN (first);
4387 if (active_insn_p (first) && !INSN_LOCATOR (first))
4388 INSN_LOCATOR (first) = loc;
4391 first = NEXT_INSN (first);
4396 /* like emit_call_insn_before_noloc,
4397 but set insn_locator according to before. */
4399 emit_call_insn_before (rtx pattern, rtx before)
4401 if (INSN_P (before))
4402 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4404 return emit_call_insn_before_noloc (pattern, before);
4407 /* Take X and emit it at the end of the doubly-linked
4410 Returns the last insn emitted. */
4415 rtx last = last_insn;
4421 switch (GET_CODE (x))
4432 rtx next = NEXT_INSN (insn);
4439 #ifdef ENABLE_RTL_CHECKING
4446 last = make_insn_raw (x);
4454 /* Make an insn of code JUMP_INSN with pattern X
4455 and add it to the end of the doubly-linked list. */
4458 emit_jump_insn (rtx x)
4460 rtx last = NULL_RTX, insn;
4462 switch (GET_CODE (x))
4473 rtx next = NEXT_INSN (insn);
4480 #ifdef ENABLE_RTL_CHECKING
4487 last = make_jump_insn_raw (x);
4495 /* Make an insn of code CALL_INSN with pattern X
4496 and add it to the end of the doubly-linked list. */
4499 emit_call_insn (rtx x)
4503 switch (GET_CODE (x))
4511 insn = emit_insn (x);
4514 #ifdef ENABLE_RTL_CHECKING
4521 insn = make_call_insn_raw (x);
4529 /* Add the label LABEL to the end of the doubly-linked list. */
4532 emit_label (rtx label)
4534 /* This can be called twice for the same label
4535 as a result of the confusion that follows a syntax error!
4536 So make it harmless. */
4537 if (INSN_UID (label) == 0)
4539 INSN_UID (label) = cur_insn_uid++;
4545 /* Make an insn of code BARRIER
4546 and add it to the end of the doubly-linked list. */
4551 rtx barrier = rtx_alloc (BARRIER);
4552 INSN_UID (barrier) = cur_insn_uid++;
4557 /* Emit a copy of note ORIG. */
4560 emit_note_copy (rtx orig)
4564 note = rtx_alloc (NOTE);
4566 INSN_UID (note) = cur_insn_uid++;
4567 NOTE_DATA (note) = NOTE_DATA (orig);
4568 NOTE_KIND (note) = NOTE_KIND (orig);
4569 BLOCK_FOR_INSN (note) = NULL;
4575 /* Make an insn of code NOTE or type NOTE_NO
4576 and add it to the end of the doubly-linked list. */
4579 emit_note (enum insn_note kind)
4583 note = rtx_alloc (NOTE);
4584 INSN_UID (note) = cur_insn_uid++;
4585 NOTE_KIND (note) = kind;
4586 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4587 BLOCK_FOR_INSN (note) = NULL;
4592 /* Emit a clobber of lvalue X. */
4595 emit_clobber (rtx x)
4597 /* CONCATs should not appear in the insn stream. */
4598 if (GET_CODE (x) == CONCAT)
4600 emit_clobber (XEXP (x, 0));
4601 return emit_clobber (XEXP (x, 1));
4603 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4606 /* Return a sequence of insns to clobber lvalue X. */
4620 /* Emit a use of rvalue X. */
4625 /* CONCATs should not appear in the insn stream. */
4626 if (GET_CODE (x) == CONCAT)
4628 emit_use (XEXP (x, 0));
4629 return emit_use (XEXP (x, 1));
4631 return emit_insn (gen_rtx_USE (VOIDmode, x));
4634 /* Return a sequence of insns to use rvalue X. */
4648 /* Cause next statement to emit a line note even if the line number
4652 force_next_line_note (void)
4657 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4658 note of this type already exists, remove it first. */
4661 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4663 rtx note = find_reg_note (insn, kind, NULL_RTX);
4669 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4670 has multiple sets (some callers assume single_set
4671 means the insn only has one set, when in fact it
4672 means the insn only has one * useful * set). */
4673 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4679 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4680 It serves no useful purpose and breaks eliminate_regs. */
4681 if (GET_CODE (datum) == ASM_OPERANDS)
4686 XEXP (note, 0) = datum;
4687 df_notes_rescan (insn);
4695 XEXP (note, 0) = datum;
4701 add_reg_note (insn, kind, datum);
4707 df_notes_rescan (insn);
4713 return REG_NOTES (insn);
4716 /* Return an indication of which type of insn should have X as a body.
4717 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4719 static enum rtx_code
4720 classify_insn (rtx x)
4724 if (GET_CODE (x) == CALL)
4726 if (GET_CODE (x) == RETURN)
4728 if (GET_CODE (x) == SET)
4730 if (SET_DEST (x) == pc_rtx)
4732 else if (GET_CODE (SET_SRC (x)) == CALL)
4737 if (GET_CODE (x) == PARALLEL)
4740 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4741 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4743 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4744 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4746 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4747 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4753 /* Emit the rtl pattern X as an appropriate kind of insn.
4754 If X is a label, it is simply added into the insn chain. */
4759 enum rtx_code code = classify_insn (x);
4764 return emit_label (x);
4766 return emit_insn (x);
4769 rtx insn = emit_jump_insn (x);
4770 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4771 return emit_barrier ();
4775 return emit_call_insn (x);
4781 /* Space for free sequence stack entries. */
4782 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4784 /* Begin emitting insns to a sequence. If this sequence will contain
4785 something that might cause the compiler to pop arguments to function
4786 calls (because those pops have previously been deferred; see
4787 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4788 before calling this function. That will ensure that the deferred
4789 pops are not accidentally emitted in the middle of this sequence. */
4792 start_sequence (void)
4794 struct sequence_stack *tem;
4796 if (free_sequence_stack != NULL)
4798 tem = free_sequence_stack;
4799 free_sequence_stack = tem->next;
4802 tem = GGC_NEW (struct sequence_stack);
4804 tem->next = seq_stack;
4805 tem->first = first_insn;
4806 tem->last = last_insn;
4814 /* Set up the insn chain starting with FIRST as the current sequence,
4815 saving the previously current one. See the documentation for
4816 start_sequence for more information about how to use this function. */
4819 push_to_sequence (rtx first)
4825 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4831 /* Like push_to_sequence, but take the last insn as an argument to avoid
4832 looping through the list. */
4835 push_to_sequence2 (rtx first, rtx last)
4843 /* Set up the outer-level insn chain
4844 as the current sequence, saving the previously current one. */
4847 push_topmost_sequence (void)
4849 struct sequence_stack *stack, *top = NULL;
4853 for (stack = seq_stack; stack; stack = stack->next)
4856 first_insn = top->first;
4857 last_insn = top->last;
4860 /* After emitting to the outer-level insn chain, update the outer-level
4861 insn chain, and restore the previous saved state. */
4864 pop_topmost_sequence (void)
4866 struct sequence_stack *stack, *top = NULL;
4868 for (stack = seq_stack; stack; stack = stack->next)
4871 top->first = first_insn;
4872 top->last = last_insn;
4877 /* After emitting to a sequence, restore previous saved state.
4879 To get the contents of the sequence just made, you must call
4880 `get_insns' *before* calling here.
4882 If the compiler might have deferred popping arguments while
4883 generating this sequence, and this sequence will not be immediately
4884 inserted into the instruction stream, use do_pending_stack_adjust
4885 before calling get_insns. That will ensure that the deferred
4886 pops are inserted into this sequence, and not into some random
4887 location in the instruction stream. See INHIBIT_DEFER_POP for more
4888 information about deferred popping of arguments. */
4893 struct sequence_stack *tem = seq_stack;
4895 first_insn = tem->first;
4896 last_insn = tem->last;
4897 seq_stack = tem->next;
4899 memset (tem, 0, sizeof (*tem));
4900 tem->next = free_sequence_stack;
4901 free_sequence_stack = tem;
4904 /* Return 1 if currently emitting into a sequence. */
4907 in_sequence_p (void)
4909 return seq_stack != 0;
4912 /* Put the various virtual registers into REGNO_REG_RTX. */
4915 init_virtual_regs (void)
4917 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4918 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4919 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4920 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4921 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4925 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4926 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4927 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4928 static int copy_insn_n_scratches;
4930 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4931 copied an ASM_OPERANDS.
4932 In that case, it is the original input-operand vector. */
4933 static rtvec orig_asm_operands_vector;
4935 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4936 copied an ASM_OPERANDS.
4937 In that case, it is the copied input-operand vector. */
4938 static rtvec copy_asm_operands_vector;
4940 /* Likewise for the constraints vector. */
4941 static rtvec orig_asm_constraints_vector;
4942 static rtvec copy_asm_constraints_vector;
4944 /* Recursively create a new copy of an rtx for copy_insn.
4945 This function differs from copy_rtx in that it handles SCRATCHes and
4946 ASM_OPERANDs properly.
4947 Normally, this function is not used directly; use copy_insn as front end.
4948 However, you could first copy an insn pattern with copy_insn and then use
4949 this function afterwards to properly copy any REG_NOTEs containing
4953 copy_insn_1 (rtx orig)
4958 const char *format_ptr;
4960 code = GET_CODE (orig);
4975 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4980 for (i = 0; i < copy_insn_n_scratches; i++)
4981 if (copy_insn_scratch_in[i] == orig)
4982 return copy_insn_scratch_out[i];
4986 if (shared_const_p (orig))
4990 /* A MEM with a constant address is not sharable. The problem is that
4991 the constant address may need to be reloaded. If the mem is shared,
4992 then reloading one copy of this mem will cause all copies to appear
4993 to have been reloaded. */
4999 /* Copy the various flags, fields, and other information. We assume
5000 that all fields need copying, and then clear the fields that should
5001 not be copied. That is the sensible default behavior, and forces
5002 us to explicitly document why we are *not* copying a flag. */
5003 copy = shallow_copy_rtx (orig);
5005 /* We do not copy the USED flag, which is used as a mark bit during
5006 walks over the RTL. */
5007 RTX_FLAG (copy, used) = 0;
5009 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5012 RTX_FLAG (copy, jump) = 0;
5013 RTX_FLAG (copy, call) = 0;
5014 RTX_FLAG (copy, frame_related) = 0;
5017 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5019 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5020 switch (*format_ptr++)
5023 if (XEXP (orig, i) != NULL)
5024 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5029 if (XVEC (orig, i) == orig_asm_constraints_vector)
5030 XVEC (copy, i) = copy_asm_constraints_vector;
5031 else if (XVEC (orig, i) == orig_asm_operands_vector)
5032 XVEC (copy, i) = copy_asm_operands_vector;
5033 else if (XVEC (orig, i) != NULL)
5035 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5036 for (j = 0; j < XVECLEN (copy, i); j++)
5037 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5048 /* These are left unchanged. */
5055 if (code == SCRATCH)
5057 i = copy_insn_n_scratches++;
5058 gcc_assert (i < MAX_RECOG_OPERANDS);
5059 copy_insn_scratch_in[i] = orig;
5060 copy_insn_scratch_out[i] = copy;
5062 else if (code == ASM_OPERANDS)
5064 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5065 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5066 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5067 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5073 /* Create a new copy of an rtx.
5074 This function differs from copy_rtx in that it handles SCRATCHes and
5075 ASM_OPERANDs properly.
5076 INSN doesn't really have to be a full INSN; it could be just the
5079 copy_insn (rtx insn)
5081 copy_insn_n_scratches = 0;
5082 orig_asm_operands_vector = 0;
5083 orig_asm_constraints_vector = 0;
5084 copy_asm_operands_vector = 0;
5085 copy_asm_constraints_vector = 0;
5086 return copy_insn_1 (insn);
5089 /* Initialize data structures and variables in this file
5090 before generating rtl for each function. */
5098 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5099 last_location = UNKNOWN_LOCATION;
5100 first_label_num = label_num;
5103 /* Init the tables that describe all the pseudo regs. */
5105 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5107 crtl->emit.regno_pointer_align
5108 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5111 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5113 /* Put copies of all the hard registers into regno_reg_rtx. */
5114 memcpy (regno_reg_rtx,
5115 static_regno_reg_rtx,
5116 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5118 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5119 init_virtual_regs ();
5121 /* Indicate that the virtual registers and stack locations are
5123 REG_POINTER (stack_pointer_rtx) = 1;
5124 REG_POINTER (frame_pointer_rtx) = 1;
5125 REG_POINTER (hard_frame_pointer_rtx) = 1;
5126 REG_POINTER (arg_pointer_rtx) = 1;
5128 REG_POINTER (virtual_incoming_args_rtx) = 1;
5129 REG_POINTER (virtual_stack_vars_rtx) = 1;
5130 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5131 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5132 REG_POINTER (virtual_cfa_rtx) = 1;
5134 #ifdef STACK_BOUNDARY
5135 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5136 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5137 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5138 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5140 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5141 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5142 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5143 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5144 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5147 #ifdef INIT_EXPANDERS
5152 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5155 gen_const_vector (enum machine_mode mode, int constant)
5160 enum machine_mode inner;
5162 units = GET_MODE_NUNITS (mode);
5163 inner = GET_MODE_INNER (mode);
5165 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5167 v = rtvec_alloc (units);
5169 /* We need to call this function after we set the scalar const_tiny_rtx
5171 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5173 for (i = 0; i < units; ++i)
5174 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5176 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5180 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5181 all elements are zero, and the one vector when all elements are one. */
5183 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5185 enum machine_mode inner = GET_MODE_INNER (mode);
5186 int nunits = GET_MODE_NUNITS (mode);
5190 /* Check to see if all of the elements have the same value. */
5191 x = RTVEC_ELT (v, nunits - 1);
5192 for (i = nunits - 2; i >= 0; i--)
5193 if (RTVEC_ELT (v, i) != x)
5196 /* If the values are all the same, check to see if we can use one of the
5197 standard constant vectors. */
5200 if (x == CONST0_RTX (inner))
5201 return CONST0_RTX (mode);
5202 else if (x == CONST1_RTX (inner))
5203 return CONST1_RTX (mode);
5206 return gen_rtx_raw_CONST_VECTOR (mode, v);
5209 /* Initialise global register information required by all functions. */
5212 init_emit_regs (void)
5216 /* Reset register attributes */
5217 htab_empty (reg_attrs_htab);
5219 /* We need reg_raw_mode, so initialize the modes now. */
5220 init_reg_modes_target ();
5222 /* Assign register numbers to the globally defined register rtx. */
5223 pc_rtx = gen_rtx_PC (VOIDmode);
5224 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5225 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5226 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5227 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5228 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5229 virtual_incoming_args_rtx =
5230 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5231 virtual_stack_vars_rtx =
5232 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5233 virtual_stack_dynamic_rtx =
5234 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5235 virtual_outgoing_args_rtx =
5236 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5237 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5239 /* Initialize RTL for commonly used hard registers. These are
5240 copied into regno_reg_rtx as we begin to compile each function. */
5241 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5242 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5244 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5245 return_address_pointer_rtx
5246 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5249 #ifdef STATIC_CHAIN_REGNUM
5250 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5252 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5253 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5254 static_chain_incoming_rtx
5255 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5258 static_chain_incoming_rtx = static_chain_rtx;
5262 static_chain_rtx = STATIC_CHAIN;
5264 #ifdef STATIC_CHAIN_INCOMING
5265 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5267 static_chain_incoming_rtx = static_chain_rtx;
5271 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5272 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5274 pic_offset_table_rtx = NULL_RTX;
5277 /* Create some permanent unique rtl objects shared between all functions.
5278 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5281 init_emit_once (int line_numbers)
5284 enum machine_mode mode;
5285 enum machine_mode double_mode;
5287 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5289 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5290 const_int_htab_eq, NULL);
5292 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5293 const_double_htab_eq, NULL);
5295 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5296 const_fixed_htab_eq, NULL);
5298 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5299 mem_attrs_htab_eq, NULL);
5300 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5301 reg_attrs_htab_eq, NULL);
5303 no_line_numbers = ! line_numbers;
5305 /* Compute the word and byte modes. */
5307 byte_mode = VOIDmode;
5308 word_mode = VOIDmode;
5309 double_mode = VOIDmode;
5311 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5313 mode = GET_MODE_WIDER_MODE (mode))
5315 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5316 && byte_mode == VOIDmode)
5319 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5320 && word_mode == VOIDmode)
5324 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5326 mode = GET_MODE_WIDER_MODE (mode))
5328 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5329 && double_mode == VOIDmode)
5333 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5335 #ifdef INIT_EXPANDERS
5336 /* This is to initialize {init|mark|free}_machine_status before the first
5337 call to push_function_context_to. This is needed by the Chill front
5338 end which calls push_function_context_to before the first call to
5339 init_function_start. */
5343 /* Create the unique rtx's for certain rtx codes and operand values. */
5345 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5346 tries to use these variables. */
5347 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5348 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5349 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5351 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5352 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5353 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5355 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5357 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5358 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5359 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5364 dconsthalf = dconst1;
5365 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5367 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5369 const REAL_VALUE_TYPE *const r =
5370 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5372 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5374 mode = GET_MODE_WIDER_MODE (mode))
5375 const_tiny_rtx[i][(int) mode] =
5376 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5378 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5380 mode = GET_MODE_WIDER_MODE (mode))
5381 const_tiny_rtx[i][(int) mode] =
5382 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5384 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5386 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5388 mode = GET_MODE_WIDER_MODE (mode))
5389 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5391 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5393 mode = GET_MODE_WIDER_MODE (mode))
5394 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5397 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5399 mode = GET_MODE_WIDER_MODE (mode))
5401 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5402 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5405 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5407 mode = GET_MODE_WIDER_MODE (mode))
5409 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5410 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5413 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5415 mode = GET_MODE_WIDER_MODE (mode))
5417 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5418 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5421 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5423 mode = GET_MODE_WIDER_MODE (mode))
5425 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5426 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5429 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5431 mode = GET_MODE_WIDER_MODE (mode))
5433 FCONST0(mode).data.high = 0;
5434 FCONST0(mode).data.low = 0;
5435 FCONST0(mode).mode = mode;
5436 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5437 FCONST0 (mode), mode);
5440 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5442 mode = GET_MODE_WIDER_MODE (mode))
5444 FCONST0(mode).data.high = 0;
5445 FCONST0(mode).data.low = 0;
5446 FCONST0(mode).mode = mode;
5447 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5448 FCONST0 (mode), mode);
5451 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5453 mode = GET_MODE_WIDER_MODE (mode))
5455 FCONST0(mode).data.high = 0;
5456 FCONST0(mode).data.low = 0;
5457 FCONST0(mode).mode = mode;
5458 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5459 FCONST0 (mode), mode);
5461 /* We store the value 1. */
5462 FCONST1(mode).data.high = 0;
5463 FCONST1(mode).data.low = 0;
5464 FCONST1(mode).mode = mode;
5465 lshift_double (1, 0, GET_MODE_FBIT (mode),
5466 2 * HOST_BITS_PER_WIDE_INT,
5467 &FCONST1(mode).data.low,
5468 &FCONST1(mode).data.high,
5469 SIGNED_FIXED_POINT_MODE_P (mode));
5470 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5471 FCONST1 (mode), mode);
5474 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5476 mode = GET_MODE_WIDER_MODE (mode))
5478 FCONST0(mode).data.high = 0;
5479 FCONST0(mode).data.low = 0;
5480 FCONST0(mode).mode = mode;
5481 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5482 FCONST0 (mode), mode);
5484 /* We store the value 1. */
5485 FCONST1(mode).data.high = 0;
5486 FCONST1(mode).data.low = 0;
5487 FCONST1(mode).mode = mode;
5488 lshift_double (1, 0, GET_MODE_FBIT (mode),
5489 2 * HOST_BITS_PER_WIDE_INT,
5490 &FCONST1(mode).data.low,
5491 &FCONST1(mode).data.high,
5492 SIGNED_FIXED_POINT_MODE_P (mode));
5493 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5494 FCONST1 (mode), mode);
5497 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5499 mode = GET_MODE_WIDER_MODE (mode))
5501 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5504 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5506 mode = GET_MODE_WIDER_MODE (mode))
5508 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5511 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5513 mode = GET_MODE_WIDER_MODE (mode))
5515 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5516 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5519 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5521 mode = GET_MODE_WIDER_MODE (mode))
5523 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5524 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5527 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5528 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5529 const_tiny_rtx[0][i] = const0_rtx;
5531 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5532 if (STORE_FLAG_VALUE == 1)
5533 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5536 /* Produce exact duplicate of insn INSN after AFTER.
5537 Care updating of libcall regions if present. */
5540 emit_copy_of_insn_after (rtx insn, rtx after)
5544 switch (GET_CODE (insn))
5547 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5551 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5555 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5556 if (CALL_INSN_FUNCTION_USAGE (insn))
5557 CALL_INSN_FUNCTION_USAGE (new_rtx)
5558 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5559 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5560 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5561 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5562 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5563 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5570 /* Update LABEL_NUSES. */
5571 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5573 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5575 /* If the old insn is frame related, then so is the new one. This is
5576 primarily needed for IA-64 unwind info which marks epilogue insns,
5577 which may be duplicated by the basic block reordering code. */
5578 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5580 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5581 will make them. REG_LABEL_TARGETs are created there too, but are
5582 supposed to be sticky, so we copy them. */
5583 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5584 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5586 if (GET_CODE (link) == EXPR_LIST)
5587 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5588 copy_insn_1 (XEXP (link, 0)));
5590 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5593 INSN_CODE (new_rtx) = INSN_CODE (insn);
5597 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5599 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5601 if (hard_reg_clobbers[mode][regno])
5602 return hard_reg_clobbers[mode][regno];
5604 return (hard_reg_clobbers[mode][regno] =
5605 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5608 #include "gt-emit-rtl.h"