1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
70 /* This is *not* reset after each function. It gives each CODE_LABEL
71 in the entire compilation a unique label number. */
73 static GTY(()) int label_num = 1;
75 /* Nonzero means do not generate NOTEs for source line numbers. */
77 static int no_line_numbers;
79 /* Commonly used rtx's, so that we only need space for one copy.
80 These are initialized once for the entire compilation.
81 All of these are unique; no other rtx-object will be equal to any
84 rtx global_rtl[GR_MAX];
86 /* Commonly used RTL for hard registers. These objects are not necessarily
87 unique, so we allocate them separately from global_rtl. They are
88 initialized once per compilation unit, then copied into regno_reg_rtx
89 at the beginning of each function. */
90 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
92 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
93 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
94 record a copy of const[012]_rtx. */
96 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
100 REAL_VALUE_TYPE dconst0;
101 REAL_VALUE_TYPE dconst1;
102 REAL_VALUE_TYPE dconst2;
103 REAL_VALUE_TYPE dconst3;
104 REAL_VALUE_TYPE dconst10;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconstm2;
107 REAL_VALUE_TYPE dconsthalf;
108 REAL_VALUE_TYPE dconstthird;
109 REAL_VALUE_TYPE dconstsqrt2;
110 REAL_VALUE_TYPE dconste;
112 /* Record fixed-point constant 0 and 1. */
113 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
114 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
116 /* All references to the following fixed hard registers go through
117 these unique rtl objects. On machines where the frame-pointer and
118 arg-pointer are the same register, they use the same unique object.
120 After register allocation, other rtl objects which used to be pseudo-regs
121 may be clobbered to refer to the frame-pointer register.
122 But references that were originally to the frame-pointer can be
123 distinguished from the others because they contain frame_pointer_rtx.
125 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
126 tricky: until register elimination has taken place hard_frame_pointer_rtx
127 should be used if it is being set, and frame_pointer_rtx otherwise. After
128 register elimination hard_frame_pointer_rtx should always be used.
129 On machines where the two registers are same (most) then these are the
132 In an inline procedure, the stack and frame pointer rtxs may not be
133 used for anything else. */
134 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
135 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
136 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
138 /* This is used to implement __builtin_return_address for some machines.
139 See for instance the MIPS port. */
140 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
142 /* We make one copy of (const_int C) where C is in
143 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
144 to save space during the compilation and simplify comparisons of
147 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
149 /* A hash table storing CONST_INTs whose absolute value is greater
150 than MAX_SAVED_CONST_INT. */
152 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
153 htab_t const_int_htab;
155 /* A hash table storing memory attribute structures. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
157 htab_t mem_attrs_htab;
159 /* A hash table storing register attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
161 htab_t reg_attrs_htab;
163 /* A hash table storing all CONST_DOUBLEs. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
165 htab_t const_double_htab;
167 /* A hash table storing all CONST_FIXEDs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_fixed_htab;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_location (cfun->emit->x_last_location)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_call_insn_raw (rtx);
178 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
179 static void set_used_decls (tree);
180 static void mark_label_nuses (rtx);
181 static hashval_t const_int_htab_hash (const void *);
182 static int const_int_htab_eq (const void *, const void *);
183 static hashval_t const_double_htab_hash (const void *);
184 static int const_double_htab_eq (const void *, const void *);
185 static rtx lookup_const_double (rtx);
186 static hashval_t const_fixed_htab_hash (const void *);
187 static int const_fixed_htab_eq (const void *, const void *);
188 static rtx lookup_const_fixed (rtx);
189 static hashval_t mem_attrs_htab_hash (const void *);
190 static int mem_attrs_htab_eq (const void *, const void *);
191 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
193 static hashval_t reg_attrs_htab_hash (const void *);
194 static int reg_attrs_htab_eq (const void *, const void *);
195 static reg_attrs *get_reg_attrs (tree, int);
196 static tree component_ref_for_mem_expr (tree);
197 static rtx gen_const_vector (enum machine_mode, int);
198 static void copy_rtx_if_shared_1 (rtx *orig);
200 /* Probability of the conditional branch currently proceeded by try_split.
201 Set to -1 otherwise. */
202 int split_branch_probability = -1;
204 /* Returns a hash code for X (which is a really a CONST_INT). */
207 const_int_htab_hash (const void *x)
209 return (hashval_t) INTVAL ((const_rtx) x);
212 /* Returns nonzero if the value represented by X (which is really a
213 CONST_INT) is the same as that given by Y (which is really a
217 const_int_htab_eq (const void *x, const void *y)
219 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
222 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
224 const_double_htab_hash (const void *x)
226 const_rtx const value = (const_rtx) x;
229 if (GET_MODE (value) == VOIDmode)
230 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
233 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h ^= GET_MODE (value);
240 /* Returns nonzero if the value represented by X (really a ...)
241 is the same as that represented by Y (really a ...) */
243 const_double_htab_eq (const void *x, const void *y)
245 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
247 if (GET_MODE (a) != GET_MODE (b))
249 if (GET_MODE (a) == VOIDmode)
250 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
251 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
253 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
254 CONST_DOUBLE_REAL_VALUE (b));
257 /* Returns a hash code for X (which is really a CONST_FIXED). */
260 const_fixed_htab_hash (const void *x)
262 const_rtx const value = (const_rtx) x;
265 h = fixed_hash (CONST_FIXED_VALUE (value));
266 /* MODE is used in the comparison, so it should be in the hash. */
267 h ^= GET_MODE (value);
271 /* Returns nonzero if the value represented by X (really a ...)
272 is the same as that represented by Y (really a ...). */
275 const_fixed_htab_eq (const void *x, const void *y)
277 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
279 if (GET_MODE (a) != GET_MODE (b))
281 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
284 /* Returns a hash code for X (which is a really a mem_attrs *). */
287 mem_attrs_htab_hash (const void *x)
289 const mem_attrs *const p = (const mem_attrs *) x;
291 return (p->alias ^ (p->align * 1000)
292 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
293 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
294 ^ (size_t) iterative_hash_expr (p->expr, 0));
297 /* Returns nonzero if the value represented by X (which is really a
298 mem_attrs *) is the same as that given by Y (which is also really a
302 mem_attrs_htab_eq (const void *x, const void *y)
304 const mem_attrs *const p = (const mem_attrs *) x;
305 const mem_attrs *const q = (const mem_attrs *) y;
307 return (p->alias == q->alias && p->offset == q->offset
308 && p->size == q->size && p->align == q->align
309 && (p->expr == q->expr
310 || (p->expr != NULL_TREE && q->expr != NULL_TREE
311 && operand_equal_p (p->expr, q->expr, 0))));
314 /* Allocate a new mem_attrs structure and insert it into the hash table if
315 one identical to it is not already in the table. We are doing this for
319 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
320 unsigned int align, enum machine_mode mode)
325 /* If everything is the default, we can just return zero.
326 This must match what the corresponding MEM_* macros return when the
327 field is not present. */
328 if (alias == 0 && expr == 0 && offset == 0
330 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
331 && (STRICT_ALIGNMENT && mode != BLKmode
332 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
337 attrs.offset = offset;
341 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
344 *slot = ggc_alloc (sizeof (mem_attrs));
345 memcpy (*slot, &attrs, sizeof (mem_attrs));
351 /* Returns a hash code for X (which is a really a reg_attrs *). */
354 reg_attrs_htab_hash (const void *x)
356 const reg_attrs *const p = (const reg_attrs *) x;
358 return ((p->offset * 1000) ^ (long) p->decl);
361 /* Returns nonzero if the value represented by X (which is really a
362 reg_attrs *) is the same as that given by Y (which is also really a
366 reg_attrs_htab_eq (const void *x, const void *y)
368 const reg_attrs *const p = (const reg_attrs *) x;
369 const reg_attrs *const q = (const reg_attrs *) y;
371 return (p->decl == q->decl && p->offset == q->offset);
373 /* Allocate a new reg_attrs structure and insert it into the hash table if
374 one identical to it is not already in the table. We are doing this for
378 get_reg_attrs (tree decl, int offset)
383 /* If everything is the default, we can just return zero. */
384 if (decl == 0 && offset == 0)
388 attrs.offset = offset;
390 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
393 *slot = ggc_alloc (sizeof (reg_attrs));
394 memcpy (*slot, &attrs, sizeof (reg_attrs));
402 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
408 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
409 MEM_VOLATILE_P (x) = true;
415 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
416 don't attempt to share with the various global pieces of rtl (such as
417 frame_pointer_rtx). */
420 gen_raw_REG (enum machine_mode mode, int regno)
422 rtx x = gen_rtx_raw_REG (mode, regno);
423 ORIGINAL_REGNO (x) = regno;
427 /* There are some RTL codes that require special attention; the generation
428 functions do the raw handling. If you add to this list, modify
429 special_rtx in gengenrtl.c as well. */
432 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
436 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
437 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
439 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
440 if (const_true_rtx && arg == STORE_FLAG_VALUE)
441 return const_true_rtx;
444 /* Look up the CONST_INT in the hash table. */
445 slot = htab_find_slot_with_hash (const_int_htab, &arg,
446 (hashval_t) arg, INSERT);
448 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
454 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
456 return GEN_INT (trunc_int_for_mode (c, mode));
459 /* CONST_DOUBLEs might be created from pairs of integers, or from
460 REAL_VALUE_TYPEs. Also, their length is known only at run time,
461 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
463 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
464 hash table. If so, return its counterpart; otherwise add it
465 to the hash table and return it. */
467 lookup_const_double (rtx real)
469 void **slot = htab_find_slot (const_double_htab, real, INSERT);
476 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
477 VALUE in mode MODE. */
479 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
481 rtx real = rtx_alloc (CONST_DOUBLE);
482 PUT_MODE (real, mode);
486 return lookup_const_double (real);
489 /* Determine whether FIXED, a CONST_FIXED, already exists in the
490 hash table. If so, return its counterpart; otherwise add it
491 to the hash table and return it. */
494 lookup_const_fixed (rtx fixed)
496 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
503 /* Return a CONST_FIXED rtx for a fixed-point value specified by
504 VALUE in mode MODE. */
507 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
509 rtx fixed = rtx_alloc (CONST_FIXED);
510 PUT_MODE (fixed, mode);
514 return lookup_const_fixed (fixed);
517 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
518 of ints: I0 is the low-order word and I1 is the high-order word.
519 Do not use this routine for non-integer modes; convert to
520 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
523 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
528 /* There are the following cases (note that there are no modes with
529 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
531 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
533 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
534 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
535 from copies of the sign bit, and sign of i0 and i1 are the same), then
536 we return a CONST_INT for i0.
537 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
538 if (mode != VOIDmode)
540 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
541 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
542 /* We can get a 0 for an error mark. */
543 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
544 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
546 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
547 return gen_int_mode (i0, mode);
549 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
552 /* If this integer fits in one word, return a CONST_INT. */
553 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
556 /* We use VOIDmode for integers. */
557 value = rtx_alloc (CONST_DOUBLE);
558 PUT_MODE (value, VOIDmode);
560 CONST_DOUBLE_LOW (value) = i0;
561 CONST_DOUBLE_HIGH (value) = i1;
563 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
564 XWINT (value, i) = 0;
566 return lookup_const_double (value);
570 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
572 /* In case the MD file explicitly references the frame pointer, have
573 all such references point to the same frame pointer. This is
574 used during frame pointer elimination to distinguish the explicit
575 references to these registers from pseudos that happened to be
578 If we have eliminated the frame pointer or arg pointer, we will
579 be using it as a normal register, for example as a spill
580 register. In such cases, we might be accessing it in a mode that
581 is not Pmode and therefore cannot use the pre-allocated rtx.
583 Also don't do this when we are making new REGs in reload, since
584 we don't want to get confused with the real pointers. */
586 if (mode == Pmode && !reload_in_progress)
588 if (regno == FRAME_POINTER_REGNUM
589 && (!reload_completed || frame_pointer_needed))
590 return frame_pointer_rtx;
591 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
592 if (regno == HARD_FRAME_POINTER_REGNUM
593 && (!reload_completed || frame_pointer_needed))
594 return hard_frame_pointer_rtx;
596 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
597 if (regno == ARG_POINTER_REGNUM)
598 return arg_pointer_rtx;
600 #ifdef RETURN_ADDRESS_POINTER_REGNUM
601 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
602 return return_address_pointer_rtx;
604 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
605 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
606 return pic_offset_table_rtx;
607 if (regno == STACK_POINTER_REGNUM)
608 return stack_pointer_rtx;
612 /* If the per-function register table has been set up, try to re-use
613 an existing entry in that table to avoid useless generation of RTL.
615 This code is disabled for now until we can fix the various backends
616 which depend on having non-shared hard registers in some cases. Long
617 term we want to re-enable this code as it can significantly cut down
618 on the amount of useless RTL that gets generated.
620 We'll also need to fix some code that runs after reload that wants to
621 set ORIGINAL_REGNO. */
626 && regno < FIRST_PSEUDO_REGISTER
627 && reg_raw_mode[regno] == mode)
628 return regno_reg_rtx[regno];
631 return gen_raw_REG (mode, regno);
635 gen_rtx_MEM (enum machine_mode mode, rtx addr)
637 rtx rt = gen_rtx_raw_MEM (mode, addr);
639 /* This field is not cleared by the mere allocation of the rtx, so
646 /* Generate a memory referring to non-trapping constant memory. */
649 gen_const_mem (enum machine_mode mode, rtx addr)
651 rtx mem = gen_rtx_MEM (mode, addr);
652 MEM_READONLY_P (mem) = 1;
653 MEM_NOTRAP_P (mem) = 1;
657 /* Generate a MEM referring to fixed portions of the frame, e.g., register
661 gen_frame_mem (enum machine_mode mode, rtx addr)
663 rtx mem = gen_rtx_MEM (mode, addr);
664 MEM_NOTRAP_P (mem) = 1;
665 set_mem_alias_set (mem, get_frame_alias_set ());
669 /* Generate a MEM referring to a temporary use of the stack, not part
670 of the fixed stack frame. For example, something which is pushed
671 by a target splitter. */
673 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
675 rtx mem = gen_rtx_MEM (mode, addr);
676 MEM_NOTRAP_P (mem) = 1;
677 if (!current_function_calls_alloca)
678 set_mem_alias_set (mem, get_frame_alias_set ());
682 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
683 this construct would be valid, and false otherwise. */
686 validate_subreg (enum machine_mode omode, enum machine_mode imode,
687 const_rtx reg, unsigned int offset)
689 unsigned int isize = GET_MODE_SIZE (imode);
690 unsigned int osize = GET_MODE_SIZE (omode);
692 /* All subregs must be aligned. */
693 if (offset % osize != 0)
696 /* The subreg offset cannot be outside the inner object. */
700 /* ??? This should not be here. Temporarily continue to allow word_mode
701 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
702 Generally, backends are doing something sketchy but it'll take time to
704 if (omode == word_mode)
706 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
707 is the culprit here, and not the backends. */
708 else if (osize >= UNITS_PER_WORD && isize >= osize)
710 /* Allow component subregs of complex and vector. Though given the below
711 extraction rules, it's not always clear what that means. */
712 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
713 && GET_MODE_INNER (imode) == omode)
715 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
716 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
717 represent this. It's questionable if this ought to be represented at
718 all -- why can't this all be hidden in post-reload splitters that make
719 arbitrarily mode changes to the registers themselves. */
720 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
722 /* Subregs involving floating point modes are not allowed to
723 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
724 (subreg:SI (reg:DF) 0) isn't. */
725 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
731 /* Paradoxical subregs must have offset zero. */
735 /* This is a normal subreg. Verify that the offset is representable. */
737 /* For hard registers, we already have most of these rules collected in
738 subreg_offset_representable_p. */
739 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
741 unsigned int regno = REGNO (reg);
743 #ifdef CANNOT_CHANGE_MODE_CLASS
744 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
745 && GET_MODE_INNER (imode) == omode)
747 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
751 return subreg_offset_representable_p (regno, imode, offset, omode);
754 /* For pseudo registers, we want most of the same checks. Namely:
755 If the register no larger than a word, the subreg must be lowpart.
756 If the register is larger than a word, the subreg must be the lowpart
757 of a subword. A subreg does *not* perform arbitrary bit extraction.
758 Given that we've already checked mode/offset alignment, we only have
759 to check subword subregs here. */
760 if (osize < UNITS_PER_WORD)
762 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
763 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
764 if (offset % UNITS_PER_WORD != low_off)
771 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
773 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
774 return gen_rtx_raw_SUBREG (mode, reg, offset);
777 /* Generate a SUBREG representing the least-significant part of REG if MODE
778 is smaller than mode of REG, otherwise paradoxical SUBREG. */
781 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
783 enum machine_mode inmode;
785 inmode = GET_MODE (reg);
786 if (inmode == VOIDmode)
788 return gen_rtx_SUBREG (mode, reg,
789 subreg_lowpart_offset (mode, inmode));
792 /* gen_rtvec (n, [rt1, ..., rtn])
794 ** This routine creates an rtvec and stores within it the
795 ** pointers to rtx's which are its arguments.
800 gen_rtvec (int n, ...)
809 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
811 vector = alloca (n * sizeof (rtx));
813 for (i = 0; i < n; i++)
814 vector[i] = va_arg (p, rtx);
816 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
820 return gen_rtvec_v (save_n, vector);
824 gen_rtvec_v (int n, rtx *argp)
830 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
832 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
834 for (i = 0; i < n; i++)
835 rt_val->elem[i] = *argp++;
840 /* Return the number of bytes between the start of an OUTER_MODE
841 in-memory value and the start of an INNER_MODE in-memory value,
842 given that the former is a lowpart of the latter. It may be a
843 paradoxical lowpart, in which case the offset will be negative
844 on big-endian targets. */
847 byte_lowpart_offset (enum machine_mode outer_mode,
848 enum machine_mode inner_mode)
850 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
851 return subreg_lowpart_offset (outer_mode, inner_mode);
853 return -subreg_lowpart_offset (inner_mode, outer_mode);
856 /* Generate a REG rtx for a new pseudo register of mode MODE.
857 This pseudo is assigned the next sequential register number. */
860 gen_reg_rtx (enum machine_mode mode)
862 struct function *f = cfun;
865 gcc_assert (can_create_pseudo_p ());
867 if (generating_concat_p
868 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
869 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
871 /* For complex modes, don't make a single pseudo.
872 Instead, make a CONCAT of two pseudos.
873 This allows noncontiguous allocation of the real and imaginary parts,
874 which makes much better code. Besides, allocating DCmode
875 pseudos overstrains reload on some machines like the 386. */
876 rtx realpart, imagpart;
877 enum machine_mode partmode = GET_MODE_INNER (mode);
879 realpart = gen_reg_rtx (partmode);
880 imagpart = gen_reg_rtx (partmode);
881 return gen_rtx_CONCAT (mode, realpart, imagpart);
884 /* Make sure regno_pointer_align, and regno_reg_rtx are large
885 enough to have an element for this pseudo reg number. */
887 if (reg_rtx_no == f->emit->regno_pointer_align_length)
889 int old_size = f->emit->regno_pointer_align_length;
893 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
894 memset (new + old_size, 0, old_size);
895 f->emit->regno_pointer_align = (unsigned char *) new;
897 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
898 old_size * 2 * sizeof (rtx));
899 memset (new1 + old_size, 0, old_size * sizeof (rtx));
900 regno_reg_rtx = new1;
902 f->emit->regno_pointer_align_length = old_size * 2;
905 val = gen_raw_REG (mode, reg_rtx_no);
906 regno_reg_rtx[reg_rtx_no++] = val;
910 /* Update NEW with the same attributes as REG, but with OFFSET added
911 to the REG_OFFSET. */
914 update_reg_offset (rtx new, rtx reg, int offset)
916 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
917 REG_OFFSET (reg) + offset);
920 /* Generate a register with same attributes as REG, but with OFFSET
921 added to the REG_OFFSET. */
924 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
927 rtx new = gen_rtx_REG (mode, regno);
929 update_reg_offset (new, reg, offset);
933 /* Generate a new pseudo-register with the same attributes as REG, but
934 with OFFSET added to the REG_OFFSET. */
937 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
939 rtx new = gen_reg_rtx (mode);
941 update_reg_offset (new, reg, offset);
945 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
946 new register is a (possibly paradoxical) lowpart of the old one. */
949 adjust_reg_mode (rtx reg, enum machine_mode mode)
951 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
952 PUT_MODE (reg, mode);
955 /* Copy REG's attributes from X, if X has any attributes. If REG and X
956 have different modes, REG is a (possibly paradoxical) lowpart of X. */
959 set_reg_attrs_from_value (rtx reg, rtx x)
963 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
964 if (MEM_P (x) && MEM_OFFSET (x) && GET_CODE (MEM_OFFSET (x)) == CONST_INT)
966 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
967 if (REG_P (x) && REG_ATTRS (x))
968 update_reg_offset (reg, x, offset);
971 /* Set the register attributes for registers contained in PARM_RTX.
972 Use needed values from memory attributes of MEM. */
975 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
977 if (REG_P (parm_rtx))
978 set_reg_attrs_from_value (parm_rtx, mem);
979 else if (GET_CODE (parm_rtx) == PARALLEL)
981 /* Check for a NULL entry in the first slot, used to indicate that the
982 parameter goes both on the stack and in registers. */
983 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
984 for (; i < XVECLEN (parm_rtx, 0); i++)
986 rtx x = XVECEXP (parm_rtx, 0, i);
987 if (REG_P (XEXP (x, 0)))
988 REG_ATTRS (XEXP (x, 0))
989 = get_reg_attrs (MEM_EXPR (mem),
990 INTVAL (XEXP (x, 1)));
995 /* Set the REG_ATTRS for registers in value X, given that X represents
999 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1001 if (GET_CODE (x) == SUBREG)
1003 gcc_assert (subreg_lowpart_p (x));
1008 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1009 TYPE_MODE (TREE_TYPE (t))));
1010 if (GET_CODE (x) == CONCAT)
1012 if (REG_P (XEXP (x, 0)))
1013 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1014 if (REG_P (XEXP (x, 1)))
1015 REG_ATTRS (XEXP (x, 1))
1016 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1018 if (GET_CODE (x) == PARALLEL)
1022 /* Check for a NULL entry, used to indicate that the parameter goes
1023 both on the stack and in registers. */
1024 if (XEXP (XVECEXP (x, 0, 0), 0))
1029 for (i = start; i < XVECLEN (x, 0); i++)
1031 rtx y = XVECEXP (x, 0, i);
1032 if (REG_P (XEXP (y, 0)))
1033 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1038 /* Assign the RTX X to declaration T. */
1041 set_decl_rtl (tree t, rtx x)
1043 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1045 set_reg_attrs_for_decl_rtl (t, x);
1048 /* Assign the RTX X to parameter declaration T. */
1051 set_decl_incoming_rtl (tree t, rtx x)
1053 DECL_INCOMING_RTL (t) = x;
1055 set_reg_attrs_for_decl_rtl (t, x);
1058 /* Identify REG (which may be a CONCAT) as a user register. */
1061 mark_user_reg (rtx reg)
1063 if (GET_CODE (reg) == CONCAT)
1065 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1066 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1070 gcc_assert (REG_P (reg));
1071 REG_USERVAR_P (reg) = 1;
1075 /* Identify REG as a probable pointer register and show its alignment
1076 as ALIGN, if nonzero. */
1079 mark_reg_pointer (rtx reg, int align)
1081 if (! REG_POINTER (reg))
1083 REG_POINTER (reg) = 1;
1086 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1088 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1089 /* We can no-longer be sure just how aligned this pointer is. */
1090 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1093 /* Return 1 plus largest pseudo reg number used in the current function. */
1101 /* Return 1 + the largest label number used so far in the current function. */
1104 max_label_num (void)
1109 /* Return first label number used in this function (if any were used). */
1112 get_first_label_num (void)
1114 return first_label_num;
1117 /* If the rtx for label was created during the expansion of a nested
1118 function, then first_label_num won't include this label number.
1119 Fix this now so that array indicies work later. */
1122 maybe_set_first_label_num (rtx x)
1124 if (CODE_LABEL_NUMBER (x) < first_label_num)
1125 first_label_num = CODE_LABEL_NUMBER (x);
1128 /* Return a value representing some low-order bits of X, where the number
1129 of low-order bits is given by MODE. Note that no conversion is done
1130 between floating-point and fixed-point values, rather, the bit
1131 representation is returned.
1133 This function handles the cases in common between gen_lowpart, below,
1134 and two variants in cse.c and combine.c. These are the cases that can
1135 be safely handled at all points in the compilation.
1137 If this is not a case we can handle, return 0. */
1140 gen_lowpart_common (enum machine_mode mode, rtx x)
1142 int msize = GET_MODE_SIZE (mode);
1145 enum machine_mode innermode;
1147 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1148 so we have to make one up. Yuk. */
1149 innermode = GET_MODE (x);
1150 if (GET_CODE (x) == CONST_INT
1151 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1152 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1153 else if (innermode == VOIDmode)
1154 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1156 xsize = GET_MODE_SIZE (innermode);
1158 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1160 if (innermode == mode)
1163 /* MODE must occupy no more words than the mode of X. */
1164 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1165 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1168 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1169 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1172 offset = subreg_lowpart_offset (mode, innermode);
1174 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1175 && (GET_MODE_CLASS (mode) == MODE_INT
1176 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1178 /* If we are getting the low-order part of something that has been
1179 sign- or zero-extended, we can either just use the object being
1180 extended or make a narrower extension. If we want an even smaller
1181 piece than the size of the object being extended, call ourselves
1184 This case is used mostly by combine and cse. */
1186 if (GET_MODE (XEXP (x, 0)) == mode)
1188 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1189 return gen_lowpart_common (mode, XEXP (x, 0));
1190 else if (msize < xsize)
1191 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1193 else if (GET_CODE (x) == SUBREG || REG_P (x)
1194 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1195 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1196 return simplify_gen_subreg (mode, x, innermode, offset);
1198 /* Otherwise, we can't do this. */
1203 gen_highpart (enum machine_mode mode, rtx x)
1205 unsigned int msize = GET_MODE_SIZE (mode);
1208 /* This case loses if X is a subreg. To catch bugs early,
1209 complain if an invalid MODE is used even in other cases. */
1210 gcc_assert (msize <= UNITS_PER_WORD
1211 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1213 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1214 subreg_highpart_offset (mode, GET_MODE (x)));
1215 gcc_assert (result);
1217 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1218 the target if we have a MEM. gen_highpart must return a valid operand,
1219 emitting code if necessary to do so. */
1222 result = validize_mem (result);
1223 gcc_assert (result);
1229 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1230 be VOIDmode constant. */
1232 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1234 if (GET_MODE (exp) != VOIDmode)
1236 gcc_assert (GET_MODE (exp) == innermode);
1237 return gen_highpart (outermode, exp);
1239 return simplify_gen_subreg (outermode, exp, innermode,
1240 subreg_highpart_offset (outermode, innermode));
1243 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1246 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1248 unsigned int offset = 0;
1249 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1253 if (WORDS_BIG_ENDIAN)
1254 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1255 if (BYTES_BIG_ENDIAN)
1256 offset += difference % UNITS_PER_WORD;
1262 /* Return offset in bytes to get OUTERMODE high part
1263 of the value in mode INNERMODE stored in memory in target format. */
1265 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1267 unsigned int offset = 0;
1268 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1270 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1274 if (! WORDS_BIG_ENDIAN)
1275 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1276 if (! BYTES_BIG_ENDIAN)
1277 offset += difference % UNITS_PER_WORD;
1283 /* Return 1 iff X, assumed to be a SUBREG,
1284 refers to the least significant part of its containing reg.
1285 If X is not a SUBREG, always return 1 (it is its own low part!). */
1288 subreg_lowpart_p (const_rtx x)
1290 if (GET_CODE (x) != SUBREG)
1292 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1295 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1296 == SUBREG_BYTE (x));
1299 /* Return subword OFFSET of operand OP.
1300 The word number, OFFSET, is interpreted as the word number starting
1301 at the low-order address. OFFSET 0 is the low-order word if not
1302 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1304 If we cannot extract the required word, we return zero. Otherwise,
1305 an rtx corresponding to the requested word will be returned.
1307 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1308 reload has completed, a valid address will always be returned. After
1309 reload, if a valid address cannot be returned, we return zero.
1311 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1312 it is the responsibility of the caller.
1314 MODE is the mode of OP in case it is a CONST_INT.
1316 ??? This is still rather broken for some cases. The problem for the
1317 moment is that all callers of this thing provide no 'goal mode' to
1318 tell us to work with. This exists because all callers were written
1319 in a word based SUBREG world.
1320 Now use of this function can be deprecated by simplify_subreg in most
1325 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1327 if (mode == VOIDmode)
1328 mode = GET_MODE (op);
1330 gcc_assert (mode != VOIDmode);
1332 /* If OP is narrower than a word, fail. */
1334 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1337 /* If we want a word outside OP, return zero. */
1339 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1342 /* Form a new MEM at the requested address. */
1345 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1347 if (! validate_address)
1350 else if (reload_completed)
1352 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1356 return replace_equiv_address (new, XEXP (new, 0));
1359 /* Rest can be handled by simplify_subreg. */
1360 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1363 /* Similar to `operand_subword', but never return 0. If we can't
1364 extract the required subword, put OP into a register and try again.
1365 The second attempt must succeed. We always validate the address in
1368 MODE is the mode of OP, in case it is CONST_INT. */
1371 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1373 rtx result = operand_subword (op, offset, 1, mode);
1378 if (mode != BLKmode && mode != VOIDmode)
1380 /* If this is a register which can not be accessed by words, copy it
1381 to a pseudo register. */
1383 op = copy_to_reg (op);
1385 op = force_reg (mode, op);
1388 result = operand_subword (op, offset, 1, mode);
1389 gcc_assert (result);
1394 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1395 or (2) a component ref of something variable. Represent the later with
1396 a NULL expression. */
1399 component_ref_for_mem_expr (tree ref)
1401 tree inner = TREE_OPERAND (ref, 0);
1403 if (TREE_CODE (inner) == COMPONENT_REF)
1404 inner = component_ref_for_mem_expr (inner);
1407 /* Now remove any conversions: they don't change what the underlying
1408 object is. Likewise for SAVE_EXPR. */
1409 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1410 || TREE_CODE (inner) == NON_LVALUE_EXPR
1411 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1412 || TREE_CODE (inner) == SAVE_EXPR)
1413 inner = TREE_OPERAND (inner, 0);
1415 if (! DECL_P (inner))
1419 if (inner == TREE_OPERAND (ref, 0))
1422 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1423 TREE_OPERAND (ref, 1), NULL_TREE);
1426 /* Returns 1 if both MEM_EXPR can be considered equal
1430 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1435 if (! expr1 || ! expr2)
1438 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1441 if (TREE_CODE (expr1) == COMPONENT_REF)
1443 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1444 TREE_OPERAND (expr2, 0))
1445 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1446 TREE_OPERAND (expr2, 1));
1448 if (INDIRECT_REF_P (expr1))
1449 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1450 TREE_OPERAND (expr2, 0));
1452 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1453 have been resolved here. */
1454 gcc_assert (DECL_P (expr1));
1456 /* Decls with different pointers can't be equal. */
1460 /* Given REF, a MEM, and T, either the type of X or the expression
1461 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1462 if we are making a new object of this type. BITPOS is nonzero if
1463 there is an offset outstanding on T that will be applied later. */
1466 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1467 HOST_WIDE_INT bitpos)
1469 alias_set_type alias = MEM_ALIAS_SET (ref);
1470 tree expr = MEM_EXPR (ref);
1471 rtx offset = MEM_OFFSET (ref);
1472 rtx size = MEM_SIZE (ref);
1473 unsigned int align = MEM_ALIGN (ref);
1474 HOST_WIDE_INT apply_bitpos = 0;
1477 /* It can happen that type_for_mode was given a mode for which there
1478 is no language-level type. In which case it returns NULL, which
1483 type = TYPE_P (t) ? t : TREE_TYPE (t);
1484 if (type == error_mark_node)
1487 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1488 wrong answer, as it assumes that DECL_RTL already has the right alias
1489 info. Callers should not set DECL_RTL until after the call to
1490 set_mem_attributes. */
1491 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1493 /* Get the alias set from the expression or type (perhaps using a
1494 front-end routine) and use it. */
1495 alias = get_alias_set (t);
1497 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1498 MEM_IN_STRUCT_P (ref)
1499 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1500 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1502 /* If we are making an object of this type, or if this is a DECL, we know
1503 that it is a scalar if the type is not an aggregate. */
1504 if ((objectp || DECL_P (t))
1505 && ! AGGREGATE_TYPE_P (type)
1506 && TREE_CODE (type) != COMPLEX_TYPE)
1507 MEM_SCALAR_P (ref) = 1;
1509 /* We can set the alignment from the type if we are making an object,
1510 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1511 if (objectp || TREE_CODE (t) == INDIRECT_REF
1512 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1513 || TYPE_ALIGN_OK (type))
1514 align = MAX (align, TYPE_ALIGN (type));
1516 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1518 if (integer_zerop (TREE_OPERAND (t, 1)))
1519 /* We don't know anything about the alignment. */
1520 align = BITS_PER_UNIT;
1522 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1525 /* If the size is known, we can set that. */
1526 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1527 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1529 /* If T is not a type, we may be able to deduce some more information about
1535 if (TREE_THIS_VOLATILE (t))
1536 MEM_VOLATILE_P (ref) = 1;
1538 /* Now remove any conversions: they don't change what the underlying
1539 object is. Likewise for SAVE_EXPR. */
1540 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1541 || TREE_CODE (t) == NON_LVALUE_EXPR
1542 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1543 || TREE_CODE (t) == SAVE_EXPR)
1544 t = TREE_OPERAND (t, 0);
1546 /* We may look through structure-like accesses for the purposes of
1547 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1549 while (TREE_CODE (base) == COMPONENT_REF
1550 || TREE_CODE (base) == REALPART_EXPR
1551 || TREE_CODE (base) == IMAGPART_EXPR
1552 || TREE_CODE (base) == BIT_FIELD_REF)
1553 base = TREE_OPERAND (base, 0);
1557 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1558 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1560 MEM_NOTRAP_P (ref) = 1;
1563 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1565 base = get_base_address (base);
1566 if (base && DECL_P (base)
1567 && TREE_READONLY (base)
1568 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1570 tree base_type = TREE_TYPE (base);
1571 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1572 || DECL_ARTIFICIAL (base));
1573 MEM_READONLY_P (ref) = 1;
1576 /* If this expression uses it's parent's alias set, mark it such
1577 that we won't change it. */
1578 if (component_uses_parent_alias_set (t))
1579 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1581 /* If this is a decl, set the attributes of the MEM from it. */
1585 offset = const0_rtx;
1586 apply_bitpos = bitpos;
1587 size = (DECL_SIZE_UNIT (t)
1588 && host_integerp (DECL_SIZE_UNIT (t), 1)
1589 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1590 align = DECL_ALIGN (t);
1593 /* If this is a constant, we know the alignment. */
1594 else if (CONSTANT_CLASS_P (t))
1596 align = TYPE_ALIGN (type);
1597 #ifdef CONSTANT_ALIGNMENT
1598 align = CONSTANT_ALIGNMENT (t, align);
1602 /* If this is a field reference and not a bit-field, record it. */
1603 /* ??? There is some information that can be gleened from bit-fields,
1604 such as the word offset in the structure that might be modified.
1605 But skip it for now. */
1606 else if (TREE_CODE (t) == COMPONENT_REF
1607 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1609 expr = component_ref_for_mem_expr (t);
1610 offset = const0_rtx;
1611 apply_bitpos = bitpos;
1612 /* ??? Any reason the field size would be different than
1613 the size we got from the type? */
1616 /* If this is an array reference, look for an outer field reference. */
1617 else if (TREE_CODE (t) == ARRAY_REF)
1619 tree off_tree = size_zero_node;
1620 /* We can't modify t, because we use it at the end of the
1626 tree index = TREE_OPERAND (t2, 1);
1627 tree low_bound = array_ref_low_bound (t2);
1628 tree unit_size = array_ref_element_size (t2);
1630 /* We assume all arrays have sizes that are a multiple of a byte.
1631 First subtract the lower bound, if any, in the type of the
1632 index, then convert to sizetype and multiply by the size of
1633 the array element. */
1634 if (! integer_zerop (low_bound))
1635 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1638 off_tree = size_binop (PLUS_EXPR,
1639 size_binop (MULT_EXPR,
1640 fold_convert (sizetype,
1644 t2 = TREE_OPERAND (t2, 0);
1646 while (TREE_CODE (t2) == ARRAY_REF);
1652 if (host_integerp (off_tree, 1))
1654 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1655 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1656 align = DECL_ALIGN (t2);
1657 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1659 offset = GEN_INT (ioff);
1660 apply_bitpos = bitpos;
1663 else if (TREE_CODE (t2) == COMPONENT_REF)
1665 expr = component_ref_for_mem_expr (t2);
1666 if (host_integerp (off_tree, 1))
1668 offset = GEN_INT (tree_low_cst (off_tree, 1));
1669 apply_bitpos = bitpos;
1671 /* ??? Any reason the field size would be different than
1672 the size we got from the type? */
1674 else if (flag_argument_noalias > 1
1675 && (INDIRECT_REF_P (t2))
1676 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1683 /* If this is a Fortran indirect argument reference, record the
1685 else if (flag_argument_noalias > 1
1686 && (INDIRECT_REF_P (t))
1687 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1694 /* If we modified OFFSET based on T, then subtract the outstanding
1695 bit position offset. Similarly, increase the size of the accessed
1696 object to contain the negative offset. */
1699 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1701 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1704 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1706 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1707 we're overlapping. */
1712 /* Now set the attributes we computed above. */
1714 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1716 /* If this is already known to be a scalar or aggregate, we are done. */
1717 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1720 /* If it is a reference into an aggregate, this is part of an aggregate.
1721 Otherwise we don't know. */
1722 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1723 || TREE_CODE (t) == ARRAY_RANGE_REF
1724 || TREE_CODE (t) == BIT_FIELD_REF)
1725 MEM_IN_STRUCT_P (ref) = 1;
1729 set_mem_attributes (rtx ref, tree t, int objectp)
1731 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1734 /* Set MEM to the decl that REG refers to. */
1737 set_mem_attrs_from_reg (rtx mem, rtx reg)
1740 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1741 GEN_INT (REG_OFFSET (reg)),
1742 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1745 /* Set the alias set of MEM to SET. */
1748 set_mem_alias_set (rtx mem, alias_set_type set)
1750 #ifdef ENABLE_CHECKING
1751 /* If the new and old alias sets don't conflict, something is wrong. */
1752 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1755 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1756 MEM_SIZE (mem), MEM_ALIGN (mem),
1760 /* Set the alignment of MEM to ALIGN bits. */
1763 set_mem_align (rtx mem, unsigned int align)
1765 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1766 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1770 /* Set the expr for MEM to EXPR. */
1773 set_mem_expr (rtx mem, tree expr)
1776 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1777 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1780 /* Set the offset of MEM to OFFSET. */
1783 set_mem_offset (rtx mem, rtx offset)
1785 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1786 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1790 /* Set the size of MEM to SIZE. */
1793 set_mem_size (rtx mem, rtx size)
1795 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1796 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1800 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1801 and its address changed to ADDR. (VOIDmode means don't change the mode.
1802 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1803 returned memory location is required to be valid. The memory
1804 attributes are not changed. */
1807 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1811 gcc_assert (MEM_P (memref));
1812 if (mode == VOIDmode)
1813 mode = GET_MODE (memref);
1815 addr = XEXP (memref, 0);
1816 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1817 && (!validate || memory_address_p (mode, addr)))
1822 if (reload_in_progress || reload_completed)
1823 gcc_assert (memory_address_p (mode, addr));
1825 addr = memory_address (mode, addr);
1828 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1831 new = gen_rtx_MEM (mode, addr);
1832 MEM_COPY_ATTRIBUTES (new, memref);
1836 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1837 way we are changing MEMREF, so we only preserve the alias set. */
1840 change_address (rtx memref, enum machine_mode mode, rtx addr)
1842 rtx new = change_address_1 (memref, mode, addr, 1), size;
1843 enum machine_mode mmode = GET_MODE (new);
1846 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1847 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1849 /* If there are no changes, just return the original memory reference. */
1852 if (MEM_ATTRS (memref) == 0
1853 || (MEM_EXPR (memref) == NULL
1854 && MEM_OFFSET (memref) == NULL
1855 && MEM_SIZE (memref) == size
1856 && MEM_ALIGN (memref) == align))
1859 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1860 MEM_COPY_ATTRIBUTES (new, memref);
1864 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1869 /* Return a memory reference like MEMREF, but with its mode changed
1870 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1871 nonzero, the memory address is forced to be valid.
1872 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1873 and caller is responsible for adjusting MEMREF base register. */
1876 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1877 int validate, int adjust)
1879 rtx addr = XEXP (memref, 0);
1881 rtx memoffset = MEM_OFFSET (memref);
1883 unsigned int memalign = MEM_ALIGN (memref);
1885 /* If there are no changes, just return the original memory reference. */
1886 if (mode == GET_MODE (memref) && !offset
1887 && (!validate || memory_address_p (mode, addr)))
1890 /* ??? Prefer to create garbage instead of creating shared rtl.
1891 This may happen even if offset is nonzero -- consider
1892 (plus (plus reg reg) const_int) -- so do this always. */
1893 addr = copy_rtx (addr);
1897 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1898 object, we can merge it into the LO_SUM. */
1899 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1901 && (unsigned HOST_WIDE_INT) offset
1902 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1903 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1904 plus_constant (XEXP (addr, 1), offset));
1906 addr = plus_constant (addr, offset);
1909 new = change_address_1 (memref, mode, addr, validate);
1911 /* Compute the new values of the memory attributes due to this adjustment.
1912 We add the offsets and update the alignment. */
1914 memoffset = GEN_INT (offset + INTVAL (memoffset));
1916 /* Compute the new alignment by taking the MIN of the alignment and the
1917 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1922 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1924 /* We can compute the size in a number of ways. */
1925 if (GET_MODE (new) != BLKmode)
1926 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1927 else if (MEM_SIZE (memref))
1928 size = plus_constant (MEM_SIZE (memref), -offset);
1930 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1931 memoffset, size, memalign, GET_MODE (new));
1933 /* At some point, we should validate that this offset is within the object,
1934 if all the appropriate values are known. */
1938 /* Return a memory reference like MEMREF, but with its mode changed
1939 to MODE and its address changed to ADDR, which is assumed to be
1940 MEMREF offseted by OFFSET bytes. If VALIDATE is
1941 nonzero, the memory address is forced to be valid. */
1944 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1945 HOST_WIDE_INT offset, int validate)
1947 memref = change_address_1 (memref, VOIDmode, addr, validate);
1948 return adjust_address_1 (memref, mode, offset, validate, 0);
1951 /* Return a memory reference like MEMREF, but whose address is changed by
1952 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1953 known to be in OFFSET (possibly 1). */
1956 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1958 rtx new, addr = XEXP (memref, 0);
1960 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1962 /* At this point we don't know _why_ the address is invalid. It
1963 could have secondary memory references, multiplies or anything.
1965 However, if we did go and rearrange things, we can wind up not
1966 being able to recognize the magic around pic_offset_table_rtx.
1967 This stuff is fragile, and is yet another example of why it is
1968 bad to expose PIC machinery too early. */
1969 if (! memory_address_p (GET_MODE (memref), new)
1970 && GET_CODE (addr) == PLUS
1971 && XEXP (addr, 0) == pic_offset_table_rtx)
1973 addr = force_reg (GET_MODE (addr), addr);
1974 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1977 update_temp_slot_address (XEXP (memref, 0), new);
1978 new = change_address_1 (memref, VOIDmode, new, 1);
1980 /* If there are no changes, just return the original memory reference. */
1984 /* Update the alignment to reflect the offset. Reset the offset, which
1987 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1988 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1993 /* Return a memory reference like MEMREF, but with its address changed to
1994 ADDR. The caller is asserting that the actual piece of memory pointed
1995 to is the same, just the form of the address is being changed, such as
1996 by putting something into a register. */
1999 replace_equiv_address (rtx memref, rtx addr)
2001 /* change_address_1 copies the memory attribute structure without change
2002 and that's exactly what we want here. */
2003 update_temp_slot_address (XEXP (memref, 0), addr);
2004 return change_address_1 (memref, VOIDmode, addr, 1);
2007 /* Likewise, but the reference is not required to be valid. */
2010 replace_equiv_address_nv (rtx memref, rtx addr)
2012 return change_address_1 (memref, VOIDmode, addr, 0);
2015 /* Return a memory reference like MEMREF, but with its mode widened to
2016 MODE and offset by OFFSET. This would be used by targets that e.g.
2017 cannot issue QImode memory operations and have to use SImode memory
2018 operations plus masking logic. */
2021 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2023 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2024 tree expr = MEM_EXPR (new);
2025 rtx memoffset = MEM_OFFSET (new);
2026 unsigned int size = GET_MODE_SIZE (mode);
2028 /* If there are no changes, just return the original memory reference. */
2032 /* If we don't know what offset we were at within the expression, then
2033 we can't know if we've overstepped the bounds. */
2039 if (TREE_CODE (expr) == COMPONENT_REF)
2041 tree field = TREE_OPERAND (expr, 1);
2042 tree offset = component_ref_field_offset (expr);
2044 if (! DECL_SIZE_UNIT (field))
2050 /* Is the field at least as large as the access? If so, ok,
2051 otherwise strip back to the containing structure. */
2052 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2053 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2054 && INTVAL (memoffset) >= 0)
2057 if (! host_integerp (offset, 1))
2063 expr = TREE_OPERAND (expr, 0);
2065 = (GEN_INT (INTVAL (memoffset)
2066 + tree_low_cst (offset, 1)
2067 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2070 /* Similarly for the decl. */
2071 else if (DECL_P (expr)
2072 && DECL_SIZE_UNIT (expr)
2073 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2074 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2075 && (! memoffset || INTVAL (memoffset) >= 0))
2079 /* The widened memory access overflows the expression, which means
2080 that it could alias another expression. Zap it. */
2087 memoffset = NULL_RTX;
2089 /* The widened memory may alias other stuff, so zap the alias set. */
2090 /* ??? Maybe use get_alias_set on any remaining expression. */
2092 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2093 MEM_ALIGN (new), mode);
2098 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2101 gen_label_rtx (void)
2103 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2104 NULL, label_num++, NULL);
2107 /* For procedure integration. */
2109 /* Install new pointers to the first and last insns in the chain.
2110 Also, set cur_insn_uid to one higher than the last in use.
2111 Used for an inline-procedure after copying the insn chain. */
2114 set_new_first_and_last_insn (rtx first, rtx last)
2122 for (insn = first; insn; insn = NEXT_INSN (insn))
2123 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2128 /* Go through all the RTL insn bodies and copy any invalid shared
2129 structure. This routine should only be called once. */
2132 unshare_all_rtl_1 (rtx insn)
2134 /* Unshare just about everything else. */
2135 unshare_all_rtl_in_chain (insn);
2137 /* Make sure the addresses of stack slots found outside the insn chain
2138 (such as, in DECL_RTL of a variable) are not shared
2139 with the insn chain.
2141 This special care is necessary when the stack slot MEM does not
2142 actually appear in the insn chain. If it does appear, its address
2143 is unshared from all else at that point. */
2144 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2147 /* Go through all the RTL insn bodies and copy any invalid shared
2148 structure, again. This is a fairly expensive thing to do so it
2149 should be done sparingly. */
2152 unshare_all_rtl_again (rtx insn)
2157 for (p = insn; p; p = NEXT_INSN (p))
2160 reset_used_flags (PATTERN (p));
2161 reset_used_flags (REG_NOTES (p));
2164 /* Make sure that virtual stack slots are not shared. */
2165 set_used_decls (DECL_INITIAL (cfun->decl));
2167 /* Make sure that virtual parameters are not shared. */
2168 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2169 set_used_flags (DECL_RTL (decl));
2171 reset_used_flags (stack_slot_list);
2173 unshare_all_rtl_1 (insn);
2177 unshare_all_rtl (void)
2179 unshare_all_rtl_1 (get_insns ());
2183 struct tree_opt_pass pass_unshare_all_rtl =
2185 "unshare", /* name */
2187 unshare_all_rtl, /* execute */
2190 0, /* static_pass_number */
2192 0, /* properties_required */
2193 0, /* properties_provided */
2194 0, /* properties_destroyed */
2195 0, /* todo_flags_start */
2196 TODO_dump_func | TODO_verify_rtl_sharing, /* todo_flags_finish */
2201 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2202 Recursively does the same for subexpressions. */
2205 verify_rtx_sharing (rtx orig, rtx insn)
2210 const char *format_ptr;
2215 code = GET_CODE (x);
2217 /* These types may be freely shared. */
2233 /* SCRATCH must be shared because they represent distinct values. */
2235 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2240 if (shared_const_p (orig))
2245 /* A MEM is allowed to be shared if its address is constant. */
2246 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2247 || reload_completed || reload_in_progress)
2256 /* This rtx may not be shared. If it has already been seen,
2257 replace it with a copy of itself. */
2258 #ifdef ENABLE_CHECKING
2259 if (RTX_FLAG (x, used))
2261 error ("invalid rtl sharing found in the insn");
2263 error ("shared rtx");
2265 internal_error ("internal consistency failure");
2268 gcc_assert (!RTX_FLAG (x, used));
2270 RTX_FLAG (x, used) = 1;
2272 /* Now scan the subexpressions recursively. */
2274 format_ptr = GET_RTX_FORMAT (code);
2276 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2278 switch (*format_ptr++)
2281 verify_rtx_sharing (XEXP (x, i), insn);
2285 if (XVEC (x, i) != NULL)
2288 int len = XVECLEN (x, i);
2290 for (j = 0; j < len; j++)
2292 /* We allow sharing of ASM_OPERANDS inside single
2294 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2295 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2297 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2299 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2308 /* Go through all the RTL insn bodies and check that there is no unexpected
2309 sharing in between the subexpressions. */
2312 verify_rtl_sharing (void)
2316 for (p = get_insns (); p; p = NEXT_INSN (p))
2319 reset_used_flags (PATTERN (p));
2320 reset_used_flags (REG_NOTES (p));
2321 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2324 rtx q, sequence = PATTERN (p);
2326 for (i = 0; i < XVECLEN (sequence, 0); i++)
2328 q = XVECEXP (sequence, 0, i);
2329 gcc_assert (INSN_P (q));
2330 reset_used_flags (PATTERN (q));
2331 reset_used_flags (REG_NOTES (q));
2336 for (p = get_insns (); p; p = NEXT_INSN (p))
2339 verify_rtx_sharing (PATTERN (p), p);
2340 verify_rtx_sharing (REG_NOTES (p), p);
2344 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2345 Assumes the mark bits are cleared at entry. */
2348 unshare_all_rtl_in_chain (rtx insn)
2350 for (; insn; insn = NEXT_INSN (insn))
2353 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2354 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2358 /* Go through all virtual stack slots of a function and mark them as
2359 shared. We never replace the DECL_RTLs themselves with a copy,
2360 but expressions mentioned into a DECL_RTL cannot be shared with
2361 expressions in the instruction stream.
2363 Note that reload may convert pseudo registers into memories in-place.
2364 Pseudo registers are always shared, but MEMs never are. Thus if we
2365 reset the used flags on MEMs in the instruction stream, we must set
2366 them again on MEMs that appear in DECL_RTLs. */
2369 set_used_decls (tree blk)
2374 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2375 if (DECL_RTL_SET_P (t))
2376 set_used_flags (DECL_RTL (t));
2378 /* Now process sub-blocks. */
2379 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2383 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2384 Recursively does the same for subexpressions. Uses
2385 copy_rtx_if_shared_1 to reduce stack space. */
2388 copy_rtx_if_shared (rtx orig)
2390 copy_rtx_if_shared_1 (&orig);
2394 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2395 use. Recursively does the same for subexpressions. */
2398 copy_rtx_if_shared_1 (rtx *orig1)
2404 const char *format_ptr;
2408 /* Repeat is used to turn tail-recursion into iteration. */
2415 code = GET_CODE (x);
2417 /* These types may be freely shared. */
2432 /* SCRATCH must be shared because they represent distinct values. */
2435 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2440 if (shared_const_p (x))
2449 /* The chain of insns is not being copied. */
2456 /* This rtx may not be shared. If it has already been seen,
2457 replace it with a copy of itself. */
2459 if (RTX_FLAG (x, used))
2461 x = shallow_copy_rtx (x);
2464 RTX_FLAG (x, used) = 1;
2466 /* Now scan the subexpressions recursively.
2467 We can store any replaced subexpressions directly into X
2468 since we know X is not shared! Any vectors in X
2469 must be copied if X was copied. */
2471 format_ptr = GET_RTX_FORMAT (code);
2472 length = GET_RTX_LENGTH (code);
2475 for (i = 0; i < length; i++)
2477 switch (*format_ptr++)
2481 copy_rtx_if_shared_1 (last_ptr);
2482 last_ptr = &XEXP (x, i);
2486 if (XVEC (x, i) != NULL)
2489 int len = XVECLEN (x, i);
2491 /* Copy the vector iff I copied the rtx and the length
2493 if (copied && len > 0)
2494 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2496 /* Call recursively on all inside the vector. */
2497 for (j = 0; j < len; j++)
2500 copy_rtx_if_shared_1 (last_ptr);
2501 last_ptr = &XVECEXP (x, i, j);
2516 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2517 to look for shared sub-parts. */
2520 reset_used_flags (rtx x)
2524 const char *format_ptr;
2527 /* Repeat is used to turn tail-recursion into iteration. */
2532 code = GET_CODE (x);
2534 /* These types may be freely shared so we needn't do any resetting
2556 /* The chain of insns is not being copied. */
2563 RTX_FLAG (x, used) = 0;
2565 format_ptr = GET_RTX_FORMAT (code);
2566 length = GET_RTX_LENGTH (code);
2568 for (i = 0; i < length; i++)
2570 switch (*format_ptr++)
2578 reset_used_flags (XEXP (x, i));
2582 for (j = 0; j < XVECLEN (x, i); j++)
2583 reset_used_flags (XVECEXP (x, i, j));
2589 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2590 to look for shared sub-parts. */
2593 set_used_flags (rtx x)
2597 const char *format_ptr;
2602 code = GET_CODE (x);
2604 /* These types may be freely shared so we needn't do any resetting
2626 /* The chain of insns is not being copied. */
2633 RTX_FLAG (x, used) = 1;
2635 format_ptr = GET_RTX_FORMAT (code);
2636 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2638 switch (*format_ptr++)
2641 set_used_flags (XEXP (x, i));
2645 for (j = 0; j < XVECLEN (x, i); j++)
2646 set_used_flags (XVECEXP (x, i, j));
2652 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2653 Return X or the rtx for the pseudo reg the value of X was copied into.
2654 OTHER must be valid as a SET_DEST. */
2657 make_safe_from (rtx x, rtx other)
2660 switch (GET_CODE (other))
2663 other = SUBREG_REG (other);
2665 case STRICT_LOW_PART:
2668 other = XEXP (other, 0);
2677 && GET_CODE (x) != SUBREG)
2679 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2680 || reg_mentioned_p (other, x))))
2682 rtx temp = gen_reg_rtx (GET_MODE (x));
2683 emit_move_insn (temp, x);
2689 /* Emission of insns (adding them to the doubly-linked list). */
2691 /* Return the first insn of the current sequence or current function. */
2699 /* Specify a new insn as the first in the chain. */
2702 set_first_insn (rtx insn)
2704 gcc_assert (!PREV_INSN (insn));
2708 /* Return the last insn emitted in current sequence or current function. */
2711 get_last_insn (void)
2716 /* Specify a new insn as the last in the chain. */
2719 set_last_insn (rtx insn)
2721 gcc_assert (!NEXT_INSN (insn));
2725 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2728 get_last_insn_anywhere (void)
2730 struct sequence_stack *stack;
2733 for (stack = seq_stack; stack; stack = stack->next)
2734 if (stack->last != 0)
2739 /* Return the first nonnote insn emitted in current sequence or current
2740 function. This routine looks inside SEQUENCEs. */
2743 get_first_nonnote_insn (void)
2745 rtx insn = first_insn;
2750 for (insn = next_insn (insn);
2751 insn && NOTE_P (insn);
2752 insn = next_insn (insn))
2756 if (NONJUMP_INSN_P (insn)
2757 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2758 insn = XVECEXP (PATTERN (insn), 0, 0);
2765 /* Return the last nonnote insn emitted in current sequence or current
2766 function. This routine looks inside SEQUENCEs. */
2769 get_last_nonnote_insn (void)
2771 rtx insn = last_insn;
2776 for (insn = previous_insn (insn);
2777 insn && NOTE_P (insn);
2778 insn = previous_insn (insn))
2782 if (NONJUMP_INSN_P (insn)
2783 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2784 insn = XVECEXP (PATTERN (insn), 0,
2785 XVECLEN (PATTERN (insn), 0) - 1);
2792 /* Return a number larger than any instruction's uid in this function. */
2797 return cur_insn_uid;
2800 /* Return the next insn. If it is a SEQUENCE, return the first insn
2804 next_insn (rtx insn)
2808 insn = NEXT_INSN (insn);
2809 if (insn && NONJUMP_INSN_P (insn)
2810 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2811 insn = XVECEXP (PATTERN (insn), 0, 0);
2817 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2821 previous_insn (rtx insn)
2825 insn = PREV_INSN (insn);
2826 if (insn && NONJUMP_INSN_P (insn)
2827 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2828 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2834 /* Return the next insn after INSN that is not a NOTE. This routine does not
2835 look inside SEQUENCEs. */
2838 next_nonnote_insn (rtx insn)
2842 insn = NEXT_INSN (insn);
2843 if (insn == 0 || !NOTE_P (insn))
2850 /* Return the previous insn before INSN that is not a NOTE. This routine does
2851 not look inside SEQUENCEs. */
2854 prev_nonnote_insn (rtx insn)
2858 insn = PREV_INSN (insn);
2859 if (insn == 0 || !NOTE_P (insn))
2866 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2867 or 0, if there is none. This routine does not look inside
2871 next_real_insn (rtx insn)
2875 insn = NEXT_INSN (insn);
2876 if (insn == 0 || INSN_P (insn))
2883 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2884 or 0, if there is none. This routine does not look inside
2888 prev_real_insn (rtx insn)
2892 insn = PREV_INSN (insn);
2893 if (insn == 0 || INSN_P (insn))
2900 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2901 This routine does not look inside SEQUENCEs. */
2904 last_call_insn (void)
2908 for (insn = get_last_insn ();
2909 insn && !CALL_P (insn);
2910 insn = PREV_INSN (insn))
2916 /* Find the next insn after INSN that really does something. This routine
2917 does not look inside SEQUENCEs. Until reload has completed, this is the
2918 same as next_real_insn. */
2921 active_insn_p (const_rtx insn)
2923 return (CALL_P (insn) || JUMP_P (insn)
2924 || (NONJUMP_INSN_P (insn)
2925 && (! reload_completed
2926 || (GET_CODE (PATTERN (insn)) != USE
2927 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2931 next_active_insn (rtx insn)
2935 insn = NEXT_INSN (insn);
2936 if (insn == 0 || active_insn_p (insn))
2943 /* Find the last insn before INSN that really does something. This routine
2944 does not look inside SEQUENCEs. Until reload has completed, this is the
2945 same as prev_real_insn. */
2948 prev_active_insn (rtx insn)
2952 insn = PREV_INSN (insn);
2953 if (insn == 0 || active_insn_p (insn))
2960 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2963 next_label (rtx insn)
2967 insn = NEXT_INSN (insn);
2968 if (insn == 0 || LABEL_P (insn))
2975 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2978 prev_label (rtx insn)
2982 insn = PREV_INSN (insn);
2983 if (insn == 0 || LABEL_P (insn))
2990 /* Return the last label to mark the same position as LABEL. Return null
2991 if LABEL itself is null. */
2994 skip_consecutive_labels (rtx label)
2998 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3006 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3007 and REG_CC_USER notes so we can find it. */
3010 link_cc0_insns (rtx insn)
3012 rtx user = next_nonnote_insn (insn);
3014 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3015 user = XVECEXP (PATTERN (user), 0, 0);
3017 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3019 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3022 /* Return the next insn that uses CC0 after INSN, which is assumed to
3023 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3024 applied to the result of this function should yield INSN).
3026 Normally, this is simply the next insn. However, if a REG_CC_USER note
3027 is present, it contains the insn that uses CC0.
3029 Return 0 if we can't find the insn. */
3032 next_cc0_user (rtx insn)
3034 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3037 return XEXP (note, 0);
3039 insn = next_nonnote_insn (insn);
3040 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3041 insn = XVECEXP (PATTERN (insn), 0, 0);
3043 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3049 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3050 note, it is the previous insn. */
3053 prev_cc0_setter (rtx insn)
3055 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3058 return XEXP (note, 0);
3060 insn = prev_nonnote_insn (insn);
3061 gcc_assert (sets_cc0_p (PATTERN (insn)));
3068 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3071 find_auto_inc (rtx *xp, void *data)
3076 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3079 switch (GET_CODE (x))
3087 if (rtx_equal_p (reg, XEXP (x, 0)))
3098 /* Increment the label uses for all labels present in rtx. */
3101 mark_label_nuses (rtx x)
3107 code = GET_CODE (x);
3108 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3109 LABEL_NUSES (XEXP (x, 0))++;
3111 fmt = GET_RTX_FORMAT (code);
3112 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3115 mark_label_nuses (XEXP (x, i));
3116 else if (fmt[i] == 'E')
3117 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3118 mark_label_nuses (XVECEXP (x, i, j));
3123 /* Try splitting insns that can be split for better scheduling.
3124 PAT is the pattern which might split.
3125 TRIAL is the insn providing PAT.
3126 LAST is nonzero if we should return the last insn of the sequence produced.
3128 If this routine succeeds in splitting, it returns the first or last
3129 replacement insn depending on the value of LAST. Otherwise, it
3130 returns TRIAL. If the insn to be returned can be split, it will be. */
3133 try_split (rtx pat, rtx trial, int last)
3135 rtx before = PREV_INSN (trial);
3136 rtx after = NEXT_INSN (trial);
3137 int has_barrier = 0;
3138 rtx tem, note_retval;
3141 rtx insn_last, insn;
3144 if (any_condjump_p (trial)
3145 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3146 split_branch_probability = INTVAL (XEXP (note, 0));
3147 probability = split_branch_probability;
3149 seq = split_insns (pat, trial);
3151 split_branch_probability = -1;
3153 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3154 We may need to handle this specially. */
3155 if (after && BARRIER_P (after))
3158 after = NEXT_INSN (after);
3164 /* Avoid infinite loop if any insn of the result matches
3165 the original pattern. */
3169 if (INSN_P (insn_last)
3170 && rtx_equal_p (PATTERN (insn_last), pat))
3172 if (!NEXT_INSN (insn_last))
3174 insn_last = NEXT_INSN (insn_last);
3177 /* We will be adding the new sequence to the function. The splitters
3178 may have introduced invalid RTL sharing, so unshare the sequence now. */
3179 unshare_all_rtl_in_chain (seq);
3182 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3186 mark_jump_label (PATTERN (insn), insn, 0);
3188 if (probability != -1
3189 && any_condjump_p (insn)
3190 && !find_reg_note (insn, REG_BR_PROB, 0))
3192 /* We can preserve the REG_BR_PROB notes only if exactly
3193 one jump is created, otherwise the machine description
3194 is responsible for this step using
3195 split_branch_probability variable. */
3196 gcc_assert (njumps == 1);
3198 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3199 GEN_INT (probability),
3205 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3206 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3209 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3212 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3215 *p = CALL_INSN_FUNCTION_USAGE (trial);
3216 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3220 /* Copy notes, particularly those related to the CFG. */
3221 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3223 switch (REG_NOTE_KIND (note))
3226 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3229 || (flag_non_call_exceptions && INSN_P (insn)
3230 && may_trap_p (PATTERN (insn))))
3232 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3240 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3244 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3250 case REG_NON_LOCAL_GOTO:
3251 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3255 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3263 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3265 rtx reg = XEXP (note, 0);
3266 if (!FIND_REG_INC_NOTE (insn, reg)
3267 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3268 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, reg,
3275 /* Relink the insns with REG_LIBCALL note and with REG_RETVAL note
3277 REG_NOTES (insn_last)
3278 = gen_rtx_INSN_LIST (REG_LIBCALL,
3280 REG_NOTES (insn_last));
3282 note_retval = find_reg_note (XEXP (note, 0), REG_RETVAL, NULL);
3283 XEXP (note_retval, 0) = insn_last;
3291 /* If there are LABELS inside the split insns increment the
3292 usage count so we don't delete the label. */
3296 while (insn != NULL_RTX)
3298 /* JUMP_P insns have already been "marked" above. */
3299 if (NONJUMP_INSN_P (insn))
3300 mark_label_nuses (PATTERN (insn));
3302 insn = PREV_INSN (insn);
3306 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3308 delete_insn (trial);
3310 emit_barrier_after (tem);
3312 /* Recursively call try_split for each new insn created; by the
3313 time control returns here that insn will be fully split, so
3314 set LAST and continue from the insn after the one returned.
3315 We can't use next_active_insn here since AFTER may be a note.
3316 Ignore deleted insns, which can be occur if not optimizing. */
3317 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3318 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3319 tem = try_split (PATTERN (tem), tem, 1);
3321 /* Return either the first or the last insn, depending on which was
3324 ? (after ? PREV_INSN (after) : last_insn)
3325 : NEXT_INSN (before);
3328 /* Make and return an INSN rtx, initializing all its slots.
3329 Store PATTERN in the pattern slots. */
3332 make_insn_raw (rtx pattern)
3336 insn = rtx_alloc (INSN);
3338 INSN_UID (insn) = cur_insn_uid++;
3339 PATTERN (insn) = pattern;
3340 INSN_CODE (insn) = -1;
3341 REG_NOTES (insn) = NULL;
3342 INSN_LOCATOR (insn) = curr_insn_locator ();
3343 BLOCK_FOR_INSN (insn) = NULL;
3345 #ifdef ENABLE_RTL_CHECKING
3348 && (returnjump_p (insn)
3349 || (GET_CODE (insn) == SET
3350 && SET_DEST (insn) == pc_rtx)))
3352 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3360 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3363 make_jump_insn_raw (rtx pattern)
3367 insn = rtx_alloc (JUMP_INSN);
3368 INSN_UID (insn) = cur_insn_uid++;
3370 PATTERN (insn) = pattern;
3371 INSN_CODE (insn) = -1;
3372 REG_NOTES (insn) = NULL;
3373 JUMP_LABEL (insn) = NULL;
3374 INSN_LOCATOR (insn) = curr_insn_locator ();
3375 BLOCK_FOR_INSN (insn) = NULL;
3380 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3383 make_call_insn_raw (rtx pattern)
3387 insn = rtx_alloc (CALL_INSN);
3388 INSN_UID (insn) = cur_insn_uid++;
3390 PATTERN (insn) = pattern;
3391 INSN_CODE (insn) = -1;
3392 REG_NOTES (insn) = NULL;
3393 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3394 INSN_LOCATOR (insn) = curr_insn_locator ();
3395 BLOCK_FOR_INSN (insn) = NULL;
3400 /* Add INSN to the end of the doubly-linked list.
3401 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3406 PREV_INSN (insn) = last_insn;
3407 NEXT_INSN (insn) = 0;
3409 if (NULL != last_insn)
3410 NEXT_INSN (last_insn) = insn;
3412 if (NULL == first_insn)
3418 /* Add INSN into the doubly-linked list after insn AFTER. This and
3419 the next should be the only functions called to insert an insn once
3420 delay slots have been filled since only they know how to update a
3424 add_insn_after (rtx insn, rtx after, basic_block bb)
3426 rtx next = NEXT_INSN (after);
3428 gcc_assert (!optimize || !INSN_DELETED_P (after));
3430 NEXT_INSN (insn) = next;
3431 PREV_INSN (insn) = after;
3435 PREV_INSN (next) = insn;
3436 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3437 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3439 else if (last_insn == after)
3443 struct sequence_stack *stack = seq_stack;
3444 /* Scan all pending sequences too. */
3445 for (; stack; stack = stack->next)
3446 if (after == stack->last)
3455 if (!BARRIER_P (after)
3456 && !BARRIER_P (insn)
3457 && (bb = BLOCK_FOR_INSN (after)))
3459 set_block_for_insn (insn, bb);
3461 df_insn_rescan (insn);
3462 /* Should not happen as first in the BB is always
3463 either NOTE or LABEL. */
3464 if (BB_END (bb) == after
3465 /* Avoid clobbering of structure when creating new BB. */
3466 && !BARRIER_P (insn)
3467 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3471 NEXT_INSN (after) = insn;
3472 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3474 rtx sequence = PATTERN (after);
3475 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3479 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3480 the previous should be the only functions called to insert an insn
3481 once delay slots have been filled since only they know how to
3482 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3486 add_insn_before (rtx insn, rtx before, basic_block bb)
3488 rtx prev = PREV_INSN (before);
3490 gcc_assert (!optimize || !INSN_DELETED_P (before));
3492 PREV_INSN (insn) = prev;
3493 NEXT_INSN (insn) = before;
3497 NEXT_INSN (prev) = insn;
3498 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3500 rtx sequence = PATTERN (prev);
3501 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3504 else if (first_insn == before)
3508 struct sequence_stack *stack = seq_stack;
3509 /* Scan all pending sequences too. */
3510 for (; stack; stack = stack->next)
3511 if (before == stack->first)
3513 stack->first = insn;
3521 && !BARRIER_P (before)
3522 && !BARRIER_P (insn))
3523 bb = BLOCK_FOR_INSN (before);
3527 set_block_for_insn (insn, bb);
3529 df_insn_rescan (insn);
3530 /* Should not happen as first in the BB is always either NOTE or
3532 gcc_assert (BB_HEAD (bb) != insn
3533 /* Avoid clobbering of structure when creating new BB. */
3535 || NOTE_INSN_BASIC_BLOCK_P (insn));
3538 PREV_INSN (before) = insn;
3539 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3540 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3544 /* Replace insn with an deleted instruction note. */
3546 void set_insn_deleted (rtx insn)
3548 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3549 PUT_CODE (insn, NOTE);
3550 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3554 /* Remove an insn from its doubly-linked list. This function knows how
3555 to handle sequences. */
3557 remove_insn (rtx insn)
3559 rtx next = NEXT_INSN (insn);
3560 rtx prev = PREV_INSN (insn);
3563 /* Later in the code, the block will be marked dirty. */
3564 df_insn_delete (NULL, INSN_UID (insn));
3568 NEXT_INSN (prev) = next;
3569 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3571 rtx sequence = PATTERN (prev);
3572 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3575 else if (first_insn == insn)
3579 struct sequence_stack *stack = seq_stack;
3580 /* Scan all pending sequences too. */
3581 for (; stack; stack = stack->next)
3582 if (insn == stack->first)
3584 stack->first = next;
3593 PREV_INSN (next) = prev;
3594 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3595 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3597 else if (last_insn == insn)
3601 struct sequence_stack *stack = seq_stack;
3602 /* Scan all pending sequences too. */
3603 for (; stack; stack = stack->next)
3604 if (insn == stack->last)
3612 if (!BARRIER_P (insn)
3613 && (bb = BLOCK_FOR_INSN (insn)))
3616 df_set_bb_dirty (bb);
3617 if (BB_HEAD (bb) == insn)
3619 /* Never ever delete the basic block note without deleting whole
3621 gcc_assert (!NOTE_P (insn));
3622 BB_HEAD (bb) = next;
3624 if (BB_END (bb) == insn)
3629 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3632 add_function_usage_to (rtx call_insn, rtx call_fusage)
3634 gcc_assert (call_insn && CALL_P (call_insn));
3636 /* Put the register usage information on the CALL. If there is already
3637 some usage information, put ours at the end. */
3638 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3642 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3643 link = XEXP (link, 1))
3646 XEXP (link, 1) = call_fusage;
3649 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3652 /* Delete all insns made since FROM.
3653 FROM becomes the new last instruction. */
3656 delete_insns_since (rtx from)
3661 NEXT_INSN (from) = 0;
3665 /* This function is deprecated, please use sequences instead.
3667 Move a consecutive bunch of insns to a different place in the chain.
3668 The insns to be moved are those between FROM and TO.
3669 They are moved to a new position after the insn AFTER.
3670 AFTER must not be FROM or TO or any insn in between.
3672 This function does not know about SEQUENCEs and hence should not be
3673 called after delay-slot filling has been done. */
3676 reorder_insns_nobb (rtx from, rtx to, rtx after)
3678 /* Splice this bunch out of where it is now. */
3679 if (PREV_INSN (from))
3680 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3682 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3683 if (last_insn == to)
3684 last_insn = PREV_INSN (from);
3685 if (first_insn == from)
3686 first_insn = NEXT_INSN (to);
3688 /* Make the new neighbors point to it and it to them. */
3689 if (NEXT_INSN (after))
3690 PREV_INSN (NEXT_INSN (after)) = to;
3692 NEXT_INSN (to) = NEXT_INSN (after);
3693 PREV_INSN (from) = after;
3694 NEXT_INSN (after) = from;
3695 if (after == last_insn)
3699 /* Same as function above, but take care to update BB boundaries. */
3701 reorder_insns (rtx from, rtx to, rtx after)
3703 rtx prev = PREV_INSN (from);
3704 basic_block bb, bb2;
3706 reorder_insns_nobb (from, to, after);
3708 if (!BARRIER_P (after)
3709 && (bb = BLOCK_FOR_INSN (after)))
3712 df_set_bb_dirty (bb);
3714 if (!BARRIER_P (from)
3715 && (bb2 = BLOCK_FOR_INSN (from)))
3717 if (BB_END (bb2) == to)
3718 BB_END (bb2) = prev;
3719 df_set_bb_dirty (bb2);
3722 if (BB_END (bb) == after)
3725 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3728 set_block_for_insn (x, bb);
3729 df_insn_change_bb (x);
3735 /* Emit insn(s) of given code and pattern
3736 at a specified place within the doubly-linked list.
3738 All of the emit_foo global entry points accept an object
3739 X which is either an insn list or a PATTERN of a single
3742 There are thus a few canonical ways to generate code and
3743 emit it at a specific place in the instruction stream. For
3744 example, consider the instruction named SPOT and the fact that
3745 we would like to emit some instructions before SPOT. We might
3749 ... emit the new instructions ...
3750 insns_head = get_insns ();
3753 emit_insn_before (insns_head, SPOT);
3755 It used to be common to generate SEQUENCE rtl instead, but that
3756 is a relic of the past which no longer occurs. The reason is that
3757 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3758 generated would almost certainly die right after it was created. */
3760 /* Make X be output before the instruction BEFORE. */
3763 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
3768 gcc_assert (before);
3773 switch (GET_CODE (x))
3784 rtx next = NEXT_INSN (insn);
3785 add_insn_before (insn, before, bb);
3791 #ifdef ENABLE_RTL_CHECKING
3798 last = make_insn_raw (x);
3799 add_insn_before (last, before, bb);
3806 /* Make an instruction with body X and code JUMP_INSN
3807 and output it before the instruction BEFORE. */
3810 emit_jump_insn_before_noloc (rtx x, rtx before)
3812 rtx insn, last = NULL_RTX;
3814 gcc_assert (before);
3816 switch (GET_CODE (x))
3827 rtx next = NEXT_INSN (insn);
3828 add_insn_before (insn, before, NULL);
3834 #ifdef ENABLE_RTL_CHECKING
3841 last = make_jump_insn_raw (x);
3842 add_insn_before (last, before, NULL);
3849 /* Make an instruction with body X and code CALL_INSN
3850 and output it before the instruction BEFORE. */
3853 emit_call_insn_before_noloc (rtx x, rtx before)
3855 rtx last = NULL_RTX, insn;
3857 gcc_assert (before);
3859 switch (GET_CODE (x))
3870 rtx next = NEXT_INSN (insn);
3871 add_insn_before (insn, before, NULL);
3877 #ifdef ENABLE_RTL_CHECKING
3884 last = make_call_insn_raw (x);
3885 add_insn_before (last, before, NULL);
3892 /* Make an insn of code BARRIER
3893 and output it before the insn BEFORE. */
3896 emit_barrier_before (rtx before)
3898 rtx insn = rtx_alloc (BARRIER);
3900 INSN_UID (insn) = cur_insn_uid++;
3902 add_insn_before (insn, before, NULL);
3906 /* Emit the label LABEL before the insn BEFORE. */
3909 emit_label_before (rtx label, rtx before)
3911 /* This can be called twice for the same label as a result of the
3912 confusion that follows a syntax error! So make it harmless. */
3913 if (INSN_UID (label) == 0)
3915 INSN_UID (label) = cur_insn_uid++;
3916 add_insn_before (label, before, NULL);
3922 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3925 emit_note_before (enum insn_note subtype, rtx before)
3927 rtx note = rtx_alloc (NOTE);
3928 INSN_UID (note) = cur_insn_uid++;
3929 NOTE_KIND (note) = subtype;
3930 BLOCK_FOR_INSN (note) = NULL;
3931 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
3933 add_insn_before (note, before, NULL);
3937 /* Helper for emit_insn_after, handles lists of instructions
3941 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
3945 if (!bb && !BARRIER_P (after))
3946 bb = BLOCK_FOR_INSN (after);
3950 df_set_bb_dirty (bb);
3951 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3952 if (!BARRIER_P (last))
3954 set_block_for_insn (last, bb);
3955 df_insn_rescan (last);
3957 if (!BARRIER_P (last))
3959 set_block_for_insn (last, bb);
3960 df_insn_rescan (last);
3962 if (BB_END (bb) == after)
3966 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3969 after_after = NEXT_INSN (after);
3971 NEXT_INSN (after) = first;
3972 PREV_INSN (first) = after;
3973 NEXT_INSN (last) = after_after;
3975 PREV_INSN (after_after) = last;
3977 if (after == last_insn)
3982 /* Make X be output after the insn AFTER and set the BB of insn. If
3983 BB is NULL, an attempt is made to infer the BB from AFTER. */
3986 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
3995 switch (GET_CODE (x))
4003 last = emit_insn_after_1 (x, after, bb);
4006 #ifdef ENABLE_RTL_CHECKING
4013 last = make_insn_raw (x);
4014 add_insn_after (last, after, bb);
4022 /* Make an insn of code JUMP_INSN with body X
4023 and output it after the insn AFTER. */
4026 emit_jump_insn_after_noloc (rtx x, rtx after)
4032 switch (GET_CODE (x))
4040 last = emit_insn_after_1 (x, after, NULL);
4043 #ifdef ENABLE_RTL_CHECKING
4050 last = make_jump_insn_raw (x);
4051 add_insn_after (last, after, NULL);
4058 /* Make an instruction with body X and code CALL_INSN
4059 and output it after the instruction AFTER. */
4062 emit_call_insn_after_noloc (rtx x, rtx after)
4068 switch (GET_CODE (x))
4076 last = emit_insn_after_1 (x, after, NULL);
4079 #ifdef ENABLE_RTL_CHECKING
4086 last = make_call_insn_raw (x);
4087 add_insn_after (last, after, NULL);
4094 /* Make an insn of code BARRIER
4095 and output it after the insn AFTER. */
4098 emit_barrier_after (rtx after)
4100 rtx insn = rtx_alloc (BARRIER);
4102 INSN_UID (insn) = cur_insn_uid++;
4104 add_insn_after (insn, after, NULL);
4108 /* Emit the label LABEL after the insn AFTER. */
4111 emit_label_after (rtx label, rtx after)
4113 /* This can be called twice for the same label
4114 as a result of the confusion that follows a syntax error!
4115 So make it harmless. */
4116 if (INSN_UID (label) == 0)
4118 INSN_UID (label) = cur_insn_uid++;
4119 add_insn_after (label, after, NULL);
4125 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4128 emit_note_after (enum insn_note subtype, rtx after)
4130 rtx note = rtx_alloc (NOTE);
4131 INSN_UID (note) = cur_insn_uid++;
4132 NOTE_KIND (note) = subtype;
4133 BLOCK_FOR_INSN (note) = NULL;
4134 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4135 add_insn_after (note, after, NULL);
4139 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4141 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4143 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4145 if (pattern == NULL_RTX || !loc)
4148 after = NEXT_INSN (after);
4151 if (active_insn_p (after) && !INSN_LOCATOR (after))
4152 INSN_LOCATOR (after) = loc;
4155 after = NEXT_INSN (after);
4160 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4162 emit_insn_after (rtx pattern, rtx after)
4165 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4167 return emit_insn_after_noloc (pattern, after, NULL);
4170 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4172 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4174 rtx last = emit_jump_insn_after_noloc (pattern, after);
4176 if (pattern == NULL_RTX || !loc)
4179 after = NEXT_INSN (after);
4182 if (active_insn_p (after) && !INSN_LOCATOR (after))
4183 INSN_LOCATOR (after) = loc;
4186 after = NEXT_INSN (after);
4191 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4193 emit_jump_insn_after (rtx pattern, rtx after)
4196 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4198 return emit_jump_insn_after_noloc (pattern, after);
4201 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4203 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4205 rtx last = emit_call_insn_after_noloc (pattern, after);
4207 if (pattern == NULL_RTX || !loc)
4210 after = NEXT_INSN (after);
4213 if (active_insn_p (after) && !INSN_LOCATOR (after))
4214 INSN_LOCATOR (after) = loc;
4217 after = NEXT_INSN (after);
4222 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4224 emit_call_insn_after (rtx pattern, rtx after)
4227 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4229 return emit_call_insn_after_noloc (pattern, after);
4232 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4234 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4236 rtx first = PREV_INSN (before);
4237 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4239 if (pattern == NULL_RTX || !loc)
4243 first = get_insns ();
4245 first = NEXT_INSN (first);
4248 if (active_insn_p (first) && !INSN_LOCATOR (first))
4249 INSN_LOCATOR (first) = loc;
4252 first = NEXT_INSN (first);
4257 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4259 emit_insn_before (rtx pattern, rtx before)
4261 if (INSN_P (before))
4262 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4264 return emit_insn_before_noloc (pattern, before, NULL);
4267 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4269 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4271 rtx first = PREV_INSN (before);
4272 rtx last = emit_jump_insn_before_noloc (pattern, before);
4274 if (pattern == NULL_RTX)
4277 first = NEXT_INSN (first);
4280 if (active_insn_p (first) && !INSN_LOCATOR (first))
4281 INSN_LOCATOR (first) = loc;
4284 first = NEXT_INSN (first);
4289 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4291 emit_jump_insn_before (rtx pattern, rtx before)
4293 if (INSN_P (before))
4294 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4296 return emit_jump_insn_before_noloc (pattern, before);
4299 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4301 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4303 rtx first = PREV_INSN (before);
4304 rtx last = emit_call_insn_before_noloc (pattern, before);
4306 if (pattern == NULL_RTX)
4309 first = NEXT_INSN (first);
4312 if (active_insn_p (first) && !INSN_LOCATOR (first))
4313 INSN_LOCATOR (first) = loc;
4316 first = NEXT_INSN (first);
4321 /* like emit_call_insn_before_noloc,
4322 but set insn_locator according to before. */
4324 emit_call_insn_before (rtx pattern, rtx before)
4326 if (INSN_P (before))
4327 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4329 return emit_call_insn_before_noloc (pattern, before);
4332 /* Take X and emit it at the end of the doubly-linked
4335 Returns the last insn emitted. */
4340 rtx last = last_insn;
4346 switch (GET_CODE (x))
4357 rtx next = NEXT_INSN (insn);
4364 #ifdef ENABLE_RTL_CHECKING
4371 last = make_insn_raw (x);
4379 /* Make an insn of code JUMP_INSN with pattern X
4380 and add it to the end of the doubly-linked list. */
4383 emit_jump_insn (rtx x)
4385 rtx last = NULL_RTX, insn;
4387 switch (GET_CODE (x))
4398 rtx next = NEXT_INSN (insn);
4405 #ifdef ENABLE_RTL_CHECKING
4412 last = make_jump_insn_raw (x);
4420 /* Make an insn of code CALL_INSN with pattern X
4421 and add it to the end of the doubly-linked list. */
4424 emit_call_insn (rtx x)
4428 switch (GET_CODE (x))
4436 insn = emit_insn (x);
4439 #ifdef ENABLE_RTL_CHECKING
4446 insn = make_call_insn_raw (x);
4454 /* Add the label LABEL to the end of the doubly-linked list. */
4457 emit_label (rtx label)
4459 /* This can be called twice for the same label
4460 as a result of the confusion that follows a syntax error!
4461 So make it harmless. */
4462 if (INSN_UID (label) == 0)
4464 INSN_UID (label) = cur_insn_uid++;
4470 /* Make an insn of code BARRIER
4471 and add it to the end of the doubly-linked list. */
4476 rtx barrier = rtx_alloc (BARRIER);
4477 INSN_UID (barrier) = cur_insn_uid++;
4482 /* Emit a copy of note ORIG. */
4485 emit_note_copy (rtx orig)
4489 note = rtx_alloc (NOTE);
4491 INSN_UID (note) = cur_insn_uid++;
4492 NOTE_DATA (note) = NOTE_DATA (orig);
4493 NOTE_KIND (note) = NOTE_KIND (orig);
4494 BLOCK_FOR_INSN (note) = NULL;
4500 /* Make an insn of code NOTE or type NOTE_NO
4501 and add it to the end of the doubly-linked list. */
4504 emit_note (enum insn_note kind)
4508 note = rtx_alloc (NOTE);
4509 INSN_UID (note) = cur_insn_uid++;
4510 NOTE_KIND (note) = kind;
4511 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4512 BLOCK_FOR_INSN (note) = NULL;
4517 /* Cause next statement to emit a line note even if the line number
4521 force_next_line_note (void)
4523 #ifdef USE_MAPPED_LOCATION
4526 last_location.line = -1;
4530 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4531 note of this type already exists, remove it first. */
4534 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4536 rtx note = find_reg_note (insn, kind, NULL_RTX);
4537 rtx new_note = NULL;
4543 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4544 has multiple sets (some callers assume single_set
4545 means the insn only has one set, when in fact it
4546 means the insn only has one * useful * set). */
4547 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4553 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4554 It serves no useful purpose and breaks eliminate_regs. */
4555 if (GET_CODE (datum) == ASM_OPERANDS)
4560 XEXP (note, 0) = datum;
4561 df_notes_rescan (insn);
4569 XEXP (note, 0) = datum;
4575 new_note = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4576 REG_NOTES (insn) = new_note;
4582 df_notes_rescan (insn);
4588 return REG_NOTES (insn);
4591 /* Return an indication of which type of insn should have X as a body.
4592 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4594 static enum rtx_code
4595 classify_insn (rtx x)
4599 if (GET_CODE (x) == CALL)
4601 if (GET_CODE (x) == RETURN)
4603 if (GET_CODE (x) == SET)
4605 if (SET_DEST (x) == pc_rtx)
4607 else if (GET_CODE (SET_SRC (x)) == CALL)
4612 if (GET_CODE (x) == PARALLEL)
4615 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4616 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4618 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4619 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4621 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4622 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4628 /* Emit the rtl pattern X as an appropriate kind of insn.
4629 If X is a label, it is simply added into the insn chain. */
4634 enum rtx_code code = classify_insn (x);
4639 return emit_label (x);
4641 return emit_insn (x);
4644 rtx insn = emit_jump_insn (x);
4645 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4646 return emit_barrier ();
4650 return emit_call_insn (x);
4656 /* Space for free sequence stack entries. */
4657 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4659 /* Begin emitting insns to a sequence. If this sequence will contain
4660 something that might cause the compiler to pop arguments to function
4661 calls (because those pops have previously been deferred; see
4662 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4663 before calling this function. That will ensure that the deferred
4664 pops are not accidentally emitted in the middle of this sequence. */
4667 start_sequence (void)
4669 struct sequence_stack *tem;
4671 if (free_sequence_stack != NULL)
4673 tem = free_sequence_stack;
4674 free_sequence_stack = tem->next;
4677 tem = ggc_alloc (sizeof (struct sequence_stack));
4679 tem->next = seq_stack;
4680 tem->first = first_insn;
4681 tem->last = last_insn;
4689 /* Set up the insn chain starting with FIRST as the current sequence,
4690 saving the previously current one. See the documentation for
4691 start_sequence for more information about how to use this function. */
4694 push_to_sequence (rtx first)
4700 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4706 /* Like push_to_sequence, but take the last insn as an argument to avoid
4707 looping through the list. */
4710 push_to_sequence2 (rtx first, rtx last)
4718 /* Set up the outer-level insn chain
4719 as the current sequence, saving the previously current one. */
4722 push_topmost_sequence (void)
4724 struct sequence_stack *stack, *top = NULL;
4728 for (stack = seq_stack; stack; stack = stack->next)
4731 first_insn = top->first;
4732 last_insn = top->last;
4735 /* After emitting to the outer-level insn chain, update the outer-level
4736 insn chain, and restore the previous saved state. */
4739 pop_topmost_sequence (void)
4741 struct sequence_stack *stack, *top = NULL;
4743 for (stack = seq_stack; stack; stack = stack->next)
4746 top->first = first_insn;
4747 top->last = last_insn;
4752 /* After emitting to a sequence, restore previous saved state.
4754 To get the contents of the sequence just made, you must call
4755 `get_insns' *before* calling here.
4757 If the compiler might have deferred popping arguments while
4758 generating this sequence, and this sequence will not be immediately
4759 inserted into the instruction stream, use do_pending_stack_adjust
4760 before calling get_insns. That will ensure that the deferred
4761 pops are inserted into this sequence, and not into some random
4762 location in the instruction stream. See INHIBIT_DEFER_POP for more
4763 information about deferred popping of arguments. */
4768 struct sequence_stack *tem = seq_stack;
4770 first_insn = tem->first;
4771 last_insn = tem->last;
4772 seq_stack = tem->next;
4774 memset (tem, 0, sizeof (*tem));
4775 tem->next = free_sequence_stack;
4776 free_sequence_stack = tem;
4779 /* Return 1 if currently emitting into a sequence. */
4782 in_sequence_p (void)
4784 return seq_stack != 0;
4787 /* Put the various virtual registers into REGNO_REG_RTX. */
4790 init_virtual_regs (struct emit_status *es)
4792 rtx *ptr = es->x_regno_reg_rtx;
4793 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4794 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4795 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4796 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4797 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4801 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4802 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4803 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4804 static int copy_insn_n_scratches;
4806 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4807 copied an ASM_OPERANDS.
4808 In that case, it is the original input-operand vector. */
4809 static rtvec orig_asm_operands_vector;
4811 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4812 copied an ASM_OPERANDS.
4813 In that case, it is the copied input-operand vector. */
4814 static rtvec copy_asm_operands_vector;
4816 /* Likewise for the constraints vector. */
4817 static rtvec orig_asm_constraints_vector;
4818 static rtvec copy_asm_constraints_vector;
4820 /* Recursively create a new copy of an rtx for copy_insn.
4821 This function differs from copy_rtx in that it handles SCRATCHes and
4822 ASM_OPERANDs properly.
4823 Normally, this function is not used directly; use copy_insn as front end.
4824 However, you could first copy an insn pattern with copy_insn and then use
4825 this function afterwards to properly copy any REG_NOTEs containing
4829 copy_insn_1 (rtx orig)
4834 const char *format_ptr;
4836 code = GET_CODE (orig);
4851 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4856 for (i = 0; i < copy_insn_n_scratches; i++)
4857 if (copy_insn_scratch_in[i] == orig)
4858 return copy_insn_scratch_out[i];
4862 if (shared_const_p (orig))
4866 /* A MEM with a constant address is not sharable. The problem is that
4867 the constant address may need to be reloaded. If the mem is shared,
4868 then reloading one copy of this mem will cause all copies to appear
4869 to have been reloaded. */
4875 /* Copy the various flags, fields, and other information. We assume
4876 that all fields need copying, and then clear the fields that should
4877 not be copied. That is the sensible default behavior, and forces
4878 us to explicitly document why we are *not* copying a flag. */
4879 copy = shallow_copy_rtx (orig);
4881 /* We do not copy the USED flag, which is used as a mark bit during
4882 walks over the RTL. */
4883 RTX_FLAG (copy, used) = 0;
4885 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4888 RTX_FLAG (copy, jump) = 0;
4889 RTX_FLAG (copy, call) = 0;
4890 RTX_FLAG (copy, frame_related) = 0;
4893 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4895 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4896 switch (*format_ptr++)
4899 if (XEXP (orig, i) != NULL)
4900 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4905 if (XVEC (orig, i) == orig_asm_constraints_vector)
4906 XVEC (copy, i) = copy_asm_constraints_vector;
4907 else if (XVEC (orig, i) == orig_asm_operands_vector)
4908 XVEC (copy, i) = copy_asm_operands_vector;
4909 else if (XVEC (orig, i) != NULL)
4911 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4912 for (j = 0; j < XVECLEN (copy, i); j++)
4913 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4924 /* These are left unchanged. */
4931 if (code == SCRATCH)
4933 i = copy_insn_n_scratches++;
4934 gcc_assert (i < MAX_RECOG_OPERANDS);
4935 copy_insn_scratch_in[i] = orig;
4936 copy_insn_scratch_out[i] = copy;
4938 else if (code == ASM_OPERANDS)
4940 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4941 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4942 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4943 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4949 /* Create a new copy of an rtx.
4950 This function differs from copy_rtx in that it handles SCRATCHes and
4951 ASM_OPERANDs properly.
4952 INSN doesn't really have to be a full INSN; it could be just the
4955 copy_insn (rtx insn)
4957 copy_insn_n_scratches = 0;
4958 orig_asm_operands_vector = 0;
4959 orig_asm_constraints_vector = 0;
4960 copy_asm_operands_vector = 0;
4961 copy_asm_constraints_vector = 0;
4962 return copy_insn_1 (insn);
4965 /* Initialize data structures and variables in this file
4966 before generating rtl for each function. */
4971 struct function *f = cfun;
4973 f->emit = ggc_alloc (sizeof (struct emit_status));
4977 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4978 last_location = UNKNOWN_LOCATION;
4979 first_label_num = label_num;
4982 /* Init the tables that describe all the pseudo regs. */
4984 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4986 f->emit->regno_pointer_align
4987 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
4988 * sizeof (unsigned char));
4991 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
4993 /* Put copies of all the hard registers into regno_reg_rtx. */
4994 memcpy (regno_reg_rtx,
4995 static_regno_reg_rtx,
4996 FIRST_PSEUDO_REGISTER * sizeof (rtx));
4998 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4999 init_virtual_regs (f->emit);
5001 /* Indicate that the virtual registers and stack locations are
5003 REG_POINTER (stack_pointer_rtx) = 1;
5004 REG_POINTER (frame_pointer_rtx) = 1;
5005 REG_POINTER (hard_frame_pointer_rtx) = 1;
5006 REG_POINTER (arg_pointer_rtx) = 1;
5008 REG_POINTER (virtual_incoming_args_rtx) = 1;
5009 REG_POINTER (virtual_stack_vars_rtx) = 1;
5010 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5011 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5012 REG_POINTER (virtual_cfa_rtx) = 1;
5014 #ifdef STACK_BOUNDARY
5015 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5016 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5017 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5018 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5020 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5021 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5022 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5023 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5024 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5027 #ifdef INIT_EXPANDERS
5032 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5035 gen_const_vector (enum machine_mode mode, int constant)
5040 enum machine_mode inner;
5042 units = GET_MODE_NUNITS (mode);
5043 inner = GET_MODE_INNER (mode);
5045 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5047 v = rtvec_alloc (units);
5049 /* We need to call this function after we set the scalar const_tiny_rtx
5051 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5053 for (i = 0; i < units; ++i)
5054 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5056 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5060 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5061 all elements are zero, and the one vector when all elements are one. */
5063 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5065 enum machine_mode inner = GET_MODE_INNER (mode);
5066 int nunits = GET_MODE_NUNITS (mode);
5070 /* Check to see if all of the elements have the same value. */
5071 x = RTVEC_ELT (v, nunits - 1);
5072 for (i = nunits - 2; i >= 0; i--)
5073 if (RTVEC_ELT (v, i) != x)
5076 /* If the values are all the same, check to see if we can use one of the
5077 standard constant vectors. */
5080 if (x == CONST0_RTX (inner))
5081 return CONST0_RTX (mode);
5082 else if (x == CONST1_RTX (inner))
5083 return CONST1_RTX (mode);
5086 return gen_rtx_raw_CONST_VECTOR (mode, v);
5089 /* Initialise global register information required by all functions. */
5092 init_emit_regs (void)
5096 /* Reset register attributes */
5097 htab_empty (reg_attrs_htab);
5099 /* We need reg_raw_mode, so initialize the modes now. */
5100 init_reg_modes_target ();
5102 /* Assign register numbers to the globally defined register rtx. */
5103 pc_rtx = gen_rtx_PC (VOIDmode);
5104 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5105 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5106 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5107 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5108 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5109 virtual_incoming_args_rtx =
5110 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5111 virtual_stack_vars_rtx =
5112 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5113 virtual_stack_dynamic_rtx =
5114 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5115 virtual_outgoing_args_rtx =
5116 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5117 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5119 /* Initialize RTL for commonly used hard registers. These are
5120 copied into regno_reg_rtx as we begin to compile each function. */
5121 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5122 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5124 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5125 return_address_pointer_rtx
5126 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5129 #ifdef STATIC_CHAIN_REGNUM
5130 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5132 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5133 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5134 static_chain_incoming_rtx
5135 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5138 static_chain_incoming_rtx = static_chain_rtx;
5142 static_chain_rtx = STATIC_CHAIN;
5144 #ifdef STATIC_CHAIN_INCOMING
5145 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5147 static_chain_incoming_rtx = static_chain_rtx;
5151 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5152 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5154 pic_offset_table_rtx = NULL_RTX;
5157 /* Create some permanent unique rtl objects shared between all functions.
5158 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5161 init_emit_once (int line_numbers)
5164 enum machine_mode mode;
5165 enum machine_mode double_mode;
5167 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5169 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5170 const_int_htab_eq, NULL);
5172 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5173 const_double_htab_eq, NULL);
5175 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5176 const_fixed_htab_eq, NULL);
5178 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5179 mem_attrs_htab_eq, NULL);
5180 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5181 reg_attrs_htab_eq, NULL);
5183 no_line_numbers = ! line_numbers;
5185 /* Compute the word and byte modes. */
5187 byte_mode = VOIDmode;
5188 word_mode = VOIDmode;
5189 double_mode = VOIDmode;
5191 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5193 mode = GET_MODE_WIDER_MODE (mode))
5195 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5196 && byte_mode == VOIDmode)
5199 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5200 && word_mode == VOIDmode)
5204 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5206 mode = GET_MODE_WIDER_MODE (mode))
5208 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5209 && double_mode == VOIDmode)
5213 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5215 #ifdef INIT_EXPANDERS
5216 /* This is to initialize {init|mark|free}_machine_status before the first
5217 call to push_function_context_to. This is needed by the Chill front
5218 end which calls push_function_context_to before the first call to
5219 init_function_start. */
5223 /* Create the unique rtx's for certain rtx codes and operand values. */
5225 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5226 tries to use these variables. */
5227 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5228 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5229 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5231 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5232 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5233 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5235 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5237 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5238 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5239 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5240 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5241 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5242 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5243 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5245 dconsthalf = dconst1;
5246 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5248 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5250 /* Initialize mathematical constants for constant folding builtins.
5251 These constants need to be given to at least 160 bits precision. */
5252 real_from_string (&dconstsqrt2,
5253 "1.4142135623730950488016887242096980785696718753769480731766797379907");
5254 real_from_string (&dconste,
5255 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5257 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5259 REAL_VALUE_TYPE *r =
5260 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5262 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5264 mode = GET_MODE_WIDER_MODE (mode))
5265 const_tiny_rtx[i][(int) mode] =
5266 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5268 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5270 mode = GET_MODE_WIDER_MODE (mode))
5271 const_tiny_rtx[i][(int) mode] =
5272 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5274 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5276 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5278 mode = GET_MODE_WIDER_MODE (mode))
5279 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5281 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5283 mode = GET_MODE_WIDER_MODE (mode))
5284 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5287 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5289 mode = GET_MODE_WIDER_MODE (mode))
5291 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5292 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5295 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5297 mode = GET_MODE_WIDER_MODE (mode))
5299 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5300 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5303 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5305 mode = GET_MODE_WIDER_MODE (mode))
5307 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5308 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5311 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5313 mode = GET_MODE_WIDER_MODE (mode))
5315 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5316 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5319 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5321 mode = GET_MODE_WIDER_MODE (mode))
5323 FCONST0(mode).data.high = 0;
5324 FCONST0(mode).data.low = 0;
5325 FCONST0(mode).mode = mode;
5326 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5327 FCONST0 (mode), mode);
5330 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5332 mode = GET_MODE_WIDER_MODE (mode))
5334 FCONST0(mode).data.high = 0;
5335 FCONST0(mode).data.low = 0;
5336 FCONST0(mode).mode = mode;
5337 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5338 FCONST0 (mode), mode);
5341 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5343 mode = GET_MODE_WIDER_MODE (mode))
5345 FCONST0(mode).data.high = 0;
5346 FCONST0(mode).data.low = 0;
5347 FCONST0(mode).mode = mode;
5348 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5349 FCONST0 (mode), mode);
5351 /* We store the value 1. */
5352 FCONST1(mode).data.high = 0;
5353 FCONST1(mode).data.low = 0;
5354 FCONST1(mode).mode = mode;
5355 lshift_double (1, 0, GET_MODE_FBIT (mode),
5356 2 * HOST_BITS_PER_WIDE_INT,
5357 &FCONST1(mode).data.low,
5358 &FCONST1(mode).data.high,
5359 SIGNED_FIXED_POINT_MODE_P (mode));
5360 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5361 FCONST1 (mode), mode);
5364 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5366 mode = GET_MODE_WIDER_MODE (mode))
5368 FCONST0(mode).data.high = 0;
5369 FCONST0(mode).data.low = 0;
5370 FCONST0(mode).mode = mode;
5371 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5372 FCONST0 (mode), mode);
5374 /* We store the value 1. */
5375 FCONST1(mode).data.high = 0;
5376 FCONST1(mode).data.low = 0;
5377 FCONST1(mode).mode = mode;
5378 lshift_double (1, 0, GET_MODE_FBIT (mode),
5379 2 * HOST_BITS_PER_WIDE_INT,
5380 &FCONST1(mode).data.low,
5381 &FCONST1(mode).data.high,
5382 SIGNED_FIXED_POINT_MODE_P (mode));
5383 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5384 FCONST1 (mode), mode);
5387 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5389 mode = GET_MODE_WIDER_MODE (mode))
5391 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5394 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5396 mode = GET_MODE_WIDER_MODE (mode))
5398 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5401 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5403 mode = GET_MODE_WIDER_MODE (mode))
5405 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5406 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5409 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5411 mode = GET_MODE_WIDER_MODE (mode))
5413 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5414 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5417 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5418 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5419 const_tiny_rtx[0][i] = const0_rtx;
5421 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5422 if (STORE_FLAG_VALUE == 1)
5423 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5426 /* Produce exact duplicate of insn INSN after AFTER.
5427 Care updating of libcall regions if present. */
5430 emit_copy_of_insn_after (rtx insn, rtx after)
5433 rtx note1, note2, link;
5435 switch (GET_CODE (insn))
5438 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5442 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5446 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5447 if (CALL_INSN_FUNCTION_USAGE (insn))
5448 CALL_INSN_FUNCTION_USAGE (new)
5449 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5450 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5451 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5458 /* Update LABEL_NUSES. */
5459 mark_jump_label (PATTERN (new), new, 0);
5461 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5463 /* If the old insn is frame related, then so is the new one. This is
5464 primarily needed for IA-64 unwind info which marks epilogue insns,
5465 which may be duplicated by the basic block reordering code. */
5466 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5468 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5469 will make them. REG_LABEL_TARGETs are created there too, but are
5470 supposed to be sticky, so we copy them. */
5471 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5472 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5474 if (GET_CODE (link) == EXPR_LIST)
5476 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5477 copy_insn_1 (XEXP (link, 0)), REG_NOTES (new));
5480 = gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5481 XEXP (link, 0), REG_NOTES (new));
5484 /* Fix the libcall sequences. */
5485 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5488 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5490 XEXP (note1, 0) = p;
5491 XEXP (note2, 0) = new;
5493 INSN_CODE (new) = INSN_CODE (insn);
5497 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5499 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5501 if (hard_reg_clobbers[mode][regno])
5502 return hard_reg_clobbers[mode][regno];
5504 return (hard_reg_clobbers[mode][regno] =
5505 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5508 #include "gt-emit-rtl.h"