1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_decls (tree);
184 static void reset_used_decls (tree);
185 static void mark_label_nuses (rtx);
186 static hashval_t const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx lookup_const_double (rtx);
191 static hashval_t mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
195 static hashval_t reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs *get_reg_attrs (tree, int);
198 static tree component_ref_for_mem_expr (tree);
199 static rtx gen_const_vector_0 (enum machine_mode);
200 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
202 /* Probability of the conditional branch currently proceeded by try_split.
203 Set to -1 otherwise. */
204 int split_branch_probability = -1;
206 /* Returns a hash code for X (which is a really a CONST_INT). */
209 const_int_htab_hash (const void *x)
211 return (hashval_t) INTVAL ((rtx) x);
214 /* Returns nonzero if the value represented by X (which is really a
215 CONST_INT) is the same as that given by Y (which is really a
219 const_int_htab_eq (const void *x, const void *y)
221 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
224 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
226 const_double_htab_hash (const void *x)
231 if (GET_MODE (value) == VOIDmode)
232 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
235 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
236 /* MODE is used in the comparison, so it should be in the hash. */
237 h ^= GET_MODE (value);
242 /* Returns nonzero if the value represented by X (really a ...)
243 is the same as that represented by Y (really a ...) */
245 const_double_htab_eq (const void *x, const void *y)
247 rtx a = (rtx)x, b = (rtx)y;
249 if (GET_MODE (a) != GET_MODE (b))
251 if (GET_MODE (a) == VOIDmode)
252 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
253 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
255 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
256 CONST_DOUBLE_REAL_VALUE (b));
259 /* Returns a hash code for X (which is a really a mem_attrs *). */
262 mem_attrs_htab_hash (const void *x)
264 mem_attrs *p = (mem_attrs *) x;
266 return (p->alias ^ (p->align * 1000)
267 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
268 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
272 /* Returns nonzero if the value represented by X (which is really a
273 mem_attrs *) is the same as that given by Y (which is also really a
277 mem_attrs_htab_eq (const void *x, const void *y)
279 mem_attrs *p = (mem_attrs *) x;
280 mem_attrs *q = (mem_attrs *) y;
282 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
283 && p->size == q->size && p->align == q->align);
286 /* Allocate a new mem_attrs structure and insert it into the hash table if
287 one identical to it is not already in the table. We are doing this for
291 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
292 unsigned int align, enum machine_mode mode)
297 /* If everything is the default, we can just return zero.
298 This must match what the corresponding MEM_* macros return when the
299 field is not present. */
300 if (alias == 0 && expr == 0 && offset == 0
302 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
303 && (STRICT_ALIGNMENT && mode != BLKmode
304 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
309 attrs.offset = offset;
313 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
316 *slot = ggc_alloc (sizeof (mem_attrs));
317 memcpy (*slot, &attrs, sizeof (mem_attrs));
323 /* Returns a hash code for X (which is a really a reg_attrs *). */
326 reg_attrs_htab_hash (const void *x)
328 reg_attrs *p = (reg_attrs *) x;
330 return ((p->offset * 1000) ^ (long) p->decl);
333 /* Returns nonzero if the value represented by X (which is really a
334 reg_attrs *) is the same as that given by Y (which is also really a
338 reg_attrs_htab_eq (const void *x, const void *y)
340 reg_attrs *p = (reg_attrs *) x;
341 reg_attrs *q = (reg_attrs *) y;
343 return (p->decl == q->decl && p->offset == q->offset);
345 /* Allocate a new reg_attrs structure and insert it into the hash table if
346 one identical to it is not already in the table. We are doing this for
350 get_reg_attrs (tree decl, int offset)
355 /* If everything is the default, we can just return zero. */
356 if (decl == 0 && offset == 0)
360 attrs.offset = offset;
362 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
365 *slot = ggc_alloc (sizeof (reg_attrs));
366 memcpy (*slot, &attrs, sizeof (reg_attrs));
372 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
373 don't attempt to share with the various global pieces of rtl (such as
374 frame_pointer_rtx). */
377 gen_raw_REG (enum machine_mode mode, int regno)
379 rtx x = gen_rtx_raw_REG (mode, regno);
380 ORIGINAL_REGNO (x) = regno;
384 /* There are some RTL codes that require special attention; the generation
385 functions do the raw handling. If you add to this list, modify
386 special_rtx in gengenrtl.c as well. */
389 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
393 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
394 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
396 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
397 if (const_true_rtx && arg == STORE_FLAG_VALUE)
398 return const_true_rtx;
401 /* Look up the CONST_INT in the hash table. */
402 slot = htab_find_slot_with_hash (const_int_htab, &arg,
403 (hashval_t) arg, INSERT);
405 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
411 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
413 return GEN_INT (trunc_int_for_mode (c, mode));
416 /* CONST_DOUBLEs might be created from pairs of integers, or from
417 REAL_VALUE_TYPEs. Also, their length is known only at run time,
418 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
420 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
421 hash table. If so, return its counterpart; otherwise add it
422 to the hash table and return it. */
424 lookup_const_double (rtx real)
426 void **slot = htab_find_slot (const_double_htab, real, INSERT);
433 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
434 VALUE in mode MODE. */
436 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
438 rtx real = rtx_alloc (CONST_DOUBLE);
439 PUT_MODE (real, mode);
441 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
443 return lookup_const_double (real);
446 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
447 of ints: I0 is the low-order word and I1 is the high-order word.
448 Do not use this routine for non-integer modes; convert to
449 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
452 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
457 if (mode != VOIDmode)
460 if (GET_MODE_CLASS (mode) != MODE_INT
461 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
462 /* We can get a 0 for an error mark. */
463 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
467 /* We clear out all bits that don't belong in MODE, unless they and
468 our sign bit are all one. So we get either a reasonable negative
469 value or a reasonable unsigned value for this mode. */
470 width = GET_MODE_BITSIZE (mode);
471 if (width < HOST_BITS_PER_WIDE_INT
472 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
473 != ((HOST_WIDE_INT) (-1) << (width - 1))))
474 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
475 else if (width == HOST_BITS_PER_WIDE_INT
476 && ! (i1 == ~0 && i0 < 0))
478 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
479 /* We cannot represent this value as a constant. */
482 /* If this would be an entire word for the target, but is not for
483 the host, then sign-extend on the host so that the number will
484 look the same way on the host that it would on the target.
486 For example, when building a 64 bit alpha hosted 32 bit sparc
487 targeted compiler, then we want the 32 bit unsigned value -1 to be
488 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
489 The latter confuses the sparc backend. */
491 if (width < HOST_BITS_PER_WIDE_INT
492 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
493 i0 |= ((HOST_WIDE_INT) (-1) << width);
495 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
498 ??? Strictly speaking, this is wrong if we create a CONST_INT for
499 a large unsigned constant with the size of MODE being
500 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
501 in a wider mode. In that case we will mis-interpret it as a
504 Unfortunately, the only alternative is to make a CONST_DOUBLE for
505 any constant in any mode if it is an unsigned constant larger
506 than the maximum signed integer in an int on the host. However,
507 doing this will break everyone that always expects to see a
508 CONST_INT for SImode and smaller.
510 We have always been making CONST_INTs in this case, so nothing
511 new is being broken. */
513 if (width <= HOST_BITS_PER_WIDE_INT)
514 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
517 /* If this integer fits in one word, return a CONST_INT. */
518 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
521 /* We use VOIDmode for integers. */
522 value = rtx_alloc (CONST_DOUBLE);
523 PUT_MODE (value, VOIDmode);
525 CONST_DOUBLE_LOW (value) = i0;
526 CONST_DOUBLE_HIGH (value) = i1;
528 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
529 XWINT (value, i) = 0;
531 return lookup_const_double (value);
535 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
537 /* In case the MD file explicitly references the frame pointer, have
538 all such references point to the same frame pointer. This is
539 used during frame pointer elimination to distinguish the explicit
540 references to these registers from pseudos that happened to be
543 If we have eliminated the frame pointer or arg pointer, we will
544 be using it as a normal register, for example as a spill
545 register. In such cases, we might be accessing it in a mode that
546 is not Pmode and therefore cannot use the pre-allocated rtx.
548 Also don't do this when we are making new REGs in reload, since
549 we don't want to get confused with the real pointers. */
551 if (mode == Pmode && !reload_in_progress)
553 if (regno == FRAME_POINTER_REGNUM
554 && (!reload_completed || frame_pointer_needed))
555 return frame_pointer_rtx;
556 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
557 if (regno == HARD_FRAME_POINTER_REGNUM
558 && (!reload_completed || frame_pointer_needed))
559 return hard_frame_pointer_rtx;
561 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
562 if (regno == ARG_POINTER_REGNUM)
563 return arg_pointer_rtx;
565 #ifdef RETURN_ADDRESS_POINTER_REGNUM
566 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
567 return return_address_pointer_rtx;
569 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
570 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
571 return pic_offset_table_rtx;
572 if (regno == STACK_POINTER_REGNUM)
573 return stack_pointer_rtx;
577 /* If the per-function register table has been set up, try to re-use
578 an existing entry in that table to avoid useless generation of RTL.
580 This code is disabled for now until we can fix the various backends
581 which depend on having non-shared hard registers in some cases. Long
582 term we want to re-enable this code as it can significantly cut down
583 on the amount of useless RTL that gets generated.
585 We'll also need to fix some code that runs after reload that wants to
586 set ORIGINAL_REGNO. */
591 && regno < FIRST_PSEUDO_REGISTER
592 && reg_raw_mode[regno] == mode)
593 return regno_reg_rtx[regno];
596 return gen_raw_REG (mode, regno);
600 gen_rtx_MEM (enum machine_mode mode, rtx addr)
602 rtx rt = gen_rtx_raw_MEM (mode, addr);
604 /* This field is not cleared by the mere allocation of the rtx, so
612 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
614 /* This is the most common failure type.
615 Catch it early so we can see who does it. */
616 if ((offset % GET_MODE_SIZE (mode)) != 0)
619 /* This check isn't usable right now because combine will
620 throw arbitrary crap like a CALL into a SUBREG in
621 gen_lowpart_for_combine so we must just eat it. */
623 /* Check for this too. */
624 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
627 return gen_rtx_raw_SUBREG (mode, reg, offset);
630 /* Generate a SUBREG representing the least-significant part of REG if MODE
631 is smaller than mode of REG, otherwise paradoxical SUBREG. */
634 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
636 enum machine_mode inmode;
638 inmode = GET_MODE (reg);
639 if (inmode == VOIDmode)
641 return gen_rtx_SUBREG (mode, reg,
642 subreg_lowpart_offset (mode, inmode));
645 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
647 ** This routine generates an RTX of the size specified by
648 ** <code>, which is an RTX code. The RTX structure is initialized
649 ** from the arguments <element1> through <elementn>, which are
650 ** interpreted according to the specific RTX type's format. The
651 ** special machine mode associated with the rtx (if any) is specified
654 ** gen_rtx can be invoked in a way which resembles the lisp-like
655 ** rtx it will generate. For example, the following rtx structure:
657 ** (plus:QI (mem:QI (reg:SI 1))
658 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
660 ** ...would be generated by the following C code:
662 ** gen_rtx (PLUS, QImode,
663 ** gen_rtx (MEM, QImode,
664 ** gen_rtx (REG, SImode, 1)),
665 ** gen_rtx (MEM, QImode,
666 ** gen_rtx (PLUS, SImode,
667 ** gen_rtx (REG, SImode, 2),
668 ** gen_rtx (REG, SImode, 3)))),
673 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
675 int i; /* Array indices... */
676 const char *fmt; /* Current rtx's format... */
677 rtx rt_val; /* RTX to return to caller... */
685 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
690 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
691 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
693 rt_val = immed_double_const (arg0, arg1, mode);
698 rt_val = gen_rtx_REG (mode, va_arg (p, int));
702 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
706 rt_val = rtx_alloc (code); /* Allocate the storage space. */
707 rt_val->mode = mode; /* Store the machine mode... */
709 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
710 for (i = 0; i < GET_RTX_LENGTH (code); i++)
714 case '0': /* Field with unknown use. Zero it. */
715 X0EXP (rt_val, i) = NULL_RTX;
718 case 'i': /* An integer? */
719 XINT (rt_val, i) = va_arg (p, int);
722 case 'w': /* A wide integer? */
723 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
726 case 's': /* A string? */
727 XSTR (rt_val, i) = va_arg (p, char *);
730 case 'e': /* An expression? */
731 case 'u': /* An insn? Same except when printing. */
732 XEXP (rt_val, i) = va_arg (p, rtx);
735 case 'E': /* An RTX vector? */
736 XVEC (rt_val, i) = va_arg (p, rtvec);
739 case 'b': /* A bitmap? */
740 XBITMAP (rt_val, i) = va_arg (p, bitmap);
743 case 't': /* A tree? */
744 XTREE (rt_val, i) = va_arg (p, tree);
758 /* gen_rtvec (n, [rt1, ..., rtn])
760 ** This routine creates an rtvec and stores within it the
761 ** pointers to rtx's which are its arguments.
766 gen_rtvec (int n, ...)
775 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
777 vector = alloca (n * sizeof (rtx));
779 for (i = 0; i < n; i++)
780 vector[i] = va_arg (p, rtx);
782 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
786 return gen_rtvec_v (save_n, vector);
790 gen_rtvec_v (int n, rtx *argp)
796 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
798 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
800 for (i = 0; i < n; i++)
801 rt_val->elem[i] = *argp++;
806 /* Generate a REG rtx for a new pseudo register of mode MODE.
807 This pseudo is assigned the next sequential register number. */
810 gen_reg_rtx (enum machine_mode mode)
812 struct function *f = cfun;
815 /* Don't let anything called after initial flow analysis create new
820 if (generating_concat_p
821 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
822 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
824 /* For complex modes, don't make a single pseudo.
825 Instead, make a CONCAT of two pseudos.
826 This allows noncontiguous allocation of the real and imaginary parts,
827 which makes much better code. Besides, allocating DCmode
828 pseudos overstrains reload on some machines like the 386. */
829 rtx realpart, imagpart;
830 enum machine_mode partmode = GET_MODE_INNER (mode);
832 realpart = gen_reg_rtx (partmode);
833 imagpart = gen_reg_rtx (partmode);
834 return gen_rtx_CONCAT (mode, realpart, imagpart);
837 /* Make sure regno_pointer_align, and regno_reg_rtx are large
838 enough to have an element for this pseudo reg number. */
840 if (reg_rtx_no == f->emit->regno_pointer_align_length)
842 int old_size = f->emit->regno_pointer_align_length;
846 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
847 memset (new + old_size, 0, old_size);
848 f->emit->regno_pointer_align = (unsigned char *) new;
850 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
851 old_size * 2 * sizeof (rtx));
852 memset (new1 + old_size, 0, old_size * sizeof (rtx));
853 regno_reg_rtx = new1;
855 f->emit->regno_pointer_align_length = old_size * 2;
858 val = gen_raw_REG (mode, reg_rtx_no);
859 regno_reg_rtx[reg_rtx_no++] = val;
863 /* Generate a register with same attributes as REG,
864 but offsetted by OFFSET. */
867 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
869 rtx new = gen_rtx_REG (mode, regno);
870 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
871 REG_OFFSET (reg) + offset);
875 /* Set the decl for MEM to DECL. */
878 set_reg_attrs_from_mem (rtx reg, rtx mem)
880 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
882 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
885 /* Set the register attributes for registers contained in PARM_RTX.
886 Use needed values from memory attributes of MEM. */
889 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
891 if (GET_CODE (parm_rtx) == REG)
892 set_reg_attrs_from_mem (parm_rtx, mem);
893 else if (GET_CODE (parm_rtx) == PARALLEL)
895 /* Check for a NULL entry in the first slot, used to indicate that the
896 parameter goes both on the stack and in registers. */
897 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
898 for (; i < XVECLEN (parm_rtx, 0); i++)
900 rtx x = XVECEXP (parm_rtx, 0, i);
901 if (GET_CODE (XEXP (x, 0)) == REG)
902 REG_ATTRS (XEXP (x, 0))
903 = get_reg_attrs (MEM_EXPR (mem),
904 INTVAL (XEXP (x, 1)));
909 /* Assign the RTX X to declaration T. */
911 set_decl_rtl (tree t, rtx x)
913 DECL_CHECK (t)->decl.rtl = x;
917 /* For register, we maintain the reverse information too. */
918 if (GET_CODE (x) == REG)
919 REG_ATTRS (x) = get_reg_attrs (t, 0);
920 else if (GET_CODE (x) == SUBREG)
921 REG_ATTRS (SUBREG_REG (x))
922 = get_reg_attrs (t, -SUBREG_BYTE (x));
923 if (GET_CODE (x) == CONCAT)
925 if (REG_P (XEXP (x, 0)))
926 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
927 if (REG_P (XEXP (x, 1)))
928 REG_ATTRS (XEXP (x, 1))
929 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
931 if (GET_CODE (x) == PARALLEL)
934 for (i = 0; i < XVECLEN (x, 0); i++)
936 rtx y = XVECEXP (x, 0, i);
937 if (REG_P (XEXP (y, 0)))
938 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
943 /* Identify REG (which may be a CONCAT) as a user register. */
946 mark_user_reg (rtx reg)
948 if (GET_CODE (reg) == CONCAT)
950 REG_USERVAR_P (XEXP (reg, 0)) = 1;
951 REG_USERVAR_P (XEXP (reg, 1)) = 1;
953 else if (GET_CODE (reg) == REG)
954 REG_USERVAR_P (reg) = 1;
959 /* Identify REG as a probable pointer register and show its alignment
960 as ALIGN, if nonzero. */
963 mark_reg_pointer (rtx reg, int align)
965 if (! REG_POINTER (reg))
967 REG_POINTER (reg) = 1;
970 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
972 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
973 /* We can no-longer be sure just how aligned this pointer is */
974 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
977 /* Return 1 plus largest pseudo reg number used in the current function. */
985 /* Return 1 + the largest label number used so far in the current function. */
990 if (last_label_num && label_num == base_label_num)
991 return last_label_num;
995 /* Return first label number used in this function (if any were used). */
998 get_first_label_num (void)
1000 return first_label_num;
1003 /* Return the final regno of X, which is a SUBREG of a hard
1006 subreg_hard_regno (rtx x, int check_mode)
1008 enum machine_mode mode = GET_MODE (x);
1009 unsigned int byte_offset, base_regno, final_regno;
1010 rtx reg = SUBREG_REG (x);
1012 /* This is where we attempt to catch illegal subregs
1013 created by the compiler. */
1014 if (GET_CODE (x) != SUBREG
1015 || GET_CODE (reg) != REG)
1017 base_regno = REGNO (reg);
1018 if (base_regno >= FIRST_PSEUDO_REGISTER)
1020 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1022 #ifdef ENABLE_CHECKING
1023 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1024 SUBREG_BYTE (x), mode))
1027 /* Catch non-congruent offsets too. */
1028 byte_offset = SUBREG_BYTE (x);
1029 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1032 final_regno = subreg_regno (x);
1037 /* Return a value representing some low-order bits of X, where the number
1038 of low-order bits is given by MODE. Note that no conversion is done
1039 between floating-point and fixed-point values, rather, the bit
1040 representation is returned.
1042 This function handles the cases in common between gen_lowpart, below,
1043 and two variants in cse.c and combine.c. These are the cases that can
1044 be safely handled at all points in the compilation.
1046 If this is not a case we can handle, return 0. */
1049 gen_lowpart_common (enum machine_mode mode, rtx x)
1051 int msize = GET_MODE_SIZE (mode);
1052 int xsize = GET_MODE_SIZE (GET_MODE (x));
1055 if (GET_MODE (x) == mode)
1058 /* MODE must occupy no more words than the mode of X. */
1059 if (GET_MODE (x) != VOIDmode
1060 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1061 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
1064 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1065 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1066 && GET_MODE (x) != VOIDmode && msize > xsize)
1069 offset = subreg_lowpart_offset (mode, GET_MODE (x));
1071 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1072 && (GET_MODE_CLASS (mode) == MODE_INT
1073 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1075 /* If we are getting the low-order part of something that has been
1076 sign- or zero-extended, we can either just use the object being
1077 extended or make a narrower extension. If we want an even smaller
1078 piece than the size of the object being extended, call ourselves
1081 This case is used mostly by combine and cse. */
1083 if (GET_MODE (XEXP (x, 0)) == mode)
1085 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1086 return gen_lowpart_common (mode, XEXP (x, 0));
1087 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
1088 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1090 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1091 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1092 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1093 else if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
1094 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1095 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1096 from the low-order part of the constant. */
1097 else if ((GET_MODE_CLASS (mode) == MODE_INT
1098 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1099 && GET_MODE (x) == VOIDmode
1100 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1102 /* If MODE is twice the host word size, X is already the desired
1103 representation. Otherwise, if MODE is wider than a word, we can't
1104 do this. If MODE is exactly a word, return just one CONST_INT. */
1106 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1108 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1110 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1111 return (GET_CODE (x) == CONST_INT ? x
1112 : GEN_INT (CONST_DOUBLE_LOW (x)));
1115 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1116 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1117 : CONST_DOUBLE_LOW (x));
1119 /* Sign extend to HOST_WIDE_INT. */
1120 val = trunc_int_for_mode (val, mode);
1122 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1127 /* The floating-point emulator can handle all conversions between
1128 FP and integer operands. This simplifies reload because it
1129 doesn't have to deal with constructs like (subreg:DI
1130 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1131 /* Single-precision floats are always 32-bits and double-precision
1132 floats are always 64-bits. */
1134 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1135 && GET_MODE_BITSIZE (mode) == 32
1136 && GET_CODE (x) == CONST_INT)
1139 long i = INTVAL (x);
1141 real_from_target (&r, &i, mode);
1142 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1144 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1145 && GET_MODE_BITSIZE (mode) == 64
1146 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1147 && GET_MODE (x) == VOIDmode)
1150 HOST_WIDE_INT low, high;
1153 if (GET_CODE (x) == CONST_INT)
1156 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1160 low = CONST_DOUBLE_LOW (x);
1161 high = CONST_DOUBLE_HIGH (x);
1164 if (HOST_BITS_PER_WIDE_INT > 32)
1165 high = low >> 31 >> 1;
1167 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1169 if (WORDS_BIG_ENDIAN)
1170 i[0] = high, i[1] = low;
1172 i[0] = low, i[1] = high;
1174 real_from_target (&r, i, mode);
1175 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1177 else if ((GET_MODE_CLASS (mode) == MODE_INT
1178 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1179 && GET_CODE (x) == CONST_DOUBLE
1180 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1183 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1184 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1186 /* Convert 'r' into an array of four 32-bit words in target word
1188 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1189 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1192 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1195 i[3 - 3 * endian] = 0;
1198 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1199 i[2 - 2 * endian] = 0;
1200 i[3 - 2 * endian] = 0;
1203 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1204 i[3 - 3 * endian] = 0;
1207 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1212 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1214 #if HOST_BITS_PER_WIDE_INT == 32
1215 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1217 if (HOST_BITS_PER_WIDE_INT != 64)
1220 return immed_double_const ((((unsigned long) i[3 * endian])
1221 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1222 (((unsigned long) i[2 - endian])
1223 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1227 /* If MODE is a condition code and X is a CONST_INT, the value of X
1228 must already have been "recognized" by the back-end, and we can
1229 assume that it is valid for this mode. */
1230 else if (GET_MODE_CLASS (mode) == MODE_CC
1231 && GET_CODE (x) == CONST_INT)
1234 /* Otherwise, we can't do this. */
1238 /* Return the constant real or imaginary part (which has mode MODE)
1239 of a complex value X. The IMAGPART_P argument determines whether
1240 the real or complex component should be returned. This function
1241 returns NULL_RTX if the component isn't a constant. */
1244 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1248 if (GET_CODE (x) == MEM
1249 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1251 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1252 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1254 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1255 if (TREE_CODE (part) == REAL_CST
1256 || TREE_CODE (part) == INTEGER_CST)
1257 return expand_expr (part, NULL_RTX, mode, 0);
1263 /* Return the real part (which has mode MODE) of a complex value X.
1264 This always comes at the low address in memory. */
1267 gen_realpart (enum machine_mode mode, rtx x)
1271 /* Handle complex constants. */
1272 part = gen_complex_constant_part (mode, x, 0);
1273 if (part != NULL_RTX)
1276 if (WORDS_BIG_ENDIAN
1277 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1279 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1281 ("can't access real part of complex value in hard register");
1282 else if (WORDS_BIG_ENDIAN)
1283 return gen_highpart (mode, x);
1285 return gen_lowpart (mode, x);
1288 /* Return the imaginary part (which has mode MODE) of a complex value X.
1289 This always comes at the high address in memory. */
1292 gen_imagpart (enum machine_mode mode, rtx x)
1296 /* Handle complex constants. */
1297 part = gen_complex_constant_part (mode, x, 1);
1298 if (part != NULL_RTX)
1301 if (WORDS_BIG_ENDIAN)
1302 return gen_lowpart (mode, x);
1303 else if (! WORDS_BIG_ENDIAN
1304 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1306 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1308 ("can't access imaginary part of complex value in hard register");
1310 return gen_highpart (mode, x);
1313 /* Return 1 iff X, assumed to be a SUBREG,
1314 refers to the real part of the complex value in its containing reg.
1315 Complex values are always stored with the real part in the first word,
1316 regardless of WORDS_BIG_ENDIAN. */
1319 subreg_realpart_p (rtx x)
1321 if (GET_CODE (x) != SUBREG)
1324 return ((unsigned int) SUBREG_BYTE (x)
1325 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1328 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1329 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1330 least-significant part of X.
1331 MODE specifies how big a part of X to return;
1332 it usually should not be larger than a word.
1333 If X is a MEM whose address is a QUEUED, the value may be so also. */
1336 gen_lowpart (enum machine_mode mode, rtx x)
1338 rtx result = gen_lowpart_common (mode, x);
1342 else if (GET_CODE (x) == REG)
1344 /* Must be a hard reg that's not valid in MODE. */
1345 result = gen_lowpart_common (mode, copy_to_reg (x));
1350 else if (GET_CODE (x) == MEM)
1352 /* The only additional case we can do is MEM. */
1355 /* The following exposes the use of "x" to CSE. */
1356 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1357 && SCALAR_INT_MODE_P (GET_MODE (x))
1358 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1359 GET_MODE_BITSIZE (GET_MODE (x)))
1360 && ! no_new_pseudos)
1361 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1363 if (WORDS_BIG_ENDIAN)
1364 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1365 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1367 if (BYTES_BIG_ENDIAN)
1368 /* Adjust the address so that the address-after-the-data
1370 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1371 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1373 return adjust_address (x, mode, offset);
1375 else if (GET_CODE (x) == ADDRESSOF)
1376 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1381 /* Like `gen_lowpart', but refer to the most significant part.
1382 This is used to access the imaginary part of a complex number. */
1385 gen_highpart (enum machine_mode mode, rtx x)
1387 unsigned int msize = GET_MODE_SIZE (mode);
1390 /* This case loses if X is a subreg. To catch bugs early,
1391 complain if an invalid MODE is used even in other cases. */
1392 if (msize > UNITS_PER_WORD
1393 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1396 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1397 subreg_highpart_offset (mode, GET_MODE (x)));
1399 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1400 the target if we have a MEM. gen_highpart must return a valid operand,
1401 emitting code if necessary to do so. */
1402 if (result != NULL_RTX && GET_CODE (result) == MEM)
1403 result = validize_mem (result);
1410 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1411 be VOIDmode constant. */
1413 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1415 if (GET_MODE (exp) != VOIDmode)
1417 if (GET_MODE (exp) != innermode)
1419 return gen_highpart (outermode, exp);
1421 return simplify_gen_subreg (outermode, exp, innermode,
1422 subreg_highpart_offset (outermode, innermode));
1425 /* Return offset in bytes to get OUTERMODE low part
1426 of the value in mode INNERMODE stored in memory in target format. */
1429 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1431 unsigned int offset = 0;
1432 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1436 if (WORDS_BIG_ENDIAN)
1437 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1438 if (BYTES_BIG_ENDIAN)
1439 offset += difference % UNITS_PER_WORD;
1445 /* Return offset in bytes to get OUTERMODE high part
1446 of the value in mode INNERMODE stored in memory in target format. */
1448 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1450 unsigned int offset = 0;
1451 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1453 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1458 if (! WORDS_BIG_ENDIAN)
1459 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1460 if (! BYTES_BIG_ENDIAN)
1461 offset += difference % UNITS_PER_WORD;
1467 /* Return 1 iff X, assumed to be a SUBREG,
1468 refers to the least significant part of its containing reg.
1469 If X is not a SUBREG, always return 1 (it is its own low part!). */
1472 subreg_lowpart_p (rtx x)
1474 if (GET_CODE (x) != SUBREG)
1476 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1479 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1480 == SUBREG_BYTE (x));
1484 /* Helper routine for all the constant cases of operand_subword.
1485 Some places invoke this directly. */
1488 constant_subword (rtx op, int offset, enum machine_mode mode)
1490 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1493 /* If OP is already an integer word, return it. */
1494 if (GET_MODE_CLASS (mode) == MODE_INT
1495 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1498 /* The output is some bits, the width of the target machine's word.
1499 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1501 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1502 && GET_MODE_CLASS (mode) == MODE_FLOAT
1503 && GET_MODE_BITSIZE (mode) == 64
1504 && GET_CODE (op) == CONST_DOUBLE)
1509 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1510 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1512 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1513 which the words are written depends on the word endianness.
1514 ??? This is a potential portability problem and should
1515 be fixed at some point.
1517 We must exercise caution with the sign bit. By definition there
1518 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1519 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1520 So we explicitly mask and sign-extend as necessary. */
1521 if (BITS_PER_WORD == 32)
1524 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1525 return GEN_INT (val);
1527 #if HOST_BITS_PER_WIDE_INT >= 64
1528 else if (BITS_PER_WORD >= 64 && offset == 0)
1530 val = k[! WORDS_BIG_ENDIAN];
1531 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1532 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1533 return GEN_INT (val);
1536 else if (BITS_PER_WORD == 16)
1538 val = k[offset >> 1];
1539 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1541 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1542 return GEN_INT (val);
1547 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1548 && GET_MODE_CLASS (mode) == MODE_FLOAT
1549 && GET_MODE_BITSIZE (mode) > 64
1550 && GET_CODE (op) == CONST_DOUBLE)
1555 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1556 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1558 if (BITS_PER_WORD == 32)
1561 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1562 return GEN_INT (val);
1564 #if HOST_BITS_PER_WIDE_INT >= 64
1565 else if (BITS_PER_WORD >= 64 && offset <= 1)
1567 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1568 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1569 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1570 return GEN_INT (val);
1577 /* Single word float is a little harder, since single- and double-word
1578 values often do not have the same high-order bits. We have already
1579 verified that we want the only defined word of the single-word value. */
1580 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1581 && GET_MODE_BITSIZE (mode) == 32
1582 && GET_CODE (op) == CONST_DOUBLE)
1587 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1588 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1590 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1592 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1594 if (BITS_PER_WORD == 16)
1596 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1598 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1601 return GEN_INT (val);
1604 /* The only remaining cases that we can handle are integers.
1605 Convert to proper endianness now since these cases need it.
1606 At this point, offset == 0 means the low-order word.
1608 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1609 in general. However, if OP is (const_int 0), we can just return
1612 if (op == const0_rtx)
1615 if (GET_MODE_CLASS (mode) != MODE_INT
1616 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1617 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1620 if (WORDS_BIG_ENDIAN)
1621 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1623 /* Find out which word on the host machine this value is in and get
1624 it from the constant. */
1625 val = (offset / size_ratio == 0
1626 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1627 : (GET_CODE (op) == CONST_INT
1628 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1630 /* Get the value we want into the low bits of val. */
1631 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1632 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1634 val = trunc_int_for_mode (val, word_mode);
1636 return GEN_INT (val);
1639 /* Return subword OFFSET of operand OP.
1640 The word number, OFFSET, is interpreted as the word number starting
1641 at the low-order address. OFFSET 0 is the low-order word if not
1642 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1644 If we cannot extract the required word, we return zero. Otherwise,
1645 an rtx corresponding to the requested word will be returned.
1647 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1648 reload has completed, a valid address will always be returned. After
1649 reload, if a valid address cannot be returned, we return zero.
1651 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1652 it is the responsibility of the caller.
1654 MODE is the mode of OP in case it is a CONST_INT.
1656 ??? This is still rather broken for some cases. The problem for the
1657 moment is that all callers of this thing provide no 'goal mode' to
1658 tell us to work with. This exists because all callers were written
1659 in a word based SUBREG world.
1660 Now use of this function can be deprecated by simplify_subreg in most
1665 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1667 if (mode == VOIDmode)
1668 mode = GET_MODE (op);
1670 if (mode == VOIDmode)
1673 /* If OP is narrower than a word, fail. */
1675 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1678 /* If we want a word outside OP, return zero. */
1680 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1683 /* Form a new MEM at the requested address. */
1684 if (GET_CODE (op) == MEM)
1686 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1688 if (! validate_address)
1691 else if (reload_completed)
1693 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1697 return replace_equiv_address (new, XEXP (new, 0));
1700 /* Rest can be handled by simplify_subreg. */
1701 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1704 /* Similar to `operand_subword', but never return 0. If we can't extract
1705 the required subword, put OP into a register and try again. If that fails,
1706 abort. We always validate the address in this case.
1708 MODE is the mode of OP, in case it is CONST_INT. */
1711 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1713 rtx result = operand_subword (op, offset, 1, mode);
1718 if (mode != BLKmode && mode != VOIDmode)
1720 /* If this is a register which can not be accessed by words, copy it
1721 to a pseudo register. */
1722 if (GET_CODE (op) == REG)
1723 op = copy_to_reg (op);
1725 op = force_reg (mode, op);
1728 result = operand_subword (op, offset, 1, mode);
1735 /* Given a compare instruction, swap the operands.
1736 A test instruction is changed into a compare of 0 against the operand. */
1739 reverse_comparison (rtx insn)
1741 rtx body = PATTERN (insn);
1744 if (GET_CODE (body) == SET)
1745 comp = SET_SRC (body);
1747 comp = SET_SRC (XVECEXP (body, 0, 0));
1749 if (GET_CODE (comp) == COMPARE)
1751 rtx op0 = XEXP (comp, 0);
1752 rtx op1 = XEXP (comp, 1);
1753 XEXP (comp, 0) = op1;
1754 XEXP (comp, 1) = op0;
1758 rtx new = gen_rtx_COMPARE (VOIDmode,
1759 CONST0_RTX (GET_MODE (comp)), comp);
1760 if (GET_CODE (body) == SET)
1761 SET_SRC (body) = new;
1763 SET_SRC (XVECEXP (body, 0, 0)) = new;
1767 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1768 or (2) a component ref of something variable. Represent the later with
1769 a NULL expression. */
1772 component_ref_for_mem_expr (tree ref)
1774 tree inner = TREE_OPERAND (ref, 0);
1776 if (TREE_CODE (inner) == COMPONENT_REF)
1777 inner = component_ref_for_mem_expr (inner);
1780 tree placeholder_ptr = 0;
1782 /* Now remove any conversions: they don't change what the underlying
1783 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1784 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1785 || TREE_CODE (inner) == NON_LVALUE_EXPR
1786 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1787 || TREE_CODE (inner) == SAVE_EXPR
1788 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1789 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1790 inner = find_placeholder (inner, &placeholder_ptr);
1792 inner = TREE_OPERAND (inner, 0);
1794 if (! DECL_P (inner))
1798 if (inner == TREE_OPERAND (ref, 0))
1801 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1802 TREE_OPERAND (ref, 1));
1805 /* Given REF, a MEM, and T, either the type of X or the expression
1806 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1807 if we are making a new object of this type. BITPOS is nonzero if
1808 there is an offset outstanding on T that will be applied later. */
1811 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1812 HOST_WIDE_INT bitpos)
1814 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1815 tree expr = MEM_EXPR (ref);
1816 rtx offset = MEM_OFFSET (ref);
1817 rtx size = MEM_SIZE (ref);
1818 unsigned int align = MEM_ALIGN (ref);
1819 HOST_WIDE_INT apply_bitpos = 0;
1822 /* It can happen that type_for_mode was given a mode for which there
1823 is no language-level type. In which case it returns NULL, which
1828 type = TYPE_P (t) ? t : TREE_TYPE (t);
1830 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1831 wrong answer, as it assumes that DECL_RTL already has the right alias
1832 info. Callers should not set DECL_RTL until after the call to
1833 set_mem_attributes. */
1834 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1837 /* Get the alias set from the expression or type (perhaps using a
1838 front-end routine) and use it. */
1839 alias = get_alias_set (t);
1841 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1842 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1843 RTX_UNCHANGING_P (ref)
1844 |= ((lang_hooks.honor_readonly
1845 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1846 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1848 /* If we are making an object of this type, or if this is a DECL, we know
1849 that it is a scalar if the type is not an aggregate. */
1850 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1851 MEM_SCALAR_P (ref) = 1;
1853 /* We can set the alignment from the type if we are making an object,
1854 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1855 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1856 align = MAX (align, TYPE_ALIGN (type));
1858 /* If the size is known, we can set that. */
1859 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1860 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1862 /* If T is not a type, we may be able to deduce some more information about
1866 maybe_set_unchanging (ref, t);
1867 if (TREE_THIS_VOLATILE (t))
1868 MEM_VOLATILE_P (ref) = 1;
1870 /* Now remove any conversions: they don't change what the underlying
1871 object is. Likewise for SAVE_EXPR. */
1872 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1873 || TREE_CODE (t) == NON_LVALUE_EXPR
1874 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1875 || TREE_CODE (t) == SAVE_EXPR)
1876 t = TREE_OPERAND (t, 0);
1878 /* If this expression can't be addressed (e.g., it contains a reference
1879 to a non-addressable field), show we don't change its alias set. */
1880 if (! can_address_p (t))
1881 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1883 /* If this is a decl, set the attributes of the MEM from it. */
1887 offset = const0_rtx;
1888 apply_bitpos = bitpos;
1889 size = (DECL_SIZE_UNIT (t)
1890 && host_integerp (DECL_SIZE_UNIT (t), 1)
1891 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1892 align = DECL_ALIGN (t);
1895 /* If this is a constant, we know the alignment. */
1896 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1898 align = TYPE_ALIGN (type);
1899 #ifdef CONSTANT_ALIGNMENT
1900 align = CONSTANT_ALIGNMENT (t, align);
1904 /* If this is a field reference and not a bit-field, record it. */
1905 /* ??? There is some information that can be gleened from bit-fields,
1906 such as the word offset in the structure that might be modified.
1907 But skip it for now. */
1908 else if (TREE_CODE (t) == COMPONENT_REF
1909 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1911 expr = component_ref_for_mem_expr (t);
1912 offset = const0_rtx;
1913 apply_bitpos = bitpos;
1914 /* ??? Any reason the field size would be different than
1915 the size we got from the type? */
1918 /* If this is an array reference, look for an outer field reference. */
1919 else if (TREE_CODE (t) == ARRAY_REF)
1921 tree off_tree = size_zero_node;
1922 /* We can't modify t, because we use it at the end of the
1928 tree index = TREE_OPERAND (t2, 1);
1929 tree array = TREE_OPERAND (t2, 0);
1930 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1931 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1932 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1934 /* We assume all arrays have sizes that are a multiple of a byte.
1935 First subtract the lower bound, if any, in the type of the
1936 index, then convert to sizetype and multiply by the size of the
1938 if (low_bound != 0 && ! integer_zerop (low_bound))
1939 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1942 /* If the index has a self-referential type, pass it to a
1943 WITH_RECORD_EXPR; if the component size is, pass our
1944 component to one. */
1945 if (CONTAINS_PLACEHOLDER_P (index))
1946 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1947 if (CONTAINS_PLACEHOLDER_P (unit_size))
1948 unit_size = build (WITH_RECORD_EXPR, sizetype,
1952 = fold (build (PLUS_EXPR, sizetype,
1953 fold (build (MULT_EXPR, sizetype,
1957 t2 = TREE_OPERAND (t2, 0);
1959 while (TREE_CODE (t2) == ARRAY_REF);
1965 if (host_integerp (off_tree, 1))
1967 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1968 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1969 align = DECL_ALIGN (t2);
1970 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1972 offset = GEN_INT (ioff);
1973 apply_bitpos = bitpos;
1976 else if (TREE_CODE (t2) == COMPONENT_REF)
1978 expr = component_ref_for_mem_expr (t2);
1979 if (host_integerp (off_tree, 1))
1981 offset = GEN_INT (tree_low_cst (off_tree, 1));
1982 apply_bitpos = bitpos;
1984 /* ??? Any reason the field size would be different than
1985 the size we got from the type? */
1987 else if (flag_argument_noalias > 1
1988 && TREE_CODE (t2) == INDIRECT_REF
1989 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1996 /* If this is a Fortran indirect argument reference, record the
1998 else if (flag_argument_noalias > 1
1999 && TREE_CODE (t) == INDIRECT_REF
2000 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2007 /* If we modified OFFSET based on T, then subtract the outstanding
2008 bit position offset. Similarly, increase the size of the accessed
2009 object to contain the negative offset. */
2012 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
2014 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
2017 /* Now set the attributes we computed above. */
2019 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
2021 /* If this is already known to be a scalar or aggregate, we are done. */
2022 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
2025 /* If it is a reference into an aggregate, this is part of an aggregate.
2026 Otherwise we don't know. */
2027 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
2028 || TREE_CODE (t) == ARRAY_RANGE_REF
2029 || TREE_CODE (t) == BIT_FIELD_REF)
2030 MEM_IN_STRUCT_P (ref) = 1;
2034 set_mem_attributes (rtx ref, tree t, int objectp)
2036 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2039 /* Set the decl for MEM to DECL. */
2042 set_mem_attrs_from_reg (rtx mem, rtx reg)
2045 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
2046 GEN_INT (REG_OFFSET (reg)),
2047 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2050 /* Set the alias set of MEM to SET. */
2053 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
2055 #ifdef ENABLE_CHECKING
2056 /* If the new and old alias sets don't conflict, something is wrong. */
2057 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
2061 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
2062 MEM_SIZE (mem), MEM_ALIGN (mem),
2066 /* Set the alignment of MEM to ALIGN bits. */
2069 set_mem_align (rtx mem, unsigned int align)
2071 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2072 MEM_OFFSET (mem), MEM_SIZE (mem), align,
2076 /* Set the expr for MEM to EXPR. */
2079 set_mem_expr (rtx mem, tree expr)
2082 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
2083 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2086 /* Set the offset of MEM to OFFSET. */
2089 set_mem_offset (rtx mem, rtx offset)
2091 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2092 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
2096 /* Set the size of MEM to SIZE. */
2099 set_mem_size (rtx mem, rtx size)
2101 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2102 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
2106 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2107 and its address changed to ADDR. (VOIDmode means don't change the mode.
2108 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2109 returned memory location is required to be valid. The memory
2110 attributes are not changed. */
2113 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
2117 if (GET_CODE (memref) != MEM)
2119 if (mode == VOIDmode)
2120 mode = GET_MODE (memref);
2122 addr = XEXP (memref, 0);
2126 if (reload_in_progress || reload_completed)
2128 if (! memory_address_p (mode, addr))
2132 addr = memory_address (mode, addr);
2135 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2138 new = gen_rtx_MEM (mode, addr);
2139 MEM_COPY_ATTRIBUTES (new, memref);
2143 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2144 way we are changing MEMREF, so we only preserve the alias set. */
2147 change_address (rtx memref, enum machine_mode mode, rtx addr)
2149 rtx new = change_address_1 (memref, mode, addr, 1);
2150 enum machine_mode mmode = GET_MODE (new);
2153 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2154 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2155 (mmode == BLKmode ? BITS_PER_UNIT
2156 : GET_MODE_ALIGNMENT (mmode)),
2162 /* Return a memory reference like MEMREF, but with its mode changed
2163 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2164 nonzero, the memory address is forced to be valid.
2165 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2166 and caller is responsible for adjusting MEMREF base register. */
2169 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2170 int validate, int adjust)
2172 rtx addr = XEXP (memref, 0);
2174 rtx memoffset = MEM_OFFSET (memref);
2176 unsigned int memalign = MEM_ALIGN (memref);
2178 /* ??? Prefer to create garbage instead of creating shared rtl.
2179 This may happen even if offset is nonzero -- consider
2180 (plus (plus reg reg) const_int) -- so do this always. */
2181 addr = copy_rtx (addr);
2185 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2186 object, we can merge it into the LO_SUM. */
2187 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2189 && (unsigned HOST_WIDE_INT) offset
2190 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2191 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2192 plus_constant (XEXP (addr, 1), offset));
2194 addr = plus_constant (addr, offset);
2197 new = change_address_1 (memref, mode, addr, validate);
2199 /* Compute the new values of the memory attributes due to this adjustment.
2200 We add the offsets and update the alignment. */
2202 memoffset = GEN_INT (offset + INTVAL (memoffset));
2204 /* Compute the new alignment by taking the MIN of the alignment and the
2205 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2210 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2212 /* We can compute the size in a number of ways. */
2213 if (GET_MODE (new) != BLKmode)
2214 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2215 else if (MEM_SIZE (memref))
2216 size = plus_constant (MEM_SIZE (memref), -offset);
2218 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2219 memoffset, size, memalign, GET_MODE (new));
2221 /* At some point, we should validate that this offset is within the object,
2222 if all the appropriate values are known. */
2226 /* Return a memory reference like MEMREF, but with its mode changed
2227 to MODE and its address changed to ADDR, which is assumed to be
2228 MEMREF offseted by OFFSET bytes. If VALIDATE is
2229 nonzero, the memory address is forced to be valid. */
2232 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2233 HOST_WIDE_INT offset, int validate)
2235 memref = change_address_1 (memref, VOIDmode, addr, validate);
2236 return adjust_address_1 (memref, mode, offset, validate, 0);
2239 /* Return a memory reference like MEMREF, but whose address is changed by
2240 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2241 known to be in OFFSET (possibly 1). */
2244 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2246 rtx new, addr = XEXP (memref, 0);
2248 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2250 /* At this point we don't know _why_ the address is invalid. It
2251 could have secondary memory references, multiplies or anything.
2253 However, if we did go and rearrange things, we can wind up not
2254 being able to recognize the magic around pic_offset_table_rtx.
2255 This stuff is fragile, and is yet another example of why it is
2256 bad to expose PIC machinery too early. */
2257 if (! memory_address_p (GET_MODE (memref), new)
2258 && GET_CODE (addr) == PLUS
2259 && XEXP (addr, 0) == pic_offset_table_rtx)
2261 addr = force_reg (GET_MODE (addr), addr);
2262 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2265 update_temp_slot_address (XEXP (memref, 0), new);
2266 new = change_address_1 (memref, VOIDmode, new, 1);
2268 /* Update the alignment to reflect the offset. Reset the offset, which
2271 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2272 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2277 /* Return a memory reference like MEMREF, but with its address changed to
2278 ADDR. The caller is asserting that the actual piece of memory pointed
2279 to is the same, just the form of the address is being changed, such as
2280 by putting something into a register. */
2283 replace_equiv_address (rtx memref, rtx addr)
2285 /* change_address_1 copies the memory attribute structure without change
2286 and that's exactly what we want here. */
2287 update_temp_slot_address (XEXP (memref, 0), addr);
2288 return change_address_1 (memref, VOIDmode, addr, 1);
2291 /* Likewise, but the reference is not required to be valid. */
2294 replace_equiv_address_nv (rtx memref, rtx addr)
2296 return change_address_1 (memref, VOIDmode, addr, 0);
2299 /* Return a memory reference like MEMREF, but with its mode widened to
2300 MODE and offset by OFFSET. This would be used by targets that e.g.
2301 cannot issue QImode memory operations and have to use SImode memory
2302 operations plus masking logic. */
2305 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2307 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2308 tree expr = MEM_EXPR (new);
2309 rtx memoffset = MEM_OFFSET (new);
2310 unsigned int size = GET_MODE_SIZE (mode);
2312 /* If we don't know what offset we were at within the expression, then
2313 we can't know if we've overstepped the bounds. */
2319 if (TREE_CODE (expr) == COMPONENT_REF)
2321 tree field = TREE_OPERAND (expr, 1);
2323 if (! DECL_SIZE_UNIT (field))
2329 /* Is the field at least as large as the access? If so, ok,
2330 otherwise strip back to the containing structure. */
2331 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2332 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2333 && INTVAL (memoffset) >= 0)
2336 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2342 expr = TREE_OPERAND (expr, 0);
2343 memoffset = (GEN_INT (INTVAL (memoffset)
2344 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2345 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2348 /* Similarly for the decl. */
2349 else if (DECL_P (expr)
2350 && DECL_SIZE_UNIT (expr)
2351 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2352 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2353 && (! memoffset || INTVAL (memoffset) >= 0))
2357 /* The widened memory access overflows the expression, which means
2358 that it could alias another expression. Zap it. */
2365 memoffset = NULL_RTX;
2367 /* The widened memory may alias other stuff, so zap the alias set. */
2368 /* ??? Maybe use get_alias_set on any remaining expression. */
2370 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2371 MEM_ALIGN (new), mode);
2376 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2379 gen_label_rtx (void)
2381 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2382 NULL, label_num++, NULL);
2385 /* For procedure integration. */
2387 /* Install new pointers to the first and last insns in the chain.
2388 Also, set cur_insn_uid to one higher than the last in use.
2389 Used for an inline-procedure after copying the insn chain. */
2392 set_new_first_and_last_insn (rtx first, rtx last)
2400 for (insn = first; insn; insn = NEXT_INSN (insn))
2401 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2406 /* Set the range of label numbers found in the current function.
2407 This is used when belatedly compiling an inline function. */
2410 set_new_first_and_last_label_num (int first, int last)
2412 base_label_num = label_num;
2413 first_label_num = first;
2414 last_label_num = last;
2417 /* Set the last label number found in the current function.
2418 This is used when belatedly compiling an inline function. */
2421 set_new_last_label_num (int last)
2423 base_label_num = label_num;
2424 last_label_num = last;
2427 /* Restore all variables describing the current status from the structure *P.
2428 This is used after a nested function. */
2431 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2436 /* Go through all the RTL insn bodies and copy any invalid shared
2437 structure. This routine should only be called once. */
2440 unshare_all_rtl (tree fndecl, rtx insn)
2444 /* Make sure that virtual parameters are not shared. */
2445 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2446 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2448 /* Make sure that virtual stack slots are not shared. */
2449 unshare_all_decls (DECL_INITIAL (fndecl));
2451 /* Unshare just about everything else. */
2452 unshare_all_rtl_in_chain (insn);
2454 /* Make sure the addresses of stack slots found outside the insn chain
2455 (such as, in DECL_RTL of a variable) are not shared
2456 with the insn chain.
2458 This special care is necessary when the stack slot MEM does not
2459 actually appear in the insn chain. If it does appear, its address
2460 is unshared from all else at that point. */
2461 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2464 /* Go through all the RTL insn bodies and copy any invalid shared
2465 structure, again. This is a fairly expensive thing to do so it
2466 should be done sparingly. */
2469 unshare_all_rtl_again (rtx insn)
2474 for (p = insn; p; p = NEXT_INSN (p))
2477 reset_used_flags (PATTERN (p));
2478 reset_used_flags (REG_NOTES (p));
2479 reset_used_flags (LOG_LINKS (p));
2482 /* Make sure that virtual stack slots are not shared. */
2483 reset_used_decls (DECL_INITIAL (cfun->decl));
2485 /* Make sure that virtual parameters are not shared. */
2486 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2487 reset_used_flags (DECL_RTL (decl));
2489 reset_used_flags (stack_slot_list);
2491 unshare_all_rtl (cfun->decl, insn);
2494 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2495 Recursively does the same for subexpressions. */
2498 verify_rtx_sharing (rtx orig, rtx insn)
2503 const char *format_ptr;
2508 code = GET_CODE (x);
2510 /* These types may be freely shared. */
2525 /* SCRATCH must be shared because they represent distinct values. */
2529 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2530 a LABEL_REF, it isn't sharable. */
2531 if (GET_CODE (XEXP (x, 0)) == PLUS
2532 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2533 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2538 /* A MEM is allowed to be shared if its address is constant. */
2539 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2540 || reload_completed || reload_in_progress)
2549 /* This rtx may not be shared. If it has already been seen,
2550 replace it with a copy of itself. */
2552 if (RTX_FLAG (x, used))
2554 error ("Invalid rtl sharing found in the insn");
2556 error ("Shared rtx");
2560 RTX_FLAG (x, used) = 1;
2562 /* Now scan the subexpressions recursively. */
2564 format_ptr = GET_RTX_FORMAT (code);
2566 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2568 switch (*format_ptr++)
2571 verify_rtx_sharing (XEXP (x, i), insn);
2575 if (XVEC (x, i) != NULL)
2578 int len = XVECLEN (x, i);
2580 for (j = 0; j < len; j++)
2582 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2583 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2584 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2585 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2587 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2596 /* Go through all the RTL insn bodies and chec that there is no inexpected
2597 sharing in between the subexpressions. */
2600 verify_rtl_sharing (void)
2604 for (p = get_insns (); p; p = NEXT_INSN (p))
2607 reset_used_flags (PATTERN (p));
2608 reset_used_flags (REG_NOTES (p));
2609 reset_used_flags (LOG_LINKS (p));
2612 for (p = get_insns (); p; p = NEXT_INSN (p))
2615 verify_rtx_sharing (PATTERN (p), p);
2616 verify_rtx_sharing (REG_NOTES (p), p);
2617 verify_rtx_sharing (LOG_LINKS (p), p);
2621 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2622 Assumes the mark bits are cleared at entry. */
2625 unshare_all_rtl_in_chain (rtx insn)
2627 for (; insn; insn = NEXT_INSN (insn))
2630 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2631 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2632 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2636 /* Go through all virtual stack slots of a function and copy any
2637 shared structure. */
2639 unshare_all_decls (tree blk)
2643 /* Copy shared decls. */
2644 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2645 if (DECL_RTL_SET_P (t))
2646 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2648 /* Now process sub-blocks. */
2649 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2650 unshare_all_decls (t);
2653 /* Go through all virtual stack slots of a function and mark them as
2656 reset_used_decls (tree blk)
2661 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2662 if (DECL_RTL_SET_P (t))
2663 reset_used_flags (DECL_RTL (t));
2665 /* Now process sub-blocks. */
2666 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2667 reset_used_decls (t);
2670 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2671 placed in the result directly, rather than being copied. MAY_SHARE is
2672 either a MEM of an EXPR_LIST of MEMs. */
2675 copy_most_rtx (rtx orig, rtx may_share)
2680 const char *format_ptr;
2682 if (orig == may_share
2683 || (GET_CODE (may_share) == EXPR_LIST
2684 && in_expr_list_p (may_share, orig)))
2687 code = GET_CODE (orig);
2705 copy = rtx_alloc (code);
2706 PUT_MODE (copy, GET_MODE (orig));
2707 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2708 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2709 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2710 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2711 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2713 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2715 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2717 switch (*format_ptr++)
2720 XEXP (copy, i) = XEXP (orig, i);
2721 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2722 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2726 XEXP (copy, i) = XEXP (orig, i);
2731 XVEC (copy, i) = XVEC (orig, i);
2732 if (XVEC (orig, i) != NULL)
2734 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2735 for (j = 0; j < XVECLEN (copy, i); j++)
2736 XVECEXP (copy, i, j)
2737 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2742 XWINT (copy, i) = XWINT (orig, i);
2747 XINT (copy, i) = XINT (orig, i);
2751 XTREE (copy, i) = XTREE (orig, i);
2756 XSTR (copy, i) = XSTR (orig, i);
2760 X0ANY (copy, i) = X0ANY (orig, i);
2770 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2771 Recursively does the same for subexpressions. */
2774 copy_rtx_if_shared (rtx orig)
2779 const char *format_ptr;
2785 code = GET_CODE (x);
2787 /* These types may be freely shared. */
2802 /* SCRATCH must be shared because they represent distinct values. */
2806 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2807 a LABEL_REF, it isn't sharable. */
2808 if (GET_CODE (XEXP (x, 0)) == PLUS
2809 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2810 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2819 /* The chain of insns is not being copied. */
2826 /* This rtx may not be shared. If it has already been seen,
2827 replace it with a copy of itself. */
2829 if (RTX_FLAG (x, used))
2833 copy = rtx_alloc (code);
2834 memcpy (copy, x, RTX_SIZE (code));
2838 RTX_FLAG (x, used) = 1;
2840 /* Now scan the subexpressions recursively.
2841 We can store any replaced subexpressions directly into X
2842 since we know X is not shared! Any vectors in X
2843 must be copied if X was copied. */
2845 format_ptr = GET_RTX_FORMAT (code);
2847 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2849 switch (*format_ptr++)
2852 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2856 if (XVEC (x, i) != NULL)
2859 int len = XVECLEN (x, i);
2861 if (copied && len > 0)
2862 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2863 for (j = 0; j < len; j++)
2864 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2872 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2873 to look for shared sub-parts. */
2876 reset_used_flags (rtx x)
2880 const char *format_ptr;
2885 code = GET_CODE (x);
2887 /* These types may be freely shared so we needn't do any resetting
2909 /* The chain of insns is not being copied. */
2916 RTX_FLAG (x, used) = 0;
2918 format_ptr = GET_RTX_FORMAT (code);
2919 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2921 switch (*format_ptr++)
2924 reset_used_flags (XEXP (x, i));
2928 for (j = 0; j < XVECLEN (x, i); j++)
2929 reset_used_flags (XVECEXP (x, i, j));
2935 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2936 to look for shared sub-parts. */
2939 set_used_flags (rtx x)
2943 const char *format_ptr;
2948 code = GET_CODE (x);
2950 /* These types may be freely shared so we needn't do any resetting
2972 /* The chain of insns is not being copied. */
2979 RTX_FLAG (x, used) = 1;
2981 format_ptr = GET_RTX_FORMAT (code);
2982 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2984 switch (*format_ptr++)
2987 set_used_flags (XEXP (x, i));
2991 for (j = 0; j < XVECLEN (x, i); j++)
2992 set_used_flags (XVECEXP (x, i, j));
2998 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2999 Return X or the rtx for the pseudo reg the value of X was copied into.
3000 OTHER must be valid as a SET_DEST. */
3003 make_safe_from (rtx x, rtx other)
3006 switch (GET_CODE (other))
3009 other = SUBREG_REG (other);
3011 case STRICT_LOW_PART:
3014 other = XEXP (other, 0);
3020 if ((GET_CODE (other) == MEM
3022 && GET_CODE (x) != REG
3023 && GET_CODE (x) != SUBREG)
3024 || (GET_CODE (other) == REG
3025 && (REGNO (other) < FIRST_PSEUDO_REGISTER
3026 || reg_mentioned_p (other, x))))
3028 rtx temp = gen_reg_rtx (GET_MODE (x));
3029 emit_move_insn (temp, x);
3035 /* Emission of insns (adding them to the doubly-linked list). */
3037 /* Return the first insn of the current sequence or current function. */
3045 /* Specify a new insn as the first in the chain. */
3048 set_first_insn (rtx insn)
3050 if (PREV_INSN (insn) != 0)
3055 /* Return the last insn emitted in current sequence or current function. */
3058 get_last_insn (void)
3063 /* Specify a new insn as the last in the chain. */
3066 set_last_insn (rtx insn)
3068 if (NEXT_INSN (insn) != 0)
3073 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3076 get_last_insn_anywhere (void)
3078 struct sequence_stack *stack;
3081 for (stack = seq_stack; stack; stack = stack->next)
3082 if (stack->last != 0)
3087 /* Return the first nonnote insn emitted in current sequence or current
3088 function. This routine looks inside SEQUENCEs. */
3091 get_first_nonnote_insn (void)
3093 rtx insn = first_insn;
3097 insn = next_insn (insn);
3098 if (insn == 0 || GET_CODE (insn) != NOTE)
3105 /* Return the last nonnote insn emitted in current sequence or current
3106 function. This routine looks inside SEQUENCEs. */
3109 get_last_nonnote_insn (void)
3111 rtx insn = last_insn;
3115 insn = previous_insn (insn);
3116 if (insn == 0 || GET_CODE (insn) != NOTE)
3123 /* Return a number larger than any instruction's uid in this function. */
3128 return cur_insn_uid;
3131 /* Renumber instructions so that no instruction UIDs are wasted. */
3134 renumber_insns (FILE *stream)
3138 /* If we're not supposed to renumber instructions, don't. */
3139 if (!flag_renumber_insns)
3142 /* If there aren't that many instructions, then it's not really
3143 worth renumbering them. */
3144 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
3149 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3152 fprintf (stream, "Renumbering insn %d to %d\n",
3153 INSN_UID (insn), cur_insn_uid);
3154 INSN_UID (insn) = cur_insn_uid++;
3158 /* Return the next insn. If it is a SEQUENCE, return the first insn
3162 next_insn (rtx insn)
3166 insn = NEXT_INSN (insn);
3167 if (insn && GET_CODE (insn) == INSN
3168 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3169 insn = XVECEXP (PATTERN (insn), 0, 0);
3175 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3179 previous_insn (rtx insn)
3183 insn = PREV_INSN (insn);
3184 if (insn && GET_CODE (insn) == INSN
3185 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3186 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3192 /* Return the next insn after INSN that is not a NOTE. This routine does not
3193 look inside SEQUENCEs. */
3196 next_nonnote_insn (rtx insn)
3200 insn = NEXT_INSN (insn);
3201 if (insn == 0 || GET_CODE (insn) != NOTE)
3208 /* Return the previous insn before INSN that is not a NOTE. This routine does
3209 not look inside SEQUENCEs. */
3212 prev_nonnote_insn (rtx insn)
3216 insn = PREV_INSN (insn);
3217 if (insn == 0 || GET_CODE (insn) != NOTE)
3224 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3225 or 0, if there is none. This routine does not look inside
3229 next_real_insn (rtx insn)
3233 insn = NEXT_INSN (insn);
3234 if (insn == 0 || GET_CODE (insn) == INSN
3235 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3242 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3243 or 0, if there is none. This routine does not look inside
3247 prev_real_insn (rtx insn)
3251 insn = PREV_INSN (insn);
3252 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3253 || GET_CODE (insn) == JUMP_INSN)
3260 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3261 This routine does not look inside SEQUENCEs. */
3264 last_call_insn (void)
3268 for (insn = get_last_insn ();
3269 insn && GET_CODE (insn) != CALL_INSN;
3270 insn = PREV_INSN (insn))
3276 /* Find the next insn after INSN that really does something. This routine
3277 does not look inside SEQUENCEs. Until reload has completed, this is the
3278 same as next_real_insn. */
3281 active_insn_p (rtx insn)
3283 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3284 || (GET_CODE (insn) == INSN
3285 && (! reload_completed
3286 || (GET_CODE (PATTERN (insn)) != USE
3287 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3291 next_active_insn (rtx insn)
3295 insn = NEXT_INSN (insn);
3296 if (insn == 0 || active_insn_p (insn))
3303 /* Find the last insn before INSN that really does something. This routine
3304 does not look inside SEQUENCEs. Until reload has completed, this is the
3305 same as prev_real_insn. */
3308 prev_active_insn (rtx insn)
3312 insn = PREV_INSN (insn);
3313 if (insn == 0 || active_insn_p (insn))
3320 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3323 next_label (rtx insn)
3327 insn = NEXT_INSN (insn);
3328 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3335 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3338 prev_label (rtx insn)
3342 insn = PREV_INSN (insn);
3343 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3351 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3352 and REG_CC_USER notes so we can find it. */
3355 link_cc0_insns (rtx insn)
3357 rtx user = next_nonnote_insn (insn);
3359 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3360 user = XVECEXP (PATTERN (user), 0, 0);
3362 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3364 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3367 /* Return the next insn that uses CC0 after INSN, which is assumed to
3368 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3369 applied to the result of this function should yield INSN).
3371 Normally, this is simply the next insn. However, if a REG_CC_USER note
3372 is present, it contains the insn that uses CC0.
3374 Return 0 if we can't find the insn. */
3377 next_cc0_user (rtx insn)
3379 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3382 return XEXP (note, 0);
3384 insn = next_nonnote_insn (insn);
3385 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3386 insn = XVECEXP (PATTERN (insn), 0, 0);
3388 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3394 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3395 note, it is the previous insn. */
3398 prev_cc0_setter (rtx insn)
3400 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3403 return XEXP (note, 0);
3405 insn = prev_nonnote_insn (insn);
3406 if (! sets_cc0_p (PATTERN (insn)))
3413 /* Increment the label uses for all labels present in rtx. */
3416 mark_label_nuses (rtx x)
3422 code = GET_CODE (x);
3423 if (code == LABEL_REF)
3424 LABEL_NUSES (XEXP (x, 0))++;
3426 fmt = GET_RTX_FORMAT (code);
3427 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3430 mark_label_nuses (XEXP (x, i));
3431 else if (fmt[i] == 'E')
3432 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3433 mark_label_nuses (XVECEXP (x, i, j));
3438 /* Try splitting insns that can be split for better scheduling.
3439 PAT is the pattern which might split.
3440 TRIAL is the insn providing PAT.
3441 LAST is nonzero if we should return the last insn of the sequence produced.
3443 If this routine succeeds in splitting, it returns the first or last
3444 replacement insn depending on the value of LAST. Otherwise, it
3445 returns TRIAL. If the insn to be returned can be split, it will be. */
3448 try_split (rtx pat, rtx trial, int last)
3450 rtx before = PREV_INSN (trial);
3451 rtx after = NEXT_INSN (trial);
3452 int has_barrier = 0;
3456 rtx insn_last, insn;
3459 if (any_condjump_p (trial)
3460 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3461 split_branch_probability = INTVAL (XEXP (note, 0));
3462 probability = split_branch_probability;
3464 seq = split_insns (pat, trial);
3466 split_branch_probability = -1;
3468 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3469 We may need to handle this specially. */
3470 if (after && GET_CODE (after) == BARRIER)
3473 after = NEXT_INSN (after);
3479 /* Avoid infinite loop if any insn of the result matches
3480 the original pattern. */
3484 if (INSN_P (insn_last)
3485 && rtx_equal_p (PATTERN (insn_last), pat))
3487 if (!NEXT_INSN (insn_last))
3489 insn_last = NEXT_INSN (insn_last);
3493 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3495 if (GET_CODE (insn) == JUMP_INSN)
3497 mark_jump_label (PATTERN (insn), insn, 0);
3499 if (probability != -1
3500 && any_condjump_p (insn)
3501 && !find_reg_note (insn, REG_BR_PROB, 0))
3503 /* We can preserve the REG_BR_PROB notes only if exactly
3504 one jump is created, otherwise the machine description
3505 is responsible for this step using
3506 split_branch_probability variable. */
3510 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3511 GEN_INT (probability),
3517 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3518 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3519 if (GET_CODE (trial) == CALL_INSN)
3521 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3522 if (GET_CODE (insn) == CALL_INSN)
3524 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3527 *p = CALL_INSN_FUNCTION_USAGE (trial);
3528 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3532 /* Copy notes, particularly those related to the CFG. */
3533 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3535 switch (REG_NOTE_KIND (note))
3539 while (insn != NULL_RTX)
3541 if (GET_CODE (insn) == CALL_INSN
3542 || (flag_non_call_exceptions
3543 && may_trap_p (PATTERN (insn))))
3545 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3548 insn = PREV_INSN (insn);
3554 case REG_ALWAYS_RETURN:
3556 while (insn != NULL_RTX)
3558 if (GET_CODE (insn) == CALL_INSN)
3560 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3563 insn = PREV_INSN (insn);
3567 case REG_NON_LOCAL_GOTO:
3569 while (insn != NULL_RTX)
3571 if (GET_CODE (insn) == JUMP_INSN)
3573 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3576 insn = PREV_INSN (insn);
3585 /* If there are LABELS inside the split insns increment the
3586 usage count so we don't delete the label. */
3587 if (GET_CODE (trial) == INSN)
3590 while (insn != NULL_RTX)
3592 if (GET_CODE (insn) == INSN)
3593 mark_label_nuses (PATTERN (insn));
3595 insn = PREV_INSN (insn);
3599 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3601 delete_insn (trial);
3603 emit_barrier_after (tem);
3605 /* Recursively call try_split for each new insn created; by the
3606 time control returns here that insn will be fully split, so
3607 set LAST and continue from the insn after the one returned.
3608 We can't use next_active_insn here since AFTER may be a note.
3609 Ignore deleted insns, which can be occur if not optimizing. */
3610 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3611 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3612 tem = try_split (PATTERN (tem), tem, 1);
3614 /* Return either the first or the last insn, depending on which was
3617 ? (after ? PREV_INSN (after) : last_insn)
3618 : NEXT_INSN (before);
3621 /* Make and return an INSN rtx, initializing all its slots.
3622 Store PATTERN in the pattern slots. */
3625 make_insn_raw (rtx pattern)
3629 insn = rtx_alloc (INSN);
3631 INSN_UID (insn) = cur_insn_uid++;
3632 PATTERN (insn) = pattern;
3633 INSN_CODE (insn) = -1;
3634 LOG_LINKS (insn) = NULL;
3635 REG_NOTES (insn) = NULL;
3636 INSN_LOCATOR (insn) = 0;
3637 BLOCK_FOR_INSN (insn) = NULL;
3639 #ifdef ENABLE_RTL_CHECKING
3642 && (returnjump_p (insn)
3643 || (GET_CODE (insn) == SET
3644 && SET_DEST (insn) == pc_rtx)))
3646 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3654 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3657 make_jump_insn_raw (rtx pattern)
3661 insn = rtx_alloc (JUMP_INSN);
3662 INSN_UID (insn) = cur_insn_uid++;
3664 PATTERN (insn) = pattern;
3665 INSN_CODE (insn) = -1;
3666 LOG_LINKS (insn) = NULL;
3667 REG_NOTES (insn) = NULL;
3668 JUMP_LABEL (insn) = NULL;
3669 INSN_LOCATOR (insn) = 0;
3670 BLOCK_FOR_INSN (insn) = NULL;
3675 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3678 make_call_insn_raw (rtx pattern)
3682 insn = rtx_alloc (CALL_INSN);
3683 INSN_UID (insn) = cur_insn_uid++;
3685 PATTERN (insn) = pattern;
3686 INSN_CODE (insn) = -1;
3687 LOG_LINKS (insn) = NULL;
3688 REG_NOTES (insn) = NULL;
3689 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3690 INSN_LOCATOR (insn) = 0;
3691 BLOCK_FOR_INSN (insn) = NULL;
3696 /* Add INSN to the end of the doubly-linked list.
3697 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3702 PREV_INSN (insn) = last_insn;
3703 NEXT_INSN (insn) = 0;
3705 if (NULL != last_insn)
3706 NEXT_INSN (last_insn) = insn;
3708 if (NULL == first_insn)
3714 /* Add INSN into the doubly-linked list after insn AFTER. This and
3715 the next should be the only functions called to insert an insn once
3716 delay slots have been filled since only they know how to update a
3720 add_insn_after (rtx insn, rtx after)
3722 rtx next = NEXT_INSN (after);
3725 if (optimize && INSN_DELETED_P (after))
3728 NEXT_INSN (insn) = next;
3729 PREV_INSN (insn) = after;
3733 PREV_INSN (next) = insn;
3734 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3735 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3737 else if (last_insn == after)
3741 struct sequence_stack *stack = seq_stack;
3742 /* Scan all pending sequences too. */
3743 for (; stack; stack = stack->next)
3744 if (after == stack->last)
3754 if (GET_CODE (after) != BARRIER
3755 && GET_CODE (insn) != BARRIER
3756 && (bb = BLOCK_FOR_INSN (after)))
3758 set_block_for_insn (insn, bb);
3760 bb->flags |= BB_DIRTY;
3761 /* Should not happen as first in the BB is always
3762 either NOTE or LABEL. */
3763 if (bb->end == after
3764 /* Avoid clobbering of structure when creating new BB. */
3765 && GET_CODE (insn) != BARRIER
3766 && (GET_CODE (insn) != NOTE
3767 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3771 NEXT_INSN (after) = insn;
3772 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3774 rtx sequence = PATTERN (after);
3775 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3779 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3780 the previous should be the only functions called to insert an insn once
3781 delay slots have been filled since only they know how to update a
3785 add_insn_before (rtx insn, rtx before)
3787 rtx prev = PREV_INSN (before);
3790 if (optimize && INSN_DELETED_P (before))
3793 PREV_INSN (insn) = prev;
3794 NEXT_INSN (insn) = before;
3798 NEXT_INSN (prev) = insn;
3799 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3801 rtx sequence = PATTERN (prev);
3802 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3805 else if (first_insn == before)
3809 struct sequence_stack *stack = seq_stack;
3810 /* Scan all pending sequences too. */
3811 for (; stack; stack = stack->next)
3812 if (before == stack->first)
3814 stack->first = insn;
3822 if (GET_CODE (before) != BARRIER
3823 && GET_CODE (insn) != BARRIER
3824 && (bb = BLOCK_FOR_INSN (before)))
3826 set_block_for_insn (insn, bb);
3828 bb->flags |= BB_DIRTY;
3829 /* Should not happen as first in the BB is always
3830 either NOTE or LABEl. */
3831 if (bb->head == insn
3832 /* Avoid clobbering of structure when creating new BB. */
3833 && GET_CODE (insn) != BARRIER
3834 && (GET_CODE (insn) != NOTE
3835 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3839 PREV_INSN (before) = insn;
3840 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3841 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3844 /* Remove an insn from its doubly-linked list. This function knows how
3845 to handle sequences. */
3847 remove_insn (rtx insn)
3849 rtx next = NEXT_INSN (insn);
3850 rtx prev = PREV_INSN (insn);
3855 NEXT_INSN (prev) = next;
3856 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3858 rtx sequence = PATTERN (prev);
3859 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3862 else if (first_insn == insn)
3866 struct sequence_stack *stack = seq_stack;
3867 /* Scan all pending sequences too. */
3868 for (; stack; stack = stack->next)
3869 if (insn == stack->first)
3871 stack->first = next;
3881 PREV_INSN (next) = prev;
3882 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3883 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3885 else if (last_insn == insn)
3889 struct sequence_stack *stack = seq_stack;
3890 /* Scan all pending sequences too. */
3891 for (; stack; stack = stack->next)
3892 if (insn == stack->last)
3901 if (GET_CODE (insn) != BARRIER
3902 && (bb = BLOCK_FOR_INSN (insn)))
3905 bb->flags |= BB_DIRTY;
3906 if (bb->head == insn)
3908 /* Never ever delete the basic block note without deleting whole
3910 if (GET_CODE (insn) == NOTE)
3914 if (bb->end == insn)
3919 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3922 add_function_usage_to (rtx call_insn, rtx call_fusage)
3924 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3927 /* Put the register usage information on the CALL. If there is already
3928 some usage information, put ours at the end. */
3929 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3933 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3934 link = XEXP (link, 1))
3937 XEXP (link, 1) = call_fusage;
3940 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3943 /* Delete all insns made since FROM.
3944 FROM becomes the new last instruction. */
3947 delete_insns_since (rtx from)
3952 NEXT_INSN (from) = 0;
3956 /* This function is deprecated, please use sequences instead.
3958 Move a consecutive bunch of insns to a different place in the chain.
3959 The insns to be moved are those between FROM and TO.
3960 They are moved to a new position after the insn AFTER.
3961 AFTER must not be FROM or TO or any insn in between.
3963 This function does not know about SEQUENCEs and hence should not be
3964 called after delay-slot filling has been done. */
3967 reorder_insns_nobb (rtx from, rtx to, rtx after)
3969 /* Splice this bunch out of where it is now. */
3970 if (PREV_INSN (from))
3971 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3973 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3974 if (last_insn == to)
3975 last_insn = PREV_INSN (from);
3976 if (first_insn == from)
3977 first_insn = NEXT_INSN (to);
3979 /* Make the new neighbors point to it and it to them. */
3980 if (NEXT_INSN (after))
3981 PREV_INSN (NEXT_INSN (after)) = to;
3983 NEXT_INSN (to) = NEXT_INSN (after);
3984 PREV_INSN (from) = after;
3985 NEXT_INSN (after) = from;
3986 if (after == last_insn)
3990 /* Same as function above, but take care to update BB boundaries. */
3992 reorder_insns (rtx from, rtx to, rtx after)
3994 rtx prev = PREV_INSN (from);
3995 basic_block bb, bb2;
3997 reorder_insns_nobb (from, to, after);
3999 if (GET_CODE (after) != BARRIER
4000 && (bb = BLOCK_FOR_INSN (after)))
4003 bb->flags |= BB_DIRTY;
4005 if (GET_CODE (from) != BARRIER
4006 && (bb2 = BLOCK_FOR_INSN (from)))
4010 bb2->flags |= BB_DIRTY;
4013 if (bb->end == after)
4016 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4017 set_block_for_insn (x, bb);
4021 /* Return the line note insn preceding INSN. */
4024 find_line_note (rtx insn)
4026 if (no_line_numbers)
4029 for (; insn; insn = PREV_INSN (insn))
4030 if (GET_CODE (insn) == NOTE
4031 && NOTE_LINE_NUMBER (insn) >= 0)
4037 /* Like reorder_insns, but inserts line notes to preserve the line numbers
4038 of the moved insns when debugging. This may insert a note between AFTER
4039 and FROM, and another one after TO. */
4042 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
4044 rtx from_line = find_line_note (from);
4045 rtx after_line = find_line_note (after);
4047 reorder_insns (from, to, after);
4049 if (from_line == after_line)
4053 emit_note_copy_after (from_line, after);
4055 emit_note_copy_after (after_line, to);
4058 /* Remove unnecessary notes from the instruction stream. */
4061 remove_unnecessary_notes (void)
4063 rtx block_stack = NULL_RTX;
4064 rtx eh_stack = NULL_RTX;
4069 /* We must not remove the first instruction in the function because
4070 the compiler depends on the first instruction being a note. */
4071 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
4073 /* Remember what's next. */
4074 next = NEXT_INSN (insn);
4076 /* We're only interested in notes. */
4077 if (GET_CODE (insn) != NOTE)
4080 switch (NOTE_LINE_NUMBER (insn))
4082 case NOTE_INSN_DELETED:
4083 case NOTE_INSN_LOOP_END_TOP_COND:
4087 case NOTE_INSN_EH_REGION_BEG:
4088 eh_stack = alloc_INSN_LIST (insn, eh_stack);
4091 case NOTE_INSN_EH_REGION_END:
4092 /* Too many end notes. */
4093 if (eh_stack == NULL_RTX)
4095 /* Mismatched nesting. */
4096 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
4099 eh_stack = XEXP (eh_stack, 1);
4100 free_INSN_LIST_node (tmp);
4103 case NOTE_INSN_BLOCK_BEG:
4104 /* By now, all notes indicating lexical blocks should have
4105 NOTE_BLOCK filled in. */
4106 if (NOTE_BLOCK (insn) == NULL_TREE)
4108 block_stack = alloc_INSN_LIST (insn, block_stack);
4111 case NOTE_INSN_BLOCK_END:
4112 /* Too many end notes. */
4113 if (block_stack == NULL_RTX)
4115 /* Mismatched nesting. */
4116 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
4119 block_stack = XEXP (block_stack, 1);
4120 free_INSN_LIST_node (tmp);
4122 /* Scan back to see if there are any non-note instructions
4123 between INSN and the beginning of this block. If not,
4124 then there is no PC range in the generated code that will
4125 actually be in this block, so there's no point in
4126 remembering the existence of the block. */
4127 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
4129 /* This block contains a real instruction. Note that we
4130 don't include labels; if the only thing in the block
4131 is a label, then there are still no PC values that
4132 lie within the block. */
4136 /* We're only interested in NOTEs. */
4137 if (GET_CODE (tmp) != NOTE)
4140 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
4142 /* We just verified that this BLOCK matches us with
4143 the block_stack check above. Never delete the
4144 BLOCK for the outermost scope of the function; we
4145 can refer to names from that scope even if the
4146 block notes are messed up. */
4147 if (! is_body_block (NOTE_BLOCK (insn))
4148 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
4155 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
4156 /* There's a nested block. We need to leave the
4157 current block in place since otherwise the debugger
4158 wouldn't be able to show symbols from our block in
4159 the nested block. */
4165 /* Too many begin notes. */
4166 if (block_stack || eh_stack)
4171 /* Emit insn(s) of given code and pattern
4172 at a specified place within the doubly-linked list.
4174 All of the emit_foo global entry points accept an object
4175 X which is either an insn list or a PATTERN of a single
4178 There are thus a few canonical ways to generate code and
4179 emit it at a specific place in the instruction stream. For
4180 example, consider the instruction named SPOT and the fact that
4181 we would like to emit some instructions before SPOT. We might
4185 ... emit the new instructions ...
4186 insns_head = get_insns ();
4189 emit_insn_before (insns_head, SPOT);
4191 It used to be common to generate SEQUENCE rtl instead, but that
4192 is a relic of the past which no longer occurs. The reason is that
4193 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4194 generated would almost certainly die right after it was created. */
4196 /* Make X be output before the instruction BEFORE. */
4199 emit_insn_before (rtx x, rtx before)
4204 #ifdef ENABLE_RTL_CHECKING
4205 if (before == NULL_RTX)
4212 switch (GET_CODE (x))
4223 rtx next = NEXT_INSN (insn);
4224 add_insn_before (insn, before);
4230 #ifdef ENABLE_RTL_CHECKING
4237 last = make_insn_raw (x);
4238 add_insn_before (last, before);
4245 /* Make an instruction with body X and code JUMP_INSN
4246 and output it before the instruction BEFORE. */
4249 emit_jump_insn_before (rtx x, rtx before)
4251 rtx insn, last = NULL_RTX;
4253 #ifdef ENABLE_RTL_CHECKING
4254 if (before == NULL_RTX)
4258 switch (GET_CODE (x))
4269 rtx next = NEXT_INSN (insn);
4270 add_insn_before (insn, before);
4276 #ifdef ENABLE_RTL_CHECKING
4283 last = make_jump_insn_raw (x);
4284 add_insn_before (last, before);
4291 /* Make an instruction with body X and code CALL_INSN
4292 and output it before the instruction BEFORE. */
4295 emit_call_insn_before (rtx x, rtx before)
4297 rtx last = NULL_RTX, insn;
4299 #ifdef ENABLE_RTL_CHECKING
4300 if (before == NULL_RTX)
4304 switch (GET_CODE (x))
4315 rtx next = NEXT_INSN (insn);
4316 add_insn_before (insn, before);
4322 #ifdef ENABLE_RTL_CHECKING
4329 last = make_call_insn_raw (x);
4330 add_insn_before (last, before);
4337 /* Make an insn of code BARRIER
4338 and output it before the insn BEFORE. */
4341 emit_barrier_before (rtx before)
4343 rtx insn = rtx_alloc (BARRIER);
4345 INSN_UID (insn) = cur_insn_uid++;
4347 add_insn_before (insn, before);
4351 /* Emit the label LABEL before the insn BEFORE. */
4354 emit_label_before (rtx label, rtx before)
4356 /* This can be called twice for the same label as a result of the
4357 confusion that follows a syntax error! So make it harmless. */
4358 if (INSN_UID (label) == 0)
4360 INSN_UID (label) = cur_insn_uid++;
4361 add_insn_before (label, before);
4367 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4370 emit_note_before (int subtype, rtx before)
4372 rtx note = rtx_alloc (NOTE);
4373 INSN_UID (note) = cur_insn_uid++;
4374 NOTE_SOURCE_FILE (note) = 0;
4375 NOTE_LINE_NUMBER (note) = subtype;
4376 BLOCK_FOR_INSN (note) = NULL;
4378 add_insn_before (note, before);
4382 /* Helper for emit_insn_after, handles lists of instructions
4385 static rtx emit_insn_after_1 (rtx, rtx);
4388 emit_insn_after_1 (rtx first, rtx after)
4394 if (GET_CODE (after) != BARRIER
4395 && (bb = BLOCK_FOR_INSN (after)))
4397 bb->flags |= BB_DIRTY;
4398 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4399 if (GET_CODE (last) != BARRIER)
4400 set_block_for_insn (last, bb);
4401 if (GET_CODE (last) != BARRIER)
4402 set_block_for_insn (last, bb);
4403 if (bb->end == after)
4407 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4410 after_after = NEXT_INSN (after);
4412 NEXT_INSN (after) = first;
4413 PREV_INSN (first) = after;
4414 NEXT_INSN (last) = after_after;
4416 PREV_INSN (after_after) = last;
4418 if (after == last_insn)
4423 /* Make X be output after the insn AFTER. */
4426 emit_insn_after (rtx x, rtx after)
4430 #ifdef ENABLE_RTL_CHECKING
4431 if (after == NULL_RTX)
4438 switch (GET_CODE (x))
4446 last = emit_insn_after_1 (x, after);
4449 #ifdef ENABLE_RTL_CHECKING
4456 last = make_insn_raw (x);
4457 add_insn_after (last, after);
4464 /* Similar to emit_insn_after, except that line notes are to be inserted so
4465 as to act as if this insn were at FROM. */
4468 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4470 rtx from_line = find_line_note (from);
4471 rtx after_line = find_line_note (after);
4472 rtx insn = emit_insn_after (x, after);
4475 emit_note_copy_after (from_line, after);
4478 emit_note_copy_after (after_line, insn);
4481 /* Make an insn of code JUMP_INSN with body X
4482 and output it after the insn AFTER. */
4485 emit_jump_insn_after (rtx x, rtx after)
4489 #ifdef ENABLE_RTL_CHECKING
4490 if (after == NULL_RTX)
4494 switch (GET_CODE (x))
4502 last = emit_insn_after_1 (x, after);
4505 #ifdef ENABLE_RTL_CHECKING
4512 last = make_jump_insn_raw (x);
4513 add_insn_after (last, after);
4520 /* Make an instruction with body X and code CALL_INSN
4521 and output it after the instruction AFTER. */
4524 emit_call_insn_after (rtx x, rtx after)
4528 #ifdef ENABLE_RTL_CHECKING
4529 if (after == NULL_RTX)
4533 switch (GET_CODE (x))
4541 last = emit_insn_after_1 (x, after);
4544 #ifdef ENABLE_RTL_CHECKING
4551 last = make_call_insn_raw (x);
4552 add_insn_after (last, after);
4559 /* Make an insn of code BARRIER
4560 and output it after the insn AFTER. */
4563 emit_barrier_after (rtx after)
4565 rtx insn = rtx_alloc (BARRIER);
4567 INSN_UID (insn) = cur_insn_uid++;
4569 add_insn_after (insn, after);
4573 /* Emit the label LABEL after the insn AFTER. */
4576 emit_label_after (rtx label, rtx after)
4578 /* This can be called twice for the same label
4579 as a result of the confusion that follows a syntax error!
4580 So make it harmless. */
4581 if (INSN_UID (label) == 0)
4583 INSN_UID (label) = cur_insn_uid++;
4584 add_insn_after (label, after);
4590 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4593 emit_note_after (int subtype, rtx after)
4595 rtx note = rtx_alloc (NOTE);
4596 INSN_UID (note) = cur_insn_uid++;
4597 NOTE_SOURCE_FILE (note) = 0;
4598 NOTE_LINE_NUMBER (note) = subtype;
4599 BLOCK_FOR_INSN (note) = NULL;
4600 add_insn_after (note, after);
4604 /* Emit a copy of note ORIG after the insn AFTER. */
4607 emit_note_copy_after (rtx orig, rtx after)
4611 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4617 note = rtx_alloc (NOTE);
4618 INSN_UID (note) = cur_insn_uid++;
4619 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4620 NOTE_DATA (note) = NOTE_DATA (orig);
4621 BLOCK_FOR_INSN (note) = NULL;
4622 add_insn_after (note, after);
4626 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4628 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4630 rtx last = emit_insn_after (pattern, after);
4632 after = NEXT_INSN (after);
4635 if (active_insn_p (after))
4636 INSN_LOCATOR (after) = loc;
4639 after = NEXT_INSN (after);
4644 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4646 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4648 rtx last = emit_jump_insn_after (pattern, after);
4650 after = NEXT_INSN (after);
4653 if (active_insn_p (after))
4654 INSN_LOCATOR (after) = loc;
4657 after = NEXT_INSN (after);
4662 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4664 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4666 rtx last = emit_call_insn_after (pattern, after);
4668 after = NEXT_INSN (after);
4671 if (active_insn_p (after))
4672 INSN_LOCATOR (after) = loc;
4675 after = NEXT_INSN (after);
4680 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4682 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4684 rtx first = PREV_INSN (before);
4685 rtx last = emit_insn_before (pattern, before);
4687 first = NEXT_INSN (first);
4690 if (active_insn_p (first))
4691 INSN_LOCATOR (first) = loc;
4694 first = NEXT_INSN (first);
4699 /* Take X and emit it at the end of the doubly-linked
4702 Returns the last insn emitted. */
4707 rtx last = last_insn;
4713 switch (GET_CODE (x))
4724 rtx next = NEXT_INSN (insn);
4731 #ifdef ENABLE_RTL_CHECKING
4738 last = make_insn_raw (x);
4746 /* Make an insn of code JUMP_INSN with pattern X
4747 and add it to the end of the doubly-linked list. */
4750 emit_jump_insn (rtx x)
4752 rtx last = NULL_RTX, insn;
4754 switch (GET_CODE (x))
4765 rtx next = NEXT_INSN (insn);
4772 #ifdef ENABLE_RTL_CHECKING
4779 last = make_jump_insn_raw (x);
4787 /* Make an insn of code CALL_INSN with pattern X
4788 and add it to the end of the doubly-linked list. */
4791 emit_call_insn (rtx x)
4795 switch (GET_CODE (x))
4803 insn = emit_insn (x);
4806 #ifdef ENABLE_RTL_CHECKING
4813 insn = make_call_insn_raw (x);
4821 /* Add the label LABEL to the end of the doubly-linked list. */
4824 emit_label (rtx label)
4826 /* This can be called twice for the same label
4827 as a result of the confusion that follows a syntax error!
4828 So make it harmless. */
4829 if (INSN_UID (label) == 0)
4831 INSN_UID (label) = cur_insn_uid++;
4837 /* Make an insn of code BARRIER
4838 and add it to the end of the doubly-linked list. */
4843 rtx barrier = rtx_alloc (BARRIER);
4844 INSN_UID (barrier) = cur_insn_uid++;
4849 /* Make line numbering NOTE insn for LOCATION add it to the end
4850 of the doubly-linked list, but only if line-numbers are desired for
4851 debugging info and it doesn't match the previous one. */
4854 emit_line_note (location_t location)
4858 set_file_and_line_for_stmt (location);
4860 if (location.file && last_location.file
4861 && !strcmp (location.file, last_location.file)
4862 && location.line == last_location.line)
4864 last_location = location;
4866 if (no_line_numbers)
4872 note = emit_note (location.line);
4873 NOTE_SOURCE_FILE (note) = location.file;
4878 /* Emit a copy of note ORIG. */
4881 emit_note_copy (rtx orig)
4885 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4891 note = rtx_alloc (NOTE);
4893 INSN_UID (note) = cur_insn_uid++;
4894 NOTE_DATA (note) = NOTE_DATA (orig);
4895 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4896 BLOCK_FOR_INSN (note) = NULL;
4902 /* Make an insn of code NOTE or type NOTE_NO
4903 and add it to the end of the doubly-linked list. */
4906 emit_note (int note_no)
4910 note = rtx_alloc (NOTE);
4911 INSN_UID (note) = cur_insn_uid++;
4912 NOTE_LINE_NUMBER (note) = note_no;
4913 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4914 BLOCK_FOR_INSN (note) = NULL;
4919 /* Cause next statement to emit a line note even if the line number
4923 force_next_line_note (void)
4925 last_location.line = -1;
4928 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4929 note of this type already exists, remove it first. */
4932 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4934 rtx note = find_reg_note (insn, kind, NULL_RTX);
4940 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4941 has multiple sets (some callers assume single_set
4942 means the insn only has one set, when in fact it
4943 means the insn only has one * useful * set). */
4944 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4951 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4952 It serves no useful purpose and breaks eliminate_regs. */
4953 if (GET_CODE (datum) == ASM_OPERANDS)
4963 XEXP (note, 0) = datum;
4967 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4968 return REG_NOTES (insn);
4971 /* Return an indication of which type of insn should have X as a body.
4972 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4975 classify_insn (rtx x)
4977 if (GET_CODE (x) == CODE_LABEL)
4979 if (GET_CODE (x) == CALL)
4981 if (GET_CODE (x) == RETURN)
4983 if (GET_CODE (x) == SET)
4985 if (SET_DEST (x) == pc_rtx)
4987 else if (GET_CODE (SET_SRC (x)) == CALL)
4992 if (GET_CODE (x) == PARALLEL)
4995 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4996 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4998 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4999 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5001 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5002 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5008 /* Emit the rtl pattern X as an appropriate kind of insn.
5009 If X is a label, it is simply added into the insn chain. */
5014 enum rtx_code code = classify_insn (x);
5016 if (code == CODE_LABEL)
5017 return emit_label (x);
5018 else if (code == INSN)
5019 return emit_insn (x);
5020 else if (code == JUMP_INSN)
5022 rtx insn = emit_jump_insn (x);
5023 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5024 return emit_barrier ();
5027 else if (code == CALL_INSN)
5028 return emit_call_insn (x);
5033 /* Space for free sequence stack entries. */
5034 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
5036 /* Begin emitting insns to a sequence which can be packaged in an
5037 RTL_EXPR. If this sequence will contain something that might cause
5038 the compiler to pop arguments to function calls (because those
5039 pops have previously been deferred; see INHIBIT_DEFER_POP for more
5040 details), use do_pending_stack_adjust before calling this function.
5041 That will ensure that the deferred pops are not accidentally
5042 emitted in the middle of this sequence. */
5045 start_sequence (void)
5047 struct sequence_stack *tem;
5049 if (free_sequence_stack != NULL)
5051 tem = free_sequence_stack;
5052 free_sequence_stack = tem->next;
5055 tem = ggc_alloc (sizeof (struct sequence_stack));
5057 tem->next = seq_stack;
5058 tem->first = first_insn;
5059 tem->last = last_insn;
5060 tem->sequence_rtl_expr = seq_rtl_expr;
5068 /* Similarly, but indicate that this sequence will be placed in T, an
5069 RTL_EXPR. See the documentation for start_sequence for more
5070 information about how to use this function. */
5073 start_sequence_for_rtl_expr (tree t)
5080 /* Set up the insn chain starting with FIRST as the current sequence,
5081 saving the previously current one. See the documentation for
5082 start_sequence for more information about how to use this function. */
5085 push_to_sequence (rtx first)
5091 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5097 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5100 push_to_full_sequence (rtx first, rtx last)
5105 /* We really should have the end of the insn chain here. */
5106 if (last && NEXT_INSN (last))
5110 /* Set up the outer-level insn chain
5111 as the current sequence, saving the previously current one. */
5114 push_topmost_sequence (void)
5116 struct sequence_stack *stack, *top = NULL;
5120 for (stack = seq_stack; stack; stack = stack->next)
5123 first_insn = top->first;
5124 last_insn = top->last;
5125 seq_rtl_expr = top->sequence_rtl_expr;
5128 /* After emitting to the outer-level insn chain, update the outer-level
5129 insn chain, and restore the previous saved state. */
5132 pop_topmost_sequence (void)
5134 struct sequence_stack *stack, *top = NULL;
5136 for (stack = seq_stack; stack; stack = stack->next)
5139 top->first = first_insn;
5140 top->last = last_insn;
5141 /* ??? Why don't we save seq_rtl_expr here? */
5146 /* After emitting to a sequence, restore previous saved state.
5148 To get the contents of the sequence just made, you must call
5149 `get_insns' *before* calling here.
5151 If the compiler might have deferred popping arguments while
5152 generating this sequence, and this sequence will not be immediately
5153 inserted into the instruction stream, use do_pending_stack_adjust
5154 before calling get_insns. That will ensure that the deferred
5155 pops are inserted into this sequence, and not into some random
5156 location in the instruction stream. See INHIBIT_DEFER_POP for more
5157 information about deferred popping of arguments. */
5162 struct sequence_stack *tem = seq_stack;
5164 first_insn = tem->first;
5165 last_insn = tem->last;
5166 seq_rtl_expr = tem->sequence_rtl_expr;
5167 seq_stack = tem->next;
5169 memset (tem, 0, sizeof (*tem));
5170 tem->next = free_sequence_stack;
5171 free_sequence_stack = tem;
5174 /* This works like end_sequence, but records the old sequence in FIRST
5178 end_full_sequence (rtx *first, rtx *last)
5180 *first = first_insn;
5185 /* Return 1 if currently emitting into a sequence. */
5188 in_sequence_p (void)
5190 return seq_stack != 0;
5193 /* Put the various virtual registers into REGNO_REG_RTX. */
5196 init_virtual_regs (struct emit_status *es)
5198 rtx *ptr = es->x_regno_reg_rtx;
5199 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5200 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5201 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5202 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5203 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5207 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5208 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5209 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5210 static int copy_insn_n_scratches;
5212 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5213 copied an ASM_OPERANDS.
5214 In that case, it is the original input-operand vector. */
5215 static rtvec orig_asm_operands_vector;
5217 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5218 copied an ASM_OPERANDS.
5219 In that case, it is the copied input-operand vector. */
5220 static rtvec copy_asm_operands_vector;
5222 /* Likewise for the constraints vector. */
5223 static rtvec orig_asm_constraints_vector;
5224 static rtvec copy_asm_constraints_vector;
5226 /* Recursively create a new copy of an rtx for copy_insn.
5227 This function differs from copy_rtx in that it handles SCRATCHes and
5228 ASM_OPERANDs properly.
5229 Normally, this function is not used directly; use copy_insn as front end.
5230 However, you could first copy an insn pattern with copy_insn and then use
5231 this function afterwards to properly copy any REG_NOTEs containing
5235 copy_insn_1 (rtx orig)
5240 const char *format_ptr;
5242 code = GET_CODE (orig);
5259 for (i = 0; i < copy_insn_n_scratches; i++)
5260 if (copy_insn_scratch_in[i] == orig)
5261 return copy_insn_scratch_out[i];
5265 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5266 a LABEL_REF, it isn't sharable. */
5267 if (GET_CODE (XEXP (orig, 0)) == PLUS
5268 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5269 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5273 /* A MEM with a constant address is not sharable. The problem is that
5274 the constant address may need to be reloaded. If the mem is shared,
5275 then reloading one copy of this mem will cause all copies to appear
5276 to have been reloaded. */
5282 copy = rtx_alloc (code);
5284 /* Copy the various flags, and other information. We assume that
5285 all fields need copying, and then clear the fields that should
5286 not be copied. That is the sensible default behavior, and forces
5287 us to explicitly document why we are *not* copying a flag. */
5288 memcpy (copy, orig, RTX_HDR_SIZE);
5290 /* We do not copy the USED flag, which is used as a mark bit during
5291 walks over the RTL. */
5292 RTX_FLAG (copy, used) = 0;
5294 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5295 if (GET_RTX_CLASS (code) == 'i')
5297 RTX_FLAG (copy, jump) = 0;
5298 RTX_FLAG (copy, call) = 0;
5299 RTX_FLAG (copy, frame_related) = 0;
5302 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5304 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5306 copy->u.fld[i] = orig->u.fld[i];
5307 switch (*format_ptr++)
5310 if (XEXP (orig, i) != NULL)
5311 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5316 if (XVEC (orig, i) == orig_asm_constraints_vector)
5317 XVEC (copy, i) = copy_asm_constraints_vector;
5318 else if (XVEC (orig, i) == orig_asm_operands_vector)
5319 XVEC (copy, i) = copy_asm_operands_vector;
5320 else if (XVEC (orig, i) != NULL)
5322 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5323 for (j = 0; j < XVECLEN (copy, i); j++)
5324 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5335 /* These are left unchanged. */
5343 if (code == SCRATCH)
5345 i = copy_insn_n_scratches++;
5346 if (i >= MAX_RECOG_OPERANDS)
5348 copy_insn_scratch_in[i] = orig;
5349 copy_insn_scratch_out[i] = copy;
5351 else if (code == ASM_OPERANDS)
5353 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5354 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5355 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5356 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5362 /* Create a new copy of an rtx.
5363 This function differs from copy_rtx in that it handles SCRATCHes and
5364 ASM_OPERANDs properly.
5365 INSN doesn't really have to be a full INSN; it could be just the
5368 copy_insn (rtx insn)
5370 copy_insn_n_scratches = 0;
5371 orig_asm_operands_vector = 0;
5372 orig_asm_constraints_vector = 0;
5373 copy_asm_operands_vector = 0;
5374 copy_asm_constraints_vector = 0;
5375 return copy_insn_1 (insn);
5378 /* Initialize data structures and variables in this file
5379 before generating rtl for each function. */
5384 struct function *f = cfun;
5386 f->emit = ggc_alloc (sizeof (struct emit_status));
5389 seq_rtl_expr = NULL;
5391 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5392 last_location.line = 0;
5393 last_location.file = 0;
5394 first_label_num = label_num;
5398 /* Init the tables that describe all the pseudo regs. */
5400 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5402 f->emit->regno_pointer_align
5403 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5404 * sizeof (unsigned char));
5407 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5409 /* Put copies of all the hard registers into regno_reg_rtx. */
5410 memcpy (regno_reg_rtx,
5411 static_regno_reg_rtx,
5412 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5414 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5415 init_virtual_regs (f->emit);
5417 /* Indicate that the virtual registers and stack locations are
5419 REG_POINTER (stack_pointer_rtx) = 1;
5420 REG_POINTER (frame_pointer_rtx) = 1;
5421 REG_POINTER (hard_frame_pointer_rtx) = 1;
5422 REG_POINTER (arg_pointer_rtx) = 1;
5424 REG_POINTER (virtual_incoming_args_rtx) = 1;
5425 REG_POINTER (virtual_stack_vars_rtx) = 1;
5426 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5427 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5428 REG_POINTER (virtual_cfa_rtx) = 1;
5430 #ifdef STACK_BOUNDARY
5431 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5432 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5433 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5434 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5436 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5437 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5438 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5439 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5440 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5443 #ifdef INIT_EXPANDERS
5448 /* Generate the constant 0. */
5451 gen_const_vector_0 (enum machine_mode mode)
5456 enum machine_mode inner;
5458 units = GET_MODE_NUNITS (mode);
5459 inner = GET_MODE_INNER (mode);
5461 v = rtvec_alloc (units);
5463 /* We need to call this function after we to set CONST0_RTX first. */
5464 if (!CONST0_RTX (inner))
5467 for (i = 0; i < units; ++i)
5468 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5470 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5474 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5475 all elements are zero. */
5477 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5479 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5482 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5483 if (RTVEC_ELT (v, i) != inner_zero)
5484 return gen_rtx_raw_CONST_VECTOR (mode, v);
5485 return CONST0_RTX (mode);
5488 /* Create some permanent unique rtl objects shared between all functions.
5489 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5492 init_emit_once (int line_numbers)
5495 enum machine_mode mode;
5496 enum machine_mode double_mode;
5498 /* We need reg_raw_mode, so initialize the modes now. */
5499 init_reg_modes_once ();
5501 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5503 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5504 const_int_htab_eq, NULL);
5506 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5507 const_double_htab_eq, NULL);
5509 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5510 mem_attrs_htab_eq, NULL);
5511 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5512 reg_attrs_htab_eq, NULL);
5514 no_line_numbers = ! line_numbers;
5516 /* Compute the word and byte modes. */
5518 byte_mode = VOIDmode;
5519 word_mode = VOIDmode;
5520 double_mode = VOIDmode;
5522 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5523 mode = GET_MODE_WIDER_MODE (mode))
5525 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5526 && byte_mode == VOIDmode)
5529 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5530 && word_mode == VOIDmode)
5534 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5535 mode = GET_MODE_WIDER_MODE (mode))
5537 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5538 && double_mode == VOIDmode)
5542 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5544 /* Assign register numbers to the globally defined register rtx.
5545 This must be done at runtime because the register number field
5546 is in a union and some compilers can't initialize unions. */
5548 pc_rtx = gen_rtx (PC, VOIDmode);
5549 cc0_rtx = gen_rtx (CC0, VOIDmode);
5550 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5551 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5552 if (hard_frame_pointer_rtx == 0)
5553 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5554 HARD_FRAME_POINTER_REGNUM);
5555 if (arg_pointer_rtx == 0)
5556 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5557 virtual_incoming_args_rtx =
5558 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5559 virtual_stack_vars_rtx =
5560 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5561 virtual_stack_dynamic_rtx =
5562 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5563 virtual_outgoing_args_rtx =
5564 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5565 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5567 /* Initialize RTL for commonly used hard registers. These are
5568 copied into regno_reg_rtx as we begin to compile each function. */
5569 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5570 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5572 #ifdef INIT_EXPANDERS
5573 /* This is to initialize {init|mark|free}_machine_status before the first
5574 call to push_function_context_to. This is needed by the Chill front
5575 end which calls push_function_context_to before the first call to
5576 init_function_start. */
5580 /* Create the unique rtx's for certain rtx codes and operand values. */
5582 /* Don't use gen_rtx here since gen_rtx in this case
5583 tries to use these variables. */
5584 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5585 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5586 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5588 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5589 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5590 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5592 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5594 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5595 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5596 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5597 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5598 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5599 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5600 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5602 dconsthalf = dconst1;
5605 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5607 /* Initialize mathematical constants for constant folding builtins.
5608 These constants need to be given to at least 160 bits precision. */
5609 real_from_string (&dconstpi,
5610 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5611 real_from_string (&dconste,
5612 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5614 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5616 REAL_VALUE_TYPE *r =
5617 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5619 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5620 mode = GET_MODE_WIDER_MODE (mode))
5621 const_tiny_rtx[i][(int) mode] =
5622 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5624 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5626 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5627 mode = GET_MODE_WIDER_MODE (mode))
5628 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5630 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5632 mode = GET_MODE_WIDER_MODE (mode))
5633 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5636 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5638 mode = GET_MODE_WIDER_MODE (mode))
5639 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5641 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5643 mode = GET_MODE_WIDER_MODE (mode))
5644 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5646 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5647 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5648 const_tiny_rtx[0][i] = const0_rtx;
5650 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5651 if (STORE_FLAG_VALUE == 1)
5652 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5654 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5655 return_address_pointer_rtx
5656 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5659 #ifdef STATIC_CHAIN_REGNUM
5660 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5662 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5663 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5664 static_chain_incoming_rtx
5665 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5668 static_chain_incoming_rtx = static_chain_rtx;
5672 static_chain_rtx = STATIC_CHAIN;
5674 #ifdef STATIC_CHAIN_INCOMING
5675 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5677 static_chain_incoming_rtx = static_chain_rtx;
5681 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5682 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5685 /* Query and clear/ restore no_line_numbers. This is used by the
5686 switch / case handling in stmt.c to give proper line numbers in
5687 warnings about unreachable code. */
5690 force_line_numbers (void)
5692 int old = no_line_numbers;
5694 no_line_numbers = 0;
5696 force_next_line_note ();
5701 restore_line_number_status (int old_value)
5703 no_line_numbers = old_value;
5706 /* Produce exact duplicate of insn INSN after AFTER.
5707 Care updating of libcall regions if present. */
5710 emit_copy_of_insn_after (rtx insn, rtx after)
5713 rtx note1, note2, link;
5715 switch (GET_CODE (insn))
5718 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5722 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5726 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5727 if (CALL_INSN_FUNCTION_USAGE (insn))
5728 CALL_INSN_FUNCTION_USAGE (new)
5729 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5730 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5731 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5738 /* Update LABEL_NUSES. */
5739 mark_jump_label (PATTERN (new), new, 0);
5741 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5743 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5745 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5746 if (REG_NOTE_KIND (link) != REG_LABEL)
5748 if (GET_CODE (link) == EXPR_LIST)
5750 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5755 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5760 /* Fix the libcall sequences. */
5761 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5764 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5766 XEXP (note1, 0) = p;
5767 XEXP (note2, 0) = new;
5769 INSN_CODE (new) = INSN_CODE (insn);
5773 #include "gt-emit-rtl.h"