1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these are unique; no other rtx-object will be equal to any
81 rtx global_rtl[GR_MAX];
83 /* Commonly used RTL for hard registers. These objects are not necessarily
84 unique, so we allocate them separately from global_rtl. They are
85 initialized once per compilation unit, then copied into regno_reg_rtx
86 at the beginning of each function. */
87 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
89 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
90 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
91 record a copy of const[012]_rtx. */
93 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
97 REAL_VALUE_TYPE dconst0;
98 REAL_VALUE_TYPE dconst1;
99 REAL_VALUE_TYPE dconst2;
100 REAL_VALUE_TYPE dconst3;
101 REAL_VALUE_TYPE dconst10;
102 REAL_VALUE_TYPE dconstm1;
103 REAL_VALUE_TYPE dconstm2;
104 REAL_VALUE_TYPE dconsthalf;
105 REAL_VALUE_TYPE dconstthird;
106 REAL_VALUE_TYPE dconstpi;
107 REAL_VALUE_TYPE dconste;
109 /* All references to the following fixed hard registers go through
110 these unique rtl objects. On machines where the frame-pointer and
111 arg-pointer are the same register, they use the same unique object.
113 After register allocation, other rtl objects which used to be pseudo-regs
114 may be clobbered to refer to the frame-pointer register.
115 But references that were originally to the frame-pointer can be
116 distinguished from the others because they contain frame_pointer_rtx.
118 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
119 tricky: until register elimination has taken place hard_frame_pointer_rtx
120 should be used if it is being set, and frame_pointer_rtx otherwise. After
121 register elimination hard_frame_pointer_rtx should always be used.
122 On machines where the two registers are same (most) then these are the
125 In an inline procedure, the stack and frame pointer rtxs may not be
126 used for anything else. */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
146 htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
150 htab_t mem_attrs_htab;
152 /* A hash table storing register attribute structures. */
153 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
154 htab_t reg_attrs_htab;
156 /* A hash table storing all CONST_DOUBLEs. */
157 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
158 htab_t const_double_htab;
160 #define first_insn (cfun->emit->x_first_insn)
161 #define last_insn (cfun->emit->x_last_insn)
162 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
163 #define last_location (cfun->emit->x_last_location)
164 #define first_label_num (cfun->emit->x_first_label_num)
166 static rtx make_jump_insn_raw (rtx);
167 static rtx make_call_insn_raw (rtx);
168 static rtx find_line_note (rtx);
169 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
170 static void unshare_all_decls (tree);
171 static void reset_used_decls (tree);
172 static void mark_label_nuses (rtx);
173 static hashval_t const_int_htab_hash (const void *);
174 static int const_int_htab_eq (const void *, const void *);
175 static hashval_t const_double_htab_hash (const void *);
176 static int const_double_htab_eq (const void *, const void *);
177 static rtx lookup_const_double (rtx);
178 static hashval_t mem_attrs_htab_hash (const void *);
179 static int mem_attrs_htab_eq (const void *, const void *);
180 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
182 static hashval_t reg_attrs_htab_hash (const void *);
183 static int reg_attrs_htab_eq (const void *, const void *);
184 static reg_attrs *get_reg_attrs (tree, int);
185 static tree component_ref_for_mem_expr (tree);
186 static rtx gen_const_vector (enum machine_mode, int);
187 static void copy_rtx_if_shared_1 (rtx *orig);
189 /* Probability of the conditional branch currently proceeded by try_split.
190 Set to -1 otherwise. */
191 int split_branch_probability = -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (const void *x)
198 return (hashval_t) INTVAL ((rtx) x);
201 /* Returns nonzero if the value represented by X (which is really a
202 CONST_INT) is the same as that given by Y (which is really a
206 const_int_htab_eq (const void *x, const void *y)
208 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
211 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
213 const_double_htab_hash (const void *x)
218 if (GET_MODE (value) == VOIDmode)
219 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
222 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
223 /* MODE is used in the comparison, so it should be in the hash. */
224 h ^= GET_MODE (value);
229 /* Returns nonzero if the value represented by X (really a ...)
230 is the same as that represented by Y (really a ...) */
232 const_double_htab_eq (const void *x, const void *y)
234 rtx a = (rtx)x, b = (rtx)y;
236 if (GET_MODE (a) != GET_MODE (b))
238 if (GET_MODE (a) == VOIDmode)
239 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
240 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
242 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
243 CONST_DOUBLE_REAL_VALUE (b));
246 /* Returns a hash code for X (which is a really a mem_attrs *). */
249 mem_attrs_htab_hash (const void *x)
251 mem_attrs *p = (mem_attrs *) x;
253 return (p->alias ^ (p->align * 1000)
254 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
255 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
259 /* Returns nonzero if the value represented by X (which is really a
260 mem_attrs *) is the same as that given by Y (which is also really a
264 mem_attrs_htab_eq (const void *x, const void *y)
266 mem_attrs *p = (mem_attrs *) x;
267 mem_attrs *q = (mem_attrs *) y;
269 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
270 && p->size == q->size && p->align == q->align);
273 /* Allocate a new mem_attrs structure and insert it into the hash table if
274 one identical to it is not already in the table. We are doing this for
278 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
279 unsigned int align, enum machine_mode mode)
284 /* If everything is the default, we can just return zero.
285 This must match what the corresponding MEM_* macros return when the
286 field is not present. */
287 if (alias == 0 && expr == 0 && offset == 0
289 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
290 && (STRICT_ALIGNMENT && mode != BLKmode
291 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
296 attrs.offset = offset;
300 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
303 *slot = ggc_alloc (sizeof (mem_attrs));
304 memcpy (*slot, &attrs, sizeof (mem_attrs));
310 /* Returns a hash code for X (which is a really a reg_attrs *). */
313 reg_attrs_htab_hash (const void *x)
315 reg_attrs *p = (reg_attrs *) x;
317 return ((p->offset * 1000) ^ (long) p->decl);
320 /* Returns nonzero if the value represented by X (which is really a
321 reg_attrs *) is the same as that given by Y (which is also really a
325 reg_attrs_htab_eq (const void *x, const void *y)
327 reg_attrs *p = (reg_attrs *) x;
328 reg_attrs *q = (reg_attrs *) y;
330 return (p->decl == q->decl && p->offset == q->offset);
332 /* Allocate a new reg_attrs structure and insert it into the hash table if
333 one identical to it is not already in the table. We are doing this for
337 get_reg_attrs (tree decl, int offset)
342 /* If everything is the default, we can just return zero. */
343 if (decl == 0 && offset == 0)
347 attrs.offset = offset;
349 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
352 *slot = ggc_alloc (sizeof (reg_attrs));
353 memcpy (*slot, &attrs, sizeof (reg_attrs));
359 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
360 don't attempt to share with the various global pieces of rtl (such as
361 frame_pointer_rtx). */
364 gen_raw_REG (enum machine_mode mode, int regno)
366 rtx x = gen_rtx_raw_REG (mode, regno);
367 ORIGINAL_REGNO (x) = regno;
371 /* There are some RTL codes that require special attention; the generation
372 functions do the raw handling. If you add to this list, modify
373 special_rtx in gengenrtl.c as well. */
376 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
380 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
381 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
383 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
384 if (const_true_rtx && arg == STORE_FLAG_VALUE)
385 return const_true_rtx;
388 /* Look up the CONST_INT in the hash table. */
389 slot = htab_find_slot_with_hash (const_int_htab, &arg,
390 (hashval_t) arg, INSERT);
392 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
398 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
400 return GEN_INT (trunc_int_for_mode (c, mode));
403 /* CONST_DOUBLEs might be created from pairs of integers, or from
404 REAL_VALUE_TYPEs. Also, their length is known only at run time,
405 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
407 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
408 hash table. If so, return its counterpart; otherwise add it
409 to the hash table and return it. */
411 lookup_const_double (rtx real)
413 void **slot = htab_find_slot (const_double_htab, real, INSERT);
420 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
421 VALUE in mode MODE. */
423 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
425 rtx real = rtx_alloc (CONST_DOUBLE);
426 PUT_MODE (real, mode);
428 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
430 return lookup_const_double (real);
433 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
434 of ints: I0 is the low-order word and I1 is the high-order word.
435 Do not use this routine for non-integer modes; convert to
436 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
439 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
444 if (mode != VOIDmode)
448 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
449 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
450 /* We can get a 0 for an error mark. */
451 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
452 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
454 /* We clear out all bits that don't belong in MODE, unless they and
455 our sign bit are all one. So we get either a reasonable negative
456 value or a reasonable unsigned value for this mode. */
457 width = GET_MODE_BITSIZE (mode);
458 if (width < HOST_BITS_PER_WIDE_INT
459 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
460 != ((HOST_WIDE_INT) (-1) << (width - 1))))
461 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
462 else if (width == HOST_BITS_PER_WIDE_INT
463 && ! (i1 == ~0 && i0 < 0))
466 /* We should be able to represent this value as a constant. */
467 gcc_assert (width <= 2 * HOST_BITS_PER_WIDE_INT);
469 /* If this would be an entire word for the target, but is not for
470 the host, then sign-extend on the host so that the number will
471 look the same way on the host that it would on the target.
473 For example, when building a 64 bit alpha hosted 32 bit sparc
474 targeted compiler, then we want the 32 bit unsigned value -1 to be
475 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
476 The latter confuses the sparc backend. */
478 if (width < HOST_BITS_PER_WIDE_INT
479 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
480 i0 |= ((HOST_WIDE_INT) (-1) << width);
482 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
485 ??? Strictly speaking, this is wrong if we create a CONST_INT for
486 a large unsigned constant with the size of MODE being
487 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
488 in a wider mode. In that case we will mis-interpret it as a
491 Unfortunately, the only alternative is to make a CONST_DOUBLE for
492 any constant in any mode if it is an unsigned constant larger
493 than the maximum signed integer in an int on the host. However,
494 doing this will break everyone that always expects to see a
495 CONST_INT for SImode and smaller.
497 We have always been making CONST_INTs in this case, so nothing
498 new is being broken. */
500 if (width <= HOST_BITS_PER_WIDE_INT)
501 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
504 /* If this integer fits in one word, return a CONST_INT. */
505 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
508 /* We use VOIDmode for integers. */
509 value = rtx_alloc (CONST_DOUBLE);
510 PUT_MODE (value, VOIDmode);
512 CONST_DOUBLE_LOW (value) = i0;
513 CONST_DOUBLE_HIGH (value) = i1;
515 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
516 XWINT (value, i) = 0;
518 return lookup_const_double (value);
522 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
524 /* In case the MD file explicitly references the frame pointer, have
525 all such references point to the same frame pointer. This is
526 used during frame pointer elimination to distinguish the explicit
527 references to these registers from pseudos that happened to be
530 If we have eliminated the frame pointer or arg pointer, we will
531 be using it as a normal register, for example as a spill
532 register. In such cases, we might be accessing it in a mode that
533 is not Pmode and therefore cannot use the pre-allocated rtx.
535 Also don't do this when we are making new REGs in reload, since
536 we don't want to get confused with the real pointers. */
538 if (mode == Pmode && !reload_in_progress)
540 if (regno == FRAME_POINTER_REGNUM
541 && (!reload_completed || frame_pointer_needed))
542 return frame_pointer_rtx;
543 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
544 if (regno == HARD_FRAME_POINTER_REGNUM
545 && (!reload_completed || frame_pointer_needed))
546 return hard_frame_pointer_rtx;
548 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
549 if (regno == ARG_POINTER_REGNUM)
550 return arg_pointer_rtx;
552 #ifdef RETURN_ADDRESS_POINTER_REGNUM
553 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
554 return return_address_pointer_rtx;
556 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
557 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
558 return pic_offset_table_rtx;
559 if (regno == STACK_POINTER_REGNUM)
560 return stack_pointer_rtx;
564 /* If the per-function register table has been set up, try to re-use
565 an existing entry in that table to avoid useless generation of RTL.
567 This code is disabled for now until we can fix the various backends
568 which depend on having non-shared hard registers in some cases. Long
569 term we want to re-enable this code as it can significantly cut down
570 on the amount of useless RTL that gets generated.
572 We'll also need to fix some code that runs after reload that wants to
573 set ORIGINAL_REGNO. */
578 && regno < FIRST_PSEUDO_REGISTER
579 && reg_raw_mode[regno] == mode)
580 return regno_reg_rtx[regno];
583 return gen_raw_REG (mode, regno);
587 gen_rtx_MEM (enum machine_mode mode, rtx addr)
589 rtx rt = gen_rtx_raw_MEM (mode, addr);
591 /* This field is not cleared by the mere allocation of the rtx, so
598 /* Generate a memory referring to non-trapping constant memory. */
601 gen_const_mem (enum machine_mode mode, rtx addr)
603 rtx mem = gen_rtx_MEM (mode, addr);
604 MEM_READONLY_P (mem) = 1;
605 MEM_NOTRAP_P (mem) = 1;
609 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
610 this construct would be valid, and false otherwise. */
613 validate_subreg (enum machine_mode omode, enum machine_mode imode,
614 rtx reg, unsigned int offset)
616 unsigned int isize = GET_MODE_SIZE (imode);
617 unsigned int osize = GET_MODE_SIZE (omode);
619 /* All subregs must be aligned. */
620 if (offset % osize != 0)
623 /* The subreg offset cannot be outside the inner object. */
627 /* ??? This should not be here. Temporarily continue to allow word_mode
628 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
629 Generally, backends are doing something sketchy but it'll take time to
631 if (omode == word_mode)
633 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
634 is the culprit here, and not the backends. */
635 else if (osize >= UNITS_PER_WORD && isize >= osize)
637 /* Allow component subregs of complex and vector. Though given the below
638 extraction rules, it's not always clear what that means. */
639 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
640 && GET_MODE_INNER (imode) == omode)
642 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
643 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
644 represent this. It's questionable if this ought to be represented at
645 all -- why can't this all be hidden in post-reload splitters that make
646 arbitrarily mode changes to the registers themselves. */
647 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
649 /* Subregs involving floating point modes are not allowed to
650 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
651 (subreg:SI (reg:DF) 0) isn't. */
652 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
658 /* Paradoxical subregs must have offset zero. */
662 /* This is a normal subreg. Verify that the offset is representable. */
664 /* For hard registers, we already have most of these rules collected in
665 subreg_offset_representable_p. */
666 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
668 unsigned int regno = REGNO (reg);
670 #ifdef CANNOT_CHANGE_MODE_CLASS
671 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
672 && GET_MODE_INNER (imode) == omode)
674 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
678 return subreg_offset_representable_p (regno, imode, offset, omode);
681 /* For pseudo registers, we want most of the same checks. Namely:
682 If the register no larger than a word, the subreg must be lowpart.
683 If the register is larger than a word, the subreg must be the lowpart
684 of a subword. A subreg does *not* perform arbitrary bit extraction.
685 Given that we've already checked mode/offset alignment, we only have
686 to check subword subregs here. */
687 if (osize < UNITS_PER_WORD)
689 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
690 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
691 if (offset % UNITS_PER_WORD != low_off)
698 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
700 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
701 return gen_rtx_raw_SUBREG (mode, reg, offset);
704 /* Generate a SUBREG representing the least-significant part of REG if MODE
705 is smaller than mode of REG, otherwise paradoxical SUBREG. */
708 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
710 enum machine_mode inmode;
712 inmode = GET_MODE (reg);
713 if (inmode == VOIDmode)
715 return gen_rtx_SUBREG (mode, reg,
716 subreg_lowpart_offset (mode, inmode));
719 /* gen_rtvec (n, [rt1, ..., rtn])
721 ** This routine creates an rtvec and stores within it the
722 ** pointers to rtx's which are its arguments.
727 gen_rtvec (int n, ...)
736 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
738 vector = alloca (n * sizeof (rtx));
740 for (i = 0; i < n; i++)
741 vector[i] = va_arg (p, rtx);
743 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
747 return gen_rtvec_v (save_n, vector);
751 gen_rtvec_v (int n, rtx *argp)
757 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
759 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
761 for (i = 0; i < n; i++)
762 rt_val->elem[i] = *argp++;
767 /* Generate a REG rtx for a new pseudo register of mode MODE.
768 This pseudo is assigned the next sequential register number. */
771 gen_reg_rtx (enum machine_mode mode)
773 struct function *f = cfun;
776 /* Don't let anything called after initial flow analysis create new
778 gcc_assert (!no_new_pseudos);
780 if (generating_concat_p
781 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
782 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
784 /* For complex modes, don't make a single pseudo.
785 Instead, make a CONCAT of two pseudos.
786 This allows noncontiguous allocation of the real and imaginary parts,
787 which makes much better code. Besides, allocating DCmode
788 pseudos overstrains reload on some machines like the 386. */
789 rtx realpart, imagpart;
790 enum machine_mode partmode = GET_MODE_INNER (mode);
792 realpart = gen_reg_rtx (partmode);
793 imagpart = gen_reg_rtx (partmode);
794 return gen_rtx_CONCAT (mode, realpart, imagpart);
797 /* Make sure regno_pointer_align, and regno_reg_rtx are large
798 enough to have an element for this pseudo reg number. */
800 if (reg_rtx_no == f->emit->regno_pointer_align_length)
802 int old_size = f->emit->regno_pointer_align_length;
806 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
807 memset (new + old_size, 0, old_size);
808 f->emit->regno_pointer_align = (unsigned char *) new;
810 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
811 old_size * 2 * sizeof (rtx));
812 memset (new1 + old_size, 0, old_size * sizeof (rtx));
813 regno_reg_rtx = new1;
815 f->emit->regno_pointer_align_length = old_size * 2;
818 val = gen_raw_REG (mode, reg_rtx_no);
819 regno_reg_rtx[reg_rtx_no++] = val;
823 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
824 Do the big endian correction if needed. */
827 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
829 rtx new = gen_rtx_REG (mode, regno);
831 HOST_WIDE_INT var_size;
833 /* PR middle-end/14084
834 The problem appears when a variable is stored in a larger register
835 and later it is used in the original mode or some mode in between
836 or some part of variable is accessed.
838 On little endian machines there is no problem because
839 the REG_OFFSET of the start of the variable is the same when
840 accessed in any mode (it is 0).
842 However, this is not true on big endian machines.
843 The offset of the start of the variable is different when accessed
845 When we are taking a part of the REG we have to change the OFFSET
846 from offset WRT size of mode of REG to offset WRT size of variable.
848 If we would not do the big endian correction the resulting REG_OFFSET
849 would be larger than the size of the DECL.
851 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
853 REG.mode MODE DECL size old offset new offset description
854 DI SI 4 4 0 int32 in SImode
855 DI SI 1 4 0 char in SImode
856 DI QI 1 7 0 char in QImode
857 DI QI 4 5 1 1st element in QImode
859 DI HI 4 6 2 1st element in HImode
862 If the size of DECL is equal or greater than the size of REG
863 we can't do this correction because the register holds the
864 whole variable or a part of the variable and thus the REG_OFFSET
865 is already correct. */
867 decl = REG_EXPR (reg);
868 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
871 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
872 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
873 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
877 /* Convert machine endian to little endian WRT size of mode of REG. */
878 if (WORDS_BIG_ENDIAN)
879 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
880 / UNITS_PER_WORD) * UNITS_PER_WORD;
882 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
884 if (BYTES_BIG_ENDIAN)
885 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
888 offset_le += offset % UNITS_PER_WORD;
890 if (offset_le >= var_size)
892 /* MODE is wider than the variable so the new reg will cover
893 the whole variable so the resulting OFFSET should be 0. */
898 /* Convert little endian to machine endian WRT size of variable. */
899 if (WORDS_BIG_ENDIAN)
900 offset = ((var_size - 1 - offset_le)
901 / UNITS_PER_WORD) * UNITS_PER_WORD;
903 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
905 if (BYTES_BIG_ENDIAN)
906 offset += ((var_size - 1 - offset_le)
909 offset += offset_le % UNITS_PER_WORD;
913 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
914 REG_OFFSET (reg) + offset);
918 /* Set the decl for MEM to DECL. */
921 set_reg_attrs_from_mem (rtx reg, rtx mem)
923 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
925 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
928 /* Set the register attributes for registers contained in PARM_RTX.
929 Use needed values from memory attributes of MEM. */
932 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
934 if (REG_P (parm_rtx))
935 set_reg_attrs_from_mem (parm_rtx, mem);
936 else if (GET_CODE (parm_rtx) == PARALLEL)
938 /* Check for a NULL entry in the first slot, used to indicate that the
939 parameter goes both on the stack and in registers. */
940 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
941 for (; i < XVECLEN (parm_rtx, 0); i++)
943 rtx x = XVECEXP (parm_rtx, 0, i);
944 if (REG_P (XEXP (x, 0)))
945 REG_ATTRS (XEXP (x, 0))
946 = get_reg_attrs (MEM_EXPR (mem),
947 INTVAL (XEXP (x, 1)));
952 /* Assign the RTX X to declaration T. */
954 set_decl_rtl (tree t, rtx x)
956 DECL_CHECK (t)->decl.rtl = x;
960 /* For register, we maintain the reverse information too. */
962 REG_ATTRS (x) = get_reg_attrs (t, 0);
963 else if (GET_CODE (x) == SUBREG)
964 REG_ATTRS (SUBREG_REG (x))
965 = get_reg_attrs (t, -SUBREG_BYTE (x));
966 if (GET_CODE (x) == CONCAT)
968 if (REG_P (XEXP (x, 0)))
969 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
970 if (REG_P (XEXP (x, 1)))
971 REG_ATTRS (XEXP (x, 1))
972 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
974 if (GET_CODE (x) == PARALLEL)
977 for (i = 0; i < XVECLEN (x, 0); i++)
979 rtx y = XVECEXP (x, 0, i);
980 if (REG_P (XEXP (y, 0)))
981 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
986 /* Assign the RTX X to parameter declaration T. */
988 set_decl_incoming_rtl (tree t, rtx x)
990 DECL_INCOMING_RTL (t) = x;
994 /* For register, we maintain the reverse information too. */
996 REG_ATTRS (x) = get_reg_attrs (t, 0);
997 else if (GET_CODE (x) == SUBREG)
998 REG_ATTRS (SUBREG_REG (x))
999 = get_reg_attrs (t, -SUBREG_BYTE (x));
1000 if (GET_CODE (x) == CONCAT)
1002 if (REG_P (XEXP (x, 0)))
1003 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1004 if (REG_P (XEXP (x, 1)))
1005 REG_ATTRS (XEXP (x, 1))
1006 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1008 if (GET_CODE (x) == PARALLEL)
1012 /* Check for a NULL entry, used to indicate that the parameter goes
1013 both on the stack and in registers. */
1014 if (XEXP (XVECEXP (x, 0, 0), 0))
1019 for (i = start; i < XVECLEN (x, 0); i++)
1021 rtx y = XVECEXP (x, 0, i);
1022 if (REG_P (XEXP (y, 0)))
1023 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1028 /* Identify REG (which may be a CONCAT) as a user register. */
1031 mark_user_reg (rtx reg)
1033 if (GET_CODE (reg) == CONCAT)
1035 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1036 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1040 gcc_assert (REG_P (reg));
1041 REG_USERVAR_P (reg) = 1;
1045 /* Identify REG as a probable pointer register and show its alignment
1046 as ALIGN, if nonzero. */
1049 mark_reg_pointer (rtx reg, int align)
1051 if (! REG_POINTER (reg))
1053 REG_POINTER (reg) = 1;
1056 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1058 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1059 /* We can no-longer be sure just how aligned this pointer is. */
1060 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1063 /* Return 1 plus largest pseudo reg number used in the current function. */
1071 /* Return 1 + the largest label number used so far in the current function. */
1074 max_label_num (void)
1079 /* Return first label number used in this function (if any were used). */
1082 get_first_label_num (void)
1084 return first_label_num;
1087 /* If the rtx for label was created during the expansion of a nested
1088 function, then first_label_num won't include this label number.
1089 Fix this now so that array indicies work later. */
1092 maybe_set_first_label_num (rtx x)
1094 if (CODE_LABEL_NUMBER (x) < first_label_num)
1095 first_label_num = CODE_LABEL_NUMBER (x);
1098 /* Return a value representing some low-order bits of X, where the number
1099 of low-order bits is given by MODE. Note that no conversion is done
1100 between floating-point and fixed-point values, rather, the bit
1101 representation is returned.
1103 This function handles the cases in common between gen_lowpart, below,
1104 and two variants in cse.c and combine.c. These are the cases that can
1105 be safely handled at all points in the compilation.
1107 If this is not a case we can handle, return 0. */
1110 gen_lowpart_common (enum machine_mode mode, rtx x)
1112 int msize = GET_MODE_SIZE (mode);
1115 enum machine_mode innermode;
1117 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1118 so we have to make one up. Yuk. */
1119 innermode = GET_MODE (x);
1120 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1121 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1122 else if (innermode == VOIDmode)
1123 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1125 xsize = GET_MODE_SIZE (innermode);
1127 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1129 if (innermode == mode)
1132 /* MODE must occupy no more words than the mode of X. */
1133 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1134 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1137 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1138 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1141 offset = subreg_lowpart_offset (mode, innermode);
1143 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1144 && (GET_MODE_CLASS (mode) == MODE_INT
1145 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1147 /* If we are getting the low-order part of something that has been
1148 sign- or zero-extended, we can either just use the object being
1149 extended or make a narrower extension. If we want an even smaller
1150 piece than the size of the object being extended, call ourselves
1153 This case is used mostly by combine and cse. */
1155 if (GET_MODE (XEXP (x, 0)) == mode)
1157 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1158 return gen_lowpart_common (mode, XEXP (x, 0));
1159 else if (msize < xsize)
1160 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1162 else if (GET_CODE (x) == SUBREG || REG_P (x)
1163 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1164 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1165 return simplify_gen_subreg (mode, x, innermode, offset);
1167 /* Otherwise, we can't do this. */
1172 gen_highpart (enum machine_mode mode, rtx x)
1174 unsigned int msize = GET_MODE_SIZE (mode);
1177 /* This case loses if X is a subreg. To catch bugs early,
1178 complain if an invalid MODE is used even in other cases. */
1179 gcc_assert (msize <= UNITS_PER_WORD
1180 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1182 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1183 subreg_highpart_offset (mode, GET_MODE (x)));
1184 gcc_assert (result);
1186 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1187 the target if we have a MEM. gen_highpart must return a valid operand,
1188 emitting code if necessary to do so. */
1191 result = validize_mem (result);
1192 gcc_assert (result);
1198 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1199 be VOIDmode constant. */
1201 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1203 if (GET_MODE (exp) != VOIDmode)
1205 gcc_assert (GET_MODE (exp) == innermode);
1206 return gen_highpart (outermode, exp);
1208 return simplify_gen_subreg (outermode, exp, innermode,
1209 subreg_highpart_offset (outermode, innermode));
1212 /* Return offset in bytes to get OUTERMODE low part
1213 of the value in mode INNERMODE stored in memory in target format. */
1216 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1218 unsigned int offset = 0;
1219 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1223 if (WORDS_BIG_ENDIAN)
1224 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1225 if (BYTES_BIG_ENDIAN)
1226 offset += difference % UNITS_PER_WORD;
1232 /* Return offset in bytes to get OUTERMODE high part
1233 of the value in mode INNERMODE stored in memory in target format. */
1235 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1237 unsigned int offset = 0;
1238 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1240 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1244 if (! WORDS_BIG_ENDIAN)
1245 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1246 if (! BYTES_BIG_ENDIAN)
1247 offset += difference % UNITS_PER_WORD;
1253 /* Return 1 iff X, assumed to be a SUBREG,
1254 refers to the least significant part of its containing reg.
1255 If X is not a SUBREG, always return 1 (it is its own low part!). */
1258 subreg_lowpart_p (rtx x)
1260 if (GET_CODE (x) != SUBREG)
1262 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1265 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1266 == SUBREG_BYTE (x));
1269 /* Return subword OFFSET of operand OP.
1270 The word number, OFFSET, is interpreted as the word number starting
1271 at the low-order address. OFFSET 0 is the low-order word if not
1272 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1274 If we cannot extract the required word, we return zero. Otherwise,
1275 an rtx corresponding to the requested word will be returned.
1277 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1278 reload has completed, a valid address will always be returned. After
1279 reload, if a valid address cannot be returned, we return zero.
1281 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1282 it is the responsibility of the caller.
1284 MODE is the mode of OP in case it is a CONST_INT.
1286 ??? This is still rather broken for some cases. The problem for the
1287 moment is that all callers of this thing provide no 'goal mode' to
1288 tell us to work with. This exists because all callers were written
1289 in a word based SUBREG world.
1290 Now use of this function can be deprecated by simplify_subreg in most
1295 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1297 if (mode == VOIDmode)
1298 mode = GET_MODE (op);
1300 gcc_assert (mode != VOIDmode);
1302 /* If OP is narrower than a word, fail. */
1304 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1307 /* If we want a word outside OP, return zero. */
1309 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1312 /* Form a new MEM at the requested address. */
1315 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1317 if (! validate_address)
1320 else if (reload_completed)
1322 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1326 return replace_equiv_address (new, XEXP (new, 0));
1329 /* Rest can be handled by simplify_subreg. */
1330 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1333 /* Similar to `operand_subword', but never return 0. If we can't extract
1334 the required subword, put OP into a register and try again. If that fails,
1335 abort. We always validate the address in this case.
1337 MODE is the mode of OP, in case it is CONST_INT. */
1340 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1342 rtx result = operand_subword (op, offset, 1, mode);
1347 if (mode != BLKmode && mode != VOIDmode)
1349 /* If this is a register which can not be accessed by words, copy it
1350 to a pseudo register. */
1352 op = copy_to_reg (op);
1354 op = force_reg (mode, op);
1357 result = operand_subword (op, offset, 1, mode);
1358 gcc_assert (result);
1363 /* Given a compare instruction, swap the operands.
1364 A test instruction is changed into a compare of 0 against the operand. */
1367 reverse_comparison (rtx insn)
1369 rtx body = PATTERN (insn);
1372 if (GET_CODE (body) == SET)
1373 comp = SET_SRC (body);
1375 comp = SET_SRC (XVECEXP (body, 0, 0));
1377 if (GET_CODE (comp) == COMPARE)
1379 rtx op0 = XEXP (comp, 0);
1380 rtx op1 = XEXP (comp, 1);
1381 XEXP (comp, 0) = op1;
1382 XEXP (comp, 1) = op0;
1386 rtx new = gen_rtx_COMPARE (VOIDmode,
1387 CONST0_RTX (GET_MODE (comp)), comp);
1388 if (GET_CODE (body) == SET)
1389 SET_SRC (body) = new;
1391 SET_SRC (XVECEXP (body, 0, 0)) = new;
1395 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1396 or (2) a component ref of something variable. Represent the later with
1397 a NULL expression. */
1400 component_ref_for_mem_expr (tree ref)
1402 tree inner = TREE_OPERAND (ref, 0);
1404 if (TREE_CODE (inner) == COMPONENT_REF)
1405 inner = component_ref_for_mem_expr (inner);
1408 /* Now remove any conversions: they don't change what the underlying
1409 object is. Likewise for SAVE_EXPR. */
1410 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1411 || TREE_CODE (inner) == NON_LVALUE_EXPR
1412 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1413 || TREE_CODE (inner) == SAVE_EXPR)
1414 inner = TREE_OPERAND (inner, 0);
1416 if (! DECL_P (inner))
1420 if (inner == TREE_OPERAND (ref, 0))
1423 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1424 TREE_OPERAND (ref, 1), NULL_TREE);
1427 /* Returns 1 if both MEM_EXPR can be considered equal
1431 mem_expr_equal_p (tree expr1, tree expr2)
1436 if (! expr1 || ! expr2)
1439 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1442 if (TREE_CODE (expr1) == COMPONENT_REF)
1444 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1445 TREE_OPERAND (expr2, 0))
1446 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1447 TREE_OPERAND (expr2, 1));
1449 if (INDIRECT_REF_P (expr1))
1450 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1451 TREE_OPERAND (expr2, 0));
1453 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1454 have been resolved here. */
1455 gcc_assert (DECL_P (expr1));
1457 /* Decls with different pointers can't be equal. */
1461 /* Given REF, a MEM, and T, either the type of X or the expression
1462 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1463 if we are making a new object of this type. BITPOS is nonzero if
1464 there is an offset outstanding on T that will be applied later. */
1467 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1468 HOST_WIDE_INT bitpos)
1470 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1471 tree expr = MEM_EXPR (ref);
1472 rtx offset = MEM_OFFSET (ref);
1473 rtx size = MEM_SIZE (ref);
1474 unsigned int align = MEM_ALIGN (ref);
1475 HOST_WIDE_INT apply_bitpos = 0;
1478 /* It can happen that type_for_mode was given a mode for which there
1479 is no language-level type. In which case it returns NULL, which
1484 type = TYPE_P (t) ? t : TREE_TYPE (t);
1485 if (type == error_mark_node)
1488 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1489 wrong answer, as it assumes that DECL_RTL already has the right alias
1490 info. Callers should not set DECL_RTL until after the call to
1491 set_mem_attributes. */
1492 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1494 /* Get the alias set from the expression or type (perhaps using a
1495 front-end routine) and use it. */
1496 alias = get_alias_set (t);
1498 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1499 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1500 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1501 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (t);
1503 /* If we are making an object of this type, or if this is a DECL, we know
1504 that it is a scalar if the type is not an aggregate. */
1505 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1506 MEM_SCALAR_P (ref) = 1;
1508 /* We can set the alignment from the type if we are making an object,
1509 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1510 if (objectp || TREE_CODE (t) == INDIRECT_REF
1511 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1512 || TYPE_ALIGN_OK (type))
1513 align = MAX (align, TYPE_ALIGN (type));
1515 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1517 if (integer_zerop (TREE_OPERAND (t, 1)))
1518 /* We don't know anything about the alignment. */
1519 align = BITS_PER_UNIT;
1521 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1524 /* If the size is known, we can set that. */
1525 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1526 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1528 /* If T is not a type, we may be able to deduce some more information about
1532 tree base = get_base_address (t);
1533 if (base && DECL_P (base)
1534 && TREE_READONLY (base)
1535 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1536 MEM_READONLY_P (ref) = 1;
1538 if (TREE_THIS_VOLATILE (t))
1539 MEM_VOLATILE_P (ref) = 1;
1541 /* Now remove any conversions: they don't change what the underlying
1542 object is. Likewise for SAVE_EXPR. */
1543 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1544 || TREE_CODE (t) == NON_LVALUE_EXPR
1545 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1546 || TREE_CODE (t) == SAVE_EXPR)
1547 t = TREE_OPERAND (t, 0);
1549 /* If this expression can't be addressed (e.g., it contains a reference
1550 to a non-addressable field), show we don't change its alias set. */
1551 if (! can_address_p (t))
1552 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1554 /* If this is a decl, set the attributes of the MEM from it. */
1558 offset = const0_rtx;
1559 apply_bitpos = bitpos;
1560 size = (DECL_SIZE_UNIT (t)
1561 && host_integerp (DECL_SIZE_UNIT (t), 1)
1562 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1563 align = DECL_ALIGN (t);
1566 /* If this is a constant, we know the alignment. */
1567 else if (CONSTANT_CLASS_P (t))
1569 align = TYPE_ALIGN (type);
1570 #ifdef CONSTANT_ALIGNMENT
1571 align = CONSTANT_ALIGNMENT (t, align);
1575 /* If this is a field reference and not a bit-field, record it. */
1576 /* ??? There is some information that can be gleened from bit-fields,
1577 such as the word offset in the structure that might be modified.
1578 But skip it for now. */
1579 else if (TREE_CODE (t) == COMPONENT_REF
1580 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1582 expr = component_ref_for_mem_expr (t);
1583 offset = const0_rtx;
1584 apply_bitpos = bitpos;
1585 /* ??? Any reason the field size would be different than
1586 the size we got from the type? */
1589 /* If this is an array reference, look for an outer field reference. */
1590 else if (TREE_CODE (t) == ARRAY_REF)
1592 tree off_tree = size_zero_node;
1593 /* We can't modify t, because we use it at the end of the
1599 tree index = TREE_OPERAND (t2, 1);
1600 tree low_bound = array_ref_low_bound (t2);
1601 tree unit_size = array_ref_element_size (t2);
1603 /* We assume all arrays have sizes that are a multiple of a byte.
1604 First subtract the lower bound, if any, in the type of the
1605 index, then convert to sizetype and multiply by the size of
1606 the array element. */
1607 if (! integer_zerop (low_bound))
1608 index = fold (build2 (MINUS_EXPR, TREE_TYPE (index),
1611 off_tree = size_binop (PLUS_EXPR,
1612 size_binop (MULT_EXPR, convert (sizetype,
1616 t2 = TREE_OPERAND (t2, 0);
1618 while (TREE_CODE (t2) == ARRAY_REF);
1624 if (host_integerp (off_tree, 1))
1626 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1627 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1628 align = DECL_ALIGN (t2);
1629 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1631 offset = GEN_INT (ioff);
1632 apply_bitpos = bitpos;
1635 else if (TREE_CODE (t2) == COMPONENT_REF)
1637 expr = component_ref_for_mem_expr (t2);
1638 if (host_integerp (off_tree, 1))
1640 offset = GEN_INT (tree_low_cst (off_tree, 1));
1641 apply_bitpos = bitpos;
1643 /* ??? Any reason the field size would be different than
1644 the size we got from the type? */
1646 else if (flag_argument_noalias > 1
1647 && (INDIRECT_REF_P (t2))
1648 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1655 /* If this is a Fortran indirect argument reference, record the
1657 else if (flag_argument_noalias > 1
1658 && (INDIRECT_REF_P (t))
1659 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1666 /* If we modified OFFSET based on T, then subtract the outstanding
1667 bit position offset. Similarly, increase the size of the accessed
1668 object to contain the negative offset. */
1671 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1673 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1676 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1678 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1679 we're overlapping. */
1684 /* Now set the attributes we computed above. */
1686 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1688 /* If this is already known to be a scalar or aggregate, we are done. */
1689 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1692 /* If it is a reference into an aggregate, this is part of an aggregate.
1693 Otherwise we don't know. */
1694 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1695 || TREE_CODE (t) == ARRAY_RANGE_REF
1696 || TREE_CODE (t) == BIT_FIELD_REF)
1697 MEM_IN_STRUCT_P (ref) = 1;
1701 set_mem_attributes (rtx ref, tree t, int objectp)
1703 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1706 /* Set the decl for MEM to DECL. */
1709 set_mem_attrs_from_reg (rtx mem, rtx reg)
1712 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1713 GEN_INT (REG_OFFSET (reg)),
1714 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1717 /* Set the alias set of MEM to SET. */
1720 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1722 #ifdef ENABLE_CHECKING
1723 /* If the new and old alias sets don't conflict, something is wrong. */
1724 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1727 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1728 MEM_SIZE (mem), MEM_ALIGN (mem),
1732 /* Set the alignment of MEM to ALIGN bits. */
1735 set_mem_align (rtx mem, unsigned int align)
1737 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1738 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1742 /* Set the expr for MEM to EXPR. */
1745 set_mem_expr (rtx mem, tree expr)
1748 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1749 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1752 /* Set the offset of MEM to OFFSET. */
1755 set_mem_offset (rtx mem, rtx offset)
1757 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1758 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1762 /* Set the size of MEM to SIZE. */
1765 set_mem_size (rtx mem, rtx size)
1767 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1768 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1772 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1773 and its address changed to ADDR. (VOIDmode means don't change the mode.
1774 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1775 returned memory location is required to be valid. The memory
1776 attributes are not changed. */
1779 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1783 gcc_assert (MEM_P (memref));
1784 if (mode == VOIDmode)
1785 mode = GET_MODE (memref);
1787 addr = XEXP (memref, 0);
1788 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1789 && (!validate || memory_address_p (mode, addr)))
1794 if (reload_in_progress || reload_completed)
1795 gcc_assert (memory_address_p (mode, addr));
1797 addr = memory_address (mode, addr);
1800 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1803 new = gen_rtx_MEM (mode, addr);
1804 MEM_COPY_ATTRIBUTES (new, memref);
1808 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1809 way we are changing MEMREF, so we only preserve the alias set. */
1812 change_address (rtx memref, enum machine_mode mode, rtx addr)
1814 rtx new = change_address_1 (memref, mode, addr, 1), size;
1815 enum machine_mode mmode = GET_MODE (new);
1818 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1819 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1821 /* If there are no changes, just return the original memory reference. */
1824 if (MEM_ATTRS (memref) == 0
1825 || (MEM_EXPR (memref) == NULL
1826 && MEM_OFFSET (memref) == NULL
1827 && MEM_SIZE (memref) == size
1828 && MEM_ALIGN (memref) == align))
1831 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1832 MEM_COPY_ATTRIBUTES (new, memref);
1836 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1841 /* Return a memory reference like MEMREF, but with its mode changed
1842 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1843 nonzero, the memory address is forced to be valid.
1844 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1845 and caller is responsible for adjusting MEMREF base register. */
1848 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1849 int validate, int adjust)
1851 rtx addr = XEXP (memref, 0);
1853 rtx memoffset = MEM_OFFSET (memref);
1855 unsigned int memalign = MEM_ALIGN (memref);
1857 /* If there are no changes, just return the original memory reference. */
1858 if (mode == GET_MODE (memref) && !offset
1859 && (!validate || memory_address_p (mode, addr)))
1862 /* ??? Prefer to create garbage instead of creating shared rtl.
1863 This may happen even if offset is nonzero -- consider
1864 (plus (plus reg reg) const_int) -- so do this always. */
1865 addr = copy_rtx (addr);
1869 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1870 object, we can merge it into the LO_SUM. */
1871 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1873 && (unsigned HOST_WIDE_INT) offset
1874 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1875 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1876 plus_constant (XEXP (addr, 1), offset));
1878 addr = plus_constant (addr, offset);
1881 new = change_address_1 (memref, mode, addr, validate);
1883 /* Compute the new values of the memory attributes due to this adjustment.
1884 We add the offsets and update the alignment. */
1886 memoffset = GEN_INT (offset + INTVAL (memoffset));
1888 /* Compute the new alignment by taking the MIN of the alignment and the
1889 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1894 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1896 /* We can compute the size in a number of ways. */
1897 if (GET_MODE (new) != BLKmode)
1898 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1899 else if (MEM_SIZE (memref))
1900 size = plus_constant (MEM_SIZE (memref), -offset);
1902 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1903 memoffset, size, memalign, GET_MODE (new));
1905 /* At some point, we should validate that this offset is within the object,
1906 if all the appropriate values are known. */
1910 /* Return a memory reference like MEMREF, but with its mode changed
1911 to MODE and its address changed to ADDR, which is assumed to be
1912 MEMREF offseted by OFFSET bytes. If VALIDATE is
1913 nonzero, the memory address is forced to be valid. */
1916 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1917 HOST_WIDE_INT offset, int validate)
1919 memref = change_address_1 (memref, VOIDmode, addr, validate);
1920 return adjust_address_1 (memref, mode, offset, validate, 0);
1923 /* Return a memory reference like MEMREF, but whose address is changed by
1924 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1925 known to be in OFFSET (possibly 1). */
1928 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1930 rtx new, addr = XEXP (memref, 0);
1932 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1934 /* At this point we don't know _why_ the address is invalid. It
1935 could have secondary memory references, multiplies or anything.
1937 However, if we did go and rearrange things, we can wind up not
1938 being able to recognize the magic around pic_offset_table_rtx.
1939 This stuff is fragile, and is yet another example of why it is
1940 bad to expose PIC machinery too early. */
1941 if (! memory_address_p (GET_MODE (memref), new)
1942 && GET_CODE (addr) == PLUS
1943 && XEXP (addr, 0) == pic_offset_table_rtx)
1945 addr = force_reg (GET_MODE (addr), addr);
1946 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1949 update_temp_slot_address (XEXP (memref, 0), new);
1950 new = change_address_1 (memref, VOIDmode, new, 1);
1952 /* If there are no changes, just return the original memory reference. */
1956 /* Update the alignment to reflect the offset. Reset the offset, which
1959 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1960 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1965 /* Return a memory reference like MEMREF, but with its address changed to
1966 ADDR. The caller is asserting that the actual piece of memory pointed
1967 to is the same, just the form of the address is being changed, such as
1968 by putting something into a register. */
1971 replace_equiv_address (rtx memref, rtx addr)
1973 /* change_address_1 copies the memory attribute structure without change
1974 and that's exactly what we want here. */
1975 update_temp_slot_address (XEXP (memref, 0), addr);
1976 return change_address_1 (memref, VOIDmode, addr, 1);
1979 /* Likewise, but the reference is not required to be valid. */
1982 replace_equiv_address_nv (rtx memref, rtx addr)
1984 return change_address_1 (memref, VOIDmode, addr, 0);
1987 /* Return a memory reference like MEMREF, but with its mode widened to
1988 MODE and offset by OFFSET. This would be used by targets that e.g.
1989 cannot issue QImode memory operations and have to use SImode memory
1990 operations plus masking logic. */
1993 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
1995 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
1996 tree expr = MEM_EXPR (new);
1997 rtx memoffset = MEM_OFFSET (new);
1998 unsigned int size = GET_MODE_SIZE (mode);
2000 /* If there are no changes, just return the original memory reference. */
2004 /* If we don't know what offset we were at within the expression, then
2005 we can't know if we've overstepped the bounds. */
2011 if (TREE_CODE (expr) == COMPONENT_REF)
2013 tree field = TREE_OPERAND (expr, 1);
2014 tree offset = component_ref_field_offset (expr);
2016 if (! DECL_SIZE_UNIT (field))
2022 /* Is the field at least as large as the access? If so, ok,
2023 otherwise strip back to the containing structure. */
2024 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2025 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2026 && INTVAL (memoffset) >= 0)
2029 if (! host_integerp (offset, 1))
2035 expr = TREE_OPERAND (expr, 0);
2037 = (GEN_INT (INTVAL (memoffset)
2038 + tree_low_cst (offset, 1)
2039 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2042 /* Similarly for the decl. */
2043 else if (DECL_P (expr)
2044 && DECL_SIZE_UNIT (expr)
2045 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2046 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2047 && (! memoffset || INTVAL (memoffset) >= 0))
2051 /* The widened memory access overflows the expression, which means
2052 that it could alias another expression. Zap it. */
2059 memoffset = NULL_RTX;
2061 /* The widened memory may alias other stuff, so zap the alias set. */
2062 /* ??? Maybe use get_alias_set on any remaining expression. */
2064 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2065 MEM_ALIGN (new), mode);
2070 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2073 gen_label_rtx (void)
2075 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2076 NULL, label_num++, NULL);
2079 /* For procedure integration. */
2081 /* Install new pointers to the first and last insns in the chain.
2082 Also, set cur_insn_uid to one higher than the last in use.
2083 Used for an inline-procedure after copying the insn chain. */
2086 set_new_first_and_last_insn (rtx first, rtx last)
2094 for (insn = first; insn; insn = NEXT_INSN (insn))
2095 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2100 /* Go through all the RTL insn bodies and copy any invalid shared
2101 structure. This routine should only be called once. */
2104 unshare_all_rtl_1 (tree fndecl, rtx insn)
2108 /* Make sure that virtual parameters are not shared. */
2109 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2110 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2112 /* Make sure that virtual stack slots are not shared. */
2113 unshare_all_decls (DECL_INITIAL (fndecl));
2115 /* Unshare just about everything else. */
2116 unshare_all_rtl_in_chain (insn);
2118 /* Make sure the addresses of stack slots found outside the insn chain
2119 (such as, in DECL_RTL of a variable) are not shared
2120 with the insn chain.
2122 This special care is necessary when the stack slot MEM does not
2123 actually appear in the insn chain. If it does appear, its address
2124 is unshared from all else at that point. */
2125 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2128 /* Go through all the RTL insn bodies and copy any invalid shared
2129 structure, again. This is a fairly expensive thing to do so it
2130 should be done sparingly. */
2133 unshare_all_rtl_again (rtx insn)
2138 for (p = insn; p; p = NEXT_INSN (p))
2141 reset_used_flags (PATTERN (p));
2142 reset_used_flags (REG_NOTES (p));
2143 reset_used_flags (LOG_LINKS (p));
2146 /* Make sure that virtual stack slots are not shared. */
2147 reset_used_decls (DECL_INITIAL (cfun->decl));
2149 /* Make sure that virtual parameters are not shared. */
2150 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2151 reset_used_flags (DECL_RTL (decl));
2153 reset_used_flags (stack_slot_list);
2155 unshare_all_rtl_1 (cfun->decl, insn);
2159 unshare_all_rtl (void)
2161 unshare_all_rtl_1 (current_function_decl, get_insns ());
2164 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2165 Recursively does the same for subexpressions. */
2168 verify_rtx_sharing (rtx orig, rtx insn)
2173 const char *format_ptr;
2178 code = GET_CODE (x);
2180 /* These types may be freely shared. */
2195 /* SCRATCH must be shared because they represent distinct values. */
2197 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2202 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2203 a LABEL_REF, it isn't sharable. */
2204 if (GET_CODE (XEXP (x, 0)) == PLUS
2205 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2206 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2211 /* A MEM is allowed to be shared if its address is constant. */
2212 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2213 || reload_completed || reload_in_progress)
2222 /* This rtx may not be shared. If it has already been seen,
2223 replace it with a copy of itself. */
2224 #ifdef ENABLE_CHECKING
2225 if (RTX_FLAG (x, used))
2227 error ("Invalid rtl sharing found in the insn");
2229 error ("Shared rtx");
2231 internal_error ("Internal consistency failure");
2234 gcc_assert (!RTX_FLAG (x, used));
2236 RTX_FLAG (x, used) = 1;
2238 /* Now scan the subexpressions recursively. */
2240 format_ptr = GET_RTX_FORMAT (code);
2242 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2244 switch (*format_ptr++)
2247 verify_rtx_sharing (XEXP (x, i), insn);
2251 if (XVEC (x, i) != NULL)
2254 int len = XVECLEN (x, i);
2256 for (j = 0; j < len; j++)
2258 /* We allow sharing of ASM_OPERANDS inside single
2260 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2261 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2263 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2265 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2274 /* Go through all the RTL insn bodies and check that there is no unexpected
2275 sharing in between the subexpressions. */
2278 verify_rtl_sharing (void)
2282 for (p = get_insns (); p; p = NEXT_INSN (p))
2285 reset_used_flags (PATTERN (p));
2286 reset_used_flags (REG_NOTES (p));
2287 reset_used_flags (LOG_LINKS (p));
2290 for (p = get_insns (); p; p = NEXT_INSN (p))
2293 verify_rtx_sharing (PATTERN (p), p);
2294 verify_rtx_sharing (REG_NOTES (p), p);
2295 verify_rtx_sharing (LOG_LINKS (p), p);
2299 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2300 Assumes the mark bits are cleared at entry. */
2303 unshare_all_rtl_in_chain (rtx insn)
2305 for (; insn; insn = NEXT_INSN (insn))
2308 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2309 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2310 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2314 /* Go through all virtual stack slots of a function and copy any
2315 shared structure. */
2317 unshare_all_decls (tree blk)
2321 /* Copy shared decls. */
2322 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2323 if (DECL_RTL_SET_P (t))
2324 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2326 /* Now process sub-blocks. */
2327 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2328 unshare_all_decls (t);
2331 /* Go through all virtual stack slots of a function and mark them as
2334 reset_used_decls (tree blk)
2339 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2340 if (DECL_RTL_SET_P (t))
2341 reset_used_flags (DECL_RTL (t));
2343 /* Now process sub-blocks. */
2344 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2345 reset_used_decls (t);
2348 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2349 Recursively does the same for subexpressions. Uses
2350 copy_rtx_if_shared_1 to reduce stack space. */
2353 copy_rtx_if_shared (rtx orig)
2355 copy_rtx_if_shared_1 (&orig);
2359 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2360 use. Recursively does the same for subexpressions. */
2363 copy_rtx_if_shared_1 (rtx *orig1)
2369 const char *format_ptr;
2373 /* Repeat is used to turn tail-recursion into iteration. */
2380 code = GET_CODE (x);
2382 /* These types may be freely shared. */
2396 /* SCRATCH must be shared because they represent distinct values. */
2399 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2404 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2405 a LABEL_REF, it isn't sharable. */
2406 if (GET_CODE (XEXP (x, 0)) == PLUS
2407 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2408 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2417 /* The chain of insns is not being copied. */
2424 /* This rtx may not be shared. If it has already been seen,
2425 replace it with a copy of itself. */
2427 if (RTX_FLAG (x, used))
2431 copy = rtx_alloc (code);
2432 memcpy (copy, x, RTX_SIZE (code));
2436 RTX_FLAG (x, used) = 1;
2438 /* Now scan the subexpressions recursively.
2439 We can store any replaced subexpressions directly into X
2440 since we know X is not shared! Any vectors in X
2441 must be copied if X was copied. */
2443 format_ptr = GET_RTX_FORMAT (code);
2444 length = GET_RTX_LENGTH (code);
2447 for (i = 0; i < length; i++)
2449 switch (*format_ptr++)
2453 copy_rtx_if_shared_1 (last_ptr);
2454 last_ptr = &XEXP (x, i);
2458 if (XVEC (x, i) != NULL)
2461 int len = XVECLEN (x, i);
2463 /* Copy the vector iff I copied the rtx and the length
2465 if (copied && len > 0)
2466 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2468 /* Call recursively on all inside the vector. */
2469 for (j = 0; j < len; j++)
2472 copy_rtx_if_shared_1 (last_ptr);
2473 last_ptr = &XVECEXP (x, i, j);
2488 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2489 to look for shared sub-parts. */
2492 reset_used_flags (rtx x)
2496 const char *format_ptr;
2499 /* Repeat is used to turn tail-recursion into iteration. */
2504 code = GET_CODE (x);
2506 /* These types may be freely shared so we needn't do any resetting
2527 /* The chain of insns is not being copied. */
2534 RTX_FLAG (x, used) = 0;
2536 format_ptr = GET_RTX_FORMAT (code);
2537 length = GET_RTX_LENGTH (code);
2539 for (i = 0; i < length; i++)
2541 switch (*format_ptr++)
2549 reset_used_flags (XEXP (x, i));
2553 for (j = 0; j < XVECLEN (x, i); j++)
2554 reset_used_flags (XVECEXP (x, i, j));
2560 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2561 to look for shared sub-parts. */
2564 set_used_flags (rtx x)
2568 const char *format_ptr;
2573 code = GET_CODE (x);
2575 /* These types may be freely shared so we needn't do any resetting
2596 /* The chain of insns is not being copied. */
2603 RTX_FLAG (x, used) = 1;
2605 format_ptr = GET_RTX_FORMAT (code);
2606 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2608 switch (*format_ptr++)
2611 set_used_flags (XEXP (x, i));
2615 for (j = 0; j < XVECLEN (x, i); j++)
2616 set_used_flags (XVECEXP (x, i, j));
2622 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2623 Return X or the rtx for the pseudo reg the value of X was copied into.
2624 OTHER must be valid as a SET_DEST. */
2627 make_safe_from (rtx x, rtx other)
2630 switch (GET_CODE (other))
2633 other = SUBREG_REG (other);
2635 case STRICT_LOW_PART:
2638 other = XEXP (other, 0);
2647 && GET_CODE (x) != SUBREG)
2649 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2650 || reg_mentioned_p (other, x))))
2652 rtx temp = gen_reg_rtx (GET_MODE (x));
2653 emit_move_insn (temp, x);
2659 /* Emission of insns (adding them to the doubly-linked list). */
2661 /* Return the first insn of the current sequence or current function. */
2669 /* Specify a new insn as the first in the chain. */
2672 set_first_insn (rtx insn)
2674 gcc_assert (!PREV_INSN (insn));
2678 /* Return the last insn emitted in current sequence or current function. */
2681 get_last_insn (void)
2686 /* Specify a new insn as the last in the chain. */
2689 set_last_insn (rtx insn)
2691 gcc_assert (!NEXT_INSN (insn));
2695 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2698 get_last_insn_anywhere (void)
2700 struct sequence_stack *stack;
2703 for (stack = seq_stack; stack; stack = stack->next)
2704 if (stack->last != 0)
2709 /* Return the first nonnote insn emitted in current sequence or current
2710 function. This routine looks inside SEQUENCEs. */
2713 get_first_nonnote_insn (void)
2717 for (insn = first_insn; insn && NOTE_P (insn); insn = next_insn (insn));
2721 /* Return the last nonnote insn emitted in current sequence or current
2722 function. This routine looks inside SEQUENCEs. */
2725 get_last_nonnote_insn (void)
2729 for (insn = last_insn; insn && NOTE_P (insn); insn = previous_insn (insn));
2733 /* Return a number larger than any instruction's uid in this function. */
2738 return cur_insn_uid;
2741 /* Renumber instructions so that no instruction UIDs are wasted. */
2744 renumber_insns (FILE *stream)
2748 /* If we're not supposed to renumber instructions, don't. */
2749 if (!flag_renumber_insns)
2752 /* If there aren't that many instructions, then it's not really
2753 worth renumbering them. */
2754 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2759 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2762 fprintf (stream, "Renumbering insn %d to %d\n",
2763 INSN_UID (insn), cur_insn_uid);
2764 INSN_UID (insn) = cur_insn_uid++;
2768 /* Return the next insn. If it is a SEQUENCE, return the first insn
2772 next_insn (rtx insn)
2776 insn = NEXT_INSN (insn);
2777 if (insn && NONJUMP_INSN_P (insn)
2778 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2779 insn = XVECEXP (PATTERN (insn), 0, 0);
2785 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2789 previous_insn (rtx insn)
2793 insn = PREV_INSN (insn);
2794 if (insn && NONJUMP_INSN_P (insn)
2795 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2796 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2802 /* Return the next insn after INSN that is not a NOTE. This routine does not
2803 look inside SEQUENCEs. */
2806 next_nonnote_insn (rtx insn)
2810 insn = NEXT_INSN (insn);
2811 if (insn == 0 || !NOTE_P (insn))
2818 /* Return the previous insn before INSN that is not a NOTE. This routine does
2819 not look inside SEQUENCEs. */
2822 prev_nonnote_insn (rtx insn)
2826 insn = PREV_INSN (insn);
2827 if (insn == 0 || !NOTE_P (insn))
2834 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2835 or 0, if there is none. This routine does not look inside
2839 next_real_insn (rtx insn)
2843 insn = NEXT_INSN (insn);
2844 if (insn == 0 || INSN_P (insn))
2851 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2852 or 0, if there is none. This routine does not look inside
2856 prev_real_insn (rtx insn)
2860 insn = PREV_INSN (insn);
2861 if (insn == 0 || INSN_P (insn))
2868 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2869 This routine does not look inside SEQUENCEs. */
2872 last_call_insn (void)
2876 for (insn = get_last_insn ();
2877 insn && !CALL_P (insn);
2878 insn = PREV_INSN (insn))
2884 /* Find the next insn after INSN that really does something. This routine
2885 does not look inside SEQUENCEs. Until reload has completed, this is the
2886 same as next_real_insn. */
2889 active_insn_p (rtx insn)
2891 return (CALL_P (insn) || JUMP_P (insn)
2892 || (NONJUMP_INSN_P (insn)
2893 && (! reload_completed
2894 || (GET_CODE (PATTERN (insn)) != USE
2895 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2899 next_active_insn (rtx insn)
2903 insn = NEXT_INSN (insn);
2904 if (insn == 0 || active_insn_p (insn))
2911 /* Find the last insn before INSN that really does something. This routine
2912 does not look inside SEQUENCEs. Until reload has completed, this is the
2913 same as prev_real_insn. */
2916 prev_active_insn (rtx insn)
2920 insn = PREV_INSN (insn);
2921 if (insn == 0 || active_insn_p (insn))
2928 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2931 next_label (rtx insn)
2935 insn = NEXT_INSN (insn);
2936 if (insn == 0 || LABEL_P (insn))
2943 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2946 prev_label (rtx insn)
2950 insn = PREV_INSN (insn);
2951 if (insn == 0 || LABEL_P (insn))
2958 /* Return the last label to mark the same position as LABEL. Return null
2959 if LABEL itself is null. */
2962 skip_consecutive_labels (rtx label)
2966 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
2974 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2975 and REG_CC_USER notes so we can find it. */
2978 link_cc0_insns (rtx insn)
2980 rtx user = next_nonnote_insn (insn);
2982 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
2983 user = XVECEXP (PATTERN (user), 0, 0);
2985 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2987 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2990 /* Return the next insn that uses CC0 after INSN, which is assumed to
2991 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2992 applied to the result of this function should yield INSN).
2994 Normally, this is simply the next insn. However, if a REG_CC_USER note
2995 is present, it contains the insn that uses CC0.
2997 Return 0 if we can't find the insn. */
3000 next_cc0_user (rtx insn)
3002 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3005 return XEXP (note, 0);
3007 insn = next_nonnote_insn (insn);
3008 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3009 insn = XVECEXP (PATTERN (insn), 0, 0);
3011 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3017 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3018 note, it is the previous insn. */
3021 prev_cc0_setter (rtx insn)
3023 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3026 return XEXP (note, 0);
3028 insn = prev_nonnote_insn (insn);
3029 gcc_assert (sets_cc0_p (PATTERN (insn)));
3035 /* Increment the label uses for all labels present in rtx. */
3038 mark_label_nuses (rtx x)
3044 code = GET_CODE (x);
3045 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3046 LABEL_NUSES (XEXP (x, 0))++;
3048 fmt = GET_RTX_FORMAT (code);
3049 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3052 mark_label_nuses (XEXP (x, i));
3053 else if (fmt[i] == 'E')
3054 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3055 mark_label_nuses (XVECEXP (x, i, j));
3060 /* Try splitting insns that can be split for better scheduling.
3061 PAT is the pattern which might split.
3062 TRIAL is the insn providing PAT.
3063 LAST is nonzero if we should return the last insn of the sequence produced.
3065 If this routine succeeds in splitting, it returns the first or last
3066 replacement insn depending on the value of LAST. Otherwise, it
3067 returns TRIAL. If the insn to be returned can be split, it will be. */
3070 try_split (rtx pat, rtx trial, int last)
3072 rtx before = PREV_INSN (trial);
3073 rtx after = NEXT_INSN (trial);
3074 int has_barrier = 0;
3078 rtx insn_last, insn;
3081 if (any_condjump_p (trial)
3082 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3083 split_branch_probability = INTVAL (XEXP (note, 0));
3084 probability = split_branch_probability;
3086 seq = split_insns (pat, trial);
3088 split_branch_probability = -1;
3090 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3091 We may need to handle this specially. */
3092 if (after && BARRIER_P (after))
3095 after = NEXT_INSN (after);
3101 /* Avoid infinite loop if any insn of the result matches
3102 the original pattern. */
3106 if (INSN_P (insn_last)
3107 && rtx_equal_p (PATTERN (insn_last), pat))
3109 if (!NEXT_INSN (insn_last))
3111 insn_last = NEXT_INSN (insn_last);
3115 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3119 mark_jump_label (PATTERN (insn), insn, 0);
3121 if (probability != -1
3122 && any_condjump_p (insn)
3123 && !find_reg_note (insn, REG_BR_PROB, 0))
3125 /* We can preserve the REG_BR_PROB notes only if exactly
3126 one jump is created, otherwise the machine description
3127 is responsible for this step using
3128 split_branch_probability variable. */
3129 gcc_assert (njumps == 1);
3131 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3132 GEN_INT (probability),
3138 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3139 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3142 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3145 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3148 *p = CALL_INSN_FUNCTION_USAGE (trial);
3149 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3153 /* Copy notes, particularly those related to the CFG. */
3154 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3156 switch (REG_NOTE_KIND (note))
3160 while (insn != NULL_RTX)
3163 || (flag_non_call_exceptions && INSN_P (insn)
3164 && may_trap_p (PATTERN (insn))))
3166 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3169 insn = PREV_INSN (insn);
3175 case REG_ALWAYS_RETURN:
3177 while (insn != NULL_RTX)
3181 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3184 insn = PREV_INSN (insn);
3188 case REG_NON_LOCAL_GOTO:
3190 while (insn != NULL_RTX)
3194 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3197 insn = PREV_INSN (insn);
3206 /* If there are LABELS inside the split insns increment the
3207 usage count so we don't delete the label. */
3208 if (NONJUMP_INSN_P (trial))
3211 while (insn != NULL_RTX)
3213 if (NONJUMP_INSN_P (insn))
3214 mark_label_nuses (PATTERN (insn));
3216 insn = PREV_INSN (insn);
3220 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3222 delete_insn (trial);
3224 emit_barrier_after (tem);
3226 /* Recursively call try_split for each new insn created; by the
3227 time control returns here that insn will be fully split, so
3228 set LAST and continue from the insn after the one returned.
3229 We can't use next_active_insn here since AFTER may be a note.
3230 Ignore deleted insns, which can be occur if not optimizing. */
3231 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3232 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3233 tem = try_split (PATTERN (tem), tem, 1);
3235 /* Return either the first or the last insn, depending on which was
3238 ? (after ? PREV_INSN (after) : last_insn)
3239 : NEXT_INSN (before);
3242 /* Make and return an INSN rtx, initializing all its slots.
3243 Store PATTERN in the pattern slots. */
3246 make_insn_raw (rtx pattern)
3250 insn = rtx_alloc (INSN);
3252 INSN_UID (insn) = cur_insn_uid++;
3253 PATTERN (insn) = pattern;
3254 INSN_CODE (insn) = -1;
3255 LOG_LINKS (insn) = NULL;
3256 REG_NOTES (insn) = NULL;
3257 INSN_LOCATOR (insn) = 0;
3258 BLOCK_FOR_INSN (insn) = NULL;
3260 #ifdef ENABLE_RTL_CHECKING
3263 && (returnjump_p (insn)
3264 || (GET_CODE (insn) == SET
3265 && SET_DEST (insn) == pc_rtx)))
3267 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3275 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3278 make_jump_insn_raw (rtx pattern)
3282 insn = rtx_alloc (JUMP_INSN);
3283 INSN_UID (insn) = cur_insn_uid++;
3285 PATTERN (insn) = pattern;
3286 INSN_CODE (insn) = -1;
3287 LOG_LINKS (insn) = NULL;
3288 REG_NOTES (insn) = NULL;
3289 JUMP_LABEL (insn) = NULL;
3290 INSN_LOCATOR (insn) = 0;
3291 BLOCK_FOR_INSN (insn) = NULL;
3296 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3299 make_call_insn_raw (rtx pattern)
3303 insn = rtx_alloc (CALL_INSN);
3304 INSN_UID (insn) = cur_insn_uid++;
3306 PATTERN (insn) = pattern;
3307 INSN_CODE (insn) = -1;
3308 LOG_LINKS (insn) = NULL;
3309 REG_NOTES (insn) = NULL;
3310 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3311 INSN_LOCATOR (insn) = 0;
3312 BLOCK_FOR_INSN (insn) = NULL;
3317 /* Add INSN to the end of the doubly-linked list.
3318 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3323 PREV_INSN (insn) = last_insn;
3324 NEXT_INSN (insn) = 0;
3326 if (NULL != last_insn)
3327 NEXT_INSN (last_insn) = insn;
3329 if (NULL == first_insn)
3335 /* Add INSN into the doubly-linked list after insn AFTER. This and
3336 the next should be the only functions called to insert an insn once
3337 delay slots have been filled since only they know how to update a
3341 add_insn_after (rtx insn, rtx after)
3343 rtx next = NEXT_INSN (after);
3346 gcc_assert (!optimize || !INSN_DELETED_P (after));
3348 NEXT_INSN (insn) = next;
3349 PREV_INSN (insn) = after;
3353 PREV_INSN (next) = insn;
3354 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3355 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3357 else if (last_insn == after)
3361 struct sequence_stack *stack = seq_stack;
3362 /* Scan all pending sequences too. */
3363 for (; stack; stack = stack->next)
3364 if (after == stack->last)
3373 if (!BARRIER_P (after)
3374 && !BARRIER_P (insn)
3375 && (bb = BLOCK_FOR_INSN (after)))
3377 set_block_for_insn (insn, bb);
3379 bb->flags |= BB_DIRTY;
3380 /* Should not happen as first in the BB is always
3381 either NOTE or LABEL. */
3382 if (BB_END (bb) == after
3383 /* Avoid clobbering of structure when creating new BB. */
3384 && !BARRIER_P (insn)
3386 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3390 NEXT_INSN (after) = insn;
3391 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3393 rtx sequence = PATTERN (after);
3394 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3398 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3399 the previous should be the only functions called to insert an insn once
3400 delay slots have been filled since only they know how to update a
3404 add_insn_before (rtx insn, rtx before)
3406 rtx prev = PREV_INSN (before);
3409 gcc_assert (!optimize || !INSN_DELETED_P (before));
3411 PREV_INSN (insn) = prev;
3412 NEXT_INSN (insn) = before;
3416 NEXT_INSN (prev) = insn;
3417 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3419 rtx sequence = PATTERN (prev);
3420 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3423 else if (first_insn == before)
3427 struct sequence_stack *stack = seq_stack;
3428 /* Scan all pending sequences too. */
3429 for (; stack; stack = stack->next)
3430 if (before == stack->first)
3432 stack->first = insn;
3439 if (!BARRIER_P (before)
3440 && !BARRIER_P (insn)
3441 && (bb = BLOCK_FOR_INSN (before)))
3443 set_block_for_insn (insn, bb);
3445 bb->flags |= BB_DIRTY;
3446 /* Should not happen as first in the BB is always either NOTE or
3448 gcc_assert (BB_HEAD (bb) != insn
3449 /* Avoid clobbering of structure when creating new BB. */
3452 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK));
3455 PREV_INSN (before) = insn;
3456 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3457 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3460 /* Remove an insn from its doubly-linked list. This function knows how
3461 to handle sequences. */
3463 remove_insn (rtx insn)
3465 rtx next = NEXT_INSN (insn);
3466 rtx prev = PREV_INSN (insn);
3471 NEXT_INSN (prev) = next;
3472 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3474 rtx sequence = PATTERN (prev);
3475 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3478 else if (first_insn == insn)
3482 struct sequence_stack *stack = seq_stack;
3483 /* Scan all pending sequences too. */
3484 for (; stack; stack = stack->next)
3485 if (insn == stack->first)
3487 stack->first = next;
3496 PREV_INSN (next) = prev;
3497 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3498 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3500 else if (last_insn == insn)
3504 struct sequence_stack *stack = seq_stack;
3505 /* Scan all pending sequences too. */
3506 for (; stack; stack = stack->next)
3507 if (insn == stack->last)
3515 if (!BARRIER_P (insn)
3516 && (bb = BLOCK_FOR_INSN (insn)))
3519 bb->flags |= BB_DIRTY;
3520 if (BB_HEAD (bb) == insn)
3522 /* Never ever delete the basic block note without deleting whole
3524 gcc_assert (!NOTE_P (insn));
3525 BB_HEAD (bb) = next;
3527 if (BB_END (bb) == insn)
3532 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3535 add_function_usage_to (rtx call_insn, rtx call_fusage)
3537 gcc_assert (call_insn && CALL_P (call_insn));
3539 /* Put the register usage information on the CALL. If there is already
3540 some usage information, put ours at the end. */
3541 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3545 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3546 link = XEXP (link, 1))
3549 XEXP (link, 1) = call_fusage;
3552 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3555 /* Delete all insns made since FROM.
3556 FROM becomes the new last instruction. */
3559 delete_insns_since (rtx from)
3564 NEXT_INSN (from) = 0;
3568 /* This function is deprecated, please use sequences instead.
3570 Move a consecutive bunch of insns to a different place in the chain.
3571 The insns to be moved are those between FROM and TO.
3572 They are moved to a new position after the insn AFTER.
3573 AFTER must not be FROM or TO or any insn in between.
3575 This function does not know about SEQUENCEs and hence should not be
3576 called after delay-slot filling has been done. */
3579 reorder_insns_nobb (rtx from, rtx to, rtx after)
3581 /* Splice this bunch out of where it is now. */
3582 if (PREV_INSN (from))
3583 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3585 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3586 if (last_insn == to)
3587 last_insn = PREV_INSN (from);
3588 if (first_insn == from)
3589 first_insn = NEXT_INSN (to);
3591 /* Make the new neighbors point to it and it to them. */
3592 if (NEXT_INSN (after))
3593 PREV_INSN (NEXT_INSN (after)) = to;
3595 NEXT_INSN (to) = NEXT_INSN (after);
3596 PREV_INSN (from) = after;
3597 NEXT_INSN (after) = from;
3598 if (after == last_insn)
3602 /* Same as function above, but take care to update BB boundaries. */
3604 reorder_insns (rtx from, rtx to, rtx after)
3606 rtx prev = PREV_INSN (from);
3607 basic_block bb, bb2;
3609 reorder_insns_nobb (from, to, after);
3611 if (!BARRIER_P (after)
3612 && (bb = BLOCK_FOR_INSN (after)))
3615 bb->flags |= BB_DIRTY;
3617 if (!BARRIER_P (from)
3618 && (bb2 = BLOCK_FOR_INSN (from)))
3620 if (BB_END (bb2) == to)
3621 BB_END (bb2) = prev;
3622 bb2->flags |= BB_DIRTY;
3625 if (BB_END (bb) == after)
3628 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3630 set_block_for_insn (x, bb);
3634 /* Return the line note insn preceding INSN. */
3637 find_line_note (rtx insn)
3639 if (no_line_numbers)
3642 for (; insn; insn = PREV_INSN (insn))
3644 && NOTE_LINE_NUMBER (insn) >= 0)
3650 /* Remove unnecessary notes from the instruction stream. */
3653 remove_unnecessary_notes (void)
3655 rtx eh_stack = NULL_RTX;
3660 /* We must not remove the first instruction in the function because
3661 the compiler depends on the first instruction being a note. */
3662 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3664 /* Remember what's next. */
3665 next = NEXT_INSN (insn);
3667 /* We're only interested in notes. */
3671 switch (NOTE_LINE_NUMBER (insn))
3673 case NOTE_INSN_DELETED:
3677 case NOTE_INSN_EH_REGION_BEG:
3678 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3681 case NOTE_INSN_EH_REGION_END:
3682 /* Too many end notes. */
3683 gcc_assert (eh_stack);
3684 /* Mismatched nesting. */
3685 gcc_assert (NOTE_EH_HANDLER (XEXP (eh_stack, 0))
3686 == NOTE_EH_HANDLER (insn));
3688 eh_stack = XEXP (eh_stack, 1);
3689 free_INSN_LIST_node (tmp);
3692 case NOTE_INSN_BLOCK_BEG:
3693 case NOTE_INSN_BLOCK_END:
3694 /* BLOCK_END and BLOCK_BEG notes only exist in the `final' pass. */
3702 /* Too many EH_REGION_BEG notes. */
3703 gcc_assert (!eh_stack);
3707 /* Emit insn(s) of given code and pattern
3708 at a specified place within the doubly-linked list.
3710 All of the emit_foo global entry points accept an object
3711 X which is either an insn list or a PATTERN of a single
3714 There are thus a few canonical ways to generate code and
3715 emit it at a specific place in the instruction stream. For
3716 example, consider the instruction named SPOT and the fact that
3717 we would like to emit some instructions before SPOT. We might
3721 ... emit the new instructions ...
3722 insns_head = get_insns ();
3725 emit_insn_before (insns_head, SPOT);
3727 It used to be common to generate SEQUENCE rtl instead, but that
3728 is a relic of the past which no longer occurs. The reason is that
3729 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3730 generated would almost certainly die right after it was created. */
3732 /* Make X be output before the instruction BEFORE. */
3735 emit_insn_before_noloc (rtx x, rtx before)
3740 gcc_assert (before);
3745 switch (GET_CODE (x))
3756 rtx next = NEXT_INSN (insn);
3757 add_insn_before (insn, before);
3763 #ifdef ENABLE_RTL_CHECKING
3770 last = make_insn_raw (x);
3771 add_insn_before (last, before);
3778 /* Make an instruction with body X and code JUMP_INSN
3779 and output it before the instruction BEFORE. */
3782 emit_jump_insn_before_noloc (rtx x, rtx before)
3784 rtx insn, last = NULL_RTX;
3786 gcc_assert (before);
3788 switch (GET_CODE (x))
3799 rtx next = NEXT_INSN (insn);
3800 add_insn_before (insn, before);
3806 #ifdef ENABLE_RTL_CHECKING
3813 last = make_jump_insn_raw (x);
3814 add_insn_before (last, before);
3821 /* Make an instruction with body X and code CALL_INSN
3822 and output it before the instruction BEFORE. */
3825 emit_call_insn_before_noloc (rtx x, rtx before)
3827 rtx last = NULL_RTX, insn;
3829 gcc_assert (before);
3831 switch (GET_CODE (x))
3842 rtx next = NEXT_INSN (insn);
3843 add_insn_before (insn, before);
3849 #ifdef ENABLE_RTL_CHECKING
3856 last = make_call_insn_raw (x);
3857 add_insn_before (last, before);
3864 /* Make an insn of code BARRIER
3865 and output it before the insn BEFORE. */
3868 emit_barrier_before (rtx before)
3870 rtx insn = rtx_alloc (BARRIER);
3872 INSN_UID (insn) = cur_insn_uid++;
3874 add_insn_before (insn, before);
3878 /* Emit the label LABEL before the insn BEFORE. */
3881 emit_label_before (rtx label, rtx before)
3883 /* This can be called twice for the same label as a result of the
3884 confusion that follows a syntax error! So make it harmless. */
3885 if (INSN_UID (label) == 0)
3887 INSN_UID (label) = cur_insn_uid++;
3888 add_insn_before (label, before);
3894 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3897 emit_note_before (int subtype, rtx before)
3899 rtx note = rtx_alloc (NOTE);
3900 INSN_UID (note) = cur_insn_uid++;
3901 #ifndef USE_MAPPED_LOCATION
3902 NOTE_SOURCE_FILE (note) = 0;
3904 NOTE_LINE_NUMBER (note) = subtype;
3905 BLOCK_FOR_INSN (note) = NULL;
3907 add_insn_before (note, before);
3911 /* Helper for emit_insn_after, handles lists of instructions
3914 static rtx emit_insn_after_1 (rtx, rtx);
3917 emit_insn_after_1 (rtx first, rtx after)
3923 if (!BARRIER_P (after)
3924 && (bb = BLOCK_FOR_INSN (after)))
3926 bb->flags |= BB_DIRTY;
3927 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3928 if (!BARRIER_P (last))
3929 set_block_for_insn (last, bb);
3930 if (!BARRIER_P (last))
3931 set_block_for_insn (last, bb);
3932 if (BB_END (bb) == after)
3936 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3939 after_after = NEXT_INSN (after);
3941 NEXT_INSN (after) = first;
3942 PREV_INSN (first) = after;
3943 NEXT_INSN (last) = after_after;
3945 PREV_INSN (after_after) = last;
3947 if (after == last_insn)
3952 /* Make X be output after the insn AFTER. */
3955 emit_insn_after_noloc (rtx x, rtx after)
3964 switch (GET_CODE (x))
3972 last = emit_insn_after_1 (x, after);
3975 #ifdef ENABLE_RTL_CHECKING
3982 last = make_insn_raw (x);
3983 add_insn_after (last, after);
3990 /* Similar to emit_insn_after, except that line notes are to be inserted so
3991 as to act as if this insn were at FROM. */
3994 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
3996 rtx from_line = find_line_note (from);
3997 rtx after_line = find_line_note (after);
3998 rtx insn = emit_insn_after (x, after);
4001 emit_note_copy_after (from_line, after);
4004 emit_note_copy_after (after_line, insn);
4007 /* Make an insn of code JUMP_INSN with body X
4008 and output it after the insn AFTER. */
4011 emit_jump_insn_after_noloc (rtx x, rtx after)
4017 switch (GET_CODE (x))
4025 last = emit_insn_after_1 (x, after);
4028 #ifdef ENABLE_RTL_CHECKING
4035 last = make_jump_insn_raw (x);
4036 add_insn_after (last, after);
4043 /* Make an instruction with body X and code CALL_INSN
4044 and output it after the instruction AFTER. */
4047 emit_call_insn_after_noloc (rtx x, rtx after)
4053 switch (GET_CODE (x))
4061 last = emit_insn_after_1 (x, after);
4064 #ifdef ENABLE_RTL_CHECKING
4071 last = make_call_insn_raw (x);
4072 add_insn_after (last, after);
4079 /* Make an insn of code BARRIER
4080 and output it after the insn AFTER. */
4083 emit_barrier_after (rtx after)
4085 rtx insn = rtx_alloc (BARRIER);
4087 INSN_UID (insn) = cur_insn_uid++;
4089 add_insn_after (insn, after);
4093 /* Emit the label LABEL after the insn AFTER. */
4096 emit_label_after (rtx label, rtx after)
4098 /* This can be called twice for the same label
4099 as a result of the confusion that follows a syntax error!
4100 So make it harmless. */
4101 if (INSN_UID (label) == 0)
4103 INSN_UID (label) = cur_insn_uid++;
4104 add_insn_after (label, after);
4110 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4113 emit_note_after (int subtype, rtx after)
4115 rtx note = rtx_alloc (NOTE);
4116 INSN_UID (note) = cur_insn_uid++;
4117 #ifndef USE_MAPPED_LOCATION
4118 NOTE_SOURCE_FILE (note) = 0;
4120 NOTE_LINE_NUMBER (note) = subtype;
4121 BLOCK_FOR_INSN (note) = NULL;
4122 add_insn_after (note, after);
4126 /* Emit a copy of note ORIG after the insn AFTER. */
4129 emit_note_copy_after (rtx orig, rtx after)
4133 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4139 note = rtx_alloc (NOTE);
4140 INSN_UID (note) = cur_insn_uid++;
4141 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4142 NOTE_DATA (note) = NOTE_DATA (orig);
4143 BLOCK_FOR_INSN (note) = NULL;
4144 add_insn_after (note, after);
4148 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4150 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4152 rtx last = emit_insn_after_noloc (pattern, after);
4154 if (pattern == NULL_RTX || !loc)
4157 after = NEXT_INSN (after);
4160 if (active_insn_p (after) && !INSN_LOCATOR (after))
4161 INSN_LOCATOR (after) = loc;
4164 after = NEXT_INSN (after);
4169 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4171 emit_insn_after (rtx pattern, rtx after)
4174 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4176 return emit_insn_after_noloc (pattern, after);
4179 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4181 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4183 rtx last = emit_jump_insn_after_noloc (pattern, after);
4185 if (pattern == NULL_RTX || !loc)
4188 after = NEXT_INSN (after);
4191 if (active_insn_p (after) && !INSN_LOCATOR (after))
4192 INSN_LOCATOR (after) = loc;
4195 after = NEXT_INSN (after);
4200 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4202 emit_jump_insn_after (rtx pattern, rtx after)
4205 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4207 return emit_jump_insn_after_noloc (pattern, after);
4210 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4212 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4214 rtx last = emit_call_insn_after_noloc (pattern, after);
4216 if (pattern == NULL_RTX || !loc)
4219 after = NEXT_INSN (after);
4222 if (active_insn_p (after) && !INSN_LOCATOR (after))
4223 INSN_LOCATOR (after) = loc;
4226 after = NEXT_INSN (after);
4231 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4233 emit_call_insn_after (rtx pattern, rtx after)
4236 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4238 return emit_call_insn_after_noloc (pattern, after);
4241 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4243 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4245 rtx first = PREV_INSN (before);
4246 rtx last = emit_insn_before_noloc (pattern, before);
4248 if (pattern == NULL_RTX || !loc)
4251 first = NEXT_INSN (first);
4254 if (active_insn_p (first) && !INSN_LOCATOR (first))
4255 INSN_LOCATOR (first) = loc;
4258 first = NEXT_INSN (first);
4263 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4265 emit_insn_before (rtx pattern, rtx before)
4267 if (INSN_P (before))
4268 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4270 return emit_insn_before_noloc (pattern, before);
4273 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4275 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4277 rtx first = PREV_INSN (before);
4278 rtx last = emit_jump_insn_before_noloc (pattern, before);
4280 if (pattern == NULL_RTX)
4283 first = NEXT_INSN (first);
4286 if (active_insn_p (first) && !INSN_LOCATOR (first))
4287 INSN_LOCATOR (first) = loc;
4290 first = NEXT_INSN (first);
4295 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4297 emit_jump_insn_before (rtx pattern, rtx before)
4299 if (INSN_P (before))
4300 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4302 return emit_jump_insn_before_noloc (pattern, before);
4305 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4307 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4309 rtx first = PREV_INSN (before);
4310 rtx last = emit_call_insn_before_noloc (pattern, before);
4312 if (pattern == NULL_RTX)
4315 first = NEXT_INSN (first);
4318 if (active_insn_p (first) && !INSN_LOCATOR (first))
4319 INSN_LOCATOR (first) = loc;
4322 first = NEXT_INSN (first);
4327 /* like emit_call_insn_before_noloc,
4328 but set insn_locator according to before. */
4330 emit_call_insn_before (rtx pattern, rtx before)
4332 if (INSN_P (before))
4333 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4335 return emit_call_insn_before_noloc (pattern, before);
4338 /* Take X and emit it at the end of the doubly-linked
4341 Returns the last insn emitted. */
4346 rtx last = last_insn;
4352 switch (GET_CODE (x))
4363 rtx next = NEXT_INSN (insn);
4370 #ifdef ENABLE_RTL_CHECKING
4377 last = make_insn_raw (x);
4385 /* Make an insn of code JUMP_INSN with pattern X
4386 and add it to the end of the doubly-linked list. */
4389 emit_jump_insn (rtx x)
4391 rtx last = NULL_RTX, insn;
4393 switch (GET_CODE (x))
4404 rtx next = NEXT_INSN (insn);
4411 #ifdef ENABLE_RTL_CHECKING
4418 last = make_jump_insn_raw (x);
4426 /* Make an insn of code CALL_INSN with pattern X
4427 and add it to the end of the doubly-linked list. */
4430 emit_call_insn (rtx x)
4434 switch (GET_CODE (x))
4442 insn = emit_insn (x);
4445 #ifdef ENABLE_RTL_CHECKING
4452 insn = make_call_insn_raw (x);
4460 /* Add the label LABEL to the end of the doubly-linked list. */
4463 emit_label (rtx label)
4465 /* This can be called twice for the same label
4466 as a result of the confusion that follows a syntax error!
4467 So make it harmless. */
4468 if (INSN_UID (label) == 0)
4470 INSN_UID (label) = cur_insn_uid++;
4476 /* Make an insn of code BARRIER
4477 and add it to the end of the doubly-linked list. */
4482 rtx barrier = rtx_alloc (BARRIER);
4483 INSN_UID (barrier) = cur_insn_uid++;
4488 /* Make line numbering NOTE insn for LOCATION add it to the end
4489 of the doubly-linked list, but only if line-numbers are desired for
4490 debugging info and it doesn't match the previous one. */
4493 emit_line_note (location_t location)
4497 #ifdef USE_MAPPED_LOCATION
4498 if (location == last_location)
4501 if (location.file && last_location.file
4502 && !strcmp (location.file, last_location.file)
4503 && location.line == last_location.line)
4506 last_location = location;
4508 if (no_line_numbers)
4514 #ifdef USE_MAPPED_LOCATION
4515 note = emit_note ((int) location);
4517 note = emit_note (location.line);
4518 NOTE_SOURCE_FILE (note) = location.file;
4524 /* Emit a copy of note ORIG. */
4527 emit_note_copy (rtx orig)
4531 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4537 note = rtx_alloc (NOTE);
4539 INSN_UID (note) = cur_insn_uid++;
4540 NOTE_DATA (note) = NOTE_DATA (orig);
4541 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4542 BLOCK_FOR_INSN (note) = NULL;
4548 /* Make an insn of code NOTE or type NOTE_NO
4549 and add it to the end of the doubly-linked list. */
4552 emit_note (int note_no)
4556 note = rtx_alloc (NOTE);
4557 INSN_UID (note) = cur_insn_uid++;
4558 NOTE_LINE_NUMBER (note) = note_no;
4559 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4560 BLOCK_FOR_INSN (note) = NULL;
4565 /* Cause next statement to emit a line note even if the line number
4569 force_next_line_note (void)
4571 #ifdef USE_MAPPED_LOCATION
4574 last_location.line = -1;
4578 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4579 note of this type already exists, remove it first. */
4582 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4584 rtx note = find_reg_note (insn, kind, NULL_RTX);
4590 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4591 has multiple sets (some callers assume single_set
4592 means the insn only has one set, when in fact it
4593 means the insn only has one * useful * set). */
4594 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4600 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4601 It serves no useful purpose and breaks eliminate_regs. */
4602 if (GET_CODE (datum) == ASM_OPERANDS)
4612 XEXP (note, 0) = datum;
4616 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4617 return REG_NOTES (insn);
4620 /* Return an indication of which type of insn should have X as a body.
4621 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4623 static enum rtx_code
4624 classify_insn (rtx x)
4628 if (GET_CODE (x) == CALL)
4630 if (GET_CODE (x) == RETURN)
4632 if (GET_CODE (x) == SET)
4634 if (SET_DEST (x) == pc_rtx)
4636 else if (GET_CODE (SET_SRC (x)) == CALL)
4641 if (GET_CODE (x) == PARALLEL)
4644 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4645 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4647 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4648 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4650 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4651 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4657 /* Emit the rtl pattern X as an appropriate kind of insn.
4658 If X is a label, it is simply added into the insn chain. */
4663 enum rtx_code code = classify_insn (x);
4668 return emit_label (x);
4670 return emit_insn (x);
4673 rtx insn = emit_jump_insn (x);
4674 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4675 return emit_barrier ();
4679 return emit_call_insn (x);
4685 /* Space for free sequence stack entries. */
4686 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4688 /* Begin emitting insns to a sequence. If this sequence will contain
4689 something that might cause the compiler to pop arguments to function
4690 calls (because those pops have previously been deferred; see
4691 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4692 before calling this function. That will ensure that the deferred
4693 pops are not accidentally emitted in the middle of this sequence. */
4696 start_sequence (void)
4698 struct sequence_stack *tem;
4700 if (free_sequence_stack != NULL)
4702 tem = free_sequence_stack;
4703 free_sequence_stack = tem->next;
4706 tem = ggc_alloc (sizeof (struct sequence_stack));
4708 tem->next = seq_stack;
4709 tem->first = first_insn;
4710 tem->last = last_insn;
4718 /* Set up the insn chain starting with FIRST as the current sequence,
4719 saving the previously current one. See the documentation for
4720 start_sequence for more information about how to use this function. */
4723 push_to_sequence (rtx first)
4729 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4735 /* Set up the outer-level insn chain
4736 as the current sequence, saving the previously current one. */
4739 push_topmost_sequence (void)
4741 struct sequence_stack *stack, *top = NULL;
4745 for (stack = seq_stack; stack; stack = stack->next)
4748 first_insn = top->first;
4749 last_insn = top->last;
4752 /* After emitting to the outer-level insn chain, update the outer-level
4753 insn chain, and restore the previous saved state. */
4756 pop_topmost_sequence (void)
4758 struct sequence_stack *stack, *top = NULL;
4760 for (stack = seq_stack; stack; stack = stack->next)
4763 top->first = first_insn;
4764 top->last = last_insn;
4769 /* After emitting to a sequence, restore previous saved state.
4771 To get the contents of the sequence just made, you must call
4772 `get_insns' *before* calling here.
4774 If the compiler might have deferred popping arguments while
4775 generating this sequence, and this sequence will not be immediately
4776 inserted into the instruction stream, use do_pending_stack_adjust
4777 before calling get_insns. That will ensure that the deferred
4778 pops are inserted into this sequence, and not into some random
4779 location in the instruction stream. See INHIBIT_DEFER_POP for more
4780 information about deferred popping of arguments. */
4785 struct sequence_stack *tem = seq_stack;
4787 first_insn = tem->first;
4788 last_insn = tem->last;
4789 seq_stack = tem->next;
4791 memset (tem, 0, sizeof (*tem));
4792 tem->next = free_sequence_stack;
4793 free_sequence_stack = tem;
4796 /* Return 1 if currently emitting into a sequence. */
4799 in_sequence_p (void)
4801 return seq_stack != 0;
4804 /* Put the various virtual registers into REGNO_REG_RTX. */
4807 init_virtual_regs (struct emit_status *es)
4809 rtx *ptr = es->x_regno_reg_rtx;
4810 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4811 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4812 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4813 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4814 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4818 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4819 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4820 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4821 static int copy_insn_n_scratches;
4823 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4824 copied an ASM_OPERANDS.
4825 In that case, it is the original input-operand vector. */
4826 static rtvec orig_asm_operands_vector;
4828 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4829 copied an ASM_OPERANDS.
4830 In that case, it is the copied input-operand vector. */
4831 static rtvec copy_asm_operands_vector;
4833 /* Likewise for the constraints vector. */
4834 static rtvec orig_asm_constraints_vector;
4835 static rtvec copy_asm_constraints_vector;
4837 /* Recursively create a new copy of an rtx for copy_insn.
4838 This function differs from copy_rtx in that it handles SCRATCHes and
4839 ASM_OPERANDs properly.
4840 Normally, this function is not used directly; use copy_insn as front end.
4841 However, you could first copy an insn pattern with copy_insn and then use
4842 this function afterwards to properly copy any REG_NOTEs containing
4846 copy_insn_1 (rtx orig)
4851 const char *format_ptr;
4853 code = GET_CODE (orig);
4867 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4872 for (i = 0; i < copy_insn_n_scratches; i++)
4873 if (copy_insn_scratch_in[i] == orig)
4874 return copy_insn_scratch_out[i];
4878 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4879 a LABEL_REF, it isn't sharable. */
4880 if (GET_CODE (XEXP (orig, 0)) == PLUS
4881 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4882 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4886 /* A MEM with a constant address is not sharable. The problem is that
4887 the constant address may need to be reloaded. If the mem is shared,
4888 then reloading one copy of this mem will cause all copies to appear
4889 to have been reloaded. */
4895 copy = rtx_alloc (code);
4897 /* Copy the various flags, and other information. We assume that
4898 all fields need copying, and then clear the fields that should
4899 not be copied. That is the sensible default behavior, and forces
4900 us to explicitly document why we are *not* copying a flag. */
4901 memcpy (copy, orig, RTX_HDR_SIZE);
4903 /* We do not copy the USED flag, which is used as a mark bit during
4904 walks over the RTL. */
4905 RTX_FLAG (copy, used) = 0;
4907 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4910 RTX_FLAG (copy, jump) = 0;
4911 RTX_FLAG (copy, call) = 0;
4912 RTX_FLAG (copy, frame_related) = 0;
4915 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4917 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4919 copy->u.fld[i] = orig->u.fld[i];
4920 switch (*format_ptr++)
4923 if (XEXP (orig, i) != NULL)
4924 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4929 if (XVEC (orig, i) == orig_asm_constraints_vector)
4930 XVEC (copy, i) = copy_asm_constraints_vector;
4931 else if (XVEC (orig, i) == orig_asm_operands_vector)
4932 XVEC (copy, i) = copy_asm_operands_vector;
4933 else if (XVEC (orig, i) != NULL)
4935 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4936 for (j = 0; j < XVECLEN (copy, i); j++)
4937 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4948 /* These are left unchanged. */
4956 if (code == SCRATCH)
4958 i = copy_insn_n_scratches++;
4959 gcc_assert (i < MAX_RECOG_OPERANDS);
4960 copy_insn_scratch_in[i] = orig;
4961 copy_insn_scratch_out[i] = copy;
4963 else if (code == ASM_OPERANDS)
4965 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4966 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4967 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4968 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4974 /* Create a new copy of an rtx.
4975 This function differs from copy_rtx in that it handles SCRATCHes and
4976 ASM_OPERANDs properly.
4977 INSN doesn't really have to be a full INSN; it could be just the
4980 copy_insn (rtx insn)
4982 copy_insn_n_scratches = 0;
4983 orig_asm_operands_vector = 0;
4984 orig_asm_constraints_vector = 0;
4985 copy_asm_operands_vector = 0;
4986 copy_asm_constraints_vector = 0;
4987 return copy_insn_1 (insn);
4990 /* Initialize data structures and variables in this file
4991 before generating rtl for each function. */
4996 struct function *f = cfun;
4998 f->emit = ggc_alloc (sizeof (struct emit_status));
5002 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5003 last_location = UNKNOWN_LOCATION;
5004 first_label_num = label_num;
5007 /* Init the tables that describe all the pseudo regs. */
5009 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5011 f->emit->regno_pointer_align
5012 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5013 * sizeof (unsigned char));
5016 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5018 /* Put copies of all the hard registers into regno_reg_rtx. */
5019 memcpy (regno_reg_rtx,
5020 static_regno_reg_rtx,
5021 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5023 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5024 init_virtual_regs (f->emit);
5026 /* Indicate that the virtual registers and stack locations are
5028 REG_POINTER (stack_pointer_rtx) = 1;
5029 REG_POINTER (frame_pointer_rtx) = 1;
5030 REG_POINTER (hard_frame_pointer_rtx) = 1;
5031 REG_POINTER (arg_pointer_rtx) = 1;
5033 REG_POINTER (virtual_incoming_args_rtx) = 1;
5034 REG_POINTER (virtual_stack_vars_rtx) = 1;
5035 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5036 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5037 REG_POINTER (virtual_cfa_rtx) = 1;
5039 #ifdef STACK_BOUNDARY
5040 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5041 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5042 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5043 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5045 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5046 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5047 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5048 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5049 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5052 #ifdef INIT_EXPANDERS
5057 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5060 gen_const_vector (enum machine_mode mode, int constant)
5065 enum machine_mode inner;
5067 units = GET_MODE_NUNITS (mode);
5068 inner = GET_MODE_INNER (mode);
5070 v = rtvec_alloc (units);
5072 /* We need to call this function after we set the scalar const_tiny_rtx
5074 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5076 for (i = 0; i < units; ++i)
5077 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5079 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5083 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5084 all elements are zero, and the one vector when all elements are one. */
5086 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5088 enum machine_mode inner = GET_MODE_INNER (mode);
5089 int nunits = GET_MODE_NUNITS (mode);
5093 /* Check to see if all of the elements have the same value. */
5094 x = RTVEC_ELT (v, nunits - 1);
5095 for (i = nunits - 2; i >= 0; i--)
5096 if (RTVEC_ELT (v, i) != x)
5099 /* If the values are all the same, check to see if we can use one of the
5100 standard constant vectors. */
5103 if (x == CONST0_RTX (inner))
5104 return CONST0_RTX (mode);
5105 else if (x == CONST1_RTX (inner))
5106 return CONST1_RTX (mode);
5109 return gen_rtx_raw_CONST_VECTOR (mode, v);
5112 /* Create some permanent unique rtl objects shared between all functions.
5113 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5116 init_emit_once (int line_numbers)
5119 enum machine_mode mode;
5120 enum machine_mode double_mode;
5122 /* We need reg_raw_mode, so initialize the modes now. */
5123 init_reg_modes_once ();
5125 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5127 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5128 const_int_htab_eq, NULL);
5130 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5131 const_double_htab_eq, NULL);
5133 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5134 mem_attrs_htab_eq, NULL);
5135 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5136 reg_attrs_htab_eq, NULL);
5138 no_line_numbers = ! line_numbers;
5140 /* Compute the word and byte modes. */
5142 byte_mode = VOIDmode;
5143 word_mode = VOIDmode;
5144 double_mode = VOIDmode;
5146 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5147 mode = GET_MODE_WIDER_MODE (mode))
5149 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5150 && byte_mode == VOIDmode)
5153 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5154 && word_mode == VOIDmode)
5158 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5159 mode = GET_MODE_WIDER_MODE (mode))
5161 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5162 && double_mode == VOIDmode)
5166 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5168 /* Assign register numbers to the globally defined register rtx.
5169 This must be done at runtime because the register number field
5170 is in a union and some compilers can't initialize unions. */
5172 pc_rtx = gen_rtx_PC (VOIDmode);
5173 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5174 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5175 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5176 if (hard_frame_pointer_rtx == 0)
5177 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5178 HARD_FRAME_POINTER_REGNUM);
5179 if (arg_pointer_rtx == 0)
5180 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5181 virtual_incoming_args_rtx =
5182 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5183 virtual_stack_vars_rtx =
5184 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5185 virtual_stack_dynamic_rtx =
5186 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5187 virtual_outgoing_args_rtx =
5188 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5189 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5191 /* Initialize RTL for commonly used hard registers. These are
5192 copied into regno_reg_rtx as we begin to compile each function. */
5193 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5194 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5196 #ifdef INIT_EXPANDERS
5197 /* This is to initialize {init|mark|free}_machine_status before the first
5198 call to push_function_context_to. This is needed by the Chill front
5199 end which calls push_function_context_to before the first call to
5200 init_function_start. */
5204 /* Create the unique rtx's for certain rtx codes and operand values. */
5206 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5207 tries to use these variables. */
5208 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5209 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5210 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5212 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5213 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5214 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5216 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5218 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5219 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5220 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5221 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5222 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5223 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5224 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5226 dconsthalf = dconst1;
5227 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5229 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5231 /* Initialize mathematical constants for constant folding builtins.
5232 These constants need to be given to at least 160 bits precision. */
5233 real_from_string (&dconstpi,
5234 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5235 real_from_string (&dconste,
5236 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5238 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5240 REAL_VALUE_TYPE *r =
5241 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5243 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5244 mode = GET_MODE_WIDER_MODE (mode))
5245 const_tiny_rtx[i][(int) mode] =
5246 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5248 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5250 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5251 mode = GET_MODE_WIDER_MODE (mode))
5252 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5254 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5256 mode = GET_MODE_WIDER_MODE (mode))
5257 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5260 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5262 mode = GET_MODE_WIDER_MODE (mode))
5264 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5265 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5268 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5270 mode = GET_MODE_WIDER_MODE (mode))
5272 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5273 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5276 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5277 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5278 const_tiny_rtx[0][i] = const0_rtx;
5280 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5281 if (STORE_FLAG_VALUE == 1)
5282 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5284 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5285 return_address_pointer_rtx
5286 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5289 #ifdef STATIC_CHAIN_REGNUM
5290 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5292 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5293 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5294 static_chain_incoming_rtx
5295 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5298 static_chain_incoming_rtx = static_chain_rtx;
5302 static_chain_rtx = STATIC_CHAIN;
5304 #ifdef STATIC_CHAIN_INCOMING
5305 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5307 static_chain_incoming_rtx = static_chain_rtx;
5311 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5312 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5315 /* Produce exact duplicate of insn INSN after AFTER.
5316 Care updating of libcall regions if present. */
5319 emit_copy_of_insn_after (rtx insn, rtx after)
5322 rtx note1, note2, link;
5324 switch (GET_CODE (insn))
5327 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5331 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5335 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5336 if (CALL_INSN_FUNCTION_USAGE (insn))
5337 CALL_INSN_FUNCTION_USAGE (new)
5338 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5339 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5340 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5347 /* Update LABEL_NUSES. */
5348 mark_jump_label (PATTERN (new), new, 0);
5350 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5352 /* If the old insn is frame related, then so is the new one. This is
5353 primarily needed for IA-64 unwind info which marks epilogue insns,
5354 which may be duplicated by the basic block reordering code. */
5355 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5357 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5359 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5360 if (REG_NOTE_KIND (link) != REG_LABEL)
5362 if (GET_CODE (link) == EXPR_LIST)
5364 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5369 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5374 /* Fix the libcall sequences. */
5375 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5378 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5380 XEXP (note1, 0) = p;
5381 XEXP (note2, 0) = new;
5383 INSN_CODE (new) = INSN_CODE (insn);
5387 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5389 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5391 if (hard_reg_clobbers[mode][regno])
5392 return hard_reg_clobbers[mode][regno];
5394 return (hard_reg_clobbers[mode][regno] =
5395 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5398 #include "gt-emit-rtl.h"