1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
62 #include "tree-flow.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
97 is set only for MODE_INT and MODE_VECTOR_INT modes. */
99 rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
107 REAL_VALUE_TYPE dconsthalf;
109 /* Record fixed-point constant 0 and 1. */
110 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
111 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
113 /* We make one copy of (const_int C) where C is in
114 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
115 to save space during the compilation and simplify comparisons of
118 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
120 /* Standard pieces of rtx, to be substituted directly into things. */
123 rtx simple_return_rtx;
126 /* A hash table storing CONST_INTs whose absolute value is greater
127 than MAX_SAVED_CONST_INT. */
129 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
130 htab_t const_int_htab;
132 /* A hash table storing memory attribute structures. */
133 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
134 htab_t mem_attrs_htab;
136 /* A hash table storing register attribute structures. */
137 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
138 htab_t reg_attrs_htab;
140 /* A hash table storing all CONST_DOUBLEs. */
141 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
142 htab_t const_double_htab;
144 /* A hash table storing all CONST_FIXEDs. */
145 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
146 htab_t const_fixed_htab;
148 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
149 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
150 #define last_location (crtl->emit.x_last_location)
151 #define first_label_num (crtl->emit.x_first_label_num)
153 static rtx make_call_insn_raw (rtx);
154 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
155 static void set_used_decls (tree);
156 static void mark_label_nuses (rtx);
157 static hashval_t const_int_htab_hash (const void *);
158 static int const_int_htab_eq (const void *, const void *);
159 static hashval_t const_double_htab_hash (const void *);
160 static int const_double_htab_eq (const void *, const void *);
161 static rtx lookup_const_double (rtx);
162 static hashval_t const_fixed_htab_hash (const void *);
163 static int const_fixed_htab_eq (const void *, const void *);
164 static rtx lookup_const_fixed (rtx);
165 static hashval_t mem_attrs_htab_hash (const void *);
166 static int mem_attrs_htab_eq (const void *, const void *);
167 static hashval_t reg_attrs_htab_hash (const void *);
168 static int reg_attrs_htab_eq (const void *, const void *);
169 static reg_attrs *get_reg_attrs (tree, int);
170 static rtx gen_const_vector (enum machine_mode, int);
171 static void copy_rtx_if_shared_1 (rtx *orig);
173 /* Probability of the conditional branch currently proceeded by try_split.
174 Set to -1 otherwise. */
175 int split_branch_probability = -1;
177 /* Returns a hash code for X (which is a really a CONST_INT). */
180 const_int_htab_hash (const void *x)
182 return (hashval_t) INTVAL ((const_rtx) x);
185 /* Returns nonzero if the value represented by X (which is really a
186 CONST_INT) is the same as that given by Y (which is really a
190 const_int_htab_eq (const void *x, const void *y)
192 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
195 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
197 const_double_htab_hash (const void *x)
199 const_rtx const value = (const_rtx) x;
202 if (GET_MODE (value) == VOIDmode)
203 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
206 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
207 /* MODE is used in the comparison, so it should be in the hash. */
208 h ^= GET_MODE (value);
213 /* Returns nonzero if the value represented by X (really a ...)
214 is the same as that represented by Y (really a ...) */
216 const_double_htab_eq (const void *x, const void *y)
218 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
220 if (GET_MODE (a) != GET_MODE (b))
222 if (GET_MODE (a) == VOIDmode)
223 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
224 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
226 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
227 CONST_DOUBLE_REAL_VALUE (b));
230 /* Returns a hash code for X (which is really a CONST_FIXED). */
233 const_fixed_htab_hash (const void *x)
235 const_rtx const value = (const_rtx) x;
238 h = fixed_hash (CONST_FIXED_VALUE (value));
239 /* MODE is used in the comparison, so it should be in the hash. */
240 h ^= GET_MODE (value);
244 /* Returns nonzero if the value represented by X (really a ...)
245 is the same as that represented by Y (really a ...). */
248 const_fixed_htab_eq (const void *x, const void *y)
250 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
252 if (GET_MODE (a) != GET_MODE (b))
254 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
257 /* Returns a hash code for X (which is a really a mem_attrs *). */
260 mem_attrs_htab_hash (const void *x)
262 const mem_attrs *const p = (const mem_attrs *) x;
264 return (p->alias ^ (p->align * 1000)
265 ^ (p->addrspace * 4000)
266 ^ ((p->offset_known_p ? p->offset : 0) * 50000)
267 ^ ((p->size_known_p ? p->size : 0) * 2500000)
268 ^ (size_t) iterative_hash_expr (p->expr, 0));
271 /* Return true if the given memory attributes are equal. */
274 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
276 return (p->alias == q->alias
277 && p->offset_known_p == q->offset_known_p
278 && (!p->offset_known_p || p->offset == q->offset)
279 && p->size_known_p == q->size_known_p
280 && (!p->size_known_p || p->size == q->size)
281 && p->align == q->align
282 && p->addrspace == q->addrspace
283 && (p->expr == q->expr
284 || (p->expr != NULL_TREE && q->expr != NULL_TREE
285 && operand_equal_p (p->expr, q->expr, 0))));
288 /* Returns nonzero if the value represented by X (which is really a
289 mem_attrs *) is the same as that given by Y (which is also really a
293 mem_attrs_htab_eq (const void *x, const void *y)
295 return mem_attrs_eq_p ((const mem_attrs *) x, (const mem_attrs *) y);
298 /* Set MEM's memory attributes so that they are the same as ATTRS. */
301 set_mem_attrs (rtx mem, mem_attrs *attrs)
305 /* If everything is the default, we can just clear the attributes. */
306 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
312 slot = htab_find_slot (mem_attrs_htab, attrs, INSERT);
315 *slot = ggc_alloc_mem_attrs ();
316 memcpy (*slot, attrs, sizeof (mem_attrs));
319 MEM_ATTRS (mem) = (mem_attrs *) *slot;
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x)
327 const reg_attrs *const p = (const reg_attrs *) x;
329 return ((p->offset * 1000) ^ (intptr_t) p->decl);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x, const void *y)
339 const reg_attrs *const p = (const reg_attrs *) x;
340 const reg_attrs *const q = (const reg_attrs *) y;
342 return (p->decl == q->decl && p->offset == q->offset);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl, int offset)
354 /* If everything is the default, we can just return zero. */
355 if (decl == 0 && offset == 0)
359 attrs.offset = offset;
361 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
364 *slot = ggc_alloc_reg_attrs ();
365 memcpy (*slot, &attrs, sizeof (reg_attrs));
368 return (reg_attrs *) *slot;
373 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
379 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
380 MEM_VOLATILE_P (x) = true;
386 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
387 don't attempt to share with the various global pieces of rtl (such as
388 frame_pointer_rtx). */
391 gen_raw_REG (enum machine_mode mode, int regno)
393 rtx x = gen_rtx_raw_REG (mode, regno);
394 ORIGINAL_REGNO (x) = regno;
398 /* There are some RTL codes that require special attention; the generation
399 functions do the raw handling. If you add to this list, modify
400 special_rtx in gengenrtl.c as well. */
403 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
407 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
408 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
410 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
411 if (const_true_rtx && arg == STORE_FLAG_VALUE)
412 return const_true_rtx;
415 /* Look up the CONST_INT in the hash table. */
416 slot = htab_find_slot_with_hash (const_int_htab, &arg,
417 (hashval_t) arg, INSERT);
419 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
425 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
427 return GEN_INT (trunc_int_for_mode (c, mode));
430 /* CONST_DOUBLEs might be created from pairs of integers, or from
431 REAL_VALUE_TYPEs. Also, their length is known only at run time,
432 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
434 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
435 hash table. If so, return its counterpart; otherwise add it
436 to the hash table and return it. */
438 lookup_const_double (rtx real)
440 void **slot = htab_find_slot (const_double_htab, real, INSERT);
447 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
448 VALUE in mode MODE. */
450 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
452 rtx real = rtx_alloc (CONST_DOUBLE);
453 PUT_MODE (real, mode);
457 return lookup_const_double (real);
460 /* Determine whether FIXED, a CONST_FIXED, already exists in the
461 hash table. If so, return its counterpart; otherwise add it
462 to the hash table and return it. */
465 lookup_const_fixed (rtx fixed)
467 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
474 /* Return a CONST_FIXED rtx for a fixed-point value specified by
475 VALUE in mode MODE. */
478 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
480 rtx fixed = rtx_alloc (CONST_FIXED);
481 PUT_MODE (fixed, mode);
485 return lookup_const_fixed (fixed);
488 /* Constructs double_int from rtx CST. */
491 rtx_to_double_int (const_rtx cst)
495 if (CONST_INT_P (cst))
496 r = shwi_to_double_int (INTVAL (cst));
497 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
499 r.low = CONST_DOUBLE_LOW (cst);
500 r.high = CONST_DOUBLE_HIGH (cst);
509 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
513 immed_double_int_const (double_int i, enum machine_mode mode)
515 return immed_double_const (i.low, i.high, mode);
518 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
519 of ints: I0 is the low-order word and I1 is the high-order word.
520 For values that are larger than 2*HOST_BITS_PER_WIDE_INT, the
521 implied upper bits are copies of the high bit of i1. The value
522 itself is neither signed nor unsigned. Do not use this routine for
523 non-integer modes; convert to REAL_VALUE_TYPE and use
524 CONST_DOUBLE_FROM_REAL_VALUE. */
527 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
532 /* There are the following cases (note that there are no modes with
533 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
535 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
537 2) If the value of the integer fits into HOST_WIDE_INT anyway
538 (i.e., i1 consists only from copies of the sign bit, and sign
539 of i0 and i1 are the same), then we return a CONST_INT for i0.
540 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
541 if (mode != VOIDmode)
543 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
544 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
545 /* We can get a 0 for an error mark. */
546 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
547 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
549 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
550 return gen_int_mode (i0, mode);
553 /* If this integer fits in one word, return a CONST_INT. */
554 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
557 /* We use VOIDmode for integers. */
558 value = rtx_alloc (CONST_DOUBLE);
559 PUT_MODE (value, VOIDmode);
561 CONST_DOUBLE_LOW (value) = i0;
562 CONST_DOUBLE_HIGH (value) = i1;
564 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
565 XWINT (value, i) = 0;
567 return lookup_const_double (value);
571 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
573 /* In case the MD file explicitly references the frame pointer, have
574 all such references point to the same frame pointer. This is
575 used during frame pointer elimination to distinguish the explicit
576 references to these registers from pseudos that happened to be
579 If we have eliminated the frame pointer or arg pointer, we will
580 be using it as a normal register, for example as a spill
581 register. In such cases, we might be accessing it in a mode that
582 is not Pmode and therefore cannot use the pre-allocated rtx.
584 Also don't do this when we are making new REGs in reload, since
585 we don't want to get confused with the real pointers. */
587 if (mode == Pmode && !reload_in_progress)
589 if (regno == FRAME_POINTER_REGNUM
590 && (!reload_completed || frame_pointer_needed))
591 return frame_pointer_rtx;
592 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
593 if (regno == HARD_FRAME_POINTER_REGNUM
594 && (!reload_completed || frame_pointer_needed))
595 return hard_frame_pointer_rtx;
597 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
598 if (regno == ARG_POINTER_REGNUM)
599 return arg_pointer_rtx;
601 #ifdef RETURN_ADDRESS_POINTER_REGNUM
602 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
603 return return_address_pointer_rtx;
605 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
606 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
607 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
608 return pic_offset_table_rtx;
609 if (regno == STACK_POINTER_REGNUM)
610 return stack_pointer_rtx;
614 /* If the per-function register table has been set up, try to re-use
615 an existing entry in that table to avoid useless generation of RTL.
617 This code is disabled for now until we can fix the various backends
618 which depend on having non-shared hard registers in some cases. Long
619 term we want to re-enable this code as it can significantly cut down
620 on the amount of useless RTL that gets generated.
622 We'll also need to fix some code that runs after reload that wants to
623 set ORIGINAL_REGNO. */
628 && regno < FIRST_PSEUDO_REGISTER
629 && reg_raw_mode[regno] == mode)
630 return regno_reg_rtx[regno];
633 return gen_raw_REG (mode, regno);
637 gen_rtx_MEM (enum machine_mode mode, rtx addr)
639 rtx rt = gen_rtx_raw_MEM (mode, addr);
641 /* This field is not cleared by the mere allocation of the rtx, so
648 /* Generate a memory referring to non-trapping constant memory. */
651 gen_const_mem (enum machine_mode mode, rtx addr)
653 rtx mem = gen_rtx_MEM (mode, addr);
654 MEM_READONLY_P (mem) = 1;
655 MEM_NOTRAP_P (mem) = 1;
659 /* Generate a MEM referring to fixed portions of the frame, e.g., register
663 gen_frame_mem (enum machine_mode mode, rtx addr)
665 rtx mem = gen_rtx_MEM (mode, addr);
666 MEM_NOTRAP_P (mem) = 1;
667 set_mem_alias_set (mem, get_frame_alias_set ());
671 /* Generate a MEM referring to a temporary use of the stack, not part
672 of the fixed stack frame. For example, something which is pushed
673 by a target splitter. */
675 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
677 rtx mem = gen_rtx_MEM (mode, addr);
678 MEM_NOTRAP_P (mem) = 1;
679 if (!cfun->calls_alloca)
680 set_mem_alias_set (mem, get_frame_alias_set ());
684 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
685 this construct would be valid, and false otherwise. */
688 validate_subreg (enum machine_mode omode, enum machine_mode imode,
689 const_rtx reg, unsigned int offset)
691 unsigned int isize = GET_MODE_SIZE (imode);
692 unsigned int osize = GET_MODE_SIZE (omode);
694 /* All subregs must be aligned. */
695 if (offset % osize != 0)
698 /* The subreg offset cannot be outside the inner object. */
702 /* ??? This should not be here. Temporarily continue to allow word_mode
703 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
704 Generally, backends are doing something sketchy but it'll take time to
706 if (omode == word_mode)
708 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
709 is the culprit here, and not the backends. */
710 else if (osize >= UNITS_PER_WORD && isize >= osize)
712 /* Allow component subregs of complex and vector. Though given the below
713 extraction rules, it's not always clear what that means. */
714 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
715 && GET_MODE_INNER (imode) == omode)
717 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
718 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
719 represent this. It's questionable if this ought to be represented at
720 all -- why can't this all be hidden in post-reload splitters that make
721 arbitrarily mode changes to the registers themselves. */
722 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
724 /* Subregs involving floating point modes are not allowed to
725 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
726 (subreg:SI (reg:DF) 0) isn't. */
727 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
733 /* Paradoxical subregs must have offset zero. */
737 /* This is a normal subreg. Verify that the offset is representable. */
739 /* For hard registers, we already have most of these rules collected in
740 subreg_offset_representable_p. */
741 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
743 unsigned int regno = REGNO (reg);
745 #ifdef CANNOT_CHANGE_MODE_CLASS
746 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
747 && GET_MODE_INNER (imode) == omode)
749 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
753 return subreg_offset_representable_p (regno, imode, offset, omode);
756 /* For pseudo registers, we want most of the same checks. Namely:
757 If the register no larger than a word, the subreg must be lowpart.
758 If the register is larger than a word, the subreg must be the lowpart
759 of a subword. A subreg does *not* perform arbitrary bit extraction.
760 Given that we've already checked mode/offset alignment, we only have
761 to check subword subregs here. */
762 if (osize < UNITS_PER_WORD)
764 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
765 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
766 if (offset % UNITS_PER_WORD != low_off)
773 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
775 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
776 return gen_rtx_raw_SUBREG (mode, reg, offset);
779 /* Generate a SUBREG representing the least-significant part of REG if MODE
780 is smaller than mode of REG, otherwise paradoxical SUBREG. */
783 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
785 enum machine_mode inmode;
787 inmode = GET_MODE (reg);
788 if (inmode == VOIDmode)
790 return gen_rtx_SUBREG (mode, reg,
791 subreg_lowpart_offset (mode, inmode));
795 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
798 gen_rtvec (int n, ...)
806 /* Don't allocate an empty rtvec... */
813 rt_val = rtvec_alloc (n);
815 for (i = 0; i < n; i++)
816 rt_val->elem[i] = va_arg (p, rtx);
823 gen_rtvec_v (int n, rtx *argp)
828 /* Don't allocate an empty rtvec... */
832 rt_val = rtvec_alloc (n);
834 for (i = 0; i < n; i++)
835 rt_val->elem[i] = *argp++;
840 /* Return the number of bytes between the start of an OUTER_MODE
841 in-memory value and the start of an INNER_MODE in-memory value,
842 given that the former is a lowpart of the latter. It may be a
843 paradoxical lowpart, in which case the offset will be negative
844 on big-endian targets. */
847 byte_lowpart_offset (enum machine_mode outer_mode,
848 enum machine_mode inner_mode)
850 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
851 return subreg_lowpart_offset (outer_mode, inner_mode);
853 return -subreg_lowpart_offset (inner_mode, outer_mode);
856 /* Generate a REG rtx for a new pseudo register of mode MODE.
857 This pseudo is assigned the next sequential register number. */
860 gen_reg_rtx (enum machine_mode mode)
863 unsigned int align = GET_MODE_ALIGNMENT (mode);
865 gcc_assert (can_create_pseudo_p ());
867 /* If a virtual register with bigger mode alignment is generated,
868 increase stack alignment estimation because it might be spilled
870 if (SUPPORTS_STACK_ALIGNMENT
871 && crtl->stack_alignment_estimated < align
872 && !crtl->stack_realign_processed)
874 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
875 if (crtl->stack_alignment_estimated < min_align)
876 crtl->stack_alignment_estimated = min_align;
879 if (generating_concat_p
880 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
881 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
883 /* For complex modes, don't make a single pseudo.
884 Instead, make a CONCAT of two pseudos.
885 This allows noncontiguous allocation of the real and imaginary parts,
886 which makes much better code. Besides, allocating DCmode
887 pseudos overstrains reload on some machines like the 386. */
888 rtx realpart, imagpart;
889 enum machine_mode partmode = GET_MODE_INNER (mode);
891 realpart = gen_reg_rtx (partmode);
892 imagpart = gen_reg_rtx (partmode);
893 return gen_rtx_CONCAT (mode, realpart, imagpart);
896 /* Make sure regno_pointer_align, and regno_reg_rtx are large
897 enough to have an element for this pseudo reg number. */
899 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
901 int old_size = crtl->emit.regno_pointer_align_length;
905 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
906 memset (tmp + old_size, 0, old_size);
907 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
909 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
910 memset (new1 + old_size, 0, old_size * sizeof (rtx));
911 regno_reg_rtx = new1;
913 crtl->emit.regno_pointer_align_length = old_size * 2;
916 val = gen_raw_REG (mode, reg_rtx_no);
917 regno_reg_rtx[reg_rtx_no++] = val;
921 /* Update NEW with the same attributes as REG, but with OFFSET added
922 to the REG_OFFSET. */
925 update_reg_offset (rtx new_rtx, rtx reg, int offset)
927 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
928 REG_OFFSET (reg) + offset);
931 /* Generate a register with same attributes as REG, but with OFFSET
932 added to the REG_OFFSET. */
935 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
938 rtx new_rtx = gen_rtx_REG (mode, regno);
940 update_reg_offset (new_rtx, reg, offset);
944 /* Generate a new pseudo-register with the same attributes as REG, but
945 with OFFSET added to the REG_OFFSET. */
948 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
950 rtx new_rtx = gen_reg_rtx (mode);
952 update_reg_offset (new_rtx, reg, offset);
956 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
957 new register is a (possibly paradoxical) lowpart of the old one. */
960 adjust_reg_mode (rtx reg, enum machine_mode mode)
962 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
963 PUT_MODE (reg, mode);
966 /* Copy REG's attributes from X, if X has any attributes. If REG and X
967 have different modes, REG is a (possibly paradoxical) lowpart of X. */
970 set_reg_attrs_from_value (rtx reg, rtx x)
973 bool can_be_reg_pointer = true;
975 /* Don't call mark_reg_pointer for incompatible pointer sign
977 while (GET_CODE (x) == SIGN_EXTEND
978 || GET_CODE (x) == ZERO_EXTEND
979 || GET_CODE (x) == TRUNCATE
980 || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
982 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
983 if ((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
984 || (GET_CODE (x) != SIGN_EXTEND && ! POINTERS_EXTEND_UNSIGNED))
985 can_be_reg_pointer = false;
990 /* Hard registers can be reused for multiple purposes within the same
991 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
993 if (HARD_REGISTER_P (reg))
996 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
999 if (MEM_OFFSET_KNOWN_P (x))
1000 REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
1001 MEM_OFFSET (x) + offset);
1002 if (can_be_reg_pointer && MEM_POINTER (x))
1003 mark_reg_pointer (reg, 0);
1008 update_reg_offset (reg, x, offset);
1009 if (can_be_reg_pointer && REG_POINTER (x))
1010 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1014 /* Generate a REG rtx for a new pseudo register, copying the mode
1015 and attributes from X. */
1018 gen_reg_rtx_and_attrs (rtx x)
1020 rtx reg = gen_reg_rtx (GET_MODE (x));
1021 set_reg_attrs_from_value (reg, x);
1025 /* Set the register attributes for registers contained in PARM_RTX.
1026 Use needed values from memory attributes of MEM. */
1029 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1031 if (REG_P (parm_rtx))
1032 set_reg_attrs_from_value (parm_rtx, mem);
1033 else if (GET_CODE (parm_rtx) == PARALLEL)
1035 /* Check for a NULL entry in the first slot, used to indicate that the
1036 parameter goes both on the stack and in registers. */
1037 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1038 for (; i < XVECLEN (parm_rtx, 0); i++)
1040 rtx x = XVECEXP (parm_rtx, 0, i);
1041 if (REG_P (XEXP (x, 0)))
1042 REG_ATTRS (XEXP (x, 0))
1043 = get_reg_attrs (MEM_EXPR (mem),
1044 INTVAL (XEXP (x, 1)));
1049 /* Set the REG_ATTRS for registers in value X, given that X represents
1053 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1055 if (GET_CODE (x) == SUBREG)
1057 gcc_assert (subreg_lowpart_p (x));
1062 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1064 if (GET_CODE (x) == CONCAT)
1066 if (REG_P (XEXP (x, 0)))
1067 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1068 if (REG_P (XEXP (x, 1)))
1069 REG_ATTRS (XEXP (x, 1))
1070 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1072 if (GET_CODE (x) == PARALLEL)
1076 /* Check for a NULL entry, used to indicate that the parameter goes
1077 both on the stack and in registers. */
1078 if (XEXP (XVECEXP (x, 0, 0), 0))
1083 for (i = start; i < XVECLEN (x, 0); i++)
1085 rtx y = XVECEXP (x, 0, i);
1086 if (REG_P (XEXP (y, 0)))
1087 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1092 /* Assign the RTX X to declaration T. */
1095 set_decl_rtl (tree t, rtx x)
1097 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1099 set_reg_attrs_for_decl_rtl (t, x);
1102 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1103 if the ABI requires the parameter to be passed by reference. */
1106 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1108 DECL_INCOMING_RTL (t) = x;
1109 if (x && !by_reference_p)
1110 set_reg_attrs_for_decl_rtl (t, x);
1113 /* Identify REG (which may be a CONCAT) as a user register. */
1116 mark_user_reg (rtx reg)
1118 if (GET_CODE (reg) == CONCAT)
1120 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1121 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1125 gcc_assert (REG_P (reg));
1126 REG_USERVAR_P (reg) = 1;
1130 /* Identify REG as a probable pointer register and show its alignment
1131 as ALIGN, if nonzero. */
1134 mark_reg_pointer (rtx reg, int align)
1136 if (! REG_POINTER (reg))
1138 REG_POINTER (reg) = 1;
1141 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1143 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1144 /* We can no-longer be sure just how aligned this pointer is. */
1145 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1148 /* Return 1 plus largest pseudo reg number used in the current function. */
1156 /* Return 1 + the largest label number used so far in the current function. */
1159 max_label_num (void)
1164 /* Return first label number used in this function (if any were used). */
1167 get_first_label_num (void)
1169 return first_label_num;
1172 /* If the rtx for label was created during the expansion of a nested
1173 function, then first_label_num won't include this label number.
1174 Fix this now so that array indices work later. */
1177 maybe_set_first_label_num (rtx x)
1179 if (CODE_LABEL_NUMBER (x) < first_label_num)
1180 first_label_num = CODE_LABEL_NUMBER (x);
1183 /* Return a value representing some low-order bits of X, where the number
1184 of low-order bits is given by MODE. Note that no conversion is done
1185 between floating-point and fixed-point values, rather, the bit
1186 representation is returned.
1188 This function handles the cases in common between gen_lowpart, below,
1189 and two variants in cse.c and combine.c. These are the cases that can
1190 be safely handled at all points in the compilation.
1192 If this is not a case we can handle, return 0. */
1195 gen_lowpart_common (enum machine_mode mode, rtx x)
1197 int msize = GET_MODE_SIZE (mode);
1200 enum machine_mode innermode;
1202 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1203 so we have to make one up. Yuk. */
1204 innermode = GET_MODE (x);
1206 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1207 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1208 else if (innermode == VOIDmode)
1209 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1211 xsize = GET_MODE_SIZE (innermode);
1213 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1215 if (innermode == mode)
1218 /* MODE must occupy no more words than the mode of X. */
1219 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1220 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1223 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1224 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1227 offset = subreg_lowpart_offset (mode, innermode);
1229 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1230 && (GET_MODE_CLASS (mode) == MODE_INT
1231 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1233 /* If we are getting the low-order part of something that has been
1234 sign- or zero-extended, we can either just use the object being
1235 extended or make a narrower extension. If we want an even smaller
1236 piece than the size of the object being extended, call ourselves
1239 This case is used mostly by combine and cse. */
1241 if (GET_MODE (XEXP (x, 0)) == mode)
1243 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1244 return gen_lowpart_common (mode, XEXP (x, 0));
1245 else if (msize < xsize)
1246 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1248 else if (GET_CODE (x) == SUBREG || REG_P (x)
1249 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1250 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1251 return simplify_gen_subreg (mode, x, innermode, offset);
1253 /* Otherwise, we can't do this. */
1258 gen_highpart (enum machine_mode mode, rtx x)
1260 unsigned int msize = GET_MODE_SIZE (mode);
1263 /* This case loses if X is a subreg. To catch bugs early,
1264 complain if an invalid MODE is used even in other cases. */
1265 gcc_assert (msize <= UNITS_PER_WORD
1266 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1268 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1269 subreg_highpart_offset (mode, GET_MODE (x)));
1270 gcc_assert (result);
1272 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1273 the target if we have a MEM. gen_highpart must return a valid operand,
1274 emitting code if necessary to do so. */
1277 result = validize_mem (result);
1278 gcc_assert (result);
1284 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1285 be VOIDmode constant. */
1287 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1289 if (GET_MODE (exp) != VOIDmode)
1291 gcc_assert (GET_MODE (exp) == innermode);
1292 return gen_highpart (outermode, exp);
1294 return simplify_gen_subreg (outermode, exp, innermode,
1295 subreg_highpart_offset (outermode, innermode));
1298 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1301 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1303 unsigned int offset = 0;
1304 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1308 if (WORDS_BIG_ENDIAN)
1309 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1310 if (BYTES_BIG_ENDIAN)
1311 offset += difference % UNITS_PER_WORD;
1317 /* Return offset in bytes to get OUTERMODE high part
1318 of the value in mode INNERMODE stored in memory in target format. */
1320 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1322 unsigned int offset = 0;
1323 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1325 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1329 if (! WORDS_BIG_ENDIAN)
1330 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1331 if (! BYTES_BIG_ENDIAN)
1332 offset += difference % UNITS_PER_WORD;
1338 /* Return 1 iff X, assumed to be a SUBREG,
1339 refers to the least significant part of its containing reg.
1340 If X is not a SUBREG, always return 1 (it is its own low part!). */
1343 subreg_lowpart_p (const_rtx x)
1345 if (GET_CODE (x) != SUBREG)
1347 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1350 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1351 == SUBREG_BYTE (x));
1354 /* Return true if X is a paradoxical subreg, false otherwise. */
1356 paradoxical_subreg_p (const_rtx x)
1358 if (GET_CODE (x) != SUBREG)
1360 return (GET_MODE_PRECISION (GET_MODE (x))
1361 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))));
1364 /* Return subword OFFSET of operand OP.
1365 The word number, OFFSET, is interpreted as the word number starting
1366 at the low-order address. OFFSET 0 is the low-order word if not
1367 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1369 If we cannot extract the required word, we return zero. Otherwise,
1370 an rtx corresponding to the requested word will be returned.
1372 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1373 reload has completed, a valid address will always be returned. After
1374 reload, if a valid address cannot be returned, we return zero.
1376 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1377 it is the responsibility of the caller.
1379 MODE is the mode of OP in case it is a CONST_INT.
1381 ??? This is still rather broken for some cases. The problem for the
1382 moment is that all callers of this thing provide no 'goal mode' to
1383 tell us to work with. This exists because all callers were written
1384 in a word based SUBREG world.
1385 Now use of this function can be deprecated by simplify_subreg in most
1390 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1392 if (mode == VOIDmode)
1393 mode = GET_MODE (op);
1395 gcc_assert (mode != VOIDmode);
1397 /* If OP is narrower than a word, fail. */
1399 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1402 /* If we want a word outside OP, return zero. */
1404 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1407 /* Form a new MEM at the requested address. */
1410 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1412 if (! validate_address)
1415 else if (reload_completed)
1417 if (! strict_memory_address_addr_space_p (word_mode,
1419 MEM_ADDR_SPACE (op)))
1423 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1426 /* Rest can be handled by simplify_subreg. */
1427 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1430 /* Similar to `operand_subword', but never return 0. If we can't
1431 extract the required subword, put OP into a register and try again.
1432 The second attempt must succeed. We always validate the address in
1435 MODE is the mode of OP, in case it is CONST_INT. */
1438 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1440 rtx result = operand_subword (op, offset, 1, mode);
1445 if (mode != BLKmode && mode != VOIDmode)
1447 /* If this is a register which can not be accessed by words, copy it
1448 to a pseudo register. */
1450 op = copy_to_reg (op);
1452 op = force_reg (mode, op);
1455 result = operand_subword (op, offset, 1, mode);
1456 gcc_assert (result);
1461 /* Returns 1 if both MEM_EXPR can be considered equal
1465 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1470 if (! expr1 || ! expr2)
1473 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1476 return operand_equal_p (expr1, expr2, 0);
1479 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1480 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1484 get_mem_align_offset (rtx mem, unsigned int align)
1487 unsigned HOST_WIDE_INT offset;
1489 /* This function can't use
1490 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1491 || (MAX (MEM_ALIGN (mem),
1492 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1496 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1498 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1499 for <variable>. get_inner_reference doesn't handle it and
1500 even if it did, the alignment in that case needs to be determined
1501 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1502 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1503 isn't sufficiently aligned, the object it is in might be. */
1504 gcc_assert (MEM_P (mem));
1505 expr = MEM_EXPR (mem);
1506 if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1509 offset = MEM_OFFSET (mem);
1512 if (DECL_ALIGN (expr) < align)
1515 else if (INDIRECT_REF_P (expr))
1517 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1520 else if (TREE_CODE (expr) == COMPONENT_REF)
1524 tree inner = TREE_OPERAND (expr, 0);
1525 tree field = TREE_OPERAND (expr, 1);
1526 tree byte_offset = component_ref_field_offset (expr);
1527 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1530 || !host_integerp (byte_offset, 1)
1531 || !host_integerp (bit_offset, 1))
1534 offset += tree_low_cst (byte_offset, 1);
1535 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1537 if (inner == NULL_TREE)
1539 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1540 < (unsigned int) align)
1544 else if (DECL_P (inner))
1546 if (DECL_ALIGN (inner) < align)
1550 else if (TREE_CODE (inner) != COMPONENT_REF)
1558 return offset & ((align / BITS_PER_UNIT) - 1);
1561 /* Given REF (a MEM) and T, either the type of X or the expression
1562 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1563 if we are making a new object of this type. BITPOS is nonzero if
1564 there is an offset outstanding on T that will be applied later. */
1567 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1568 HOST_WIDE_INT bitpos)
1570 HOST_WIDE_INT apply_bitpos = 0;
1572 struct mem_attrs attrs, *defattrs, *refattrs;
1575 /* It can happen that type_for_mode was given a mode for which there
1576 is no language-level type. In which case it returns NULL, which
1581 type = TYPE_P (t) ? t : TREE_TYPE (t);
1582 if (type == error_mark_node)
1585 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1586 wrong answer, as it assumes that DECL_RTL already has the right alias
1587 info. Callers should not set DECL_RTL until after the call to
1588 set_mem_attributes. */
1589 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1591 memset (&attrs, 0, sizeof (attrs));
1593 /* Get the alias set from the expression or type (perhaps using a
1594 front-end routine) and use it. */
1595 attrs.alias = get_alias_set (t);
1597 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1598 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1600 /* Default values from pre-existing memory attributes if present. */
1601 refattrs = MEM_ATTRS (ref);
1604 /* ??? Can this ever happen? Calling this routine on a MEM that
1605 already carries memory attributes should probably be invalid. */
1606 attrs.expr = refattrs->expr;
1607 attrs.offset_known_p = refattrs->offset_known_p;
1608 attrs.offset = refattrs->offset;
1609 attrs.size_known_p = refattrs->size_known_p;
1610 attrs.size = refattrs->size;
1611 attrs.align = refattrs->align;
1614 /* Otherwise, default values from the mode of the MEM reference. */
1617 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1618 gcc_assert (!defattrs->expr);
1619 gcc_assert (!defattrs->offset_known_p);
1621 /* Respect mode size. */
1622 attrs.size_known_p = defattrs->size_known_p;
1623 attrs.size = defattrs->size;
1624 /* ??? Is this really necessary? We probably should always get
1625 the size from the type below. */
1627 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1628 if T is an object, always compute the object alignment below. */
1630 attrs.align = defattrs->align;
1632 attrs.align = BITS_PER_UNIT;
1633 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1634 e.g. if the type carries an alignment attribute. Should we be
1635 able to simply always use TYPE_ALIGN? */
1638 /* We can set the alignment from the type if we are making an object,
1639 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1640 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1641 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1643 else if (TREE_CODE (t) == MEM_REF)
1645 tree op0 = TREE_OPERAND (t, 0);
1646 if (TREE_CODE (op0) == ADDR_EXPR
1647 && (DECL_P (TREE_OPERAND (op0, 0))
1648 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1650 if (DECL_P (TREE_OPERAND (op0, 0)))
1651 attrs.align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1652 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1654 attrs.align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1655 #ifdef CONSTANT_ALIGNMENT
1656 attrs.align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0),
1660 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1662 unsigned HOST_WIDE_INT ioff
1663 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1664 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1665 attrs.align = MIN (aoff, attrs.align);
1669 /* ??? This isn't fully correct, we can't set the alignment from the
1670 type in all cases. */
1671 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1674 else if (TREE_CODE (t) == TARGET_MEM_REF)
1675 /* ??? This isn't fully correct, we can't set the alignment from the
1676 type in all cases. */
1677 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1679 /* If the size is known, we can set that. */
1680 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1682 attrs.size_known_p = true;
1683 attrs.size = tree_low_cst (TYPE_SIZE_UNIT (type), 1);
1686 /* If T is not a type, we may be able to deduce some more information about
1691 bool align_computed = false;
1693 if (TREE_THIS_VOLATILE (t))
1694 MEM_VOLATILE_P (ref) = 1;
1696 /* Now remove any conversions: they don't change what the underlying
1697 object is. Likewise for SAVE_EXPR. */
1698 while (CONVERT_EXPR_P (t)
1699 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1700 || TREE_CODE (t) == SAVE_EXPR)
1701 t = TREE_OPERAND (t, 0);
1703 /* Note whether this expression can trap. */
1704 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1706 base = get_base_address (t);
1710 && TREE_READONLY (base)
1711 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1712 && !TREE_THIS_VOLATILE (base))
1713 MEM_READONLY_P (ref) = 1;
1715 /* Mark static const strings readonly as well. */
1716 if (TREE_CODE (base) == STRING_CST
1717 && TREE_READONLY (base)
1718 && TREE_STATIC (base))
1719 MEM_READONLY_P (ref) = 1;
1721 if (TREE_CODE (base) == MEM_REF
1722 || TREE_CODE (base) == TARGET_MEM_REF)
1723 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
1726 as = TYPE_ADDR_SPACE (TREE_TYPE (base));
1729 as = TYPE_ADDR_SPACE (type);
1731 /* If this expression uses it's parent's alias set, mark it such
1732 that we won't change it. */
1733 if (component_uses_parent_alias_set (t))
1734 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1736 /* If this is a decl, set the attributes of the MEM from it. */
1740 attrs.offset_known_p = true;
1742 apply_bitpos = bitpos;
1743 if (DECL_SIZE_UNIT (t) && host_integerp (DECL_SIZE_UNIT (t), 1))
1745 attrs.size_known_p = true;
1746 attrs.size = tree_low_cst (DECL_SIZE_UNIT (t), 1);
1749 attrs.size_known_p = false;
1750 attrs.align = DECL_ALIGN (t);
1751 align_computed = true;
1754 /* If this is a constant, we know the alignment. */
1755 else if (CONSTANT_CLASS_P (t))
1757 attrs.align = TYPE_ALIGN (type);
1758 #ifdef CONSTANT_ALIGNMENT
1759 attrs.align = CONSTANT_ALIGNMENT (t, attrs.align);
1761 align_computed = true;
1764 /* If this is a field reference and not a bit-field, record it. */
1765 /* ??? There is some information that can be gleaned from bit-fields,
1766 such as the word offset in the structure that might be modified.
1767 But skip it for now. */
1768 else if (TREE_CODE (t) == COMPONENT_REF
1769 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1772 attrs.offset_known_p = true;
1774 apply_bitpos = bitpos;
1775 /* ??? Any reason the field size would be different than
1776 the size we got from the type? */
1779 /* If this is an array reference, look for an outer field reference. */
1780 else if (TREE_CODE (t) == ARRAY_REF)
1782 tree off_tree = size_zero_node;
1783 /* We can't modify t, because we use it at the end of the
1789 tree index = TREE_OPERAND (t2, 1);
1790 tree low_bound = array_ref_low_bound (t2);
1791 tree unit_size = array_ref_element_size (t2);
1793 /* We assume all arrays have sizes that are a multiple of a byte.
1794 First subtract the lower bound, if any, in the type of the
1795 index, then convert to sizetype and multiply by the size of
1796 the array element. */
1797 if (! integer_zerop (low_bound))
1798 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1801 off_tree = size_binop (PLUS_EXPR,
1802 size_binop (MULT_EXPR,
1803 fold_convert (sizetype,
1807 t2 = TREE_OPERAND (t2, 0);
1809 while (TREE_CODE (t2) == ARRAY_REF);
1814 attrs.offset_known_p = false;
1815 if (host_integerp (off_tree, 1))
1817 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1818 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1819 attrs.align = DECL_ALIGN (t2);
1820 if (aoff && (unsigned HOST_WIDE_INT) aoff < attrs.align)
1822 align_computed = true;
1823 attrs.offset_known_p = true;
1824 attrs.offset = ioff;
1825 apply_bitpos = bitpos;
1828 else if (TREE_CODE (t2) == COMPONENT_REF)
1831 attrs.offset_known_p = false;
1832 if (host_integerp (off_tree, 1))
1834 attrs.offset_known_p = true;
1835 attrs.offset = tree_low_cst (off_tree, 1);
1836 apply_bitpos = bitpos;
1838 /* ??? Any reason the field size would be different than
1839 the size we got from the type? */
1842 /* If this is an indirect reference, record it. */
1843 else if (TREE_CODE (t) == MEM_REF)
1846 attrs.offset_known_p = true;
1848 apply_bitpos = bitpos;
1852 /* If this is an indirect reference, record it. */
1853 else if (TREE_CODE (t) == MEM_REF
1854 || TREE_CODE (t) == TARGET_MEM_REF)
1857 attrs.offset_known_p = true;
1859 apply_bitpos = bitpos;
1862 if (!align_computed)
1864 unsigned int obj_align = get_object_alignment (t);
1865 attrs.align = MAX (attrs.align, obj_align);
1869 as = TYPE_ADDR_SPACE (type);
1871 /* If we modified OFFSET based on T, then subtract the outstanding
1872 bit position offset. Similarly, increase the size of the accessed
1873 object to contain the negative offset. */
1876 gcc_assert (attrs.offset_known_p);
1877 attrs.offset -= apply_bitpos / BITS_PER_UNIT;
1878 if (attrs.size_known_p)
1879 attrs.size += apply_bitpos / BITS_PER_UNIT;
1882 /* Now set the attributes we computed above. */
1883 attrs.addrspace = as;
1884 set_mem_attrs (ref, &attrs);
1888 set_mem_attributes (rtx ref, tree t, int objectp)
1890 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1893 /* Set the alias set of MEM to SET. */
1896 set_mem_alias_set (rtx mem, alias_set_type set)
1898 struct mem_attrs attrs;
1900 /* If the new and old alias sets don't conflict, something is wrong. */
1901 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1902 attrs = *get_mem_attrs (mem);
1904 set_mem_attrs (mem, &attrs);
1907 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1910 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1912 struct mem_attrs attrs;
1914 attrs = *get_mem_attrs (mem);
1915 attrs.addrspace = addrspace;
1916 set_mem_attrs (mem, &attrs);
1919 /* Set the alignment of MEM to ALIGN bits. */
1922 set_mem_align (rtx mem, unsigned int align)
1924 struct mem_attrs attrs;
1926 attrs = *get_mem_attrs (mem);
1927 attrs.align = align;
1928 set_mem_attrs (mem, &attrs);
1931 /* Set the expr for MEM to EXPR. */
1934 set_mem_expr (rtx mem, tree expr)
1936 struct mem_attrs attrs;
1938 attrs = *get_mem_attrs (mem);
1940 set_mem_attrs (mem, &attrs);
1943 /* Set the offset of MEM to OFFSET. */
1946 set_mem_offset (rtx mem, HOST_WIDE_INT offset)
1948 struct mem_attrs attrs;
1950 attrs = *get_mem_attrs (mem);
1951 attrs.offset_known_p = true;
1952 attrs.offset = offset;
1953 set_mem_attrs (mem, &attrs);
1956 /* Clear the offset of MEM. */
1959 clear_mem_offset (rtx mem)
1961 struct mem_attrs attrs;
1963 attrs = *get_mem_attrs (mem);
1964 attrs.offset_known_p = false;
1965 set_mem_attrs (mem, &attrs);
1968 /* Set the size of MEM to SIZE. */
1971 set_mem_size (rtx mem, HOST_WIDE_INT size)
1973 struct mem_attrs attrs;
1975 attrs = *get_mem_attrs (mem);
1976 attrs.size_known_p = true;
1978 set_mem_attrs (mem, &attrs);
1981 /* Clear the size of MEM. */
1984 clear_mem_size (rtx mem)
1986 struct mem_attrs attrs;
1988 attrs = *get_mem_attrs (mem);
1989 attrs.size_known_p = false;
1990 set_mem_attrs (mem, &attrs);
1993 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1994 and its address changed to ADDR. (VOIDmode means don't change the mode.
1995 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1996 returned memory location is required to be valid. The memory
1997 attributes are not changed. */
2000 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
2005 gcc_assert (MEM_P (memref));
2006 as = MEM_ADDR_SPACE (memref);
2007 if (mode == VOIDmode)
2008 mode = GET_MODE (memref);
2010 addr = XEXP (memref, 0);
2011 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
2012 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2017 if (reload_in_progress || reload_completed)
2018 gcc_assert (memory_address_addr_space_p (mode, addr, as));
2020 addr = memory_address_addr_space (mode, addr, as);
2023 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2026 new_rtx = gen_rtx_MEM (mode, addr);
2027 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2031 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2032 way we are changing MEMREF, so we only preserve the alias set. */
2035 change_address (rtx memref, enum machine_mode mode, rtx addr)
2037 rtx new_rtx = change_address_1 (memref, mode, addr, 1);
2038 enum machine_mode mmode = GET_MODE (new_rtx);
2039 struct mem_attrs attrs, *defattrs;
2041 attrs = *get_mem_attrs (memref);
2042 defattrs = mode_mem_attrs[(int) mmode];
2043 attrs.expr = NULL_TREE;
2044 attrs.offset_known_p = false;
2045 attrs.size_known_p = defattrs->size_known_p;
2046 attrs.size = defattrs->size;
2047 attrs.align = defattrs->align;
2049 /* If there are no changes, just return the original memory reference. */
2050 if (new_rtx == memref)
2052 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2055 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2056 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2059 set_mem_attrs (new_rtx, &attrs);
2063 /* Return a memory reference like MEMREF, but with its mode changed
2064 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2065 nonzero, the memory address is forced to be valid.
2066 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2067 and caller is responsible for adjusting MEMREF base register. */
2070 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2071 int validate, int adjust)
2073 rtx addr = XEXP (memref, 0);
2075 enum machine_mode address_mode;
2077 struct mem_attrs attrs, *defattrs;
2078 unsigned HOST_WIDE_INT max_align;
2080 attrs = *get_mem_attrs (memref);
2082 /* If there are no changes, just return the original memory reference. */
2083 if (mode == GET_MODE (memref) && !offset
2084 && (!validate || memory_address_addr_space_p (mode, addr,
2088 /* ??? Prefer to create garbage instead of creating shared rtl.
2089 This may happen even if offset is nonzero -- consider
2090 (plus (plus reg reg) const_int) -- so do this always. */
2091 addr = copy_rtx (addr);
2093 /* Convert a possibly large offset to a signed value within the
2094 range of the target address space. */
2095 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2096 pbits = GET_MODE_BITSIZE (address_mode);
2097 if (HOST_BITS_PER_WIDE_INT > pbits)
2099 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2100 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2106 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2107 object, we can merge it into the LO_SUM. */
2108 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2110 && (unsigned HOST_WIDE_INT) offset
2111 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2112 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2113 plus_constant (address_mode,
2114 XEXP (addr, 1), offset));
2116 addr = plus_constant (address_mode, addr, offset);
2119 new_rtx = change_address_1 (memref, mode, addr, validate);
2121 /* If the address is a REG, change_address_1 rightfully returns memref,
2122 but this would destroy memref's MEM_ATTRS. */
2123 if (new_rtx == memref && offset != 0)
2124 new_rtx = copy_rtx (new_rtx);
2126 /* Compute the new values of the memory attributes due to this adjustment.
2127 We add the offsets and update the alignment. */
2128 if (attrs.offset_known_p)
2129 attrs.offset += offset;
2131 /* Compute the new alignment by taking the MIN of the alignment and the
2132 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2136 max_align = (offset & -offset) * BITS_PER_UNIT;
2137 attrs.align = MIN (attrs.align, max_align);
2140 /* We can compute the size in a number of ways. */
2141 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2142 if (defattrs->size_known_p)
2144 attrs.size_known_p = true;
2145 attrs.size = defattrs->size;
2147 else if (attrs.size_known_p)
2148 attrs.size -= offset;
2150 set_mem_attrs (new_rtx, &attrs);
2152 /* At some point, we should validate that this offset is within the object,
2153 if all the appropriate values are known. */
2157 /* Return a memory reference like MEMREF, but with its mode changed
2158 to MODE and its address changed to ADDR, which is assumed to be
2159 MEMREF offset by OFFSET bytes. If VALIDATE is
2160 nonzero, the memory address is forced to be valid. */
2163 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2164 HOST_WIDE_INT offset, int validate)
2166 memref = change_address_1 (memref, VOIDmode, addr, validate);
2167 return adjust_address_1 (memref, mode, offset, validate, 0);
2170 /* Return a memory reference like MEMREF, but whose address is changed by
2171 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2172 known to be in OFFSET (possibly 1). */
2175 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2177 rtx new_rtx, addr = XEXP (memref, 0);
2178 enum machine_mode address_mode;
2179 struct mem_attrs attrs, *defattrs;
2181 attrs = *get_mem_attrs (memref);
2182 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2183 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2185 /* At this point we don't know _why_ the address is invalid. It
2186 could have secondary memory references, multiplies or anything.
2188 However, if we did go and rearrange things, we can wind up not
2189 being able to recognize the magic around pic_offset_table_rtx.
2190 This stuff is fragile, and is yet another example of why it is
2191 bad to expose PIC machinery too early. */
2192 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2194 && GET_CODE (addr) == PLUS
2195 && XEXP (addr, 0) == pic_offset_table_rtx)
2197 addr = force_reg (GET_MODE (addr), addr);
2198 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2201 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2202 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2204 /* If there are no changes, just return the original memory reference. */
2205 if (new_rtx == memref)
2208 /* Update the alignment to reflect the offset. Reset the offset, which
2210 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2211 attrs.offset_known_p = false;
2212 attrs.size_known_p = defattrs->size_known_p;
2213 attrs.size = defattrs->size;
2214 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2215 set_mem_attrs (new_rtx, &attrs);
2219 /* Return a memory reference like MEMREF, but with its address changed to
2220 ADDR. The caller is asserting that the actual piece of memory pointed
2221 to is the same, just the form of the address is being changed, such as
2222 by putting something into a register. */
2225 replace_equiv_address (rtx memref, rtx addr)
2227 /* change_address_1 copies the memory attribute structure without change
2228 and that's exactly what we want here. */
2229 update_temp_slot_address (XEXP (memref, 0), addr);
2230 return change_address_1 (memref, VOIDmode, addr, 1);
2233 /* Likewise, but the reference is not required to be valid. */
2236 replace_equiv_address_nv (rtx memref, rtx addr)
2238 return change_address_1 (memref, VOIDmode, addr, 0);
2241 /* Return a memory reference like MEMREF, but with its mode widened to
2242 MODE and offset by OFFSET. This would be used by targets that e.g.
2243 cannot issue QImode memory operations and have to use SImode memory
2244 operations plus masking logic. */
2247 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2249 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2250 struct mem_attrs attrs;
2251 unsigned int size = GET_MODE_SIZE (mode);
2253 /* If there are no changes, just return the original memory reference. */
2254 if (new_rtx == memref)
2257 attrs = *get_mem_attrs (new_rtx);
2259 /* If we don't know what offset we were at within the expression, then
2260 we can't know if we've overstepped the bounds. */
2261 if (! attrs.offset_known_p)
2262 attrs.expr = NULL_TREE;
2266 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2268 tree field = TREE_OPERAND (attrs.expr, 1);
2269 tree offset = component_ref_field_offset (attrs.expr);
2271 if (! DECL_SIZE_UNIT (field))
2273 attrs.expr = NULL_TREE;
2277 /* Is the field at least as large as the access? If so, ok,
2278 otherwise strip back to the containing structure. */
2279 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2280 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2281 && attrs.offset >= 0)
2284 if (! host_integerp (offset, 1))
2286 attrs.expr = NULL_TREE;
2290 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2291 attrs.offset += tree_low_cst (offset, 1);
2292 attrs.offset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2295 /* Similarly for the decl. */
2296 else if (DECL_P (attrs.expr)
2297 && DECL_SIZE_UNIT (attrs.expr)
2298 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2299 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2300 && (! attrs.offset_known_p || attrs.offset >= 0))
2304 /* The widened memory access overflows the expression, which means
2305 that it could alias another expression. Zap it. */
2306 attrs.expr = NULL_TREE;
2312 attrs.offset_known_p = false;
2314 /* The widened memory may alias other stuff, so zap the alias set. */
2315 /* ??? Maybe use get_alias_set on any remaining expression. */
2317 attrs.size_known_p = true;
2319 set_mem_attrs (new_rtx, &attrs);
2323 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2324 static GTY(()) tree spill_slot_decl;
2327 get_spill_slot_decl (bool force_build_p)
2329 tree d = spill_slot_decl;
2331 struct mem_attrs attrs;
2333 if (d || !force_build_p)
2336 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2337 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2338 DECL_ARTIFICIAL (d) = 1;
2339 DECL_IGNORED_P (d) = 1;
2341 spill_slot_decl = d;
2343 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2344 MEM_NOTRAP_P (rd) = 1;
2345 attrs = *mode_mem_attrs[(int) BLKmode];
2346 attrs.alias = new_alias_set ();
2348 set_mem_attrs (rd, &attrs);
2349 SET_DECL_RTL (d, rd);
2354 /* Given MEM, a result from assign_stack_local, fill in the memory
2355 attributes as appropriate for a register allocator spill slot.
2356 These slots are not aliasable by other memory. We arrange for
2357 them all to use a single MEM_EXPR, so that the aliasing code can
2358 work properly in the case of shared spill slots. */
2361 set_mem_attrs_for_spill (rtx mem)
2363 struct mem_attrs attrs;
2366 attrs = *get_mem_attrs (mem);
2367 attrs.expr = get_spill_slot_decl (true);
2368 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2369 attrs.addrspace = ADDR_SPACE_GENERIC;
2371 /* We expect the incoming memory to be of the form:
2372 (mem:MODE (plus (reg sfp) (const_int offset)))
2373 with perhaps the plus missing for offset = 0. */
2374 addr = XEXP (mem, 0);
2375 attrs.offset_known_p = true;
2377 if (GET_CODE (addr) == PLUS
2378 && CONST_INT_P (XEXP (addr, 1)))
2379 attrs.offset = INTVAL (XEXP (addr, 1));
2381 set_mem_attrs (mem, &attrs);
2382 MEM_NOTRAP_P (mem) = 1;
2385 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2388 gen_label_rtx (void)
2390 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2391 NULL, label_num++, NULL);
2394 /* For procedure integration. */
2396 /* Install new pointers to the first and last insns in the chain.
2397 Also, set cur_insn_uid to one higher than the last in use.
2398 Used for an inline-procedure after copying the insn chain. */
2401 set_new_first_and_last_insn (rtx first, rtx last)
2405 set_first_insn (first);
2406 set_last_insn (last);
2409 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2411 int debug_count = 0;
2413 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2414 cur_debug_insn_uid = 0;
2416 for (insn = first; insn; insn = NEXT_INSN (insn))
2417 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2418 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2421 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2422 if (DEBUG_INSN_P (insn))
2427 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2429 cur_debug_insn_uid++;
2432 for (insn = first; insn; insn = NEXT_INSN (insn))
2433 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2438 /* Go through all the RTL insn bodies and copy any invalid shared
2439 structure. This routine should only be called once. */
2442 unshare_all_rtl_1 (rtx insn)
2444 /* Unshare just about everything else. */
2445 unshare_all_rtl_in_chain (insn);
2447 /* Make sure the addresses of stack slots found outside the insn chain
2448 (such as, in DECL_RTL of a variable) are not shared
2449 with the insn chain.
2451 This special care is necessary when the stack slot MEM does not
2452 actually appear in the insn chain. If it does appear, its address
2453 is unshared from all else at that point. */
2454 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2457 /* Go through all the RTL insn bodies and copy any invalid shared
2458 structure, again. This is a fairly expensive thing to do so it
2459 should be done sparingly. */
2462 unshare_all_rtl_again (rtx insn)
2467 for (p = insn; p; p = NEXT_INSN (p))
2470 reset_used_flags (PATTERN (p));
2471 reset_used_flags (REG_NOTES (p));
2473 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2476 /* Make sure that virtual stack slots are not shared. */
2477 set_used_decls (DECL_INITIAL (cfun->decl));
2479 /* Make sure that virtual parameters are not shared. */
2480 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2481 set_used_flags (DECL_RTL (decl));
2483 reset_used_flags (stack_slot_list);
2485 unshare_all_rtl_1 (insn);
2489 unshare_all_rtl (void)
2491 unshare_all_rtl_1 (get_insns ());
2496 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2497 Recursively does the same for subexpressions. */
2500 verify_rtx_sharing (rtx orig, rtx insn)
2505 const char *format_ptr;
2510 code = GET_CODE (x);
2512 /* These types may be freely shared. */
2532 /* SCRATCH must be shared because they represent distinct values. */
2534 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2539 if (shared_const_p (orig))
2544 /* A MEM is allowed to be shared if its address is constant. */
2545 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2546 || reload_completed || reload_in_progress)
2555 /* This rtx may not be shared. If it has already been seen,
2556 replace it with a copy of itself. */
2557 #ifdef ENABLE_CHECKING
2558 if (RTX_FLAG (x, used))
2560 error ("invalid rtl sharing found in the insn");
2562 error ("shared rtx");
2564 internal_error ("internal consistency failure");
2567 gcc_assert (!RTX_FLAG (x, used));
2569 RTX_FLAG (x, used) = 1;
2571 /* Now scan the subexpressions recursively. */
2573 format_ptr = GET_RTX_FORMAT (code);
2575 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2577 switch (*format_ptr++)
2580 verify_rtx_sharing (XEXP (x, i), insn);
2584 if (XVEC (x, i) != NULL)
2587 int len = XVECLEN (x, i);
2589 for (j = 0; j < len; j++)
2591 /* We allow sharing of ASM_OPERANDS inside single
2593 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2594 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2596 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2598 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2607 /* Go through all the RTL insn bodies and check that there is no unexpected
2608 sharing in between the subexpressions. */
2611 verify_rtl_sharing (void)
2615 timevar_push (TV_VERIFY_RTL_SHARING);
2617 for (p = get_insns (); p; p = NEXT_INSN (p))
2620 reset_used_flags (PATTERN (p));
2621 reset_used_flags (REG_NOTES (p));
2623 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2624 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2627 rtx q, sequence = PATTERN (p);
2629 for (i = 0; i < XVECLEN (sequence, 0); i++)
2631 q = XVECEXP (sequence, 0, i);
2632 gcc_assert (INSN_P (q));
2633 reset_used_flags (PATTERN (q));
2634 reset_used_flags (REG_NOTES (q));
2636 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q));
2641 for (p = get_insns (); p; p = NEXT_INSN (p))
2644 verify_rtx_sharing (PATTERN (p), p);
2645 verify_rtx_sharing (REG_NOTES (p), p);
2647 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p), p);
2650 timevar_pop (TV_VERIFY_RTL_SHARING);
2653 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2654 Assumes the mark bits are cleared at entry. */
2657 unshare_all_rtl_in_chain (rtx insn)
2659 for (; insn; insn = NEXT_INSN (insn))
2662 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2663 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2665 CALL_INSN_FUNCTION_USAGE (insn)
2666 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
2670 /* Go through all virtual stack slots of a function and mark them as
2671 shared. We never replace the DECL_RTLs themselves with a copy,
2672 but expressions mentioned into a DECL_RTL cannot be shared with
2673 expressions in the instruction stream.
2675 Note that reload may convert pseudo registers into memories in-place.
2676 Pseudo registers are always shared, but MEMs never are. Thus if we
2677 reset the used flags on MEMs in the instruction stream, we must set
2678 them again on MEMs that appear in DECL_RTLs. */
2681 set_used_decls (tree blk)
2686 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2687 if (DECL_RTL_SET_P (t))
2688 set_used_flags (DECL_RTL (t));
2690 /* Now process sub-blocks. */
2691 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2695 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2696 Recursively does the same for subexpressions. Uses
2697 copy_rtx_if_shared_1 to reduce stack space. */
2700 copy_rtx_if_shared (rtx orig)
2702 copy_rtx_if_shared_1 (&orig);
2706 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2707 use. Recursively does the same for subexpressions. */
2710 copy_rtx_if_shared_1 (rtx *orig1)
2716 const char *format_ptr;
2720 /* Repeat is used to turn tail-recursion into iteration. */
2727 code = GET_CODE (x);
2729 /* These types may be freely shared. */
2748 /* SCRATCH must be shared because they represent distinct values. */
2751 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2756 if (shared_const_p (x))
2766 /* The chain of insns is not being copied. */
2773 /* This rtx may not be shared. If it has already been seen,
2774 replace it with a copy of itself. */
2776 if (RTX_FLAG (x, used))
2778 x = shallow_copy_rtx (x);
2781 RTX_FLAG (x, used) = 1;
2783 /* Now scan the subexpressions recursively.
2784 We can store any replaced subexpressions directly into X
2785 since we know X is not shared! Any vectors in X
2786 must be copied if X was copied. */
2788 format_ptr = GET_RTX_FORMAT (code);
2789 length = GET_RTX_LENGTH (code);
2792 for (i = 0; i < length; i++)
2794 switch (*format_ptr++)
2798 copy_rtx_if_shared_1 (last_ptr);
2799 last_ptr = &XEXP (x, i);
2803 if (XVEC (x, i) != NULL)
2806 int len = XVECLEN (x, i);
2808 /* Copy the vector iff I copied the rtx and the length
2810 if (copied && len > 0)
2811 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2813 /* Call recursively on all inside the vector. */
2814 for (j = 0; j < len; j++)
2817 copy_rtx_if_shared_1 (last_ptr);
2818 last_ptr = &XVECEXP (x, i, j);
2833 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2836 mark_used_flags (rtx x, int flag)
2840 const char *format_ptr;
2843 /* Repeat is used to turn tail-recursion into iteration. */
2848 code = GET_CODE (x);
2850 /* These types may be freely shared so we needn't do any resetting
2877 /* The chain of insns is not being copied. */
2884 RTX_FLAG (x, used) = flag;
2886 format_ptr = GET_RTX_FORMAT (code);
2887 length = GET_RTX_LENGTH (code);
2889 for (i = 0; i < length; i++)
2891 switch (*format_ptr++)
2899 mark_used_flags (XEXP (x, i), flag);
2903 for (j = 0; j < XVECLEN (x, i); j++)
2904 mark_used_flags (XVECEXP (x, i, j), flag);
2910 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2911 to look for shared sub-parts. */
2914 reset_used_flags (rtx x)
2916 mark_used_flags (x, 0);
2919 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2920 to look for shared sub-parts. */
2923 set_used_flags (rtx x)
2925 mark_used_flags (x, 1);
2928 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2929 Return X or the rtx for the pseudo reg the value of X was copied into.
2930 OTHER must be valid as a SET_DEST. */
2933 make_safe_from (rtx x, rtx other)
2936 switch (GET_CODE (other))
2939 other = SUBREG_REG (other);
2941 case STRICT_LOW_PART:
2944 other = XEXP (other, 0);
2953 && GET_CODE (x) != SUBREG)
2955 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2956 || reg_mentioned_p (other, x))))
2958 rtx temp = gen_reg_rtx (GET_MODE (x));
2959 emit_move_insn (temp, x);
2965 /* Emission of insns (adding them to the doubly-linked list). */
2967 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2970 get_last_insn_anywhere (void)
2972 struct sequence_stack *stack;
2973 if (get_last_insn ())
2974 return get_last_insn ();
2975 for (stack = seq_stack; stack; stack = stack->next)
2976 if (stack->last != 0)
2981 /* Return the first nonnote insn emitted in current sequence or current
2982 function. This routine looks inside SEQUENCEs. */
2985 get_first_nonnote_insn (void)
2987 rtx insn = get_insns ();
2992 for (insn = next_insn (insn);
2993 insn && NOTE_P (insn);
2994 insn = next_insn (insn))
2998 if (NONJUMP_INSN_P (insn)
2999 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3000 insn = XVECEXP (PATTERN (insn), 0, 0);
3007 /* Return the last nonnote insn emitted in current sequence or current
3008 function. This routine looks inside SEQUENCEs. */
3011 get_last_nonnote_insn (void)
3013 rtx insn = get_last_insn ();
3018 for (insn = previous_insn (insn);
3019 insn && NOTE_P (insn);
3020 insn = previous_insn (insn))
3024 if (NONJUMP_INSN_P (insn)
3025 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3026 insn = XVECEXP (PATTERN (insn), 0,
3027 XVECLEN (PATTERN (insn), 0) - 1);
3034 /* Return the number of actual (non-debug) insns emitted in this
3038 get_max_insn_count (void)
3040 int n = cur_insn_uid;
3042 /* The table size must be stable across -g, to avoid codegen
3043 differences due to debug insns, and not be affected by
3044 -fmin-insn-uid, to avoid excessive table size and to simplify
3045 debugging of -fcompare-debug failures. */
3046 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3047 n -= cur_debug_insn_uid;
3049 n -= MIN_NONDEBUG_INSN_UID;
3055 /* Return the next insn. If it is a SEQUENCE, return the first insn
3059 next_insn (rtx insn)
3063 insn = NEXT_INSN (insn);
3064 if (insn && NONJUMP_INSN_P (insn)
3065 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3066 insn = XVECEXP (PATTERN (insn), 0, 0);
3072 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3076 previous_insn (rtx insn)
3080 insn = PREV_INSN (insn);
3081 if (insn && NONJUMP_INSN_P (insn)
3082 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3083 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3089 /* Return the next insn after INSN that is not a NOTE. This routine does not
3090 look inside SEQUENCEs. */
3093 next_nonnote_insn (rtx insn)
3097 insn = NEXT_INSN (insn);
3098 if (insn == 0 || !NOTE_P (insn))
3105 /* Return the next insn after INSN that is not a NOTE, but stop the
3106 search before we enter another basic block. This routine does not
3107 look inside SEQUENCEs. */
3110 next_nonnote_insn_bb (rtx insn)
3114 insn = NEXT_INSN (insn);
3115 if (insn == 0 || !NOTE_P (insn))
3117 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3124 /* Return the previous insn before INSN that is not a NOTE. This routine does
3125 not look inside SEQUENCEs. */
3128 prev_nonnote_insn (rtx insn)
3132 insn = PREV_INSN (insn);
3133 if (insn == 0 || !NOTE_P (insn))
3140 /* Return the previous insn before INSN that is not a NOTE, but stop
3141 the search before we enter another basic block. This routine does
3142 not look inside SEQUENCEs. */
3145 prev_nonnote_insn_bb (rtx insn)
3149 insn = PREV_INSN (insn);
3150 if (insn == 0 || !NOTE_P (insn))
3152 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3159 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3160 routine does not look inside SEQUENCEs. */
3163 next_nondebug_insn (rtx insn)
3167 insn = NEXT_INSN (insn);
3168 if (insn == 0 || !DEBUG_INSN_P (insn))
3175 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3176 This routine does not look inside SEQUENCEs. */
3179 prev_nondebug_insn (rtx insn)
3183 insn = PREV_INSN (insn);
3184 if (insn == 0 || !DEBUG_INSN_P (insn))
3191 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3192 This routine does not look inside SEQUENCEs. */
3195 next_nonnote_nondebug_insn (rtx insn)
3199 insn = NEXT_INSN (insn);
3200 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3207 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3208 This routine does not look inside SEQUENCEs. */
3211 prev_nonnote_nondebug_insn (rtx insn)
3215 insn = PREV_INSN (insn);
3216 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3223 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3224 or 0, if there is none. This routine does not look inside
3228 next_real_insn (rtx insn)
3232 insn = NEXT_INSN (insn);
3233 if (insn == 0 || INSN_P (insn))
3240 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3241 or 0, if there is none. This routine does not look inside
3245 prev_real_insn (rtx insn)
3249 insn = PREV_INSN (insn);
3250 if (insn == 0 || INSN_P (insn))
3257 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3258 This routine does not look inside SEQUENCEs. */
3261 last_call_insn (void)
3265 for (insn = get_last_insn ();
3266 insn && !CALL_P (insn);
3267 insn = PREV_INSN (insn))
3273 /* Find the next insn after INSN that really does something. This routine
3274 does not look inside SEQUENCEs. After reload this also skips over
3275 standalone USE and CLOBBER insn. */
3278 active_insn_p (const_rtx insn)
3280 return (CALL_P (insn) || JUMP_P (insn)
3281 || (NONJUMP_INSN_P (insn)
3282 && (! reload_completed
3283 || (GET_CODE (PATTERN (insn)) != USE
3284 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3288 next_active_insn (rtx insn)
3292 insn = NEXT_INSN (insn);
3293 if (insn == 0 || active_insn_p (insn))
3300 /* Find the last insn before INSN that really does something. This routine
3301 does not look inside SEQUENCEs. After reload this also skips over
3302 standalone USE and CLOBBER insn. */
3305 prev_active_insn (rtx insn)
3309 insn = PREV_INSN (insn);
3310 if (insn == 0 || active_insn_p (insn))
3317 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3320 next_label (rtx insn)
3324 insn = NEXT_INSN (insn);
3325 if (insn == 0 || LABEL_P (insn))
3332 /* Return the last label to mark the same position as LABEL. Return LABEL
3333 itself if it is null or any return rtx. */
3336 skip_consecutive_labels (rtx label)
3340 if (label && ANY_RETURN_P (label))
3343 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3351 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3352 and REG_CC_USER notes so we can find it. */
3355 link_cc0_insns (rtx insn)
3357 rtx user = next_nonnote_insn (insn);
3359 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3360 user = XVECEXP (PATTERN (user), 0, 0);
3362 add_reg_note (user, REG_CC_SETTER, insn);
3363 add_reg_note (insn, REG_CC_USER, user);
3366 /* Return the next insn that uses CC0 after INSN, which is assumed to
3367 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3368 applied to the result of this function should yield INSN).
3370 Normally, this is simply the next insn. However, if a REG_CC_USER note
3371 is present, it contains the insn that uses CC0.
3373 Return 0 if we can't find the insn. */
3376 next_cc0_user (rtx insn)
3378 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3381 return XEXP (note, 0);
3383 insn = next_nonnote_insn (insn);
3384 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3385 insn = XVECEXP (PATTERN (insn), 0, 0);
3387 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3393 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3394 note, it is the previous insn. */
3397 prev_cc0_setter (rtx insn)
3399 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3402 return XEXP (note, 0);
3404 insn = prev_nonnote_insn (insn);
3405 gcc_assert (sets_cc0_p (PATTERN (insn)));
3412 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3415 find_auto_inc (rtx *xp, void *data)
3418 rtx reg = (rtx) data;
3420 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3423 switch (GET_CODE (x))
3431 if (rtx_equal_p (reg, XEXP (x, 0)))
3442 /* Increment the label uses for all labels present in rtx. */
3445 mark_label_nuses (rtx x)
3451 code = GET_CODE (x);
3452 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3453 LABEL_NUSES (XEXP (x, 0))++;
3455 fmt = GET_RTX_FORMAT (code);
3456 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3459 mark_label_nuses (XEXP (x, i));
3460 else if (fmt[i] == 'E')
3461 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3462 mark_label_nuses (XVECEXP (x, i, j));
3467 /* Try splitting insns that can be split for better scheduling.
3468 PAT is the pattern which might split.
3469 TRIAL is the insn providing PAT.
3470 LAST is nonzero if we should return the last insn of the sequence produced.
3472 If this routine succeeds in splitting, it returns the first or last
3473 replacement insn depending on the value of LAST. Otherwise, it
3474 returns TRIAL. If the insn to be returned can be split, it will be. */
3477 try_split (rtx pat, rtx trial, int last)
3479 rtx before = PREV_INSN (trial);
3480 rtx after = NEXT_INSN (trial);
3481 int has_barrier = 0;
3484 rtx insn_last, insn;
3487 /* We're not good at redistributing frame information. */
3488 if (RTX_FRAME_RELATED_P (trial))
3491 if (any_condjump_p (trial)
3492 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3493 split_branch_probability = INTVAL (XEXP (note, 0));
3494 probability = split_branch_probability;
3496 seq = split_insns (pat, trial);
3498 split_branch_probability = -1;
3500 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3501 We may need to handle this specially. */
3502 if (after && BARRIER_P (after))
3505 after = NEXT_INSN (after);
3511 /* Avoid infinite loop if any insn of the result matches
3512 the original pattern. */
3516 if (INSN_P (insn_last)
3517 && rtx_equal_p (PATTERN (insn_last), pat))
3519 if (!NEXT_INSN (insn_last))
3521 insn_last = NEXT_INSN (insn_last);
3524 /* We will be adding the new sequence to the function. The splitters
3525 may have introduced invalid RTL sharing, so unshare the sequence now. */
3526 unshare_all_rtl_in_chain (seq);
3529 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3533 mark_jump_label (PATTERN (insn), insn, 0);
3535 if (probability != -1
3536 && any_condjump_p (insn)
3537 && !find_reg_note (insn, REG_BR_PROB, 0))
3539 /* We can preserve the REG_BR_PROB notes only if exactly
3540 one jump is created, otherwise the machine description
3541 is responsible for this step using
3542 split_branch_probability variable. */
3543 gcc_assert (njumps == 1);
3544 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3549 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3550 in SEQ and copy any additional information across. */
3553 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3558 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3559 target may have explicitly specified. */
3560 p = &CALL_INSN_FUNCTION_USAGE (insn);
3563 *p = CALL_INSN_FUNCTION_USAGE (trial);
3565 /* If the old call was a sibling call, the new one must
3567 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3569 /* If the new call is the last instruction in the sequence,
3570 it will effectively replace the old call in-situ. Otherwise
3571 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3572 so that it comes immediately after the new call. */
3573 if (NEXT_INSN (insn))
3574 for (next = NEXT_INSN (trial);
3575 next && NOTE_P (next);
3576 next = NEXT_INSN (next))
3577 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3580 add_insn_after (next, insn, NULL);
3586 /* Copy notes, particularly those related to the CFG. */
3587 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3589 switch (REG_NOTE_KIND (note))
3592 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3598 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3601 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3605 case REG_NON_LOCAL_GOTO:
3606 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3609 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3615 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3617 rtx reg = XEXP (note, 0);
3618 if (!FIND_REG_INC_NOTE (insn, reg)
3619 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3620 add_reg_note (insn, REG_INC, reg);
3626 fixup_args_size_notes (NULL_RTX, insn_last, INTVAL (XEXP (note, 0)));
3634 /* If there are LABELS inside the split insns increment the
3635 usage count so we don't delete the label. */
3639 while (insn != NULL_RTX)
3641 /* JUMP_P insns have already been "marked" above. */
3642 if (NONJUMP_INSN_P (insn))
3643 mark_label_nuses (PATTERN (insn));
3645 insn = PREV_INSN (insn);
3649 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3651 delete_insn (trial);
3653 emit_barrier_after (tem);
3655 /* Recursively call try_split for each new insn created; by the
3656 time control returns here that insn will be fully split, so
3657 set LAST and continue from the insn after the one returned.
3658 We can't use next_active_insn here since AFTER may be a note.
3659 Ignore deleted insns, which can be occur if not optimizing. */
3660 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3661 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3662 tem = try_split (PATTERN (tem), tem, 1);
3664 /* Return either the first or the last insn, depending on which was
3667 ? (after ? PREV_INSN (after) : get_last_insn ())
3668 : NEXT_INSN (before);
3671 /* Make and return an INSN rtx, initializing all its slots.
3672 Store PATTERN in the pattern slots. */
3675 make_insn_raw (rtx pattern)
3679 insn = rtx_alloc (INSN);
3681 INSN_UID (insn) = cur_insn_uid++;
3682 PATTERN (insn) = pattern;
3683 INSN_CODE (insn) = -1;
3684 REG_NOTES (insn) = NULL;
3685 INSN_LOCATOR (insn) = curr_insn_locator ();
3686 BLOCK_FOR_INSN (insn) = NULL;
3688 #ifdef ENABLE_RTL_CHECKING
3691 && (returnjump_p (insn)
3692 || (GET_CODE (insn) == SET
3693 && SET_DEST (insn) == pc_rtx)))
3695 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3703 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3706 make_debug_insn_raw (rtx pattern)
3710 insn = rtx_alloc (DEBUG_INSN);
3711 INSN_UID (insn) = cur_debug_insn_uid++;
3712 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3713 INSN_UID (insn) = cur_insn_uid++;
3715 PATTERN (insn) = pattern;
3716 INSN_CODE (insn) = -1;
3717 REG_NOTES (insn) = NULL;
3718 INSN_LOCATOR (insn) = curr_insn_locator ();
3719 BLOCK_FOR_INSN (insn) = NULL;
3724 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3727 make_jump_insn_raw (rtx pattern)
3731 insn = rtx_alloc (JUMP_INSN);
3732 INSN_UID (insn) = cur_insn_uid++;
3734 PATTERN (insn) = pattern;
3735 INSN_CODE (insn) = -1;
3736 REG_NOTES (insn) = NULL;
3737 JUMP_LABEL (insn) = NULL;
3738 INSN_LOCATOR (insn) = curr_insn_locator ();
3739 BLOCK_FOR_INSN (insn) = NULL;
3744 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3747 make_call_insn_raw (rtx pattern)
3751 insn = rtx_alloc (CALL_INSN);
3752 INSN_UID (insn) = cur_insn_uid++;
3754 PATTERN (insn) = pattern;
3755 INSN_CODE (insn) = -1;
3756 REG_NOTES (insn) = NULL;
3757 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3758 INSN_LOCATOR (insn) = curr_insn_locator ();
3759 BLOCK_FOR_INSN (insn) = NULL;
3764 /* Add INSN to the end of the doubly-linked list.
3765 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3770 PREV_INSN (insn) = get_last_insn();
3771 NEXT_INSN (insn) = 0;
3773 if (NULL != get_last_insn())
3774 NEXT_INSN (get_last_insn ()) = insn;
3776 if (NULL == get_insns ())
3777 set_first_insn (insn);
3779 set_last_insn (insn);
3782 /* Add INSN into the doubly-linked list after insn AFTER. This and
3783 the next should be the only functions called to insert an insn once
3784 delay slots have been filled since only they know how to update a
3788 add_insn_after (rtx insn, rtx after, basic_block bb)
3790 rtx next = NEXT_INSN (after);
3792 gcc_assert (!optimize || !INSN_DELETED_P (after));
3794 NEXT_INSN (insn) = next;
3795 PREV_INSN (insn) = after;
3799 PREV_INSN (next) = insn;
3800 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3801 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3803 else if (get_last_insn () == after)
3804 set_last_insn (insn);
3807 struct sequence_stack *stack = seq_stack;
3808 /* Scan all pending sequences too. */
3809 for (; stack; stack = stack->next)
3810 if (after == stack->last)
3819 if (!BARRIER_P (after)
3820 && !BARRIER_P (insn)
3821 && (bb = BLOCK_FOR_INSN (after)))
3823 set_block_for_insn (insn, bb);
3825 df_insn_rescan (insn);
3826 /* Should not happen as first in the BB is always
3827 either NOTE or LABEL. */
3828 if (BB_END (bb) == after
3829 /* Avoid clobbering of structure when creating new BB. */
3830 && !BARRIER_P (insn)
3831 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3835 NEXT_INSN (after) = insn;
3836 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3838 rtx sequence = PATTERN (after);
3839 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3843 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3844 the previous should be the only functions called to insert an insn
3845 once delay slots have been filled since only they know how to
3846 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3850 add_insn_before (rtx insn, rtx before, basic_block bb)
3852 rtx prev = PREV_INSN (before);
3854 gcc_assert (!optimize || !INSN_DELETED_P (before));
3856 PREV_INSN (insn) = prev;
3857 NEXT_INSN (insn) = before;
3861 NEXT_INSN (prev) = insn;
3862 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3864 rtx sequence = PATTERN (prev);
3865 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3868 else if (get_insns () == before)
3869 set_first_insn (insn);
3872 struct sequence_stack *stack = seq_stack;
3873 /* Scan all pending sequences too. */
3874 for (; stack; stack = stack->next)
3875 if (before == stack->first)
3877 stack->first = insn;
3885 && !BARRIER_P (before)
3886 && !BARRIER_P (insn))
3887 bb = BLOCK_FOR_INSN (before);
3891 set_block_for_insn (insn, bb);
3893 df_insn_rescan (insn);
3894 /* Should not happen as first in the BB is always either NOTE or
3896 gcc_assert (BB_HEAD (bb) != insn
3897 /* Avoid clobbering of structure when creating new BB. */
3899 || NOTE_INSN_BASIC_BLOCK_P (insn));
3902 PREV_INSN (before) = insn;
3903 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3904 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3908 /* Replace insn with an deleted instruction note. */
3911 set_insn_deleted (rtx insn)
3913 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3914 PUT_CODE (insn, NOTE);
3915 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3919 /* Remove an insn from its doubly-linked list. This function knows how
3920 to handle sequences. */
3922 remove_insn (rtx insn)
3924 rtx next = NEXT_INSN (insn);
3925 rtx prev = PREV_INSN (insn);
3928 /* Later in the code, the block will be marked dirty. */
3929 df_insn_delete (NULL, INSN_UID (insn));
3933 NEXT_INSN (prev) = next;
3934 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3936 rtx sequence = PATTERN (prev);
3937 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3940 else if (get_insns () == insn)
3943 PREV_INSN (next) = NULL;
3944 set_first_insn (next);
3948 struct sequence_stack *stack = seq_stack;
3949 /* Scan all pending sequences too. */
3950 for (; stack; stack = stack->next)
3951 if (insn == stack->first)
3953 stack->first = next;
3962 PREV_INSN (next) = prev;
3963 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3964 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3966 else if (get_last_insn () == insn)
3967 set_last_insn (prev);
3970 struct sequence_stack *stack = seq_stack;
3971 /* Scan all pending sequences too. */
3972 for (; stack; stack = stack->next)
3973 if (insn == stack->last)
3981 if (!BARRIER_P (insn)
3982 && (bb = BLOCK_FOR_INSN (insn)))
3984 if (NONDEBUG_INSN_P (insn))
3985 df_set_bb_dirty (bb);
3986 if (BB_HEAD (bb) == insn)
3988 /* Never ever delete the basic block note without deleting whole
3990 gcc_assert (!NOTE_P (insn));
3991 BB_HEAD (bb) = next;
3993 if (BB_END (bb) == insn)
3998 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4001 add_function_usage_to (rtx call_insn, rtx call_fusage)
4003 gcc_assert (call_insn && CALL_P (call_insn));
4005 /* Put the register usage information on the CALL. If there is already
4006 some usage information, put ours at the end. */
4007 if (CALL_INSN_FUNCTION_USAGE (call_insn))
4011 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4012 link = XEXP (link, 1))
4015 XEXP (link, 1) = call_fusage;
4018 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4021 /* Delete all insns made since FROM.
4022 FROM becomes the new last instruction. */
4025 delete_insns_since (rtx from)
4030 NEXT_INSN (from) = 0;
4031 set_last_insn (from);
4034 /* This function is deprecated, please use sequences instead.
4036 Move a consecutive bunch of insns to a different place in the chain.
4037 The insns to be moved are those between FROM and TO.
4038 They are moved to a new position after the insn AFTER.
4039 AFTER must not be FROM or TO or any insn in between.
4041 This function does not know about SEQUENCEs and hence should not be
4042 called after delay-slot filling has been done. */
4045 reorder_insns_nobb (rtx from, rtx to, rtx after)
4047 #ifdef ENABLE_CHECKING
4049 for (x = from; x != to; x = NEXT_INSN (x))
4050 gcc_assert (after != x);
4051 gcc_assert (after != to);
4054 /* Splice this bunch out of where it is now. */
4055 if (PREV_INSN (from))
4056 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4058 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4059 if (get_last_insn () == to)
4060 set_last_insn (PREV_INSN (from));
4061 if (get_insns () == from)
4062 set_first_insn (NEXT_INSN (to));
4064 /* Make the new neighbors point to it and it to them. */
4065 if (NEXT_INSN (after))
4066 PREV_INSN (NEXT_INSN (after)) = to;
4068 NEXT_INSN (to) = NEXT_INSN (after);
4069 PREV_INSN (from) = after;
4070 NEXT_INSN (after) = from;
4071 if (after == get_last_insn())
4075 /* Same as function above, but take care to update BB boundaries. */
4077 reorder_insns (rtx from, rtx to, rtx after)
4079 rtx prev = PREV_INSN (from);
4080 basic_block bb, bb2;
4082 reorder_insns_nobb (from, to, after);
4084 if (!BARRIER_P (after)
4085 && (bb = BLOCK_FOR_INSN (after)))
4088 df_set_bb_dirty (bb);
4090 if (!BARRIER_P (from)
4091 && (bb2 = BLOCK_FOR_INSN (from)))
4093 if (BB_END (bb2) == to)
4094 BB_END (bb2) = prev;
4095 df_set_bb_dirty (bb2);
4098 if (BB_END (bb) == after)
4101 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4103 df_insn_change_bb (x, bb);
4108 /* Emit insn(s) of given code and pattern
4109 at a specified place within the doubly-linked list.
4111 All of the emit_foo global entry points accept an object
4112 X which is either an insn list or a PATTERN of a single
4115 There are thus a few canonical ways to generate code and
4116 emit it at a specific place in the instruction stream. For
4117 example, consider the instruction named SPOT and the fact that
4118 we would like to emit some instructions before SPOT. We might
4122 ... emit the new instructions ...
4123 insns_head = get_insns ();
4126 emit_insn_before (insns_head, SPOT);
4128 It used to be common to generate SEQUENCE rtl instead, but that
4129 is a relic of the past which no longer occurs. The reason is that
4130 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4131 generated would almost certainly die right after it was created. */
4134 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4135 rtx (*make_raw) (rtx))
4139 gcc_assert (before);
4144 switch (GET_CODE (x))
4156 rtx next = NEXT_INSN (insn);
4157 add_insn_before (insn, before, bb);
4163 #ifdef ENABLE_RTL_CHECKING
4170 last = (*make_raw) (x);
4171 add_insn_before (last, before, bb);
4178 /* Make X be output before the instruction BEFORE. */
4181 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4183 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4186 /* Make an instruction with body X and code JUMP_INSN
4187 and output it before the instruction BEFORE. */
4190 emit_jump_insn_before_noloc (rtx x, rtx before)
4192 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4193 make_jump_insn_raw);
4196 /* Make an instruction with body X and code CALL_INSN
4197 and output it before the instruction BEFORE. */
4200 emit_call_insn_before_noloc (rtx x, rtx before)
4202 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4203 make_call_insn_raw);
4206 /* Make an instruction with body X and code DEBUG_INSN
4207 and output it before the instruction BEFORE. */
4210 emit_debug_insn_before_noloc (rtx x, rtx before)
4212 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4213 make_debug_insn_raw);
4216 /* Make an insn of code BARRIER
4217 and output it before the insn BEFORE. */
4220 emit_barrier_before (rtx before)
4222 rtx insn = rtx_alloc (BARRIER);
4224 INSN_UID (insn) = cur_insn_uid++;
4226 add_insn_before (insn, before, NULL);
4230 /* Emit the label LABEL before the insn BEFORE. */
4233 emit_label_before (rtx label, rtx before)
4235 /* This can be called twice for the same label as a result of the
4236 confusion that follows a syntax error! So make it harmless. */
4237 if (INSN_UID (label) == 0)
4239 INSN_UID (label) = cur_insn_uid++;
4240 add_insn_before (label, before, NULL);
4246 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4249 emit_note_before (enum insn_note subtype, rtx before)
4251 rtx note = rtx_alloc (NOTE);
4252 INSN_UID (note) = cur_insn_uid++;
4253 NOTE_KIND (note) = subtype;
4254 BLOCK_FOR_INSN (note) = NULL;
4255 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4257 add_insn_before (note, before, NULL);
4261 /* Helper for emit_insn_after, handles lists of instructions
4265 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4269 if (!bb && !BARRIER_P (after))
4270 bb = BLOCK_FOR_INSN (after);
4274 df_set_bb_dirty (bb);
4275 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4276 if (!BARRIER_P (last))
4278 set_block_for_insn (last, bb);
4279 df_insn_rescan (last);
4281 if (!BARRIER_P (last))
4283 set_block_for_insn (last, bb);
4284 df_insn_rescan (last);
4286 if (BB_END (bb) == after)
4290 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4293 after_after = NEXT_INSN (after);
4295 NEXT_INSN (after) = first;
4296 PREV_INSN (first) = after;
4297 NEXT_INSN (last) = after_after;
4299 PREV_INSN (after_after) = last;
4301 if (after == get_last_insn())
4302 set_last_insn (last);
4308 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
4309 rtx (*make_raw)(rtx))
4318 switch (GET_CODE (x))
4327 last = emit_insn_after_1 (x, after, bb);
4330 #ifdef ENABLE_RTL_CHECKING
4337 last = (*make_raw) (x);
4338 add_insn_after (last, after, bb);
4345 /* Make X be output after the insn AFTER and set the BB of insn. If
4346 BB is NULL, an attempt is made to infer the BB from AFTER. */
4349 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4351 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4355 /* Make an insn of code JUMP_INSN with body X
4356 and output it after the insn AFTER. */
4359 emit_jump_insn_after_noloc (rtx x, rtx after)
4361 return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
4364 /* Make an instruction with body X and code CALL_INSN
4365 and output it after the instruction AFTER. */
4368 emit_call_insn_after_noloc (rtx x, rtx after)
4370 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4373 /* Make an instruction with body X and code CALL_INSN
4374 and output it after the instruction AFTER. */
4377 emit_debug_insn_after_noloc (rtx x, rtx after)
4379 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4382 /* Make an insn of code BARRIER
4383 and output it after the insn AFTER. */
4386 emit_barrier_after (rtx after)
4388 rtx insn = rtx_alloc (BARRIER);
4390 INSN_UID (insn) = cur_insn_uid++;
4392 add_insn_after (insn, after, NULL);
4396 /* Emit the label LABEL after the insn AFTER. */
4399 emit_label_after (rtx label, rtx after)
4401 /* This can be called twice for the same label
4402 as a result of the confusion that follows a syntax error!
4403 So make it harmless. */
4404 if (INSN_UID (label) == 0)
4406 INSN_UID (label) = cur_insn_uid++;
4407 add_insn_after (label, after, NULL);
4413 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4416 emit_note_after (enum insn_note subtype, rtx after)
4418 rtx note = rtx_alloc (NOTE);
4419 INSN_UID (note) = cur_insn_uid++;
4420 NOTE_KIND (note) = subtype;
4421 BLOCK_FOR_INSN (note) = NULL;
4422 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4423 add_insn_after (note, after, NULL);
4427 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4428 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4431 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
4432 rtx (*make_raw) (rtx))
4434 rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4436 if (pattern == NULL_RTX || !loc)
4439 after = NEXT_INSN (after);
4442 if (active_insn_p (after) && !INSN_LOCATOR (after))
4443 INSN_LOCATOR (after) = loc;
4446 after = NEXT_INSN (after);
4451 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4452 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4456 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
4457 rtx (*make_raw) (rtx))
4461 if (skip_debug_insns)
4462 while (DEBUG_INSN_P (prev))
4463 prev = PREV_INSN (prev);
4466 return emit_pattern_after_setloc (pattern, after, INSN_LOCATOR (prev),
4469 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4472 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4474 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4476 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4479 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4481 emit_insn_after (rtx pattern, rtx after)
4483 return emit_pattern_after (pattern, after, true, make_insn_raw);
4486 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4488 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4490 return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
4493 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4495 emit_jump_insn_after (rtx pattern, rtx after)
4497 return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
4500 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4502 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4504 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4507 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4509 emit_call_insn_after (rtx pattern, rtx after)
4511 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4514 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4516 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4518 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4521 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4523 emit_debug_insn_after (rtx pattern, rtx after)
4525 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4528 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4529 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4530 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4534 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
4535 rtx (*make_raw) (rtx))
4537 rtx first = PREV_INSN (before);
4538 rtx last = emit_pattern_before_noloc (pattern, before,
4539 insnp ? before : NULL_RTX,
4542 if (pattern == NULL_RTX || !loc)
4546 first = get_insns ();
4548 first = NEXT_INSN (first);
4551 if (active_insn_p (first) && !INSN_LOCATOR (first))
4552 INSN_LOCATOR (first) = loc;
4555 first = NEXT_INSN (first);
4560 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4561 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4562 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4563 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4566 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
4567 bool insnp, rtx (*make_raw) (rtx))
4571 if (skip_debug_insns)
4572 while (DEBUG_INSN_P (next))
4573 next = PREV_INSN (next);
4576 return emit_pattern_before_setloc (pattern, before, INSN_LOCATOR (next),
4579 return emit_pattern_before_noloc (pattern, before,
4580 insnp ? before : NULL_RTX,
4584 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4586 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4588 return emit_pattern_before_setloc (pattern, before, loc, true,
4592 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4594 emit_insn_before (rtx pattern, rtx before)
4596 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4599 /* like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4601 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4603 return emit_pattern_before_setloc (pattern, before, loc, false,
4604 make_jump_insn_raw);
4607 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4609 emit_jump_insn_before (rtx pattern, rtx before)
4611 return emit_pattern_before (pattern, before, true, false,
4612 make_jump_insn_raw);
4615 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4617 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4619 return emit_pattern_before_setloc (pattern, before, loc, false,
4620 make_call_insn_raw);
4623 /* Like emit_call_insn_before_noloc,
4624 but set insn_locator according to BEFORE. */
4626 emit_call_insn_before (rtx pattern, rtx before)
4628 return emit_pattern_before (pattern, before, true, false,
4629 make_call_insn_raw);
4632 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4634 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4636 return emit_pattern_before_setloc (pattern, before, loc, false,
4637 make_debug_insn_raw);
4640 /* Like emit_debug_insn_before_noloc,
4641 but set insn_locator according to BEFORE. */
4643 emit_debug_insn_before (rtx pattern, rtx before)
4645 return emit_pattern_before (pattern, before, false, false,
4646 make_debug_insn_raw);
4649 /* Take X and emit it at the end of the doubly-linked
4652 Returns the last insn emitted. */
4657 rtx last = get_last_insn();
4663 switch (GET_CODE (x))
4675 rtx next = NEXT_INSN (insn);
4682 #ifdef ENABLE_RTL_CHECKING
4689 last = make_insn_raw (x);
4697 /* Make an insn of code DEBUG_INSN with pattern X
4698 and add it to the end of the doubly-linked list. */
4701 emit_debug_insn (rtx x)
4703 rtx last = get_last_insn();
4709 switch (GET_CODE (x))
4721 rtx next = NEXT_INSN (insn);
4728 #ifdef ENABLE_RTL_CHECKING
4735 last = make_debug_insn_raw (x);
4743 /* Make an insn of code JUMP_INSN with pattern X
4744 and add it to the end of the doubly-linked list. */
4747 emit_jump_insn (rtx x)
4749 rtx last = NULL_RTX, insn;
4751 switch (GET_CODE (x))
4763 rtx next = NEXT_INSN (insn);
4770 #ifdef ENABLE_RTL_CHECKING
4777 last = make_jump_insn_raw (x);
4785 /* Make an insn of code CALL_INSN with pattern X
4786 and add it to the end of the doubly-linked list. */
4789 emit_call_insn (rtx x)
4793 switch (GET_CODE (x))
4802 insn = emit_insn (x);
4805 #ifdef ENABLE_RTL_CHECKING
4812 insn = make_call_insn_raw (x);
4820 /* Add the label LABEL to the end of the doubly-linked list. */
4823 emit_label (rtx label)
4825 /* This can be called twice for the same label
4826 as a result of the confusion that follows a syntax error!
4827 So make it harmless. */
4828 if (INSN_UID (label) == 0)
4830 INSN_UID (label) = cur_insn_uid++;
4836 /* Make an insn of code BARRIER
4837 and add it to the end of the doubly-linked list. */
4842 rtx barrier = rtx_alloc (BARRIER);
4843 INSN_UID (barrier) = cur_insn_uid++;
4848 /* Emit a copy of note ORIG. */
4851 emit_note_copy (rtx orig)
4855 note = rtx_alloc (NOTE);
4857 INSN_UID (note) = cur_insn_uid++;
4858 NOTE_DATA (note) = NOTE_DATA (orig);
4859 NOTE_KIND (note) = NOTE_KIND (orig);
4860 BLOCK_FOR_INSN (note) = NULL;
4866 /* Make an insn of code NOTE or type NOTE_NO
4867 and add it to the end of the doubly-linked list. */
4870 emit_note (enum insn_note kind)
4874 note = rtx_alloc (NOTE);
4875 INSN_UID (note) = cur_insn_uid++;
4876 NOTE_KIND (note) = kind;
4877 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4878 BLOCK_FOR_INSN (note) = NULL;
4883 /* Emit a clobber of lvalue X. */
4886 emit_clobber (rtx x)
4888 /* CONCATs should not appear in the insn stream. */
4889 if (GET_CODE (x) == CONCAT)
4891 emit_clobber (XEXP (x, 0));
4892 return emit_clobber (XEXP (x, 1));
4894 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4897 /* Return a sequence of insns to clobber lvalue X. */
4911 /* Emit a use of rvalue X. */
4916 /* CONCATs should not appear in the insn stream. */
4917 if (GET_CODE (x) == CONCAT)
4919 emit_use (XEXP (x, 0));
4920 return emit_use (XEXP (x, 1));
4922 return emit_insn (gen_rtx_USE (VOIDmode, x));
4925 /* Return a sequence of insns to use rvalue X. */
4939 /* Cause next statement to emit a line note even if the line number
4943 force_next_line_note (void)
4948 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4949 note of this type already exists, remove it first. */
4952 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4954 rtx note = find_reg_note (insn, kind, NULL_RTX);
4960 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4961 has multiple sets (some callers assume single_set
4962 means the insn only has one set, when in fact it
4963 means the insn only has one * useful * set). */
4964 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4970 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4971 It serves no useful purpose and breaks eliminate_regs. */
4972 if (GET_CODE (datum) == ASM_OPERANDS)
4977 XEXP (note, 0) = datum;
4978 df_notes_rescan (insn);
4986 XEXP (note, 0) = datum;
4992 add_reg_note (insn, kind, datum);
4998 df_notes_rescan (insn);
5004 return REG_NOTES (insn);
5007 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5009 set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
5011 rtx set = single_set (insn);
5013 if (set && SET_DEST (set) == dst)
5014 return set_unique_reg_note (insn, kind, datum);
5018 /* Return an indication of which type of insn should have X as a body.
5019 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5021 static enum rtx_code
5022 classify_insn (rtx x)
5026 if (GET_CODE (x) == CALL)
5028 if (ANY_RETURN_P (x))
5030 if (GET_CODE (x) == SET)
5032 if (SET_DEST (x) == pc_rtx)
5034 else if (GET_CODE (SET_SRC (x)) == CALL)
5039 if (GET_CODE (x) == PARALLEL)
5042 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5043 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5045 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5046 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5048 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5049 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5055 /* Emit the rtl pattern X as an appropriate kind of insn.
5056 If X is a label, it is simply added into the insn chain. */
5061 enum rtx_code code = classify_insn (x);
5066 return emit_label (x);
5068 return emit_insn (x);
5071 rtx insn = emit_jump_insn (x);
5072 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5073 return emit_barrier ();
5077 return emit_call_insn (x);
5079 return emit_debug_insn (x);
5085 /* Space for free sequence stack entries. */
5086 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5088 /* Begin emitting insns to a sequence. If this sequence will contain
5089 something that might cause the compiler to pop arguments to function
5090 calls (because those pops have previously been deferred; see
5091 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5092 before calling this function. That will ensure that the deferred
5093 pops are not accidentally emitted in the middle of this sequence. */
5096 start_sequence (void)
5098 struct sequence_stack *tem;
5100 if (free_sequence_stack != NULL)
5102 tem = free_sequence_stack;
5103 free_sequence_stack = tem->next;
5106 tem = ggc_alloc_sequence_stack ();
5108 tem->next = seq_stack;
5109 tem->first = get_insns ();
5110 tem->last = get_last_insn ();
5118 /* Set up the insn chain starting with FIRST as the current sequence,
5119 saving the previously current one. See the documentation for
5120 start_sequence for more information about how to use this function. */
5123 push_to_sequence (rtx first)
5129 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5132 set_first_insn (first);
5133 set_last_insn (last);
5136 /* Like push_to_sequence, but take the last insn as an argument to avoid
5137 looping through the list. */
5140 push_to_sequence2 (rtx first, rtx last)
5144 set_first_insn (first);
5145 set_last_insn (last);
5148 /* Set up the outer-level insn chain
5149 as the current sequence, saving the previously current one. */
5152 push_topmost_sequence (void)
5154 struct sequence_stack *stack, *top = NULL;
5158 for (stack = seq_stack; stack; stack = stack->next)
5161 set_first_insn (top->first);
5162 set_last_insn (top->last);
5165 /* After emitting to the outer-level insn chain, update the outer-level
5166 insn chain, and restore the previous saved state. */
5169 pop_topmost_sequence (void)
5171 struct sequence_stack *stack, *top = NULL;
5173 for (stack = seq_stack; stack; stack = stack->next)
5176 top->first = get_insns ();
5177 top->last = get_last_insn ();
5182 /* After emitting to a sequence, restore previous saved state.
5184 To get the contents of the sequence just made, you must call
5185 `get_insns' *before* calling here.
5187 If the compiler might have deferred popping arguments while
5188 generating this sequence, and this sequence will not be immediately
5189 inserted into the instruction stream, use do_pending_stack_adjust
5190 before calling get_insns. That will ensure that the deferred
5191 pops are inserted into this sequence, and not into some random
5192 location in the instruction stream. See INHIBIT_DEFER_POP for more
5193 information about deferred popping of arguments. */
5198 struct sequence_stack *tem = seq_stack;
5200 set_first_insn (tem->first);
5201 set_last_insn (tem->last);
5202 seq_stack = tem->next;
5204 memset (tem, 0, sizeof (*tem));
5205 tem->next = free_sequence_stack;
5206 free_sequence_stack = tem;
5209 /* Return 1 if currently emitting into a sequence. */
5212 in_sequence_p (void)
5214 return seq_stack != 0;
5217 /* Put the various virtual registers into REGNO_REG_RTX. */
5220 init_virtual_regs (void)
5222 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5223 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5224 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5225 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5226 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5227 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5228 = virtual_preferred_stack_boundary_rtx;
5232 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5233 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5234 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5235 static int copy_insn_n_scratches;
5237 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5238 copied an ASM_OPERANDS.
5239 In that case, it is the original input-operand vector. */
5240 static rtvec orig_asm_operands_vector;
5242 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5243 copied an ASM_OPERANDS.
5244 In that case, it is the copied input-operand vector. */
5245 static rtvec copy_asm_operands_vector;
5247 /* Likewise for the constraints vector. */
5248 static rtvec orig_asm_constraints_vector;
5249 static rtvec copy_asm_constraints_vector;
5251 /* Recursively create a new copy of an rtx for copy_insn.
5252 This function differs from copy_rtx in that it handles SCRATCHes and
5253 ASM_OPERANDs properly.
5254 Normally, this function is not used directly; use copy_insn as front end.
5255 However, you could first copy an insn pattern with copy_insn and then use
5256 this function afterwards to properly copy any REG_NOTEs containing
5260 copy_insn_1 (rtx orig)
5265 const char *format_ptr;
5270 code = GET_CODE (orig);
5288 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5293 for (i = 0; i < copy_insn_n_scratches; i++)
5294 if (copy_insn_scratch_in[i] == orig)
5295 return copy_insn_scratch_out[i];
5299 if (shared_const_p (orig))
5303 /* A MEM with a constant address is not sharable. The problem is that
5304 the constant address may need to be reloaded. If the mem is shared,
5305 then reloading one copy of this mem will cause all copies to appear
5306 to have been reloaded. */
5312 /* Copy the various flags, fields, and other information. We assume
5313 that all fields need copying, and then clear the fields that should
5314 not be copied. That is the sensible default behavior, and forces
5315 us to explicitly document why we are *not* copying a flag. */
5316 copy = shallow_copy_rtx (orig);
5318 /* We do not copy the USED flag, which is used as a mark bit during
5319 walks over the RTL. */
5320 RTX_FLAG (copy, used) = 0;
5322 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5325 RTX_FLAG (copy, jump) = 0;
5326 RTX_FLAG (copy, call) = 0;
5327 RTX_FLAG (copy, frame_related) = 0;
5330 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5332 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5333 switch (*format_ptr++)
5336 if (XEXP (orig, i) != NULL)
5337 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5342 if (XVEC (orig, i) == orig_asm_constraints_vector)
5343 XVEC (copy, i) = copy_asm_constraints_vector;
5344 else if (XVEC (orig, i) == orig_asm_operands_vector)
5345 XVEC (copy, i) = copy_asm_operands_vector;
5346 else if (XVEC (orig, i) != NULL)
5348 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5349 for (j = 0; j < XVECLEN (copy, i); j++)
5350 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5361 /* These are left unchanged. */
5368 if (code == SCRATCH)
5370 i = copy_insn_n_scratches++;
5371 gcc_assert (i < MAX_RECOG_OPERANDS);
5372 copy_insn_scratch_in[i] = orig;
5373 copy_insn_scratch_out[i] = copy;
5375 else if (code == ASM_OPERANDS)
5377 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5378 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5379 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5380 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5386 /* Create a new copy of an rtx.
5387 This function differs from copy_rtx in that it handles SCRATCHes and
5388 ASM_OPERANDs properly.
5389 INSN doesn't really have to be a full INSN; it could be just the
5392 copy_insn (rtx insn)
5394 copy_insn_n_scratches = 0;
5395 orig_asm_operands_vector = 0;
5396 orig_asm_constraints_vector = 0;
5397 copy_asm_operands_vector = 0;
5398 copy_asm_constraints_vector = 0;
5399 return copy_insn_1 (insn);
5402 /* Initialize data structures and variables in this file
5403 before generating rtl for each function. */
5408 set_first_insn (NULL);
5409 set_last_insn (NULL);
5410 if (MIN_NONDEBUG_INSN_UID)
5411 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5414 cur_debug_insn_uid = 1;
5415 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5416 last_location = UNKNOWN_LOCATION;
5417 first_label_num = label_num;
5420 /* Init the tables that describe all the pseudo regs. */
5422 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5424 crtl->emit.regno_pointer_align
5425 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5427 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5429 /* Put copies of all the hard registers into regno_reg_rtx. */
5430 memcpy (regno_reg_rtx,
5431 initial_regno_reg_rtx,
5432 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5434 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5435 init_virtual_regs ();
5437 /* Indicate that the virtual registers and stack locations are
5439 REG_POINTER (stack_pointer_rtx) = 1;
5440 REG_POINTER (frame_pointer_rtx) = 1;
5441 REG_POINTER (hard_frame_pointer_rtx) = 1;
5442 REG_POINTER (arg_pointer_rtx) = 1;
5444 REG_POINTER (virtual_incoming_args_rtx) = 1;
5445 REG_POINTER (virtual_stack_vars_rtx) = 1;
5446 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5447 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5448 REG_POINTER (virtual_cfa_rtx) = 1;
5450 #ifdef STACK_BOUNDARY
5451 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5452 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5453 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5454 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5456 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5457 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5458 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5459 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5460 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5463 #ifdef INIT_EXPANDERS
5468 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5471 gen_const_vector (enum machine_mode mode, int constant)
5476 enum machine_mode inner;
5478 units = GET_MODE_NUNITS (mode);
5479 inner = GET_MODE_INNER (mode);
5481 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5483 v = rtvec_alloc (units);
5485 /* We need to call this function after we set the scalar const_tiny_rtx
5487 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5489 for (i = 0; i < units; ++i)
5490 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5492 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5496 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5497 all elements are zero, and the one vector when all elements are one. */
5499 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5501 enum machine_mode inner = GET_MODE_INNER (mode);
5502 int nunits = GET_MODE_NUNITS (mode);
5506 /* Check to see if all of the elements have the same value. */
5507 x = RTVEC_ELT (v, nunits - 1);
5508 for (i = nunits - 2; i >= 0; i--)
5509 if (RTVEC_ELT (v, i) != x)
5512 /* If the values are all the same, check to see if we can use one of the
5513 standard constant vectors. */
5516 if (x == CONST0_RTX (inner))
5517 return CONST0_RTX (mode);
5518 else if (x == CONST1_RTX (inner))
5519 return CONST1_RTX (mode);
5520 else if (x == CONSTM1_RTX (inner))
5521 return CONSTM1_RTX (mode);
5524 return gen_rtx_raw_CONST_VECTOR (mode, v);
5527 /* Initialise global register information required by all functions. */
5530 init_emit_regs (void)
5533 enum machine_mode mode;
5536 /* Reset register attributes */
5537 htab_empty (reg_attrs_htab);
5539 /* We need reg_raw_mode, so initialize the modes now. */
5540 init_reg_modes_target ();
5542 /* Assign register numbers to the globally defined register rtx. */
5543 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5544 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5545 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5546 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5547 virtual_incoming_args_rtx =
5548 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5549 virtual_stack_vars_rtx =
5550 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5551 virtual_stack_dynamic_rtx =
5552 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5553 virtual_outgoing_args_rtx =
5554 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5555 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5556 virtual_preferred_stack_boundary_rtx =
5557 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5559 /* Initialize RTL for commonly used hard registers. These are
5560 copied into regno_reg_rtx as we begin to compile each function. */
5561 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5562 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5564 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5565 return_address_pointer_rtx
5566 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5569 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5570 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5572 pic_offset_table_rtx = NULL_RTX;
5574 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5576 mode = (enum machine_mode) i;
5577 attrs = ggc_alloc_cleared_mem_attrs ();
5578 attrs->align = BITS_PER_UNIT;
5579 attrs->addrspace = ADDR_SPACE_GENERIC;
5580 if (mode != BLKmode)
5582 attrs->size_known_p = true;
5583 attrs->size = GET_MODE_SIZE (mode);
5584 if (STRICT_ALIGNMENT)
5585 attrs->align = GET_MODE_ALIGNMENT (mode);
5587 mode_mem_attrs[i] = attrs;
5591 /* Create some permanent unique rtl objects shared between all functions. */
5594 init_emit_once (void)
5597 enum machine_mode mode;
5598 enum machine_mode double_mode;
5600 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5602 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5603 const_int_htab_eq, NULL);
5605 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5606 const_double_htab_eq, NULL);
5608 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5609 const_fixed_htab_eq, NULL);
5611 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5612 mem_attrs_htab_eq, NULL);
5613 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5614 reg_attrs_htab_eq, NULL);
5616 /* Compute the word and byte modes. */
5618 byte_mode = VOIDmode;
5619 word_mode = VOIDmode;
5620 double_mode = VOIDmode;
5622 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5624 mode = GET_MODE_WIDER_MODE (mode))
5626 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5627 && byte_mode == VOIDmode)
5630 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5631 && word_mode == VOIDmode)
5635 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5637 mode = GET_MODE_WIDER_MODE (mode))
5639 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5640 && double_mode == VOIDmode)
5644 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5646 #ifdef INIT_EXPANDERS
5647 /* This is to initialize {init|mark|free}_machine_status before the first
5648 call to push_function_context_to. This is needed by the Chill front
5649 end which calls push_function_context_to before the first call to
5650 init_function_start. */
5654 /* Create the unique rtx's for certain rtx codes and operand values. */
5656 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5657 tries to use these variables. */
5658 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5659 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5660 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5662 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5663 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5664 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5666 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5668 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5669 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5670 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5675 dconsthalf = dconst1;
5676 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5678 for (i = 0; i < 3; i++)
5680 const REAL_VALUE_TYPE *const r =
5681 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5683 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5685 mode = GET_MODE_WIDER_MODE (mode))
5686 const_tiny_rtx[i][(int) mode] =
5687 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5689 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5691 mode = GET_MODE_WIDER_MODE (mode))
5692 const_tiny_rtx[i][(int) mode] =
5693 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5695 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5697 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5699 mode = GET_MODE_WIDER_MODE (mode))
5700 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5702 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5704 mode = GET_MODE_WIDER_MODE (mode))
5705 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5708 const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
5710 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5712 mode = GET_MODE_WIDER_MODE (mode))
5713 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5715 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5717 mode = GET_MODE_WIDER_MODE (mode))
5718 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5720 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5722 mode = GET_MODE_WIDER_MODE (mode))
5724 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5725 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5728 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5730 mode = GET_MODE_WIDER_MODE (mode))
5732 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5733 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5736 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5738 mode = GET_MODE_WIDER_MODE (mode))
5740 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5741 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5742 const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
5745 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5747 mode = GET_MODE_WIDER_MODE (mode))
5749 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5750 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5753 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5755 mode = GET_MODE_WIDER_MODE (mode))
5757 FCONST0(mode).data.high = 0;
5758 FCONST0(mode).data.low = 0;
5759 FCONST0(mode).mode = mode;
5760 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5761 FCONST0 (mode), mode);
5764 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5766 mode = GET_MODE_WIDER_MODE (mode))
5768 FCONST0(mode).data.high = 0;
5769 FCONST0(mode).data.low = 0;
5770 FCONST0(mode).mode = mode;
5771 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5772 FCONST0 (mode), mode);
5775 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5777 mode = GET_MODE_WIDER_MODE (mode))
5779 FCONST0(mode).data.high = 0;
5780 FCONST0(mode).data.low = 0;
5781 FCONST0(mode).mode = mode;
5782 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5783 FCONST0 (mode), mode);
5785 /* We store the value 1. */
5786 FCONST1(mode).data.high = 0;
5787 FCONST1(mode).data.low = 0;
5788 FCONST1(mode).mode = mode;
5789 lshift_double (1, 0, GET_MODE_FBIT (mode),
5790 2 * HOST_BITS_PER_WIDE_INT,
5791 &FCONST1(mode).data.low,
5792 &FCONST1(mode).data.high,
5793 SIGNED_FIXED_POINT_MODE_P (mode));
5794 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5795 FCONST1 (mode), mode);
5798 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5800 mode = GET_MODE_WIDER_MODE (mode))
5802 FCONST0(mode).data.high = 0;
5803 FCONST0(mode).data.low = 0;
5804 FCONST0(mode).mode = mode;
5805 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5806 FCONST0 (mode), mode);
5808 /* We store the value 1. */
5809 FCONST1(mode).data.high = 0;
5810 FCONST1(mode).data.low = 0;
5811 FCONST1(mode).mode = mode;
5812 lshift_double (1, 0, GET_MODE_FBIT (mode),
5813 2 * HOST_BITS_PER_WIDE_INT,
5814 &FCONST1(mode).data.low,
5815 &FCONST1(mode).data.high,
5816 SIGNED_FIXED_POINT_MODE_P (mode));
5817 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5818 FCONST1 (mode), mode);
5821 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5823 mode = GET_MODE_WIDER_MODE (mode))
5825 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5828 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5830 mode = GET_MODE_WIDER_MODE (mode))
5832 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5835 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5837 mode = GET_MODE_WIDER_MODE (mode))
5839 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5840 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5843 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5845 mode = GET_MODE_WIDER_MODE (mode))
5847 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5848 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5851 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5852 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5853 const_tiny_rtx[0][i] = const0_rtx;
5855 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5856 if (STORE_FLAG_VALUE == 1)
5857 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5859 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
5860 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
5861 simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
5862 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
5865 /* Produce exact duplicate of insn INSN after AFTER.
5866 Care updating of libcall regions if present. */
5869 emit_copy_of_insn_after (rtx insn, rtx after)
5873 switch (GET_CODE (insn))
5876 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5880 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5884 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5888 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5889 if (CALL_INSN_FUNCTION_USAGE (insn))
5890 CALL_INSN_FUNCTION_USAGE (new_rtx)
5891 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5892 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5893 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5894 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5895 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5896 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5903 /* Update LABEL_NUSES. */
5904 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5906 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5908 /* If the old insn is frame related, then so is the new one. This is
5909 primarily needed for IA-64 unwind info which marks epilogue insns,
5910 which may be duplicated by the basic block reordering code. */
5911 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5913 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5914 will make them. REG_LABEL_TARGETs are created there too, but are
5915 supposed to be sticky, so we copy them. */
5916 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5917 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5919 if (GET_CODE (link) == EXPR_LIST)
5920 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5921 copy_insn_1 (XEXP (link, 0)));
5923 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5926 INSN_CODE (new_rtx) = INSN_CODE (insn);
5930 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5932 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5934 if (hard_reg_clobbers[mode][regno])
5935 return hard_reg_clobbers[mode][regno];
5937 return (hard_reg_clobbers[mode][regno] =
5938 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5941 #include "gt-emit-rtl.h"