1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
63 /* Commonly used modes. */
65 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
66 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
67 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
68 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
70 /* Datastructures maintained for currently processed function in RTL form. */
72 struct rtl_data x_rtl;
74 /* Indexed by pseudo register number, gives the rtx for that pseudo.
75 Allocated in parallel with regno_pointer_align.
76 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
77 with length attribute nested in top level structures. */
81 /* This is *not* reset after each function. It gives each CODE_LABEL
82 in the entire compilation a unique label number. */
84 static GTY(()) int label_num = 1;
86 /* Nonzero means do not generate NOTEs for source line numbers. */
88 static int no_line_numbers;
90 /* Commonly used rtx's, so that we only need space for one copy.
91 These are initialized once for the entire compilation.
92 All of these are unique; no other rtx-object will be equal to any
95 rtx global_rtl[GR_MAX];
97 /* Commonly used RTL for hard registers. These objects are not necessarily
98 unique, so we allocate them separately from global_rtl. They are
99 initialized once per compilation unit, then copied into regno_reg_rtx
100 at the beginning of each function. */
101 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
103 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
104 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
105 record a copy of const[012]_rtx. */
107 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
111 REAL_VALUE_TYPE dconst0;
112 REAL_VALUE_TYPE dconst1;
113 REAL_VALUE_TYPE dconst2;
114 REAL_VALUE_TYPE dconstm1;
115 REAL_VALUE_TYPE dconsthalf;
117 /* Record fixed-point constant 0 and 1. */
118 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
119 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
121 /* All references to the following fixed hard registers go through
122 these unique rtl objects. On machines where the frame-pointer and
123 arg-pointer are the same register, they use the same unique object.
125 After register allocation, other rtl objects which used to be pseudo-regs
126 may be clobbered to refer to the frame-pointer register.
127 But references that were originally to the frame-pointer can be
128 distinguished from the others because they contain frame_pointer_rtx.
130 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
131 tricky: until register elimination has taken place hard_frame_pointer_rtx
132 should be used if it is being set, and frame_pointer_rtx otherwise. After
133 register elimination hard_frame_pointer_rtx should always be used.
134 On machines where the two registers are same (most) then these are the
137 In an inline procedure, the stack and frame pointer rtxs may not be
138 used for anything else. */
139 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
141 /* This is used to implement __builtin_return_address for some machines.
142 See for instance the MIPS port. */
143 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
145 /* We make one copy of (const_int C) where C is in
146 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
147 to save space during the compilation and simplify comparisons of
150 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
152 /* A hash table storing CONST_INTs whose absolute value is greater
153 than MAX_SAVED_CONST_INT. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
156 htab_t const_int_htab;
158 /* A hash table storing memory attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
160 htab_t mem_attrs_htab;
162 /* A hash table storing register attribute structures. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
164 htab_t reg_attrs_htab;
166 /* A hash table storing all CONST_DOUBLEs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
168 htab_t const_double_htab;
170 /* A hash table storing all CONST_FIXEDs. */
171 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
172 htab_t const_fixed_htab;
174 #define first_insn (crtl->emit.x_first_insn)
175 #define last_insn (crtl->emit.x_last_insn)
176 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
177 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx make_call_insn_raw (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void set_used_decls (tree);
184 static void mark_label_nuses (rtx);
185 static hashval_t const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx lookup_const_double (rtx);
190 static hashval_t const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx lookup_const_fixed (rtx);
193 static hashval_t mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
196 addr_space_t, enum machine_mode);
197 static hashval_t reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs *get_reg_attrs (tree, int);
200 static rtx gen_const_vector (enum machine_mode, int);
201 static void copy_rtx_if_shared_1 (rtx *orig);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((const_rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
229 const_rtx const value = (const_rtx) x;
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is really a CONST_FIXED). */
263 const_fixed_htab_hash (const void *x)
265 const_rtx const value = (const_rtx) x;
268 h = fixed_hash (CONST_FIXED_VALUE (value));
269 /* MODE is used in the comparison, so it should be in the hash. */
270 h ^= GET_MODE (value);
274 /* Returns nonzero if the value represented by X (really a ...)
275 is the same as that represented by Y (really a ...). */
278 const_fixed_htab_eq (const void *x, const void *y)
280 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
282 if (GET_MODE (a) != GET_MODE (b))
284 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
287 /* Returns a hash code for X (which is a really a mem_attrs *). */
290 mem_attrs_htab_hash (const void *x)
292 const mem_attrs *const p = (const mem_attrs *) x;
294 return (p->alias ^ (p->align * 1000)
295 ^ (p->addrspace * 4000)
296 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
297 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
298 ^ (size_t) iterative_hash_expr (p->expr, 0));
301 /* Returns nonzero if the value represented by X (which is really a
302 mem_attrs *) is the same as that given by Y (which is also really a
306 mem_attrs_htab_eq (const void *x, const void *y)
308 const mem_attrs *const p = (const mem_attrs *) x;
309 const mem_attrs *const q = (const mem_attrs *) y;
311 return (p->alias == q->alias && p->offset == q->offset
312 && p->size == q->size && p->align == q->align
313 && p->addrspace == q->addrspace
314 && (p->expr == q->expr
315 || (p->expr != NULL_TREE && q->expr != NULL_TREE
316 && operand_equal_p (p->expr, q->expr, 0))));
319 /* Allocate a new mem_attrs structure and insert it into the hash table if
320 one identical to it is not already in the table. We are doing this for
324 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
325 unsigned int align, addr_space_t addrspace, enum machine_mode mode)
330 /* If everything is the default, we can just return zero.
331 This must match what the corresponding MEM_* macros return when the
332 field is not present. */
333 if (alias == 0 && expr == 0 && offset == 0 && addrspace == 0
335 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
336 && (STRICT_ALIGNMENT && mode != BLKmode
337 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
342 attrs.offset = offset;
345 attrs.addrspace = addrspace;
347 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
350 *slot = ggc_alloc (sizeof (mem_attrs));
351 memcpy (*slot, &attrs, sizeof (mem_attrs));
354 return (mem_attrs *) *slot;
357 /* Returns a hash code for X (which is a really a reg_attrs *). */
360 reg_attrs_htab_hash (const void *x)
362 const reg_attrs *const p = (const reg_attrs *) x;
364 return ((p->offset * 1000) ^ (long) p->decl);
367 /* Returns nonzero if the value represented by X (which is really a
368 reg_attrs *) is the same as that given by Y (which is also really a
372 reg_attrs_htab_eq (const void *x, const void *y)
374 const reg_attrs *const p = (const reg_attrs *) x;
375 const reg_attrs *const q = (const reg_attrs *) y;
377 return (p->decl == q->decl && p->offset == q->offset);
379 /* Allocate a new reg_attrs structure and insert it into the hash table if
380 one identical to it is not already in the table. We are doing this for
384 get_reg_attrs (tree decl, int offset)
389 /* If everything is the default, we can just return zero. */
390 if (decl == 0 && offset == 0)
394 attrs.offset = offset;
396 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
399 *slot = ggc_alloc (sizeof (reg_attrs));
400 memcpy (*slot, &attrs, sizeof (reg_attrs));
403 return (reg_attrs *) *slot;
408 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
414 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
415 MEM_VOLATILE_P (x) = true;
421 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
422 don't attempt to share with the various global pieces of rtl (such as
423 frame_pointer_rtx). */
426 gen_raw_REG (enum machine_mode mode, int regno)
428 rtx x = gen_rtx_raw_REG (mode, regno);
429 ORIGINAL_REGNO (x) = regno;
433 /* There are some RTL codes that require special attention; the generation
434 functions do the raw handling. If you add to this list, modify
435 special_rtx in gengenrtl.c as well. */
438 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
442 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
443 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
445 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
446 if (const_true_rtx && arg == STORE_FLAG_VALUE)
447 return const_true_rtx;
450 /* Look up the CONST_INT in the hash table. */
451 slot = htab_find_slot_with_hash (const_int_htab, &arg,
452 (hashval_t) arg, INSERT);
454 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
460 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
462 return GEN_INT (trunc_int_for_mode (c, mode));
465 /* CONST_DOUBLEs might be created from pairs of integers, or from
466 REAL_VALUE_TYPEs. Also, their length is known only at run time,
467 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
469 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
470 hash table. If so, return its counterpart; otherwise add it
471 to the hash table and return it. */
473 lookup_const_double (rtx real)
475 void **slot = htab_find_slot (const_double_htab, real, INSERT);
482 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
483 VALUE in mode MODE. */
485 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
487 rtx real = rtx_alloc (CONST_DOUBLE);
488 PUT_MODE (real, mode);
492 return lookup_const_double (real);
495 /* Determine whether FIXED, a CONST_FIXED, already exists in the
496 hash table. If so, return its counterpart; otherwise add it
497 to the hash table and return it. */
500 lookup_const_fixed (rtx fixed)
502 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
509 /* Return a CONST_FIXED rtx for a fixed-point value specified by
510 VALUE in mode MODE. */
513 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
515 rtx fixed = rtx_alloc (CONST_FIXED);
516 PUT_MODE (fixed, mode);
520 return lookup_const_fixed (fixed);
523 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
524 of ints: I0 is the low-order word and I1 is the high-order word.
525 Do not use this routine for non-integer modes; convert to
526 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
529 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
534 /* There are the following cases (note that there are no modes with
535 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
537 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
539 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
540 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
541 from copies of the sign bit, and sign of i0 and i1 are the same), then
542 we return a CONST_INT for i0.
543 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
544 if (mode != VOIDmode)
546 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
547 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
548 /* We can get a 0 for an error mark. */
549 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
550 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
552 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
553 return gen_int_mode (i0, mode);
555 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
558 /* If this integer fits in one word, return a CONST_INT. */
559 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
562 /* We use VOIDmode for integers. */
563 value = rtx_alloc (CONST_DOUBLE);
564 PUT_MODE (value, VOIDmode);
566 CONST_DOUBLE_LOW (value) = i0;
567 CONST_DOUBLE_HIGH (value) = i1;
569 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
570 XWINT (value, i) = 0;
572 return lookup_const_double (value);
576 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
578 /* In case the MD file explicitly references the frame pointer, have
579 all such references point to the same frame pointer. This is
580 used during frame pointer elimination to distinguish the explicit
581 references to these registers from pseudos that happened to be
584 If we have eliminated the frame pointer or arg pointer, we will
585 be using it as a normal register, for example as a spill
586 register. In such cases, we might be accessing it in a mode that
587 is not Pmode and therefore cannot use the pre-allocated rtx.
589 Also don't do this when we are making new REGs in reload, since
590 we don't want to get confused with the real pointers. */
592 if (mode == Pmode && !reload_in_progress)
594 if (regno == FRAME_POINTER_REGNUM
595 && (!reload_completed || frame_pointer_needed))
596 return frame_pointer_rtx;
597 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
598 if (regno == HARD_FRAME_POINTER_REGNUM
599 && (!reload_completed || frame_pointer_needed))
600 return hard_frame_pointer_rtx;
602 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
603 if (regno == ARG_POINTER_REGNUM)
604 return arg_pointer_rtx;
606 #ifdef RETURN_ADDRESS_POINTER_REGNUM
607 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
608 return return_address_pointer_rtx;
610 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
611 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
612 return pic_offset_table_rtx;
613 if (regno == STACK_POINTER_REGNUM)
614 return stack_pointer_rtx;
618 /* If the per-function register table has been set up, try to re-use
619 an existing entry in that table to avoid useless generation of RTL.
621 This code is disabled for now until we can fix the various backends
622 which depend on having non-shared hard registers in some cases. Long
623 term we want to re-enable this code as it can significantly cut down
624 on the amount of useless RTL that gets generated.
626 We'll also need to fix some code that runs after reload that wants to
627 set ORIGINAL_REGNO. */
632 && regno < FIRST_PSEUDO_REGISTER
633 && reg_raw_mode[regno] == mode)
634 return regno_reg_rtx[regno];
637 return gen_raw_REG (mode, regno);
641 gen_rtx_MEM (enum machine_mode mode, rtx addr)
643 rtx rt = gen_rtx_raw_MEM (mode, addr);
645 /* This field is not cleared by the mere allocation of the rtx, so
652 /* Generate a memory referring to non-trapping constant memory. */
655 gen_const_mem (enum machine_mode mode, rtx addr)
657 rtx mem = gen_rtx_MEM (mode, addr);
658 MEM_READONLY_P (mem) = 1;
659 MEM_NOTRAP_P (mem) = 1;
663 /* Generate a MEM referring to fixed portions of the frame, e.g., register
667 gen_frame_mem (enum machine_mode mode, rtx addr)
669 rtx mem = gen_rtx_MEM (mode, addr);
670 MEM_NOTRAP_P (mem) = 1;
671 set_mem_alias_set (mem, get_frame_alias_set ());
675 /* Generate a MEM referring to a temporary use of the stack, not part
676 of the fixed stack frame. For example, something which is pushed
677 by a target splitter. */
679 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
681 rtx mem = gen_rtx_MEM (mode, addr);
682 MEM_NOTRAP_P (mem) = 1;
683 if (!cfun->calls_alloca)
684 set_mem_alias_set (mem, get_frame_alias_set ());
688 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
689 this construct would be valid, and false otherwise. */
692 validate_subreg (enum machine_mode omode, enum machine_mode imode,
693 const_rtx reg, unsigned int offset)
695 unsigned int isize = GET_MODE_SIZE (imode);
696 unsigned int osize = GET_MODE_SIZE (omode);
698 /* All subregs must be aligned. */
699 if (offset % osize != 0)
702 /* The subreg offset cannot be outside the inner object. */
706 /* ??? This should not be here. Temporarily continue to allow word_mode
707 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
708 Generally, backends are doing something sketchy but it'll take time to
710 if (omode == word_mode)
712 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
713 is the culprit here, and not the backends. */
714 else if (osize >= UNITS_PER_WORD && isize >= osize)
716 /* Allow component subregs of complex and vector. Though given the below
717 extraction rules, it's not always clear what that means. */
718 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
719 && GET_MODE_INNER (imode) == omode)
721 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
722 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
723 represent this. It's questionable if this ought to be represented at
724 all -- why can't this all be hidden in post-reload splitters that make
725 arbitrarily mode changes to the registers themselves. */
726 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
728 /* Subregs involving floating point modes are not allowed to
729 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
730 (subreg:SI (reg:DF) 0) isn't. */
731 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
737 /* Paradoxical subregs must have offset zero. */
741 /* This is a normal subreg. Verify that the offset is representable. */
743 /* For hard registers, we already have most of these rules collected in
744 subreg_offset_representable_p. */
745 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
747 unsigned int regno = REGNO (reg);
749 #ifdef CANNOT_CHANGE_MODE_CLASS
750 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
751 && GET_MODE_INNER (imode) == omode)
753 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
757 return subreg_offset_representable_p (regno, imode, offset, omode);
760 /* For pseudo registers, we want most of the same checks. Namely:
761 If the register no larger than a word, the subreg must be lowpart.
762 If the register is larger than a word, the subreg must be the lowpart
763 of a subword. A subreg does *not* perform arbitrary bit extraction.
764 Given that we've already checked mode/offset alignment, we only have
765 to check subword subregs here. */
766 if (osize < UNITS_PER_WORD)
768 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
769 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
770 if (offset % UNITS_PER_WORD != low_off)
777 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
779 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
780 return gen_rtx_raw_SUBREG (mode, reg, offset);
783 /* Generate a SUBREG representing the least-significant part of REG if MODE
784 is smaller than mode of REG, otherwise paradoxical SUBREG. */
787 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
789 enum machine_mode inmode;
791 inmode = GET_MODE (reg);
792 if (inmode == VOIDmode)
794 return gen_rtx_SUBREG (mode, reg,
795 subreg_lowpart_offset (mode, inmode));
799 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
802 gen_rtvec (int n, ...)
810 /* Don't allocate an empty rtvec... */
814 rt_val = rtvec_alloc (n);
816 for (i = 0; i < n; i++)
817 rt_val->elem[i] = va_arg (p, rtx);
824 gen_rtvec_v (int n, rtx *argp)
829 /* Don't allocate an empty rtvec... */
833 rt_val = rtvec_alloc (n);
835 for (i = 0; i < n; i++)
836 rt_val->elem[i] = *argp++;
841 /* Return the number of bytes between the start of an OUTER_MODE
842 in-memory value and the start of an INNER_MODE in-memory value,
843 given that the former is a lowpart of the latter. It may be a
844 paradoxical lowpart, in which case the offset will be negative
845 on big-endian targets. */
848 byte_lowpart_offset (enum machine_mode outer_mode,
849 enum machine_mode inner_mode)
851 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
852 return subreg_lowpart_offset (outer_mode, inner_mode);
854 return -subreg_lowpart_offset (inner_mode, outer_mode);
857 /* Generate a REG rtx for a new pseudo register of mode MODE.
858 This pseudo is assigned the next sequential register number. */
861 gen_reg_rtx (enum machine_mode mode)
864 unsigned int align = GET_MODE_ALIGNMENT (mode);
866 gcc_assert (can_create_pseudo_p ());
868 /* If a virtual register with bigger mode alignment is generated,
869 increase stack alignment estimation because it might be spilled
871 if (SUPPORTS_STACK_ALIGNMENT
872 && crtl->stack_alignment_estimated < align
873 && !crtl->stack_realign_processed)
875 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
876 if (crtl->stack_alignment_estimated < min_align)
877 crtl->stack_alignment_estimated = min_align;
880 if (generating_concat_p
881 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
882 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
884 /* For complex modes, don't make a single pseudo.
885 Instead, make a CONCAT of two pseudos.
886 This allows noncontiguous allocation of the real and imaginary parts,
887 which makes much better code. Besides, allocating DCmode
888 pseudos overstrains reload on some machines like the 386. */
889 rtx realpart, imagpart;
890 enum machine_mode partmode = GET_MODE_INNER (mode);
892 realpart = gen_reg_rtx (partmode);
893 imagpart = gen_reg_rtx (partmode);
894 return gen_rtx_CONCAT (mode, realpart, imagpart);
897 /* Make sure regno_pointer_align, and regno_reg_rtx are large
898 enough to have an element for this pseudo reg number. */
900 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
902 int old_size = crtl->emit.regno_pointer_align_length;
906 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
907 memset (tmp + old_size, 0, old_size);
908 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
910 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
911 memset (new1 + old_size, 0, old_size * sizeof (rtx));
912 regno_reg_rtx = new1;
914 crtl->emit.regno_pointer_align_length = old_size * 2;
917 val = gen_raw_REG (mode, reg_rtx_no);
918 regno_reg_rtx[reg_rtx_no++] = val;
922 /* Update NEW with the same attributes as REG, but with OFFSET added
923 to the REG_OFFSET. */
926 update_reg_offset (rtx new_rtx, rtx reg, int offset)
928 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
929 REG_OFFSET (reg) + offset);
932 /* Generate a register with same attributes as REG, but with OFFSET
933 added to the REG_OFFSET. */
936 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
939 rtx new_rtx = gen_rtx_REG (mode, regno);
941 update_reg_offset (new_rtx, reg, offset);
945 /* Generate a new pseudo-register with the same attributes as REG, but
946 with OFFSET added to the REG_OFFSET. */
949 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
951 rtx new_rtx = gen_reg_rtx (mode);
953 update_reg_offset (new_rtx, reg, offset);
957 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
958 new register is a (possibly paradoxical) lowpart of the old one. */
961 adjust_reg_mode (rtx reg, enum machine_mode mode)
963 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
964 PUT_MODE (reg, mode);
967 /* Copy REG's attributes from X, if X has any attributes. If REG and X
968 have different modes, REG is a (possibly paradoxical) lowpart of X. */
971 set_reg_attrs_from_value (rtx reg, rtx x)
975 /* Hard registers can be reused for multiple purposes within the same
976 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
978 if (HARD_REGISTER_P (reg))
981 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
984 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
986 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
988 mark_reg_pointer (reg, 0);
993 update_reg_offset (reg, x, offset);
995 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
999 /* Generate a REG rtx for a new pseudo register, copying the mode
1000 and attributes from X. */
1003 gen_reg_rtx_and_attrs (rtx x)
1005 rtx reg = gen_reg_rtx (GET_MODE (x));
1006 set_reg_attrs_from_value (reg, x);
1010 /* Set the register attributes for registers contained in PARM_RTX.
1011 Use needed values from memory attributes of MEM. */
1014 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1016 if (REG_P (parm_rtx))
1017 set_reg_attrs_from_value (parm_rtx, mem);
1018 else if (GET_CODE (parm_rtx) == PARALLEL)
1020 /* Check for a NULL entry in the first slot, used to indicate that the
1021 parameter goes both on the stack and in registers. */
1022 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1023 for (; i < XVECLEN (parm_rtx, 0); i++)
1025 rtx x = XVECEXP (parm_rtx, 0, i);
1026 if (REG_P (XEXP (x, 0)))
1027 REG_ATTRS (XEXP (x, 0))
1028 = get_reg_attrs (MEM_EXPR (mem),
1029 INTVAL (XEXP (x, 1)));
1034 /* Set the REG_ATTRS for registers in value X, given that X represents
1038 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1040 if (GET_CODE (x) == SUBREG)
1042 gcc_assert (subreg_lowpart_p (x));
1047 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1049 if (GET_CODE (x) == CONCAT)
1051 if (REG_P (XEXP (x, 0)))
1052 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1053 if (REG_P (XEXP (x, 1)))
1054 REG_ATTRS (XEXP (x, 1))
1055 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1057 if (GET_CODE (x) == PARALLEL)
1061 /* Check for a NULL entry, used to indicate that the parameter goes
1062 both on the stack and in registers. */
1063 if (XEXP (XVECEXP (x, 0, 0), 0))
1068 for (i = start; i < XVECLEN (x, 0); i++)
1070 rtx y = XVECEXP (x, 0, i);
1071 if (REG_P (XEXP (y, 0)))
1072 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1077 /* Assign the RTX X to declaration T. */
1080 set_decl_rtl (tree t, rtx x)
1082 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1084 set_reg_attrs_for_decl_rtl (t, x);
1087 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1088 if the ABI requires the parameter to be passed by reference. */
1091 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1093 DECL_INCOMING_RTL (t) = x;
1094 if (x && !by_reference_p)
1095 set_reg_attrs_for_decl_rtl (t, x);
1098 /* Identify REG (which may be a CONCAT) as a user register. */
1101 mark_user_reg (rtx reg)
1103 if (GET_CODE (reg) == CONCAT)
1105 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1106 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1110 gcc_assert (REG_P (reg));
1111 REG_USERVAR_P (reg) = 1;
1115 /* Identify REG as a probable pointer register and show its alignment
1116 as ALIGN, if nonzero. */
1119 mark_reg_pointer (rtx reg, int align)
1121 if (! REG_POINTER (reg))
1123 REG_POINTER (reg) = 1;
1126 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1128 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1129 /* We can no-longer be sure just how aligned this pointer is. */
1130 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1133 /* Return 1 plus largest pseudo reg number used in the current function. */
1141 /* Return 1 + the largest label number used so far in the current function. */
1144 max_label_num (void)
1149 /* Return first label number used in this function (if any were used). */
1152 get_first_label_num (void)
1154 return first_label_num;
1157 /* If the rtx for label was created during the expansion of a nested
1158 function, then first_label_num won't include this label number.
1159 Fix this now so that array indices work later. */
1162 maybe_set_first_label_num (rtx x)
1164 if (CODE_LABEL_NUMBER (x) < first_label_num)
1165 first_label_num = CODE_LABEL_NUMBER (x);
1168 /* Return a value representing some low-order bits of X, where the number
1169 of low-order bits is given by MODE. Note that no conversion is done
1170 between floating-point and fixed-point values, rather, the bit
1171 representation is returned.
1173 This function handles the cases in common between gen_lowpart, below,
1174 and two variants in cse.c and combine.c. These are the cases that can
1175 be safely handled at all points in the compilation.
1177 If this is not a case we can handle, return 0. */
1180 gen_lowpart_common (enum machine_mode mode, rtx x)
1182 int msize = GET_MODE_SIZE (mode);
1185 enum machine_mode innermode;
1187 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1188 so we have to make one up. Yuk. */
1189 innermode = GET_MODE (x);
1191 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1192 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1193 else if (innermode == VOIDmode)
1194 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1196 xsize = GET_MODE_SIZE (innermode);
1198 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1200 if (innermode == mode)
1203 /* MODE must occupy no more words than the mode of X. */
1204 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1205 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1208 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1209 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1212 offset = subreg_lowpart_offset (mode, innermode);
1214 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1215 && (GET_MODE_CLASS (mode) == MODE_INT
1216 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1218 /* If we are getting the low-order part of something that has been
1219 sign- or zero-extended, we can either just use the object being
1220 extended or make a narrower extension. If we want an even smaller
1221 piece than the size of the object being extended, call ourselves
1224 This case is used mostly by combine and cse. */
1226 if (GET_MODE (XEXP (x, 0)) == mode)
1228 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1229 return gen_lowpart_common (mode, XEXP (x, 0));
1230 else if (msize < xsize)
1231 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1233 else if (GET_CODE (x) == SUBREG || REG_P (x)
1234 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1235 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1236 return simplify_gen_subreg (mode, x, innermode, offset);
1238 /* Otherwise, we can't do this. */
1243 gen_highpart (enum machine_mode mode, rtx x)
1245 unsigned int msize = GET_MODE_SIZE (mode);
1248 /* This case loses if X is a subreg. To catch bugs early,
1249 complain if an invalid MODE is used even in other cases. */
1250 gcc_assert (msize <= UNITS_PER_WORD
1251 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1253 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1254 subreg_highpart_offset (mode, GET_MODE (x)));
1255 gcc_assert (result);
1257 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1258 the target if we have a MEM. gen_highpart must return a valid operand,
1259 emitting code if necessary to do so. */
1262 result = validize_mem (result);
1263 gcc_assert (result);
1269 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1270 be VOIDmode constant. */
1272 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1274 if (GET_MODE (exp) != VOIDmode)
1276 gcc_assert (GET_MODE (exp) == innermode);
1277 return gen_highpart (outermode, exp);
1279 return simplify_gen_subreg (outermode, exp, innermode,
1280 subreg_highpart_offset (outermode, innermode));
1283 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1286 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1288 unsigned int offset = 0;
1289 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1293 if (WORDS_BIG_ENDIAN)
1294 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1295 if (BYTES_BIG_ENDIAN)
1296 offset += difference % UNITS_PER_WORD;
1302 /* Return offset in bytes to get OUTERMODE high part
1303 of the value in mode INNERMODE stored in memory in target format. */
1305 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1307 unsigned int offset = 0;
1308 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1310 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1314 if (! WORDS_BIG_ENDIAN)
1315 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1316 if (! BYTES_BIG_ENDIAN)
1317 offset += difference % UNITS_PER_WORD;
1323 /* Return 1 iff X, assumed to be a SUBREG,
1324 refers to the least significant part of its containing reg.
1325 If X is not a SUBREG, always return 1 (it is its own low part!). */
1328 subreg_lowpart_p (const_rtx x)
1330 if (GET_CODE (x) != SUBREG)
1332 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1335 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1336 == SUBREG_BYTE (x));
1339 /* Return subword OFFSET of operand OP.
1340 The word number, OFFSET, is interpreted as the word number starting
1341 at the low-order address. OFFSET 0 is the low-order word if not
1342 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1344 If we cannot extract the required word, we return zero. Otherwise,
1345 an rtx corresponding to the requested word will be returned.
1347 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1348 reload has completed, a valid address will always be returned. After
1349 reload, if a valid address cannot be returned, we return zero.
1351 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1352 it is the responsibility of the caller.
1354 MODE is the mode of OP in case it is a CONST_INT.
1356 ??? This is still rather broken for some cases. The problem for the
1357 moment is that all callers of this thing provide no 'goal mode' to
1358 tell us to work with. This exists because all callers were written
1359 in a word based SUBREG world.
1360 Now use of this function can be deprecated by simplify_subreg in most
1365 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1367 if (mode == VOIDmode)
1368 mode = GET_MODE (op);
1370 gcc_assert (mode != VOIDmode);
1372 /* If OP is narrower than a word, fail. */
1374 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1377 /* If we want a word outside OP, return zero. */
1379 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1382 /* Form a new MEM at the requested address. */
1385 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1387 if (! validate_address)
1390 else if (reload_completed)
1392 if (! strict_memory_address_addr_space_p (word_mode,
1394 MEM_ADDR_SPACE (op)))
1398 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1401 /* Rest can be handled by simplify_subreg. */
1402 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1405 /* Similar to `operand_subword', but never return 0. If we can't
1406 extract the required subword, put OP into a register and try again.
1407 The second attempt must succeed. We always validate the address in
1410 MODE is the mode of OP, in case it is CONST_INT. */
1413 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1415 rtx result = operand_subword (op, offset, 1, mode);
1420 if (mode != BLKmode && mode != VOIDmode)
1422 /* If this is a register which can not be accessed by words, copy it
1423 to a pseudo register. */
1425 op = copy_to_reg (op);
1427 op = force_reg (mode, op);
1430 result = operand_subword (op, offset, 1, mode);
1431 gcc_assert (result);
1436 /* Returns 1 if both MEM_EXPR can be considered equal
1440 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1445 if (! expr1 || ! expr2)
1448 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1451 return operand_equal_p (expr1, expr2, 0);
1454 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1455 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1459 get_mem_align_offset (rtx mem, unsigned int align)
1462 unsigned HOST_WIDE_INT offset;
1464 /* This function can't use
1465 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1466 || !CONST_INT_P (MEM_OFFSET (mem))
1467 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1471 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1473 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1474 for <variable>. get_inner_reference doesn't handle it and
1475 even if it did, the alignment in that case needs to be determined
1476 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1477 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1478 isn't sufficiently aligned, the object it is in might be. */
1479 gcc_assert (MEM_P (mem));
1480 expr = MEM_EXPR (mem);
1481 if (expr == NULL_TREE
1482 || MEM_OFFSET (mem) == NULL_RTX
1483 || !CONST_INT_P (MEM_OFFSET (mem)))
1486 offset = INTVAL (MEM_OFFSET (mem));
1489 if (DECL_ALIGN (expr) < align)
1492 else if (INDIRECT_REF_P (expr))
1494 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1497 else if (TREE_CODE (expr) == COMPONENT_REF)
1501 tree inner = TREE_OPERAND (expr, 0);
1502 tree field = TREE_OPERAND (expr, 1);
1503 tree byte_offset = component_ref_field_offset (expr);
1504 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1507 || !host_integerp (byte_offset, 1)
1508 || !host_integerp (bit_offset, 1))
1511 offset += tree_low_cst (byte_offset, 1);
1512 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1514 if (inner == NULL_TREE)
1516 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1517 < (unsigned int) align)
1521 else if (DECL_P (inner))
1523 if (DECL_ALIGN (inner) < align)
1527 else if (TREE_CODE (inner) != COMPONENT_REF)
1535 return offset & ((align / BITS_PER_UNIT) - 1);
1538 /* Given REF (a MEM) and T, either the type of X or the expression
1539 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1540 if we are making a new object of this type. BITPOS is nonzero if
1541 there is an offset outstanding on T that will be applied later. */
1544 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1545 HOST_WIDE_INT bitpos)
1547 alias_set_type alias = MEM_ALIAS_SET (ref);
1548 tree expr = MEM_EXPR (ref);
1549 rtx offset = MEM_OFFSET (ref);
1550 rtx size = MEM_SIZE (ref);
1551 unsigned int align = MEM_ALIGN (ref);
1552 HOST_WIDE_INT apply_bitpos = 0;
1555 /* It can happen that type_for_mode was given a mode for which there
1556 is no language-level type. In which case it returns NULL, which
1561 type = TYPE_P (t) ? t : TREE_TYPE (t);
1562 if (type == error_mark_node)
1565 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1566 wrong answer, as it assumes that DECL_RTL already has the right alias
1567 info. Callers should not set DECL_RTL until after the call to
1568 set_mem_attributes. */
1569 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1571 /* Get the alias set from the expression or type (perhaps using a
1572 front-end routine) and use it. */
1573 alias = get_alias_set (t);
1575 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1576 MEM_IN_STRUCT_P (ref)
1577 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1578 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1580 /* If we are making an object of this type, or if this is a DECL, we know
1581 that it is a scalar if the type is not an aggregate. */
1582 if ((objectp || DECL_P (t))
1583 && ! AGGREGATE_TYPE_P (type)
1584 && TREE_CODE (type) != COMPLEX_TYPE)
1585 MEM_SCALAR_P (ref) = 1;
1587 /* We can set the alignment from the type if we are making an object,
1588 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1589 if (objectp || TREE_CODE (t) == INDIRECT_REF
1590 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1591 || TYPE_ALIGN_OK (type))
1592 align = MAX (align, TYPE_ALIGN (type));
1594 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1596 if (integer_zerop (TREE_OPERAND (t, 1)))
1597 /* We don't know anything about the alignment. */
1598 align = BITS_PER_UNIT;
1600 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1603 /* If the size is known, we can set that. */
1604 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1605 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1607 /* If T is not a type, we may be able to deduce some more information about
1612 bool align_computed = false;
1614 if (TREE_THIS_VOLATILE (t))
1615 MEM_VOLATILE_P (ref) = 1;
1617 /* Now remove any conversions: they don't change what the underlying
1618 object is. Likewise for SAVE_EXPR. */
1619 while (CONVERT_EXPR_P (t)
1620 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1621 || TREE_CODE (t) == SAVE_EXPR)
1622 t = TREE_OPERAND (t, 0);
1624 /* We may look through structure-like accesses for the purposes of
1625 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1627 while (TREE_CODE (base) == COMPONENT_REF
1628 || TREE_CODE (base) == REALPART_EXPR
1629 || TREE_CODE (base) == IMAGPART_EXPR
1630 || TREE_CODE (base) == BIT_FIELD_REF)
1631 base = TREE_OPERAND (base, 0);
1635 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1636 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1638 MEM_NOTRAP_P (ref) = 1;
1641 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1643 base = get_base_address (base);
1644 if (base && DECL_P (base)
1645 && TREE_READONLY (base)
1646 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1648 tree base_type = TREE_TYPE (base);
1649 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1650 || DECL_ARTIFICIAL (base));
1651 MEM_READONLY_P (ref) = 1;
1654 /* If this expression uses it's parent's alias set, mark it such
1655 that we won't change it. */
1656 if (component_uses_parent_alias_set (t))
1657 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1659 /* If this is a decl, set the attributes of the MEM from it. */
1663 offset = const0_rtx;
1664 apply_bitpos = bitpos;
1665 size = (DECL_SIZE_UNIT (t)
1666 && host_integerp (DECL_SIZE_UNIT (t), 1)
1667 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1668 align = DECL_ALIGN (t);
1669 align_computed = true;
1672 /* If this is a constant, we know the alignment. */
1673 else if (CONSTANT_CLASS_P (t))
1675 align = TYPE_ALIGN (type);
1676 #ifdef CONSTANT_ALIGNMENT
1677 align = CONSTANT_ALIGNMENT (t, align);
1679 align_computed = true;
1682 /* If this is a field reference and not a bit-field, record it. */
1683 /* ??? There is some information that can be gleaned from bit-fields,
1684 such as the word offset in the structure that might be modified.
1685 But skip it for now. */
1686 else if (TREE_CODE (t) == COMPONENT_REF
1687 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1690 offset = const0_rtx;
1691 apply_bitpos = bitpos;
1692 /* ??? Any reason the field size would be different than
1693 the size we got from the type? */
1696 /* If this is an array reference, look for an outer field reference. */
1697 else if (TREE_CODE (t) == ARRAY_REF)
1699 tree off_tree = size_zero_node;
1700 /* We can't modify t, because we use it at the end of the
1706 tree index = TREE_OPERAND (t2, 1);
1707 tree low_bound = array_ref_low_bound (t2);
1708 tree unit_size = array_ref_element_size (t2);
1710 /* We assume all arrays have sizes that are a multiple of a byte.
1711 First subtract the lower bound, if any, in the type of the
1712 index, then convert to sizetype and multiply by the size of
1713 the array element. */
1714 if (! integer_zerop (low_bound))
1715 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1718 off_tree = size_binop (PLUS_EXPR,
1719 size_binop (MULT_EXPR,
1720 fold_convert (sizetype,
1724 t2 = TREE_OPERAND (t2, 0);
1726 while (TREE_CODE (t2) == ARRAY_REF);
1732 if (host_integerp (off_tree, 1))
1734 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1735 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1736 align = DECL_ALIGN (t2);
1737 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1739 align_computed = true;
1740 offset = GEN_INT (ioff);
1741 apply_bitpos = bitpos;
1744 else if (TREE_CODE (t2) == COMPONENT_REF)
1748 if (host_integerp (off_tree, 1))
1750 offset = GEN_INT (tree_low_cst (off_tree, 1));
1751 apply_bitpos = bitpos;
1753 /* ??? Any reason the field size would be different than
1754 the size we got from the type? */
1756 else if (flag_argument_noalias > 1
1757 && (INDIRECT_REF_P (t2))
1758 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1765 /* If this is a Fortran indirect argument reference, record the
1767 else if (flag_argument_noalias > 1
1768 && (INDIRECT_REF_P (t))
1769 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1775 if (!align_computed && !INDIRECT_REF_P (t))
1777 unsigned int obj_align
1778 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1779 align = MAX (align, obj_align);
1783 /* If we modified OFFSET based on T, then subtract the outstanding
1784 bit position offset. Similarly, increase the size of the accessed
1785 object to contain the negative offset. */
1788 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1790 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1793 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1795 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1796 we're overlapping. */
1801 /* Now set the attributes we computed above. */
1803 = get_mem_attrs (alias, expr, offset, size, align,
1804 TYPE_ADDR_SPACE (type), GET_MODE (ref));
1806 /* If this is already known to be a scalar or aggregate, we are done. */
1807 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1810 /* If it is a reference into an aggregate, this is part of an aggregate.
1811 Otherwise we don't know. */
1812 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1813 || TREE_CODE (t) == ARRAY_RANGE_REF
1814 || TREE_CODE (t) == BIT_FIELD_REF)
1815 MEM_IN_STRUCT_P (ref) = 1;
1819 set_mem_attributes (rtx ref, tree t, int objectp)
1821 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1824 /* Set the alias set of MEM to SET. */
1827 set_mem_alias_set (rtx mem, alias_set_type set)
1829 #ifdef ENABLE_CHECKING
1830 /* If the new and old alias sets don't conflict, something is wrong. */
1831 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1834 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1835 MEM_SIZE (mem), MEM_ALIGN (mem),
1836 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1839 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1842 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1844 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1845 MEM_OFFSET (mem), MEM_SIZE (mem),
1846 MEM_ALIGN (mem), addrspace, GET_MODE (mem));
1849 /* Set the alignment of MEM to ALIGN bits. */
1852 set_mem_align (rtx mem, unsigned int align)
1854 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1855 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1856 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1859 /* Set the expr for MEM to EXPR. */
1862 set_mem_expr (rtx mem, tree expr)
1865 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1866 MEM_SIZE (mem), MEM_ALIGN (mem),
1867 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1870 /* Set the offset of MEM to OFFSET. */
1873 set_mem_offset (rtx mem, rtx offset)
1875 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1876 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1877 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1880 /* Set the size of MEM to SIZE. */
1883 set_mem_size (rtx mem, rtx size)
1885 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1886 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1887 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1890 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1891 and its address changed to ADDR. (VOIDmode means don't change the mode.
1892 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1893 returned memory location is required to be valid. The memory
1894 attributes are not changed. */
1897 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1902 gcc_assert (MEM_P (memref));
1903 as = MEM_ADDR_SPACE (memref);
1904 if (mode == VOIDmode)
1905 mode = GET_MODE (memref);
1907 addr = XEXP (memref, 0);
1908 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1909 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1914 if (reload_in_progress || reload_completed)
1915 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1917 addr = memory_address_addr_space (mode, addr, as);
1920 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1923 new_rtx = gen_rtx_MEM (mode, addr);
1924 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1928 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1929 way we are changing MEMREF, so we only preserve the alias set. */
1932 change_address (rtx memref, enum machine_mode mode, rtx addr)
1934 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1935 enum machine_mode mmode = GET_MODE (new_rtx);
1938 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1939 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1941 /* If there are no changes, just return the original memory reference. */
1942 if (new_rtx == memref)
1944 if (MEM_ATTRS (memref) == 0
1945 || (MEM_EXPR (memref) == NULL
1946 && MEM_OFFSET (memref) == NULL
1947 && MEM_SIZE (memref) == size
1948 && MEM_ALIGN (memref) == align))
1951 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1952 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1956 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align,
1957 MEM_ADDR_SPACE (memref), mmode);
1962 /* Return a memory reference like MEMREF, but with its mode changed
1963 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1964 nonzero, the memory address is forced to be valid.
1965 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1966 and caller is responsible for adjusting MEMREF base register. */
1969 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1970 int validate, int adjust)
1972 rtx addr = XEXP (memref, 0);
1974 rtx memoffset = MEM_OFFSET (memref);
1976 unsigned int memalign = MEM_ALIGN (memref);
1977 addr_space_t as = MEM_ADDR_SPACE (memref);
1980 /* If there are no changes, just return the original memory reference. */
1981 if (mode == GET_MODE (memref) && !offset
1982 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1985 /* ??? Prefer to create garbage instead of creating shared rtl.
1986 This may happen even if offset is nonzero -- consider
1987 (plus (plus reg reg) const_int) -- so do this always. */
1988 addr = copy_rtx (addr);
1990 /* Convert a possibly large offset to a signed value within the
1991 range of the target address space. */
1992 pbits = GET_MODE_BITSIZE (Pmode);
1993 if (HOST_BITS_PER_WIDE_INT > pbits)
1995 int shift = HOST_BITS_PER_WIDE_INT - pbits;
1996 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2002 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2003 object, we can merge it into the LO_SUM. */
2004 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2006 && (unsigned HOST_WIDE_INT) offset
2007 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2008 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2009 plus_constant (XEXP (addr, 1), offset));
2011 addr = plus_constant (addr, offset);
2014 new_rtx = change_address_1 (memref, mode, addr, validate);
2016 /* If the address is a REG, change_address_1 rightfully returns memref,
2017 but this would destroy memref's MEM_ATTRS. */
2018 if (new_rtx == memref && offset != 0)
2019 new_rtx = copy_rtx (new_rtx);
2021 /* Compute the new values of the memory attributes due to this adjustment.
2022 We add the offsets and update the alignment. */
2024 memoffset = GEN_INT (offset + INTVAL (memoffset));
2026 /* Compute the new alignment by taking the MIN of the alignment and the
2027 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2032 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2034 /* We can compute the size in a number of ways. */
2035 if (GET_MODE (new_rtx) != BLKmode)
2036 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2037 else if (MEM_SIZE (memref))
2038 size = plus_constant (MEM_SIZE (memref), -offset);
2040 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2041 memoffset, size, memalign, as,
2042 GET_MODE (new_rtx));
2044 /* At some point, we should validate that this offset is within the object,
2045 if all the appropriate values are known. */
2049 /* Return a memory reference like MEMREF, but with its mode changed
2050 to MODE and its address changed to ADDR, which is assumed to be
2051 MEMREF offset by OFFSET bytes. If VALIDATE is
2052 nonzero, the memory address is forced to be valid. */
2055 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2056 HOST_WIDE_INT offset, int validate)
2058 memref = change_address_1 (memref, VOIDmode, addr, validate);
2059 return adjust_address_1 (memref, mode, offset, validate, 0);
2062 /* Return a memory reference like MEMREF, but whose address is changed by
2063 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2064 known to be in OFFSET (possibly 1). */
2067 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2069 rtx new_rtx, addr = XEXP (memref, 0);
2070 addr_space_t as = MEM_ADDR_SPACE (memref);
2072 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2074 /* At this point we don't know _why_ the address is invalid. It
2075 could have secondary memory references, multiplies or anything.
2077 However, if we did go and rearrange things, we can wind up not
2078 being able to recognize the magic around pic_offset_table_rtx.
2079 This stuff is fragile, and is yet another example of why it is
2080 bad to expose PIC machinery too early. */
2081 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx, as)
2082 && GET_CODE (addr) == PLUS
2083 && XEXP (addr, 0) == pic_offset_table_rtx)
2085 addr = force_reg (GET_MODE (addr), addr);
2086 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2089 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2090 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2092 /* If there are no changes, just return the original memory reference. */
2093 if (new_rtx == memref)
2096 /* Update the alignment to reflect the offset. Reset the offset, which
2099 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2100 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2101 as, GET_MODE (new_rtx));
2105 /* Return a memory reference like MEMREF, but with its address changed to
2106 ADDR. The caller is asserting that the actual piece of memory pointed
2107 to is the same, just the form of the address is being changed, such as
2108 by putting something into a register. */
2111 replace_equiv_address (rtx memref, rtx addr)
2113 /* change_address_1 copies the memory attribute structure without change
2114 and that's exactly what we want here. */
2115 update_temp_slot_address (XEXP (memref, 0), addr);
2116 return change_address_1 (memref, VOIDmode, addr, 1);
2119 /* Likewise, but the reference is not required to be valid. */
2122 replace_equiv_address_nv (rtx memref, rtx addr)
2124 return change_address_1 (memref, VOIDmode, addr, 0);
2127 /* Return a memory reference like MEMREF, but with its mode widened to
2128 MODE and offset by OFFSET. This would be used by targets that e.g.
2129 cannot issue QImode memory operations and have to use SImode memory
2130 operations plus masking logic. */
2133 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2135 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2136 tree expr = MEM_EXPR (new_rtx);
2137 rtx memoffset = MEM_OFFSET (new_rtx);
2138 unsigned int size = GET_MODE_SIZE (mode);
2140 /* If there are no changes, just return the original memory reference. */
2141 if (new_rtx == memref)
2144 /* If we don't know what offset we were at within the expression, then
2145 we can't know if we've overstepped the bounds. */
2151 if (TREE_CODE (expr) == COMPONENT_REF)
2153 tree field = TREE_OPERAND (expr, 1);
2154 tree offset = component_ref_field_offset (expr);
2156 if (! DECL_SIZE_UNIT (field))
2162 /* Is the field at least as large as the access? If so, ok,
2163 otherwise strip back to the containing structure. */
2164 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2165 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2166 && INTVAL (memoffset) >= 0)
2169 if (! host_integerp (offset, 1))
2175 expr = TREE_OPERAND (expr, 0);
2177 = (GEN_INT (INTVAL (memoffset)
2178 + tree_low_cst (offset, 1)
2179 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2182 /* Similarly for the decl. */
2183 else if (DECL_P (expr)
2184 && DECL_SIZE_UNIT (expr)
2185 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2186 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2187 && (! memoffset || INTVAL (memoffset) >= 0))
2191 /* The widened memory access overflows the expression, which means
2192 that it could alias another expression. Zap it. */
2199 memoffset = NULL_RTX;
2201 /* The widened memory may alias other stuff, so zap the alias set. */
2202 /* ??? Maybe use get_alias_set on any remaining expression. */
2204 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2205 MEM_ALIGN (new_rtx),
2206 MEM_ADDR_SPACE (new_rtx), mode);
2211 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2212 static GTY(()) tree spill_slot_decl;
2215 get_spill_slot_decl (bool force_build_p)
2217 tree d = spill_slot_decl;
2220 if (d || !force_build_p)
2223 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2224 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2225 DECL_ARTIFICIAL (d) = 1;
2226 DECL_IGNORED_P (d) = 1;
2228 TREE_THIS_NOTRAP (d) = 1;
2229 spill_slot_decl = d;
2231 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2232 MEM_NOTRAP_P (rd) = 1;
2233 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2234 NULL_RTX, 0, ADDR_SPACE_GENERIC, BLKmode);
2235 SET_DECL_RTL (d, rd);
2240 /* Given MEM, a result from assign_stack_local, fill in the memory
2241 attributes as appropriate for a register allocator spill slot.
2242 These slots are not aliasable by other memory. We arrange for
2243 them all to use a single MEM_EXPR, so that the aliasing code can
2244 work properly in the case of shared spill slots. */
2247 set_mem_attrs_for_spill (rtx mem)
2249 alias_set_type alias;
2253 expr = get_spill_slot_decl (true);
2254 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2256 /* We expect the incoming memory to be of the form:
2257 (mem:MODE (plus (reg sfp) (const_int offset)))
2258 with perhaps the plus missing for offset = 0. */
2259 addr = XEXP (mem, 0);
2260 offset = const0_rtx;
2261 if (GET_CODE (addr) == PLUS
2262 && CONST_INT_P (XEXP (addr, 1)))
2263 offset = XEXP (addr, 1);
2265 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2266 MEM_SIZE (mem), MEM_ALIGN (mem),
2267 ADDR_SPACE_GENERIC, GET_MODE (mem));
2268 MEM_NOTRAP_P (mem) = 1;
2271 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2274 gen_label_rtx (void)
2276 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2277 NULL, label_num++, NULL);
2280 /* For procedure integration. */
2282 /* Install new pointers to the first and last insns in the chain.
2283 Also, set cur_insn_uid to one higher than the last in use.
2284 Used for an inline-procedure after copying the insn chain. */
2287 set_new_first_and_last_insn (rtx first, rtx last)
2295 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2297 int debug_count = 0;
2299 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2300 cur_debug_insn_uid = 0;
2302 for (insn = first; insn; insn = NEXT_INSN (insn))
2303 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2304 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2307 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2308 if (DEBUG_INSN_P (insn))
2313 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2315 cur_debug_insn_uid++;
2318 for (insn = first; insn; insn = NEXT_INSN (insn))
2319 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2324 /* Go through all the RTL insn bodies and copy any invalid shared
2325 structure. This routine should only be called once. */
2328 unshare_all_rtl_1 (rtx insn)
2330 /* Unshare just about everything else. */
2331 unshare_all_rtl_in_chain (insn);
2333 /* Make sure the addresses of stack slots found outside the insn chain
2334 (such as, in DECL_RTL of a variable) are not shared
2335 with the insn chain.
2337 This special care is necessary when the stack slot MEM does not
2338 actually appear in the insn chain. If it does appear, its address
2339 is unshared from all else at that point. */
2340 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2343 /* Go through all the RTL insn bodies and copy any invalid shared
2344 structure, again. This is a fairly expensive thing to do so it
2345 should be done sparingly. */
2348 unshare_all_rtl_again (rtx insn)
2353 for (p = insn; p; p = NEXT_INSN (p))
2356 reset_used_flags (PATTERN (p));
2357 reset_used_flags (REG_NOTES (p));
2360 /* Make sure that virtual stack slots are not shared. */
2361 set_used_decls (DECL_INITIAL (cfun->decl));
2363 /* Make sure that virtual parameters are not shared. */
2364 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2365 set_used_flags (DECL_RTL (decl));
2367 reset_used_flags (stack_slot_list);
2369 unshare_all_rtl_1 (insn);
2373 unshare_all_rtl (void)
2375 unshare_all_rtl_1 (get_insns ());
2379 struct rtl_opt_pass pass_unshare_all_rtl =
2383 "unshare", /* name */
2385 unshare_all_rtl, /* execute */
2388 0, /* static_pass_number */
2389 TV_NONE, /* tv_id */
2390 0, /* properties_required */
2391 0, /* properties_provided */
2392 0, /* properties_destroyed */
2393 0, /* todo_flags_start */
2394 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2399 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2400 Recursively does the same for subexpressions. */
2403 verify_rtx_sharing (rtx orig, rtx insn)
2408 const char *format_ptr;
2413 code = GET_CODE (x);
2415 /* These types may be freely shared. */
2433 /* SCRATCH must be shared because they represent distinct values. */
2435 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2440 if (shared_const_p (orig))
2445 /* A MEM is allowed to be shared if its address is constant. */
2446 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2447 || reload_completed || reload_in_progress)
2456 /* This rtx may not be shared. If it has already been seen,
2457 replace it with a copy of itself. */
2458 #ifdef ENABLE_CHECKING
2459 if (RTX_FLAG (x, used))
2461 error ("invalid rtl sharing found in the insn");
2463 error ("shared rtx");
2465 internal_error ("internal consistency failure");
2468 gcc_assert (!RTX_FLAG (x, used));
2470 RTX_FLAG (x, used) = 1;
2472 /* Now scan the subexpressions recursively. */
2474 format_ptr = GET_RTX_FORMAT (code);
2476 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2478 switch (*format_ptr++)
2481 verify_rtx_sharing (XEXP (x, i), insn);
2485 if (XVEC (x, i) != NULL)
2488 int len = XVECLEN (x, i);
2490 for (j = 0; j < len; j++)
2492 /* We allow sharing of ASM_OPERANDS inside single
2494 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2495 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2497 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2499 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2508 /* Go through all the RTL insn bodies and check that there is no unexpected
2509 sharing in between the subexpressions. */
2512 verify_rtl_sharing (void)
2516 for (p = get_insns (); p; p = NEXT_INSN (p))
2519 reset_used_flags (PATTERN (p));
2520 reset_used_flags (REG_NOTES (p));
2521 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2524 rtx q, sequence = PATTERN (p);
2526 for (i = 0; i < XVECLEN (sequence, 0); i++)
2528 q = XVECEXP (sequence, 0, i);
2529 gcc_assert (INSN_P (q));
2530 reset_used_flags (PATTERN (q));
2531 reset_used_flags (REG_NOTES (q));
2536 for (p = get_insns (); p; p = NEXT_INSN (p))
2539 verify_rtx_sharing (PATTERN (p), p);
2540 verify_rtx_sharing (REG_NOTES (p), p);
2544 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2545 Assumes the mark bits are cleared at entry. */
2548 unshare_all_rtl_in_chain (rtx insn)
2550 for (; insn; insn = NEXT_INSN (insn))
2553 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2554 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2558 /* Go through all virtual stack slots of a function and mark them as
2559 shared. We never replace the DECL_RTLs themselves with a copy,
2560 but expressions mentioned into a DECL_RTL cannot be shared with
2561 expressions in the instruction stream.
2563 Note that reload may convert pseudo registers into memories in-place.
2564 Pseudo registers are always shared, but MEMs never are. Thus if we
2565 reset the used flags on MEMs in the instruction stream, we must set
2566 them again on MEMs that appear in DECL_RTLs. */
2569 set_used_decls (tree blk)
2574 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2575 if (DECL_RTL_SET_P (t))
2576 set_used_flags (DECL_RTL (t));
2578 /* Now process sub-blocks. */
2579 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2583 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2584 Recursively does the same for subexpressions. Uses
2585 copy_rtx_if_shared_1 to reduce stack space. */
2588 copy_rtx_if_shared (rtx orig)
2590 copy_rtx_if_shared_1 (&orig);
2594 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2595 use. Recursively does the same for subexpressions. */
2598 copy_rtx_if_shared_1 (rtx *orig1)
2604 const char *format_ptr;
2608 /* Repeat is used to turn tail-recursion into iteration. */
2615 code = GET_CODE (x);
2617 /* These types may be freely shared. */
2634 /* SCRATCH must be shared because they represent distinct values. */
2637 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2642 if (shared_const_p (x))
2652 /* The chain of insns is not being copied. */
2659 /* This rtx may not be shared. If it has already been seen,
2660 replace it with a copy of itself. */
2662 if (RTX_FLAG (x, used))
2664 x = shallow_copy_rtx (x);
2667 RTX_FLAG (x, used) = 1;
2669 /* Now scan the subexpressions recursively.
2670 We can store any replaced subexpressions directly into X
2671 since we know X is not shared! Any vectors in X
2672 must be copied if X was copied. */
2674 format_ptr = GET_RTX_FORMAT (code);
2675 length = GET_RTX_LENGTH (code);
2678 for (i = 0; i < length; i++)
2680 switch (*format_ptr++)
2684 copy_rtx_if_shared_1 (last_ptr);
2685 last_ptr = &XEXP (x, i);
2689 if (XVEC (x, i) != NULL)
2692 int len = XVECLEN (x, i);
2694 /* Copy the vector iff I copied the rtx and the length
2696 if (copied && len > 0)
2697 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2699 /* Call recursively on all inside the vector. */
2700 for (j = 0; j < len; j++)
2703 copy_rtx_if_shared_1 (last_ptr);
2704 last_ptr = &XVECEXP (x, i, j);
2719 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2720 to look for shared sub-parts. */
2723 reset_used_flags (rtx x)
2727 const char *format_ptr;
2730 /* Repeat is used to turn tail-recursion into iteration. */
2735 code = GET_CODE (x);
2737 /* These types may be freely shared so we needn't do any resetting
2762 /* The chain of insns is not being copied. */
2769 RTX_FLAG (x, used) = 0;
2771 format_ptr = GET_RTX_FORMAT (code);
2772 length = GET_RTX_LENGTH (code);
2774 for (i = 0; i < length; i++)
2776 switch (*format_ptr++)
2784 reset_used_flags (XEXP (x, i));
2788 for (j = 0; j < XVECLEN (x, i); j++)
2789 reset_used_flags (XVECEXP (x, i, j));
2795 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2796 to look for shared sub-parts. */
2799 set_used_flags (rtx x)
2803 const char *format_ptr;
2808 code = GET_CODE (x);
2810 /* These types may be freely shared so we needn't do any resetting
2835 /* The chain of insns is not being copied. */
2842 RTX_FLAG (x, used) = 1;
2844 format_ptr = GET_RTX_FORMAT (code);
2845 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2847 switch (*format_ptr++)
2850 set_used_flags (XEXP (x, i));
2854 for (j = 0; j < XVECLEN (x, i); j++)
2855 set_used_flags (XVECEXP (x, i, j));
2861 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2862 Return X or the rtx for the pseudo reg the value of X was copied into.
2863 OTHER must be valid as a SET_DEST. */
2866 make_safe_from (rtx x, rtx other)
2869 switch (GET_CODE (other))
2872 other = SUBREG_REG (other);
2874 case STRICT_LOW_PART:
2877 other = XEXP (other, 0);
2886 && GET_CODE (x) != SUBREG)
2888 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2889 || reg_mentioned_p (other, x))))
2891 rtx temp = gen_reg_rtx (GET_MODE (x));
2892 emit_move_insn (temp, x);
2898 /* Emission of insns (adding them to the doubly-linked list). */
2900 /* Return the first insn of the current sequence or current function. */
2908 /* Specify a new insn as the first in the chain. */
2911 set_first_insn (rtx insn)
2913 gcc_assert (!PREV_INSN (insn));
2917 /* Return the last insn emitted in current sequence or current function. */
2920 get_last_insn (void)
2925 /* Specify a new insn as the last in the chain. */
2928 set_last_insn (rtx insn)
2930 gcc_assert (!NEXT_INSN (insn));
2934 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2937 get_last_insn_anywhere (void)
2939 struct sequence_stack *stack;
2942 for (stack = seq_stack; stack; stack = stack->next)
2943 if (stack->last != 0)
2948 /* Return the first nonnote insn emitted in current sequence or current
2949 function. This routine looks inside SEQUENCEs. */
2952 get_first_nonnote_insn (void)
2954 rtx insn = first_insn;
2959 for (insn = next_insn (insn);
2960 insn && NOTE_P (insn);
2961 insn = next_insn (insn))
2965 if (NONJUMP_INSN_P (insn)
2966 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2967 insn = XVECEXP (PATTERN (insn), 0, 0);
2974 /* Return the last nonnote insn emitted in current sequence or current
2975 function. This routine looks inside SEQUENCEs. */
2978 get_last_nonnote_insn (void)
2980 rtx insn = last_insn;
2985 for (insn = previous_insn (insn);
2986 insn && NOTE_P (insn);
2987 insn = previous_insn (insn))
2991 if (NONJUMP_INSN_P (insn)
2992 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2993 insn = XVECEXP (PATTERN (insn), 0,
2994 XVECLEN (PATTERN (insn), 0) - 1);
3001 /* Return a number larger than any instruction's uid in this function. */
3006 return cur_insn_uid;
3009 /* Return the number of actual (non-debug) insns emitted in this
3013 get_max_insn_count (void)
3015 int n = cur_insn_uid;
3017 /* The table size must be stable across -g, to avoid codegen
3018 differences due to debug insns, and not be affected by
3019 -fmin-insn-uid, to avoid excessive table size and to simplify
3020 debugging of -fcompare-debug failures. */
3021 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3022 n -= cur_debug_insn_uid;
3024 n -= MIN_NONDEBUG_INSN_UID;
3030 /* Return the next insn. If it is a SEQUENCE, return the first insn
3034 next_insn (rtx insn)
3038 insn = NEXT_INSN (insn);
3039 if (insn && NONJUMP_INSN_P (insn)
3040 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3041 insn = XVECEXP (PATTERN (insn), 0, 0);
3047 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3051 previous_insn (rtx insn)
3055 insn = PREV_INSN (insn);
3056 if (insn && NONJUMP_INSN_P (insn)
3057 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3058 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3064 /* Return the next insn after INSN that is not a NOTE. This routine does not
3065 look inside SEQUENCEs. */
3068 next_nonnote_insn (rtx insn)
3072 insn = NEXT_INSN (insn);
3073 if (insn == 0 || !NOTE_P (insn))
3080 /* Return the next insn after INSN that is not a NOTE, but stop the
3081 search before we enter another basic block. This routine does not
3082 look inside SEQUENCEs. */
3085 next_nonnote_insn_bb (rtx insn)
3089 insn = NEXT_INSN (insn);
3090 if (insn == 0 || !NOTE_P (insn))
3092 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3099 /* Return the previous insn before INSN that is not a NOTE. This routine does
3100 not look inside SEQUENCEs. */
3103 prev_nonnote_insn (rtx insn)
3107 insn = PREV_INSN (insn);
3108 if (insn == 0 || !NOTE_P (insn))
3115 /* Return the previous insn before INSN that is not a NOTE, but stop
3116 the search before we enter another basic block. This routine does
3117 not look inside SEQUENCEs. */
3120 prev_nonnote_insn_bb (rtx insn)
3124 insn = PREV_INSN (insn);
3125 if (insn == 0 || !NOTE_P (insn))
3127 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3134 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3135 routine does not look inside SEQUENCEs. */
3138 next_nondebug_insn (rtx insn)
3142 insn = NEXT_INSN (insn);
3143 if (insn == 0 || !DEBUG_INSN_P (insn))
3150 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3151 This routine does not look inside SEQUENCEs. */
3154 prev_nondebug_insn (rtx insn)
3158 insn = PREV_INSN (insn);
3159 if (insn == 0 || !DEBUG_INSN_P (insn))
3166 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3167 or 0, if there is none. This routine does not look inside
3171 next_real_insn (rtx insn)
3175 insn = NEXT_INSN (insn);
3176 if (insn == 0 || INSN_P (insn))
3183 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3184 or 0, if there is none. This routine does not look inside
3188 prev_real_insn (rtx insn)
3192 insn = PREV_INSN (insn);
3193 if (insn == 0 || INSN_P (insn))
3200 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3201 This routine does not look inside SEQUENCEs. */
3204 last_call_insn (void)
3208 for (insn = get_last_insn ();
3209 insn && !CALL_P (insn);
3210 insn = PREV_INSN (insn))
3216 /* Find the next insn after INSN that really does something. This routine
3217 does not look inside SEQUENCEs. Until reload has completed, this is the
3218 same as next_real_insn. */
3221 active_insn_p (const_rtx insn)
3223 return (CALL_P (insn) || JUMP_P (insn)
3224 || (NONJUMP_INSN_P (insn)
3225 && (! reload_completed
3226 || (GET_CODE (PATTERN (insn)) != USE
3227 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3231 next_active_insn (rtx insn)
3235 insn = NEXT_INSN (insn);
3236 if (insn == 0 || active_insn_p (insn))
3243 /* Find the last insn before INSN that really does something. This routine
3244 does not look inside SEQUENCEs. Until reload has completed, this is the
3245 same as prev_real_insn. */
3248 prev_active_insn (rtx insn)
3252 insn = PREV_INSN (insn);
3253 if (insn == 0 || active_insn_p (insn))
3260 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3263 next_label (rtx insn)
3267 insn = NEXT_INSN (insn);
3268 if (insn == 0 || LABEL_P (insn))
3275 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3278 prev_label (rtx insn)
3282 insn = PREV_INSN (insn);
3283 if (insn == 0 || LABEL_P (insn))
3290 /* Return the last label to mark the same position as LABEL. Return null
3291 if LABEL itself is null. */
3294 skip_consecutive_labels (rtx label)
3298 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3306 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3307 and REG_CC_USER notes so we can find it. */
3310 link_cc0_insns (rtx insn)
3312 rtx user = next_nonnote_insn (insn);
3314 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3315 user = XVECEXP (PATTERN (user), 0, 0);
3317 add_reg_note (user, REG_CC_SETTER, insn);
3318 add_reg_note (insn, REG_CC_USER, user);
3321 /* Return the next insn that uses CC0 after INSN, which is assumed to
3322 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3323 applied to the result of this function should yield INSN).
3325 Normally, this is simply the next insn. However, if a REG_CC_USER note
3326 is present, it contains the insn that uses CC0.
3328 Return 0 if we can't find the insn. */
3331 next_cc0_user (rtx insn)
3333 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3336 return XEXP (note, 0);
3338 insn = next_nonnote_insn (insn);
3339 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3340 insn = XVECEXP (PATTERN (insn), 0, 0);
3342 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3348 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3349 note, it is the previous insn. */
3352 prev_cc0_setter (rtx insn)
3354 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3357 return XEXP (note, 0);
3359 insn = prev_nonnote_insn (insn);
3360 gcc_assert (sets_cc0_p (PATTERN (insn)));
3367 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3370 find_auto_inc (rtx *xp, void *data)
3373 rtx reg = (rtx) data;
3375 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3378 switch (GET_CODE (x))
3386 if (rtx_equal_p (reg, XEXP (x, 0)))
3397 /* Increment the label uses for all labels present in rtx. */
3400 mark_label_nuses (rtx x)
3406 code = GET_CODE (x);
3407 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3408 LABEL_NUSES (XEXP (x, 0))++;
3410 fmt = GET_RTX_FORMAT (code);
3411 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3414 mark_label_nuses (XEXP (x, i));
3415 else if (fmt[i] == 'E')
3416 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3417 mark_label_nuses (XVECEXP (x, i, j));
3422 /* Try splitting insns that can be split for better scheduling.
3423 PAT is the pattern which might split.
3424 TRIAL is the insn providing PAT.
3425 LAST is nonzero if we should return the last insn of the sequence produced.
3427 If this routine succeeds in splitting, it returns the first or last
3428 replacement insn depending on the value of LAST. Otherwise, it
3429 returns TRIAL. If the insn to be returned can be split, it will be. */
3432 try_split (rtx pat, rtx trial, int last)
3434 rtx before = PREV_INSN (trial);
3435 rtx after = NEXT_INSN (trial);
3436 int has_barrier = 0;
3439 rtx insn_last, insn;
3442 /* We're not good at redistributing frame information. */
3443 if (RTX_FRAME_RELATED_P (trial))
3446 if (any_condjump_p (trial)
3447 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3448 split_branch_probability = INTVAL (XEXP (note, 0));
3449 probability = split_branch_probability;
3451 seq = split_insns (pat, trial);
3453 split_branch_probability = -1;
3455 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3456 We may need to handle this specially. */
3457 if (after && BARRIER_P (after))
3460 after = NEXT_INSN (after);
3466 /* Avoid infinite loop if any insn of the result matches
3467 the original pattern. */
3471 if (INSN_P (insn_last)
3472 && rtx_equal_p (PATTERN (insn_last), pat))
3474 if (!NEXT_INSN (insn_last))
3476 insn_last = NEXT_INSN (insn_last);
3479 /* We will be adding the new sequence to the function. The splitters
3480 may have introduced invalid RTL sharing, so unshare the sequence now. */
3481 unshare_all_rtl_in_chain (seq);
3484 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3488 mark_jump_label (PATTERN (insn), insn, 0);
3490 if (probability != -1
3491 && any_condjump_p (insn)
3492 && !find_reg_note (insn, REG_BR_PROB, 0))
3494 /* We can preserve the REG_BR_PROB notes only if exactly
3495 one jump is created, otherwise the machine description
3496 is responsible for this step using
3497 split_branch_probability variable. */
3498 gcc_assert (njumps == 1);
3499 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3504 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3505 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3508 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3511 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3514 *p = CALL_INSN_FUNCTION_USAGE (trial);
3515 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3519 /* Copy notes, particularly those related to the CFG. */
3520 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3522 switch (REG_NOTE_KIND (note))
3525 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3530 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3533 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3537 case REG_NON_LOCAL_GOTO:
3538 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3541 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3547 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3549 rtx reg = XEXP (note, 0);
3550 if (!FIND_REG_INC_NOTE (insn, reg)
3551 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3552 add_reg_note (insn, REG_INC, reg);
3562 /* If there are LABELS inside the split insns increment the
3563 usage count so we don't delete the label. */
3567 while (insn != NULL_RTX)
3569 /* JUMP_P insns have already been "marked" above. */
3570 if (NONJUMP_INSN_P (insn))
3571 mark_label_nuses (PATTERN (insn));
3573 insn = PREV_INSN (insn);
3577 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3579 delete_insn (trial);
3581 emit_barrier_after (tem);
3583 /* Recursively call try_split for each new insn created; by the
3584 time control returns here that insn will be fully split, so
3585 set LAST and continue from the insn after the one returned.
3586 We can't use next_active_insn here since AFTER may be a note.
3587 Ignore deleted insns, which can be occur if not optimizing. */
3588 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3589 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3590 tem = try_split (PATTERN (tem), tem, 1);
3592 /* Return either the first or the last insn, depending on which was
3595 ? (after ? PREV_INSN (after) : last_insn)
3596 : NEXT_INSN (before);
3599 /* Make and return an INSN rtx, initializing all its slots.
3600 Store PATTERN in the pattern slots. */
3603 make_insn_raw (rtx pattern)
3607 insn = rtx_alloc (INSN);
3609 INSN_UID (insn) = cur_insn_uid++;
3610 PATTERN (insn) = pattern;
3611 INSN_CODE (insn) = -1;
3612 REG_NOTES (insn) = NULL;
3613 INSN_LOCATOR (insn) = curr_insn_locator ();
3614 BLOCK_FOR_INSN (insn) = NULL;
3616 #ifdef ENABLE_RTL_CHECKING
3619 && (returnjump_p (insn)
3620 || (GET_CODE (insn) == SET
3621 && SET_DEST (insn) == pc_rtx)))
3623 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3631 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3634 make_debug_insn_raw (rtx pattern)
3638 insn = rtx_alloc (DEBUG_INSN);
3639 INSN_UID (insn) = cur_debug_insn_uid++;
3640 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3641 INSN_UID (insn) = cur_insn_uid++;
3643 PATTERN (insn) = pattern;
3644 INSN_CODE (insn) = -1;
3645 REG_NOTES (insn) = NULL;
3646 INSN_LOCATOR (insn) = curr_insn_locator ();
3647 BLOCK_FOR_INSN (insn) = NULL;
3652 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3655 make_jump_insn_raw (rtx pattern)
3659 insn = rtx_alloc (JUMP_INSN);
3660 INSN_UID (insn) = cur_insn_uid++;
3662 PATTERN (insn) = pattern;
3663 INSN_CODE (insn) = -1;
3664 REG_NOTES (insn) = NULL;
3665 JUMP_LABEL (insn) = NULL;
3666 INSN_LOCATOR (insn) = curr_insn_locator ();
3667 BLOCK_FOR_INSN (insn) = NULL;
3672 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3675 make_call_insn_raw (rtx pattern)
3679 insn = rtx_alloc (CALL_INSN);
3680 INSN_UID (insn) = cur_insn_uid++;
3682 PATTERN (insn) = pattern;
3683 INSN_CODE (insn) = -1;
3684 REG_NOTES (insn) = NULL;
3685 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3686 INSN_LOCATOR (insn) = curr_insn_locator ();
3687 BLOCK_FOR_INSN (insn) = NULL;
3692 /* Add INSN to the end of the doubly-linked list.
3693 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3698 PREV_INSN (insn) = last_insn;
3699 NEXT_INSN (insn) = 0;
3701 if (NULL != last_insn)
3702 NEXT_INSN (last_insn) = insn;
3704 if (NULL == first_insn)
3710 /* Add INSN into the doubly-linked list after insn AFTER. This and
3711 the next should be the only functions called to insert an insn once
3712 delay slots have been filled since only they know how to update a
3716 add_insn_after (rtx insn, rtx after, basic_block bb)
3718 rtx next = NEXT_INSN (after);
3720 gcc_assert (!optimize || !INSN_DELETED_P (after));
3722 NEXT_INSN (insn) = next;
3723 PREV_INSN (insn) = after;
3727 PREV_INSN (next) = insn;
3728 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3729 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3731 else if (last_insn == after)
3735 struct sequence_stack *stack = seq_stack;
3736 /* Scan all pending sequences too. */
3737 for (; stack; stack = stack->next)
3738 if (after == stack->last)
3747 if (!BARRIER_P (after)
3748 && !BARRIER_P (insn)
3749 && (bb = BLOCK_FOR_INSN (after)))
3751 set_block_for_insn (insn, bb);
3753 df_insn_rescan (insn);
3754 /* Should not happen as first in the BB is always
3755 either NOTE or LABEL. */
3756 if (BB_END (bb) == after
3757 /* Avoid clobbering of structure when creating new BB. */
3758 && !BARRIER_P (insn)
3759 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3763 NEXT_INSN (after) = insn;
3764 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3766 rtx sequence = PATTERN (after);
3767 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3771 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3772 the previous should be the only functions called to insert an insn
3773 once delay slots have been filled since only they know how to
3774 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3778 add_insn_before (rtx insn, rtx before, basic_block bb)
3780 rtx prev = PREV_INSN (before);
3782 gcc_assert (!optimize || !INSN_DELETED_P (before));
3784 PREV_INSN (insn) = prev;
3785 NEXT_INSN (insn) = before;
3789 NEXT_INSN (prev) = insn;
3790 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3792 rtx sequence = PATTERN (prev);
3793 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3796 else if (first_insn == before)
3800 struct sequence_stack *stack = seq_stack;
3801 /* Scan all pending sequences too. */
3802 for (; stack; stack = stack->next)
3803 if (before == stack->first)
3805 stack->first = insn;
3813 && !BARRIER_P (before)
3814 && !BARRIER_P (insn))
3815 bb = BLOCK_FOR_INSN (before);
3819 set_block_for_insn (insn, bb);
3821 df_insn_rescan (insn);
3822 /* Should not happen as first in the BB is always either NOTE or
3824 gcc_assert (BB_HEAD (bb) != insn
3825 /* Avoid clobbering of structure when creating new BB. */
3827 || NOTE_INSN_BASIC_BLOCK_P (insn));
3830 PREV_INSN (before) = insn;
3831 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3832 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3836 /* Replace insn with an deleted instruction note. */
3839 set_insn_deleted (rtx insn)
3841 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3842 PUT_CODE (insn, NOTE);
3843 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3847 /* Remove an insn from its doubly-linked list. This function knows how
3848 to handle sequences. */
3850 remove_insn (rtx insn)
3852 rtx next = NEXT_INSN (insn);
3853 rtx prev = PREV_INSN (insn);
3856 /* Later in the code, the block will be marked dirty. */
3857 df_insn_delete (NULL, INSN_UID (insn));
3861 NEXT_INSN (prev) = next;
3862 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3864 rtx sequence = PATTERN (prev);
3865 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3868 else if (first_insn == insn)
3872 struct sequence_stack *stack = seq_stack;
3873 /* Scan all pending sequences too. */
3874 for (; stack; stack = stack->next)
3875 if (insn == stack->first)
3877 stack->first = next;
3886 PREV_INSN (next) = prev;
3887 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3888 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3890 else if (last_insn == insn)
3894 struct sequence_stack *stack = seq_stack;
3895 /* Scan all pending sequences too. */
3896 for (; stack; stack = stack->next)
3897 if (insn == stack->last)
3905 if (!BARRIER_P (insn)
3906 && (bb = BLOCK_FOR_INSN (insn)))
3909 df_set_bb_dirty (bb);
3910 if (BB_HEAD (bb) == insn)
3912 /* Never ever delete the basic block note without deleting whole
3914 gcc_assert (!NOTE_P (insn));
3915 BB_HEAD (bb) = next;
3917 if (BB_END (bb) == insn)
3922 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3925 add_function_usage_to (rtx call_insn, rtx call_fusage)
3927 gcc_assert (call_insn && CALL_P (call_insn));
3929 /* Put the register usage information on the CALL. If there is already
3930 some usage information, put ours at the end. */
3931 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3935 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3936 link = XEXP (link, 1))
3939 XEXP (link, 1) = call_fusage;
3942 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3945 /* Delete all insns made since FROM.
3946 FROM becomes the new last instruction. */
3949 delete_insns_since (rtx from)
3954 NEXT_INSN (from) = 0;
3958 /* This function is deprecated, please use sequences instead.
3960 Move a consecutive bunch of insns to a different place in the chain.
3961 The insns to be moved are those between FROM and TO.
3962 They are moved to a new position after the insn AFTER.
3963 AFTER must not be FROM or TO or any insn in between.
3965 This function does not know about SEQUENCEs and hence should not be
3966 called after delay-slot filling has been done. */
3969 reorder_insns_nobb (rtx from, rtx to, rtx after)
3971 /* Splice this bunch out of where it is now. */
3972 if (PREV_INSN (from))
3973 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3975 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3976 if (last_insn == to)
3977 last_insn = PREV_INSN (from);
3978 if (first_insn == from)
3979 first_insn = NEXT_INSN (to);
3981 /* Make the new neighbors point to it and it to them. */
3982 if (NEXT_INSN (after))
3983 PREV_INSN (NEXT_INSN (after)) = to;
3985 NEXT_INSN (to) = NEXT_INSN (after);
3986 PREV_INSN (from) = after;
3987 NEXT_INSN (after) = from;
3988 if (after == last_insn)
3992 /* Same as function above, but take care to update BB boundaries. */
3994 reorder_insns (rtx from, rtx to, rtx after)
3996 rtx prev = PREV_INSN (from);
3997 basic_block bb, bb2;
3999 reorder_insns_nobb (from, to, after);
4001 if (!BARRIER_P (after)
4002 && (bb = BLOCK_FOR_INSN (after)))
4005 df_set_bb_dirty (bb);
4007 if (!BARRIER_P (from)
4008 && (bb2 = BLOCK_FOR_INSN (from)))
4010 if (BB_END (bb2) == to)
4011 BB_END (bb2) = prev;
4012 df_set_bb_dirty (bb2);
4015 if (BB_END (bb) == after)
4018 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4020 df_insn_change_bb (x, bb);
4025 /* Emit insn(s) of given code and pattern
4026 at a specified place within the doubly-linked list.
4028 All of the emit_foo global entry points accept an object
4029 X which is either an insn list or a PATTERN of a single
4032 There are thus a few canonical ways to generate code and
4033 emit it at a specific place in the instruction stream. For
4034 example, consider the instruction named SPOT and the fact that
4035 we would like to emit some instructions before SPOT. We might
4039 ... emit the new instructions ...
4040 insns_head = get_insns ();
4043 emit_insn_before (insns_head, SPOT);
4045 It used to be common to generate SEQUENCE rtl instead, but that
4046 is a relic of the past which no longer occurs. The reason is that
4047 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4048 generated would almost certainly die right after it was created. */
4050 /* Make X be output before the instruction BEFORE. */
4053 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4058 gcc_assert (before);
4063 switch (GET_CODE (x))
4075 rtx next = NEXT_INSN (insn);
4076 add_insn_before (insn, before, bb);
4082 #ifdef ENABLE_RTL_CHECKING
4089 last = make_insn_raw (x);
4090 add_insn_before (last, before, bb);
4097 /* Make an instruction with body X and code JUMP_INSN
4098 and output it before the instruction BEFORE. */
4101 emit_jump_insn_before_noloc (rtx x, rtx before)
4103 rtx insn, last = NULL_RTX;
4105 gcc_assert (before);
4107 switch (GET_CODE (x))
4119 rtx next = NEXT_INSN (insn);
4120 add_insn_before (insn, before, NULL);
4126 #ifdef ENABLE_RTL_CHECKING
4133 last = make_jump_insn_raw (x);
4134 add_insn_before (last, before, NULL);
4141 /* Make an instruction with body X and code CALL_INSN
4142 and output it before the instruction BEFORE. */
4145 emit_call_insn_before_noloc (rtx x, rtx before)
4147 rtx last = NULL_RTX, insn;
4149 gcc_assert (before);
4151 switch (GET_CODE (x))
4163 rtx next = NEXT_INSN (insn);
4164 add_insn_before (insn, before, NULL);
4170 #ifdef ENABLE_RTL_CHECKING
4177 last = make_call_insn_raw (x);
4178 add_insn_before (last, before, NULL);
4185 /* Make an instruction with body X and code DEBUG_INSN
4186 and output it before the instruction BEFORE. */
4189 emit_debug_insn_before_noloc (rtx x, rtx before)
4191 rtx last = NULL_RTX, insn;
4193 gcc_assert (before);
4195 switch (GET_CODE (x))
4207 rtx next = NEXT_INSN (insn);
4208 add_insn_before (insn, before, NULL);
4214 #ifdef ENABLE_RTL_CHECKING
4221 last = make_debug_insn_raw (x);
4222 add_insn_before (last, before, NULL);
4229 /* Make an insn of code BARRIER
4230 and output it before the insn BEFORE. */
4233 emit_barrier_before (rtx before)
4235 rtx insn = rtx_alloc (BARRIER);
4237 INSN_UID (insn) = cur_insn_uid++;
4239 add_insn_before (insn, before, NULL);
4243 /* Emit the label LABEL before the insn BEFORE. */
4246 emit_label_before (rtx label, rtx before)
4248 /* This can be called twice for the same label as a result of the
4249 confusion that follows a syntax error! So make it harmless. */
4250 if (INSN_UID (label) == 0)
4252 INSN_UID (label) = cur_insn_uid++;
4253 add_insn_before (label, before, NULL);
4259 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4262 emit_note_before (enum insn_note subtype, rtx before)
4264 rtx note = rtx_alloc (NOTE);
4265 INSN_UID (note) = cur_insn_uid++;
4266 NOTE_KIND (note) = subtype;
4267 BLOCK_FOR_INSN (note) = NULL;
4268 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4270 add_insn_before (note, before, NULL);
4274 /* Helper for emit_insn_after, handles lists of instructions
4278 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4282 if (!bb && !BARRIER_P (after))
4283 bb = BLOCK_FOR_INSN (after);
4287 df_set_bb_dirty (bb);
4288 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4289 if (!BARRIER_P (last))
4291 set_block_for_insn (last, bb);
4292 df_insn_rescan (last);
4294 if (!BARRIER_P (last))
4296 set_block_for_insn (last, bb);
4297 df_insn_rescan (last);
4299 if (BB_END (bb) == after)
4303 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4306 after_after = NEXT_INSN (after);
4308 NEXT_INSN (after) = first;
4309 PREV_INSN (first) = after;
4310 NEXT_INSN (last) = after_after;
4312 PREV_INSN (after_after) = last;
4314 if (after == last_insn)
4320 /* Make X be output after the insn AFTER and set the BB of insn. If
4321 BB is NULL, an attempt is made to infer the BB from AFTER. */
4324 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4333 switch (GET_CODE (x))
4342 last = emit_insn_after_1 (x, after, bb);
4345 #ifdef ENABLE_RTL_CHECKING
4352 last = make_insn_raw (x);
4353 add_insn_after (last, after, bb);
4361 /* Make an insn of code JUMP_INSN with body X
4362 and output it after the insn AFTER. */
4365 emit_jump_insn_after_noloc (rtx x, rtx after)
4371 switch (GET_CODE (x))
4380 last = emit_insn_after_1 (x, after, NULL);
4383 #ifdef ENABLE_RTL_CHECKING
4390 last = make_jump_insn_raw (x);
4391 add_insn_after (last, after, NULL);
4398 /* Make an instruction with body X and code CALL_INSN
4399 and output it after the instruction AFTER. */
4402 emit_call_insn_after_noloc (rtx x, rtx after)
4408 switch (GET_CODE (x))
4417 last = emit_insn_after_1 (x, after, NULL);
4420 #ifdef ENABLE_RTL_CHECKING
4427 last = make_call_insn_raw (x);
4428 add_insn_after (last, after, NULL);
4435 /* Make an instruction with body X and code CALL_INSN
4436 and output it after the instruction AFTER. */
4439 emit_debug_insn_after_noloc (rtx x, rtx after)
4445 switch (GET_CODE (x))
4454 last = emit_insn_after_1 (x, after, NULL);
4457 #ifdef ENABLE_RTL_CHECKING
4464 last = make_debug_insn_raw (x);
4465 add_insn_after (last, after, NULL);
4472 /* Make an insn of code BARRIER
4473 and output it after the insn AFTER. */
4476 emit_barrier_after (rtx after)
4478 rtx insn = rtx_alloc (BARRIER);
4480 INSN_UID (insn) = cur_insn_uid++;
4482 add_insn_after (insn, after, NULL);
4486 /* Emit the label LABEL after the insn AFTER. */
4489 emit_label_after (rtx label, rtx after)
4491 /* This can be called twice for the same label
4492 as a result of the confusion that follows a syntax error!
4493 So make it harmless. */
4494 if (INSN_UID (label) == 0)
4496 INSN_UID (label) = cur_insn_uid++;
4497 add_insn_after (label, after, NULL);
4503 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4506 emit_note_after (enum insn_note subtype, rtx after)
4508 rtx note = rtx_alloc (NOTE);
4509 INSN_UID (note) = cur_insn_uid++;
4510 NOTE_KIND (note) = subtype;
4511 BLOCK_FOR_INSN (note) = NULL;
4512 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4513 add_insn_after (note, after, NULL);
4517 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4519 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4521 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4523 if (pattern == NULL_RTX || !loc)
4526 after = NEXT_INSN (after);
4529 if (active_insn_p (after) && !INSN_LOCATOR (after))
4530 INSN_LOCATOR (after) = loc;
4533 after = NEXT_INSN (after);
4538 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4540 emit_insn_after (rtx pattern, rtx after)
4544 while (DEBUG_INSN_P (prev))
4545 prev = PREV_INSN (prev);
4548 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4550 return emit_insn_after_noloc (pattern, after, NULL);
4553 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4555 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4557 rtx last = emit_jump_insn_after_noloc (pattern, after);
4559 if (pattern == NULL_RTX || !loc)
4562 after = NEXT_INSN (after);
4565 if (active_insn_p (after) && !INSN_LOCATOR (after))
4566 INSN_LOCATOR (after) = loc;
4569 after = NEXT_INSN (after);
4574 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4576 emit_jump_insn_after (rtx pattern, rtx after)
4580 while (DEBUG_INSN_P (prev))
4581 prev = PREV_INSN (prev);
4584 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4586 return emit_jump_insn_after_noloc (pattern, after);
4589 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4591 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4593 rtx last = emit_call_insn_after_noloc (pattern, after);
4595 if (pattern == NULL_RTX || !loc)
4598 after = NEXT_INSN (after);
4601 if (active_insn_p (after) && !INSN_LOCATOR (after))
4602 INSN_LOCATOR (after) = loc;
4605 after = NEXT_INSN (after);
4610 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4612 emit_call_insn_after (rtx pattern, rtx after)
4616 while (DEBUG_INSN_P (prev))
4617 prev = PREV_INSN (prev);
4620 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4622 return emit_call_insn_after_noloc (pattern, after);
4625 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4627 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4629 rtx last = emit_debug_insn_after_noloc (pattern, after);
4631 if (pattern == NULL_RTX || !loc)
4634 after = NEXT_INSN (after);
4637 if (active_insn_p (after) && !INSN_LOCATOR (after))
4638 INSN_LOCATOR (after) = loc;
4641 after = NEXT_INSN (after);
4646 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4648 emit_debug_insn_after (rtx pattern, rtx after)
4651 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4653 return emit_debug_insn_after_noloc (pattern, after);
4656 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4658 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4660 rtx first = PREV_INSN (before);
4661 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4663 if (pattern == NULL_RTX || !loc)
4667 first = get_insns ();
4669 first = NEXT_INSN (first);
4672 if (active_insn_p (first) && !INSN_LOCATOR (first))
4673 INSN_LOCATOR (first) = loc;
4676 first = NEXT_INSN (first);
4681 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4683 emit_insn_before (rtx pattern, rtx before)
4687 while (DEBUG_INSN_P (next))
4688 next = PREV_INSN (next);
4691 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4693 return emit_insn_before_noloc (pattern, before, NULL);
4696 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4698 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4700 rtx first = PREV_INSN (before);
4701 rtx last = emit_jump_insn_before_noloc (pattern, before);
4703 if (pattern == NULL_RTX)
4706 first = NEXT_INSN (first);
4709 if (active_insn_p (first) && !INSN_LOCATOR (first))
4710 INSN_LOCATOR (first) = loc;
4713 first = NEXT_INSN (first);
4718 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4720 emit_jump_insn_before (rtx pattern, rtx before)
4724 while (DEBUG_INSN_P (next))
4725 next = PREV_INSN (next);
4728 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4730 return emit_jump_insn_before_noloc (pattern, before);
4733 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4735 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4737 rtx first = PREV_INSN (before);
4738 rtx last = emit_call_insn_before_noloc (pattern, before);
4740 if (pattern == NULL_RTX)
4743 first = NEXT_INSN (first);
4746 if (active_insn_p (first) && !INSN_LOCATOR (first))
4747 INSN_LOCATOR (first) = loc;
4750 first = NEXT_INSN (first);
4755 /* like emit_call_insn_before_noloc,
4756 but set insn_locator according to before. */
4758 emit_call_insn_before (rtx pattern, rtx before)
4762 while (DEBUG_INSN_P (next))
4763 next = PREV_INSN (next);
4766 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4768 return emit_call_insn_before_noloc (pattern, before);
4771 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4773 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4775 rtx first = PREV_INSN (before);
4776 rtx last = emit_debug_insn_before_noloc (pattern, before);
4778 if (pattern == NULL_RTX)
4781 first = NEXT_INSN (first);
4784 if (active_insn_p (first) && !INSN_LOCATOR (first))
4785 INSN_LOCATOR (first) = loc;
4788 first = NEXT_INSN (first);
4793 /* like emit_debug_insn_before_noloc,
4794 but set insn_locator according to before. */
4796 emit_debug_insn_before (rtx pattern, rtx before)
4798 if (INSN_P (before))
4799 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4801 return emit_debug_insn_before_noloc (pattern, before);
4804 /* Take X and emit it at the end of the doubly-linked
4807 Returns the last insn emitted. */
4812 rtx last = last_insn;
4818 switch (GET_CODE (x))
4830 rtx next = NEXT_INSN (insn);
4837 #ifdef ENABLE_RTL_CHECKING
4844 last = make_insn_raw (x);
4852 /* Make an insn of code DEBUG_INSN with pattern X
4853 and add it to the end of the doubly-linked list. */
4856 emit_debug_insn (rtx x)
4858 rtx last = last_insn;
4864 switch (GET_CODE (x))
4876 rtx next = NEXT_INSN (insn);
4883 #ifdef ENABLE_RTL_CHECKING
4890 last = make_debug_insn_raw (x);
4898 /* Make an insn of code JUMP_INSN with pattern X
4899 and add it to the end of the doubly-linked list. */
4902 emit_jump_insn (rtx x)
4904 rtx last = NULL_RTX, insn;
4906 switch (GET_CODE (x))
4918 rtx next = NEXT_INSN (insn);
4925 #ifdef ENABLE_RTL_CHECKING
4932 last = make_jump_insn_raw (x);
4940 /* Make an insn of code CALL_INSN with pattern X
4941 and add it to the end of the doubly-linked list. */
4944 emit_call_insn (rtx x)
4948 switch (GET_CODE (x))
4957 insn = emit_insn (x);
4960 #ifdef ENABLE_RTL_CHECKING
4967 insn = make_call_insn_raw (x);
4975 /* Add the label LABEL to the end of the doubly-linked list. */
4978 emit_label (rtx label)
4980 /* This can be called twice for the same label
4981 as a result of the confusion that follows a syntax error!
4982 So make it harmless. */
4983 if (INSN_UID (label) == 0)
4985 INSN_UID (label) = cur_insn_uid++;
4991 /* Make an insn of code BARRIER
4992 and add it to the end of the doubly-linked list. */
4997 rtx barrier = rtx_alloc (BARRIER);
4998 INSN_UID (barrier) = cur_insn_uid++;
5003 /* Emit a copy of note ORIG. */
5006 emit_note_copy (rtx orig)
5010 note = rtx_alloc (NOTE);
5012 INSN_UID (note) = cur_insn_uid++;
5013 NOTE_DATA (note) = NOTE_DATA (orig);
5014 NOTE_KIND (note) = NOTE_KIND (orig);
5015 BLOCK_FOR_INSN (note) = NULL;
5021 /* Make an insn of code NOTE or type NOTE_NO
5022 and add it to the end of the doubly-linked list. */
5025 emit_note (enum insn_note kind)
5029 note = rtx_alloc (NOTE);
5030 INSN_UID (note) = cur_insn_uid++;
5031 NOTE_KIND (note) = kind;
5032 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
5033 BLOCK_FOR_INSN (note) = NULL;
5038 /* Emit a clobber of lvalue X. */
5041 emit_clobber (rtx x)
5043 /* CONCATs should not appear in the insn stream. */
5044 if (GET_CODE (x) == CONCAT)
5046 emit_clobber (XEXP (x, 0));
5047 return emit_clobber (XEXP (x, 1));
5049 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5052 /* Return a sequence of insns to clobber lvalue X. */
5066 /* Emit a use of rvalue X. */
5071 /* CONCATs should not appear in the insn stream. */
5072 if (GET_CODE (x) == CONCAT)
5074 emit_use (XEXP (x, 0));
5075 return emit_use (XEXP (x, 1));
5077 return emit_insn (gen_rtx_USE (VOIDmode, x));
5080 /* Return a sequence of insns to use rvalue X. */
5094 /* Cause next statement to emit a line note even if the line number
5098 force_next_line_note (void)
5103 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5104 note of this type already exists, remove it first. */
5107 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5109 rtx note = find_reg_note (insn, kind, NULL_RTX);
5115 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5116 has multiple sets (some callers assume single_set
5117 means the insn only has one set, when in fact it
5118 means the insn only has one * useful * set). */
5119 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5125 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5126 It serves no useful purpose and breaks eliminate_regs. */
5127 if (GET_CODE (datum) == ASM_OPERANDS)
5132 XEXP (note, 0) = datum;
5133 df_notes_rescan (insn);
5141 XEXP (note, 0) = datum;
5147 add_reg_note (insn, kind, datum);
5153 df_notes_rescan (insn);
5159 return REG_NOTES (insn);
5162 /* Return an indication of which type of insn should have X as a body.
5163 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5165 static enum rtx_code
5166 classify_insn (rtx x)
5170 if (GET_CODE (x) == CALL)
5172 if (GET_CODE (x) == RETURN)
5174 if (GET_CODE (x) == SET)
5176 if (SET_DEST (x) == pc_rtx)
5178 else if (GET_CODE (SET_SRC (x)) == CALL)
5183 if (GET_CODE (x) == PARALLEL)
5186 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5187 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5189 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5190 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5192 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5193 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5199 /* Emit the rtl pattern X as an appropriate kind of insn.
5200 If X is a label, it is simply added into the insn chain. */
5205 enum rtx_code code = classify_insn (x);
5210 return emit_label (x);
5212 return emit_insn (x);
5215 rtx insn = emit_jump_insn (x);
5216 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5217 return emit_barrier ();
5221 return emit_call_insn (x);
5223 return emit_debug_insn (x);
5229 /* Space for free sequence stack entries. */
5230 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5232 /* Begin emitting insns to a sequence. If this sequence will contain
5233 something that might cause the compiler to pop arguments to function
5234 calls (because those pops have previously been deferred; see
5235 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5236 before calling this function. That will ensure that the deferred
5237 pops are not accidentally emitted in the middle of this sequence. */
5240 start_sequence (void)
5242 struct sequence_stack *tem;
5244 if (free_sequence_stack != NULL)
5246 tem = free_sequence_stack;
5247 free_sequence_stack = tem->next;
5250 tem = GGC_NEW (struct sequence_stack);
5252 tem->next = seq_stack;
5253 tem->first = first_insn;
5254 tem->last = last_insn;
5262 /* Set up the insn chain starting with FIRST as the current sequence,
5263 saving the previously current one. See the documentation for
5264 start_sequence for more information about how to use this function. */
5267 push_to_sequence (rtx first)
5273 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5279 /* Like push_to_sequence, but take the last insn as an argument to avoid
5280 looping through the list. */
5283 push_to_sequence2 (rtx first, rtx last)
5291 /* Set up the outer-level insn chain
5292 as the current sequence, saving the previously current one. */
5295 push_topmost_sequence (void)
5297 struct sequence_stack *stack, *top = NULL;
5301 for (stack = seq_stack; stack; stack = stack->next)
5304 first_insn = top->first;
5305 last_insn = top->last;
5308 /* After emitting to the outer-level insn chain, update the outer-level
5309 insn chain, and restore the previous saved state. */
5312 pop_topmost_sequence (void)
5314 struct sequence_stack *stack, *top = NULL;
5316 for (stack = seq_stack; stack; stack = stack->next)
5319 top->first = first_insn;
5320 top->last = last_insn;
5325 /* After emitting to a sequence, restore previous saved state.
5327 To get the contents of the sequence just made, you must call
5328 `get_insns' *before* calling here.
5330 If the compiler might have deferred popping arguments while
5331 generating this sequence, and this sequence will not be immediately
5332 inserted into the instruction stream, use do_pending_stack_adjust
5333 before calling get_insns. That will ensure that the deferred
5334 pops are inserted into this sequence, and not into some random
5335 location in the instruction stream. See INHIBIT_DEFER_POP for more
5336 information about deferred popping of arguments. */
5341 struct sequence_stack *tem = seq_stack;
5343 first_insn = tem->first;
5344 last_insn = tem->last;
5345 seq_stack = tem->next;
5347 memset (tem, 0, sizeof (*tem));
5348 tem->next = free_sequence_stack;
5349 free_sequence_stack = tem;
5352 /* Return 1 if currently emitting into a sequence. */
5355 in_sequence_p (void)
5357 return seq_stack != 0;
5360 /* Put the various virtual registers into REGNO_REG_RTX. */
5363 init_virtual_regs (void)
5365 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5366 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5367 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5368 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5369 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5373 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5374 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5375 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5376 static int copy_insn_n_scratches;
5378 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5379 copied an ASM_OPERANDS.
5380 In that case, it is the original input-operand vector. */
5381 static rtvec orig_asm_operands_vector;
5383 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5384 copied an ASM_OPERANDS.
5385 In that case, it is the copied input-operand vector. */
5386 static rtvec copy_asm_operands_vector;
5388 /* Likewise for the constraints vector. */
5389 static rtvec orig_asm_constraints_vector;
5390 static rtvec copy_asm_constraints_vector;
5392 /* Recursively create a new copy of an rtx for copy_insn.
5393 This function differs from copy_rtx in that it handles SCRATCHes and
5394 ASM_OPERANDs properly.
5395 Normally, this function is not used directly; use copy_insn as front end.
5396 However, you could first copy an insn pattern with copy_insn and then use
5397 this function afterwards to properly copy any REG_NOTEs containing
5401 copy_insn_1 (rtx orig)
5406 const char *format_ptr;
5411 code = GET_CODE (orig);
5426 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5431 for (i = 0; i < copy_insn_n_scratches; i++)
5432 if (copy_insn_scratch_in[i] == orig)
5433 return copy_insn_scratch_out[i];
5437 if (shared_const_p (orig))
5441 /* A MEM with a constant address is not sharable. The problem is that
5442 the constant address may need to be reloaded. If the mem is shared,
5443 then reloading one copy of this mem will cause all copies to appear
5444 to have been reloaded. */
5450 /* Copy the various flags, fields, and other information. We assume
5451 that all fields need copying, and then clear the fields that should
5452 not be copied. That is the sensible default behavior, and forces
5453 us to explicitly document why we are *not* copying a flag. */
5454 copy = shallow_copy_rtx (orig);
5456 /* We do not copy the USED flag, which is used as a mark bit during
5457 walks over the RTL. */
5458 RTX_FLAG (copy, used) = 0;
5460 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5463 RTX_FLAG (copy, jump) = 0;
5464 RTX_FLAG (copy, call) = 0;
5465 RTX_FLAG (copy, frame_related) = 0;
5468 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5470 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5471 switch (*format_ptr++)
5474 if (XEXP (orig, i) != NULL)
5475 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5480 if (XVEC (orig, i) == orig_asm_constraints_vector)
5481 XVEC (copy, i) = copy_asm_constraints_vector;
5482 else if (XVEC (orig, i) == orig_asm_operands_vector)
5483 XVEC (copy, i) = copy_asm_operands_vector;
5484 else if (XVEC (orig, i) != NULL)
5486 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5487 for (j = 0; j < XVECLEN (copy, i); j++)
5488 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5499 /* These are left unchanged. */
5506 if (code == SCRATCH)
5508 i = copy_insn_n_scratches++;
5509 gcc_assert (i < MAX_RECOG_OPERANDS);
5510 copy_insn_scratch_in[i] = orig;
5511 copy_insn_scratch_out[i] = copy;
5513 else if (code == ASM_OPERANDS)
5515 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5516 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5517 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5518 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5524 /* Create a new copy of an rtx.
5525 This function differs from copy_rtx in that it handles SCRATCHes and
5526 ASM_OPERANDs properly.
5527 INSN doesn't really have to be a full INSN; it could be just the
5530 copy_insn (rtx insn)
5532 copy_insn_n_scratches = 0;
5533 orig_asm_operands_vector = 0;
5534 orig_asm_constraints_vector = 0;
5535 copy_asm_operands_vector = 0;
5536 copy_asm_constraints_vector = 0;
5537 return copy_insn_1 (insn);
5540 /* Initialize data structures and variables in this file
5541 before generating rtl for each function. */
5548 if (MIN_NONDEBUG_INSN_UID)
5549 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5552 cur_debug_insn_uid = 1;
5553 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5554 last_location = UNKNOWN_LOCATION;
5555 first_label_num = label_num;
5558 /* Init the tables that describe all the pseudo regs. */
5560 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5562 crtl->emit.regno_pointer_align
5563 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5566 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5568 /* Put copies of all the hard registers into regno_reg_rtx. */
5569 memcpy (regno_reg_rtx,
5570 static_regno_reg_rtx,
5571 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5573 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5574 init_virtual_regs ();
5576 /* Indicate that the virtual registers and stack locations are
5578 REG_POINTER (stack_pointer_rtx) = 1;
5579 REG_POINTER (frame_pointer_rtx) = 1;
5580 REG_POINTER (hard_frame_pointer_rtx) = 1;
5581 REG_POINTER (arg_pointer_rtx) = 1;
5583 REG_POINTER (virtual_incoming_args_rtx) = 1;
5584 REG_POINTER (virtual_stack_vars_rtx) = 1;
5585 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5586 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5587 REG_POINTER (virtual_cfa_rtx) = 1;
5589 #ifdef STACK_BOUNDARY
5590 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5591 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5592 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5593 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5595 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5596 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5597 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5598 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5599 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5602 #ifdef INIT_EXPANDERS
5607 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5610 gen_const_vector (enum machine_mode mode, int constant)
5615 enum machine_mode inner;
5617 units = GET_MODE_NUNITS (mode);
5618 inner = GET_MODE_INNER (mode);
5620 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5622 v = rtvec_alloc (units);
5624 /* We need to call this function after we set the scalar const_tiny_rtx
5626 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5628 for (i = 0; i < units; ++i)
5629 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5631 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5635 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5636 all elements are zero, and the one vector when all elements are one. */
5638 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5640 enum machine_mode inner = GET_MODE_INNER (mode);
5641 int nunits = GET_MODE_NUNITS (mode);
5645 /* Check to see if all of the elements have the same value. */
5646 x = RTVEC_ELT (v, nunits - 1);
5647 for (i = nunits - 2; i >= 0; i--)
5648 if (RTVEC_ELT (v, i) != x)
5651 /* If the values are all the same, check to see if we can use one of the
5652 standard constant vectors. */
5655 if (x == CONST0_RTX (inner))
5656 return CONST0_RTX (mode);
5657 else if (x == CONST1_RTX (inner))
5658 return CONST1_RTX (mode);
5661 return gen_rtx_raw_CONST_VECTOR (mode, v);
5664 /* Initialise global register information required by all functions. */
5667 init_emit_regs (void)
5671 /* Reset register attributes */
5672 htab_empty (reg_attrs_htab);
5674 /* We need reg_raw_mode, so initialize the modes now. */
5675 init_reg_modes_target ();
5677 /* Assign register numbers to the globally defined register rtx. */
5678 pc_rtx = gen_rtx_PC (VOIDmode);
5679 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5680 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5681 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5682 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5683 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5684 virtual_incoming_args_rtx =
5685 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5686 virtual_stack_vars_rtx =
5687 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5688 virtual_stack_dynamic_rtx =
5689 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5690 virtual_outgoing_args_rtx =
5691 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5692 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5694 /* Initialize RTL for commonly used hard registers. These are
5695 copied into regno_reg_rtx as we begin to compile each function. */
5696 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5697 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5699 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5700 return_address_pointer_rtx
5701 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5704 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5705 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5707 pic_offset_table_rtx = NULL_RTX;
5710 /* Create some permanent unique rtl objects shared between all functions.
5711 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5714 init_emit_once (int line_numbers)
5717 enum machine_mode mode;
5718 enum machine_mode double_mode;
5720 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5722 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5723 const_int_htab_eq, NULL);
5725 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5726 const_double_htab_eq, NULL);
5728 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5729 const_fixed_htab_eq, NULL);
5731 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5732 mem_attrs_htab_eq, NULL);
5733 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5734 reg_attrs_htab_eq, NULL);
5736 no_line_numbers = ! line_numbers;
5738 /* Compute the word and byte modes. */
5740 byte_mode = VOIDmode;
5741 word_mode = VOIDmode;
5742 double_mode = VOIDmode;
5744 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5746 mode = GET_MODE_WIDER_MODE (mode))
5748 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5749 && byte_mode == VOIDmode)
5752 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5753 && word_mode == VOIDmode)
5757 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5759 mode = GET_MODE_WIDER_MODE (mode))
5761 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5762 && double_mode == VOIDmode)
5766 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5768 #ifdef INIT_EXPANDERS
5769 /* This is to initialize {init|mark|free}_machine_status before the first
5770 call to push_function_context_to. This is needed by the Chill front
5771 end which calls push_function_context_to before the first call to
5772 init_function_start. */
5776 /* Create the unique rtx's for certain rtx codes and operand values. */
5778 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5779 tries to use these variables. */
5780 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5781 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5782 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5784 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5785 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5786 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5788 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5790 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5791 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5792 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5797 dconsthalf = dconst1;
5798 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5800 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5802 const REAL_VALUE_TYPE *const r =
5803 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5805 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5807 mode = GET_MODE_WIDER_MODE (mode))
5808 const_tiny_rtx[i][(int) mode] =
5809 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5811 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5813 mode = GET_MODE_WIDER_MODE (mode))
5814 const_tiny_rtx[i][(int) mode] =
5815 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5817 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5819 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5821 mode = GET_MODE_WIDER_MODE (mode))
5822 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5824 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5826 mode = GET_MODE_WIDER_MODE (mode))
5827 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5830 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5832 mode = GET_MODE_WIDER_MODE (mode))
5834 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5835 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5838 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5840 mode = GET_MODE_WIDER_MODE (mode))
5842 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5843 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5846 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5848 mode = GET_MODE_WIDER_MODE (mode))
5850 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5851 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5854 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5856 mode = GET_MODE_WIDER_MODE (mode))
5858 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5859 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5862 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5864 mode = GET_MODE_WIDER_MODE (mode))
5866 FCONST0(mode).data.high = 0;
5867 FCONST0(mode).data.low = 0;
5868 FCONST0(mode).mode = mode;
5869 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5870 FCONST0 (mode), mode);
5873 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5875 mode = GET_MODE_WIDER_MODE (mode))
5877 FCONST0(mode).data.high = 0;
5878 FCONST0(mode).data.low = 0;
5879 FCONST0(mode).mode = mode;
5880 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5881 FCONST0 (mode), mode);
5884 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5886 mode = GET_MODE_WIDER_MODE (mode))
5888 FCONST0(mode).data.high = 0;
5889 FCONST0(mode).data.low = 0;
5890 FCONST0(mode).mode = mode;
5891 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5892 FCONST0 (mode), mode);
5894 /* We store the value 1. */
5895 FCONST1(mode).data.high = 0;
5896 FCONST1(mode).data.low = 0;
5897 FCONST1(mode).mode = mode;
5898 lshift_double (1, 0, GET_MODE_FBIT (mode),
5899 2 * HOST_BITS_PER_WIDE_INT,
5900 &FCONST1(mode).data.low,
5901 &FCONST1(mode).data.high,
5902 SIGNED_FIXED_POINT_MODE_P (mode));
5903 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5904 FCONST1 (mode), mode);
5907 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5909 mode = GET_MODE_WIDER_MODE (mode))
5911 FCONST0(mode).data.high = 0;
5912 FCONST0(mode).data.low = 0;
5913 FCONST0(mode).mode = mode;
5914 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5915 FCONST0 (mode), mode);
5917 /* We store the value 1. */
5918 FCONST1(mode).data.high = 0;
5919 FCONST1(mode).data.low = 0;
5920 FCONST1(mode).mode = mode;
5921 lshift_double (1, 0, GET_MODE_FBIT (mode),
5922 2 * HOST_BITS_PER_WIDE_INT,
5923 &FCONST1(mode).data.low,
5924 &FCONST1(mode).data.high,
5925 SIGNED_FIXED_POINT_MODE_P (mode));
5926 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5927 FCONST1 (mode), mode);
5930 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5932 mode = GET_MODE_WIDER_MODE (mode))
5934 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5937 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5939 mode = GET_MODE_WIDER_MODE (mode))
5941 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5944 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5946 mode = GET_MODE_WIDER_MODE (mode))
5948 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5949 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5952 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5954 mode = GET_MODE_WIDER_MODE (mode))
5956 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5957 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5960 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5961 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5962 const_tiny_rtx[0][i] = const0_rtx;
5964 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5965 if (STORE_FLAG_VALUE == 1)
5966 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5969 /* Produce exact duplicate of insn INSN after AFTER.
5970 Care updating of libcall regions if present. */
5973 emit_copy_of_insn_after (rtx insn, rtx after)
5977 switch (GET_CODE (insn))
5980 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5984 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5988 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5992 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5993 if (CALL_INSN_FUNCTION_USAGE (insn))
5994 CALL_INSN_FUNCTION_USAGE (new_rtx)
5995 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5996 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5997 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5998 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5999 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6000 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6007 /* Update LABEL_NUSES. */
6008 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6010 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
6012 /* If the old insn is frame related, then so is the new one. This is
6013 primarily needed for IA-64 unwind info which marks epilogue insns,
6014 which may be duplicated by the basic block reordering code. */
6015 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6017 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6018 will make them. REG_LABEL_TARGETs are created there too, but are
6019 supposed to be sticky, so we copy them. */
6020 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6021 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6023 if (GET_CODE (link) == EXPR_LIST)
6024 add_reg_note (new_rtx, REG_NOTE_KIND (link),
6025 copy_insn_1 (XEXP (link, 0)));
6027 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6030 INSN_CODE (new_rtx) = INSN_CODE (insn);
6034 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6036 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6038 if (hard_reg_clobbers[mode][regno])
6039 return hard_reg_clobbers[mode][regno];
6041 return (hard_reg_clobbers[mode][regno] =
6042 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6045 #include "gt-emit-rtl.h"