1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
64 /* Commonly used modes. */
66 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
67 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
68 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
69 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
71 /* Datastructures maintained for currently processed function in RTL form. */
73 struct rtl_data x_rtl;
75 /* Indexed by pseudo register number, gives the rtx for that pseudo.
76 Allocated in parallel with regno_pointer_align.
77 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
78 with length attribute nested in top level structures. */
82 /* This is *not* reset after each function. It gives each CODE_LABEL
83 in the entire compilation a unique label number. */
85 static GTY(()) int label_num = 1;
87 /* Nonzero means do not generate NOTEs for source line numbers. */
89 static int no_line_numbers;
91 /* Commonly used rtx's, so that we only need space for one copy.
92 These are initialized once for the entire compilation.
93 All of these are unique; no other rtx-object will be equal to any
96 rtx global_rtl[GR_MAX];
98 /* Commonly used RTL for hard registers. These objects are not necessarily
99 unique, so we allocate them separately from global_rtl. They are
100 initialized once per compilation unit, then copied into regno_reg_rtx
101 at the beginning of each function. */
102 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
104 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
105 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
106 record a copy of const[012]_rtx. */
108 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
112 REAL_VALUE_TYPE dconst0;
113 REAL_VALUE_TYPE dconst1;
114 REAL_VALUE_TYPE dconst2;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconsthalf;
118 /* Record fixed-point constant 0 and 1. */
119 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
120 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 /* A hash table storing all CONST_FIXEDs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
173 htab_t const_fixed_htab;
175 #define first_insn (crtl->emit.x_first_insn)
176 #define last_insn (crtl->emit.x_last_insn)
177 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
178 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
179 #define last_location (crtl->emit.x_last_location)
180 #define first_label_num (crtl->emit.x_first_label_num)
182 static rtx make_call_insn_raw (rtx);
183 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
184 static void set_used_decls (tree);
185 static void mark_label_nuses (rtx);
186 static hashval_t const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx lookup_const_double (rtx);
191 static hashval_t const_fixed_htab_hash (const void *);
192 static int const_fixed_htab_eq (const void *, const void *);
193 static rtx lookup_const_fixed (rtx);
194 static hashval_t mem_attrs_htab_hash (const void *);
195 static int mem_attrs_htab_eq (const void *, const void *);
196 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
197 addr_space_t, enum machine_mode);
198 static hashval_t reg_attrs_htab_hash (const void *);
199 static int reg_attrs_htab_eq (const void *, const void *);
200 static reg_attrs *get_reg_attrs (tree, int);
201 static rtx gen_const_vector (enum machine_mode, int);
202 static void copy_rtx_if_shared_1 (rtx *orig);
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability = -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (const void *x)
213 return (hashval_t) INTVAL ((const_rtx) x);
216 /* Returns nonzero if the value represented by X (which is really a
217 CONST_INT) is the same as that given by Y (which is really a
221 const_int_htab_eq (const void *x, const void *y)
223 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
226 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
228 const_double_htab_hash (const void *x)
230 const_rtx const value = (const_rtx) x;
233 if (GET_MODE (value) == VOIDmode)
234 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
237 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
238 /* MODE is used in the comparison, so it should be in the hash. */
239 h ^= GET_MODE (value);
244 /* Returns nonzero if the value represented by X (really a ...)
245 is the same as that represented by Y (really a ...) */
247 const_double_htab_eq (const void *x, const void *y)
249 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
251 if (GET_MODE (a) != GET_MODE (b))
253 if (GET_MODE (a) == VOIDmode)
254 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
255 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
257 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
258 CONST_DOUBLE_REAL_VALUE (b));
261 /* Returns a hash code for X (which is really a CONST_FIXED). */
264 const_fixed_htab_hash (const void *x)
266 const_rtx const value = (const_rtx) x;
269 h = fixed_hash (CONST_FIXED_VALUE (value));
270 /* MODE is used in the comparison, so it should be in the hash. */
271 h ^= GET_MODE (value);
275 /* Returns nonzero if the value represented by X (really a ...)
276 is the same as that represented by Y (really a ...). */
279 const_fixed_htab_eq (const void *x, const void *y)
281 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
283 if (GET_MODE (a) != GET_MODE (b))
285 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
288 /* Returns a hash code for X (which is a really a mem_attrs *). */
291 mem_attrs_htab_hash (const void *x)
293 const mem_attrs *const p = (const mem_attrs *) x;
295 return (p->alias ^ (p->align * 1000)
296 ^ (p->addrspace * 4000)
297 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
298 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
299 ^ (size_t) iterative_hash_expr (p->expr, 0));
302 /* Returns nonzero if the value represented by X (which is really a
303 mem_attrs *) is the same as that given by Y (which is also really a
307 mem_attrs_htab_eq (const void *x, const void *y)
309 const mem_attrs *const p = (const mem_attrs *) x;
310 const mem_attrs *const q = (const mem_attrs *) y;
312 return (p->alias == q->alias && p->offset == q->offset
313 && p->size == q->size && p->align == q->align
314 && p->addrspace == q->addrspace
315 && (p->expr == q->expr
316 || (p->expr != NULL_TREE && q->expr != NULL_TREE
317 && operand_equal_p (p->expr, q->expr, 0))));
320 /* Allocate a new mem_attrs structure and insert it into the hash table if
321 one identical to it is not already in the table. We are doing this for
325 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
326 unsigned int align, addr_space_t addrspace, enum machine_mode mode)
331 /* If everything is the default, we can just return zero.
332 This must match what the corresponding MEM_* macros return when the
333 field is not present. */
334 if (alias == 0 && expr == 0 && offset == 0 && addrspace == 0
336 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
337 && (STRICT_ALIGNMENT && mode != BLKmode
338 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
343 attrs.offset = offset;
346 attrs.addrspace = addrspace;
348 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
351 *slot = ggc_alloc (sizeof (mem_attrs));
352 memcpy (*slot, &attrs, sizeof (mem_attrs));
355 return (mem_attrs *) *slot;
358 /* Returns a hash code for X (which is a really a reg_attrs *). */
361 reg_attrs_htab_hash (const void *x)
363 const reg_attrs *const p = (const reg_attrs *) x;
365 return ((p->offset * 1000) ^ (long) p->decl);
368 /* Returns nonzero if the value represented by X (which is really a
369 reg_attrs *) is the same as that given by Y (which is also really a
373 reg_attrs_htab_eq (const void *x, const void *y)
375 const reg_attrs *const p = (const reg_attrs *) x;
376 const reg_attrs *const q = (const reg_attrs *) y;
378 return (p->decl == q->decl && p->offset == q->offset);
380 /* Allocate a new reg_attrs structure and insert it into the hash table if
381 one identical to it is not already in the table. We are doing this for
385 get_reg_attrs (tree decl, int offset)
390 /* If everything is the default, we can just return zero. */
391 if (decl == 0 && offset == 0)
395 attrs.offset = offset;
397 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
400 *slot = ggc_alloc (sizeof (reg_attrs));
401 memcpy (*slot, &attrs, sizeof (reg_attrs));
404 return (reg_attrs *) *slot;
409 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
415 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
416 MEM_VOLATILE_P (x) = true;
422 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
423 don't attempt to share with the various global pieces of rtl (such as
424 frame_pointer_rtx). */
427 gen_raw_REG (enum machine_mode mode, int regno)
429 rtx x = gen_rtx_raw_REG (mode, regno);
430 ORIGINAL_REGNO (x) = regno;
434 /* There are some RTL codes that require special attention; the generation
435 functions do the raw handling. If you add to this list, modify
436 special_rtx in gengenrtl.c as well. */
439 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
443 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
444 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
446 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
447 if (const_true_rtx && arg == STORE_FLAG_VALUE)
448 return const_true_rtx;
451 /* Look up the CONST_INT in the hash table. */
452 slot = htab_find_slot_with_hash (const_int_htab, &arg,
453 (hashval_t) arg, INSERT);
455 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
461 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
463 return GEN_INT (trunc_int_for_mode (c, mode));
466 /* CONST_DOUBLEs might be created from pairs of integers, or from
467 REAL_VALUE_TYPEs. Also, their length is known only at run time,
468 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
470 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
471 hash table. If so, return its counterpart; otherwise add it
472 to the hash table and return it. */
474 lookup_const_double (rtx real)
476 void **slot = htab_find_slot (const_double_htab, real, INSERT);
483 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
484 VALUE in mode MODE. */
486 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
488 rtx real = rtx_alloc (CONST_DOUBLE);
489 PUT_MODE (real, mode);
493 return lookup_const_double (real);
496 /* Determine whether FIXED, a CONST_FIXED, already exists in the
497 hash table. If so, return its counterpart; otherwise add it
498 to the hash table and return it. */
501 lookup_const_fixed (rtx fixed)
503 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
510 /* Return a CONST_FIXED rtx for a fixed-point value specified by
511 VALUE in mode MODE. */
514 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
516 rtx fixed = rtx_alloc (CONST_FIXED);
517 PUT_MODE (fixed, mode);
521 return lookup_const_fixed (fixed);
524 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
525 of ints: I0 is the low-order word and I1 is the high-order word.
526 Do not use this routine for non-integer modes; convert to
527 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
530 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
535 /* There are the following cases (note that there are no modes with
536 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
538 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
540 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
541 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
542 from copies of the sign bit, and sign of i0 and i1 are the same), then
543 we return a CONST_INT for i0.
544 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
545 if (mode != VOIDmode)
547 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
548 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
549 /* We can get a 0 for an error mark. */
550 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
551 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
553 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
554 return gen_int_mode (i0, mode);
556 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
559 /* If this integer fits in one word, return a CONST_INT. */
560 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
563 /* We use VOIDmode for integers. */
564 value = rtx_alloc (CONST_DOUBLE);
565 PUT_MODE (value, VOIDmode);
567 CONST_DOUBLE_LOW (value) = i0;
568 CONST_DOUBLE_HIGH (value) = i1;
570 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
571 XWINT (value, i) = 0;
573 return lookup_const_double (value);
577 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
579 /* In case the MD file explicitly references the frame pointer, have
580 all such references point to the same frame pointer. This is
581 used during frame pointer elimination to distinguish the explicit
582 references to these registers from pseudos that happened to be
585 If we have eliminated the frame pointer or arg pointer, we will
586 be using it as a normal register, for example as a spill
587 register. In such cases, we might be accessing it in a mode that
588 is not Pmode and therefore cannot use the pre-allocated rtx.
590 Also don't do this when we are making new REGs in reload, since
591 we don't want to get confused with the real pointers. */
593 if (mode == Pmode && !reload_in_progress)
595 if (regno == FRAME_POINTER_REGNUM
596 && (!reload_completed || frame_pointer_needed))
597 return frame_pointer_rtx;
598 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
599 if (regno == HARD_FRAME_POINTER_REGNUM
600 && (!reload_completed || frame_pointer_needed))
601 return hard_frame_pointer_rtx;
603 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
604 if (regno == ARG_POINTER_REGNUM)
605 return arg_pointer_rtx;
607 #ifdef RETURN_ADDRESS_POINTER_REGNUM
608 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
609 return return_address_pointer_rtx;
611 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
612 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
613 return pic_offset_table_rtx;
614 if (regno == STACK_POINTER_REGNUM)
615 return stack_pointer_rtx;
619 /* If the per-function register table has been set up, try to re-use
620 an existing entry in that table to avoid useless generation of RTL.
622 This code is disabled for now until we can fix the various backends
623 which depend on having non-shared hard registers in some cases. Long
624 term we want to re-enable this code as it can significantly cut down
625 on the amount of useless RTL that gets generated.
627 We'll also need to fix some code that runs after reload that wants to
628 set ORIGINAL_REGNO. */
633 && regno < FIRST_PSEUDO_REGISTER
634 && reg_raw_mode[regno] == mode)
635 return regno_reg_rtx[regno];
638 return gen_raw_REG (mode, regno);
642 gen_rtx_MEM (enum machine_mode mode, rtx addr)
644 rtx rt = gen_rtx_raw_MEM (mode, addr);
646 /* This field is not cleared by the mere allocation of the rtx, so
653 /* Generate a memory referring to non-trapping constant memory. */
656 gen_const_mem (enum machine_mode mode, rtx addr)
658 rtx mem = gen_rtx_MEM (mode, addr);
659 MEM_READONLY_P (mem) = 1;
660 MEM_NOTRAP_P (mem) = 1;
664 /* Generate a MEM referring to fixed portions of the frame, e.g., register
668 gen_frame_mem (enum machine_mode mode, rtx addr)
670 rtx mem = gen_rtx_MEM (mode, addr);
671 MEM_NOTRAP_P (mem) = 1;
672 set_mem_alias_set (mem, get_frame_alias_set ());
676 /* Generate a MEM referring to a temporary use of the stack, not part
677 of the fixed stack frame. For example, something which is pushed
678 by a target splitter. */
680 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
682 rtx mem = gen_rtx_MEM (mode, addr);
683 MEM_NOTRAP_P (mem) = 1;
684 if (!cfun->calls_alloca)
685 set_mem_alias_set (mem, get_frame_alias_set ());
689 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
690 this construct would be valid, and false otherwise. */
693 validate_subreg (enum machine_mode omode, enum machine_mode imode,
694 const_rtx reg, unsigned int offset)
696 unsigned int isize = GET_MODE_SIZE (imode);
697 unsigned int osize = GET_MODE_SIZE (omode);
699 /* All subregs must be aligned. */
700 if (offset % osize != 0)
703 /* The subreg offset cannot be outside the inner object. */
707 /* ??? This should not be here. Temporarily continue to allow word_mode
708 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
709 Generally, backends are doing something sketchy but it'll take time to
711 if (omode == word_mode)
713 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
714 is the culprit here, and not the backends. */
715 else if (osize >= UNITS_PER_WORD && isize >= osize)
717 /* Allow component subregs of complex and vector. Though given the below
718 extraction rules, it's not always clear what that means. */
719 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
720 && GET_MODE_INNER (imode) == omode)
722 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
723 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
724 represent this. It's questionable if this ought to be represented at
725 all -- why can't this all be hidden in post-reload splitters that make
726 arbitrarily mode changes to the registers themselves. */
727 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
729 /* Subregs involving floating point modes are not allowed to
730 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
731 (subreg:SI (reg:DF) 0) isn't. */
732 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
738 /* Paradoxical subregs must have offset zero. */
742 /* This is a normal subreg. Verify that the offset is representable. */
744 /* For hard registers, we already have most of these rules collected in
745 subreg_offset_representable_p. */
746 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
748 unsigned int regno = REGNO (reg);
750 #ifdef CANNOT_CHANGE_MODE_CLASS
751 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
752 && GET_MODE_INNER (imode) == omode)
754 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
758 return subreg_offset_representable_p (regno, imode, offset, omode);
761 /* For pseudo registers, we want most of the same checks. Namely:
762 If the register no larger than a word, the subreg must be lowpart.
763 If the register is larger than a word, the subreg must be the lowpart
764 of a subword. A subreg does *not* perform arbitrary bit extraction.
765 Given that we've already checked mode/offset alignment, we only have
766 to check subword subregs here. */
767 if (osize < UNITS_PER_WORD)
769 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
770 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
771 if (offset % UNITS_PER_WORD != low_off)
778 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
780 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
781 return gen_rtx_raw_SUBREG (mode, reg, offset);
784 /* Generate a SUBREG representing the least-significant part of REG if MODE
785 is smaller than mode of REG, otherwise paradoxical SUBREG. */
788 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
790 enum machine_mode inmode;
792 inmode = GET_MODE (reg);
793 if (inmode == VOIDmode)
795 return gen_rtx_SUBREG (mode, reg,
796 subreg_lowpart_offset (mode, inmode));
800 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
803 gen_rtvec (int n, ...)
811 /* Don't allocate an empty rtvec... */
815 rt_val = rtvec_alloc (n);
817 for (i = 0; i < n; i++)
818 rt_val->elem[i] = va_arg (p, rtx);
825 gen_rtvec_v (int n, rtx *argp)
830 /* Don't allocate an empty rtvec... */
834 rt_val = rtvec_alloc (n);
836 for (i = 0; i < n; i++)
837 rt_val->elem[i] = *argp++;
842 /* Return the number of bytes between the start of an OUTER_MODE
843 in-memory value and the start of an INNER_MODE in-memory value,
844 given that the former is a lowpart of the latter. It may be a
845 paradoxical lowpart, in which case the offset will be negative
846 on big-endian targets. */
849 byte_lowpart_offset (enum machine_mode outer_mode,
850 enum machine_mode inner_mode)
852 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
853 return subreg_lowpart_offset (outer_mode, inner_mode);
855 return -subreg_lowpart_offset (inner_mode, outer_mode);
858 /* Generate a REG rtx for a new pseudo register of mode MODE.
859 This pseudo is assigned the next sequential register number. */
862 gen_reg_rtx (enum machine_mode mode)
865 unsigned int align = GET_MODE_ALIGNMENT (mode);
867 gcc_assert (can_create_pseudo_p ());
869 /* If a virtual register with bigger mode alignment is generated,
870 increase stack alignment estimation because it might be spilled
872 if (SUPPORTS_STACK_ALIGNMENT
873 && crtl->stack_alignment_estimated < align
874 && !crtl->stack_realign_processed)
876 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
877 if (crtl->stack_alignment_estimated < min_align)
878 crtl->stack_alignment_estimated = min_align;
881 if (generating_concat_p
882 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
883 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
885 /* For complex modes, don't make a single pseudo.
886 Instead, make a CONCAT of two pseudos.
887 This allows noncontiguous allocation of the real and imaginary parts,
888 which makes much better code. Besides, allocating DCmode
889 pseudos overstrains reload on some machines like the 386. */
890 rtx realpart, imagpart;
891 enum machine_mode partmode = GET_MODE_INNER (mode);
893 realpart = gen_reg_rtx (partmode);
894 imagpart = gen_reg_rtx (partmode);
895 return gen_rtx_CONCAT (mode, realpart, imagpart);
898 /* Make sure regno_pointer_align, and regno_reg_rtx are large
899 enough to have an element for this pseudo reg number. */
901 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
903 int old_size = crtl->emit.regno_pointer_align_length;
907 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
908 memset (tmp + old_size, 0, old_size);
909 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
911 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
912 memset (new1 + old_size, 0, old_size * sizeof (rtx));
913 regno_reg_rtx = new1;
915 crtl->emit.regno_pointer_align_length = old_size * 2;
918 val = gen_raw_REG (mode, reg_rtx_no);
919 regno_reg_rtx[reg_rtx_no++] = val;
923 /* Update NEW with the same attributes as REG, but with OFFSET added
924 to the REG_OFFSET. */
927 update_reg_offset (rtx new_rtx, rtx reg, int offset)
929 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
930 REG_OFFSET (reg) + offset);
933 /* Generate a register with same attributes as REG, but with OFFSET
934 added to the REG_OFFSET. */
937 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
940 rtx new_rtx = gen_rtx_REG (mode, regno);
942 update_reg_offset (new_rtx, reg, offset);
946 /* Generate a new pseudo-register with the same attributes as REG, but
947 with OFFSET added to the REG_OFFSET. */
950 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
952 rtx new_rtx = gen_reg_rtx (mode);
954 update_reg_offset (new_rtx, reg, offset);
958 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
959 new register is a (possibly paradoxical) lowpart of the old one. */
962 adjust_reg_mode (rtx reg, enum machine_mode mode)
964 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
965 PUT_MODE (reg, mode);
968 /* Copy REG's attributes from X, if X has any attributes. If REG and X
969 have different modes, REG is a (possibly paradoxical) lowpart of X. */
972 set_reg_attrs_from_value (rtx reg, rtx x)
976 /* Hard registers can be reused for multiple purposes within the same
977 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
979 if (HARD_REGISTER_P (reg))
982 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
985 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
987 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
989 mark_reg_pointer (reg, 0);
994 update_reg_offset (reg, x, offset);
996 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1000 /* Generate a REG rtx for a new pseudo register, copying the mode
1001 and attributes from X. */
1004 gen_reg_rtx_and_attrs (rtx x)
1006 rtx reg = gen_reg_rtx (GET_MODE (x));
1007 set_reg_attrs_from_value (reg, x);
1011 /* Set the register attributes for registers contained in PARM_RTX.
1012 Use needed values from memory attributes of MEM. */
1015 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1017 if (REG_P (parm_rtx))
1018 set_reg_attrs_from_value (parm_rtx, mem);
1019 else if (GET_CODE (parm_rtx) == PARALLEL)
1021 /* Check for a NULL entry in the first slot, used to indicate that the
1022 parameter goes both on the stack and in registers. */
1023 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1024 for (; i < XVECLEN (parm_rtx, 0); i++)
1026 rtx x = XVECEXP (parm_rtx, 0, i);
1027 if (REG_P (XEXP (x, 0)))
1028 REG_ATTRS (XEXP (x, 0))
1029 = get_reg_attrs (MEM_EXPR (mem),
1030 INTVAL (XEXP (x, 1)));
1035 /* Set the REG_ATTRS for registers in value X, given that X represents
1039 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1041 if (GET_CODE (x) == SUBREG)
1043 gcc_assert (subreg_lowpart_p (x));
1048 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1050 if (GET_CODE (x) == CONCAT)
1052 if (REG_P (XEXP (x, 0)))
1053 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1054 if (REG_P (XEXP (x, 1)))
1055 REG_ATTRS (XEXP (x, 1))
1056 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1058 if (GET_CODE (x) == PARALLEL)
1062 /* Check for a NULL entry, used to indicate that the parameter goes
1063 both on the stack and in registers. */
1064 if (XEXP (XVECEXP (x, 0, 0), 0))
1069 for (i = start; i < XVECLEN (x, 0); i++)
1071 rtx y = XVECEXP (x, 0, i);
1072 if (REG_P (XEXP (y, 0)))
1073 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1078 /* Assign the RTX X to declaration T. */
1081 set_decl_rtl (tree t, rtx x)
1083 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1085 set_reg_attrs_for_decl_rtl (t, x);
1088 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1089 if the ABI requires the parameter to be passed by reference. */
1092 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1094 DECL_INCOMING_RTL (t) = x;
1095 if (x && !by_reference_p)
1096 set_reg_attrs_for_decl_rtl (t, x);
1099 /* Identify REG (which may be a CONCAT) as a user register. */
1102 mark_user_reg (rtx reg)
1104 if (GET_CODE (reg) == CONCAT)
1106 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1107 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1111 gcc_assert (REG_P (reg));
1112 REG_USERVAR_P (reg) = 1;
1116 /* Identify REG as a probable pointer register and show its alignment
1117 as ALIGN, if nonzero. */
1120 mark_reg_pointer (rtx reg, int align)
1122 if (! REG_POINTER (reg))
1124 REG_POINTER (reg) = 1;
1127 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1129 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1130 /* We can no-longer be sure just how aligned this pointer is. */
1131 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1134 /* Return 1 plus largest pseudo reg number used in the current function. */
1142 /* Return 1 + the largest label number used so far in the current function. */
1145 max_label_num (void)
1150 /* Return first label number used in this function (if any were used). */
1153 get_first_label_num (void)
1155 return first_label_num;
1158 /* If the rtx for label was created during the expansion of a nested
1159 function, then first_label_num won't include this label number.
1160 Fix this now so that array indices work later. */
1163 maybe_set_first_label_num (rtx x)
1165 if (CODE_LABEL_NUMBER (x) < first_label_num)
1166 first_label_num = CODE_LABEL_NUMBER (x);
1169 /* Return a value representing some low-order bits of X, where the number
1170 of low-order bits is given by MODE. Note that no conversion is done
1171 between floating-point and fixed-point values, rather, the bit
1172 representation is returned.
1174 This function handles the cases in common between gen_lowpart, below,
1175 and two variants in cse.c and combine.c. These are the cases that can
1176 be safely handled at all points in the compilation.
1178 If this is not a case we can handle, return 0. */
1181 gen_lowpart_common (enum machine_mode mode, rtx x)
1183 int msize = GET_MODE_SIZE (mode);
1186 enum machine_mode innermode;
1188 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1189 so we have to make one up. Yuk. */
1190 innermode = GET_MODE (x);
1192 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1193 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1194 else if (innermode == VOIDmode)
1195 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1197 xsize = GET_MODE_SIZE (innermode);
1199 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1201 if (innermode == mode)
1204 /* MODE must occupy no more words than the mode of X. */
1205 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1206 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1209 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1210 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1213 offset = subreg_lowpart_offset (mode, innermode);
1215 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1216 && (GET_MODE_CLASS (mode) == MODE_INT
1217 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1219 /* If we are getting the low-order part of something that has been
1220 sign- or zero-extended, we can either just use the object being
1221 extended or make a narrower extension. If we want an even smaller
1222 piece than the size of the object being extended, call ourselves
1225 This case is used mostly by combine and cse. */
1227 if (GET_MODE (XEXP (x, 0)) == mode)
1229 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1230 return gen_lowpart_common (mode, XEXP (x, 0));
1231 else if (msize < xsize)
1232 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1234 else if (GET_CODE (x) == SUBREG || REG_P (x)
1235 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1236 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1237 return simplify_gen_subreg (mode, x, innermode, offset);
1239 /* Otherwise, we can't do this. */
1244 gen_highpart (enum machine_mode mode, rtx x)
1246 unsigned int msize = GET_MODE_SIZE (mode);
1249 /* This case loses if X is a subreg. To catch bugs early,
1250 complain if an invalid MODE is used even in other cases. */
1251 gcc_assert (msize <= UNITS_PER_WORD
1252 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1254 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1255 subreg_highpart_offset (mode, GET_MODE (x)));
1256 gcc_assert (result);
1258 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1259 the target if we have a MEM. gen_highpart must return a valid operand,
1260 emitting code if necessary to do so. */
1263 result = validize_mem (result);
1264 gcc_assert (result);
1270 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1271 be VOIDmode constant. */
1273 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1275 if (GET_MODE (exp) != VOIDmode)
1277 gcc_assert (GET_MODE (exp) == innermode);
1278 return gen_highpart (outermode, exp);
1280 return simplify_gen_subreg (outermode, exp, innermode,
1281 subreg_highpart_offset (outermode, innermode));
1284 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1287 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1289 unsigned int offset = 0;
1290 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1294 if (WORDS_BIG_ENDIAN)
1295 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1296 if (BYTES_BIG_ENDIAN)
1297 offset += difference % UNITS_PER_WORD;
1303 /* Return offset in bytes to get OUTERMODE high part
1304 of the value in mode INNERMODE stored in memory in target format. */
1306 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1308 unsigned int offset = 0;
1309 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1311 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1315 if (! WORDS_BIG_ENDIAN)
1316 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1317 if (! BYTES_BIG_ENDIAN)
1318 offset += difference % UNITS_PER_WORD;
1324 /* Return 1 iff X, assumed to be a SUBREG,
1325 refers to the least significant part of its containing reg.
1326 If X is not a SUBREG, always return 1 (it is its own low part!). */
1329 subreg_lowpart_p (const_rtx x)
1331 if (GET_CODE (x) != SUBREG)
1333 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1336 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1337 == SUBREG_BYTE (x));
1340 /* Return subword OFFSET of operand OP.
1341 The word number, OFFSET, is interpreted as the word number starting
1342 at the low-order address. OFFSET 0 is the low-order word if not
1343 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1345 If we cannot extract the required word, we return zero. Otherwise,
1346 an rtx corresponding to the requested word will be returned.
1348 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1349 reload has completed, a valid address will always be returned. After
1350 reload, if a valid address cannot be returned, we return zero.
1352 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1353 it is the responsibility of the caller.
1355 MODE is the mode of OP in case it is a CONST_INT.
1357 ??? This is still rather broken for some cases. The problem for the
1358 moment is that all callers of this thing provide no 'goal mode' to
1359 tell us to work with. This exists because all callers were written
1360 in a word based SUBREG world.
1361 Now use of this function can be deprecated by simplify_subreg in most
1366 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1368 if (mode == VOIDmode)
1369 mode = GET_MODE (op);
1371 gcc_assert (mode != VOIDmode);
1373 /* If OP is narrower than a word, fail. */
1375 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1378 /* If we want a word outside OP, return zero. */
1380 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1383 /* Form a new MEM at the requested address. */
1386 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1388 if (! validate_address)
1391 else if (reload_completed)
1393 if (! strict_memory_address_addr_space_p (word_mode,
1395 MEM_ADDR_SPACE (op)))
1399 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1402 /* Rest can be handled by simplify_subreg. */
1403 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1406 /* Similar to `operand_subword', but never return 0. If we can't
1407 extract the required subword, put OP into a register and try again.
1408 The second attempt must succeed. We always validate the address in
1411 MODE is the mode of OP, in case it is CONST_INT. */
1414 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1416 rtx result = operand_subword (op, offset, 1, mode);
1421 if (mode != BLKmode && mode != VOIDmode)
1423 /* If this is a register which can not be accessed by words, copy it
1424 to a pseudo register. */
1426 op = copy_to_reg (op);
1428 op = force_reg (mode, op);
1431 result = operand_subword (op, offset, 1, mode);
1432 gcc_assert (result);
1437 /* Returns 1 if both MEM_EXPR can be considered equal
1441 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1446 if (! expr1 || ! expr2)
1449 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1452 return operand_equal_p (expr1, expr2, 0);
1455 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1456 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1460 get_mem_align_offset (rtx mem, unsigned int align)
1463 unsigned HOST_WIDE_INT offset;
1465 /* This function can't use
1466 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1467 || !CONST_INT_P (MEM_OFFSET (mem))
1468 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1472 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1474 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1475 for <variable>. get_inner_reference doesn't handle it and
1476 even if it did, the alignment in that case needs to be determined
1477 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1478 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1479 isn't sufficiently aligned, the object it is in might be. */
1480 gcc_assert (MEM_P (mem));
1481 expr = MEM_EXPR (mem);
1482 if (expr == NULL_TREE
1483 || MEM_OFFSET (mem) == NULL_RTX
1484 || !CONST_INT_P (MEM_OFFSET (mem)))
1487 offset = INTVAL (MEM_OFFSET (mem));
1490 if (DECL_ALIGN (expr) < align)
1493 else if (INDIRECT_REF_P (expr))
1495 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1498 else if (TREE_CODE (expr) == COMPONENT_REF)
1502 tree inner = TREE_OPERAND (expr, 0);
1503 tree field = TREE_OPERAND (expr, 1);
1504 tree byte_offset = component_ref_field_offset (expr);
1505 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1508 || !host_integerp (byte_offset, 1)
1509 || !host_integerp (bit_offset, 1))
1512 offset += tree_low_cst (byte_offset, 1);
1513 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1515 if (inner == NULL_TREE)
1517 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1518 < (unsigned int) align)
1522 else if (DECL_P (inner))
1524 if (DECL_ALIGN (inner) < align)
1528 else if (TREE_CODE (inner) != COMPONENT_REF)
1536 return offset & ((align / BITS_PER_UNIT) - 1);
1539 /* Given REF (a MEM) and T, either the type of X or the expression
1540 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1541 if we are making a new object of this type. BITPOS is nonzero if
1542 there is an offset outstanding on T that will be applied later. */
1545 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1546 HOST_WIDE_INT bitpos)
1548 alias_set_type alias = MEM_ALIAS_SET (ref);
1549 tree expr = MEM_EXPR (ref);
1550 rtx offset = MEM_OFFSET (ref);
1551 rtx size = MEM_SIZE (ref);
1552 unsigned int align = MEM_ALIGN (ref);
1553 HOST_WIDE_INT apply_bitpos = 0;
1556 /* It can happen that type_for_mode was given a mode for which there
1557 is no language-level type. In which case it returns NULL, which
1562 type = TYPE_P (t) ? t : TREE_TYPE (t);
1563 if (type == error_mark_node)
1566 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1567 wrong answer, as it assumes that DECL_RTL already has the right alias
1568 info. Callers should not set DECL_RTL until after the call to
1569 set_mem_attributes. */
1570 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1572 /* Get the alias set from the expression or type (perhaps using a
1573 front-end routine) and use it. */
1574 alias = get_alias_set (t);
1576 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1577 MEM_IN_STRUCT_P (ref)
1578 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1579 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1581 /* If we are making an object of this type, or if this is a DECL, we know
1582 that it is a scalar if the type is not an aggregate. */
1583 if ((objectp || DECL_P (t))
1584 && ! AGGREGATE_TYPE_P (type)
1585 && TREE_CODE (type) != COMPLEX_TYPE)
1586 MEM_SCALAR_P (ref) = 1;
1588 /* We can set the alignment from the type if we are making an object,
1589 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1590 if (objectp || TREE_CODE (t) == INDIRECT_REF
1591 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1592 || TYPE_ALIGN_OK (type))
1593 align = MAX (align, TYPE_ALIGN (type));
1595 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1597 if (integer_zerop (TREE_OPERAND (t, 1)))
1598 /* We don't know anything about the alignment. */
1599 align = BITS_PER_UNIT;
1601 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1604 /* If the size is known, we can set that. */
1605 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1606 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1608 /* If T is not a type, we may be able to deduce some more information about
1613 bool align_computed = false;
1615 if (TREE_THIS_VOLATILE (t))
1616 MEM_VOLATILE_P (ref) = 1;
1618 /* Now remove any conversions: they don't change what the underlying
1619 object is. Likewise for SAVE_EXPR. */
1620 while (CONVERT_EXPR_P (t)
1621 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1622 || TREE_CODE (t) == SAVE_EXPR)
1623 t = TREE_OPERAND (t, 0);
1625 /* We may look through structure-like accesses for the purposes of
1626 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1628 while (TREE_CODE (base) == COMPONENT_REF
1629 || TREE_CODE (base) == REALPART_EXPR
1630 || TREE_CODE (base) == IMAGPART_EXPR
1631 || TREE_CODE (base) == BIT_FIELD_REF)
1632 base = TREE_OPERAND (base, 0);
1636 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1637 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1639 MEM_NOTRAP_P (ref) = 1;
1642 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1644 base = get_base_address (base);
1645 if (base && DECL_P (base)
1646 && TREE_READONLY (base)
1647 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1649 tree base_type = TREE_TYPE (base);
1650 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1651 || DECL_ARTIFICIAL (base));
1652 MEM_READONLY_P (ref) = 1;
1655 /* If this expression uses it's parent's alias set, mark it such
1656 that we won't change it. */
1657 if (component_uses_parent_alias_set (t))
1658 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1660 /* If this is a decl, set the attributes of the MEM from it. */
1664 offset = const0_rtx;
1665 apply_bitpos = bitpos;
1666 size = (DECL_SIZE_UNIT (t)
1667 && host_integerp (DECL_SIZE_UNIT (t), 1)
1668 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1669 align = DECL_ALIGN (t);
1670 align_computed = true;
1673 /* If this is a constant, we know the alignment. */
1674 else if (CONSTANT_CLASS_P (t))
1676 align = TYPE_ALIGN (type);
1677 #ifdef CONSTANT_ALIGNMENT
1678 align = CONSTANT_ALIGNMENT (t, align);
1680 align_computed = true;
1683 /* If this is a field reference and not a bit-field, record it. */
1684 /* ??? There is some information that can be gleaned from bit-fields,
1685 such as the word offset in the structure that might be modified.
1686 But skip it for now. */
1687 else if (TREE_CODE (t) == COMPONENT_REF
1688 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1691 offset = const0_rtx;
1692 apply_bitpos = bitpos;
1693 /* ??? Any reason the field size would be different than
1694 the size we got from the type? */
1697 /* If this is an array reference, look for an outer field reference. */
1698 else if (TREE_CODE (t) == ARRAY_REF)
1700 tree off_tree = size_zero_node;
1701 /* We can't modify t, because we use it at the end of the
1707 tree index = TREE_OPERAND (t2, 1);
1708 tree low_bound = array_ref_low_bound (t2);
1709 tree unit_size = array_ref_element_size (t2);
1711 /* We assume all arrays have sizes that are a multiple of a byte.
1712 First subtract the lower bound, if any, in the type of the
1713 index, then convert to sizetype and multiply by the size of
1714 the array element. */
1715 if (! integer_zerop (low_bound))
1716 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1719 off_tree = size_binop (PLUS_EXPR,
1720 size_binop (MULT_EXPR,
1721 fold_convert (sizetype,
1725 t2 = TREE_OPERAND (t2, 0);
1727 while (TREE_CODE (t2) == ARRAY_REF);
1733 if (host_integerp (off_tree, 1))
1735 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1736 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1737 align = DECL_ALIGN (t2);
1738 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1740 align_computed = true;
1741 offset = GEN_INT (ioff);
1742 apply_bitpos = bitpos;
1745 else if (TREE_CODE (t2) == COMPONENT_REF)
1749 if (host_integerp (off_tree, 1))
1751 offset = GEN_INT (tree_low_cst (off_tree, 1));
1752 apply_bitpos = bitpos;
1754 /* ??? Any reason the field size would be different than
1755 the size we got from the type? */
1757 else if (flag_argument_noalias > 1
1758 && (INDIRECT_REF_P (t2))
1759 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1766 /* If this is a Fortran indirect argument reference, record the
1768 else if (flag_argument_noalias > 1
1769 && (INDIRECT_REF_P (t))
1770 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1776 if (!align_computed && !INDIRECT_REF_P (t))
1778 unsigned int obj_align
1779 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1780 align = MAX (align, obj_align);
1784 /* If we modified OFFSET based on T, then subtract the outstanding
1785 bit position offset. Similarly, increase the size of the accessed
1786 object to contain the negative offset. */
1789 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1791 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1794 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1796 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1797 we're overlapping. */
1802 /* Now set the attributes we computed above. */
1804 = get_mem_attrs (alias, expr, offset, size, align,
1805 TYPE_ADDR_SPACE (type), GET_MODE (ref));
1807 /* If this is already known to be a scalar or aggregate, we are done. */
1808 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1811 /* If it is a reference into an aggregate, this is part of an aggregate.
1812 Otherwise we don't know. */
1813 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1814 || TREE_CODE (t) == ARRAY_RANGE_REF
1815 || TREE_CODE (t) == BIT_FIELD_REF)
1816 MEM_IN_STRUCT_P (ref) = 1;
1820 set_mem_attributes (rtx ref, tree t, int objectp)
1822 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1825 /* Set the alias set of MEM to SET. */
1828 set_mem_alias_set (rtx mem, alias_set_type set)
1830 #ifdef ENABLE_CHECKING
1831 /* If the new and old alias sets don't conflict, something is wrong. */
1832 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1835 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1836 MEM_SIZE (mem), MEM_ALIGN (mem),
1837 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1840 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1843 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1845 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1846 MEM_OFFSET (mem), MEM_SIZE (mem),
1847 MEM_ALIGN (mem), addrspace, GET_MODE (mem));
1850 /* Set the alignment of MEM to ALIGN bits. */
1853 set_mem_align (rtx mem, unsigned int align)
1855 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1856 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1857 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1860 /* Set the expr for MEM to EXPR. */
1863 set_mem_expr (rtx mem, tree expr)
1866 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1867 MEM_SIZE (mem), MEM_ALIGN (mem),
1868 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1871 /* Set the offset of MEM to OFFSET. */
1874 set_mem_offset (rtx mem, rtx offset)
1876 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1877 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1878 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1881 /* Set the size of MEM to SIZE. */
1884 set_mem_size (rtx mem, rtx size)
1886 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1887 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1888 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1891 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1892 and its address changed to ADDR. (VOIDmode means don't change the mode.
1893 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1894 returned memory location is required to be valid. The memory
1895 attributes are not changed. */
1898 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1903 gcc_assert (MEM_P (memref));
1904 as = MEM_ADDR_SPACE (memref);
1905 if (mode == VOIDmode)
1906 mode = GET_MODE (memref);
1908 addr = XEXP (memref, 0);
1909 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1910 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1915 if (reload_in_progress || reload_completed)
1916 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1918 addr = memory_address_addr_space (mode, addr, as);
1921 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1924 new_rtx = gen_rtx_MEM (mode, addr);
1925 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1929 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1930 way we are changing MEMREF, so we only preserve the alias set. */
1933 change_address (rtx memref, enum machine_mode mode, rtx addr)
1935 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1936 enum machine_mode mmode = GET_MODE (new_rtx);
1939 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1940 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1942 /* If there are no changes, just return the original memory reference. */
1943 if (new_rtx == memref)
1945 if (MEM_ATTRS (memref) == 0
1946 || (MEM_EXPR (memref) == NULL
1947 && MEM_OFFSET (memref) == NULL
1948 && MEM_SIZE (memref) == size
1949 && MEM_ALIGN (memref) == align))
1952 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1953 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1957 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align,
1958 MEM_ADDR_SPACE (memref), mmode);
1963 /* Return a memory reference like MEMREF, but with its mode changed
1964 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1965 nonzero, the memory address is forced to be valid.
1966 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1967 and caller is responsible for adjusting MEMREF base register. */
1970 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1971 int validate, int adjust)
1973 rtx addr = XEXP (memref, 0);
1975 rtx memoffset = MEM_OFFSET (memref);
1977 unsigned int memalign = MEM_ALIGN (memref);
1978 addr_space_t as = MEM_ADDR_SPACE (memref);
1979 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
1982 /* If there are no changes, just return the original memory reference. */
1983 if (mode == GET_MODE (memref) && !offset
1984 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1987 /* ??? Prefer to create garbage instead of creating shared rtl.
1988 This may happen even if offset is nonzero -- consider
1989 (plus (plus reg reg) const_int) -- so do this always. */
1990 addr = copy_rtx (addr);
1992 /* Convert a possibly large offset to a signed value within the
1993 range of the target address space. */
1994 pbits = GET_MODE_BITSIZE (address_mode);
1995 if (HOST_BITS_PER_WIDE_INT > pbits)
1997 int shift = HOST_BITS_PER_WIDE_INT - pbits;
1998 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2004 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2005 object, we can merge it into the LO_SUM. */
2006 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2008 && (unsigned HOST_WIDE_INT) offset
2009 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2010 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2011 plus_constant (XEXP (addr, 1), offset));
2013 addr = plus_constant (addr, offset);
2016 new_rtx = change_address_1 (memref, mode, addr, validate);
2018 /* If the address is a REG, change_address_1 rightfully returns memref,
2019 but this would destroy memref's MEM_ATTRS. */
2020 if (new_rtx == memref && offset != 0)
2021 new_rtx = copy_rtx (new_rtx);
2023 /* Compute the new values of the memory attributes due to this adjustment.
2024 We add the offsets and update the alignment. */
2026 memoffset = GEN_INT (offset + INTVAL (memoffset));
2028 /* Compute the new alignment by taking the MIN of the alignment and the
2029 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2034 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2036 /* We can compute the size in a number of ways. */
2037 if (GET_MODE (new_rtx) != BLKmode)
2038 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2039 else if (MEM_SIZE (memref))
2040 size = plus_constant (MEM_SIZE (memref), -offset);
2042 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2043 memoffset, size, memalign, as,
2044 GET_MODE (new_rtx));
2046 /* At some point, we should validate that this offset is within the object,
2047 if all the appropriate values are known. */
2051 /* Return a memory reference like MEMREF, but with its mode changed
2052 to MODE and its address changed to ADDR, which is assumed to be
2053 MEMREF offset by OFFSET bytes. If VALIDATE is
2054 nonzero, the memory address is forced to be valid. */
2057 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2058 HOST_WIDE_INT offset, int validate)
2060 memref = change_address_1 (memref, VOIDmode, addr, validate);
2061 return adjust_address_1 (memref, mode, offset, validate, 0);
2064 /* Return a memory reference like MEMREF, but whose address is changed by
2065 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2066 known to be in OFFSET (possibly 1). */
2069 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2071 rtx new_rtx, addr = XEXP (memref, 0);
2072 addr_space_t as = MEM_ADDR_SPACE (memref);
2073 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2075 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2077 /* At this point we don't know _why_ the address is invalid. It
2078 could have secondary memory references, multiplies or anything.
2080 However, if we did go and rearrange things, we can wind up not
2081 being able to recognize the magic around pic_offset_table_rtx.
2082 This stuff is fragile, and is yet another example of why it is
2083 bad to expose PIC machinery too early. */
2084 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx, as)
2085 && GET_CODE (addr) == PLUS
2086 && XEXP (addr, 0) == pic_offset_table_rtx)
2088 addr = force_reg (GET_MODE (addr), addr);
2089 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2092 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2093 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2095 /* If there are no changes, just return the original memory reference. */
2096 if (new_rtx == memref)
2099 /* Update the alignment to reflect the offset. Reset the offset, which
2102 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2103 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2104 as, GET_MODE (new_rtx));
2108 /* Return a memory reference like MEMREF, but with its address changed to
2109 ADDR. The caller is asserting that the actual piece of memory pointed
2110 to is the same, just the form of the address is being changed, such as
2111 by putting something into a register. */
2114 replace_equiv_address (rtx memref, rtx addr)
2116 /* change_address_1 copies the memory attribute structure without change
2117 and that's exactly what we want here. */
2118 update_temp_slot_address (XEXP (memref, 0), addr);
2119 return change_address_1 (memref, VOIDmode, addr, 1);
2122 /* Likewise, but the reference is not required to be valid. */
2125 replace_equiv_address_nv (rtx memref, rtx addr)
2127 return change_address_1 (memref, VOIDmode, addr, 0);
2130 /* Return a memory reference like MEMREF, but with its mode widened to
2131 MODE and offset by OFFSET. This would be used by targets that e.g.
2132 cannot issue QImode memory operations and have to use SImode memory
2133 operations plus masking logic. */
2136 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2138 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2139 tree expr = MEM_EXPR (new_rtx);
2140 rtx memoffset = MEM_OFFSET (new_rtx);
2141 unsigned int size = GET_MODE_SIZE (mode);
2143 /* If there are no changes, just return the original memory reference. */
2144 if (new_rtx == memref)
2147 /* If we don't know what offset we were at within the expression, then
2148 we can't know if we've overstepped the bounds. */
2154 if (TREE_CODE (expr) == COMPONENT_REF)
2156 tree field = TREE_OPERAND (expr, 1);
2157 tree offset = component_ref_field_offset (expr);
2159 if (! DECL_SIZE_UNIT (field))
2165 /* Is the field at least as large as the access? If so, ok,
2166 otherwise strip back to the containing structure. */
2167 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2168 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2169 && INTVAL (memoffset) >= 0)
2172 if (! host_integerp (offset, 1))
2178 expr = TREE_OPERAND (expr, 0);
2180 = (GEN_INT (INTVAL (memoffset)
2181 + tree_low_cst (offset, 1)
2182 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2185 /* Similarly for the decl. */
2186 else if (DECL_P (expr)
2187 && DECL_SIZE_UNIT (expr)
2188 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2189 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2190 && (! memoffset || INTVAL (memoffset) >= 0))
2194 /* The widened memory access overflows the expression, which means
2195 that it could alias another expression. Zap it. */
2202 memoffset = NULL_RTX;
2204 /* The widened memory may alias other stuff, so zap the alias set. */
2205 /* ??? Maybe use get_alias_set on any remaining expression. */
2207 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2208 MEM_ALIGN (new_rtx),
2209 MEM_ADDR_SPACE (new_rtx), mode);
2214 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2215 static GTY(()) tree spill_slot_decl;
2218 get_spill_slot_decl (bool force_build_p)
2220 tree d = spill_slot_decl;
2223 if (d || !force_build_p)
2226 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2227 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2228 DECL_ARTIFICIAL (d) = 1;
2229 DECL_IGNORED_P (d) = 1;
2231 TREE_THIS_NOTRAP (d) = 1;
2232 spill_slot_decl = d;
2234 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2235 MEM_NOTRAP_P (rd) = 1;
2236 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2237 NULL_RTX, 0, ADDR_SPACE_GENERIC, BLKmode);
2238 SET_DECL_RTL (d, rd);
2243 /* Given MEM, a result from assign_stack_local, fill in the memory
2244 attributes as appropriate for a register allocator spill slot.
2245 These slots are not aliasable by other memory. We arrange for
2246 them all to use a single MEM_EXPR, so that the aliasing code can
2247 work properly in the case of shared spill slots. */
2250 set_mem_attrs_for_spill (rtx mem)
2252 alias_set_type alias;
2256 expr = get_spill_slot_decl (true);
2257 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2259 /* We expect the incoming memory to be of the form:
2260 (mem:MODE (plus (reg sfp) (const_int offset)))
2261 with perhaps the plus missing for offset = 0. */
2262 addr = XEXP (mem, 0);
2263 offset = const0_rtx;
2264 if (GET_CODE (addr) == PLUS
2265 && CONST_INT_P (XEXP (addr, 1)))
2266 offset = XEXP (addr, 1);
2268 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2269 MEM_SIZE (mem), MEM_ALIGN (mem),
2270 ADDR_SPACE_GENERIC, GET_MODE (mem));
2271 MEM_NOTRAP_P (mem) = 1;
2274 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2277 gen_label_rtx (void)
2279 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2280 NULL, label_num++, NULL);
2283 /* For procedure integration. */
2285 /* Install new pointers to the first and last insns in the chain.
2286 Also, set cur_insn_uid to one higher than the last in use.
2287 Used for an inline-procedure after copying the insn chain. */
2290 set_new_first_and_last_insn (rtx first, rtx last)
2298 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2300 int debug_count = 0;
2302 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2303 cur_debug_insn_uid = 0;
2305 for (insn = first; insn; insn = NEXT_INSN (insn))
2306 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2307 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2310 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2311 if (DEBUG_INSN_P (insn))
2316 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2318 cur_debug_insn_uid++;
2321 for (insn = first; insn; insn = NEXT_INSN (insn))
2322 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2327 /* Go through all the RTL insn bodies and copy any invalid shared
2328 structure. This routine should only be called once. */
2331 unshare_all_rtl_1 (rtx insn)
2333 /* Unshare just about everything else. */
2334 unshare_all_rtl_in_chain (insn);
2336 /* Make sure the addresses of stack slots found outside the insn chain
2337 (such as, in DECL_RTL of a variable) are not shared
2338 with the insn chain.
2340 This special care is necessary when the stack slot MEM does not
2341 actually appear in the insn chain. If it does appear, its address
2342 is unshared from all else at that point. */
2343 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2346 /* Go through all the RTL insn bodies and copy any invalid shared
2347 structure, again. This is a fairly expensive thing to do so it
2348 should be done sparingly. */
2351 unshare_all_rtl_again (rtx insn)
2356 for (p = insn; p; p = NEXT_INSN (p))
2359 reset_used_flags (PATTERN (p));
2360 reset_used_flags (REG_NOTES (p));
2363 /* Make sure that virtual stack slots are not shared. */
2364 set_used_decls (DECL_INITIAL (cfun->decl));
2366 /* Make sure that virtual parameters are not shared. */
2367 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2368 set_used_flags (DECL_RTL (decl));
2370 reset_used_flags (stack_slot_list);
2372 unshare_all_rtl_1 (insn);
2376 unshare_all_rtl (void)
2378 unshare_all_rtl_1 (get_insns ());
2382 struct rtl_opt_pass pass_unshare_all_rtl =
2386 "unshare", /* name */
2388 unshare_all_rtl, /* execute */
2391 0, /* static_pass_number */
2392 TV_NONE, /* tv_id */
2393 0, /* properties_required */
2394 0, /* properties_provided */
2395 0, /* properties_destroyed */
2396 0, /* todo_flags_start */
2397 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2402 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2403 Recursively does the same for subexpressions. */
2406 verify_rtx_sharing (rtx orig, rtx insn)
2411 const char *format_ptr;
2416 code = GET_CODE (x);
2418 /* These types may be freely shared. */
2436 /* SCRATCH must be shared because they represent distinct values. */
2438 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2443 if (shared_const_p (orig))
2448 /* A MEM is allowed to be shared if its address is constant. */
2449 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2450 || reload_completed || reload_in_progress)
2459 /* This rtx may not be shared. If it has already been seen,
2460 replace it with a copy of itself. */
2461 #ifdef ENABLE_CHECKING
2462 if (RTX_FLAG (x, used))
2464 error ("invalid rtl sharing found in the insn");
2466 error ("shared rtx");
2468 internal_error ("internal consistency failure");
2471 gcc_assert (!RTX_FLAG (x, used));
2473 RTX_FLAG (x, used) = 1;
2475 /* Now scan the subexpressions recursively. */
2477 format_ptr = GET_RTX_FORMAT (code);
2479 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2481 switch (*format_ptr++)
2484 verify_rtx_sharing (XEXP (x, i), insn);
2488 if (XVEC (x, i) != NULL)
2491 int len = XVECLEN (x, i);
2493 for (j = 0; j < len; j++)
2495 /* We allow sharing of ASM_OPERANDS inside single
2497 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2498 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2500 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2502 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2511 /* Go through all the RTL insn bodies and check that there is no unexpected
2512 sharing in between the subexpressions. */
2515 verify_rtl_sharing (void)
2519 for (p = get_insns (); p; p = NEXT_INSN (p))
2522 reset_used_flags (PATTERN (p));
2523 reset_used_flags (REG_NOTES (p));
2524 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2527 rtx q, sequence = PATTERN (p);
2529 for (i = 0; i < XVECLEN (sequence, 0); i++)
2531 q = XVECEXP (sequence, 0, i);
2532 gcc_assert (INSN_P (q));
2533 reset_used_flags (PATTERN (q));
2534 reset_used_flags (REG_NOTES (q));
2539 for (p = get_insns (); p; p = NEXT_INSN (p))
2542 verify_rtx_sharing (PATTERN (p), p);
2543 verify_rtx_sharing (REG_NOTES (p), p);
2547 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2548 Assumes the mark bits are cleared at entry. */
2551 unshare_all_rtl_in_chain (rtx insn)
2553 for (; insn; insn = NEXT_INSN (insn))
2556 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2557 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2561 /* Go through all virtual stack slots of a function and mark them as
2562 shared. We never replace the DECL_RTLs themselves with a copy,
2563 but expressions mentioned into a DECL_RTL cannot be shared with
2564 expressions in the instruction stream.
2566 Note that reload may convert pseudo registers into memories in-place.
2567 Pseudo registers are always shared, but MEMs never are. Thus if we
2568 reset the used flags on MEMs in the instruction stream, we must set
2569 them again on MEMs that appear in DECL_RTLs. */
2572 set_used_decls (tree blk)
2577 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2578 if (DECL_RTL_SET_P (t))
2579 set_used_flags (DECL_RTL (t));
2581 /* Now process sub-blocks. */
2582 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2586 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2587 Recursively does the same for subexpressions. Uses
2588 copy_rtx_if_shared_1 to reduce stack space. */
2591 copy_rtx_if_shared (rtx orig)
2593 copy_rtx_if_shared_1 (&orig);
2597 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2598 use. Recursively does the same for subexpressions. */
2601 copy_rtx_if_shared_1 (rtx *orig1)
2607 const char *format_ptr;
2611 /* Repeat is used to turn tail-recursion into iteration. */
2618 code = GET_CODE (x);
2620 /* These types may be freely shared. */
2637 /* SCRATCH must be shared because they represent distinct values. */
2640 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2645 if (shared_const_p (x))
2655 /* The chain of insns is not being copied. */
2662 /* This rtx may not be shared. If it has already been seen,
2663 replace it with a copy of itself. */
2665 if (RTX_FLAG (x, used))
2667 x = shallow_copy_rtx (x);
2670 RTX_FLAG (x, used) = 1;
2672 /* Now scan the subexpressions recursively.
2673 We can store any replaced subexpressions directly into X
2674 since we know X is not shared! Any vectors in X
2675 must be copied if X was copied. */
2677 format_ptr = GET_RTX_FORMAT (code);
2678 length = GET_RTX_LENGTH (code);
2681 for (i = 0; i < length; i++)
2683 switch (*format_ptr++)
2687 copy_rtx_if_shared_1 (last_ptr);
2688 last_ptr = &XEXP (x, i);
2692 if (XVEC (x, i) != NULL)
2695 int len = XVECLEN (x, i);
2697 /* Copy the vector iff I copied the rtx and the length
2699 if (copied && len > 0)
2700 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2702 /* Call recursively on all inside the vector. */
2703 for (j = 0; j < len; j++)
2706 copy_rtx_if_shared_1 (last_ptr);
2707 last_ptr = &XVECEXP (x, i, j);
2722 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2723 to look for shared sub-parts. */
2726 reset_used_flags (rtx x)
2730 const char *format_ptr;
2733 /* Repeat is used to turn tail-recursion into iteration. */
2738 code = GET_CODE (x);
2740 /* These types may be freely shared so we needn't do any resetting
2765 /* The chain of insns is not being copied. */
2772 RTX_FLAG (x, used) = 0;
2774 format_ptr = GET_RTX_FORMAT (code);
2775 length = GET_RTX_LENGTH (code);
2777 for (i = 0; i < length; i++)
2779 switch (*format_ptr++)
2787 reset_used_flags (XEXP (x, i));
2791 for (j = 0; j < XVECLEN (x, i); j++)
2792 reset_used_flags (XVECEXP (x, i, j));
2798 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2799 to look for shared sub-parts. */
2802 set_used_flags (rtx x)
2806 const char *format_ptr;
2811 code = GET_CODE (x);
2813 /* These types may be freely shared so we needn't do any resetting
2838 /* The chain of insns is not being copied. */
2845 RTX_FLAG (x, used) = 1;
2847 format_ptr = GET_RTX_FORMAT (code);
2848 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2850 switch (*format_ptr++)
2853 set_used_flags (XEXP (x, i));
2857 for (j = 0; j < XVECLEN (x, i); j++)
2858 set_used_flags (XVECEXP (x, i, j));
2864 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2865 Return X or the rtx for the pseudo reg the value of X was copied into.
2866 OTHER must be valid as a SET_DEST. */
2869 make_safe_from (rtx x, rtx other)
2872 switch (GET_CODE (other))
2875 other = SUBREG_REG (other);
2877 case STRICT_LOW_PART:
2880 other = XEXP (other, 0);
2889 && GET_CODE (x) != SUBREG)
2891 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2892 || reg_mentioned_p (other, x))))
2894 rtx temp = gen_reg_rtx (GET_MODE (x));
2895 emit_move_insn (temp, x);
2901 /* Emission of insns (adding them to the doubly-linked list). */
2903 /* Return the first insn of the current sequence or current function. */
2911 /* Specify a new insn as the first in the chain. */
2914 set_first_insn (rtx insn)
2916 gcc_assert (!PREV_INSN (insn));
2920 /* Return the last insn emitted in current sequence or current function. */
2923 get_last_insn (void)
2928 /* Specify a new insn as the last in the chain. */
2931 set_last_insn (rtx insn)
2933 gcc_assert (!NEXT_INSN (insn));
2937 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2940 get_last_insn_anywhere (void)
2942 struct sequence_stack *stack;
2945 for (stack = seq_stack; stack; stack = stack->next)
2946 if (stack->last != 0)
2951 /* Return the first nonnote insn emitted in current sequence or current
2952 function. This routine looks inside SEQUENCEs. */
2955 get_first_nonnote_insn (void)
2957 rtx insn = first_insn;
2962 for (insn = next_insn (insn);
2963 insn && NOTE_P (insn);
2964 insn = next_insn (insn))
2968 if (NONJUMP_INSN_P (insn)
2969 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2970 insn = XVECEXP (PATTERN (insn), 0, 0);
2977 /* Return the last nonnote insn emitted in current sequence or current
2978 function. This routine looks inside SEQUENCEs. */
2981 get_last_nonnote_insn (void)
2983 rtx insn = last_insn;
2988 for (insn = previous_insn (insn);
2989 insn && NOTE_P (insn);
2990 insn = previous_insn (insn))
2994 if (NONJUMP_INSN_P (insn)
2995 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2996 insn = XVECEXP (PATTERN (insn), 0,
2997 XVECLEN (PATTERN (insn), 0) - 1);
3004 /* Return a number larger than any instruction's uid in this function. */
3009 return cur_insn_uid;
3012 /* Return the number of actual (non-debug) insns emitted in this
3016 get_max_insn_count (void)
3018 int n = cur_insn_uid;
3020 /* The table size must be stable across -g, to avoid codegen
3021 differences due to debug insns, and not be affected by
3022 -fmin-insn-uid, to avoid excessive table size and to simplify
3023 debugging of -fcompare-debug failures. */
3024 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3025 n -= cur_debug_insn_uid;
3027 n -= MIN_NONDEBUG_INSN_UID;
3033 /* Return the next insn. If it is a SEQUENCE, return the first insn
3037 next_insn (rtx insn)
3041 insn = NEXT_INSN (insn);
3042 if (insn && NONJUMP_INSN_P (insn)
3043 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3044 insn = XVECEXP (PATTERN (insn), 0, 0);
3050 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3054 previous_insn (rtx insn)
3058 insn = PREV_INSN (insn);
3059 if (insn && NONJUMP_INSN_P (insn)
3060 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3061 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3067 /* Return the next insn after INSN that is not a NOTE. This routine does not
3068 look inside SEQUENCEs. */
3071 next_nonnote_insn (rtx insn)
3075 insn = NEXT_INSN (insn);
3076 if (insn == 0 || !NOTE_P (insn))
3083 /* Return the next insn after INSN that is not a NOTE, but stop the
3084 search before we enter another basic block. This routine does not
3085 look inside SEQUENCEs. */
3088 next_nonnote_insn_bb (rtx insn)
3092 insn = NEXT_INSN (insn);
3093 if (insn == 0 || !NOTE_P (insn))
3095 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3102 /* Return the previous insn before INSN that is not a NOTE. This routine does
3103 not look inside SEQUENCEs. */
3106 prev_nonnote_insn (rtx insn)
3110 insn = PREV_INSN (insn);
3111 if (insn == 0 || !NOTE_P (insn))
3118 /* Return the previous insn before INSN that is not a NOTE, but stop
3119 the search before we enter another basic block. This routine does
3120 not look inside SEQUENCEs. */
3123 prev_nonnote_insn_bb (rtx insn)
3127 insn = PREV_INSN (insn);
3128 if (insn == 0 || !NOTE_P (insn))
3130 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3137 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3138 routine does not look inside SEQUENCEs. */
3141 next_nondebug_insn (rtx insn)
3145 insn = NEXT_INSN (insn);
3146 if (insn == 0 || !DEBUG_INSN_P (insn))
3153 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3154 This routine does not look inside SEQUENCEs. */
3157 prev_nondebug_insn (rtx insn)
3161 insn = PREV_INSN (insn);
3162 if (insn == 0 || !DEBUG_INSN_P (insn))
3169 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3170 or 0, if there is none. This routine does not look inside
3174 next_real_insn (rtx insn)
3178 insn = NEXT_INSN (insn);
3179 if (insn == 0 || INSN_P (insn))
3186 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3187 or 0, if there is none. This routine does not look inside
3191 prev_real_insn (rtx insn)
3195 insn = PREV_INSN (insn);
3196 if (insn == 0 || INSN_P (insn))
3203 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3204 This routine does not look inside SEQUENCEs. */
3207 last_call_insn (void)
3211 for (insn = get_last_insn ();
3212 insn && !CALL_P (insn);
3213 insn = PREV_INSN (insn))
3219 /* Find the next insn after INSN that really does something. This routine
3220 does not look inside SEQUENCEs. Until reload has completed, this is the
3221 same as next_real_insn. */
3224 active_insn_p (const_rtx insn)
3226 return (CALL_P (insn) || JUMP_P (insn)
3227 || (NONJUMP_INSN_P (insn)
3228 && (! reload_completed
3229 || (GET_CODE (PATTERN (insn)) != USE
3230 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3234 next_active_insn (rtx insn)
3238 insn = NEXT_INSN (insn);
3239 if (insn == 0 || active_insn_p (insn))
3246 /* Find the last insn before INSN that really does something. This routine
3247 does not look inside SEQUENCEs. Until reload has completed, this is the
3248 same as prev_real_insn. */
3251 prev_active_insn (rtx insn)
3255 insn = PREV_INSN (insn);
3256 if (insn == 0 || active_insn_p (insn))
3263 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3266 next_label (rtx insn)
3270 insn = NEXT_INSN (insn);
3271 if (insn == 0 || LABEL_P (insn))
3278 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3281 prev_label (rtx insn)
3285 insn = PREV_INSN (insn);
3286 if (insn == 0 || LABEL_P (insn))
3293 /* Return the last label to mark the same position as LABEL. Return null
3294 if LABEL itself is null. */
3297 skip_consecutive_labels (rtx label)
3301 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3309 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3310 and REG_CC_USER notes so we can find it. */
3313 link_cc0_insns (rtx insn)
3315 rtx user = next_nonnote_insn (insn);
3317 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3318 user = XVECEXP (PATTERN (user), 0, 0);
3320 add_reg_note (user, REG_CC_SETTER, insn);
3321 add_reg_note (insn, REG_CC_USER, user);
3324 /* Return the next insn that uses CC0 after INSN, which is assumed to
3325 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3326 applied to the result of this function should yield INSN).
3328 Normally, this is simply the next insn. However, if a REG_CC_USER note
3329 is present, it contains the insn that uses CC0.
3331 Return 0 if we can't find the insn. */
3334 next_cc0_user (rtx insn)
3336 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3339 return XEXP (note, 0);
3341 insn = next_nonnote_insn (insn);
3342 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3343 insn = XVECEXP (PATTERN (insn), 0, 0);
3345 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3351 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3352 note, it is the previous insn. */
3355 prev_cc0_setter (rtx insn)
3357 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3360 return XEXP (note, 0);
3362 insn = prev_nonnote_insn (insn);
3363 gcc_assert (sets_cc0_p (PATTERN (insn)));
3370 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3373 find_auto_inc (rtx *xp, void *data)
3376 rtx reg = (rtx) data;
3378 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3381 switch (GET_CODE (x))
3389 if (rtx_equal_p (reg, XEXP (x, 0)))
3400 /* Increment the label uses for all labels present in rtx. */
3403 mark_label_nuses (rtx x)
3409 code = GET_CODE (x);
3410 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3411 LABEL_NUSES (XEXP (x, 0))++;
3413 fmt = GET_RTX_FORMAT (code);
3414 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3417 mark_label_nuses (XEXP (x, i));
3418 else if (fmt[i] == 'E')
3419 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3420 mark_label_nuses (XVECEXP (x, i, j));
3425 /* Try splitting insns that can be split for better scheduling.
3426 PAT is the pattern which might split.
3427 TRIAL is the insn providing PAT.
3428 LAST is nonzero if we should return the last insn of the sequence produced.
3430 If this routine succeeds in splitting, it returns the first or last
3431 replacement insn depending on the value of LAST. Otherwise, it
3432 returns TRIAL. If the insn to be returned can be split, it will be. */
3435 try_split (rtx pat, rtx trial, int last)
3437 rtx before = PREV_INSN (trial);
3438 rtx after = NEXT_INSN (trial);
3439 int has_barrier = 0;
3442 rtx insn_last, insn;
3445 /* We're not good at redistributing frame information. */
3446 if (RTX_FRAME_RELATED_P (trial))
3449 if (any_condjump_p (trial)
3450 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3451 split_branch_probability = INTVAL (XEXP (note, 0));
3452 probability = split_branch_probability;
3454 seq = split_insns (pat, trial);
3456 split_branch_probability = -1;
3458 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3459 We may need to handle this specially. */
3460 if (after && BARRIER_P (after))
3463 after = NEXT_INSN (after);
3469 /* Avoid infinite loop if any insn of the result matches
3470 the original pattern. */
3474 if (INSN_P (insn_last)
3475 && rtx_equal_p (PATTERN (insn_last), pat))
3477 if (!NEXT_INSN (insn_last))
3479 insn_last = NEXT_INSN (insn_last);
3482 /* We will be adding the new sequence to the function. The splitters
3483 may have introduced invalid RTL sharing, so unshare the sequence now. */
3484 unshare_all_rtl_in_chain (seq);
3487 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3491 mark_jump_label (PATTERN (insn), insn, 0);
3493 if (probability != -1
3494 && any_condjump_p (insn)
3495 && !find_reg_note (insn, REG_BR_PROB, 0))
3497 /* We can preserve the REG_BR_PROB notes only if exactly
3498 one jump is created, otherwise the machine description
3499 is responsible for this step using
3500 split_branch_probability variable. */
3501 gcc_assert (njumps == 1);
3502 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3507 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3508 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3511 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3514 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3517 *p = CALL_INSN_FUNCTION_USAGE (trial);
3518 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3522 /* Copy notes, particularly those related to the CFG. */
3523 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3525 switch (REG_NOTE_KIND (note))
3528 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3533 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3536 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3540 case REG_NON_LOCAL_GOTO:
3541 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3544 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3550 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3552 rtx reg = XEXP (note, 0);
3553 if (!FIND_REG_INC_NOTE (insn, reg)
3554 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3555 add_reg_note (insn, REG_INC, reg);
3565 /* If there are LABELS inside the split insns increment the
3566 usage count so we don't delete the label. */
3570 while (insn != NULL_RTX)
3572 /* JUMP_P insns have already been "marked" above. */
3573 if (NONJUMP_INSN_P (insn))
3574 mark_label_nuses (PATTERN (insn));
3576 insn = PREV_INSN (insn);
3580 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3582 delete_insn (trial);
3584 emit_barrier_after (tem);
3586 /* Recursively call try_split for each new insn created; by the
3587 time control returns here that insn will be fully split, so
3588 set LAST and continue from the insn after the one returned.
3589 We can't use next_active_insn here since AFTER may be a note.
3590 Ignore deleted insns, which can be occur if not optimizing. */
3591 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3592 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3593 tem = try_split (PATTERN (tem), tem, 1);
3595 /* Return either the first or the last insn, depending on which was
3598 ? (after ? PREV_INSN (after) : last_insn)
3599 : NEXT_INSN (before);
3602 /* Make and return an INSN rtx, initializing all its slots.
3603 Store PATTERN in the pattern slots. */
3606 make_insn_raw (rtx pattern)
3610 insn = rtx_alloc (INSN);
3612 INSN_UID (insn) = cur_insn_uid++;
3613 PATTERN (insn) = pattern;
3614 INSN_CODE (insn) = -1;
3615 REG_NOTES (insn) = NULL;
3616 INSN_LOCATOR (insn) = curr_insn_locator ();
3617 BLOCK_FOR_INSN (insn) = NULL;
3619 #ifdef ENABLE_RTL_CHECKING
3622 && (returnjump_p (insn)
3623 || (GET_CODE (insn) == SET
3624 && SET_DEST (insn) == pc_rtx)))
3626 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3634 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3637 make_debug_insn_raw (rtx pattern)
3641 insn = rtx_alloc (DEBUG_INSN);
3642 INSN_UID (insn) = cur_debug_insn_uid++;
3643 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3644 INSN_UID (insn) = cur_insn_uid++;
3646 PATTERN (insn) = pattern;
3647 INSN_CODE (insn) = -1;
3648 REG_NOTES (insn) = NULL;
3649 INSN_LOCATOR (insn) = curr_insn_locator ();
3650 BLOCK_FOR_INSN (insn) = NULL;
3655 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3658 make_jump_insn_raw (rtx pattern)
3662 insn = rtx_alloc (JUMP_INSN);
3663 INSN_UID (insn) = cur_insn_uid++;
3665 PATTERN (insn) = pattern;
3666 INSN_CODE (insn) = -1;
3667 REG_NOTES (insn) = NULL;
3668 JUMP_LABEL (insn) = NULL;
3669 INSN_LOCATOR (insn) = curr_insn_locator ();
3670 BLOCK_FOR_INSN (insn) = NULL;
3675 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3678 make_call_insn_raw (rtx pattern)
3682 insn = rtx_alloc (CALL_INSN);
3683 INSN_UID (insn) = cur_insn_uid++;
3685 PATTERN (insn) = pattern;
3686 INSN_CODE (insn) = -1;
3687 REG_NOTES (insn) = NULL;
3688 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3689 INSN_LOCATOR (insn) = curr_insn_locator ();
3690 BLOCK_FOR_INSN (insn) = NULL;
3695 /* Add INSN to the end of the doubly-linked list.
3696 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3701 PREV_INSN (insn) = last_insn;
3702 NEXT_INSN (insn) = 0;
3704 if (NULL != last_insn)
3705 NEXT_INSN (last_insn) = insn;
3707 if (NULL == first_insn)
3713 /* Add INSN into the doubly-linked list after insn AFTER. This and
3714 the next should be the only functions called to insert an insn once
3715 delay slots have been filled since only they know how to update a
3719 add_insn_after (rtx insn, rtx after, basic_block bb)
3721 rtx next = NEXT_INSN (after);
3723 gcc_assert (!optimize || !INSN_DELETED_P (after));
3725 NEXT_INSN (insn) = next;
3726 PREV_INSN (insn) = after;
3730 PREV_INSN (next) = insn;
3731 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3732 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3734 else if (last_insn == after)
3738 struct sequence_stack *stack = seq_stack;
3739 /* Scan all pending sequences too. */
3740 for (; stack; stack = stack->next)
3741 if (after == stack->last)
3750 if (!BARRIER_P (after)
3751 && !BARRIER_P (insn)
3752 && (bb = BLOCK_FOR_INSN (after)))
3754 set_block_for_insn (insn, bb);
3756 df_insn_rescan (insn);
3757 /* Should not happen as first in the BB is always
3758 either NOTE or LABEL. */
3759 if (BB_END (bb) == after
3760 /* Avoid clobbering of structure when creating new BB. */
3761 && !BARRIER_P (insn)
3762 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3766 NEXT_INSN (after) = insn;
3767 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3769 rtx sequence = PATTERN (after);
3770 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3774 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3775 the previous should be the only functions called to insert an insn
3776 once delay slots have been filled since only they know how to
3777 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3781 add_insn_before (rtx insn, rtx before, basic_block bb)
3783 rtx prev = PREV_INSN (before);
3785 gcc_assert (!optimize || !INSN_DELETED_P (before));
3787 PREV_INSN (insn) = prev;
3788 NEXT_INSN (insn) = before;
3792 NEXT_INSN (prev) = insn;
3793 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3795 rtx sequence = PATTERN (prev);
3796 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3799 else if (first_insn == before)
3803 struct sequence_stack *stack = seq_stack;
3804 /* Scan all pending sequences too. */
3805 for (; stack; stack = stack->next)
3806 if (before == stack->first)
3808 stack->first = insn;
3816 && !BARRIER_P (before)
3817 && !BARRIER_P (insn))
3818 bb = BLOCK_FOR_INSN (before);
3822 set_block_for_insn (insn, bb);
3824 df_insn_rescan (insn);
3825 /* Should not happen as first in the BB is always either NOTE or
3827 gcc_assert (BB_HEAD (bb) != insn
3828 /* Avoid clobbering of structure when creating new BB. */
3830 || NOTE_INSN_BASIC_BLOCK_P (insn));
3833 PREV_INSN (before) = insn;
3834 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3835 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3839 /* Replace insn with an deleted instruction note. */
3842 set_insn_deleted (rtx insn)
3844 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3845 PUT_CODE (insn, NOTE);
3846 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3850 /* Remove an insn from its doubly-linked list. This function knows how
3851 to handle sequences. */
3853 remove_insn (rtx insn)
3855 rtx next = NEXT_INSN (insn);
3856 rtx prev = PREV_INSN (insn);
3859 /* Later in the code, the block will be marked dirty. */
3860 df_insn_delete (NULL, INSN_UID (insn));
3864 NEXT_INSN (prev) = next;
3865 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3867 rtx sequence = PATTERN (prev);
3868 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3871 else if (first_insn == insn)
3875 struct sequence_stack *stack = seq_stack;
3876 /* Scan all pending sequences too. */
3877 for (; stack; stack = stack->next)
3878 if (insn == stack->first)
3880 stack->first = next;
3889 PREV_INSN (next) = prev;
3890 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3891 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3893 else if (last_insn == insn)
3897 struct sequence_stack *stack = seq_stack;
3898 /* Scan all pending sequences too. */
3899 for (; stack; stack = stack->next)
3900 if (insn == stack->last)
3908 if (!BARRIER_P (insn)
3909 && (bb = BLOCK_FOR_INSN (insn)))
3912 df_set_bb_dirty (bb);
3913 if (BB_HEAD (bb) == insn)
3915 /* Never ever delete the basic block note without deleting whole
3917 gcc_assert (!NOTE_P (insn));
3918 BB_HEAD (bb) = next;
3920 if (BB_END (bb) == insn)
3925 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3928 add_function_usage_to (rtx call_insn, rtx call_fusage)
3930 gcc_assert (call_insn && CALL_P (call_insn));
3932 /* Put the register usage information on the CALL. If there is already
3933 some usage information, put ours at the end. */
3934 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3938 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3939 link = XEXP (link, 1))
3942 XEXP (link, 1) = call_fusage;
3945 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3948 /* Delete all insns made since FROM.
3949 FROM becomes the new last instruction. */
3952 delete_insns_since (rtx from)
3957 NEXT_INSN (from) = 0;
3961 /* This function is deprecated, please use sequences instead.
3963 Move a consecutive bunch of insns to a different place in the chain.
3964 The insns to be moved are those between FROM and TO.
3965 They are moved to a new position after the insn AFTER.
3966 AFTER must not be FROM or TO or any insn in between.
3968 This function does not know about SEQUENCEs and hence should not be
3969 called after delay-slot filling has been done. */
3972 reorder_insns_nobb (rtx from, rtx to, rtx after)
3974 /* Splice this bunch out of where it is now. */
3975 if (PREV_INSN (from))
3976 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3978 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3979 if (last_insn == to)
3980 last_insn = PREV_INSN (from);
3981 if (first_insn == from)
3982 first_insn = NEXT_INSN (to);
3984 /* Make the new neighbors point to it and it to them. */
3985 if (NEXT_INSN (after))
3986 PREV_INSN (NEXT_INSN (after)) = to;
3988 NEXT_INSN (to) = NEXT_INSN (after);
3989 PREV_INSN (from) = after;
3990 NEXT_INSN (after) = from;
3991 if (after == last_insn)
3995 /* Same as function above, but take care to update BB boundaries. */
3997 reorder_insns (rtx from, rtx to, rtx after)
3999 rtx prev = PREV_INSN (from);
4000 basic_block bb, bb2;
4002 reorder_insns_nobb (from, to, after);
4004 if (!BARRIER_P (after)
4005 && (bb = BLOCK_FOR_INSN (after)))
4008 df_set_bb_dirty (bb);
4010 if (!BARRIER_P (from)
4011 && (bb2 = BLOCK_FOR_INSN (from)))
4013 if (BB_END (bb2) == to)
4014 BB_END (bb2) = prev;
4015 df_set_bb_dirty (bb2);
4018 if (BB_END (bb) == after)
4021 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4023 df_insn_change_bb (x, bb);
4028 /* Emit insn(s) of given code and pattern
4029 at a specified place within the doubly-linked list.
4031 All of the emit_foo global entry points accept an object
4032 X which is either an insn list or a PATTERN of a single
4035 There are thus a few canonical ways to generate code and
4036 emit it at a specific place in the instruction stream. For
4037 example, consider the instruction named SPOT and the fact that
4038 we would like to emit some instructions before SPOT. We might
4042 ... emit the new instructions ...
4043 insns_head = get_insns ();
4046 emit_insn_before (insns_head, SPOT);
4048 It used to be common to generate SEQUENCE rtl instead, but that
4049 is a relic of the past which no longer occurs. The reason is that
4050 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4051 generated would almost certainly die right after it was created. */
4053 /* Make X be output before the instruction BEFORE. */
4056 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4061 gcc_assert (before);
4066 switch (GET_CODE (x))
4078 rtx next = NEXT_INSN (insn);
4079 add_insn_before (insn, before, bb);
4085 #ifdef ENABLE_RTL_CHECKING
4092 last = make_insn_raw (x);
4093 add_insn_before (last, before, bb);
4100 /* Make an instruction with body X and code JUMP_INSN
4101 and output it before the instruction BEFORE. */
4104 emit_jump_insn_before_noloc (rtx x, rtx before)
4106 rtx insn, last = NULL_RTX;
4108 gcc_assert (before);
4110 switch (GET_CODE (x))
4122 rtx next = NEXT_INSN (insn);
4123 add_insn_before (insn, before, NULL);
4129 #ifdef ENABLE_RTL_CHECKING
4136 last = make_jump_insn_raw (x);
4137 add_insn_before (last, before, NULL);
4144 /* Make an instruction with body X and code CALL_INSN
4145 and output it before the instruction BEFORE. */
4148 emit_call_insn_before_noloc (rtx x, rtx before)
4150 rtx last = NULL_RTX, insn;
4152 gcc_assert (before);
4154 switch (GET_CODE (x))
4166 rtx next = NEXT_INSN (insn);
4167 add_insn_before (insn, before, NULL);
4173 #ifdef ENABLE_RTL_CHECKING
4180 last = make_call_insn_raw (x);
4181 add_insn_before (last, before, NULL);
4188 /* Make an instruction with body X and code DEBUG_INSN
4189 and output it before the instruction BEFORE. */
4192 emit_debug_insn_before_noloc (rtx x, rtx before)
4194 rtx last = NULL_RTX, insn;
4196 gcc_assert (before);
4198 switch (GET_CODE (x))
4210 rtx next = NEXT_INSN (insn);
4211 add_insn_before (insn, before, NULL);
4217 #ifdef ENABLE_RTL_CHECKING
4224 last = make_debug_insn_raw (x);
4225 add_insn_before (last, before, NULL);
4232 /* Make an insn of code BARRIER
4233 and output it before the insn BEFORE. */
4236 emit_barrier_before (rtx before)
4238 rtx insn = rtx_alloc (BARRIER);
4240 INSN_UID (insn) = cur_insn_uid++;
4242 add_insn_before (insn, before, NULL);
4246 /* Emit the label LABEL before the insn BEFORE. */
4249 emit_label_before (rtx label, rtx before)
4251 /* This can be called twice for the same label as a result of the
4252 confusion that follows a syntax error! So make it harmless. */
4253 if (INSN_UID (label) == 0)
4255 INSN_UID (label) = cur_insn_uid++;
4256 add_insn_before (label, before, NULL);
4262 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4265 emit_note_before (enum insn_note subtype, rtx before)
4267 rtx note = rtx_alloc (NOTE);
4268 INSN_UID (note) = cur_insn_uid++;
4269 NOTE_KIND (note) = subtype;
4270 BLOCK_FOR_INSN (note) = NULL;
4271 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4273 add_insn_before (note, before, NULL);
4277 /* Helper for emit_insn_after, handles lists of instructions
4281 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4285 if (!bb && !BARRIER_P (after))
4286 bb = BLOCK_FOR_INSN (after);
4290 df_set_bb_dirty (bb);
4291 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4292 if (!BARRIER_P (last))
4294 set_block_for_insn (last, bb);
4295 df_insn_rescan (last);
4297 if (!BARRIER_P (last))
4299 set_block_for_insn (last, bb);
4300 df_insn_rescan (last);
4302 if (BB_END (bb) == after)
4306 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4309 after_after = NEXT_INSN (after);
4311 NEXT_INSN (after) = first;
4312 PREV_INSN (first) = after;
4313 NEXT_INSN (last) = after_after;
4315 PREV_INSN (after_after) = last;
4317 if (after == last_insn)
4323 /* Make X be output after the insn AFTER and set the BB of insn. If
4324 BB is NULL, an attempt is made to infer the BB from AFTER. */
4327 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4336 switch (GET_CODE (x))
4345 last = emit_insn_after_1 (x, after, bb);
4348 #ifdef ENABLE_RTL_CHECKING
4355 last = make_insn_raw (x);
4356 add_insn_after (last, after, bb);
4364 /* Make an insn of code JUMP_INSN with body X
4365 and output it after the insn AFTER. */
4368 emit_jump_insn_after_noloc (rtx x, rtx after)
4374 switch (GET_CODE (x))
4383 last = emit_insn_after_1 (x, after, NULL);
4386 #ifdef ENABLE_RTL_CHECKING
4393 last = make_jump_insn_raw (x);
4394 add_insn_after (last, after, NULL);
4401 /* Make an instruction with body X and code CALL_INSN
4402 and output it after the instruction AFTER. */
4405 emit_call_insn_after_noloc (rtx x, rtx after)
4411 switch (GET_CODE (x))
4420 last = emit_insn_after_1 (x, after, NULL);
4423 #ifdef ENABLE_RTL_CHECKING
4430 last = make_call_insn_raw (x);
4431 add_insn_after (last, after, NULL);
4438 /* Make an instruction with body X and code CALL_INSN
4439 and output it after the instruction AFTER. */
4442 emit_debug_insn_after_noloc (rtx x, rtx after)
4448 switch (GET_CODE (x))
4457 last = emit_insn_after_1 (x, after, NULL);
4460 #ifdef ENABLE_RTL_CHECKING
4467 last = make_debug_insn_raw (x);
4468 add_insn_after (last, after, NULL);
4475 /* Make an insn of code BARRIER
4476 and output it after the insn AFTER. */
4479 emit_barrier_after (rtx after)
4481 rtx insn = rtx_alloc (BARRIER);
4483 INSN_UID (insn) = cur_insn_uid++;
4485 add_insn_after (insn, after, NULL);
4489 /* Emit the label LABEL after the insn AFTER. */
4492 emit_label_after (rtx label, rtx after)
4494 /* This can be called twice for the same label
4495 as a result of the confusion that follows a syntax error!
4496 So make it harmless. */
4497 if (INSN_UID (label) == 0)
4499 INSN_UID (label) = cur_insn_uid++;
4500 add_insn_after (label, after, NULL);
4506 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4509 emit_note_after (enum insn_note subtype, rtx after)
4511 rtx note = rtx_alloc (NOTE);
4512 INSN_UID (note) = cur_insn_uid++;
4513 NOTE_KIND (note) = subtype;
4514 BLOCK_FOR_INSN (note) = NULL;
4515 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4516 add_insn_after (note, after, NULL);
4520 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4522 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4524 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4526 if (pattern == NULL_RTX || !loc)
4529 after = NEXT_INSN (after);
4532 if (active_insn_p (after) && !INSN_LOCATOR (after))
4533 INSN_LOCATOR (after) = loc;
4536 after = NEXT_INSN (after);
4541 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4543 emit_insn_after (rtx pattern, rtx after)
4547 while (DEBUG_INSN_P (prev))
4548 prev = PREV_INSN (prev);
4551 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4553 return emit_insn_after_noloc (pattern, after, NULL);
4556 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4558 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4560 rtx last = emit_jump_insn_after_noloc (pattern, after);
4562 if (pattern == NULL_RTX || !loc)
4565 after = NEXT_INSN (after);
4568 if (active_insn_p (after) && !INSN_LOCATOR (after))
4569 INSN_LOCATOR (after) = loc;
4572 after = NEXT_INSN (after);
4577 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4579 emit_jump_insn_after (rtx pattern, rtx after)
4583 while (DEBUG_INSN_P (prev))
4584 prev = PREV_INSN (prev);
4587 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4589 return emit_jump_insn_after_noloc (pattern, after);
4592 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4594 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4596 rtx last = emit_call_insn_after_noloc (pattern, after);
4598 if (pattern == NULL_RTX || !loc)
4601 after = NEXT_INSN (after);
4604 if (active_insn_p (after) && !INSN_LOCATOR (after))
4605 INSN_LOCATOR (after) = loc;
4608 after = NEXT_INSN (after);
4613 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4615 emit_call_insn_after (rtx pattern, rtx after)
4619 while (DEBUG_INSN_P (prev))
4620 prev = PREV_INSN (prev);
4623 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4625 return emit_call_insn_after_noloc (pattern, after);
4628 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4630 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4632 rtx last = emit_debug_insn_after_noloc (pattern, after);
4634 if (pattern == NULL_RTX || !loc)
4637 after = NEXT_INSN (after);
4640 if (active_insn_p (after) && !INSN_LOCATOR (after))
4641 INSN_LOCATOR (after) = loc;
4644 after = NEXT_INSN (after);
4649 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4651 emit_debug_insn_after (rtx pattern, rtx after)
4654 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4656 return emit_debug_insn_after_noloc (pattern, after);
4659 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4661 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4663 rtx first = PREV_INSN (before);
4664 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4666 if (pattern == NULL_RTX || !loc)
4670 first = get_insns ();
4672 first = NEXT_INSN (first);
4675 if (active_insn_p (first) && !INSN_LOCATOR (first))
4676 INSN_LOCATOR (first) = loc;
4679 first = NEXT_INSN (first);
4684 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4686 emit_insn_before (rtx pattern, rtx before)
4690 while (DEBUG_INSN_P (next))
4691 next = PREV_INSN (next);
4694 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4696 return emit_insn_before_noloc (pattern, before, NULL);
4699 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4701 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4703 rtx first = PREV_INSN (before);
4704 rtx last = emit_jump_insn_before_noloc (pattern, before);
4706 if (pattern == NULL_RTX)
4709 first = NEXT_INSN (first);
4712 if (active_insn_p (first) && !INSN_LOCATOR (first))
4713 INSN_LOCATOR (first) = loc;
4716 first = NEXT_INSN (first);
4721 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4723 emit_jump_insn_before (rtx pattern, rtx before)
4727 while (DEBUG_INSN_P (next))
4728 next = PREV_INSN (next);
4731 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4733 return emit_jump_insn_before_noloc (pattern, before);
4736 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4738 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4740 rtx first = PREV_INSN (before);
4741 rtx last = emit_call_insn_before_noloc (pattern, before);
4743 if (pattern == NULL_RTX)
4746 first = NEXT_INSN (first);
4749 if (active_insn_p (first) && !INSN_LOCATOR (first))
4750 INSN_LOCATOR (first) = loc;
4753 first = NEXT_INSN (first);
4758 /* like emit_call_insn_before_noloc,
4759 but set insn_locator according to before. */
4761 emit_call_insn_before (rtx pattern, rtx before)
4765 while (DEBUG_INSN_P (next))
4766 next = PREV_INSN (next);
4769 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4771 return emit_call_insn_before_noloc (pattern, before);
4774 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4776 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4778 rtx first = PREV_INSN (before);
4779 rtx last = emit_debug_insn_before_noloc (pattern, before);
4781 if (pattern == NULL_RTX)
4784 first = NEXT_INSN (first);
4787 if (active_insn_p (first) && !INSN_LOCATOR (first))
4788 INSN_LOCATOR (first) = loc;
4791 first = NEXT_INSN (first);
4796 /* like emit_debug_insn_before_noloc,
4797 but set insn_locator according to before. */
4799 emit_debug_insn_before (rtx pattern, rtx before)
4801 if (INSN_P (before))
4802 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4804 return emit_debug_insn_before_noloc (pattern, before);
4807 /* Take X and emit it at the end of the doubly-linked
4810 Returns the last insn emitted. */
4815 rtx last = last_insn;
4821 switch (GET_CODE (x))
4833 rtx next = NEXT_INSN (insn);
4840 #ifdef ENABLE_RTL_CHECKING
4847 last = make_insn_raw (x);
4855 /* Make an insn of code DEBUG_INSN with pattern X
4856 and add it to the end of the doubly-linked list. */
4859 emit_debug_insn (rtx x)
4861 rtx last = last_insn;
4867 switch (GET_CODE (x))
4879 rtx next = NEXT_INSN (insn);
4886 #ifdef ENABLE_RTL_CHECKING
4893 last = make_debug_insn_raw (x);
4901 /* Make an insn of code JUMP_INSN with pattern X
4902 and add it to the end of the doubly-linked list. */
4905 emit_jump_insn (rtx x)
4907 rtx last = NULL_RTX, insn;
4909 switch (GET_CODE (x))
4921 rtx next = NEXT_INSN (insn);
4928 #ifdef ENABLE_RTL_CHECKING
4935 last = make_jump_insn_raw (x);
4943 /* Make an insn of code CALL_INSN with pattern X
4944 and add it to the end of the doubly-linked list. */
4947 emit_call_insn (rtx x)
4951 switch (GET_CODE (x))
4960 insn = emit_insn (x);
4963 #ifdef ENABLE_RTL_CHECKING
4970 insn = make_call_insn_raw (x);
4978 /* Add the label LABEL to the end of the doubly-linked list. */
4981 emit_label (rtx label)
4983 /* This can be called twice for the same label
4984 as a result of the confusion that follows a syntax error!
4985 So make it harmless. */
4986 if (INSN_UID (label) == 0)
4988 INSN_UID (label) = cur_insn_uid++;
4994 /* Make an insn of code BARRIER
4995 and add it to the end of the doubly-linked list. */
5000 rtx barrier = rtx_alloc (BARRIER);
5001 INSN_UID (barrier) = cur_insn_uid++;
5006 /* Emit a copy of note ORIG. */
5009 emit_note_copy (rtx orig)
5013 note = rtx_alloc (NOTE);
5015 INSN_UID (note) = cur_insn_uid++;
5016 NOTE_DATA (note) = NOTE_DATA (orig);
5017 NOTE_KIND (note) = NOTE_KIND (orig);
5018 BLOCK_FOR_INSN (note) = NULL;
5024 /* Make an insn of code NOTE or type NOTE_NO
5025 and add it to the end of the doubly-linked list. */
5028 emit_note (enum insn_note kind)
5032 note = rtx_alloc (NOTE);
5033 INSN_UID (note) = cur_insn_uid++;
5034 NOTE_KIND (note) = kind;
5035 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
5036 BLOCK_FOR_INSN (note) = NULL;
5041 /* Emit a clobber of lvalue X. */
5044 emit_clobber (rtx x)
5046 /* CONCATs should not appear in the insn stream. */
5047 if (GET_CODE (x) == CONCAT)
5049 emit_clobber (XEXP (x, 0));
5050 return emit_clobber (XEXP (x, 1));
5052 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5055 /* Return a sequence of insns to clobber lvalue X. */
5069 /* Emit a use of rvalue X. */
5074 /* CONCATs should not appear in the insn stream. */
5075 if (GET_CODE (x) == CONCAT)
5077 emit_use (XEXP (x, 0));
5078 return emit_use (XEXP (x, 1));
5080 return emit_insn (gen_rtx_USE (VOIDmode, x));
5083 /* Return a sequence of insns to use rvalue X. */
5097 /* Cause next statement to emit a line note even if the line number
5101 force_next_line_note (void)
5106 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5107 note of this type already exists, remove it first. */
5110 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5112 rtx note = find_reg_note (insn, kind, NULL_RTX);
5118 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5119 has multiple sets (some callers assume single_set
5120 means the insn only has one set, when in fact it
5121 means the insn only has one * useful * set). */
5122 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5128 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5129 It serves no useful purpose and breaks eliminate_regs. */
5130 if (GET_CODE (datum) == ASM_OPERANDS)
5135 XEXP (note, 0) = datum;
5136 df_notes_rescan (insn);
5144 XEXP (note, 0) = datum;
5150 add_reg_note (insn, kind, datum);
5156 df_notes_rescan (insn);
5162 return REG_NOTES (insn);
5165 /* Return an indication of which type of insn should have X as a body.
5166 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5168 static enum rtx_code
5169 classify_insn (rtx x)
5173 if (GET_CODE (x) == CALL)
5175 if (GET_CODE (x) == RETURN)
5177 if (GET_CODE (x) == SET)
5179 if (SET_DEST (x) == pc_rtx)
5181 else if (GET_CODE (SET_SRC (x)) == CALL)
5186 if (GET_CODE (x) == PARALLEL)
5189 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5190 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5192 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5193 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5195 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5196 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5202 /* Emit the rtl pattern X as an appropriate kind of insn.
5203 If X is a label, it is simply added into the insn chain. */
5208 enum rtx_code code = classify_insn (x);
5213 return emit_label (x);
5215 return emit_insn (x);
5218 rtx insn = emit_jump_insn (x);
5219 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5220 return emit_barrier ();
5224 return emit_call_insn (x);
5226 return emit_debug_insn (x);
5232 /* Space for free sequence stack entries. */
5233 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5235 /* Begin emitting insns to a sequence. If this sequence will contain
5236 something that might cause the compiler to pop arguments to function
5237 calls (because those pops have previously been deferred; see
5238 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5239 before calling this function. That will ensure that the deferred
5240 pops are not accidentally emitted in the middle of this sequence. */
5243 start_sequence (void)
5245 struct sequence_stack *tem;
5247 if (free_sequence_stack != NULL)
5249 tem = free_sequence_stack;
5250 free_sequence_stack = tem->next;
5253 tem = GGC_NEW (struct sequence_stack);
5255 tem->next = seq_stack;
5256 tem->first = first_insn;
5257 tem->last = last_insn;
5265 /* Set up the insn chain starting with FIRST as the current sequence,
5266 saving the previously current one. See the documentation for
5267 start_sequence for more information about how to use this function. */
5270 push_to_sequence (rtx first)
5276 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5282 /* Like push_to_sequence, but take the last insn as an argument to avoid
5283 looping through the list. */
5286 push_to_sequence2 (rtx first, rtx last)
5294 /* Set up the outer-level insn chain
5295 as the current sequence, saving the previously current one. */
5298 push_topmost_sequence (void)
5300 struct sequence_stack *stack, *top = NULL;
5304 for (stack = seq_stack; stack; stack = stack->next)
5307 first_insn = top->first;
5308 last_insn = top->last;
5311 /* After emitting to the outer-level insn chain, update the outer-level
5312 insn chain, and restore the previous saved state. */
5315 pop_topmost_sequence (void)
5317 struct sequence_stack *stack, *top = NULL;
5319 for (stack = seq_stack; stack; stack = stack->next)
5322 top->first = first_insn;
5323 top->last = last_insn;
5328 /* After emitting to a sequence, restore previous saved state.
5330 To get the contents of the sequence just made, you must call
5331 `get_insns' *before* calling here.
5333 If the compiler might have deferred popping arguments while
5334 generating this sequence, and this sequence will not be immediately
5335 inserted into the instruction stream, use do_pending_stack_adjust
5336 before calling get_insns. That will ensure that the deferred
5337 pops are inserted into this sequence, and not into some random
5338 location in the instruction stream. See INHIBIT_DEFER_POP for more
5339 information about deferred popping of arguments. */
5344 struct sequence_stack *tem = seq_stack;
5346 first_insn = tem->first;
5347 last_insn = tem->last;
5348 seq_stack = tem->next;
5350 memset (tem, 0, sizeof (*tem));
5351 tem->next = free_sequence_stack;
5352 free_sequence_stack = tem;
5355 /* Return 1 if currently emitting into a sequence. */
5358 in_sequence_p (void)
5360 return seq_stack != 0;
5363 /* Put the various virtual registers into REGNO_REG_RTX. */
5366 init_virtual_regs (void)
5368 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5369 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5370 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5371 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5372 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5376 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5377 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5378 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5379 static int copy_insn_n_scratches;
5381 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5382 copied an ASM_OPERANDS.
5383 In that case, it is the original input-operand vector. */
5384 static rtvec orig_asm_operands_vector;
5386 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5387 copied an ASM_OPERANDS.
5388 In that case, it is the copied input-operand vector. */
5389 static rtvec copy_asm_operands_vector;
5391 /* Likewise for the constraints vector. */
5392 static rtvec orig_asm_constraints_vector;
5393 static rtvec copy_asm_constraints_vector;
5395 /* Recursively create a new copy of an rtx for copy_insn.
5396 This function differs from copy_rtx in that it handles SCRATCHes and
5397 ASM_OPERANDs properly.
5398 Normally, this function is not used directly; use copy_insn as front end.
5399 However, you could first copy an insn pattern with copy_insn and then use
5400 this function afterwards to properly copy any REG_NOTEs containing
5404 copy_insn_1 (rtx orig)
5409 const char *format_ptr;
5414 code = GET_CODE (orig);
5429 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5434 for (i = 0; i < copy_insn_n_scratches; i++)
5435 if (copy_insn_scratch_in[i] == orig)
5436 return copy_insn_scratch_out[i];
5440 if (shared_const_p (orig))
5444 /* A MEM with a constant address is not sharable. The problem is that
5445 the constant address may need to be reloaded. If the mem is shared,
5446 then reloading one copy of this mem will cause all copies to appear
5447 to have been reloaded. */
5453 /* Copy the various flags, fields, and other information. We assume
5454 that all fields need copying, and then clear the fields that should
5455 not be copied. That is the sensible default behavior, and forces
5456 us to explicitly document why we are *not* copying a flag. */
5457 copy = shallow_copy_rtx (orig);
5459 /* We do not copy the USED flag, which is used as a mark bit during
5460 walks over the RTL. */
5461 RTX_FLAG (copy, used) = 0;
5463 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5466 RTX_FLAG (copy, jump) = 0;
5467 RTX_FLAG (copy, call) = 0;
5468 RTX_FLAG (copy, frame_related) = 0;
5471 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5473 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5474 switch (*format_ptr++)
5477 if (XEXP (orig, i) != NULL)
5478 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5483 if (XVEC (orig, i) == orig_asm_constraints_vector)
5484 XVEC (copy, i) = copy_asm_constraints_vector;
5485 else if (XVEC (orig, i) == orig_asm_operands_vector)
5486 XVEC (copy, i) = copy_asm_operands_vector;
5487 else if (XVEC (orig, i) != NULL)
5489 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5490 for (j = 0; j < XVECLEN (copy, i); j++)
5491 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5502 /* These are left unchanged. */
5509 if (code == SCRATCH)
5511 i = copy_insn_n_scratches++;
5512 gcc_assert (i < MAX_RECOG_OPERANDS);
5513 copy_insn_scratch_in[i] = orig;
5514 copy_insn_scratch_out[i] = copy;
5516 else if (code == ASM_OPERANDS)
5518 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5519 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5520 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5521 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5527 /* Create a new copy of an rtx.
5528 This function differs from copy_rtx in that it handles SCRATCHes and
5529 ASM_OPERANDs properly.
5530 INSN doesn't really have to be a full INSN; it could be just the
5533 copy_insn (rtx insn)
5535 copy_insn_n_scratches = 0;
5536 orig_asm_operands_vector = 0;
5537 orig_asm_constraints_vector = 0;
5538 copy_asm_operands_vector = 0;
5539 copy_asm_constraints_vector = 0;
5540 return copy_insn_1 (insn);
5543 /* Initialize data structures and variables in this file
5544 before generating rtl for each function. */
5551 if (MIN_NONDEBUG_INSN_UID)
5552 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5555 cur_debug_insn_uid = 1;
5556 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5557 last_location = UNKNOWN_LOCATION;
5558 first_label_num = label_num;
5561 /* Init the tables that describe all the pseudo regs. */
5563 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5565 crtl->emit.regno_pointer_align
5566 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5569 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5571 /* Put copies of all the hard registers into regno_reg_rtx. */
5572 memcpy (regno_reg_rtx,
5573 static_regno_reg_rtx,
5574 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5576 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5577 init_virtual_regs ();
5579 /* Indicate that the virtual registers and stack locations are
5581 REG_POINTER (stack_pointer_rtx) = 1;
5582 REG_POINTER (frame_pointer_rtx) = 1;
5583 REG_POINTER (hard_frame_pointer_rtx) = 1;
5584 REG_POINTER (arg_pointer_rtx) = 1;
5586 REG_POINTER (virtual_incoming_args_rtx) = 1;
5587 REG_POINTER (virtual_stack_vars_rtx) = 1;
5588 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5589 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5590 REG_POINTER (virtual_cfa_rtx) = 1;
5592 #ifdef STACK_BOUNDARY
5593 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5594 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5595 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5596 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5598 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5599 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5600 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5601 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5602 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5605 #ifdef INIT_EXPANDERS
5610 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5613 gen_const_vector (enum machine_mode mode, int constant)
5618 enum machine_mode inner;
5620 units = GET_MODE_NUNITS (mode);
5621 inner = GET_MODE_INNER (mode);
5623 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5625 v = rtvec_alloc (units);
5627 /* We need to call this function after we set the scalar const_tiny_rtx
5629 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5631 for (i = 0; i < units; ++i)
5632 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5634 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5638 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5639 all elements are zero, and the one vector when all elements are one. */
5641 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5643 enum machine_mode inner = GET_MODE_INNER (mode);
5644 int nunits = GET_MODE_NUNITS (mode);
5648 /* Check to see if all of the elements have the same value. */
5649 x = RTVEC_ELT (v, nunits - 1);
5650 for (i = nunits - 2; i >= 0; i--)
5651 if (RTVEC_ELT (v, i) != x)
5654 /* If the values are all the same, check to see if we can use one of the
5655 standard constant vectors. */
5658 if (x == CONST0_RTX (inner))
5659 return CONST0_RTX (mode);
5660 else if (x == CONST1_RTX (inner))
5661 return CONST1_RTX (mode);
5664 return gen_rtx_raw_CONST_VECTOR (mode, v);
5667 /* Initialise global register information required by all functions. */
5670 init_emit_regs (void)
5674 /* Reset register attributes */
5675 htab_empty (reg_attrs_htab);
5677 /* We need reg_raw_mode, so initialize the modes now. */
5678 init_reg_modes_target ();
5680 /* Assign register numbers to the globally defined register rtx. */
5681 pc_rtx = gen_rtx_PC (VOIDmode);
5682 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5683 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5684 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5685 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5686 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5687 virtual_incoming_args_rtx =
5688 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5689 virtual_stack_vars_rtx =
5690 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5691 virtual_stack_dynamic_rtx =
5692 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5693 virtual_outgoing_args_rtx =
5694 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5695 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5697 /* Initialize RTL for commonly used hard registers. These are
5698 copied into regno_reg_rtx as we begin to compile each function. */
5699 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5700 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5702 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5703 return_address_pointer_rtx
5704 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5707 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5708 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5710 pic_offset_table_rtx = NULL_RTX;
5713 /* Create some permanent unique rtl objects shared between all functions.
5714 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5717 init_emit_once (int line_numbers)
5720 enum machine_mode mode;
5721 enum machine_mode double_mode;
5723 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5725 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5726 const_int_htab_eq, NULL);
5728 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5729 const_double_htab_eq, NULL);
5731 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5732 const_fixed_htab_eq, NULL);
5734 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5735 mem_attrs_htab_eq, NULL);
5736 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5737 reg_attrs_htab_eq, NULL);
5739 no_line_numbers = ! line_numbers;
5741 /* Compute the word and byte modes. */
5743 byte_mode = VOIDmode;
5744 word_mode = VOIDmode;
5745 double_mode = VOIDmode;
5747 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5749 mode = GET_MODE_WIDER_MODE (mode))
5751 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5752 && byte_mode == VOIDmode)
5755 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5756 && word_mode == VOIDmode)
5760 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5762 mode = GET_MODE_WIDER_MODE (mode))
5764 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5765 && double_mode == VOIDmode)
5769 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5771 #ifdef INIT_EXPANDERS
5772 /* This is to initialize {init|mark|free}_machine_status before the first
5773 call to push_function_context_to. This is needed by the Chill front
5774 end which calls push_function_context_to before the first call to
5775 init_function_start. */
5779 /* Create the unique rtx's for certain rtx codes and operand values. */
5781 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5782 tries to use these variables. */
5783 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5784 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5785 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5787 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5788 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5789 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5791 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5793 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5794 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5795 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5800 dconsthalf = dconst1;
5801 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5803 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5805 const REAL_VALUE_TYPE *const r =
5806 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5808 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5810 mode = GET_MODE_WIDER_MODE (mode))
5811 const_tiny_rtx[i][(int) mode] =
5812 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5814 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5816 mode = GET_MODE_WIDER_MODE (mode))
5817 const_tiny_rtx[i][(int) mode] =
5818 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5820 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5822 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5824 mode = GET_MODE_WIDER_MODE (mode))
5825 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5827 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5829 mode = GET_MODE_WIDER_MODE (mode))
5830 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5833 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5835 mode = GET_MODE_WIDER_MODE (mode))
5837 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5838 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5841 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5843 mode = GET_MODE_WIDER_MODE (mode))
5845 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5846 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5849 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5851 mode = GET_MODE_WIDER_MODE (mode))
5853 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5854 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5857 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5859 mode = GET_MODE_WIDER_MODE (mode))
5861 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5862 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5865 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5867 mode = GET_MODE_WIDER_MODE (mode))
5869 FCONST0(mode).data.high = 0;
5870 FCONST0(mode).data.low = 0;
5871 FCONST0(mode).mode = mode;
5872 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5873 FCONST0 (mode), mode);
5876 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5878 mode = GET_MODE_WIDER_MODE (mode))
5880 FCONST0(mode).data.high = 0;
5881 FCONST0(mode).data.low = 0;
5882 FCONST0(mode).mode = mode;
5883 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5884 FCONST0 (mode), mode);
5887 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5889 mode = GET_MODE_WIDER_MODE (mode))
5891 FCONST0(mode).data.high = 0;
5892 FCONST0(mode).data.low = 0;
5893 FCONST0(mode).mode = mode;
5894 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5895 FCONST0 (mode), mode);
5897 /* We store the value 1. */
5898 FCONST1(mode).data.high = 0;
5899 FCONST1(mode).data.low = 0;
5900 FCONST1(mode).mode = mode;
5901 lshift_double (1, 0, GET_MODE_FBIT (mode),
5902 2 * HOST_BITS_PER_WIDE_INT,
5903 &FCONST1(mode).data.low,
5904 &FCONST1(mode).data.high,
5905 SIGNED_FIXED_POINT_MODE_P (mode));
5906 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5907 FCONST1 (mode), mode);
5910 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5912 mode = GET_MODE_WIDER_MODE (mode))
5914 FCONST0(mode).data.high = 0;
5915 FCONST0(mode).data.low = 0;
5916 FCONST0(mode).mode = mode;
5917 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5918 FCONST0 (mode), mode);
5920 /* We store the value 1. */
5921 FCONST1(mode).data.high = 0;
5922 FCONST1(mode).data.low = 0;
5923 FCONST1(mode).mode = mode;
5924 lshift_double (1, 0, GET_MODE_FBIT (mode),
5925 2 * HOST_BITS_PER_WIDE_INT,
5926 &FCONST1(mode).data.low,
5927 &FCONST1(mode).data.high,
5928 SIGNED_FIXED_POINT_MODE_P (mode));
5929 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5930 FCONST1 (mode), mode);
5933 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5935 mode = GET_MODE_WIDER_MODE (mode))
5937 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5940 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5942 mode = GET_MODE_WIDER_MODE (mode))
5944 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5947 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5949 mode = GET_MODE_WIDER_MODE (mode))
5951 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5952 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5955 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5957 mode = GET_MODE_WIDER_MODE (mode))
5959 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5960 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5963 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5964 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5965 const_tiny_rtx[0][i] = const0_rtx;
5967 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5968 if (STORE_FLAG_VALUE == 1)
5969 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5972 /* Produce exact duplicate of insn INSN after AFTER.
5973 Care updating of libcall regions if present. */
5976 emit_copy_of_insn_after (rtx insn, rtx after)
5980 switch (GET_CODE (insn))
5983 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5987 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5991 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5995 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5996 if (CALL_INSN_FUNCTION_USAGE (insn))
5997 CALL_INSN_FUNCTION_USAGE (new_rtx)
5998 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5999 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6000 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6001 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6002 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6003 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6010 /* Update LABEL_NUSES. */
6011 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6013 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
6015 /* If the old insn is frame related, then so is the new one. This is
6016 primarily needed for IA-64 unwind info which marks epilogue insns,
6017 which may be duplicated by the basic block reordering code. */
6018 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6020 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6021 will make them. REG_LABEL_TARGETs are created there too, but are
6022 supposed to be sticky, so we copy them. */
6023 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6024 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6026 if (GET_CODE (link) == EXPR_LIST)
6027 add_reg_note (new_rtx, REG_NOTE_KIND (link),
6028 copy_insn_1 (XEXP (link, 0)));
6030 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6033 INSN_CODE (new_rtx) = INSN_CODE (insn);
6037 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6039 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6041 if (hard_reg_clobbers[mode][regno])
6042 return hard_reg_clobbers[mode][regno];
6044 return (hard_reg_clobbers[mode][regno] =
6045 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6048 #include "gt-emit-rtl.h"