1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_rtl_1 (rtx);
184 static void unshare_all_decls (tree);
185 static void reset_used_decls (tree);
186 static void mark_label_nuses (rtx);
187 static hashval_t const_int_htab_hash (const void *);
188 static int const_int_htab_eq (const void *, const void *);
189 static hashval_t const_double_htab_hash (const void *);
190 static int const_double_htab_eq (const void *, const void *);
191 static rtx lookup_const_double (rtx);
192 static hashval_t mem_attrs_htab_hash (const void *);
193 static int mem_attrs_htab_eq (const void *, const void *);
194 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
196 static hashval_t reg_attrs_htab_hash (const void *);
197 static int reg_attrs_htab_eq (const void *, const void *);
198 static reg_attrs *get_reg_attrs (tree, int);
199 static tree component_ref_for_mem_expr (tree);
200 static rtx gen_const_vector_0 (enum machine_mode);
201 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 rtx a = (rtx)x, b = (rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x)
265 mem_attrs *p = (mem_attrs *) x;
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x, const void *y)
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
293 unsigned int align, enum machine_mode mode)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias == 0 && expr == 0 && offset == 0
303 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
304 && (STRICT_ALIGNMENT && mode != BLKmode
305 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x)
329 reg_attrs *p = (reg_attrs *) x;
331 return ((p->offset * 1000) ^ (long) p->decl);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x, const void *y)
341 reg_attrs *p = (reg_attrs *) x;
342 reg_attrs *q = (reg_attrs *) y;
344 return (p->decl == q->decl && p->offset == q->offset);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl, int offset)
356 /* If everything is the default, we can just return zero. */
357 if (decl == 0 && offset == 0)
361 attrs.offset = offset;
363 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
366 *slot = ggc_alloc (sizeof (reg_attrs));
367 memcpy (*slot, &attrs, sizeof (reg_attrs));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode, int regno)
380 rtx x = gen_rtx_raw_REG (mode, regno);
381 ORIGINAL_REGNO (x) = regno;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
394 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
395 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx && arg == STORE_FLAG_VALUE)
399 return const_true_rtx;
402 /* Look up the CONST_INT in the hash table. */
403 slot = htab_find_slot_with_hash (const_int_htab, &arg,
404 (hashval_t) arg, INSERT);
406 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
412 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
414 return GEN_INT (trunc_int_for_mode (c, mode));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real)
427 void **slot = htab_find_slot (const_double_htab, real, INSERT);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
444 return lookup_const_double (real);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
458 if (mode != VOIDmode)
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);
524 PUT_MODE (value, VOIDmode);
526 CONST_DOUBLE_LOW (value) = i0;
527 CONST_DOUBLE_HIGH (value) = i1;
529 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
530 XWINT (value, i) = 0;
532 return lookup_const_double (value);
536 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode == Pmode && !reload_in_progress)
554 if (regno == FRAME_POINTER_REGNUM
555 && (!reload_completed || frame_pointer_needed))
556 return frame_pointer_rtx;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno == HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed || frame_pointer_needed))
560 return hard_frame_pointer_rtx;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno == ARG_POINTER_REGNUM)
564 return arg_pointer_rtx;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
568 return return_address_pointer_rtx;
570 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
572 return pic_offset_table_rtx;
573 if (regno == STACK_POINTER_REGNUM)
574 return stack_pointer_rtx;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno < FIRST_PSEUDO_REGISTER
593 && reg_raw_mode[regno] == mode)
594 return regno_reg_rtx[regno];
597 return gen_raw_REG (mode, regno);
601 gen_rtx_MEM (enum machine_mode mode, rtx addr)
603 rtx rt = gen_rtx_raw_MEM (mode, addr);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
637 enum machine_mode inmode;
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
646 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
648 ** This routine generates an RTX of the size specified by
649 ** <code>, which is an RTX code. The RTX structure is initialized
650 ** from the arguments <element1> through <elementn>, which are
651 ** interpreted according to the specific RTX type's format. The
652 ** special machine mode associated with the rtx (if any) is specified
655 ** gen_rtx can be invoked in a way which resembles the lisp-like
656 ** rtx it will generate. For example, the following rtx structure:
658 ** (plus:QI (mem:QI (reg:SI 1))
659 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
661 ** ...would be generated by the following C code:
663 ** gen_rtx (PLUS, QImode,
664 ** gen_rtx (MEM, QImode,
665 ** gen_rtx (REG, SImode, 1)),
666 ** gen_rtx (MEM, QImode,
667 ** gen_rtx (PLUS, SImode,
668 ** gen_rtx (REG, SImode, 2),
669 ** gen_rtx (REG, SImode, 3)))),
674 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
676 int i; /* Array indices... */
677 const char *fmt; /* Current rtx's format... */
678 rtx rt_val; /* RTX to return to caller... */
686 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
691 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
692 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
694 rt_val = immed_double_const (arg0, arg1, mode);
699 rt_val = gen_rtx_REG (mode, va_arg (p, int));
703 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
707 rt_val = rtx_alloc (code); /* Allocate the storage space. */
708 rt_val->mode = mode; /* Store the machine mode... */
710 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val, i) = NULL_RTX;
719 case 'i': /* An integer? */
720 XINT (rt_val, i) = va_arg (p, int);
723 case 'w': /* A wide integer? */
724 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
727 case 's': /* A string? */
728 XSTR (rt_val, i) = va_arg (p, char *);
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val, i) = va_arg (p, rtx);
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val, i) = va_arg (p, rtvec);
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val, i) = va_arg (p, bitmap);
744 case 't': /* A tree? */
745 XTREE (rt_val, i) = va_arg (p, tree);
759 /* gen_rtvec (n, [rt1, ..., rtn])
761 ** This routine creates an rtvec and stores within it the
762 ** pointers to rtx's which are its arguments.
767 gen_rtvec (int n, ...)
776 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
778 vector = alloca (n * sizeof (rtx));
780 for (i = 0; i < n; i++)
781 vector[i] = va_arg (p, rtx);
783 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
787 return gen_rtvec_v (save_n, vector);
791 gen_rtvec_v (int n, rtx *argp)
797 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
799 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
801 for (i = 0; i < n; i++)
802 rt_val->elem[i] = *argp++;
807 /* Generate a REG rtx for a new pseudo register of mode MODE.
808 This pseudo is assigned the next sequential register number. */
811 gen_reg_rtx (enum machine_mode mode)
813 struct function *f = cfun;
816 /* Don't let anything called after initial flow analysis create new
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,
828 which makes much better code. Besides, allocating DCmode
829 pseudos overstrains reload on some machines like the 386. */
830 rtx realpart, imagpart;
831 enum machine_mode partmode = GET_MODE_INNER (mode);
833 realpart = gen_reg_rtx (partmode);
834 imagpart = gen_reg_rtx (partmode);
835 return gen_rtx_CONCAT (mode, realpart, imagpart);
838 /* Make sure regno_pointer_align, and regno_reg_rtx are large
839 enough to have an element for this pseudo reg number. */
841 if (reg_rtx_no == f->emit->regno_pointer_align_length)
843 int old_size = f->emit->regno_pointer_align_length;
847 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
848 memset (new + old_size, 0, old_size);
849 f->emit->regno_pointer_align = (unsigned char *) new;
851 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
852 old_size * 2 * sizeof (rtx));
853 memset (new1 + old_size, 0, old_size * sizeof (rtx));
854 regno_reg_rtx = new1;
856 f->emit->regno_pointer_align_length = old_size * 2;
859 val = gen_raw_REG (mode, reg_rtx_no);
860 regno_reg_rtx[reg_rtx_no++] = val;
864 /* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
868 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
870 rtx new = gen_rtx_REG (mode, regno);
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
872 REG_OFFSET (reg) + offset);
876 /* Set the decl for MEM to DECL. */
879 set_reg_attrs_from_mem (rtx reg, rtx mem)
881 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
883 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
886 /* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
890 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
892 if (GET_CODE (parm_rtx) == REG)
893 set_reg_attrs_from_mem (parm_rtx, mem);
894 else if (GET_CODE (parm_rtx) == PARALLEL)
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
899 for (; i < XVECLEN (parm_rtx, 0); i++)
901 rtx x = XVECEXP (parm_rtx, 0, i);
902 if (GET_CODE (XEXP (x, 0)) == REG)
903 REG_ATTRS (XEXP (x, 0))
904 = get_reg_attrs (MEM_EXPR (mem),
905 INTVAL (XEXP (x, 1)));
910 /* Assign the RTX X to declaration T. */
912 set_decl_rtl (tree t, rtx x)
914 DECL_CHECK (t)->decl.rtl = x;
918 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x) == REG)
920 REG_ATTRS (x) = get_reg_attrs (t, 0);
921 else if (GET_CODE (x) == SUBREG)
922 REG_ATTRS (SUBREG_REG (x))
923 = get_reg_attrs (t, -SUBREG_BYTE (x));
924 if (GET_CODE (x) == CONCAT)
926 if (REG_P (XEXP (x, 0)))
927 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
928 if (REG_P (XEXP (x, 1)))
929 REG_ATTRS (XEXP (x, 1))
930 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
932 if (GET_CODE (x) == PARALLEL)
935 for (i = 0; i < XVECLEN (x, 0); i++)
937 rtx y = XVECEXP (x, 0, i);
938 if (REG_P (XEXP (y, 0)))
939 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
944 /* Identify REG (which may be a CONCAT) as a user register. */
947 mark_user_reg (rtx reg)
949 if (GET_CODE (reg) == CONCAT)
951 REG_USERVAR_P (XEXP (reg, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg, 1)) = 1;
954 else if (GET_CODE (reg) == REG)
955 REG_USERVAR_P (reg) = 1;
960 /* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
964 mark_reg_pointer (rtx reg, int align)
966 if (! REG_POINTER (reg))
968 REG_POINTER (reg) = 1;
971 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
973 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
974 /* We can no-longer be sure just how aligned this pointer is */
975 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
978 /* Return 1 plus largest pseudo reg number used in the current function. */
986 /* Return 1 + the largest label number used so far in the current function. */
991 if (last_label_num && label_num == base_label_num)
992 return last_label_num;
996 /* Return first label number used in this function (if any were used). */
999 get_first_label_num (void)
1001 return first_label_num;
1004 /* Return the final regno of X, which is a SUBREG of a hard
1007 subreg_hard_regno (rtx x, int check_mode)
1009 enum machine_mode mode = GET_MODE (x);
1010 unsigned int byte_offset, base_regno, final_regno;
1011 rtx reg = SUBREG_REG (x);
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x) != SUBREG
1016 || GET_CODE (reg) != REG)
1018 base_regno = REGNO (reg);
1019 if (base_regno >= FIRST_PSEUDO_REGISTER)
1021 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1023 #ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1025 SUBREG_BYTE (x), mode))
1028 /* Catch non-congruent offsets too. */
1029 byte_offset = SUBREG_BYTE (x);
1030 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1033 final_regno = subreg_regno (x);
1038 /* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.
1047 If this is not a case we can handle, return 0. */
1050 gen_lowpart_common (enum machine_mode mode, rtx x)
1052 int msize = GET_MODE_SIZE (mode);
1053 int xsize = GET_MODE_SIZE (GET_MODE (x));
1056 if (GET_MODE (x) == mode)
1059 /* MODE must occupy no more words than the mode of X. */
1060 if (GET_MODE (x) != VOIDmode
1061 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1062 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
1065 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1066 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1067 && GET_MODE (x) != VOIDmode && msize > xsize)
1070 offset = subreg_lowpart_offset (mode, GET_MODE (x));
1072 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1073 && (GET_MODE_CLASS (mode) == MODE_INT
1074 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1076 /* If we are getting the low-order part of something that has been
1077 sign- or zero-extended, we can either just use the object being
1078 extended or make a narrower extension. If we want an even smaller
1079 piece than the size of the object being extended, call ourselves
1082 This case is used mostly by combine and cse. */
1084 if (GET_MODE (XEXP (x, 0)) == mode)
1086 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1087 return gen_lowpart_common (mode, XEXP (x, 0));
1088 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
1089 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1091 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1092 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1093 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1094 else if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
1095 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1096 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1097 from the low-order part of the constant. */
1098 else if ((GET_MODE_CLASS (mode) == MODE_INT
1099 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1100 && GET_MODE (x) == VOIDmode
1101 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1103 /* If MODE is twice the host word size, X is already the desired
1104 representation. Otherwise, if MODE is wider than a word, we can't
1105 do this. If MODE is exactly a word, return just one CONST_INT. */
1107 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1109 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1111 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1112 return (GET_CODE (x) == CONST_INT ? x
1113 : GEN_INT (CONST_DOUBLE_LOW (x)));
1116 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1117 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1118 : CONST_DOUBLE_LOW (x));
1120 /* Sign extend to HOST_WIDE_INT. */
1121 val = trunc_int_for_mode (val, mode);
1123 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1128 /* The floating-point emulator can handle all conversions between
1129 FP and integer operands. This simplifies reload because it
1130 doesn't have to deal with constructs like (subreg:DI
1131 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1132 /* Single-precision floats are always 32-bits and double-precision
1133 floats are always 64-bits. */
1135 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1136 && GET_MODE_BITSIZE (mode) == 32
1137 && GET_CODE (x) == CONST_INT)
1140 long i = INTVAL (x);
1142 real_from_target (&r, &i, mode);
1143 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1145 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1146 && GET_MODE_BITSIZE (mode) == 64
1147 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1148 && GET_MODE (x) == VOIDmode)
1151 HOST_WIDE_INT low, high;
1154 if (GET_CODE (x) == CONST_INT)
1157 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1161 low = CONST_DOUBLE_LOW (x);
1162 high = CONST_DOUBLE_HIGH (x);
1165 if (HOST_BITS_PER_WIDE_INT > 32)
1166 high = low >> 31 >> 1;
1168 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1170 if (WORDS_BIG_ENDIAN)
1171 i[0] = high, i[1] = low;
1173 i[0] = low, i[1] = high;
1175 real_from_target (&r, i, mode);
1176 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1178 else if ((GET_MODE_CLASS (mode) == MODE_INT
1179 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1180 && GET_CODE (x) == CONST_DOUBLE
1181 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1184 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1185 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1187 /* Convert 'r' into an array of four 32-bit words in target word
1189 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1190 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1193 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1196 i[3 - 3 * endian] = 0;
1199 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1200 i[2 - 2 * endian] = 0;
1201 i[3 - 2 * endian] = 0;
1204 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1205 i[3 - 3 * endian] = 0;
1208 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1213 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1215 #if HOST_BITS_PER_WIDE_INT == 32
1216 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1218 if (HOST_BITS_PER_WIDE_INT != 64)
1221 return immed_double_const ((((unsigned long) i[3 * endian])
1222 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1223 (((unsigned long) i[2 - endian])
1224 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1228 /* If MODE is a condition code and X is a CONST_INT, the value of X
1229 must already have been "recognized" by the back-end, and we can
1230 assume that it is valid for this mode. */
1231 else if (GET_MODE_CLASS (mode) == MODE_CC
1232 && GET_CODE (x) == CONST_INT)
1235 /* Otherwise, we can't do this. */
1239 /* Return the constant real or imaginary part (which has mode MODE)
1240 of a complex value X. The IMAGPART_P argument determines whether
1241 the real or complex component should be returned. This function
1242 returns NULL_RTX if the component isn't a constant. */
1245 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1249 if (GET_CODE (x) == MEM
1250 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1252 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1253 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1255 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1256 if (TREE_CODE (part) == REAL_CST
1257 || TREE_CODE (part) == INTEGER_CST)
1258 return expand_expr (part, NULL_RTX, mode, 0);
1264 /* Return the real part (which has mode MODE) of a complex value X.
1265 This always comes at the low address in memory. */
1268 gen_realpart (enum machine_mode mode, rtx x)
1272 /* Handle complex constants. */
1273 part = gen_complex_constant_part (mode, x, 0);
1274 if (part != NULL_RTX)
1277 if (WORDS_BIG_ENDIAN
1278 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1280 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1282 ("can't access real part of complex value in hard register");
1283 else if (WORDS_BIG_ENDIAN)
1284 return gen_highpart (mode, x);
1286 return gen_lowpart (mode, x);
1289 /* Return the imaginary part (which has mode MODE) of a complex value X.
1290 This always comes at the high address in memory. */
1293 gen_imagpart (enum machine_mode mode, rtx x)
1297 /* Handle complex constants. */
1298 part = gen_complex_constant_part (mode, x, 1);
1299 if (part != NULL_RTX)
1302 if (WORDS_BIG_ENDIAN)
1303 return gen_lowpart (mode, x);
1304 else if (! WORDS_BIG_ENDIAN
1305 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1307 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1309 ("can't access imaginary part of complex value in hard register");
1311 return gen_highpart (mode, x);
1314 /* Return 1 iff X, assumed to be a SUBREG,
1315 refers to the real part of the complex value in its containing reg.
1316 Complex values are always stored with the real part in the first word,
1317 regardless of WORDS_BIG_ENDIAN. */
1320 subreg_realpart_p (rtx x)
1322 if (GET_CODE (x) != SUBREG)
1325 return ((unsigned int) SUBREG_BYTE (x)
1326 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1329 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1330 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1331 least-significant part of X.
1332 MODE specifies how big a part of X to return;
1333 it usually should not be larger than a word.
1334 If X is a MEM whose address is a QUEUED, the value may be so also. */
1337 gen_lowpart (enum machine_mode mode, rtx x)
1339 rtx result = gen_lowpart_common (mode, x);
1343 else if (GET_CODE (x) == REG)
1345 /* Must be a hard reg that's not valid in MODE. */
1346 result = gen_lowpart_common (mode, copy_to_reg (x));
1351 else if (GET_CODE (x) == MEM)
1353 /* The only additional case we can do is MEM. */
1356 /* The following exposes the use of "x" to CSE. */
1357 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1358 && SCALAR_INT_MODE_P (GET_MODE (x))
1359 && ! no_new_pseudos)
1360 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1362 if (WORDS_BIG_ENDIAN)
1363 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1364 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1366 if (BYTES_BIG_ENDIAN)
1367 /* Adjust the address so that the address-after-the-data
1369 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1370 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1372 return adjust_address (x, mode, offset);
1374 else if (GET_CODE (x) == ADDRESSOF)
1375 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1380 /* Like `gen_lowpart', but refer to the most significant part.
1381 This is used to access the imaginary part of a complex number. */
1384 gen_highpart (enum machine_mode mode, rtx x)
1386 unsigned int msize = GET_MODE_SIZE (mode);
1389 /* This case loses if X is a subreg. To catch bugs early,
1390 complain if an invalid MODE is used even in other cases. */
1391 if (msize > UNITS_PER_WORD
1392 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1395 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1396 subreg_highpart_offset (mode, GET_MODE (x)));
1398 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1399 the target if we have a MEM. gen_highpart must return a valid operand,
1400 emitting code if necessary to do so. */
1401 if (result != NULL_RTX && GET_CODE (result) == MEM)
1402 result = validize_mem (result);
1409 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1410 be VOIDmode constant. */
1412 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1414 if (GET_MODE (exp) != VOIDmode)
1416 if (GET_MODE (exp) != innermode)
1418 return gen_highpart (outermode, exp);
1420 return simplify_gen_subreg (outermode, exp, innermode,
1421 subreg_highpart_offset (outermode, innermode));
1424 /* Return offset in bytes to get OUTERMODE low part
1425 of the value in mode INNERMODE stored in memory in target format. */
1428 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1430 unsigned int offset = 0;
1431 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1435 if (WORDS_BIG_ENDIAN)
1436 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1437 if (BYTES_BIG_ENDIAN)
1438 offset += difference % UNITS_PER_WORD;
1444 /* Return offset in bytes to get OUTERMODE high part
1445 of the value in mode INNERMODE stored in memory in target format. */
1447 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1449 unsigned int offset = 0;
1450 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1452 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1457 if (! WORDS_BIG_ENDIAN)
1458 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1459 if (! BYTES_BIG_ENDIAN)
1460 offset += difference % UNITS_PER_WORD;
1466 /* Return 1 iff X, assumed to be a SUBREG,
1467 refers to the least significant part of its containing reg.
1468 If X is not a SUBREG, always return 1 (it is its own low part!). */
1471 subreg_lowpart_p (rtx x)
1473 if (GET_CODE (x) != SUBREG)
1475 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1478 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1479 == SUBREG_BYTE (x));
1483 /* Helper routine for all the constant cases of operand_subword.
1484 Some places invoke this directly. */
1487 constant_subword (rtx op, int offset, enum machine_mode mode)
1489 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1492 /* If OP is already an integer word, return it. */
1493 if (GET_MODE_CLASS (mode) == MODE_INT
1494 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1497 /* The output is some bits, the width of the target machine's word.
1498 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1500 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1501 && GET_MODE_CLASS (mode) == MODE_FLOAT
1502 && GET_MODE_BITSIZE (mode) == 64
1503 && GET_CODE (op) == CONST_DOUBLE)
1508 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1509 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1511 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1512 which the words are written depends on the word endianness.
1513 ??? This is a potential portability problem and should
1514 be fixed at some point.
1516 We must exercise caution with the sign bit. By definition there
1517 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1518 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1519 So we explicitly mask and sign-extend as necessary. */
1520 if (BITS_PER_WORD == 32)
1523 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1524 return GEN_INT (val);
1526 #if HOST_BITS_PER_WIDE_INT >= 64
1527 else if (BITS_PER_WORD >= 64 && offset == 0)
1529 val = k[! WORDS_BIG_ENDIAN];
1530 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1531 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1532 return GEN_INT (val);
1535 else if (BITS_PER_WORD == 16)
1537 val = k[offset >> 1];
1538 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1540 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1541 return GEN_INT (val);
1546 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1547 && GET_MODE_CLASS (mode) == MODE_FLOAT
1548 && GET_MODE_BITSIZE (mode) > 64
1549 && GET_CODE (op) == CONST_DOUBLE)
1554 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1555 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1557 if (BITS_PER_WORD == 32)
1560 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1561 return GEN_INT (val);
1563 #if HOST_BITS_PER_WIDE_INT >= 64
1564 else if (BITS_PER_WORD >= 64 && offset <= 1)
1566 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1567 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1568 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1569 return GEN_INT (val);
1576 /* Single word float is a little harder, since single- and double-word
1577 values often do not have the same high-order bits. We have already
1578 verified that we want the only defined word of the single-word value. */
1579 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1580 && GET_MODE_BITSIZE (mode) == 32
1581 && GET_CODE (op) == CONST_DOUBLE)
1586 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1587 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1589 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1591 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1593 if (BITS_PER_WORD == 16)
1595 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1597 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1600 return GEN_INT (val);
1603 /* The only remaining cases that we can handle are integers.
1604 Convert to proper endianness now since these cases need it.
1605 At this point, offset == 0 means the low-order word.
1607 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1608 in general. However, if OP is (const_int 0), we can just return
1611 if (op == const0_rtx)
1614 if (GET_MODE_CLASS (mode) != MODE_INT
1615 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1616 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1619 if (WORDS_BIG_ENDIAN)
1620 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1622 /* Find out which word on the host machine this value is in and get
1623 it from the constant. */
1624 val = (offset / size_ratio == 0
1625 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1626 : (GET_CODE (op) == CONST_INT
1627 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1629 /* Get the value we want into the low bits of val. */
1630 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1631 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1633 val = trunc_int_for_mode (val, word_mode);
1635 return GEN_INT (val);
1638 /* Return subword OFFSET of operand OP.
1639 The word number, OFFSET, is interpreted as the word number starting
1640 at the low-order address. OFFSET 0 is the low-order word if not
1641 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1643 If we cannot extract the required word, we return zero. Otherwise,
1644 an rtx corresponding to the requested word will be returned.
1646 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1647 reload has completed, a valid address will always be returned. After
1648 reload, if a valid address cannot be returned, we return zero.
1650 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1651 it is the responsibility of the caller.
1653 MODE is the mode of OP in case it is a CONST_INT.
1655 ??? This is still rather broken for some cases. The problem for the
1656 moment is that all callers of this thing provide no 'goal mode' to
1657 tell us to work with. This exists because all callers were written
1658 in a word based SUBREG world.
1659 Now use of this function can be deprecated by simplify_subreg in most
1664 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1666 if (mode == VOIDmode)
1667 mode = GET_MODE (op);
1669 if (mode == VOIDmode)
1672 /* If OP is narrower than a word, fail. */
1674 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1677 /* If we want a word outside OP, return zero. */
1679 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1682 /* Form a new MEM at the requested address. */
1683 if (GET_CODE (op) == MEM)
1685 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1687 if (! validate_address)
1690 else if (reload_completed)
1692 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1696 return replace_equiv_address (new, XEXP (new, 0));
1699 /* Rest can be handled by simplify_subreg. */
1700 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1703 /* Similar to `operand_subword', but never return 0. If we can't extract
1704 the required subword, put OP into a register and try again. If that fails,
1705 abort. We always validate the address in this case.
1707 MODE is the mode of OP, in case it is CONST_INT. */
1710 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1712 rtx result = operand_subword (op, offset, 1, mode);
1717 if (mode != BLKmode && mode != VOIDmode)
1719 /* If this is a register which can not be accessed by words, copy it
1720 to a pseudo register. */
1721 if (GET_CODE (op) == REG)
1722 op = copy_to_reg (op);
1724 op = force_reg (mode, op);
1727 result = operand_subword (op, offset, 1, mode);
1734 /* Given a compare instruction, swap the operands.
1735 A test instruction is changed into a compare of 0 against the operand. */
1738 reverse_comparison (rtx insn)
1740 rtx body = PATTERN (insn);
1743 if (GET_CODE (body) == SET)
1744 comp = SET_SRC (body);
1746 comp = SET_SRC (XVECEXP (body, 0, 0));
1748 if (GET_CODE (comp) == COMPARE)
1750 rtx op0 = XEXP (comp, 0);
1751 rtx op1 = XEXP (comp, 1);
1752 XEXP (comp, 0) = op1;
1753 XEXP (comp, 1) = op0;
1757 rtx new = gen_rtx_COMPARE (VOIDmode,
1758 CONST0_RTX (GET_MODE (comp)), comp);
1759 if (GET_CODE (body) == SET)
1760 SET_SRC (body) = new;
1762 SET_SRC (XVECEXP (body, 0, 0)) = new;
1766 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1767 or (2) a component ref of something variable. Represent the later with
1768 a NULL expression. */
1771 component_ref_for_mem_expr (tree ref)
1773 tree inner = TREE_OPERAND (ref, 0);
1775 if (TREE_CODE (inner) == COMPONENT_REF)
1776 inner = component_ref_for_mem_expr (inner);
1779 tree placeholder_ptr = 0;
1781 /* Now remove any conversions: they don't change what the underlying
1782 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1783 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1784 || TREE_CODE (inner) == NON_LVALUE_EXPR
1785 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1786 || TREE_CODE (inner) == SAVE_EXPR
1787 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1788 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1789 inner = find_placeholder (inner, &placeholder_ptr);
1791 inner = TREE_OPERAND (inner, 0);
1793 if (! DECL_P (inner))
1797 if (inner == TREE_OPERAND (ref, 0))
1800 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1801 TREE_OPERAND (ref, 1));
1804 /* Given REF, a MEM, and T, either the type of X or the expression
1805 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1806 if we are making a new object of this type. BITPOS is nonzero if
1807 there is an offset outstanding on T that will be applied later. */
1810 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1811 HOST_WIDE_INT bitpos)
1813 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1814 tree expr = MEM_EXPR (ref);
1815 rtx offset = MEM_OFFSET (ref);
1816 rtx size = MEM_SIZE (ref);
1817 unsigned int align = MEM_ALIGN (ref);
1818 HOST_WIDE_INT apply_bitpos = 0;
1821 /* It can happen that type_for_mode was given a mode for which there
1822 is no language-level type. In which case it returns NULL, which
1827 type = TYPE_P (t) ? t : TREE_TYPE (t);
1829 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1830 wrong answer, as it assumes that DECL_RTL already has the right alias
1831 info. Callers should not set DECL_RTL until after the call to
1832 set_mem_attributes. */
1833 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1836 /* Get the alias set from the expression or type (perhaps using a
1837 front-end routine) and use it. */
1838 alias = get_alias_set (t);
1840 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1841 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1842 RTX_UNCHANGING_P (ref)
1843 |= ((lang_hooks.honor_readonly
1844 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1845 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1847 /* If we are making an object of this type, or if this is a DECL, we know
1848 that it is a scalar if the type is not an aggregate. */
1849 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1850 MEM_SCALAR_P (ref) = 1;
1852 /* We can set the alignment from the type if we are making an object,
1853 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1854 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1855 align = MAX (align, TYPE_ALIGN (type));
1857 /* If the size is known, we can set that. */
1858 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1859 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1861 /* If T is not a type, we may be able to deduce some more information about
1865 maybe_set_unchanging (ref, t);
1866 if (TREE_THIS_VOLATILE (t))
1867 MEM_VOLATILE_P (ref) = 1;
1869 /* Now remove any conversions: they don't change what the underlying
1870 object is. Likewise for SAVE_EXPR. */
1871 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1872 || TREE_CODE (t) == NON_LVALUE_EXPR
1873 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1874 || TREE_CODE (t) == SAVE_EXPR)
1875 t = TREE_OPERAND (t, 0);
1877 /* If this expression can't be addressed (e.g., it contains a reference
1878 to a non-addressable field), show we don't change its alias set. */
1879 if (! can_address_p (t))
1880 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1882 /* If this is a decl, set the attributes of the MEM from it. */
1886 offset = const0_rtx;
1887 apply_bitpos = bitpos;
1888 size = (DECL_SIZE_UNIT (t)
1889 && host_integerp (DECL_SIZE_UNIT (t), 1)
1890 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1891 align = DECL_ALIGN (t);
1894 /* If this is a constant, we know the alignment. */
1895 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1897 align = TYPE_ALIGN (type);
1898 #ifdef CONSTANT_ALIGNMENT
1899 align = CONSTANT_ALIGNMENT (t, align);
1903 /* If this is a field reference and not a bit-field, record it. */
1904 /* ??? There is some information that can be gleened from bit-fields,
1905 such as the word offset in the structure that might be modified.
1906 But skip it for now. */
1907 else if (TREE_CODE (t) == COMPONENT_REF
1908 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1910 expr = component_ref_for_mem_expr (t);
1911 offset = const0_rtx;
1912 apply_bitpos = bitpos;
1913 /* ??? Any reason the field size would be different than
1914 the size we got from the type? */
1917 /* If this is an array reference, look for an outer field reference. */
1918 else if (TREE_CODE (t) == ARRAY_REF)
1920 tree off_tree = size_zero_node;
1921 /* We can't modify t, because we use it at the end of the
1927 tree index = TREE_OPERAND (t2, 1);
1928 tree array = TREE_OPERAND (t2, 0);
1929 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1930 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1931 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1933 /* We assume all arrays have sizes that are a multiple of a byte.
1934 First subtract the lower bound, if any, in the type of the
1935 index, then convert to sizetype and multiply by the size of the
1937 if (low_bound != 0 && ! integer_zerop (low_bound))
1938 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1941 /* If the index has a self-referential type, pass it to a
1942 WITH_RECORD_EXPR; if the component size is, pass our
1943 component to one. */
1944 if (CONTAINS_PLACEHOLDER_P (index))
1945 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1946 if (CONTAINS_PLACEHOLDER_P (unit_size))
1947 unit_size = build (WITH_RECORD_EXPR, sizetype,
1951 = fold (build (PLUS_EXPR, sizetype,
1952 fold (build (MULT_EXPR, sizetype,
1956 t2 = TREE_OPERAND (t2, 0);
1958 while (TREE_CODE (t2) == ARRAY_REF);
1964 if (host_integerp (off_tree, 1))
1966 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1967 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1968 align = DECL_ALIGN (t2);
1969 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1971 offset = GEN_INT (ioff);
1972 apply_bitpos = bitpos;
1975 else if (TREE_CODE (t2) == COMPONENT_REF)
1977 expr = component_ref_for_mem_expr (t2);
1978 if (host_integerp (off_tree, 1))
1980 offset = GEN_INT (tree_low_cst (off_tree, 1));
1981 apply_bitpos = bitpos;
1983 /* ??? Any reason the field size would be different than
1984 the size we got from the type? */
1986 else if (flag_argument_noalias > 1
1987 && TREE_CODE (t2) == INDIRECT_REF
1988 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1995 /* If this is a Fortran indirect argument reference, record the
1997 else if (flag_argument_noalias > 1
1998 && TREE_CODE (t) == INDIRECT_REF
1999 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2006 /* If we modified OFFSET based on T, then subtract the outstanding
2007 bit position offset. Similarly, increase the size of the accessed
2008 object to contain the negative offset. */
2011 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
2013 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
2016 /* Now set the attributes we computed above. */
2018 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
2020 /* If this is already known to be a scalar or aggregate, we are done. */
2021 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
2024 /* If it is a reference into an aggregate, this is part of an aggregate.
2025 Otherwise we don't know. */
2026 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
2027 || TREE_CODE (t) == ARRAY_RANGE_REF
2028 || TREE_CODE (t) == BIT_FIELD_REF)
2029 MEM_IN_STRUCT_P (ref) = 1;
2033 set_mem_attributes (rtx ref, tree t, int objectp)
2035 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2038 /* Set the decl for MEM to DECL. */
2041 set_mem_attrs_from_reg (rtx mem, rtx reg)
2044 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
2045 GEN_INT (REG_OFFSET (reg)),
2046 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2049 /* Set the alias set of MEM to SET. */
2052 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
2054 #ifdef ENABLE_CHECKING
2055 /* If the new and old alias sets don't conflict, something is wrong. */
2056 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
2060 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
2061 MEM_SIZE (mem), MEM_ALIGN (mem),
2065 /* Set the alignment of MEM to ALIGN bits. */
2068 set_mem_align (rtx mem, unsigned int align)
2070 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2071 MEM_OFFSET (mem), MEM_SIZE (mem), align,
2075 /* Set the expr for MEM to EXPR. */
2078 set_mem_expr (rtx mem, tree expr)
2081 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
2082 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2085 /* Set the offset of MEM to OFFSET. */
2088 set_mem_offset (rtx mem, rtx offset)
2090 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2091 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
2095 /* Set the size of MEM to SIZE. */
2098 set_mem_size (rtx mem, rtx size)
2100 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2101 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
2105 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2106 and its address changed to ADDR. (VOIDmode means don't change the mode.
2107 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2108 returned memory location is required to be valid. The memory
2109 attributes are not changed. */
2112 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
2116 if (GET_CODE (memref) != MEM)
2118 if (mode == VOIDmode)
2119 mode = GET_MODE (memref);
2121 addr = XEXP (memref, 0);
2125 if (reload_in_progress || reload_completed)
2127 if (! memory_address_p (mode, addr))
2131 addr = memory_address (mode, addr);
2134 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2137 new = gen_rtx_MEM (mode, addr);
2138 MEM_COPY_ATTRIBUTES (new, memref);
2142 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2143 way we are changing MEMREF, so we only preserve the alias set. */
2146 change_address (rtx memref, enum machine_mode mode, rtx addr)
2148 rtx new = change_address_1 (memref, mode, addr, 1);
2149 enum machine_mode mmode = GET_MODE (new);
2152 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2153 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2154 (mmode == BLKmode ? BITS_PER_UNIT
2155 : GET_MODE_ALIGNMENT (mmode)),
2161 /* Return a memory reference like MEMREF, but with its mode changed
2162 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2163 nonzero, the memory address is forced to be valid.
2164 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2165 and caller is responsible for adjusting MEMREF base register. */
2168 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2169 int validate, int adjust)
2171 rtx addr = XEXP (memref, 0);
2173 rtx memoffset = MEM_OFFSET (memref);
2175 unsigned int memalign = MEM_ALIGN (memref);
2177 /* ??? Prefer to create garbage instead of creating shared rtl.
2178 This may happen even if offset is nonzero -- consider
2179 (plus (plus reg reg) const_int) -- so do this always. */
2180 addr = copy_rtx (addr);
2184 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2185 object, we can merge it into the LO_SUM. */
2186 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2188 && (unsigned HOST_WIDE_INT) offset
2189 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2190 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2191 plus_constant (XEXP (addr, 1), offset));
2193 addr = plus_constant (addr, offset);
2196 new = change_address_1 (memref, mode, addr, validate);
2198 /* Compute the new values of the memory attributes due to this adjustment.
2199 We add the offsets and update the alignment. */
2201 memoffset = GEN_INT (offset + INTVAL (memoffset));
2203 /* Compute the new alignment by taking the MIN of the alignment and the
2204 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2209 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2211 /* We can compute the size in a number of ways. */
2212 if (GET_MODE (new) != BLKmode)
2213 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2214 else if (MEM_SIZE (memref))
2215 size = plus_constant (MEM_SIZE (memref), -offset);
2217 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2218 memoffset, size, memalign, GET_MODE (new));
2220 /* At some point, we should validate that this offset is within the object,
2221 if all the appropriate values are known. */
2225 /* Return a memory reference like MEMREF, but with its mode changed
2226 to MODE and its address changed to ADDR, which is assumed to be
2227 MEMREF offseted by OFFSET bytes. If VALIDATE is
2228 nonzero, the memory address is forced to be valid. */
2231 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2232 HOST_WIDE_INT offset, int validate)
2234 memref = change_address_1 (memref, VOIDmode, addr, validate);
2235 return adjust_address_1 (memref, mode, offset, validate, 0);
2238 /* Return a memory reference like MEMREF, but whose address is changed by
2239 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2240 known to be in OFFSET (possibly 1). */
2243 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2245 rtx new, addr = XEXP (memref, 0);
2247 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2249 /* At this point we don't know _why_ the address is invalid. It
2250 could have secondary memory references, multiplies or anything.
2252 However, if we did go and rearrange things, we can wind up not
2253 being able to recognize the magic around pic_offset_table_rtx.
2254 This stuff is fragile, and is yet another example of why it is
2255 bad to expose PIC machinery too early. */
2256 if (! memory_address_p (GET_MODE (memref), new)
2257 && GET_CODE (addr) == PLUS
2258 && XEXP (addr, 0) == pic_offset_table_rtx)
2260 addr = force_reg (GET_MODE (addr), addr);
2261 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2264 update_temp_slot_address (XEXP (memref, 0), new);
2265 new = change_address_1 (memref, VOIDmode, new, 1);
2267 /* Update the alignment to reflect the offset. Reset the offset, which
2270 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2271 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2276 /* Return a memory reference like MEMREF, but with its address changed to
2277 ADDR. The caller is asserting that the actual piece of memory pointed
2278 to is the same, just the form of the address is being changed, such as
2279 by putting something into a register. */
2282 replace_equiv_address (rtx memref, rtx addr)
2284 /* change_address_1 copies the memory attribute structure without change
2285 and that's exactly what we want here. */
2286 update_temp_slot_address (XEXP (memref, 0), addr);
2287 return change_address_1 (memref, VOIDmode, addr, 1);
2290 /* Likewise, but the reference is not required to be valid. */
2293 replace_equiv_address_nv (rtx memref, rtx addr)
2295 return change_address_1 (memref, VOIDmode, addr, 0);
2298 /* Return a memory reference like MEMREF, but with its mode widened to
2299 MODE and offset by OFFSET. This would be used by targets that e.g.
2300 cannot issue QImode memory operations and have to use SImode memory
2301 operations plus masking logic. */
2304 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2306 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2307 tree expr = MEM_EXPR (new);
2308 rtx memoffset = MEM_OFFSET (new);
2309 unsigned int size = GET_MODE_SIZE (mode);
2311 /* If we don't know what offset we were at within the expression, then
2312 we can't know if we've overstepped the bounds. */
2318 if (TREE_CODE (expr) == COMPONENT_REF)
2320 tree field = TREE_OPERAND (expr, 1);
2322 if (! DECL_SIZE_UNIT (field))
2328 /* Is the field at least as large as the access? If so, ok,
2329 otherwise strip back to the containing structure. */
2330 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2331 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2332 && INTVAL (memoffset) >= 0)
2335 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2341 expr = TREE_OPERAND (expr, 0);
2342 memoffset = (GEN_INT (INTVAL (memoffset)
2343 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2344 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2347 /* Similarly for the decl. */
2348 else if (DECL_P (expr)
2349 && DECL_SIZE_UNIT (expr)
2350 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2351 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2352 && (! memoffset || INTVAL (memoffset) >= 0))
2356 /* The widened memory access overflows the expression, which means
2357 that it could alias another expression. Zap it. */
2364 memoffset = NULL_RTX;
2366 /* The widened memory may alias other stuff, so zap the alias set. */
2367 /* ??? Maybe use get_alias_set on any remaining expression. */
2369 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2370 MEM_ALIGN (new), mode);
2375 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2378 gen_label_rtx (void)
2380 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2381 NULL, label_num++, NULL);
2384 /* For procedure integration. */
2386 /* Install new pointers to the first and last insns in the chain.
2387 Also, set cur_insn_uid to one higher than the last in use.
2388 Used for an inline-procedure after copying the insn chain. */
2391 set_new_first_and_last_insn (rtx first, rtx last)
2399 for (insn = first; insn; insn = NEXT_INSN (insn))
2400 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2405 /* Set the range of label numbers found in the current function.
2406 This is used when belatedly compiling an inline function. */
2409 set_new_first_and_last_label_num (int first, int last)
2411 base_label_num = label_num;
2412 first_label_num = first;
2413 last_label_num = last;
2416 /* Set the last label number found in the current function.
2417 This is used when belatedly compiling an inline function. */
2420 set_new_last_label_num (int last)
2422 base_label_num = label_num;
2423 last_label_num = last;
2426 /* Restore all variables describing the current status from the structure *P.
2427 This is used after a nested function. */
2430 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2435 /* Go through all the RTL insn bodies and copy any invalid shared
2436 structure. This routine should only be called once. */
2439 unshare_all_rtl (tree fndecl, rtx insn)
2443 /* Make sure that virtual parameters are not shared. */
2444 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2445 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2447 /* Make sure that virtual stack slots are not shared. */
2448 unshare_all_decls (DECL_INITIAL (fndecl));
2450 /* Unshare just about everything else. */
2451 unshare_all_rtl_1 (insn);
2453 /* Make sure the addresses of stack slots found outside the insn chain
2454 (such as, in DECL_RTL of a variable) are not shared
2455 with the insn chain.
2457 This special care is necessary when the stack slot MEM does not
2458 actually appear in the insn chain. If it does appear, its address
2459 is unshared from all else at that point. */
2460 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2463 /* Go through all the RTL insn bodies and copy any invalid shared
2464 structure, again. This is a fairly expensive thing to do so it
2465 should be done sparingly. */
2468 unshare_all_rtl_again (rtx insn)
2473 for (p = insn; p; p = NEXT_INSN (p))
2476 reset_used_flags (PATTERN (p));
2477 reset_used_flags (REG_NOTES (p));
2478 reset_used_flags (LOG_LINKS (p));
2481 /* Make sure that virtual stack slots are not shared. */
2482 reset_used_decls (DECL_INITIAL (cfun->decl));
2484 /* Make sure that virtual parameters are not shared. */
2485 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2486 reset_used_flags (DECL_RTL (decl));
2488 reset_used_flags (stack_slot_list);
2490 unshare_all_rtl (cfun->decl, insn);
2493 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2494 Assumes the mark bits are cleared at entry. */
2497 unshare_all_rtl_1 (rtx insn)
2499 for (; insn; insn = NEXT_INSN (insn))
2502 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2503 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2504 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2508 /* Go through all virtual stack slots of a function and copy any
2509 shared structure. */
2511 unshare_all_decls (tree blk)
2515 /* Copy shared decls. */
2516 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2517 if (DECL_RTL_SET_P (t))
2518 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2520 /* Now process sub-blocks. */
2521 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2522 unshare_all_decls (t);
2525 /* Go through all virtual stack slots of a function and mark them as
2528 reset_used_decls (tree blk)
2533 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2534 if (DECL_RTL_SET_P (t))
2535 reset_used_flags (DECL_RTL (t));
2537 /* Now process sub-blocks. */
2538 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2539 reset_used_decls (t);
2542 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2543 placed in the result directly, rather than being copied. MAY_SHARE is
2544 either a MEM of an EXPR_LIST of MEMs. */
2547 copy_most_rtx (rtx orig, rtx may_share)
2552 const char *format_ptr;
2554 if (orig == may_share
2555 || (GET_CODE (may_share) == EXPR_LIST
2556 && in_expr_list_p (may_share, orig)))
2559 code = GET_CODE (orig);
2577 copy = rtx_alloc (code);
2578 PUT_MODE (copy, GET_MODE (orig));
2579 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2580 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2581 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2582 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2583 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2585 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2587 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2589 switch (*format_ptr++)
2592 XEXP (copy, i) = XEXP (orig, i);
2593 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2594 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2598 XEXP (copy, i) = XEXP (orig, i);
2603 XVEC (copy, i) = XVEC (orig, i);
2604 if (XVEC (orig, i) != NULL)
2606 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2607 for (j = 0; j < XVECLEN (copy, i); j++)
2608 XVECEXP (copy, i, j)
2609 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2614 XWINT (copy, i) = XWINT (orig, i);
2619 XINT (copy, i) = XINT (orig, i);
2623 XTREE (copy, i) = XTREE (orig, i);
2628 XSTR (copy, i) = XSTR (orig, i);
2632 X0ANY (copy, i) = X0ANY (orig, i);
2642 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2643 Recursively does the same for subexpressions. */
2646 copy_rtx_if_shared (rtx orig)
2651 const char *format_ptr;
2657 code = GET_CODE (x);
2659 /* These types may be freely shared. */
2673 /* SCRATCH must be shared because they represent distinct values. */
2677 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2678 a LABEL_REF, it isn't sharable. */
2679 if (GET_CODE (XEXP (x, 0)) == PLUS
2680 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2681 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2690 /* The chain of insns is not being copied. */
2694 /* A MEM is allowed to be shared if its address is constant.
2696 We used to allow sharing of MEMs which referenced
2697 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2698 that can lose. instantiate_virtual_regs will not unshare
2699 the MEMs, and combine may change the structure of the address
2700 because it looks safe and profitable in one context, but
2701 in some other context it creates unrecognizable RTL. */
2702 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2711 /* This rtx may not be shared. If it has already been seen,
2712 replace it with a copy of itself. */
2714 if (RTX_FLAG (x, used))
2718 copy = rtx_alloc (code);
2719 memcpy (copy, x, RTX_SIZE (code));
2723 RTX_FLAG (x, used) = 1;
2725 /* Now scan the subexpressions recursively.
2726 We can store any replaced subexpressions directly into X
2727 since we know X is not shared! Any vectors in X
2728 must be copied if X was copied. */
2730 format_ptr = GET_RTX_FORMAT (code);
2732 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2734 switch (*format_ptr++)
2737 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2741 if (XVEC (x, i) != NULL)
2744 int len = XVECLEN (x, i);
2746 if (copied && len > 0)
2747 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2748 for (j = 0; j < len; j++)
2749 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2757 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2758 to look for shared sub-parts. */
2761 reset_used_flags (rtx x)
2765 const char *format_ptr;
2770 code = GET_CODE (x);
2772 /* These types may be freely shared so we needn't do any resetting
2794 /* The chain of insns is not being copied. */
2801 RTX_FLAG (x, used) = 0;
2803 format_ptr = GET_RTX_FORMAT (code);
2804 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2806 switch (*format_ptr++)
2809 reset_used_flags (XEXP (x, i));
2813 for (j = 0; j < XVECLEN (x, i); j++)
2814 reset_used_flags (XVECEXP (x, i, j));
2820 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2821 Return X or the rtx for the pseudo reg the value of X was copied into.
2822 OTHER must be valid as a SET_DEST. */
2825 make_safe_from (rtx x, rtx other)
2828 switch (GET_CODE (other))
2831 other = SUBREG_REG (other);
2833 case STRICT_LOW_PART:
2836 other = XEXP (other, 0);
2842 if ((GET_CODE (other) == MEM
2844 && GET_CODE (x) != REG
2845 && GET_CODE (x) != SUBREG)
2846 || (GET_CODE (other) == REG
2847 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2848 || reg_mentioned_p (other, x))))
2850 rtx temp = gen_reg_rtx (GET_MODE (x));
2851 emit_move_insn (temp, x);
2857 /* Emission of insns (adding them to the doubly-linked list). */
2859 /* Return the first insn of the current sequence or current function. */
2867 /* Specify a new insn as the first in the chain. */
2870 set_first_insn (rtx insn)
2872 if (PREV_INSN (insn) != 0)
2877 /* Return the last insn emitted in current sequence or current function. */
2880 get_last_insn (void)
2885 /* Specify a new insn as the last in the chain. */
2888 set_last_insn (rtx insn)
2890 if (NEXT_INSN (insn) != 0)
2895 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2898 get_last_insn_anywhere (void)
2900 struct sequence_stack *stack;
2903 for (stack = seq_stack; stack; stack = stack->next)
2904 if (stack->last != 0)
2909 /* Return the first nonnote insn emitted in current sequence or current
2910 function. This routine looks inside SEQUENCEs. */
2913 get_first_nonnote_insn (void)
2915 rtx insn = first_insn;
2919 insn = next_insn (insn);
2920 if (insn == 0 || GET_CODE (insn) != NOTE)
2927 /* Return the last nonnote insn emitted in current sequence or current
2928 function. This routine looks inside SEQUENCEs. */
2931 get_last_nonnote_insn (void)
2933 rtx insn = last_insn;
2937 insn = previous_insn (insn);
2938 if (insn == 0 || GET_CODE (insn) != NOTE)
2945 /* Return a number larger than any instruction's uid in this function. */
2950 return cur_insn_uid;
2953 /* Renumber instructions so that no instruction UIDs are wasted. */
2956 renumber_insns (FILE *stream)
2960 /* If we're not supposed to renumber instructions, don't. */
2961 if (!flag_renumber_insns)
2964 /* If there aren't that many instructions, then it's not really
2965 worth renumbering them. */
2966 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2971 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2974 fprintf (stream, "Renumbering insn %d to %d\n",
2975 INSN_UID (insn), cur_insn_uid);
2976 INSN_UID (insn) = cur_insn_uid++;
2980 /* Return the next insn. If it is a SEQUENCE, return the first insn
2984 next_insn (rtx insn)
2988 insn = NEXT_INSN (insn);
2989 if (insn && GET_CODE (insn) == INSN
2990 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2991 insn = XVECEXP (PATTERN (insn), 0, 0);
2997 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3001 previous_insn (rtx insn)
3005 insn = PREV_INSN (insn);
3006 if (insn && GET_CODE (insn) == INSN
3007 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3008 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3014 /* Return the next insn after INSN that is not a NOTE. This routine does not
3015 look inside SEQUENCEs. */
3018 next_nonnote_insn (rtx insn)
3022 insn = NEXT_INSN (insn);
3023 if (insn == 0 || GET_CODE (insn) != NOTE)
3030 /* Return the previous insn before INSN that is not a NOTE. This routine does
3031 not look inside SEQUENCEs. */
3034 prev_nonnote_insn (rtx insn)
3038 insn = PREV_INSN (insn);
3039 if (insn == 0 || GET_CODE (insn) != NOTE)
3046 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3047 or 0, if there is none. This routine does not look inside
3051 next_real_insn (rtx insn)
3055 insn = NEXT_INSN (insn);
3056 if (insn == 0 || GET_CODE (insn) == INSN
3057 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3064 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3065 or 0, if there is none. This routine does not look inside
3069 prev_real_insn (rtx insn)
3073 insn = PREV_INSN (insn);
3074 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3075 || GET_CODE (insn) == JUMP_INSN)
3082 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3083 This routine does not look inside SEQUENCEs. */
3086 last_call_insn (void)
3090 for (insn = get_last_insn ();
3091 insn && GET_CODE (insn) != CALL_INSN;
3092 insn = PREV_INSN (insn))
3098 /* Find the next insn after INSN that really does something. This routine
3099 does not look inside SEQUENCEs. Until reload has completed, this is the
3100 same as next_real_insn. */
3103 active_insn_p (rtx insn)
3105 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3106 || (GET_CODE (insn) == INSN
3107 && (! reload_completed
3108 || (GET_CODE (PATTERN (insn)) != USE
3109 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3113 next_active_insn (rtx insn)
3117 insn = NEXT_INSN (insn);
3118 if (insn == 0 || active_insn_p (insn))
3125 /* Find the last insn before INSN that really does something. This routine
3126 does not look inside SEQUENCEs. Until reload has completed, this is the
3127 same as prev_real_insn. */
3130 prev_active_insn (rtx insn)
3134 insn = PREV_INSN (insn);
3135 if (insn == 0 || active_insn_p (insn))
3142 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3145 next_label (rtx insn)
3149 insn = NEXT_INSN (insn);
3150 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3157 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3160 prev_label (rtx insn)
3164 insn = PREV_INSN (insn);
3165 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3173 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3174 and REG_CC_USER notes so we can find it. */
3177 link_cc0_insns (rtx insn)
3179 rtx user = next_nonnote_insn (insn);
3181 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3182 user = XVECEXP (PATTERN (user), 0, 0);
3184 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3186 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3189 /* Return the next insn that uses CC0 after INSN, which is assumed to
3190 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3191 applied to the result of this function should yield INSN).
3193 Normally, this is simply the next insn. However, if a REG_CC_USER note
3194 is present, it contains the insn that uses CC0.
3196 Return 0 if we can't find the insn. */
3199 next_cc0_user (rtx insn)
3201 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3204 return XEXP (note, 0);
3206 insn = next_nonnote_insn (insn);
3207 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3208 insn = XVECEXP (PATTERN (insn), 0, 0);
3210 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3216 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3217 note, it is the previous insn. */
3220 prev_cc0_setter (rtx insn)
3222 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3225 return XEXP (note, 0);
3227 insn = prev_nonnote_insn (insn);
3228 if (! sets_cc0_p (PATTERN (insn)))
3235 /* Increment the label uses for all labels present in rtx. */
3238 mark_label_nuses (rtx x)
3244 code = GET_CODE (x);
3245 if (code == LABEL_REF)
3246 LABEL_NUSES (XEXP (x, 0))++;
3248 fmt = GET_RTX_FORMAT (code);
3249 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3252 mark_label_nuses (XEXP (x, i));
3253 else if (fmt[i] == 'E')
3254 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3255 mark_label_nuses (XVECEXP (x, i, j));
3260 /* Try splitting insns that can be split for better scheduling.
3261 PAT is the pattern which might split.
3262 TRIAL is the insn providing PAT.
3263 LAST is nonzero if we should return the last insn of the sequence produced.
3265 If this routine succeeds in splitting, it returns the first or last
3266 replacement insn depending on the value of LAST. Otherwise, it
3267 returns TRIAL. If the insn to be returned can be split, it will be. */
3270 try_split (rtx pat, rtx trial, int last)
3272 rtx before = PREV_INSN (trial);
3273 rtx after = NEXT_INSN (trial);
3274 int has_barrier = 0;
3278 rtx insn_last, insn;
3281 if (any_condjump_p (trial)
3282 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3283 split_branch_probability = INTVAL (XEXP (note, 0));
3284 probability = split_branch_probability;
3286 seq = split_insns (pat, trial);
3288 split_branch_probability = -1;
3290 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3291 We may need to handle this specially. */
3292 if (after && GET_CODE (after) == BARRIER)
3295 after = NEXT_INSN (after);
3301 /* Avoid infinite loop if any insn of the result matches
3302 the original pattern. */
3306 if (INSN_P (insn_last)
3307 && rtx_equal_p (PATTERN (insn_last), pat))
3309 if (!NEXT_INSN (insn_last))
3311 insn_last = NEXT_INSN (insn_last);
3315 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3317 if (GET_CODE (insn) == JUMP_INSN)
3319 mark_jump_label (PATTERN (insn), insn, 0);
3321 if (probability != -1
3322 && any_condjump_p (insn)
3323 && !find_reg_note (insn, REG_BR_PROB, 0))
3325 /* We can preserve the REG_BR_PROB notes only if exactly
3326 one jump is created, otherwise the machine description
3327 is responsible for this step using
3328 split_branch_probability variable. */
3332 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3333 GEN_INT (probability),
3339 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3340 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3341 if (GET_CODE (trial) == CALL_INSN)
3343 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3344 if (GET_CODE (insn) == CALL_INSN)
3346 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3349 *p = CALL_INSN_FUNCTION_USAGE (trial);
3350 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3354 /* Copy notes, particularly those related to the CFG. */
3355 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3357 switch (REG_NOTE_KIND (note))
3361 while (insn != NULL_RTX)
3363 if (GET_CODE (insn) == CALL_INSN
3364 || (flag_non_call_exceptions
3365 && may_trap_p (PATTERN (insn))))
3367 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3370 insn = PREV_INSN (insn);
3376 case REG_ALWAYS_RETURN:
3378 while (insn != NULL_RTX)
3380 if (GET_CODE (insn) == CALL_INSN)
3382 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3385 insn = PREV_INSN (insn);
3389 case REG_NON_LOCAL_GOTO:
3391 while (insn != NULL_RTX)
3393 if (GET_CODE (insn) == JUMP_INSN)
3395 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3398 insn = PREV_INSN (insn);
3407 /* If there are LABELS inside the split insns increment the
3408 usage count so we don't delete the label. */
3409 if (GET_CODE (trial) == INSN)
3412 while (insn != NULL_RTX)
3414 if (GET_CODE (insn) == INSN)
3415 mark_label_nuses (PATTERN (insn));
3417 insn = PREV_INSN (insn);
3421 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3423 delete_insn (trial);
3425 emit_barrier_after (tem);
3427 /* Recursively call try_split for each new insn created; by the
3428 time control returns here that insn will be fully split, so
3429 set LAST and continue from the insn after the one returned.
3430 We can't use next_active_insn here since AFTER may be a note.
3431 Ignore deleted insns, which can be occur if not optimizing. */
3432 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3433 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3434 tem = try_split (PATTERN (tem), tem, 1);
3436 /* Return either the first or the last insn, depending on which was
3439 ? (after ? PREV_INSN (after) : last_insn)
3440 : NEXT_INSN (before);
3443 /* Make and return an INSN rtx, initializing all its slots.
3444 Store PATTERN in the pattern slots. */
3447 make_insn_raw (rtx pattern)
3451 insn = rtx_alloc (INSN);
3453 INSN_UID (insn) = cur_insn_uid++;
3454 PATTERN (insn) = pattern;
3455 INSN_CODE (insn) = -1;
3456 LOG_LINKS (insn) = NULL;
3457 REG_NOTES (insn) = NULL;
3458 INSN_LOCATOR (insn) = 0;
3459 BLOCK_FOR_INSN (insn) = NULL;
3461 #ifdef ENABLE_RTL_CHECKING
3464 && (returnjump_p (insn)
3465 || (GET_CODE (insn) == SET
3466 && SET_DEST (insn) == pc_rtx)))
3468 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3476 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3479 make_jump_insn_raw (rtx pattern)
3483 insn = rtx_alloc (JUMP_INSN);
3484 INSN_UID (insn) = cur_insn_uid++;
3486 PATTERN (insn) = pattern;
3487 INSN_CODE (insn) = -1;
3488 LOG_LINKS (insn) = NULL;
3489 REG_NOTES (insn) = NULL;
3490 JUMP_LABEL (insn) = NULL;
3491 INSN_LOCATOR (insn) = 0;
3492 BLOCK_FOR_INSN (insn) = NULL;
3497 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3500 make_call_insn_raw (rtx pattern)
3504 insn = rtx_alloc (CALL_INSN);
3505 INSN_UID (insn) = cur_insn_uid++;
3507 PATTERN (insn) = pattern;
3508 INSN_CODE (insn) = -1;
3509 LOG_LINKS (insn) = NULL;
3510 REG_NOTES (insn) = NULL;
3511 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3512 INSN_LOCATOR (insn) = 0;
3513 BLOCK_FOR_INSN (insn) = NULL;
3518 /* Add INSN to the end of the doubly-linked list.
3519 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3524 PREV_INSN (insn) = last_insn;
3525 NEXT_INSN (insn) = 0;
3527 if (NULL != last_insn)
3528 NEXT_INSN (last_insn) = insn;
3530 if (NULL == first_insn)
3536 /* Add INSN into the doubly-linked list after insn AFTER. This and
3537 the next should be the only functions called to insert an insn once
3538 delay slots have been filled since only they know how to update a
3542 add_insn_after (rtx insn, rtx after)
3544 rtx next = NEXT_INSN (after);
3547 if (optimize && INSN_DELETED_P (after))
3550 NEXT_INSN (insn) = next;
3551 PREV_INSN (insn) = after;
3555 PREV_INSN (next) = insn;
3556 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3557 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3559 else if (last_insn == after)
3563 struct sequence_stack *stack = seq_stack;
3564 /* Scan all pending sequences too. */
3565 for (; stack; stack = stack->next)
3566 if (after == stack->last)
3576 if (GET_CODE (after) != BARRIER
3577 && GET_CODE (insn) != BARRIER
3578 && (bb = BLOCK_FOR_INSN (after)))
3580 set_block_for_insn (insn, bb);
3582 bb->flags |= BB_DIRTY;
3583 /* Should not happen as first in the BB is always
3584 either NOTE or LABEL. */
3585 if (bb->end == after
3586 /* Avoid clobbering of structure when creating new BB. */
3587 && GET_CODE (insn) != BARRIER
3588 && (GET_CODE (insn) != NOTE
3589 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3593 NEXT_INSN (after) = insn;
3594 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3596 rtx sequence = PATTERN (after);
3597 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3601 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3602 the previous should be the only functions called to insert an insn once
3603 delay slots have been filled since only they know how to update a
3607 add_insn_before (rtx insn, rtx before)
3609 rtx prev = PREV_INSN (before);
3612 if (optimize && INSN_DELETED_P (before))
3615 PREV_INSN (insn) = prev;
3616 NEXT_INSN (insn) = before;
3620 NEXT_INSN (prev) = insn;
3621 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3623 rtx sequence = PATTERN (prev);
3624 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3627 else if (first_insn == before)
3631 struct sequence_stack *stack = seq_stack;
3632 /* Scan all pending sequences too. */
3633 for (; stack; stack = stack->next)
3634 if (before == stack->first)
3636 stack->first = insn;
3644 if (GET_CODE (before) != BARRIER
3645 && GET_CODE (insn) != BARRIER
3646 && (bb = BLOCK_FOR_INSN (before)))
3648 set_block_for_insn (insn, bb);
3650 bb->flags |= BB_DIRTY;
3651 /* Should not happen as first in the BB is always
3652 either NOTE or LABEl. */
3653 if (bb->head == insn
3654 /* Avoid clobbering of structure when creating new BB. */
3655 && GET_CODE (insn) != BARRIER
3656 && (GET_CODE (insn) != NOTE
3657 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3661 PREV_INSN (before) = insn;
3662 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3663 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3666 /* Remove an insn from its doubly-linked list. This function knows how
3667 to handle sequences. */
3669 remove_insn (rtx insn)
3671 rtx next = NEXT_INSN (insn);
3672 rtx prev = PREV_INSN (insn);
3677 NEXT_INSN (prev) = next;
3678 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3680 rtx sequence = PATTERN (prev);
3681 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3684 else if (first_insn == insn)
3688 struct sequence_stack *stack = seq_stack;
3689 /* Scan all pending sequences too. */
3690 for (; stack; stack = stack->next)
3691 if (insn == stack->first)
3693 stack->first = next;
3703 PREV_INSN (next) = prev;
3704 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3705 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3707 else if (last_insn == insn)
3711 struct sequence_stack *stack = seq_stack;
3712 /* Scan all pending sequences too. */
3713 for (; stack; stack = stack->next)
3714 if (insn == stack->last)
3723 if (GET_CODE (insn) != BARRIER
3724 && (bb = BLOCK_FOR_INSN (insn)))
3727 bb->flags |= BB_DIRTY;
3728 if (bb->head == insn)
3730 /* Never ever delete the basic block note without deleting whole
3732 if (GET_CODE (insn) == NOTE)
3736 if (bb->end == insn)
3741 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3744 add_function_usage_to (rtx call_insn, rtx call_fusage)
3746 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3749 /* Put the register usage information on the CALL. If there is already
3750 some usage information, put ours at the end. */
3751 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3755 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3756 link = XEXP (link, 1))
3759 XEXP (link, 1) = call_fusage;
3762 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3765 /* Delete all insns made since FROM.
3766 FROM becomes the new last instruction. */
3769 delete_insns_since (rtx from)
3774 NEXT_INSN (from) = 0;
3778 /* This function is deprecated, please use sequences instead.
3780 Move a consecutive bunch of insns to a different place in the chain.
3781 The insns to be moved are those between FROM and TO.
3782 They are moved to a new position after the insn AFTER.
3783 AFTER must not be FROM or TO or any insn in between.
3785 This function does not know about SEQUENCEs and hence should not be
3786 called after delay-slot filling has been done. */
3789 reorder_insns_nobb (rtx from, rtx to, rtx after)
3791 /* Splice this bunch out of where it is now. */
3792 if (PREV_INSN (from))
3793 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3795 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3796 if (last_insn == to)
3797 last_insn = PREV_INSN (from);
3798 if (first_insn == from)
3799 first_insn = NEXT_INSN (to);
3801 /* Make the new neighbors point to it and it to them. */
3802 if (NEXT_INSN (after))
3803 PREV_INSN (NEXT_INSN (after)) = to;
3805 NEXT_INSN (to) = NEXT_INSN (after);
3806 PREV_INSN (from) = after;
3807 NEXT_INSN (after) = from;
3808 if (after == last_insn)
3812 /* Same as function above, but take care to update BB boundaries. */
3814 reorder_insns (rtx from, rtx to, rtx after)
3816 rtx prev = PREV_INSN (from);
3817 basic_block bb, bb2;
3819 reorder_insns_nobb (from, to, after);
3821 if (GET_CODE (after) != BARRIER
3822 && (bb = BLOCK_FOR_INSN (after)))
3825 bb->flags |= BB_DIRTY;
3827 if (GET_CODE (from) != BARRIER
3828 && (bb2 = BLOCK_FOR_INSN (from)))
3832 bb2->flags |= BB_DIRTY;
3835 if (bb->end == after)
3838 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3839 set_block_for_insn (x, bb);
3843 /* Return the line note insn preceding INSN. */
3846 find_line_note (rtx insn)
3848 if (no_line_numbers)
3851 for (; insn; insn = PREV_INSN (insn))
3852 if (GET_CODE (insn) == NOTE
3853 && NOTE_LINE_NUMBER (insn) >= 0)
3859 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3860 of the moved insns when debugging. This may insert a note between AFTER
3861 and FROM, and another one after TO. */
3864 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
3866 rtx from_line = find_line_note (from);
3867 rtx after_line = find_line_note (after);
3869 reorder_insns (from, to, after);
3871 if (from_line == after_line)
3875 emit_note_copy_after (from_line, after);
3877 emit_note_copy_after (after_line, to);
3880 /* Remove unnecessary notes from the instruction stream. */
3883 remove_unnecessary_notes (void)
3885 rtx block_stack = NULL_RTX;
3886 rtx eh_stack = NULL_RTX;
3891 /* We must not remove the first instruction in the function because
3892 the compiler depends on the first instruction being a note. */
3893 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3895 /* Remember what's next. */
3896 next = NEXT_INSN (insn);
3898 /* We're only interested in notes. */
3899 if (GET_CODE (insn) != NOTE)
3902 switch (NOTE_LINE_NUMBER (insn))
3904 case NOTE_INSN_DELETED:
3905 case NOTE_INSN_LOOP_END_TOP_COND:
3909 case NOTE_INSN_EH_REGION_BEG:
3910 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3913 case NOTE_INSN_EH_REGION_END:
3914 /* Too many end notes. */
3915 if (eh_stack == NULL_RTX)
3917 /* Mismatched nesting. */
3918 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3921 eh_stack = XEXP (eh_stack, 1);
3922 free_INSN_LIST_node (tmp);
3925 case NOTE_INSN_BLOCK_BEG:
3926 /* By now, all notes indicating lexical blocks should have
3927 NOTE_BLOCK filled in. */
3928 if (NOTE_BLOCK (insn) == NULL_TREE)
3930 block_stack = alloc_INSN_LIST (insn, block_stack);
3933 case NOTE_INSN_BLOCK_END:
3934 /* Too many end notes. */
3935 if (block_stack == NULL_RTX)
3937 /* Mismatched nesting. */
3938 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3941 block_stack = XEXP (block_stack, 1);
3942 free_INSN_LIST_node (tmp);
3944 /* Scan back to see if there are any non-note instructions
3945 between INSN and the beginning of this block. If not,
3946 then there is no PC range in the generated code that will
3947 actually be in this block, so there's no point in
3948 remembering the existence of the block. */
3949 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3951 /* This block contains a real instruction. Note that we
3952 don't include labels; if the only thing in the block
3953 is a label, then there are still no PC values that
3954 lie within the block. */
3958 /* We're only interested in NOTEs. */
3959 if (GET_CODE (tmp) != NOTE)
3962 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3964 /* We just verified that this BLOCK matches us with
3965 the block_stack check above. Never delete the
3966 BLOCK for the outermost scope of the function; we
3967 can refer to names from that scope even if the
3968 block notes are messed up. */
3969 if (! is_body_block (NOTE_BLOCK (insn))
3970 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3977 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3978 /* There's a nested block. We need to leave the
3979 current block in place since otherwise the debugger
3980 wouldn't be able to show symbols from our block in
3981 the nested block. */
3987 /* Too many begin notes. */
3988 if (block_stack || eh_stack)
3993 /* Emit insn(s) of given code and pattern
3994 at a specified place within the doubly-linked list.
3996 All of the emit_foo global entry points accept an object
3997 X which is either an insn list or a PATTERN of a single
4000 There are thus a few canonical ways to generate code and
4001 emit it at a specific place in the instruction stream. For
4002 example, consider the instruction named SPOT and the fact that
4003 we would like to emit some instructions before SPOT. We might
4007 ... emit the new instructions ...
4008 insns_head = get_insns ();
4011 emit_insn_before (insns_head, SPOT);
4013 It used to be common to generate SEQUENCE rtl instead, but that
4014 is a relic of the past which no longer occurs. The reason is that
4015 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4016 generated would almost certainly die right after it was created. */
4018 /* Make X be output before the instruction BEFORE. */
4021 emit_insn_before (rtx x, rtx before)
4026 #ifdef ENABLE_RTL_CHECKING
4027 if (before == NULL_RTX)
4034 switch (GET_CODE (x))
4045 rtx next = NEXT_INSN (insn);
4046 add_insn_before (insn, before);
4052 #ifdef ENABLE_RTL_CHECKING
4059 last = make_insn_raw (x);
4060 add_insn_before (last, before);
4067 /* Make an instruction with body X and code JUMP_INSN
4068 and output it before the instruction BEFORE. */
4071 emit_jump_insn_before (rtx x, rtx before)
4073 rtx insn, last = NULL_RTX;
4075 #ifdef ENABLE_RTL_CHECKING
4076 if (before == NULL_RTX)
4080 switch (GET_CODE (x))
4091 rtx next = NEXT_INSN (insn);
4092 add_insn_before (insn, before);
4098 #ifdef ENABLE_RTL_CHECKING
4105 last = make_jump_insn_raw (x);
4106 add_insn_before (last, before);
4113 /* Make an instruction with body X and code CALL_INSN
4114 and output it before the instruction BEFORE. */
4117 emit_call_insn_before (rtx x, rtx before)
4119 rtx last = NULL_RTX, insn;
4121 #ifdef ENABLE_RTL_CHECKING
4122 if (before == NULL_RTX)
4126 switch (GET_CODE (x))
4137 rtx next = NEXT_INSN (insn);
4138 add_insn_before (insn, before);
4144 #ifdef ENABLE_RTL_CHECKING
4151 last = make_call_insn_raw (x);
4152 add_insn_before (last, before);
4159 /* Make an insn of code BARRIER
4160 and output it before the insn BEFORE. */
4163 emit_barrier_before (rtx before)
4165 rtx insn = rtx_alloc (BARRIER);
4167 INSN_UID (insn) = cur_insn_uid++;
4169 add_insn_before (insn, before);
4173 /* Emit the label LABEL before the insn BEFORE. */
4176 emit_label_before (rtx label, rtx before)
4178 /* This can be called twice for the same label as a result of the
4179 confusion that follows a syntax error! So make it harmless. */
4180 if (INSN_UID (label) == 0)
4182 INSN_UID (label) = cur_insn_uid++;
4183 add_insn_before (label, before);
4189 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4192 emit_note_before (int subtype, rtx before)
4194 rtx note = rtx_alloc (NOTE);
4195 INSN_UID (note) = cur_insn_uid++;
4196 NOTE_SOURCE_FILE (note) = 0;
4197 NOTE_LINE_NUMBER (note) = subtype;
4198 BLOCK_FOR_INSN (note) = NULL;
4200 add_insn_before (note, before);
4204 /* Helper for emit_insn_after, handles lists of instructions
4207 static rtx emit_insn_after_1 (rtx, rtx);
4210 emit_insn_after_1 (rtx first, rtx after)
4216 if (GET_CODE (after) != BARRIER
4217 && (bb = BLOCK_FOR_INSN (after)))
4219 bb->flags |= BB_DIRTY;
4220 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4221 if (GET_CODE (last) != BARRIER)
4222 set_block_for_insn (last, bb);
4223 if (GET_CODE (last) != BARRIER)
4224 set_block_for_insn (last, bb);
4225 if (bb->end == after)
4229 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4232 after_after = NEXT_INSN (after);
4234 NEXT_INSN (after) = first;
4235 PREV_INSN (first) = after;
4236 NEXT_INSN (last) = after_after;
4238 PREV_INSN (after_after) = last;
4240 if (after == last_insn)
4245 /* Make X be output after the insn AFTER. */
4248 emit_insn_after (rtx x, rtx after)
4252 #ifdef ENABLE_RTL_CHECKING
4253 if (after == NULL_RTX)
4260 switch (GET_CODE (x))
4268 last = emit_insn_after_1 (x, after);
4271 #ifdef ENABLE_RTL_CHECKING
4278 last = make_insn_raw (x);
4279 add_insn_after (last, after);
4286 /* Similar to emit_insn_after, except that line notes are to be inserted so
4287 as to act as if this insn were at FROM. */
4290 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4292 rtx from_line = find_line_note (from);
4293 rtx after_line = find_line_note (after);
4294 rtx insn = emit_insn_after (x, after);
4297 emit_note_copy_after (from_line, after);
4300 emit_note_copy_after (after_line, insn);
4303 /* Make an insn of code JUMP_INSN with body X
4304 and output it after the insn AFTER. */
4307 emit_jump_insn_after (rtx x, rtx after)
4311 #ifdef ENABLE_RTL_CHECKING
4312 if (after == NULL_RTX)
4316 switch (GET_CODE (x))
4324 last = emit_insn_after_1 (x, after);
4327 #ifdef ENABLE_RTL_CHECKING
4334 last = make_jump_insn_raw (x);
4335 add_insn_after (last, after);
4342 /* Make an instruction with body X and code CALL_INSN
4343 and output it after the instruction AFTER. */
4346 emit_call_insn_after (rtx x, rtx after)
4350 #ifdef ENABLE_RTL_CHECKING
4351 if (after == NULL_RTX)
4355 switch (GET_CODE (x))
4363 last = emit_insn_after_1 (x, after);
4366 #ifdef ENABLE_RTL_CHECKING
4373 last = make_call_insn_raw (x);
4374 add_insn_after (last, after);
4381 /* Make an insn of code BARRIER
4382 and output it after the insn AFTER. */
4385 emit_barrier_after (rtx after)
4387 rtx insn = rtx_alloc (BARRIER);
4389 INSN_UID (insn) = cur_insn_uid++;
4391 add_insn_after (insn, after);
4395 /* Emit the label LABEL after the insn AFTER. */
4398 emit_label_after (rtx label, rtx after)
4400 /* This can be called twice for the same label
4401 as a result of the confusion that follows a syntax error!
4402 So make it harmless. */
4403 if (INSN_UID (label) == 0)
4405 INSN_UID (label) = cur_insn_uid++;
4406 add_insn_after (label, after);
4412 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4415 emit_note_after (int subtype, rtx after)
4417 rtx note = rtx_alloc (NOTE);
4418 INSN_UID (note) = cur_insn_uid++;
4419 NOTE_SOURCE_FILE (note) = 0;
4420 NOTE_LINE_NUMBER (note) = subtype;
4421 BLOCK_FOR_INSN (note) = NULL;
4422 add_insn_after (note, after);
4426 /* Emit a copy of note ORIG after the insn AFTER. */
4429 emit_note_copy_after (rtx orig, rtx after)
4433 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4439 note = rtx_alloc (NOTE);
4440 INSN_UID (note) = cur_insn_uid++;
4441 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4442 NOTE_DATA (note) = NOTE_DATA (orig);
4443 BLOCK_FOR_INSN (note) = NULL;
4444 add_insn_after (note, after);
4448 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4450 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4452 rtx last = emit_insn_after (pattern, after);
4454 after = NEXT_INSN (after);
4457 if (active_insn_p (after))
4458 INSN_LOCATOR (after) = loc;
4461 after = NEXT_INSN (after);
4466 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4468 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4470 rtx last = emit_jump_insn_after (pattern, after);
4472 after = NEXT_INSN (after);
4475 if (active_insn_p (after))
4476 INSN_LOCATOR (after) = loc;
4479 after = NEXT_INSN (after);
4484 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4486 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4488 rtx last = emit_call_insn_after (pattern, after);
4490 after = NEXT_INSN (after);
4493 if (active_insn_p (after))
4494 INSN_LOCATOR (after) = loc;
4497 after = NEXT_INSN (after);
4502 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4504 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4506 rtx first = PREV_INSN (before);
4507 rtx last = emit_insn_before (pattern, before);
4509 first = NEXT_INSN (first);
4512 if (active_insn_p (first))
4513 INSN_LOCATOR (first) = loc;
4516 first = NEXT_INSN (first);
4521 /* Take X and emit it at the end of the doubly-linked
4524 Returns the last insn emitted. */
4529 rtx last = last_insn;
4535 switch (GET_CODE (x))
4546 rtx next = NEXT_INSN (insn);
4553 #ifdef ENABLE_RTL_CHECKING
4560 last = make_insn_raw (x);
4568 /* Make an insn of code JUMP_INSN with pattern X
4569 and add it to the end of the doubly-linked list. */
4572 emit_jump_insn (rtx x)
4574 rtx last = NULL_RTX, insn;
4576 switch (GET_CODE (x))
4587 rtx next = NEXT_INSN (insn);
4594 #ifdef ENABLE_RTL_CHECKING
4601 last = make_jump_insn_raw (x);
4609 /* Make an insn of code CALL_INSN with pattern X
4610 and add it to the end of the doubly-linked list. */
4613 emit_call_insn (rtx x)
4617 switch (GET_CODE (x))
4625 insn = emit_insn (x);
4628 #ifdef ENABLE_RTL_CHECKING
4635 insn = make_call_insn_raw (x);
4643 /* Add the label LABEL to the end of the doubly-linked list. */
4646 emit_label (rtx label)
4648 /* This can be called twice for the same label
4649 as a result of the confusion that follows a syntax error!
4650 So make it harmless. */
4651 if (INSN_UID (label) == 0)
4653 INSN_UID (label) = cur_insn_uid++;
4659 /* Make an insn of code BARRIER
4660 and add it to the end of the doubly-linked list. */
4665 rtx barrier = rtx_alloc (BARRIER);
4666 INSN_UID (barrier) = cur_insn_uid++;
4671 /* Make line numbering NOTE insn for LOCATION add it to the end
4672 of the doubly-linked list, but only if line-numbers are desired for
4673 debugging info and it doesn't match the previous one. */
4676 emit_line_note (location_t location)
4680 set_file_and_line_for_stmt (location);
4682 if (location.file && last_location.file
4683 && !strcmp (location.file, last_location.file)
4684 && location.line == last_location.line)
4686 last_location = location;
4688 if (no_line_numbers)
4694 note = emit_note (location.line);
4695 NOTE_SOURCE_FILE (note) = location.file;
4700 /* Emit a copy of note ORIG. */
4703 emit_note_copy (rtx orig)
4707 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4713 note = rtx_alloc (NOTE);
4715 INSN_UID (note) = cur_insn_uid++;
4716 NOTE_DATA (note) = NOTE_DATA (orig);
4717 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4718 BLOCK_FOR_INSN (note) = NULL;
4724 /* Make an insn of code NOTE or type NOTE_NO
4725 and add it to the end of the doubly-linked list. */
4728 emit_note (int note_no)
4732 note = rtx_alloc (NOTE);
4733 INSN_UID (note) = cur_insn_uid++;
4734 NOTE_LINE_NUMBER (note) = note_no;
4735 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4736 BLOCK_FOR_INSN (note) = NULL;
4741 /* Cause next statement to emit a line note even if the line number
4745 force_next_line_note (void)
4747 last_location.line = -1;
4750 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4751 note of this type already exists, remove it first. */
4754 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4756 rtx note = find_reg_note (insn, kind, NULL_RTX);
4762 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4763 has multiple sets (some callers assume single_set
4764 means the insn only has one set, when in fact it
4765 means the insn only has one * useful * set). */
4766 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4773 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4774 It serves no useful purpose and breaks eliminate_regs. */
4775 if (GET_CODE (datum) == ASM_OPERANDS)
4785 XEXP (note, 0) = datum;
4789 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4790 return REG_NOTES (insn);
4793 /* Return an indication of which type of insn should have X as a body.
4794 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4797 classify_insn (rtx x)
4799 if (GET_CODE (x) == CODE_LABEL)
4801 if (GET_CODE (x) == CALL)
4803 if (GET_CODE (x) == RETURN)
4805 if (GET_CODE (x) == SET)
4807 if (SET_DEST (x) == pc_rtx)
4809 else if (GET_CODE (SET_SRC (x)) == CALL)
4814 if (GET_CODE (x) == PARALLEL)
4817 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4818 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4820 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4821 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4823 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4824 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4830 /* Emit the rtl pattern X as an appropriate kind of insn.
4831 If X is a label, it is simply added into the insn chain. */
4836 enum rtx_code code = classify_insn (x);
4838 if (code == CODE_LABEL)
4839 return emit_label (x);
4840 else if (code == INSN)
4841 return emit_insn (x);
4842 else if (code == JUMP_INSN)
4844 rtx insn = emit_jump_insn (x);
4845 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4846 return emit_barrier ();
4849 else if (code == CALL_INSN)
4850 return emit_call_insn (x);
4855 /* Space for free sequence stack entries. */
4856 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4858 /* Begin emitting insns to a sequence which can be packaged in an
4859 RTL_EXPR. If this sequence will contain something that might cause
4860 the compiler to pop arguments to function calls (because those
4861 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4862 details), use do_pending_stack_adjust before calling this function.
4863 That will ensure that the deferred pops are not accidentally
4864 emitted in the middle of this sequence. */
4867 start_sequence (void)
4869 struct sequence_stack *tem;
4871 if (free_sequence_stack != NULL)
4873 tem = free_sequence_stack;
4874 free_sequence_stack = tem->next;
4877 tem = ggc_alloc (sizeof (struct sequence_stack));
4879 tem->next = seq_stack;
4880 tem->first = first_insn;
4881 tem->last = last_insn;
4882 tem->sequence_rtl_expr = seq_rtl_expr;
4890 /* Similarly, but indicate that this sequence will be placed in T, an
4891 RTL_EXPR. See the documentation for start_sequence for more
4892 information about how to use this function. */
4895 start_sequence_for_rtl_expr (tree t)
4902 /* Set up the insn chain starting with FIRST as the current sequence,
4903 saving the previously current one. See the documentation for
4904 start_sequence for more information about how to use this function. */
4907 push_to_sequence (rtx first)
4913 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4919 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4922 push_to_full_sequence (rtx first, rtx last)
4927 /* We really should have the end of the insn chain here. */
4928 if (last && NEXT_INSN (last))
4932 /* Set up the outer-level insn chain
4933 as the current sequence, saving the previously current one. */
4936 push_topmost_sequence (void)
4938 struct sequence_stack *stack, *top = NULL;
4942 for (stack = seq_stack; stack; stack = stack->next)
4945 first_insn = top->first;
4946 last_insn = top->last;
4947 seq_rtl_expr = top->sequence_rtl_expr;
4950 /* After emitting to the outer-level insn chain, update the outer-level
4951 insn chain, and restore the previous saved state. */
4954 pop_topmost_sequence (void)
4956 struct sequence_stack *stack, *top = NULL;
4958 for (stack = seq_stack; stack; stack = stack->next)
4961 top->first = first_insn;
4962 top->last = last_insn;
4963 /* ??? Why don't we save seq_rtl_expr here? */
4968 /* After emitting to a sequence, restore previous saved state.
4970 To get the contents of the sequence just made, you must call
4971 `get_insns' *before* calling here.
4973 If the compiler might have deferred popping arguments while
4974 generating this sequence, and this sequence will not be immediately
4975 inserted into the instruction stream, use do_pending_stack_adjust
4976 before calling get_insns. That will ensure that the deferred
4977 pops are inserted into this sequence, and not into some random
4978 location in the instruction stream. See INHIBIT_DEFER_POP for more
4979 information about deferred popping of arguments. */
4984 struct sequence_stack *tem = seq_stack;
4986 first_insn = tem->first;
4987 last_insn = tem->last;
4988 seq_rtl_expr = tem->sequence_rtl_expr;
4989 seq_stack = tem->next;
4991 memset (tem, 0, sizeof (*tem));
4992 tem->next = free_sequence_stack;
4993 free_sequence_stack = tem;
4996 /* This works like end_sequence, but records the old sequence in FIRST
5000 end_full_sequence (rtx *first, rtx *last)
5002 *first = first_insn;
5007 /* Return 1 if currently emitting into a sequence. */
5010 in_sequence_p (void)
5012 return seq_stack != 0;
5015 /* Put the various virtual registers into REGNO_REG_RTX. */
5018 init_virtual_regs (struct emit_status *es)
5020 rtx *ptr = es->x_regno_reg_rtx;
5021 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5022 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5023 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5024 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5025 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5029 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5030 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5031 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5032 static int copy_insn_n_scratches;
5034 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5035 copied an ASM_OPERANDS.
5036 In that case, it is the original input-operand vector. */
5037 static rtvec orig_asm_operands_vector;
5039 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5040 copied an ASM_OPERANDS.
5041 In that case, it is the copied input-operand vector. */
5042 static rtvec copy_asm_operands_vector;
5044 /* Likewise for the constraints vector. */
5045 static rtvec orig_asm_constraints_vector;
5046 static rtvec copy_asm_constraints_vector;
5048 /* Recursively create a new copy of an rtx for copy_insn.
5049 This function differs from copy_rtx in that it handles SCRATCHes and
5050 ASM_OPERANDs properly.
5051 Normally, this function is not used directly; use copy_insn as front end.
5052 However, you could first copy an insn pattern with copy_insn and then use
5053 this function afterwards to properly copy any REG_NOTEs containing
5057 copy_insn_1 (rtx orig)
5062 const char *format_ptr;
5064 code = GET_CODE (orig);
5081 for (i = 0; i < copy_insn_n_scratches; i++)
5082 if (copy_insn_scratch_in[i] == orig)
5083 return copy_insn_scratch_out[i];
5087 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5088 a LABEL_REF, it isn't sharable. */
5089 if (GET_CODE (XEXP (orig, 0)) == PLUS
5090 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5091 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5095 /* A MEM with a constant address is not sharable. The problem is that
5096 the constant address may need to be reloaded. If the mem is shared,
5097 then reloading one copy of this mem will cause all copies to appear
5098 to have been reloaded. */
5104 copy = rtx_alloc (code);
5106 /* Copy the various flags, and other information. We assume that
5107 all fields need copying, and then clear the fields that should
5108 not be copied. That is the sensible default behavior, and forces
5109 us to explicitly document why we are *not* copying a flag. */
5110 memcpy (copy, orig, RTX_HDR_SIZE);
5112 /* We do not copy the USED flag, which is used as a mark bit during
5113 walks over the RTL. */
5114 RTX_FLAG (copy, used) = 0;
5116 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5117 if (GET_RTX_CLASS (code) == 'i')
5119 RTX_FLAG (copy, jump) = 0;
5120 RTX_FLAG (copy, call) = 0;
5121 RTX_FLAG (copy, frame_related) = 0;
5124 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5126 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5128 copy->u.fld[i] = orig->u.fld[i];
5129 switch (*format_ptr++)
5132 if (XEXP (orig, i) != NULL)
5133 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5138 if (XVEC (orig, i) == orig_asm_constraints_vector)
5139 XVEC (copy, i) = copy_asm_constraints_vector;
5140 else if (XVEC (orig, i) == orig_asm_operands_vector)
5141 XVEC (copy, i) = copy_asm_operands_vector;
5142 else if (XVEC (orig, i) != NULL)
5144 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5145 for (j = 0; j < XVECLEN (copy, i); j++)
5146 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5157 /* These are left unchanged. */
5165 if (code == SCRATCH)
5167 i = copy_insn_n_scratches++;
5168 if (i >= MAX_RECOG_OPERANDS)
5170 copy_insn_scratch_in[i] = orig;
5171 copy_insn_scratch_out[i] = copy;
5173 else if (code == ASM_OPERANDS)
5175 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5176 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5177 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5178 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5184 /* Create a new copy of an rtx.
5185 This function differs from copy_rtx in that it handles SCRATCHes and
5186 ASM_OPERANDs properly.
5187 INSN doesn't really have to be a full INSN; it could be just the
5190 copy_insn (rtx insn)
5192 copy_insn_n_scratches = 0;
5193 orig_asm_operands_vector = 0;
5194 orig_asm_constraints_vector = 0;
5195 copy_asm_operands_vector = 0;
5196 copy_asm_constraints_vector = 0;
5197 return copy_insn_1 (insn);
5200 /* Initialize data structures and variables in this file
5201 before generating rtl for each function. */
5206 struct function *f = cfun;
5208 f->emit = ggc_alloc (sizeof (struct emit_status));
5211 seq_rtl_expr = NULL;
5213 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5214 last_location.line = 0;
5215 last_location.file = 0;
5216 first_label_num = label_num;
5220 /* Init the tables that describe all the pseudo regs. */
5222 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5224 f->emit->regno_pointer_align
5225 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5226 * sizeof (unsigned char));
5229 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5231 /* Put copies of all the hard registers into regno_reg_rtx. */
5232 memcpy (regno_reg_rtx,
5233 static_regno_reg_rtx,
5234 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5236 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5237 init_virtual_regs (f->emit);
5239 /* Indicate that the virtual registers and stack locations are
5241 REG_POINTER (stack_pointer_rtx) = 1;
5242 REG_POINTER (frame_pointer_rtx) = 1;
5243 REG_POINTER (hard_frame_pointer_rtx) = 1;
5244 REG_POINTER (arg_pointer_rtx) = 1;
5246 REG_POINTER (virtual_incoming_args_rtx) = 1;
5247 REG_POINTER (virtual_stack_vars_rtx) = 1;
5248 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5249 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5250 REG_POINTER (virtual_cfa_rtx) = 1;
5252 #ifdef STACK_BOUNDARY
5253 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5254 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5255 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5256 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5258 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5259 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5260 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5261 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5262 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5265 #ifdef INIT_EXPANDERS
5270 /* Generate the constant 0. */
5273 gen_const_vector_0 (enum machine_mode mode)
5278 enum machine_mode inner;
5280 units = GET_MODE_NUNITS (mode);
5281 inner = GET_MODE_INNER (mode);
5283 v = rtvec_alloc (units);
5285 /* We need to call this function after we to set CONST0_RTX first. */
5286 if (!CONST0_RTX (inner))
5289 for (i = 0; i < units; ++i)
5290 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5292 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5296 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5297 all elements are zero. */
5299 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5301 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5304 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5305 if (RTVEC_ELT (v, i) != inner_zero)
5306 return gen_rtx_raw_CONST_VECTOR (mode, v);
5307 return CONST0_RTX (mode);
5310 /* Create some permanent unique rtl objects shared between all functions.
5311 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5314 init_emit_once (int line_numbers)
5317 enum machine_mode mode;
5318 enum machine_mode double_mode;
5320 /* We need reg_raw_mode, so initialize the modes now. */
5321 init_reg_modes_once ();
5323 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5325 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5326 const_int_htab_eq, NULL);
5328 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5329 const_double_htab_eq, NULL);
5331 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5332 mem_attrs_htab_eq, NULL);
5333 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5334 reg_attrs_htab_eq, NULL);
5336 no_line_numbers = ! line_numbers;
5338 /* Compute the word and byte modes. */
5340 byte_mode = VOIDmode;
5341 word_mode = VOIDmode;
5342 double_mode = VOIDmode;
5344 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5345 mode = GET_MODE_WIDER_MODE (mode))
5347 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5348 && byte_mode == VOIDmode)
5351 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5352 && word_mode == VOIDmode)
5356 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5357 mode = GET_MODE_WIDER_MODE (mode))
5359 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5360 && double_mode == VOIDmode)
5364 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5366 /* Assign register numbers to the globally defined register rtx.
5367 This must be done at runtime because the register number field
5368 is in a union and some compilers can't initialize unions. */
5370 pc_rtx = gen_rtx (PC, VOIDmode);
5371 cc0_rtx = gen_rtx (CC0, VOIDmode);
5372 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5373 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5374 if (hard_frame_pointer_rtx == 0)
5375 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5376 HARD_FRAME_POINTER_REGNUM);
5377 if (arg_pointer_rtx == 0)
5378 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5379 virtual_incoming_args_rtx =
5380 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5381 virtual_stack_vars_rtx =
5382 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5383 virtual_stack_dynamic_rtx =
5384 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5385 virtual_outgoing_args_rtx =
5386 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5387 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5389 /* Initialize RTL for commonly used hard registers. These are
5390 copied into regno_reg_rtx as we begin to compile each function. */
5391 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5392 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5394 #ifdef INIT_EXPANDERS
5395 /* This is to initialize {init|mark|free}_machine_status before the first
5396 call to push_function_context_to. This is needed by the Chill front
5397 end which calls push_function_context_to before the first call to
5398 init_function_start. */
5402 /* Create the unique rtx's for certain rtx codes and operand values. */
5404 /* Don't use gen_rtx here since gen_rtx in this case
5405 tries to use these variables. */
5406 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5407 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5408 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5410 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5411 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5412 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5414 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5416 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5417 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5418 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5419 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5420 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5421 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5422 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5424 dconsthalf = dconst1;
5427 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5429 /* Initialize mathematical constants for constant folding builtins.
5430 These constants need to be given to at least 160 bits precision. */
5431 real_from_string (&dconstpi,
5432 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5433 real_from_string (&dconste,
5434 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5436 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5438 REAL_VALUE_TYPE *r =
5439 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5441 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5442 mode = GET_MODE_WIDER_MODE (mode))
5443 const_tiny_rtx[i][(int) mode] =
5444 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5446 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5448 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5449 mode = GET_MODE_WIDER_MODE (mode))
5450 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5452 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5454 mode = GET_MODE_WIDER_MODE (mode))
5455 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5458 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5460 mode = GET_MODE_WIDER_MODE (mode))
5461 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5463 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5465 mode = GET_MODE_WIDER_MODE (mode))
5466 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5468 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5469 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5470 const_tiny_rtx[0][i] = const0_rtx;
5472 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5473 if (STORE_FLAG_VALUE == 1)
5474 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5476 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5477 return_address_pointer_rtx
5478 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5481 #ifdef STATIC_CHAIN_REGNUM
5482 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5484 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5485 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5486 static_chain_incoming_rtx
5487 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5490 static_chain_incoming_rtx = static_chain_rtx;
5494 static_chain_rtx = STATIC_CHAIN;
5496 #ifdef STATIC_CHAIN_INCOMING
5497 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5499 static_chain_incoming_rtx = static_chain_rtx;
5503 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5504 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5507 /* Query and clear/ restore no_line_numbers. This is used by the
5508 switch / case handling in stmt.c to give proper line numbers in
5509 warnings about unreachable code. */
5512 force_line_numbers (void)
5514 int old = no_line_numbers;
5516 no_line_numbers = 0;
5518 force_next_line_note ();
5523 restore_line_number_status (int old_value)
5525 no_line_numbers = old_value;
5528 /* Produce exact duplicate of insn INSN after AFTER.
5529 Care updating of libcall regions if present. */
5532 emit_copy_of_insn_after (rtx insn, rtx after)
5535 rtx note1, note2, link;
5537 switch (GET_CODE (insn))
5540 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5544 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5548 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5549 if (CALL_INSN_FUNCTION_USAGE (insn))
5550 CALL_INSN_FUNCTION_USAGE (new)
5551 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5552 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5553 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5560 /* Update LABEL_NUSES. */
5561 mark_jump_label (PATTERN (new), new, 0);
5563 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5565 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5567 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5568 if (REG_NOTE_KIND (link) != REG_LABEL)
5570 if (GET_CODE (link) == EXPR_LIST)
5572 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5577 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5582 /* Fix the libcall sequences. */
5583 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5586 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5588 XEXP (note1, 0) = p;
5589 XEXP (note2, 0) = new;
5591 INSN_CODE (new) = INSN_CODE (insn);
5595 #include "gt-emit-rtl.h"