1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
30 #include "basic-block.h"
32 #include "dwarf2out.h"
33 #include "dwarf2asm.h"
37 #include "common/common-target.h"
38 #include "tree-pass.h"
40 #include "except.h" /* expand_builtin_dwarf_sp_column */
41 #include "expr.h" /* init_return_column_size */
42 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
43 #include "output.h" /* asm_out_file */
44 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
47 /* ??? Poison these here until it can be done generically. They've been
48 totally replaced in this file; make sure it stays that way. */
49 #undef DWARF2_UNWIND_INFO
50 #undef DWARF2_FRAME_INFO
51 #if (GCC_VERSION >= 3000)
52 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
55 #ifndef INCOMING_RETURN_ADDR_RTX
56 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
59 /* Maximum size (in bytes) of an artificially generated label. */
60 #define MAX_ARTIFICIAL_LABEL_BYTES 30
62 /* A collected description of an entire row of the abstract CFI table. */
63 typedef struct GTY(()) dw_cfi_row_struct
65 /* The expression that computes the CFA, expressed in two different ways.
66 The CFA member for the simple cases, and the full CFI expression for
67 the complex cases. The later will be a DW_CFA_cfa_expression. */
71 /* The expressions for any register column that is saved. */
74 /* The value of any DW_CFA_GNU_args_size. */
75 HOST_WIDE_INT args_size;
78 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
79 typedef struct GTY(()) reg_saved_in_data_struct {
84 DEF_VEC_O (reg_saved_in_data);
85 DEF_VEC_ALLOC_O (reg_saved_in_data, heap);
87 /* Since we no longer have a proper CFG, we're going to create a facsimile
88 of one on the fly while processing the frame-related insns.
90 We create dw_trace_info structures for each extended basic block beginning
91 and ending at a "save point". Save points are labels, barriers, certain
92 notes, and of course the beginning and end of the function.
94 As we encounter control transfer insns, we propagate the "current"
95 row state across the edges to the starts of traces. When checking is
96 enabled, we validate that we propagate the same data from all sources.
98 All traces are members of the TRACE_INFO array, in the order in which
99 they appear in the instruction stream.
101 All save points are present in the TRACE_INDEX hash, mapping the insn
102 starting a trace to the dw_trace_info describing the trace. */
106 /* The insn that begins the trace. */
109 /* The row state at the beginning and end of the trace. */
110 dw_cfi_row *beg_row, *end_row;
112 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
113 bool switch_sections;
115 /* The following variables contain data used in interpreting frame related
116 expressions. These are not part of the "real" row state as defined by
117 Dwarf, but it seems like they need to be propagated into a trace in case
118 frame related expressions have been sunk. */
119 /* ??? This seems fragile. These variables are fragments of a larger
120 expression. If we do not keep the entire expression together, we risk
121 not being able to put it together properly. Consider forcing targets
122 to generate self-contained expressions and dropping all of the magic
123 interpretation code in this file. Or at least refusing to shrink wrap
124 any frame related insn that doesn't contain a complete expression. */
126 /* The register used for saving registers to the stack, and its offset
128 dw_cfa_location cfa_store;
130 /* A temporary register holding an integral value used in adjusting SP
131 or setting up the store_reg. The "offset" field holds the integer
132 value, not an offset. */
133 dw_cfa_location cfa_temp;
135 /* A set of registers saved in other registers. This is the inverse of
136 the row->reg_save info, if the entry is a DW_CFA_register. This is
137 implemented as a flat array because it normally contains zero or 1
138 entry, depending on the target. IA-64 is the big spender here, using
139 a maximum of 5 entries. */
140 VEC(reg_saved_in_data, heap) *regs_saved_in_regs;
144 DEF_VEC_O (dw_trace_info);
145 DEF_VEC_ALLOC_O (dw_trace_info, heap);
147 typedef dw_trace_info *dw_trace_info_ref;
149 DEF_VEC_P (dw_trace_info_ref);
150 DEF_VEC_ALLOC_P (dw_trace_info_ref, heap);
152 /* The variables making up the pseudo-cfg, as described above. */
153 static VEC (dw_trace_info, heap) *trace_info;
154 static VEC (dw_trace_info_ref, heap) *trace_work_list;
155 static htab_t trace_index;
157 /* A vector of call frame insns for the CIE. */
160 /* The state of the first row of the FDE table, which includes the
161 state provided by the CIE. */
162 static GTY(()) dw_cfi_row *cie_cfi_row;
164 static GTY(()) reg_saved_in_data *cie_return_save;
166 static GTY(()) unsigned long dwarf2out_cfi_label_num;
168 /* The insn after which a new CFI note should be emitted. */
169 static rtx add_cfi_insn;
171 /* When non-null, add_cfi will add the CFI to this vector. */
172 static cfi_vec *add_cfi_vec;
174 /* The current instruction trace. */
175 static dw_trace_info *cur_trace;
177 /* The current, i.e. most recently generated, row of the CFI table. */
178 static dw_cfi_row *cur_row;
180 /* We delay emitting a register save until either (a) we reach the end
181 of the prologue or (b) the register is clobbered. This clusters
182 register saves so that there are fewer pc advances. */
187 HOST_WIDE_INT cfa_offset;
190 DEF_VEC_O (queued_reg_save);
191 DEF_VEC_ALLOC_O (queued_reg_save, heap);
193 static VEC(queued_reg_save, heap) *queued_reg_saves;
195 /* The (really) current value for DW_CFA_GNU_args_size. We delay actually
196 emitting this data, i.e. updating CUR_ROW, without async unwind. */
197 static HOST_WIDE_INT queued_args_size;
199 /* True if any CFI directives were emitted at the current insn. */
200 static bool any_cfis_emitted;
202 /* Short-hand for commonly used register numbers. */
203 static unsigned dw_stack_pointer_regnum;
204 static unsigned dw_frame_pointer_regnum;
206 /* Hook used by __throw. */
209 expand_builtin_dwarf_sp_column (void)
211 unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
212 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1));
215 /* MEM is a memory reference for the register size table, each element of
216 which has mode MODE. Initialize column C as a return address column. */
219 init_return_column_size (enum machine_mode mode, rtx mem, unsigned int c)
221 HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode);
222 HOST_WIDE_INT size = GET_MODE_SIZE (Pmode);
223 emit_move_insn (adjust_address (mem, mode, offset), GEN_INT (size));
226 /* Generate code to initialize the register size table. */
229 expand_builtin_init_dwarf_reg_sizes (tree address)
232 enum machine_mode mode = TYPE_MODE (char_type_node);
233 rtx addr = expand_normal (address);
234 rtx mem = gen_rtx_MEM (BLKmode, addr);
235 bool wrote_return_column = false;
237 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
239 unsigned int dnum = DWARF_FRAME_REGNUM (i);
240 unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
242 if (rnum < DWARF_FRAME_REGISTERS)
244 HOST_WIDE_INT offset = rnum * GET_MODE_SIZE (mode);
245 enum machine_mode save_mode = reg_raw_mode[i];
248 if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode))
249 save_mode = choose_hard_reg_mode (i, 1, true);
250 if (dnum == DWARF_FRAME_RETURN_COLUMN)
252 if (save_mode == VOIDmode)
254 wrote_return_column = true;
256 size = GET_MODE_SIZE (save_mode);
260 emit_move_insn (adjust_address (mem, mode, offset),
261 gen_int_mode (size, mode));
265 if (!wrote_return_column)
266 init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN);
268 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
269 init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN);
272 targetm.init_dwarf_reg_sizes_extra (address);
277 dw_trace_info_hash (const void *ptr)
279 const dw_trace_info *ti = (const dw_trace_info *) ptr;
280 return INSN_UID (ti->head);
284 dw_trace_info_eq (const void *ptr_a, const void *ptr_b)
286 const dw_trace_info *a = (const dw_trace_info *) ptr_a;
287 const dw_trace_info *b = (const dw_trace_info *) ptr_b;
288 return a->head == b->head;
292 get_trace_index (dw_trace_info *trace)
294 return trace - VEC_address (dw_trace_info, trace_info);
297 static dw_trace_info *
298 get_trace_info (rtx insn)
302 return (dw_trace_info *)
303 htab_find_with_hash (trace_index, &dummy, INSN_UID (insn));
307 save_point_p (rtx insn)
309 /* Labels, except those that are really jump tables. */
311 return inside_basic_block_p (insn);
313 /* We split traces at the prologue/epilogue notes because those
314 are points at which the unwind info is usually stable. This
315 makes it easier to find spots with identical unwind info so
316 that we can use remember/restore_state opcodes. */
318 switch (NOTE_KIND (insn))
320 case NOTE_INSN_PROLOGUE_END:
321 case NOTE_INSN_EPILOGUE_BEG:
328 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
330 static inline HOST_WIDE_INT
331 div_data_align (HOST_WIDE_INT off)
333 HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT;
334 gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off);
338 /* Return true if we need a signed version of a given opcode
339 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
342 need_data_align_sf_opcode (HOST_WIDE_INT off)
344 return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0;
347 /* Return a pointer to a newly allocated Call Frame Instruction. */
349 static inline dw_cfi_ref
352 dw_cfi_ref cfi = ggc_alloc_dw_cfi_node ();
354 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0;
355 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0;
360 /* Return a newly allocated CFI row, with no defined data. */
365 dw_cfi_row *row = ggc_alloc_cleared_dw_cfi_row ();
367 row->cfa.reg = INVALID_REGNUM;
372 /* Return a copy of an existing CFI row. */
375 copy_cfi_row (dw_cfi_row *src)
377 dw_cfi_row *dst = ggc_alloc_dw_cfi_row ();
380 dst->reg_save = VEC_copy (dw_cfi_ref, gc, src->reg_save);
385 /* Generate a new label for the CFI info to refer to. */
388 dwarf2out_cfi_label (void)
390 int num = dwarf2out_cfi_label_num++;
393 ASM_GENERATE_INTERNAL_LABEL (label, "LCFI", num);
395 return xstrdup (label);
398 /* Add CFI either to the current insn stream or to a vector, or both. */
401 add_cfi (dw_cfi_ref cfi)
403 any_cfis_emitted = true;
405 if (add_cfi_insn != NULL)
407 add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn);
408 NOTE_CFI (add_cfi_insn) = cfi;
411 if (add_cfi_vec != NULL)
412 VEC_safe_push (dw_cfi_ref, gc, *add_cfi_vec, cfi);
416 add_cfi_args_size (HOST_WIDE_INT size)
418 dw_cfi_ref cfi = new_cfi ();
420 cfi->dw_cfi_opc = DW_CFA_GNU_args_size;
421 cfi->dw_cfi_oprnd1.dw_cfi_offset = size;
427 add_cfi_restore (unsigned reg)
429 dw_cfi_ref cfi = new_cfi ();
431 cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore);
432 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
437 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
438 that the register column is no longer saved. */
441 update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi)
443 if (VEC_length (dw_cfi_ref, row->reg_save) <= column)
444 VEC_safe_grow_cleared (dw_cfi_ref, gc, row->reg_save, column + 1);
445 VEC_replace (dw_cfi_ref, row->reg_save, column, cfi);
448 /* This function fills in aa dw_cfa_location structure from a dwarf location
449 descriptor sequence. */
452 get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_struct *loc)
454 struct dw_loc_descr_struct *ptr;
456 cfa->base_offset = 0;
460 for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next)
462 enum dwarf_location_atom op = ptr->dw_loc_opc;
498 cfa->reg = op - DW_OP_reg0;
501 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
535 cfa->reg = op - DW_OP_breg0;
536 cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int;
539 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
540 cfa->base_offset = ptr->dw_loc_oprnd2.v.val_int;
545 case DW_OP_plus_uconst:
546 cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned;
554 /* Find the previous value for the CFA, iteratively. CFI is the opcode
555 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
556 one level of remember/restore state processing. */
559 lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember)
561 switch (cfi->dw_cfi_opc)
563 case DW_CFA_def_cfa_offset:
564 case DW_CFA_def_cfa_offset_sf:
565 loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset;
567 case DW_CFA_def_cfa_register:
568 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
571 case DW_CFA_def_cfa_sf:
572 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
573 loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset;
575 case DW_CFA_def_cfa_expression:
576 get_cfa_from_loc_descr (loc, cfi->dw_cfi_oprnd1.dw_cfi_loc);
579 case DW_CFA_remember_state:
580 gcc_assert (!remember->in_use);
582 remember->in_use = 1;
584 case DW_CFA_restore_state:
585 gcc_assert (remember->in_use);
587 remember->in_use = 0;
595 /* Determine if two dw_cfa_location structures define the same data. */
598 cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2)
600 return (loc1->reg == loc2->reg
601 && loc1->offset == loc2->offset
602 && loc1->indirect == loc2->indirect
603 && (loc1->indirect == 0
604 || loc1->base_offset == loc2->base_offset));
607 /* Determine if two CFI operands are identical. */
610 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b)
614 case dw_cfi_oprnd_unused:
616 case dw_cfi_oprnd_reg_num:
617 return a->dw_cfi_reg_num == b->dw_cfi_reg_num;
618 case dw_cfi_oprnd_offset:
619 return a->dw_cfi_offset == b->dw_cfi_offset;
620 case dw_cfi_oprnd_addr:
621 return (a->dw_cfi_addr == b->dw_cfi_addr
622 || strcmp (a->dw_cfi_addr, b->dw_cfi_addr) == 0);
623 case dw_cfi_oprnd_loc:
624 return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc);
629 /* Determine if two CFI entries are identical. */
632 cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b)
634 enum dwarf_call_frame_info opc;
636 /* Make things easier for our callers, including missing operands. */
639 if (a == NULL || b == NULL)
642 /* Obviously, the opcodes must match. */
644 if (opc != b->dw_cfi_opc)
647 /* Compare the two operands, re-using the type of the operands as
648 already exposed elsewhere. */
649 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc),
650 &a->dw_cfi_oprnd1, &b->dw_cfi_oprnd1)
651 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc),
652 &a->dw_cfi_oprnd2, &b->dw_cfi_oprnd2));
655 /* Determine if two CFI_ROW structures are identical. */
658 cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b)
660 size_t i, n_a, n_b, n_max;
664 if (!cfi_equal_p (a->cfa_cfi, b->cfa_cfi))
667 else if (!cfa_equal_p (&a->cfa, &b->cfa))
670 /* Logic suggests that we compare args_size here. However, if
671 EXIT_IGNORE_STACK we don't bother tracking the args_size after
672 the last time it really matters within the function. This does
673 in fact lead to paths with differing arg_size, but in cases for
674 which it doesn't matter. */
675 /* ??? If we really want to sanity check the output of the optimizers,
676 find a way to backtrack from epilogues to the last EH site. This
677 would allow us to distinguish regions with garbage args_size and
678 regions where paths ought to agree. */
680 n_a = VEC_length (dw_cfi_ref, a->reg_save);
681 n_b = VEC_length (dw_cfi_ref, b->reg_save);
682 n_max = MAX (n_a, n_b);
684 for (i = 0; i < n_max; ++i)
686 dw_cfi_ref r_a = NULL, r_b = NULL;
689 r_a = VEC_index (dw_cfi_ref, a->reg_save, i);
691 r_b = VEC_index (dw_cfi_ref, b->reg_save, i);
693 if (!cfi_equal_p (r_a, r_b))
700 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
701 what opcode to emit. Returns the CFI opcode to effect the change, or
702 NULL if NEW_CFA == OLD_CFA. */
705 def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa)
709 /* If nothing changed, no need to issue any call frame instructions. */
710 if (cfa_equal_p (old_cfa, new_cfa))
715 if (new_cfa->reg == old_cfa->reg && !new_cfa->indirect && !old_cfa->indirect)
717 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
718 the CFA register did not change but the offset did. The data
719 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
720 in the assembler via the .cfi_def_cfa_offset directive. */
721 if (new_cfa->offset < 0)
722 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf;
724 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset;
725 cfi->dw_cfi_oprnd1.dw_cfi_offset = new_cfa->offset;
728 #ifndef MIPS_DEBUGGING_INFO /* SGI dbx thinks this means no offset. */
729 else if (new_cfa->offset == old_cfa->offset
730 && old_cfa->reg != INVALID_REGNUM
731 && !new_cfa->indirect
732 && !old_cfa->indirect)
734 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
735 indicating the CFA register has changed to <register> but the
736 offset has not changed. */
737 cfi->dw_cfi_opc = DW_CFA_def_cfa_register;
738 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
742 else if (new_cfa->indirect == 0)
744 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
745 indicating the CFA register has changed to <register> with
746 the specified offset. The data factoring for DW_CFA_def_cfa_sf
747 happens in output_cfi, or in the assembler via the .cfi_def_cfa
749 if (new_cfa->offset < 0)
750 cfi->dw_cfi_opc = DW_CFA_def_cfa_sf;
752 cfi->dw_cfi_opc = DW_CFA_def_cfa;
753 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
754 cfi->dw_cfi_oprnd2.dw_cfi_offset = new_cfa->offset;
758 /* Construct a DW_CFA_def_cfa_expression instruction to
759 calculate the CFA using a full location expression since no
760 register-offset pair is available. */
761 struct dw_loc_descr_struct *loc_list;
763 cfi->dw_cfi_opc = DW_CFA_def_cfa_expression;
764 loc_list = build_cfa_loc (new_cfa, 0);
765 cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list;
771 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
774 def_cfa_1 (dw_cfa_location *new_cfa)
778 if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0)
779 cur_trace->cfa_store.offset = new_cfa->offset;
781 cfi = def_cfa_0 (&cur_row->cfa, new_cfa);
784 cur_row->cfa = *new_cfa;
785 if (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression)
786 cur_row->cfa_cfi = cfi;
792 /* Add the CFI for saving a register. REG is the CFA column number.
793 If SREG is -1, the register is saved at OFFSET from the CFA;
794 otherwise it is saved in SREG. */
797 reg_save (unsigned int reg, unsigned int sreg, HOST_WIDE_INT offset)
799 dw_fde_ref fde = cfun ? cfun->fde : NULL;
800 dw_cfi_ref cfi = new_cfi ();
802 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
804 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
806 && fde->stack_realign
807 && sreg == INVALID_REGNUM)
809 cfi->dw_cfi_opc = DW_CFA_expression;
810 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
811 cfi->dw_cfi_oprnd2.dw_cfi_loc
812 = build_cfa_aligned_loc (&cur_row->cfa, offset,
813 fde->stack_realignment);
815 else if (sreg == INVALID_REGNUM)
817 if (need_data_align_sf_opcode (offset))
818 cfi->dw_cfi_opc = DW_CFA_offset_extended_sf;
819 else if (reg & ~0x3f)
820 cfi->dw_cfi_opc = DW_CFA_offset_extended;
822 cfi->dw_cfi_opc = DW_CFA_offset;
823 cfi->dw_cfi_oprnd2.dw_cfi_offset = offset;
825 else if (sreg == reg)
827 /* While we could emit something like DW_CFA_same_value or
828 DW_CFA_restore, we never expect to see something like that
829 in a prologue. This is more likely to be a bug. A backend
830 can always bypass this by using REG_CFA_RESTORE directly. */
835 cfi->dw_cfi_opc = DW_CFA_register;
836 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg;
840 update_row_reg_save (cur_row, reg, cfi);
843 /* Given a SET, calculate the amount of stack adjustment it
847 stack_adjust_offset (const_rtx pattern, HOST_WIDE_INT cur_args_size,
848 HOST_WIDE_INT cur_offset)
850 const_rtx src = SET_SRC (pattern);
851 const_rtx dest = SET_DEST (pattern);
852 HOST_WIDE_INT offset = 0;
855 if (dest == stack_pointer_rtx)
857 code = GET_CODE (src);
859 /* Assume (set (reg sp) (reg whatever)) sets args_size
861 if (code == REG && src != stack_pointer_rtx)
863 offset = -cur_args_size;
864 #ifndef STACK_GROWS_DOWNWARD
867 return offset - cur_offset;
870 if (! (code == PLUS || code == MINUS)
871 || XEXP (src, 0) != stack_pointer_rtx
872 || !CONST_INT_P (XEXP (src, 1)))
875 /* (set (reg sp) (plus (reg sp) (const_int))) */
876 offset = INTVAL (XEXP (src, 1));
882 if (MEM_P (src) && !MEM_P (dest))
886 /* (set (mem (pre_dec (reg sp))) (foo)) */
887 src = XEXP (dest, 0);
888 code = GET_CODE (src);
894 if (XEXP (src, 0) == stack_pointer_rtx)
896 rtx val = XEXP (XEXP (src, 1), 1);
897 /* We handle only adjustments by constant amount. */
898 gcc_assert (GET_CODE (XEXP (src, 1)) == PLUS
899 && CONST_INT_P (val));
900 offset = -INTVAL (val);
907 if (XEXP (src, 0) == stack_pointer_rtx)
909 offset = GET_MODE_SIZE (GET_MODE (dest));
916 if (XEXP (src, 0) == stack_pointer_rtx)
918 offset = -GET_MODE_SIZE (GET_MODE (dest));
933 /* Add a CFI to update the running total of the size of arguments
934 pushed onto the stack. */
937 dwarf2out_args_size (HOST_WIDE_INT size)
939 if (size == cur_row->args_size)
942 cur_row->args_size = size;
943 add_cfi_args_size (size);
946 /* Record a stack adjustment of OFFSET bytes. */
949 dwarf2out_stack_adjust (HOST_WIDE_INT offset)
951 dw_cfa_location loc = cur_row->cfa;
953 if (loc.reg == dw_stack_pointer_regnum)
954 loc.offset += offset;
956 if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum)
957 cur_trace->cfa_store.offset += offset;
959 /* ??? The assumption seems to be that if A_O_A, the only CFA adjustments
960 involving the stack pointer are inside the prologue and marked as
961 RTX_FRAME_RELATED_P. That said, should we not verify this assumption
962 by *asserting* A_O_A at this point? Why else would we have a change
963 to the stack pointer? */
964 if (ACCUMULATE_OUTGOING_ARGS)
967 #ifndef STACK_GROWS_DOWNWARD
971 queued_args_size += offset;
972 if (queued_args_size < 0)
973 queued_args_size = 0;
976 if (flag_asynchronous_unwind_tables)
977 dwarf2out_args_size (queued_args_size);
980 /* Check INSN to see if it looks like a push or a stack adjustment, and
981 make a note of it if it does. EH uses this information to find out
982 how much extra space it needs to pop off the stack. */
985 dwarf2out_notice_stack_adjust (rtx insn, bool after_p)
987 HOST_WIDE_INT offset;
990 /* Don't handle epilogues at all. Certainly it would be wrong to do so
991 with this function. Proper support would require all frame-related
992 insns to be marked, and to be able to handle saving state around
993 epilogues textually in the middle of the function. */
994 if (prologue_epilogue_contains (insn))
997 /* If INSN is an instruction from target of an annulled branch, the
998 effects are for the target only and so current argument size
999 shouldn't change at all. */
1001 && INSN_ANNULLED_BRANCH_P (XVECEXP (final_sequence, 0, 0))
1002 && INSN_FROM_TARGET_P (insn))
1005 /* If only calls can throw, and we have a frame pointer,
1006 save up adjustments until we see the CALL_INSN. */
1007 if (!flag_asynchronous_unwind_tables
1008 && cur_row->cfa.reg != dw_stack_pointer_regnum)
1010 if (CALL_P (insn) && !after_p)
1012 /* Extract the size of the args from the CALL rtx itself. */
1013 insn = PATTERN (insn);
1014 if (GET_CODE (insn) == PARALLEL)
1015 insn = XVECEXP (insn, 0, 0);
1016 if (GET_CODE (insn) == SET)
1017 insn = SET_SRC (insn);
1018 gcc_assert (GET_CODE (insn) == CALL);
1019 dwarf2out_args_size (INTVAL (XEXP (insn, 1)));
1024 if (CALL_P (insn) && !after_p)
1026 if (!flag_asynchronous_unwind_tables)
1027 dwarf2out_args_size (queued_args_size);
1030 else if (BARRIER_P (insn))
1032 else if (GET_CODE (PATTERN (insn)) == SET)
1033 offset = stack_adjust_offset (PATTERN (insn), queued_args_size, 0);
1034 else if (GET_CODE (PATTERN (insn)) == PARALLEL
1035 || GET_CODE (PATTERN (insn)) == SEQUENCE)
1037 /* There may be stack adjustments inside compound insns. Search
1039 for (offset = 0, i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
1040 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
1041 offset += stack_adjust_offset (XVECEXP (PATTERN (insn), 0, i),
1042 queued_args_size, offset);
1050 dwarf2out_stack_adjust (offset);
1053 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
1054 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
1055 used in places where rtl is prohibited. */
1057 static inline unsigned
1058 dwf_regno (const_rtx reg)
1060 return DWARF_FRAME_REGNUM (REGNO (reg));
1063 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
1066 compare_reg_or_pc (rtx x, rtx y)
1068 if (REG_P (x) && REG_P (y))
1069 return REGNO (x) == REGNO (y);
1073 /* Record SRC as being saved in DEST. DEST may be null to delete an
1074 existing entry. SRC may be a register or PC_RTX. */
1077 record_reg_saved_in_reg (rtx dest, rtx src)
1079 reg_saved_in_data *elt;
1082 FOR_EACH_VEC_ELT (reg_saved_in_data, cur_trace->regs_saved_in_regs, i, elt)
1083 if (compare_reg_or_pc (elt->orig_reg, src))
1086 VEC_unordered_remove (reg_saved_in_data,
1087 cur_trace->regs_saved_in_regs, i);
1089 elt->saved_in_reg = dest;
1096 elt = VEC_safe_push (reg_saved_in_data, heap,
1097 cur_trace->regs_saved_in_regs, NULL);
1098 elt->orig_reg = src;
1099 elt->saved_in_reg = dest;
1102 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1103 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1106 queue_reg_save (rtx reg, rtx sreg, HOST_WIDE_INT offset)
1111 /* Duplicates waste space, but it's also necessary to remove them
1112 for correctness, since the queue gets output in reverse order. */
1113 FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, i, q)
1114 if (compare_reg_or_pc (q->reg, reg))
1117 q = VEC_safe_push (queued_reg_save, heap, queued_reg_saves, NULL);
1121 q->saved_reg = sreg;
1122 q->cfa_offset = offset;
1125 /* Output all the entries in QUEUED_REG_SAVES. */
1128 dwarf2out_flush_queued_reg_saves (void)
1133 FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, i, q)
1135 unsigned int reg, sreg;
1137 record_reg_saved_in_reg (q->saved_reg, q->reg);
1139 if (q->reg == pc_rtx)
1140 reg = DWARF_FRAME_RETURN_COLUMN;
1142 reg = dwf_regno (q->reg);
1144 sreg = dwf_regno (q->saved_reg);
1146 sreg = INVALID_REGNUM;
1147 reg_save (reg, sreg, q->cfa_offset);
1150 VEC_truncate (queued_reg_save, queued_reg_saves, 0);
1153 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1154 location for? Or, does it clobber a register which we've previously
1155 said that some other register is saved in, and for which we now
1156 have a new location for? */
1159 clobbers_queued_reg_save (const_rtx insn)
1164 FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, iq, q)
1167 reg_saved_in_data *rir;
1169 if (modified_in_p (q->reg, insn))
1172 FOR_EACH_VEC_ELT (reg_saved_in_data,
1173 cur_trace->regs_saved_in_regs, ir, rir)
1174 if (compare_reg_or_pc (q->reg, rir->orig_reg)
1175 && modified_in_p (rir->saved_in_reg, insn))
1182 /* What register, if any, is currently saved in REG? */
1185 reg_saved_in (rtx reg)
1187 unsigned int regn = REGNO (reg);
1189 reg_saved_in_data *rir;
1192 FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, i, q)
1193 if (q->saved_reg && regn == REGNO (q->saved_reg))
1196 FOR_EACH_VEC_ELT (reg_saved_in_data, cur_trace->regs_saved_in_regs, i, rir)
1197 if (regn == REGNO (rir->saved_in_reg))
1198 return rir->orig_reg;
1203 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1206 dwarf2out_frame_debug_def_cfa (rtx pat)
1208 dw_cfa_location loc;
1210 memset (&loc, 0, sizeof (loc));
1212 switch (GET_CODE (pat))
1215 loc.reg = dwf_regno (XEXP (pat, 0));
1216 loc.offset = INTVAL (XEXP (pat, 1));
1220 loc.reg = dwf_regno (pat);
1225 pat = XEXP (pat, 0);
1226 if (GET_CODE (pat) == PLUS)
1228 loc.base_offset = INTVAL (XEXP (pat, 1));
1229 pat = XEXP (pat, 0);
1231 loc.reg = dwf_regno (pat);
1235 /* Recurse and define an expression. */
1242 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1245 dwarf2out_frame_debug_adjust_cfa (rtx pat)
1247 dw_cfa_location loc = cur_row->cfa;
1250 gcc_assert (GET_CODE (pat) == SET);
1251 dest = XEXP (pat, 0);
1252 src = XEXP (pat, 1);
1254 switch (GET_CODE (src))
1257 gcc_assert (dwf_regno (XEXP (src, 0)) == loc.reg);
1258 loc.offset -= INTVAL (XEXP (src, 1));
1268 loc.reg = dwf_regno (dest);
1269 gcc_assert (loc.indirect == 0);
1274 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1277 dwarf2out_frame_debug_cfa_offset (rtx set)
1279 HOST_WIDE_INT offset;
1280 rtx src, addr, span;
1281 unsigned int sregno;
1283 src = XEXP (set, 1);
1284 addr = XEXP (set, 0);
1285 gcc_assert (MEM_P (addr));
1286 addr = XEXP (addr, 0);
1288 /* As documented, only consider extremely simple addresses. */
1289 switch (GET_CODE (addr))
1292 gcc_assert (dwf_regno (addr) == cur_row->cfa.reg);
1293 offset = -cur_row->cfa.offset;
1296 gcc_assert (dwf_regno (XEXP (addr, 0)) == cur_row->cfa.reg);
1297 offset = INTVAL (XEXP (addr, 1)) - cur_row->cfa.offset;
1306 sregno = DWARF_FRAME_RETURN_COLUMN;
1310 span = targetm.dwarf_register_span (src);
1311 sregno = dwf_regno (src);
1314 /* ??? We'd like to use queue_reg_save, but we need to come up with
1315 a different flushing heuristic for epilogues. */
1317 reg_save (sregno, INVALID_REGNUM, offset);
1320 /* We have a PARALLEL describing where the contents of SRC live.
1321 Queue register saves for each piece of the PARALLEL. */
1324 HOST_WIDE_INT span_offset = offset;
1326 gcc_assert (GET_CODE (span) == PARALLEL);
1328 limit = XVECLEN (span, 0);
1329 for (par_index = 0; par_index < limit; par_index++)
1331 rtx elem = XVECEXP (span, 0, par_index);
1333 sregno = dwf_regno (src);
1334 reg_save (sregno, INVALID_REGNUM, span_offset);
1335 span_offset += GET_MODE_SIZE (GET_MODE (elem));
1340 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1343 dwarf2out_frame_debug_cfa_register (rtx set)
1346 unsigned sregno, dregno;
1348 src = XEXP (set, 1);
1349 dest = XEXP (set, 0);
1351 record_reg_saved_in_reg (dest, src);
1353 sregno = DWARF_FRAME_RETURN_COLUMN;
1355 sregno = dwf_regno (src);
1357 dregno = dwf_regno (dest);
1359 /* ??? We'd like to use queue_reg_save, but we need to come up with
1360 a different flushing heuristic for epilogues. */
1361 reg_save (sregno, dregno, 0);
1364 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1367 dwarf2out_frame_debug_cfa_expression (rtx set)
1369 rtx src, dest, span;
1370 dw_cfi_ref cfi = new_cfi ();
1373 dest = SET_DEST (set);
1374 src = SET_SRC (set);
1376 gcc_assert (REG_P (src));
1377 gcc_assert (MEM_P (dest));
1379 span = targetm.dwarf_register_span (src);
1382 regno = dwf_regno (src);
1384 cfi->dw_cfi_opc = DW_CFA_expression;
1385 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno;
1386 cfi->dw_cfi_oprnd2.dw_cfi_loc
1387 = mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest),
1388 GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED);
1390 /* ??? We'd like to use queue_reg_save, were the interface different,
1391 and, as above, we could manage flushing for epilogues. */
1393 update_row_reg_save (cur_row, regno, cfi);
1396 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1399 dwarf2out_frame_debug_cfa_restore (rtx reg)
1401 unsigned int regno = dwf_regno (reg);
1403 add_cfi_restore (regno);
1404 update_row_reg_save (cur_row, regno, NULL);
1407 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1408 ??? Perhaps we should note in the CIE where windows are saved (instead of
1409 assuming 0(cfa)) and what registers are in the window. */
1412 dwarf2out_frame_debug_cfa_window_save (void)
1414 dw_cfi_ref cfi = new_cfi ();
1416 cfi->dw_cfi_opc = DW_CFA_GNU_window_save;
1420 /* Record call frame debugging information for an expression EXPR,
1421 which either sets SP or FP (adjusting how we calculate the frame
1422 address) or saves a register to the stack or another register.
1423 LABEL indicates the address of EXPR.
1425 This function encodes a state machine mapping rtxes to actions on
1426 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1427 users need not read the source code.
1429 The High-Level Picture
1431 Changes in the register we use to calculate the CFA: Currently we
1432 assume that if you copy the CFA register into another register, we
1433 should take the other one as the new CFA register; this seems to
1434 work pretty well. If it's wrong for some target, it's simple
1435 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1437 Changes in the register we use for saving registers to the stack:
1438 This is usually SP, but not always. Again, we deduce that if you
1439 copy SP into another register (and SP is not the CFA register),
1440 then the new register is the one we will be using for register
1441 saves. This also seems to work.
1443 Register saves: There's not much guesswork about this one; if
1444 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1445 register save, and the register used to calculate the destination
1446 had better be the one we think we're using for this purpose.
1447 It's also assumed that a copy from a call-saved register to another
1448 register is saving that register if RTX_FRAME_RELATED_P is set on
1449 that instruction. If the copy is from a call-saved register to
1450 the *same* register, that means that the register is now the same
1451 value as in the caller.
1453 Except: If the register being saved is the CFA register, and the
1454 offset is nonzero, we are saving the CFA, so we assume we have to
1455 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1456 the intent is to save the value of SP from the previous frame.
1458 In addition, if a register has previously been saved to a different
1461 Invariants / Summaries of Rules
1463 cfa current rule for calculating the CFA. It usually
1464 consists of a register and an offset. This is
1465 actually stored in cur_row->cfa, but abbreviated
1466 for the purposes of this documentation.
1467 cfa_store register used by prologue code to save things to the stack
1468 cfa_store.offset is the offset from the value of
1469 cfa_store.reg to the actual CFA
1470 cfa_temp register holding an integral value. cfa_temp.offset
1471 stores the value, which will be used to adjust the
1472 stack pointer. cfa_temp is also used like cfa_store,
1473 to track stores to the stack via fp or a temp reg.
1475 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1476 with cfa.reg as the first operand changes the cfa.reg and its
1477 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1480 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1481 expression yielding a constant. This sets cfa_temp.reg
1482 and cfa_temp.offset.
1484 Rule 5: Create a new register cfa_store used to save items to the
1487 Rules 10-14: Save a register to the stack. Define offset as the
1488 difference of the original location and cfa_store's
1489 location (or cfa_temp's location if cfa_temp is used).
1491 Rules 16-20: If AND operation happens on sp in prologue, we assume
1492 stack is realigned. We will use a group of DW_OP_XXX
1493 expressions to represent the location of the stored
1494 register instead of CFA+offset.
1498 "{a,b}" indicates a choice of a xor b.
1499 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1502 (set <reg1> <reg2>:cfa.reg)
1503 effects: cfa.reg = <reg1>
1504 cfa.offset unchanged
1505 cfa_temp.reg = <reg1>
1506 cfa_temp.offset = cfa.offset
1509 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1510 {<const_int>,<reg>:cfa_temp.reg}))
1511 effects: cfa.reg = sp if fp used
1512 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1513 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1514 if cfa_store.reg==sp
1517 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1518 effects: cfa.reg = fp
1519 cfa_offset += +/- <const_int>
1522 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1523 constraints: <reg1> != fp
1525 effects: cfa.reg = <reg1>
1526 cfa_temp.reg = <reg1>
1527 cfa_temp.offset = cfa.offset
1530 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1531 constraints: <reg1> != fp
1533 effects: cfa_store.reg = <reg1>
1534 cfa_store.offset = cfa.offset - cfa_temp.offset
1537 (set <reg> <const_int>)
1538 effects: cfa_temp.reg = <reg>
1539 cfa_temp.offset = <const_int>
1542 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1543 effects: cfa_temp.reg = <reg1>
1544 cfa_temp.offset |= <const_int>
1547 (set <reg> (high <exp>))
1551 (set <reg> (lo_sum <exp> <const_int>))
1552 effects: cfa_temp.reg = <reg>
1553 cfa_temp.offset = <const_int>
1556 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1557 effects: cfa_store.offset -= <const_int>
1558 cfa.offset = cfa_store.offset if cfa.reg == sp
1560 cfa.base_offset = -cfa_store.offset
1563 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1564 effects: cfa_store.offset += -/+ mode_size(mem)
1565 cfa.offset = cfa_store.offset if cfa.reg == sp
1567 cfa.base_offset = -cfa_store.offset
1570 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1573 effects: cfa.reg = <reg1>
1574 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1577 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1578 effects: cfa.reg = <reg1>
1579 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1582 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1583 effects: cfa.reg = <reg1>
1584 cfa.base_offset = -cfa_temp.offset
1585 cfa_temp.offset -= mode_size(mem)
1588 (set <reg> {unspec, unspec_volatile})
1589 effects: target-dependent
1592 (set sp (and: sp <const_int>))
1593 constraints: cfa_store.reg == sp
1594 effects: cfun->fde.stack_realign = 1
1595 cfa_store.offset = 0
1596 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1599 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1600 effects: cfa_store.offset += -/+ mode_size(mem)
1603 (set (mem ({pre_inc, pre_dec} sp)) fp)
1604 constraints: fde->stack_realign == 1
1605 effects: cfa_store.offset = 0
1606 cfa.reg != HARD_FRAME_POINTER_REGNUM
1609 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1610 constraints: fde->stack_realign == 1
1612 && cfa.indirect == 0
1613 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1614 effects: Use DW_CFA_def_cfa_expression to define cfa
1615 cfa.reg == fde->drap_reg */
1618 dwarf2out_frame_debug_expr (rtx expr)
1620 dw_cfa_location cfa = cur_row->cfa;
1621 rtx src, dest, span;
1622 HOST_WIDE_INT offset;
1625 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1626 the PARALLEL independently. The first element is always processed if
1627 it is a SET. This is for backward compatibility. Other elements
1628 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1629 flag is set in them. */
1630 if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE)
1633 int limit = XVECLEN (expr, 0);
1636 /* PARALLELs have strict read-modify-write semantics, so we
1637 ought to evaluate every rvalue before changing any lvalue.
1638 It's cumbersome to do that in general, but there's an
1639 easy approximation that is enough for all current users:
1640 handle register saves before register assignments. */
1641 if (GET_CODE (expr) == PARALLEL)
1642 for (par_index = 0; par_index < limit; par_index++)
1644 elem = XVECEXP (expr, 0, par_index);
1645 if (GET_CODE (elem) == SET
1646 && MEM_P (SET_DEST (elem))
1647 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
1648 dwarf2out_frame_debug_expr (elem);
1651 for (par_index = 0; par_index < limit; par_index++)
1653 elem = XVECEXP (expr, 0, par_index);
1654 if (GET_CODE (elem) == SET
1655 && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE)
1656 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
1657 dwarf2out_frame_debug_expr (elem);
1658 else if (GET_CODE (elem) == SET
1660 && !RTX_FRAME_RELATED_P (elem))
1662 /* Stack adjustment combining might combine some post-prologue
1663 stack adjustment into a prologue stack adjustment. */
1664 HOST_WIDE_INT offset
1665 = stack_adjust_offset (elem, queued_args_size, 0);
1668 dwarf2out_stack_adjust (offset);
1674 gcc_assert (GET_CODE (expr) == SET);
1676 src = SET_SRC (expr);
1677 dest = SET_DEST (expr);
1681 rtx rsi = reg_saved_in (src);
1688 switch (GET_CODE (dest))
1691 switch (GET_CODE (src))
1693 /* Setting FP from SP. */
1695 if (cfa.reg == dwf_regno (src))
1698 /* Update the CFA rule wrt SP or FP. Make sure src is
1699 relative to the current CFA register.
1701 We used to require that dest be either SP or FP, but the
1702 ARM copies SP to a temporary register, and from there to
1703 FP. So we just rely on the backends to only set
1704 RTX_FRAME_RELATED_P on appropriate insns. */
1705 cfa.reg = dwf_regno (dest);
1706 cur_trace->cfa_temp.reg = cfa.reg;
1707 cur_trace->cfa_temp.offset = cfa.offset;
1711 /* Saving a register in a register. */
1712 gcc_assert (!fixed_regs [REGNO (dest)]
1713 /* For the SPARC and its register window. */
1714 || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN));
1716 /* After stack is aligned, we can only save SP in FP
1717 if drap register is used. In this case, we have
1718 to restore stack pointer with the CFA value and we
1719 don't generate this DWARF information. */
1721 && fde->stack_realign
1722 && REGNO (src) == STACK_POINTER_REGNUM)
1723 gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM
1724 && fde->drap_reg != INVALID_REGNUM
1725 && cfa.reg != dwf_regno (src));
1727 queue_reg_save (src, dest, 0);
1734 if (dest == stack_pointer_rtx)
1738 switch (GET_CODE (XEXP (src, 1)))
1741 offset = INTVAL (XEXP (src, 1));
1744 gcc_assert (dwf_regno (XEXP (src, 1))
1745 == cur_trace->cfa_temp.reg);
1746 offset = cur_trace->cfa_temp.offset;
1752 if (XEXP (src, 0) == hard_frame_pointer_rtx)
1754 /* Restoring SP from FP in the epilogue. */
1755 gcc_assert (cfa.reg == dw_frame_pointer_regnum);
1756 cfa.reg = dw_stack_pointer_regnum;
1758 else if (GET_CODE (src) == LO_SUM)
1759 /* Assume we've set the source reg of the LO_SUM from sp. */
1762 gcc_assert (XEXP (src, 0) == stack_pointer_rtx);
1764 if (GET_CODE (src) != MINUS)
1766 if (cfa.reg == dw_stack_pointer_regnum)
1767 cfa.offset += offset;
1768 if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum)
1769 cur_trace->cfa_store.offset += offset;
1771 else if (dest == hard_frame_pointer_rtx)
1774 /* Either setting the FP from an offset of the SP,
1775 or adjusting the FP */
1776 gcc_assert (frame_pointer_needed);
1778 gcc_assert (REG_P (XEXP (src, 0))
1779 && dwf_regno (XEXP (src, 0)) == cfa.reg
1780 && CONST_INT_P (XEXP (src, 1)));
1781 offset = INTVAL (XEXP (src, 1));
1782 if (GET_CODE (src) != MINUS)
1784 cfa.offset += offset;
1785 cfa.reg = dw_frame_pointer_regnum;
1789 gcc_assert (GET_CODE (src) != MINUS);
1792 if (REG_P (XEXP (src, 0))
1793 && dwf_regno (XEXP (src, 0)) == cfa.reg
1794 && CONST_INT_P (XEXP (src, 1)))
1796 /* Setting a temporary CFA register that will be copied
1797 into the FP later on. */
1798 offset = - INTVAL (XEXP (src, 1));
1799 cfa.offset += offset;
1800 cfa.reg = dwf_regno (dest);
1801 /* Or used to save regs to the stack. */
1802 cur_trace->cfa_temp.reg = cfa.reg;
1803 cur_trace->cfa_temp.offset = cfa.offset;
1807 else if (REG_P (XEXP (src, 0))
1808 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
1809 && XEXP (src, 1) == stack_pointer_rtx)
1811 /* Setting a scratch register that we will use instead
1812 of SP for saving registers to the stack. */
1813 gcc_assert (cfa.reg == dw_stack_pointer_regnum);
1814 cur_trace->cfa_store.reg = dwf_regno (dest);
1815 cur_trace->cfa_store.offset
1816 = cfa.offset - cur_trace->cfa_temp.offset;
1820 else if (GET_CODE (src) == LO_SUM
1821 && CONST_INT_P (XEXP (src, 1)))
1823 cur_trace->cfa_temp.reg = dwf_regno (dest);
1824 cur_trace->cfa_temp.offset = INTVAL (XEXP (src, 1));
1833 cur_trace->cfa_temp.reg = dwf_regno (dest);
1834 cur_trace->cfa_temp.offset = INTVAL (src);
1839 gcc_assert (REG_P (XEXP (src, 0))
1840 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
1841 && CONST_INT_P (XEXP (src, 1)));
1843 cur_trace->cfa_temp.reg = dwf_regno (dest);
1844 cur_trace->cfa_temp.offset |= INTVAL (XEXP (src, 1));
1847 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1848 which will fill in all of the bits. */
1855 case UNSPEC_VOLATILE:
1856 /* All unspecs should be represented by REG_CFA_* notes. */
1862 /* If this AND operation happens on stack pointer in prologue,
1863 we assume the stack is realigned and we extract the
1865 if (fde && XEXP (src, 0) == stack_pointer_rtx)
1867 /* We interpret reg_save differently with stack_realign set.
1868 Thus we must flush whatever we have queued first. */
1869 dwarf2out_flush_queued_reg_saves ();
1871 gcc_assert (cur_trace->cfa_store.reg
1872 == dwf_regno (XEXP (src, 0)));
1873 fde->stack_realign = 1;
1874 fde->stack_realignment = INTVAL (XEXP (src, 1));
1875 cur_trace->cfa_store.offset = 0;
1877 if (cfa.reg != dw_stack_pointer_regnum
1878 && cfa.reg != dw_frame_pointer_regnum)
1879 fde->drap_reg = cfa.reg;
1892 /* Saving a register to the stack. Make sure dest is relative to the
1894 switch (GET_CODE (XEXP (dest, 0)))
1900 /* We can't handle variable size modifications. */
1901 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest, 0), 1), 1))
1903 offset = -INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1));
1905 gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM
1906 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
1908 cur_trace->cfa_store.offset += offset;
1909 if (cfa.reg == dw_stack_pointer_regnum)
1910 cfa.offset = cur_trace->cfa_store.offset;
1912 if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY)
1913 offset -= cur_trace->cfa_store.offset;
1915 offset = -cur_trace->cfa_store.offset;
1922 offset = GET_MODE_SIZE (GET_MODE (dest));
1923 if (GET_CODE (XEXP (dest, 0)) == PRE_INC)
1926 gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0))
1927 == STACK_POINTER_REGNUM)
1928 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
1930 cur_trace->cfa_store.offset += offset;
1932 /* Rule 18: If stack is aligned, we will use FP as a
1933 reference to represent the address of the stored
1936 && fde->stack_realign
1937 && src == hard_frame_pointer_rtx)
1939 gcc_assert (cfa.reg != dw_frame_pointer_regnum);
1940 cur_trace->cfa_store.offset = 0;
1943 if (cfa.reg == dw_stack_pointer_regnum)
1944 cfa.offset = cur_trace->cfa_store.offset;
1946 if (GET_CODE (XEXP (dest, 0)) == POST_DEC)
1947 offset += -cur_trace->cfa_store.offset;
1949 offset = -cur_trace->cfa_store.offset;
1953 /* With an offset. */
1960 gcc_assert (CONST_INT_P (XEXP (XEXP (dest, 0), 1))
1961 && REG_P (XEXP (XEXP (dest, 0), 0)));
1962 offset = INTVAL (XEXP (XEXP (dest, 0), 1));
1963 if (GET_CODE (XEXP (dest, 0)) == MINUS)
1966 regno = dwf_regno (XEXP (XEXP (dest, 0), 0));
1968 if (cfa.reg == regno)
1969 offset -= cfa.offset;
1970 else if (cur_trace->cfa_store.reg == regno)
1971 offset -= cur_trace->cfa_store.offset;
1974 gcc_assert (cur_trace->cfa_temp.reg == regno);
1975 offset -= cur_trace->cfa_temp.offset;
1981 /* Without an offset. */
1984 unsigned int regno = dwf_regno (XEXP (dest, 0));
1986 if (cfa.reg == regno)
1987 offset = -cfa.offset;
1988 else if (cur_trace->cfa_store.reg == regno)
1989 offset = -cur_trace->cfa_store.offset;
1992 gcc_assert (cur_trace->cfa_temp.reg == regno);
1993 offset = -cur_trace->cfa_temp.offset;
2000 gcc_assert (cur_trace->cfa_temp.reg
2001 == dwf_regno (XEXP (XEXP (dest, 0), 0)));
2002 offset = -cur_trace->cfa_temp.offset;
2003 cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest));
2011 /* If the source operand of this MEM operation is a memory,
2012 we only care how much stack grew. */
2017 && REGNO (src) != STACK_POINTER_REGNUM
2018 && REGNO (src) != HARD_FRAME_POINTER_REGNUM
2019 && dwf_regno (src) == cfa.reg)
2021 /* We're storing the current CFA reg into the stack. */
2023 if (cfa.offset == 0)
2026 /* If stack is aligned, putting CFA reg into stack means
2027 we can no longer use reg + offset to represent CFA.
2028 Here we use DW_CFA_def_cfa_expression instead. The
2029 result of this expression equals to the original CFA
2032 && fde->stack_realign
2033 && cfa.indirect == 0
2034 && cfa.reg != dw_frame_pointer_regnum)
2036 dw_cfa_location cfa_exp;
2038 gcc_assert (fde->drap_reg == cfa.reg);
2040 cfa_exp.indirect = 1;
2041 cfa_exp.reg = dw_frame_pointer_regnum;
2042 cfa_exp.base_offset = offset;
2045 fde->drap_reg_saved = 1;
2047 def_cfa_1 (&cfa_exp);
2051 /* If the source register is exactly the CFA, assume
2052 we're saving SP like any other register; this happens
2055 queue_reg_save (stack_pointer_rtx, NULL_RTX, offset);
2060 /* Otherwise, we'll need to look in the stack to
2061 calculate the CFA. */
2062 rtx x = XEXP (dest, 0);
2066 gcc_assert (REG_P (x));
2068 cfa.reg = dwf_regno (x);
2069 cfa.base_offset = offset;
2080 span = targetm.dwarf_register_span (src);
2082 queue_reg_save (src, NULL_RTX, offset);
2085 /* We have a PARALLEL describing where the contents of SRC live.
2086 Queue register saves for each piece of the PARALLEL. */
2089 HOST_WIDE_INT span_offset = offset;
2091 gcc_assert (GET_CODE (span) == PARALLEL);
2093 limit = XVECLEN (span, 0);
2094 for (par_index = 0; par_index < limit; par_index++)
2096 rtx elem = XVECEXP (span, 0, par_index);
2097 queue_reg_save (elem, NULL_RTX, span_offset);
2098 span_offset += GET_MODE_SIZE (GET_MODE (elem));
2108 /* Record call frame debugging information for INSN, which either
2109 sets SP or FP (adjusting how we calculate the frame address) or saves a
2110 register to the stack. If INSN is NULL_RTX, initialize our state.
2112 If AFTER_P is false, we're being called before the insn is emitted,
2113 otherwise after. Call instructions get invoked twice. */
2116 dwarf2out_frame_debug (rtx insn, bool after_p)
2119 bool handled_one = false;
2120 bool need_flush = false;
2122 if (!NONJUMP_INSN_P (insn) || clobbers_queued_reg_save (insn))
2123 dwarf2out_flush_queued_reg_saves ();
2125 if (!RTX_FRAME_RELATED_P (insn))
2127 /* ??? This should be done unconditionally since stack adjustments
2128 matter if the stack pointer is not the CFA register anymore but
2129 is still used to save registers. */
2130 if (!ACCUMULATE_OUTGOING_ARGS)
2131 dwarf2out_notice_stack_adjust (insn, after_p);
2135 any_cfis_emitted = false;
2137 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2138 switch (REG_NOTE_KIND (note))
2140 case REG_FRAME_RELATED_EXPR:
2141 insn = XEXP (note, 0);
2144 case REG_CFA_DEF_CFA:
2145 dwarf2out_frame_debug_def_cfa (XEXP (note, 0));
2149 case REG_CFA_ADJUST_CFA:
2154 if (GET_CODE (n) == PARALLEL)
2155 n = XVECEXP (n, 0, 0);
2157 dwarf2out_frame_debug_adjust_cfa (n);
2161 case REG_CFA_OFFSET:
2164 n = single_set (insn);
2165 dwarf2out_frame_debug_cfa_offset (n);
2169 case REG_CFA_REGISTER:
2174 if (GET_CODE (n) == PARALLEL)
2175 n = XVECEXP (n, 0, 0);
2177 dwarf2out_frame_debug_cfa_register (n);
2181 case REG_CFA_EXPRESSION:
2184 n = single_set (insn);
2185 dwarf2out_frame_debug_cfa_expression (n);
2189 case REG_CFA_RESTORE:
2194 if (GET_CODE (n) == PARALLEL)
2195 n = XVECEXP (n, 0, 0);
2198 dwarf2out_frame_debug_cfa_restore (n);
2202 case REG_CFA_SET_VDRAP:
2206 dw_fde_ref fde = cfun->fde;
2209 gcc_assert (fde->vdrap_reg == INVALID_REGNUM);
2211 fde->vdrap_reg = dwf_regno (n);
2217 case REG_CFA_WINDOW_SAVE:
2218 dwarf2out_frame_debug_cfa_window_save ();
2222 case REG_CFA_FLUSH_QUEUE:
2223 /* The actual flush happens below. */
2234 /* Minimize the number of advances by emitting the entire queue
2235 once anything is emitted. */
2236 need_flush |= any_cfis_emitted;
2240 insn = PATTERN (insn);
2242 dwarf2out_frame_debug_expr (insn);
2244 /* Check again. A parallel can save and update the same register.
2245 We could probably check just once, here, but this is safer than
2246 removing the check at the start of the function. */
2247 if (any_cfis_emitted || clobbers_queued_reg_save (insn))
2252 dwarf2out_flush_queued_reg_saves ();
2255 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2258 change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row)
2260 size_t i, n_old, n_new, n_max;
2263 if (new_row->cfa_cfi && !cfi_equal_p (old_row->cfa_cfi, new_row->cfa_cfi))
2264 add_cfi (new_row->cfa_cfi);
2267 cfi = def_cfa_0 (&old_row->cfa, &new_row->cfa);
2272 if (old_row->args_size != new_row->args_size)
2273 add_cfi_args_size (new_row->args_size);
2275 n_old = VEC_length (dw_cfi_ref, old_row->reg_save);
2276 n_new = VEC_length (dw_cfi_ref, new_row->reg_save);
2277 n_max = MAX (n_old, n_new);
2279 for (i = 0; i < n_max; ++i)
2281 dw_cfi_ref r_old = NULL, r_new = NULL;
2284 r_old = VEC_index (dw_cfi_ref, old_row->reg_save, i);
2286 r_new = VEC_index (dw_cfi_ref, new_row->reg_save, i);
2290 else if (r_new == NULL)
2291 add_cfi_restore (i);
2292 else if (!cfi_equal_p (r_old, r_new))
2297 /* Examine CFI and return true if a cfi label and set_loc is needed
2298 beforehand. Even when generating CFI assembler instructions, we
2299 still have to add the cfi to the list so that lookup_cfa_1 works
2300 later on. When -g2 and above we even need to force emitting of
2301 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2302 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2303 and so don't use convert_cfa_to_fb_loc_list. */
2306 cfi_label_required_p (dw_cfi_ref cfi)
2308 if (!dwarf2out_do_cfi_asm ())
2311 if (dwarf_version == 2
2312 && debug_info_level > DINFO_LEVEL_TERSE
2313 && (write_symbols == DWARF2_DEBUG
2314 || write_symbols == VMS_AND_DWARF2_DEBUG))
2316 switch (cfi->dw_cfi_opc)
2318 case DW_CFA_def_cfa_offset:
2319 case DW_CFA_def_cfa_offset_sf:
2320 case DW_CFA_def_cfa_register:
2321 case DW_CFA_def_cfa:
2322 case DW_CFA_def_cfa_sf:
2323 case DW_CFA_def_cfa_expression:
2324 case DW_CFA_restore_state:
2333 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2334 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2337 add_cfis_to_fde (void)
2339 dw_fde_ref fde = cfun->fde;
2341 /* We always start with a function_begin label. */
2344 for (insn = get_insns (); insn; insn = next)
2346 next = NEXT_INSN (insn);
2348 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
2350 fde->dw_fde_switch_cfi_index
2351 = VEC_length (dw_cfi_ref, fde->dw_fde_cfi);
2352 /* Don't attempt to advance_loc4 between labels
2353 in different sections. */
2357 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
2359 bool required = cfi_label_required_p (NOTE_CFI (insn));
2360 while (next && NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI)
2362 required |= cfi_label_required_p (NOTE_CFI (next));
2363 next = NEXT_INSN (next);
2367 int num = dwarf2out_cfi_label_num;
2368 const char *label = dwarf2out_cfi_label ();
2372 /* Set the location counter to the new label. */
2374 xcfi->dw_cfi_opc = (first ? DW_CFA_set_loc
2375 : DW_CFA_advance_loc4);
2376 xcfi->dw_cfi_oprnd1.dw_cfi_addr = label;
2377 VEC_safe_push (dw_cfi_ref, gc, fde->dw_fde_cfi, xcfi);
2379 tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn);
2380 NOTE_LABEL_NUMBER (tmp) = num;
2385 VEC_safe_push (dw_cfi_ref, gc, fde->dw_fde_cfi, NOTE_CFI (insn));
2386 insn = NEXT_INSN (insn);
2388 while (insn != next);
2394 /* If LABEL is the start of a trace, then initialize the state of that
2395 trace from CUR_TRACE and CUR_ROW. */
2398 maybe_record_trace_start (rtx start, rtx origin, bool abnormal)
2402 /* Sync queued data before propagating to a destination,
2403 lest we propagate out-of-date data. */
2404 dwarf2out_flush_queued_reg_saves ();
2405 dwarf2out_args_size (queued_args_size);
2407 ti = get_trace_info (start);
2408 gcc_assert (ti != NULL);
2412 fprintf (dump_file, " saw edge from trace %u to %u (via %s %d)\n",
2413 get_trace_index (cur_trace), get_trace_index (ti),
2414 (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru"),
2415 (origin ? INSN_UID (origin) : 0));
2418 if (ti->beg_row == NULL)
2420 /* This is the first time we've encountered this trace. Propagate
2421 state across the edge and push the trace onto the work list. */
2422 ti->beg_row = copy_cfi_row (cur_row);
2423 /* On all abnormal edges, especially EH and non-local-goto, we take
2424 care to free the pushed arguments. */
2426 ti->beg_row->args_size = 0;
2428 ti->cfa_store = cur_trace->cfa_store;
2429 ti->cfa_temp = cur_trace->cfa_temp;
2430 ti->regs_saved_in_regs = VEC_copy (reg_saved_in_data, heap,
2431 cur_trace->regs_saved_in_regs);
2433 VEC_safe_push (dw_trace_info_ref, heap, trace_work_list, ti);
2436 fprintf (dump_file, "\tpush trace %u to worklist\n",
2437 get_trace_index (ti));
2441 /* We ought to have the same state incoming to a given trace no
2442 matter how we arrive at the trace. Anything else means we've
2443 got some kind of optimization error. */
2444 gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row));
2448 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2449 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2452 create_trace_edges (rtx insn)
2459 if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX))
2461 else if (tablejump_p (insn, NULL, &tmp))
2465 tmp = PATTERN (tmp);
2466 vec = XVEC (tmp, GET_CODE (tmp) == ADDR_DIFF_VEC);
2468 n = GET_NUM_ELEM (vec);
2469 for (i = 0; i < n; ++i)
2471 lab = XEXP (RTVEC_ELT (vec, i), 0);
2472 maybe_record_trace_start (lab, insn, false);
2475 else if (computed_jump_p (insn))
2477 for (lab = forced_labels; lab; lab = XEXP (lab, 1))
2478 maybe_record_trace_start (XEXP (lab, 0), insn, true);
2480 else if (returnjump_p (insn))
2482 else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL)
2484 n = ASM_OPERANDS_LABEL_LENGTH (tmp);
2485 for (i = 0; i < n; ++i)
2487 lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0);
2488 maybe_record_trace_start (lab, insn, true);
2493 lab = JUMP_LABEL (insn);
2494 gcc_assert (lab != NULL);
2495 maybe_record_trace_start (lab, insn, false);
2498 else if (CALL_P (insn))
2500 /* Sibling calls don't have edges inside this function. */
2501 if (SIBLING_CALL_P (insn))
2504 /* Process non-local goto edges. */
2505 if (can_nonlocal_goto (insn))
2506 for (lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1))
2507 maybe_record_trace_start (XEXP (lab, 0), insn, true);
2509 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2511 rtx seq = PATTERN (insn);
2512 int i, n = XVECLEN (seq, 0);
2513 for (i = 0; i < n; ++i)
2514 create_trace_edges (XVECEXP (seq, 0, i));
2518 /* Process EH edges. */
2519 if (CALL_P (insn) || cfun->can_throw_non_call_exceptions)
2521 eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn);
2523 maybe_record_trace_start (lp->landing_pad, insn, true);
2527 /* Scan the trace beginning at INSN and create the CFI notes for the
2528 instructions therein. */
2531 scan_trace (dw_trace_info *trace)
2533 rtx insn = trace->head;
2536 fprintf (dump_file, "Processing trace %u : start at %s %d\n",
2537 get_trace_index (trace), rtx_name[(int) GET_CODE (insn)],
2540 trace->end_row = copy_cfi_row (trace->beg_row);
2543 cur_row = trace->end_row;
2544 queued_args_size = cur_row->args_size;
2546 for (insn = NEXT_INSN (insn); insn ; insn = NEXT_INSN (insn))
2550 add_cfi_insn = PREV_INSN (insn);
2552 /* Notice the end of a trace. */
2553 if (BARRIER_P (insn) || save_point_p (insn))
2555 dwarf2out_flush_queued_reg_saves ();
2556 dwarf2out_args_size (queued_args_size);
2558 /* Propagate across fallthru edges. */
2559 if (!BARRIER_P (insn))
2560 maybe_record_trace_start (insn, NULL, false);
2564 if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn))
2567 pat = PATTERN (insn);
2568 if (asm_noperands (pat) >= 0)
2570 dwarf2out_frame_debug (insn, false);
2571 add_cfi_insn = insn;
2575 if (GET_CODE (pat) == SEQUENCE)
2577 int i, n = XVECLEN (pat, 0);
2578 for (i = 1; i < n; ++i)
2579 dwarf2out_frame_debug (XVECEXP (pat, 0, i), false);
2583 dwarf2out_frame_debug (insn, false);
2584 else if (find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)
2585 || (cfun->can_throw_non_call_exceptions
2586 && can_throw_internal (insn)))
2587 dwarf2out_flush_queued_reg_saves ();
2589 /* Do not separate tablejump insns from their ADDR_DIFF_VEC.
2590 Putting the note after the VEC should be ok. */
2591 if (!tablejump_p (insn, NULL, &add_cfi_insn))
2592 add_cfi_insn = insn;
2594 dwarf2out_frame_debug (insn, true);
2597 /* Note that a test for control_flow_insn_p does exactly the
2598 same tests as are done to actually create the edges. So
2599 always call the routine and let it not create edges for
2600 non-control-flow insns. */
2601 create_trace_edges (insn);
2604 add_cfi_insn = NULL;
2609 /* Scan the function and create the initial set of CFI notes. */
2612 create_cfi_notes (void)
2616 gcc_checking_assert (queued_reg_saves == NULL);
2617 gcc_checking_assert (trace_work_list == NULL);
2619 /* Always begin at the entry trace. */
2620 ti = VEC_index (dw_trace_info, trace_info, 0);
2623 while (!VEC_empty (dw_trace_info_ref, trace_work_list))
2625 ti = VEC_pop (dw_trace_info_ref, trace_work_list);
2629 VEC_free (queued_reg_save, heap, queued_reg_saves);
2630 VEC_free (dw_trace_info_ref, heap, trace_work_list);
2633 /* Insert CFI notes between traces to properly change state between them. */
2634 /* ??? TODO: Make use of remember/restore_state. */
2637 connect_traces (void)
2639 unsigned i, n = VEC_length (dw_trace_info, trace_info);
2640 dw_trace_info *prev_ti, *ti;
2642 prev_ti = VEC_index (dw_trace_info, trace_info, 0);
2644 for (i = 1; i < n; ++i)
2646 dw_cfi_row *old_row;
2648 ti = VEC_index (dw_trace_info, trace_info, i);
2650 /* ??? Ideally, we should have both queued and processed. However
2651 the current representation of constant pools on various targets
2652 is indistinguishable from unreachable code. Assume for the
2653 moment that we can simply skip over such traces. */
2654 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2655 these are not "real" instructions, and should not be considered.
2656 This could be generically useful for tablejump data as well. */
2657 if (ti->beg_row == NULL)
2659 gcc_assert (ti->end_row != NULL);
2661 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2662 for the portion of the function in the alternate text
2663 section. The row state at the very beginning of that
2664 new FDE will be exactly the row state from the CIE. */
2665 if (ti->switch_sections)
2666 old_row = cie_cfi_row;
2668 old_row = prev_ti->end_row;
2670 add_cfi_insn = ti->head;
2671 change_cfi_row (old_row, ti->beg_row);
2673 if (dump_file && add_cfi_insn != ti->head)
2677 fprintf (dump_file, "Fixup between trace %u and %u:\n", i - 1, i);
2682 note = NEXT_INSN (note);
2683 gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI);
2684 output_cfi_directive (dump_file, NOTE_CFI (note));
2686 while (note != add_cfi_insn);
2693 /* Set up the pseudo-cfg of instruction traces, as described at the
2694 block comment at the top of the file. */
2697 create_pseudo_cfg (void)
2699 bool saw_barrier, switch_sections;
2704 /* The first trace begins at the start of the function,
2705 and begins with the CIE row state. */
2706 trace_info = VEC_alloc (dw_trace_info, heap, 16);
2707 ti = VEC_quick_push (dw_trace_info, trace_info, NULL);
2709 memset (ti, 0, sizeof (*ti));
2710 ti->head = get_insns ();
2711 ti->beg_row = cie_cfi_row;
2712 ti->cfa_store = cie_cfi_row->cfa;
2713 ti->cfa_temp.reg = INVALID_REGNUM;
2714 if (cie_return_save)
2715 VEC_safe_push (reg_saved_in_data, heap,
2716 ti->regs_saved_in_regs, cie_return_save);
2718 /* Walk all the insns, collecting start of trace locations. */
2719 saw_barrier = false;
2720 switch_sections = false;
2721 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2723 if (BARRIER_P (insn))
2725 else if (NOTE_P (insn)
2726 && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
2728 /* We should have just seen a barrier. */
2729 gcc_assert (saw_barrier);
2730 switch_sections = true;
2732 /* Watch out for save_point notes between basic blocks.
2733 In particular, a note after a barrier. Do not record these,
2734 delaying trace creation until the label. */
2735 else if (save_point_p (insn)
2736 && (LABEL_P (insn) || !saw_barrier))
2738 ti = VEC_safe_push (dw_trace_info, heap, trace_info, NULL);
2739 memset (ti, 0, sizeof (*ti));
2741 ti->switch_sections = switch_sections;
2743 saw_barrier = false;
2744 switch_sections = false;
2748 /* Create the trace index after we've finished building trace_info,
2749 avoiding stale pointer problems due to reallocation. */
2750 trace_index = htab_create (VEC_length (dw_trace_info, trace_info),
2751 dw_trace_info_hash, dw_trace_info_eq, NULL);
2752 FOR_EACH_VEC_ELT (dw_trace_info, trace_info, i, ti)
2757 fprintf (dump_file, "Creating trace %u : start at %s %d%s\n", i,
2758 rtx_name[(int) GET_CODE (ti->head)], INSN_UID (ti->head),
2759 ti->switch_sections ? " (section switch)" : "");
2761 slot = htab_find_slot_with_hash (trace_index, ti,
2762 INSN_UID (ti->head), INSERT);
2763 gcc_assert (*slot == NULL);
2764 *slot = (void *) ti;
2768 /* Record the initial position of the return address. RTL is
2769 INCOMING_RETURN_ADDR_RTX. */
2772 initial_return_save (rtx rtl)
2774 unsigned int reg = INVALID_REGNUM;
2775 HOST_WIDE_INT offset = 0;
2777 switch (GET_CODE (rtl))
2780 /* RA is in a register. */
2781 reg = dwf_regno (rtl);
2785 /* RA is on the stack. */
2786 rtl = XEXP (rtl, 0);
2787 switch (GET_CODE (rtl))
2790 gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM);
2795 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
2796 offset = INTVAL (XEXP (rtl, 1));
2800 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
2801 offset = -INTVAL (XEXP (rtl, 1));
2811 /* The return address is at some offset from any value we can
2812 actually load. For instance, on the SPARC it is in %i7+8. Just
2813 ignore the offset for now; it doesn't matter for unwinding frames. */
2814 gcc_assert (CONST_INT_P (XEXP (rtl, 1)));
2815 initial_return_save (XEXP (rtl, 0));
2822 if (reg != DWARF_FRAME_RETURN_COLUMN)
2824 if (reg != INVALID_REGNUM)
2825 record_reg_saved_in_reg (rtl, pc_rtx);
2826 reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cur_row->cfa.offset);
2831 create_cie_data (void)
2833 dw_cfa_location loc;
2834 dw_trace_info cie_trace;
2836 dw_stack_pointer_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
2837 dw_frame_pointer_regnum = DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM);
2839 memset (&cie_trace, 0, sizeof(cie_trace));
2840 cur_trace = &cie_trace;
2842 add_cfi_vec = &cie_cfi_vec;
2843 cie_cfi_row = cur_row = new_cfi_row ();
2845 /* On entry, the Canonical Frame Address is at SP. */
2846 memset(&loc, 0, sizeof (loc));
2847 loc.reg = dw_stack_pointer_regnum;
2848 loc.offset = INCOMING_FRAME_SP_OFFSET;
2851 if (targetm.debug_unwind_info () == UI_DWARF2
2852 || targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
2854 initial_return_save (INCOMING_RETURN_ADDR_RTX);
2856 /* For a few targets, we have the return address incoming into a
2857 register, but choose a different return column. This will result
2858 in a DW_CFA_register for the return, and an entry in
2859 regs_saved_in_regs to match. If the target later stores that
2860 return address register to the stack, we want to be able to emit
2861 the DW_CFA_offset against the return column, not the intermediate
2862 save register. Save the contents of regs_saved_in_regs so that
2863 we can re-initialize it at the start of each function. */
2864 switch (VEC_length (reg_saved_in_data, cie_trace.regs_saved_in_regs))
2869 cie_return_save = ggc_alloc_reg_saved_in_data ();
2870 *cie_return_save = *VEC_index (reg_saved_in_data,
2871 cie_trace.regs_saved_in_regs, 0);
2872 VEC_free (reg_saved_in_data, heap, cie_trace.regs_saved_in_regs);
2884 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2885 state at each location within the function. These notes will be
2886 emitted during pass_final. */
2889 execute_dwarf2_frame (void)
2891 /* The first time we're called, compute the incoming frame state. */
2892 if (cie_cfi_vec == NULL)
2895 dwarf2out_alloc_current_fde ();
2897 create_pseudo_cfg ();
2900 create_cfi_notes ();
2904 /* Free all the data we allocated. */
2909 FOR_EACH_VEC_ELT (dw_trace_info, trace_info, i, ti)
2910 VEC_free (reg_saved_in_data, heap, ti->regs_saved_in_regs);
2912 VEC_free (dw_trace_info, heap, trace_info);
2914 htab_delete (trace_index);
2920 /* Convert a DWARF call frame info. operation to its string name */
2923 dwarf_cfi_name (unsigned int cfi_opc)
2927 case DW_CFA_advance_loc:
2928 return "DW_CFA_advance_loc";
2930 return "DW_CFA_offset";
2931 case DW_CFA_restore:
2932 return "DW_CFA_restore";
2934 return "DW_CFA_nop";
2935 case DW_CFA_set_loc:
2936 return "DW_CFA_set_loc";
2937 case DW_CFA_advance_loc1:
2938 return "DW_CFA_advance_loc1";
2939 case DW_CFA_advance_loc2:
2940 return "DW_CFA_advance_loc2";
2941 case DW_CFA_advance_loc4:
2942 return "DW_CFA_advance_loc4";
2943 case DW_CFA_offset_extended:
2944 return "DW_CFA_offset_extended";
2945 case DW_CFA_restore_extended:
2946 return "DW_CFA_restore_extended";
2947 case DW_CFA_undefined:
2948 return "DW_CFA_undefined";
2949 case DW_CFA_same_value:
2950 return "DW_CFA_same_value";
2951 case DW_CFA_register:
2952 return "DW_CFA_register";
2953 case DW_CFA_remember_state:
2954 return "DW_CFA_remember_state";
2955 case DW_CFA_restore_state:
2956 return "DW_CFA_restore_state";
2957 case DW_CFA_def_cfa:
2958 return "DW_CFA_def_cfa";
2959 case DW_CFA_def_cfa_register:
2960 return "DW_CFA_def_cfa_register";
2961 case DW_CFA_def_cfa_offset:
2962 return "DW_CFA_def_cfa_offset";
2965 case DW_CFA_def_cfa_expression:
2966 return "DW_CFA_def_cfa_expression";
2967 case DW_CFA_expression:
2968 return "DW_CFA_expression";
2969 case DW_CFA_offset_extended_sf:
2970 return "DW_CFA_offset_extended_sf";
2971 case DW_CFA_def_cfa_sf:
2972 return "DW_CFA_def_cfa_sf";
2973 case DW_CFA_def_cfa_offset_sf:
2974 return "DW_CFA_def_cfa_offset_sf";
2976 /* SGI/MIPS specific */
2977 case DW_CFA_MIPS_advance_loc8:
2978 return "DW_CFA_MIPS_advance_loc8";
2980 /* GNU extensions */
2981 case DW_CFA_GNU_window_save:
2982 return "DW_CFA_GNU_window_save";
2983 case DW_CFA_GNU_args_size:
2984 return "DW_CFA_GNU_args_size";
2985 case DW_CFA_GNU_negative_offset_extended:
2986 return "DW_CFA_GNU_negative_offset_extended";
2989 return "DW_CFA_<unknown>";
2993 /* This routine will generate the correct assembly data for a location
2994 description based on a cfi entry with a complex address. */
2997 output_cfa_loc (dw_cfi_ref cfi, int for_eh)
2999 dw_loc_descr_ref loc;
3002 if (cfi->dw_cfi_opc == DW_CFA_expression)
3005 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3006 dw2_asm_output_data (1, r, NULL);
3007 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
3010 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
3012 /* Output the size of the block. */
3013 size = size_of_locs (loc);
3014 dw2_asm_output_data_uleb128 (size, NULL);
3016 /* Now output the operations themselves. */
3017 output_loc_sequence (loc, for_eh);
3020 /* Similar, but used for .cfi_escape. */
3023 output_cfa_loc_raw (dw_cfi_ref cfi)
3025 dw_loc_descr_ref loc;
3028 if (cfi->dw_cfi_opc == DW_CFA_expression)
3031 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3032 fprintf (asm_out_file, "%#x,", r);
3033 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
3036 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
3038 /* Output the size of the block. */
3039 size = size_of_locs (loc);
3040 dw2_asm_output_data_uleb128_raw (size);
3041 fputc (',', asm_out_file);
3043 /* Now output the operations themselves. */
3044 output_loc_sequence_raw (loc);
3047 /* Output a Call Frame Information opcode and its operand(s). */
3050 output_cfi (dw_cfi_ref cfi, dw_fde_ref fde, int for_eh)
3055 if (cfi->dw_cfi_opc == DW_CFA_advance_loc)
3056 dw2_asm_output_data (1, (cfi->dw_cfi_opc
3057 | (cfi->dw_cfi_oprnd1.dw_cfi_offset & 0x3f)),
3058 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX,
3059 ((unsigned HOST_WIDE_INT)
3060 cfi->dw_cfi_oprnd1.dw_cfi_offset));
3061 else if (cfi->dw_cfi_opc == DW_CFA_offset)
3063 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3064 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
3065 "DW_CFA_offset, column %#lx", r);
3066 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3067 dw2_asm_output_data_uleb128 (off, NULL);
3069 else if (cfi->dw_cfi_opc == DW_CFA_restore)
3071 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3072 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
3073 "DW_CFA_restore, column %#lx", r);
3077 dw2_asm_output_data (1, cfi->dw_cfi_opc,
3078 "%s", dwarf_cfi_name (cfi->dw_cfi_opc));
3080 switch (cfi->dw_cfi_opc)
3082 case DW_CFA_set_loc:
3084 dw2_asm_output_encoded_addr_rtx (
3085 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3086 gen_rtx_SYMBOL_REF (Pmode, cfi->dw_cfi_oprnd1.dw_cfi_addr),
3089 dw2_asm_output_addr (DWARF2_ADDR_SIZE,
3090 cfi->dw_cfi_oprnd1.dw_cfi_addr, NULL);
3091 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3094 case DW_CFA_advance_loc1:
3095 dw2_asm_output_delta (1, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3096 fde->dw_fde_current_label, NULL);
3097 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3100 case DW_CFA_advance_loc2:
3101 dw2_asm_output_delta (2, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3102 fde->dw_fde_current_label, NULL);
3103 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3106 case DW_CFA_advance_loc4:
3107 dw2_asm_output_delta (4, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3108 fde->dw_fde_current_label, NULL);
3109 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3112 case DW_CFA_MIPS_advance_loc8:
3113 dw2_asm_output_delta (8, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3114 fde->dw_fde_current_label, NULL);
3115 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3118 case DW_CFA_offset_extended:
3119 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3120 dw2_asm_output_data_uleb128 (r, NULL);
3121 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3122 dw2_asm_output_data_uleb128 (off, NULL);
3125 case DW_CFA_def_cfa:
3126 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3127 dw2_asm_output_data_uleb128 (r, NULL);
3128 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd2.dw_cfi_offset, NULL);
3131 case DW_CFA_offset_extended_sf:
3132 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3133 dw2_asm_output_data_uleb128 (r, NULL);
3134 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3135 dw2_asm_output_data_sleb128 (off, NULL);
3138 case DW_CFA_def_cfa_sf:
3139 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3140 dw2_asm_output_data_uleb128 (r, NULL);
3141 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3142 dw2_asm_output_data_sleb128 (off, NULL);
3145 case DW_CFA_restore_extended:
3146 case DW_CFA_undefined:
3147 case DW_CFA_same_value:
3148 case DW_CFA_def_cfa_register:
3149 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3150 dw2_asm_output_data_uleb128 (r, NULL);
3153 case DW_CFA_register:
3154 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3155 dw2_asm_output_data_uleb128 (r, NULL);
3156 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, for_eh);
3157 dw2_asm_output_data_uleb128 (r, NULL);
3160 case DW_CFA_def_cfa_offset:
3161 case DW_CFA_GNU_args_size:
3162 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd1.dw_cfi_offset, NULL);
3165 case DW_CFA_def_cfa_offset_sf:
3166 off = div_data_align (cfi->dw_cfi_oprnd1.dw_cfi_offset);
3167 dw2_asm_output_data_sleb128 (off, NULL);
3170 case DW_CFA_GNU_window_save:
3173 case DW_CFA_def_cfa_expression:
3174 case DW_CFA_expression:
3175 output_cfa_loc (cfi, for_eh);
3178 case DW_CFA_GNU_negative_offset_extended:
3179 /* Obsoleted by DW_CFA_offset_extended_sf. */
3188 /* Similar, but do it via assembler directives instead. */
3191 output_cfi_directive (FILE *f, dw_cfi_ref cfi)
3193 unsigned long r, r2;
3195 switch (cfi->dw_cfi_opc)
3197 case DW_CFA_advance_loc:
3198 case DW_CFA_advance_loc1:
3199 case DW_CFA_advance_loc2:
3200 case DW_CFA_advance_loc4:
3201 case DW_CFA_MIPS_advance_loc8:
3202 case DW_CFA_set_loc:
3203 /* Should only be created in a code path not followed when emitting
3204 via directives. The assembler is going to take care of this for
3205 us. But this routines is also used for debugging dumps, so
3207 gcc_assert (f != asm_out_file);
3208 fprintf (f, "\t.cfi_advance_loc\n");
3212 case DW_CFA_offset_extended:
3213 case DW_CFA_offset_extended_sf:
3214 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3215 fprintf (f, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC"\n",
3216 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
3219 case DW_CFA_restore:
3220 case DW_CFA_restore_extended:
3221 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3222 fprintf (f, "\t.cfi_restore %lu\n", r);
3225 case DW_CFA_undefined:
3226 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3227 fprintf (f, "\t.cfi_undefined %lu\n", r);
3230 case DW_CFA_same_value:
3231 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3232 fprintf (f, "\t.cfi_same_value %lu\n", r);
3235 case DW_CFA_def_cfa:
3236 case DW_CFA_def_cfa_sf:
3237 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3238 fprintf (f, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC"\n",
3239 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
3242 case DW_CFA_def_cfa_register:
3243 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3244 fprintf (f, "\t.cfi_def_cfa_register %lu\n", r);
3247 case DW_CFA_register:
3248 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3249 r2 = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, 1);
3250 fprintf (f, "\t.cfi_register %lu, %lu\n", r, r2);
3253 case DW_CFA_def_cfa_offset:
3254 case DW_CFA_def_cfa_offset_sf:
3255 fprintf (f, "\t.cfi_def_cfa_offset "
3256 HOST_WIDE_INT_PRINT_DEC"\n",
3257 cfi->dw_cfi_oprnd1.dw_cfi_offset);
3260 case DW_CFA_remember_state:
3261 fprintf (f, "\t.cfi_remember_state\n");
3263 case DW_CFA_restore_state:
3264 fprintf (f, "\t.cfi_restore_state\n");
3267 case DW_CFA_GNU_args_size:
3268 if (f == asm_out_file)
3270 fprintf (f, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size);
3271 dw2_asm_output_data_uleb128_raw (cfi->dw_cfi_oprnd1.dw_cfi_offset);
3273 fprintf (f, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC,
3274 ASM_COMMENT_START, cfi->dw_cfi_oprnd1.dw_cfi_offset);
3279 fprintf (f, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC "\n",
3280 cfi->dw_cfi_oprnd1.dw_cfi_offset);
3284 case DW_CFA_GNU_window_save:
3285 fprintf (f, "\t.cfi_window_save\n");
3288 case DW_CFA_def_cfa_expression:
3289 if (f != asm_out_file)
3291 fprintf (f, "\t.cfi_def_cfa_expression ...\n");
3295 case DW_CFA_expression:
3296 if (f != asm_out_file)
3298 fprintf (f, "\t.cfi_cfa_expression ...\n");
3301 fprintf (f, "\t.cfi_escape %#x,", cfi->dw_cfi_opc);
3302 output_cfa_loc_raw (cfi);
3312 dwarf2out_emit_cfi (dw_cfi_ref cfi)
3314 if (dwarf2out_do_cfi_asm ())
3315 output_cfi_directive (asm_out_file, cfi);
3319 /* Save the result of dwarf2out_do_frame across PCH.
3320 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3321 static GTY(()) signed char saved_do_cfi_asm = 0;
3323 /* Decide whether we want to emit frame unwind information for the current
3324 translation unit. */
3327 dwarf2out_do_frame (void)
3329 /* We want to emit correct CFA location expressions or lists, so we
3330 have to return true if we're going to output debug info, even if
3331 we're not going to output frame or unwind info. */
3332 if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
3335 if (saved_do_cfi_asm > 0)
3338 if (targetm.debug_unwind_info () == UI_DWARF2)
3341 if ((flag_unwind_tables || flag_exceptions)
3342 && targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
3348 /* Decide whether to emit frame unwind via assembler directives. */
3351 dwarf2out_do_cfi_asm (void)
3355 #ifdef MIPS_DEBUGGING_INFO
3359 if (saved_do_cfi_asm != 0)
3360 return saved_do_cfi_asm > 0;
3362 /* Assume failure for a moment. */
3363 saved_do_cfi_asm = -1;
3365 if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ())
3367 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
3370 /* Make sure the personality encoding is one the assembler can support.
3371 In particular, aligned addresses can't be handled. */
3372 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3373 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
3375 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3376 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
3379 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3380 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3381 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3382 && !flag_unwind_tables && !flag_exceptions
3383 && targetm_common.except_unwind_info (&global_options) != UI_DWARF2)
3387 saved_do_cfi_asm = 1;
3392 gate_dwarf2_frame (void)
3394 #ifndef HAVE_prologue
3395 /* Targets which still implement the prologue in assembler text
3396 cannot use the generic dwarf2 unwinding. */
3400 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3401 from the optimized shrink-wrapping annotations that we will compute.
3402 For now, only produce the CFI notes for dwarf2. */
3403 return dwarf2out_do_frame ();
3406 struct rtl_opt_pass pass_dwarf2_frame =
3410 "dwarf2", /* name */
3411 gate_dwarf2_frame, /* gate */
3412 execute_dwarf2_frame, /* execute */
3415 0, /* static_pass_number */
3416 TV_FINAL, /* tv_id */
3417 0, /* properties_required */
3418 0, /* properties_provided */
3419 0, /* properties_destroyed */
3420 0, /* todo_flags_start */
3421 0 /* todo_flags_finish */
3425 #include "gt-dwarf2cfi.h"