1 ;; Predicate definitions for Sunplus S+CORE.
2 ;; Copyright (C) 2005-2013 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 (define_predicate "const_uimm5"
21 (match_code "const_int")
23 return IMM_IN_RANGE (INTVAL (op), 5, 0);
26 (define_predicate "const_simm12"
27 (match_code "const_int")
29 return IMM_IN_RANGE (INTVAL (op), 12, 1);
32 (define_predicate "const_simm15"
33 (match_code "const_int")
35 return IMM_IN_RANGE (INTVAL (op), 15, 1);
38 (define_predicate "arith_operand"
39 (ior (match_code "const_int")
40 (match_operand 0 "register_operand")))
42 (define_predicate "score_register_operand"
43 (match_code "reg,subreg")
45 if (GET_CODE (op) == SUBREG)
48 return (GET_CODE (op) == REG)
49 && (REGNO (op) != CC_REGNUM);
52 (define_predicate "const_call_insn_operand"
53 (match_code "const,symbol_ref,label_ref")
55 enum score_symbol_type symbol_type;
57 return (score_symbolic_constant_p (op, &symbol_type)
58 && (symbol_type == SYMBOL_GENERAL));
61 (define_predicate "call_insn_operand"
62 (ior (match_operand 0 "const_call_insn_operand")
63 (match_operand 0 "register_operand")))
65 (define_predicate "hireg_operand"
66 (and (match_code "reg")
67 (match_test "REGNO (op) == HI_REGNUM")))
69 (define_predicate "loreg_operand"
70 (and (match_code "reg")
71 (match_test "REGNO (op) == LO_REGNUM")))
73 (define_predicate "sr0_operand"
74 (and (match_code "reg")
75 (match_test "REGNO (op) == CN_REGNUM")))
77 (define_predicate "g32reg_operand"
78 (and (match_code "reg")
79 (match_test "GP_REG_P (REGNO (op))")))
81 (define_predicate "branch_n_operator"
84 (define_predicate "branch_nz_operator"
85 (match_code "eq,ne,lt,ge"))
87 (define_predicate "score_load_multiple_operation"
88 (match_code "parallel")
90 int count = XVECLEN (op, 0);
94 /* Perform a quick check so we don't blow up below. */
96 || GET_CODE (XVECEXP (op, 0, 0)) != SET
97 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
98 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
101 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
103 for (i = 1; i < count; i++)
105 rtx elt = XVECEXP (op, 0, i);
107 if (GET_CODE (elt) != SET
108 || GET_CODE (SET_DEST (elt)) != REG
109 || GET_MODE (SET_DEST (elt)) != SImode
110 || REGNO (SET_DEST (elt)) != (unsigned) (dest_regno + i)
111 || GET_CODE (SET_SRC (elt)) != MEM
112 || GET_MODE (SET_SRC (elt)) != SImode
113 || GET_CODE (XEXP (SET_SRC (elt), 0)) != POST_INC)
120 (define_predicate "score_store_multiple_operation"
121 (match_code "parallel")
123 int count = XVECLEN (op, 0);
127 /* Perform a quick check so we don't blow up below. */
129 || GET_CODE (XVECEXP (op, 0, 0)) != SET
130 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
131 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
134 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
136 for (i = 1; i < count; i++)
138 rtx elt = XVECEXP (op, 0, i);
140 if (GET_CODE (elt) != SET
141 || GET_CODE (SET_SRC (elt)) != REG
142 || GET_MODE (SET_SRC (elt)) != SImode
143 || REGNO (SET_SRC (elt)) != (unsigned) (src_regno + i)
144 || GET_CODE (SET_DEST (elt)) != MEM
145 || GET_MODE (SET_DEST (elt)) != SImode
146 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PRE_DEC)