1 /* Definitions of target machine for GNU compiler. MIPS version.
2 Contributed by A. Lichnewsky, lich@inria.inria.fr
3 Changed by Michael Meissner, meissner@osf.org
4 64 bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and
5 Brendan Eich, brendan@microunity.com.
6 Copyright (C) 1989, 90-5, 1996 Free Software Foundation, Inc.
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
26 /* Standard GCC variables that we reference. */
28 extern char *asm_file_name;
29 extern char call_used_regs[];
30 extern int current_function_calls_alloca;
31 extern int flag_omit_frame_pointer;
32 extern int frame_pointer_needed;
33 extern char *language_string;
34 extern int may_call_alloca;
36 extern char **save_argv;
37 extern int target_flags;
38 extern char *version_string;
40 /* MIPS external variables defined in mips.c. */
44 CMP_SI, /* compare four byte integers */
45 CMP_DI, /* compare eight byte integers */
46 CMP_SF, /* compare single precision floats */
47 CMP_DF, /* compare double precision floats */
48 CMP_MAX /* max comparison type */
51 /* types of delay slot */
53 DELAY_NONE, /* no delay slot */
54 DELAY_LOAD, /* load from memory delay */
55 DELAY_HILO, /* move from/to hi/lo registers */
56 DELAY_FCMP /* delay after doing c.<xx>.{d,s} */
59 /* Which processor to schedule for. Since there is no difference between
60 a R2000 and R3000 in terms of the scheduler, we collapse them into
61 just an R3000. The elements of the enumeration must match exactly
62 the cpu attribute in the mips.md machine description. */
76 /* Recast the cpu class to be the cpu attribute. */
77 #define mips_cpu_attr ((enum attr_cpu)mips_cpu)
79 /* Which ABI to use. This is only used by the Irix 6 port currently. */
87 #ifndef MIPS_ABI_DEFAULT
88 /* We define this away so that there is no extra runtime cost if the target
89 doesn't support multiple ABIs. */
90 #define mips_abi ABI_32
92 extern enum mips_abi_type mips_abi;
95 /* Whether to emit abicalls code sequences or not. */
97 enum mips_abicalls_type {
102 /* Recast the abicalls class to be the abicalls attribute. */
103 #define mips_abicalls_attr ((enum attr_abicalls)mips_abicalls)
105 /* Which type of block move to do (whether or not the last store is
106 split out so it can fill a branch delay slot). */
108 enum block_move_type {
109 BLOCK_MOVE_NORMAL, /* generate complete block move */
110 BLOCK_MOVE_NOT_LAST, /* generate all but last store */
111 BLOCK_MOVE_LAST /* generate just the last store */
114 extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */
115 extern char mips_print_operand_punct[]; /* print_operand punctuation chars */
116 extern char *current_function_file; /* filename current function is in */
117 extern int num_source_filenames; /* current .file # */
118 extern int inside_function; /* != 0 if inside of a function */
119 extern int ignore_line_number; /* != 0 if we are to ignore next .loc */
120 extern int file_in_function_warning; /* warning given about .file in func */
121 extern int sdb_label_count; /* block start/end next label # */
122 extern int sdb_begin_function_line; /* Starting Line of current function */
123 extern int mips_section_threshold; /* # bytes of data/sdata cutoff */
124 extern int g_switch_value; /* value of the -G xx switch */
125 extern int g_switch_set; /* whether -G xx was passed. */
126 extern int sym_lineno; /* sgi next label # for each stmt */
127 extern int set_noreorder; /* # of nested .set noreorder's */
128 extern int set_nomacro; /* # of nested .set nomacro's */
129 extern int set_noat; /* # of nested .set noat's */
130 extern int set_volatile; /* # of nested .set volatile's */
131 extern int mips_branch_likely; /* emit 'l' after br (branch likely) */
132 extern int mips_dbx_regno[]; /* Map register # to debug register # */
133 extern struct rtx_def *branch_cmp[2]; /* operands for compare */
134 extern enum cmp_type branch_type; /* what type of branch to use */
135 extern enum processor_type mips_cpu; /* which cpu are we scheduling for */
136 extern enum mips_abicalls_type mips_abicalls;/* for svr4 abi pic calls */
137 extern int mips_isa; /* architectural level */
138 extern char *mips_cpu_string; /* for -mcpu=<xxx> */
139 extern char *mips_isa_string; /* for -mips{1,2,3,4} */
140 extern char *mips_abi_string; /* for -misa={32,n32,64} */
141 extern int dslots_load_total; /* total # load related delay slots */
142 extern int dslots_load_filled; /* # filled load delay slots */
143 extern int dslots_jump_total; /* total # jump related delay slots */
144 extern int dslots_jump_filled; /* # filled jump delay slots */
145 extern int dslots_number_nops; /* # of nops needed by previous insn */
146 extern int num_refs[3]; /* # 1/2/3 word references */
147 extern struct rtx_def *mips_load_reg; /* register to check for load delay */
148 extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */
149 extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */
150 extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */
151 extern struct rtx_def *embedded_pic_fnaddr_rtx; /* function address */
153 /* Functions within mips.c that we reference. */
155 extern void abort_with_insn ();
156 extern int arith32_operand ();
157 extern int arith_operand ();
158 extern int cmp_op ();
159 extern long compute_frame_size ();
160 extern int epilogue_reg_mentioned_p ();
161 extern void expand_block_move ();
162 extern int equality_op ();
163 extern void final_prescan_insn ();
164 extern struct rtx_def * function_arg ();
165 extern void function_arg_advance ();
166 extern int function_arg_partial_nregs ();
167 extern void function_epilogue ();
168 extern void function_prologue ();
169 extern void gen_conditional_branch ();
170 extern struct rtx_def * gen_int_relational ();
171 extern void init_cumulative_args ();
172 extern int large_int ();
173 extern int mips_address_cost ();
174 extern void mips_asm_file_end ();
175 extern void mips_asm_file_start ();
176 extern int mips_const_double_ok ();
177 extern void mips_count_memory_refs ();
178 extern int mips_debugger_offset ();
179 extern void mips_declare_object ();
180 extern int mips_epilogue_delay_slots ();
181 extern void mips_expand_epilogue ();
182 extern void mips_expand_prologue ();
183 extern char *mips_fill_delay_slot ();
184 extern char *mips_move_1word ();
185 extern char *mips_move_2words ();
186 extern void mips_output_double ();
187 extern int mips_output_external ();
188 extern void mips_output_float ();
189 extern void mips_output_filename ();
190 extern void mips_output_lineno ();
191 extern char *output_block_move ();
192 extern void override_options ();
193 extern int pc_or_label_operand ();
194 extern void print_operand_address ();
195 extern void print_operand ();
196 extern void print_options ();
197 extern int reg_or_0_operand ();
198 extern int simple_epilogue_p ();
199 extern int simple_memory_operand ();
200 extern int small_int ();
202 extern int uns_arith_operand ();
203 extern struct rtx_def * embedded_pic_offset ();
205 /* Recognition functions that return if a condition is true. */
206 extern int address_operand ();
207 extern int const_double_operand ();
208 extern int const_int_operand ();
209 extern int general_operand ();
210 extern int immediate_operand ();
211 extern int memory_address_p ();
212 extern int memory_operand ();
213 extern int nonimmediate_operand ();
214 extern int nonmemory_operand ();
215 extern int register_operand ();
216 extern int scratch_operand ();
218 /* Functions to change what output section we are using. */
219 extern void data_section ();
220 extern void rdata_section ();
221 extern void readonly_data_section ();
222 extern void sdata_section ();
223 extern void text_section ();
225 /* Functions in the rest of the compiler that we reference. */
226 extern void abort_with_insn ();
227 extern void debug_rtx ();
228 extern void fatal_io_error ();
229 extern int get_frame_size ();
230 extern int offsettable_address_p ();
231 extern void output_address ();
232 extern char *permalloc ();
233 extern int reg_mentioned_p ();
235 /* Functions in the standard library that we reference. */
237 extern char *getenv ();
238 extern char *mktemp ();
241 /* Stubs for half-pic support if not OSF/1 reference platform. */
244 #define HALF_PIC_P() 0
245 #define HALF_PIC_NUMBER_PTRS 0
246 #define HALF_PIC_NUMBER_REFS 0
247 #define HALF_PIC_ENCODE(DECL)
248 #define HALF_PIC_DECLARE(NAME)
249 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
250 #define HALF_PIC_ADDRESS_P(X) 0
251 #define HALF_PIC_PTR(X) X
252 #define HALF_PIC_FINISH(STREAM)
256 /* Run-time compilation parameters selecting different hardware subsets. */
258 /* Macros used in the machine description to test the flags. */
260 /* Bits for real switches */
261 #define MASK_INT64 0x00000001 /* ints are 64 bits */
262 #define MASK_LONG64 0x00000002 /* longs and pointers are 64 bits */
263 #define MASK_UNUSED 0x00000004
264 #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */
265 #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */
266 #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */
267 #define MASK_STATS 0x00000040 /* print statistics to stderr */
268 #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/
269 #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */
270 #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */
271 #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */
272 #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/
273 #define MASK_LONG_CALLS 0x00001000 /* Always call through a register */
274 #define MASK_64BIT 0x00002000 /* Use 64 bit GP registers and insns */
275 #define MASK_EMBEDDED_PIC 0x00004000 /* Generate embedded PIC code */
276 #define MASK_EMBEDDED_DATA 0x00008000 /* Reduce RAM usage, not fast code */
277 #define MASK_BIG_ENDIAN 0x00010000 /* Generate big endian code */
278 #define MASK_SINGLE_FLOAT 0x00020000 /* Only single precision FPU. */
279 #define MASK_MAD 0x00040000 /* Generate mad/madu as on 4650. */
280 #define MASK_4300_MUL_FIX 0x00080000 /* Work-around early Vr4300 CPU bug */
282 /* Dummy switches used only in spec's*/
283 #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */
285 /* Debug switches, not documented */
286 #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */
287 #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */
288 #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */
289 #define MASK_DEBUG_C 0x08000000 /* don't expand seq, etc. */
290 #define MASK_DEBUG_D 0x04000000 /* don't do define_split's */
291 #define MASK_DEBUG_E 0x02000000 /* function_arg debug */
292 #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */
293 #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */
294 #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */
295 #define MASK_DEBUG_I 0x00200000 /* unused */
296 #define MASK_DEBUG_J 0x00100000 /* unused */
298 /* r4000 64 bit sizes */
299 #define TARGET_INT64 (target_flags & MASK_INT64)
300 #define TARGET_LONG64 (target_flags & MASK_LONG64)
301 #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64)
302 #define TARGET_64BIT (target_flags & MASK_64BIT)
304 /* Mips vs. GNU assembler */
305 #define TARGET_GAS (target_flags & MASK_GAS)
306 #define TARGET_UNIX_ASM (!TARGET_GAS)
307 #define TARGET_MIPS_AS TARGET_UNIX_ASM
310 #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
311 #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)
312 #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)
313 #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)
314 #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
315 #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)
316 #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)
317 #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)
318 #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H)
319 #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I)
320 #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J)
322 /* Reg. Naming in .s ($21 vs. $a0) */
323 #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
325 /* Optimize for Sdata/Sbss */
326 #define TARGET_GP_OPT (target_flags & MASK_GPOPT)
328 /* print program statistics */
329 #define TARGET_STATS (target_flags & MASK_STATS)
331 /* call memcpy instead of inline code */
332 #define TARGET_MEMCPY (target_flags & MASK_MEMCPY)
334 /* .abicalls, etc from Pyramid V.4 */
335 #define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
337 /* OSF pic references to externs */
338 #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC)
340 /* software floating point */
341 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
342 #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
344 /* always call through a register */
345 #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS)
347 /* generate embedded PIC code;
349 #define TARGET_EMBEDDED_PIC (target_flags & MASK_EMBEDDED_PIC)
351 /* for embedded systems, optimize for
352 reduced RAM space instead of for
354 #define TARGET_EMBEDDED_DATA (target_flags & MASK_EMBEDDED_DATA)
356 /* generate big endian code. */
357 #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN)
359 #define TARGET_SINGLE_FLOAT (target_flags & MASK_SINGLE_FLOAT)
360 #define TARGET_DOUBLE_FLOAT (! TARGET_SINGLE_FLOAT)
362 #define TARGET_MAD (target_flags & MASK_MAD)
364 #define TARGET_4300_MUL_FIX (target_flags & MASK_4300_MUL_FIX)
366 /* Macro to define tables used to set the flags.
367 This is a list in braces of pairs in braces,
368 each pair being { "NAME", VALUE }
369 where VALUE is the bits to set or minus the bits to clear.
370 An empty string NAME is used to identify the default VALUE. */
372 #define TARGET_SWITCHES \
374 {"int64", MASK_INT64 | MASK_LONG64}, \
375 {"long64", MASK_LONG64}, \
376 {"mips-as", -MASK_GAS}, \
378 {"rnames", MASK_NAME_REGS}, \
379 {"no-rnames", -MASK_NAME_REGS}, \
380 {"gpOPT", MASK_GPOPT}, \
381 {"gpopt", MASK_GPOPT}, \
382 {"no-gpOPT", -MASK_GPOPT}, \
383 {"no-gpopt", -MASK_GPOPT}, \
384 {"stats", MASK_STATS}, \
385 {"no-stats", -MASK_STATS}, \
386 {"memcpy", MASK_MEMCPY}, \
387 {"no-memcpy", -MASK_MEMCPY}, \
388 {"mips-tfile", MASK_MIPS_TFILE}, \
389 {"no-mips-tfile", -MASK_MIPS_TFILE}, \
390 {"soft-float", MASK_SOFT_FLOAT}, \
391 {"hard-float", -MASK_SOFT_FLOAT}, \
392 {"fp64", MASK_FLOAT64}, \
393 {"fp32", -MASK_FLOAT64}, \
394 {"gp64", MASK_64BIT}, \
395 {"gp32", -MASK_64BIT}, \
396 {"abicalls", MASK_ABICALLS}, \
397 {"no-abicalls", -MASK_ABICALLS}, \
398 {"half-pic", MASK_HALF_PIC}, \
399 {"no-half-pic", -MASK_HALF_PIC}, \
400 {"long-calls", MASK_LONG_CALLS}, \
401 {"no-long-calls", -MASK_LONG_CALLS}, \
402 {"embedded-pic", MASK_EMBEDDED_PIC}, \
403 {"no-embedded-pic", -MASK_EMBEDDED_PIC}, \
404 {"embedded-data", MASK_EMBEDDED_DATA}, \
405 {"no-embedded-data", -MASK_EMBEDDED_DATA}, \
406 {"eb", MASK_BIG_ENDIAN}, \
407 {"el", -MASK_BIG_ENDIAN}, \
408 {"single-float", MASK_SINGLE_FLOAT}, \
409 {"double-float", -MASK_SINGLE_FLOAT}, \
411 {"no-mad", -MASK_MAD}, \
412 {"fix4300", MASK_4300_MUL_FIX}, \
413 {"no-fix4300", -MASK_4300_MUL_FIX}, \
414 {"4650", MASK_MAD | MASK_SINGLE_FLOAT}, \
415 {"debug", MASK_DEBUG}, \
416 {"debuga", MASK_DEBUG_A}, \
417 {"debugb", MASK_DEBUG_B}, \
418 {"debugc", MASK_DEBUG_C}, \
419 {"debugd", MASK_DEBUG_D}, \
420 {"debuge", MASK_DEBUG_E}, \
421 {"debugf", MASK_DEBUG_F}, \
422 {"debugg", MASK_DEBUG_G}, \
423 {"debugh", MASK_DEBUG_H}, \
424 {"debugi", MASK_DEBUG_I}, \
425 {"debugj", MASK_DEBUG_J}, \
426 {"", (TARGET_DEFAULT \
427 | TARGET_CPU_DEFAULT \
428 | TARGET_ENDIAN_DEFAULT)} \
431 /* Default target_flags if no switches are specified */
433 #ifndef TARGET_DEFAULT
434 #define TARGET_DEFAULT 0
437 #ifndef TARGET_CPU_DEFAULT
438 #define TARGET_CPU_DEFAULT 0
441 #ifndef TARGET_ENDIAN_DEFAULT
443 #define TARGET_ENDIAN_DEFAULT MASK_BIG_ENDIAN
445 #define TARGET_ENDIAN_DEFAULT 0
449 #ifndef MULTILIB_DEFAULTS
450 #if TARGET_ENDIAN_DEFAULT == 0
451 #define MULTILIB_DEFAULTS { "EL", "mips1" }
453 #define MULTILIB_DEFAULTS { "EB", "mips1" }
457 /* This macro is similar to `TARGET_SWITCHES' but defines names of
458 command options that have values. Its definition is an
459 initializer with a subgrouping for each command option.
461 Each subgrouping contains a string constant, that defines the
462 fixed part of the option name, and the address of a variable.
463 The variable, type `char *', is set to the variable part of the
464 given option if the fixed part matches. The actual option name
465 is made by appending `-m' to the specified name.
467 Here is an example which defines `-mshort-data-NUMBER'. If the
468 given option is `-mshort-data-512', the variable `m88k_short_data'
469 will be set to the string `"512"'.
471 extern char *m88k_short_data;
472 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
474 #define TARGET_OPTIONS \
476 SUBTARGET_TARGET_OPTIONS \
477 { "cpu=", &mips_cpu_string }, \
478 { "ips", &mips_isa_string } \
481 /* This is meant to be redefined in the host dependent files. */
482 #define SUBTARGET_TARGET_OPTIONS
484 /* Macros to decide whether certain features are available or not,
485 depending on the instruction set architecture level. */
487 #define BRANCH_LIKELY_P() (mips_isa >= 2)
488 #define HAVE_SQRT_P() (mips_isa >= 2)
490 /* CC1_SPEC causes -mips3 and -mips4 to set -mfp64 and -mgp64; -mips1 or
491 -mips2 sets -mfp32 and -mgp32. This can be overridden by an explicit
492 -mfp32, -mfp64, -mgp32 or -mgp64. -mfp64 sets MASK_FLOAT64 in
493 target_flags, and -mgp64 sets MASK_64BIT.
495 Setting MASK_64BIT in target_flags will cause gcc to assume that
496 registers are 64 bits wide. int, long and void * will be 32 bit;
497 this may be changed with -mint64 or -mlong64.
499 The gen* programs link code that refers to MASK_64BIT. They don't
500 actually use the information in target_flags; they just refer to
503 /* Switch Recognition by gcc.c. Add -G xx support */
505 #ifdef SWITCH_TAKES_ARG
506 #undef SWITCH_TAKES_ARG
509 #define SWITCH_TAKES_ARG(CHAR) \
510 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
512 /* Sometimes certain combinations of command options do not make sense
513 on a particular target machine. You can define a macro
514 `OVERRIDE_OPTIONS' to take account of this. This macro, if
515 defined, is executed once just after all the command options have
518 On the MIPS, it is used to handle -G. We also use it to set up all
519 of the tables referenced in the other macros. */
521 #define OVERRIDE_OPTIONS override_options ()
523 /* Zero or more C statements that may conditionally modify two
524 variables `fixed_regs' and `call_used_regs' (both of type `char
525 []') after they have been initialized from the two preceding
528 This is necessary in case the fixed or call-clobbered registers
529 depend on target flags.
531 You need not define this macro if it has no work to do.
533 If the usage of an entire class of registers depends on the target
534 flags, you may indicate this to GCC by using this macro to modify
535 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
536 the classes which should not be used by GCC. Also define the macro
537 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
538 letter for a class that shouldn't be used.
540 (However, if this class is not included in `GENERAL_REGS' and all
541 of the insn patterns whose constraints permit this class are
542 controlled by target switches, then GCC will automatically avoid
543 using these registers when the target switches are opposed to
546 #define CONDITIONAL_REGISTER_USAGE \
549 if (!TARGET_HARD_FLOAT) \
553 for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \
554 fixed_regs[regno] = call_used_regs[regno] = 1; \
556 SUBTARGET_CONDITIONAL_REGISTER_USAGE \
560 /* This is meant to be redefined in the host dependent files. */
561 #define SUBTARGET_CONDITIONAL_REGISTER_USAGE
563 /* Show we can debug even without a frame pointer. */
564 #define CAN_DEBUG_WITHOUT_FP
566 /* Complain about missing specs and predefines that should be defined in each
567 of the target tm files to override the defaults. This is mostly a place-
568 holder until I can get each of the files updated [mm]. */
570 #if defined(OSF_OS) \
571 || defined(DECSTATION) \
572 || defined(SGI_TARGET) \
573 || defined(MIPS_NEWS) \
574 || defined(MIPS_SYSV) \
575 || defined(MIPS_SVR4) \
576 || defined(MIPS_BSD43)
578 #ifndef CPP_PREDEFINES
579 #error "Define CPP_PREDEFINES in the appropriate tm.h file"
583 #error "Define LIB_SPEC in the appropriate tm.h file"
586 #ifndef STARTFILE_SPEC
587 #error "Define STARTFILE_SPEC in the appropriate tm.h file"
591 #error "Define MACHINE_TYPE in the appropriate tm.h file"
595 /* Tell collect what flags to pass to nm. */
597 #define NM_FLAGS "-Bp"
601 /* Names to predefine in the preprocessor for this target machine. */
603 #ifndef CPP_PREDEFINES
604 #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \
605 -D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43 \
606 -Asystem(unix) -Asystem(bsd) -Acpu(mips) -Amachine(mips)"
609 /* Extra switches sometimes passed to the assembler. */
612 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0
616 %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \
617 %{pipe: %e-pipe is not supported.} \
620 %{mcpu=*} %{m4650} %{mmad:-m4650}} \
621 %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} %{v} \
623 %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \
624 %{g} %{g0} %{g1} %{g2} %{g3} \
625 %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
626 %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
627 %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
628 %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \
635 %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \
636 %{pipe: %e-pipe is not supported.} \
639 %{mcpu=*} %{m4650} %{mmad:-m4650}} \
640 %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} %{v} \
642 %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \
643 %{g} %{g0} %{g1} %{g2} %{g3} \
644 %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
645 %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
646 %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
647 %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \
651 #endif /* ASM_SPEC */
653 /* Specify to run a post-processor, mips-tfile after the assembler
654 has run to stuff the mips debug information into the object file.
655 This is needed because the $#!%^ MIPS assembler provides no way
656 of specifying such information in the assembly file. If we are
657 cross compiling, disable mips-tfile unless the user specifies
660 #ifndef ASM_FINAL_SPEC
661 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0
663 #define ASM_FINAL_SPEC "\
664 %{mmips-as: %{!mno-mips-tfile: \
665 \n mips-tfile %{v*: -v} \
667 %{!K: %{save-temps: -I %b.o~}} \
668 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
669 %{.s:%i} %{!.s:%g.s}}}"
673 #define ASM_FINAL_SPEC "\
674 %{!mgas: %{!mno-mips-tfile: \
675 \n mips-tfile %{v*: -v} \
677 %{!K: %{save-temps: -I %b.o~}} \
678 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
679 %{.s:%i} %{!.s:%g.s}}}"
682 #endif /* ASM_FINAL_SPEC */
684 /* Redefinition of libraries used. Mips doesn't support normal
685 UNIX style profiling via calling _mcount. It does offer
686 profiling that samples the PC, so do what we can... */
689 #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc"
692 /* Extra switches sometimes passed to the linker. */
693 /* ??? The bestGnum will never be passed to the linker, because the gcc driver
694 will interpret it as a -b option. */
698 %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} \
699 %{bestGnum} %{shared} %{non_shared}"
700 #endif /* LINK_SPEC defined */
702 /* Specs for the compiler proper */
706 %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
707 %{mips1:-mfp32 -mgp32}%{mips2:-mfp32 -mgp32}\
708 %{mips3:%{!msingle-float:%{!m4650:-mfp64}} -mgp64} \
709 %{mips4:%{!msingle-float:%{!m4650:-mfp64}} -mgp64} \
710 %{mfp64:%{msingle-float:%emay not use both -mfp64 and -msingle-float}} \
711 %{mfp64:%{m4650:%emay not use both -mfp64 and -m4650}} \
712 %{m4650:-mcpu=r4650} \
713 %{G*} %{EB:-meb} %{EL:-mel} %{EB:%{EL:%emay not use both -EB and -EL}} \
714 %{pic-none: -mno-half-pic} \
715 %{pic-lib: -mhalf-pic} \
716 %{pic-extern: -mhalf-pic} \
717 %{pic-calls: -mhalf-pic} \
721 /* Preprocessor specs */
725 %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
726 %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
727 %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
728 %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \
729 %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
730 %{.s: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
731 %{!.S:%{!.s: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}} \
732 %{mlong64:-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int} \
733 %{!mlong64:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
734 %{mips3:-U__mips -D__mips=3 -D__mips64} \
735 %{mips4:-U__mips -D__mips=4 -D__mips64} \
736 %{mgp32:-U__mips64} %{mgp64:-D__mips64} \
737 %{msingle-float:%{!msoft-float:-D__mips_single_float}} \
738 %{m4650:%{!msoft-float:-D__mips_single_float}} \
739 %{EB:-UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__ -D_MIPSEB -D__MIPSEB -D__MIPSEB__ %{!ansi:-DMIPSEB}} \
740 %{EL:-UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__ -D_MIPSEL -D__MIPSEL -D__MIPSEL__ %{!ansi:-DMIPSEL}}"
743 /* If defined, this macro is an additional prefix to try after
744 `STANDARD_EXEC_PREFIX'. */
746 #ifndef MD_EXEC_PREFIX
747 #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/"
750 #ifndef MD_STARTFILE_PREFIX
751 #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
755 /* Print subsidiary information on the compiler version in use. */
757 #define MIPS_VERSION "[AL 1.1, MM 40]"
760 #define MACHINE_TYPE "BSD Mips"
763 #ifndef TARGET_VERSION_INTERNAL
764 #define TARGET_VERSION_INTERNAL(STREAM) \
765 fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE)
768 #ifndef TARGET_VERSION
769 #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
773 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
774 #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */
775 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
777 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
778 #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
781 /* By default, turn on GDB extensions. */
782 #define DEFAULT_GDB_EXTENSIONS 1
784 /* If we are passing smuggling stabs through the MIPS ECOFF object
785 format, put a comment in front of the .stab<x> operation so
786 that the MIPS assembler does not choke. The mips-tfile program
787 will correctly put the stab into the object file. */
789 #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
790 #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
791 #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
793 /* Local compiler-generated symbols must have a prefix that the assembler
794 understands. By default, this is $, although some targets (e.g.,
795 NetBSD-ELF) need to override this. */
797 #ifndef LOCAL_LABEL_PREFIX
798 #define LOCAL_LABEL_PREFIX "$"
801 /* By default on the mips, external symbols do not have an underscore
802 prepended, but some targets (e.g., NetBSD) require this. */
804 #ifndef USER_LABEL_PREFIX
805 #define USER_LABEL_PREFIX ""
808 /* Forward references to tags are allowed. */
809 #define SDB_ALLOW_FORWARD_REFERENCES
811 /* Unknown tags are also allowed. */
812 #define SDB_ALLOW_UNKNOWN_REFERENCES
814 /* On Sun 4, this limit is 2048. We use 1500 to be safe,
815 since the length can run past this up to a continuation point. */
816 #define DBX_CONTIN_LENGTH 1500
819 /* How to renumber registers for dbx and gdb. */
820 #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ]
823 /* Overrides for the COFF debug format. */
824 #define PUT_SDB_SCL(a) \
826 extern FILE *asm_out_text_file; \
827 fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \
830 #define PUT_SDB_INT_VAL(a) \
832 extern FILE *asm_out_text_file; \
833 fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \
836 #define PUT_SDB_VAL(a) \
838 extern FILE *asm_out_text_file; \
839 fputs ("\t.val\t", asm_out_text_file); \
840 output_addr_const (asm_out_text_file, (a)); \
841 fputc (';', asm_out_text_file); \
844 #define PUT_SDB_DEF(a) \
846 extern FILE *asm_out_text_file; \
847 fprintf (asm_out_text_file, "\t%s.def\t", \
848 (TARGET_GAS) ? "" : "#"); \
849 ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
850 fputc (';', asm_out_text_file); \
853 #define PUT_SDB_PLAIN_DEF(a) \
855 extern FILE *asm_out_text_file; \
856 fprintf (asm_out_text_file, "\t%s.def\t.%s;", \
857 (TARGET_GAS) ? "" : "#", (a)); \
860 #define PUT_SDB_ENDEF \
862 extern FILE *asm_out_text_file; \
863 fprintf (asm_out_text_file, "\t.endef\n"); \
866 #define PUT_SDB_TYPE(a) \
868 extern FILE *asm_out_text_file; \
869 fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \
872 #define PUT_SDB_SIZE(a) \
874 extern FILE *asm_out_text_file; \
875 fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \
878 #define PUT_SDB_DIM(a) \
880 extern FILE *asm_out_text_file; \
881 fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \
884 #ifndef PUT_SDB_START_DIM
885 #define PUT_SDB_START_DIM \
887 extern FILE *asm_out_text_file; \
888 fprintf (asm_out_text_file, "\t.dim\t"); \
892 #ifndef PUT_SDB_NEXT_DIM
893 #define PUT_SDB_NEXT_DIM(a) \
895 extern FILE *asm_out_text_file; \
896 fprintf (asm_out_text_file, "%d,", a); \
900 #ifndef PUT_SDB_LAST_DIM
901 #define PUT_SDB_LAST_DIM(a) \
903 extern FILE *asm_out_text_file; \
904 fprintf (asm_out_text_file, "%d;", a); \
908 #define PUT_SDB_TAG(a) \
910 extern FILE *asm_out_text_file; \
911 fprintf (asm_out_text_file, "\t.tag\t"); \
912 ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
913 fputc (';', asm_out_text_file); \
916 /* For block start and end, we create labels, so that
917 later we can figure out where the correct offset is.
918 The normal .ent/.end serve well enough for functions,
919 so those are just commented out. */
921 #define PUT_SDB_BLOCK_START(LINE) \
923 extern FILE *asm_out_text_file; \
924 fprintf (asm_out_text_file, \
925 "%sLb%d:\n\t%s.begin\t%sLb%d\t%d\n", \
926 LOCAL_LABEL_PREFIX, \
928 (TARGET_GAS) ? "" : "#", \
929 LOCAL_LABEL_PREFIX, \
935 #define PUT_SDB_BLOCK_END(LINE) \
937 extern FILE *asm_out_text_file; \
938 fprintf (asm_out_text_file, \
939 "%sLe%d:\n\t%s.bend\t%sLe%d\t%d\n", \
940 LOCAL_LABEL_PREFIX, \
942 (TARGET_GAS) ? "" : "#", \
943 LOCAL_LABEL_PREFIX, \
949 #define PUT_SDB_FUNCTION_START(LINE)
951 #define PUT_SDB_FUNCTION_END(LINE) \
953 extern FILE *asm_out_text_file; \
954 ASM_OUTPUT_SOURCE_LINE (asm_out_text_file, LINE + sdb_begin_function_line); \
957 #define PUT_SDB_EPILOGUE_END(NAME)
959 #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
960 sprintf ((BUFFER), ".%dfake", (NUMBER));
962 /* Correct the offset of automatic variables and arguments. Note that
963 the MIPS debug format wants all automatic variables and arguments
964 to be in terms of the virtual frame pointer (stack pointer before
965 any adjustment in the function), while the MIPS 3.0 linker wants
966 the frame pointer to be the stack pointer after the initial
969 #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0)
970 #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET)
973 /* Tell collect that the object format is ECOFF */
974 #ifndef OBJECT_FORMAT_ROSE
975 #define OBJECT_FORMAT_COFF /* Object file looks like COFF */
976 #define EXTENDED_COFF /* ECOFF, not normal coff */
979 #if 0 /* These definitions normally have no effect because
980 MIPS systems define USE_COLLECT2, so
981 assemble_constructor does nothing anyway. */
983 /* Don't use the default definitions, because we don't have gld.
984 Also, we don't want stabs when generating ECOFF output.
985 Instead we depend on collect to handle these. */
987 #define ASM_OUTPUT_CONSTRUCTOR(file, name)
988 #define ASM_OUTPUT_DESTRUCTOR(file, name)
992 /* Target machine storage layout */
994 /* Define in order to support both big and little endian float formats
995 in the same gcc binary. */
996 #define REAL_ARITHMETIC
998 /* Define this if most significant bit is lowest numbered
999 in instructions that operate on numbered bit-fields.
1001 #define BITS_BIG_ENDIAN 0
1003 /* Define this if most significant byte of a word is the lowest numbered. */
1004 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
1006 /* Define this if most significant word of a multiword number is the lowest. */
1007 #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
1009 /* Define this to set the endianness to use in libgcc2.c, which can
1010 not depend on target_flags. */
1011 #if !defined(MIPSEL) && !defined(__MIPSEL__)
1012 #define LIBGCC2_WORDS_BIG_ENDIAN 1
1014 #define LIBGCC2_WORDS_BIG_ENDIAN 0
1017 /* Number of bits in an addressable storage unit */
1018 #define BITS_PER_UNIT 8
1020 /* Width in bits of a "word", which is the contents of a machine register.
1021 Note that this is not necessarily the width of data type `int';
1022 if using 16-bit ints on a 68000, this would still be 32.
1023 But on a machine with 16-bit registers, this would be 16. */
1024 #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
1025 #define MAX_BITS_PER_WORD 64
1027 /* Width of a word, in units (bytes). */
1028 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
1029 #define MIN_UNITS_PER_WORD 4
1031 /* For MIPS, width of a floating point register. */
1032 #define UNITS_PER_FPREG (TARGET_FLOAT64 ? 8 : 4)
1034 /* A C expression for the size in bits of the type `int' on the
1035 target machine. If you don't define this, the default is one
1037 #define INT_TYPE_SIZE (TARGET_INT64 ? 64 : 32)
1038 #define MAX_INT_TYPE_SIZE 64
1040 /* Tell the preprocessor the maximum size of wchar_t. */
1041 #ifndef MAX_WCHAR_TYPE_SIZE
1042 #ifndef WCHAR_TYPE_SIZE
1043 #define MAX_WCHAR_TYPE_SIZE MAX_INT_TYPE_SIZE
1047 /* A C expression for the size in bits of the type `short' on the
1048 target machine. If you don't define this, the default is half a
1049 word. (If this would be less than one storage unit, it is
1050 rounded up to one unit.) */
1051 #define SHORT_TYPE_SIZE 16
1053 /* A C expression for the size in bits of the type `long' on the
1054 target machine. If you don't define this, the default is one
1056 #define LONG_TYPE_SIZE (TARGET_LONG64 ? 64 : 32)
1057 #define MAX_LONG_TYPE_SIZE 64
1059 /* A C expression for the size in bits of the type `long long' on the
1060 target machine. If you don't define this, the default is two
1062 #define LONG_LONG_TYPE_SIZE 64
1064 /* A C expression for the size in bits of the type `char' on the
1065 target machine. If you don't define this, the default is one
1066 quarter of a word. (If this would be less than one storage unit,
1067 it is rounded up to one unit.) */
1068 #define CHAR_TYPE_SIZE BITS_PER_UNIT
1070 /* A C expression for the size in bits of the type `float' on the
1071 target machine. If you don't define this, the default is one
1073 #define FLOAT_TYPE_SIZE 32
1075 /* A C expression for the size in bits of the type `double' on the
1076 target machine. If you don't define this, the default is two
1078 #define DOUBLE_TYPE_SIZE 64
1080 /* A C expression for the size in bits of the type `long double' on
1081 the target machine. If you don't define this, the default is two
1083 #define LONG_DOUBLE_TYPE_SIZE 64
1085 /* Width in bits of a pointer.
1086 See also the macro `Pmode' defined below. */
1087 #define POINTER_SIZE (TARGET_LONG64 ? 64 : 32)
1089 /* Allocation boundary (in *bits*) for storing pointers in memory. */
1090 #define POINTER_BOUNDARY (TARGET_LONG64 ? 64 : 32)
1092 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
1093 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
1095 /* Allocation boundary (in *bits*) for the code of a function. */
1096 #define FUNCTION_BOUNDARY 32
1098 /* Alignment of field after `int : 0' in a structure. */
1099 #define EMPTY_FIELD_BOUNDARY (TARGET_LONG64 ? 64 : 32)
1101 /* Every structure's size must be a multiple of this. */
1102 /* 8 is observed right on a DECstation and on riscos 4.02. */
1103 #define STRUCTURE_SIZE_BOUNDARY 8
1105 /* There is no point aligning anything to a rounder boundary than this. */
1106 #define BIGGEST_ALIGNMENT 64
1108 /* Biggest alignment any structure field can require in bits. */
1109 #define BIGGEST_FIELD_ALIGNMENT 64
1111 /* Set this nonzero if move instructions will actually fail to work
1112 when given unaligned data. */
1113 #define STRICT_ALIGNMENT 1
1115 /* Define this if you wish to imitate the way many other C compilers
1116 handle alignment of bitfields and the structures that contain
1119 The behavior is that the type written for a bitfield (`int',
1120 `short', or other integer type) imposes an alignment for the
1121 entire structure, as if the structure really did contain an
1122 ordinary field of that type. In addition, the bitfield is placed
1123 within the structure so that it would fit within such a field,
1124 not crossing a boundary for it.
1126 Thus, on most machines, a bitfield whose type is written as `int'
1127 would not cross a four-byte boundary, and would force four-byte
1128 alignment for the whole structure. (The alignment used may not
1129 be four bytes; it is controlled by the other alignment
1132 If the macro is defined, its definition should be a C expression;
1133 a nonzero value for the expression enables this behavior. */
1135 #define PCC_BITFIELD_TYPE_MATTERS 1
1137 /* If defined, a C expression to compute the alignment given to a
1138 constant that is being placed in memory. CONSTANT is the constant
1139 and ALIGN is the alignment that the object would ordinarily have.
1140 The value of this macro is used instead of that alignment to align
1143 If this macro is not defined, then ALIGN is used.
1145 The typical use of this macro is to increase alignment for string
1146 constants to be word aligned so that `strcpy' calls that copy
1147 constants can be done inline. */
1149 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
1150 ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
1151 && (ALIGN) < BITS_PER_WORD \
1155 /* If defined, a C expression to compute the alignment for a static
1156 variable. TYPE is the data type, and ALIGN is the alignment that
1157 the object would ordinarily have. The value of this macro is used
1158 instead of that alignment to align the object.
1160 If this macro is not defined, then ALIGN is used.
1162 One use of this macro is to increase alignment of medium-size
1163 data to make it all fit in fewer cache lines. Another is to
1164 cause character arrays to be word-aligned so that `strcpy' calls
1165 that copy constants to character arrays can be done inline. */
1167 #undef DATA_ALIGNMENT
1168 #define DATA_ALIGNMENT(TYPE, ALIGN) \
1169 ((((ALIGN) < BITS_PER_WORD) \
1170 && (TREE_CODE (TYPE) == ARRAY_TYPE \
1171 || TREE_CODE (TYPE) == UNION_TYPE \
1172 || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
1174 /* Define this macro if an argument declared as `char' or `short' in a
1175 prototype should actually be passed as an `int'. In addition to
1176 avoiding errors in certain cases of mismatch, it also makes for
1177 better code on certain machines. */
1179 #define PROMOTE_PROTOTYPES
1181 /* Define if operations between registers always perform the operation
1182 on the full register even if a narrower mode is specified. */
1183 #define WORD_REGISTER_OPERATIONS
1185 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1186 will either zero-extend or sign-extend. The value of this macro should
1187 be the code that says which one of the two operations is implicitly
1188 done, NIL if none. */
1189 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1191 /* Standard register usage. */
1193 /* Number of actual hardware registers.
1194 The hardware registers are assigned numbers for the compiler
1195 from 0 to just below FIRST_PSEUDO_REGISTER.
1196 All registers that the compiler knows about must be given numbers,
1197 even those that are not normally considered general registers.
1199 On the Mips, we have 32 integer registers, 32 floating point
1200 registers and the special registers hi, lo, hilo, fp status, and rap.
1201 The hilo register is only used in 64 bit mode. It represents a 64
1202 bit value stored as two 32 bit values in the hi and lo registers;
1203 this is the result of the mult instruction. rap is a pointer to the
1204 stack where the return address reg ($31) was stored. This is needed
1205 for C++ exception handling. */
1207 #define FIRST_PSEUDO_REGISTER 69
1209 /* 1 for registers that have pervasive standard uses
1210 and are not available for the register allocator.
1212 On the MIPS, see conventions, page D-2 */
1214 #define FIXED_REGISTERS \
1216 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1217 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
1218 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1219 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1224 /* 1 for registers not available across function calls.
1225 These must include the FIXED_REGISTERS and also any
1226 registers that can be used without being saved.
1227 The latter must include the registers where values are returned
1228 and the register where structure-value addresses are passed.
1229 Aside from that, you can include as many other registers as you like. */
1231 #define CALL_USED_REGISTERS \
1233 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1234 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
1235 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1236 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1241 /* Internal macros to classify a register number as to whether it's a
1242 general purpose register, a floating point register, a
1243 multiply/divide register, or a status register. */
1245 #define GP_REG_FIRST 0
1246 #define GP_REG_LAST 31
1247 #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
1248 #define GP_DBX_FIRST 0
1250 #define FP_REG_FIRST 32
1251 #define FP_REG_LAST 63
1252 #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1)
1253 #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32)
1255 #define MD_REG_FIRST 64
1256 #define MD_REG_LAST 66
1257 #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1)
1259 #define ST_REG_FIRST 67
1260 #define ST_REG_LAST 67
1261 #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1)
1263 #define RAP_REG_NUM 68
1265 #define AT_REGNUM (GP_REG_FIRST + 1)
1266 #define HI_REGNUM (MD_REG_FIRST + 0)
1267 #define LO_REGNUM (MD_REG_FIRST + 1)
1268 #define HILO_REGNUM (MD_REG_FIRST + 2)
1269 #define FPSW_REGNUM ST_REG_FIRST
1271 #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1272 #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)
1273 #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM)
1274 #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST)
1276 /* Return number of consecutive hard regs needed starting at reg REGNO
1277 to hold something of mode MODE.
1278 This is ordinarily the length in words of a value of mode MODE
1279 but can be less for certain modes in special long registers.
1281 On the MIPS, all general registers are one word long. Except on
1282 the R4000 with the FR bit set, the floating point uses register
1283 pairs, with the second register not being allocatable. */
1285 #define HARD_REGNO_NREGS(REGNO, MODE) \
1286 (! FP_REG_P (REGNO) \
1287 ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
1288 : ((GET_MODE_SIZE (MODE) + UNITS_PER_FPREG - 1) / UNITS_PER_FPREG))
1290 /* Value is 1 if hard register REGNO can hold a value of machine-mode
1291 MODE. In 32 bit mode, require that DImode and DFmode be in even
1292 registers. For DImode, this makes some of the insns easier to
1293 write, since you don't have to worry about a DImode value in
1294 registers 3 & 4, producing a result in 4 & 5.
1296 To make the code simpler HARD_REGNO_MODE_OK now just references an
1297 array built in override_options. Because machmodes.h is not yet
1298 included before this file is processed, the MODE bound can't be
1301 extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
1303 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1304 mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ]
1306 /* Value is 1 if it is a good idea to tie two pseudo registers
1307 when one has mode MODE1 and one has mode MODE2.
1308 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
1309 for any hard reg, then this must be 0 for correct output. */
1310 #define MODES_TIEABLE_P(MODE1, MODE2) \
1311 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
1312 GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
1313 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
1314 GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
1316 /* MIPS pc is not overloaded on a register. */
1317 /* #define PC_REGNUM xx */
1319 /* Register to use for pushing function arguments. */
1320 #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
1322 /* Offset from the stack pointer to the first available location. */
1323 #define STACK_POINTER_OFFSET 0
1325 /* Base register for access to local variables of the function. */
1326 #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 30)
1328 /* Value should be nonzero if functions must have frame pointers.
1329 Zero means the frame pointer need not be set up (and parms
1330 may be accessed via the stack pointer) in functions that seem suitable.
1331 This is computed in `reload', in reload1.c. */
1332 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1334 /* Base register for access to arguments of the function. */
1335 #define ARG_POINTER_REGNUM GP_REG_FIRST
1337 /* Fake register that holds the address on the stack of the
1338 current function's return address. */
1339 #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG_NUM
1341 /* Register in which static-chain is passed to a function. */
1342 #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
1344 /* If the structure value address is passed in a register, then
1345 `STRUCT_VALUE_REGNUM' should be the number of that register. */
1346 /* #define STRUCT_VALUE_REGNUM (GP_REG_FIRST + 4) */
1348 /* If the structure value address is not passed in a register, define
1349 `STRUCT_VALUE' as an expression returning an RTX for the place
1350 where the address is passed. If it returns 0, the address is
1351 passed as an "invisible" first argument. */
1352 #define STRUCT_VALUE 0
1354 /* Mips registers used in prologue/epilogue code when the stack frame
1355 is larger than 32K bytes. These registers must come from the
1356 scratch register set, and not used for passing and returning
1357 arguments and any other information used in the calling sequence
1358 (such as pic). Must start at 12, since t0/t3 are parameter passing
1359 registers in the 64 bit ABI. */
1361 #define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 12)
1362 #define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 13)
1364 /* Define this macro if it is as good or better to call a constant
1365 function address than to call an address kept in a register. */
1366 #define NO_FUNCTION_CSE 1
1368 /* Define this macro if it is as good or better for a function to
1369 call itself with an explicit address than to call an address
1370 kept in a register. */
1371 #define NO_RECURSIVE_FUNCTION_CSE 1
1373 /* The register number of the register used to address a table of
1374 static data addresses in memory. In some cases this register is
1375 defined by a processor's "application binary interface" (ABI).
1376 When this macro is defined, RTL is generated for this register
1377 once, as with the stack pointer and frame pointer registers. If
1378 this macro is not defined, it is up to the machine-dependent
1379 files to allocate such a register (if necessary). */
1380 #define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28)
1382 #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25)
1384 /* Initialize embedded_pic_fnaddr_rtx before RTL generation for
1385 each function. We used to do this in FINALIZE_PIC, but FINALIZE_PIC
1386 isn't always called for static inline functions. */
1387 #define INIT_EXPANDERS embedded_pic_fnaddr_rtx = NULL;
1389 /* Define the classes of registers for register constraints in the
1390 machine description. Also define ranges of constants.
1392 One of the classes must always be named ALL_REGS and include all hard regs.
1393 If there is more than one class, another class must be named NO_REGS
1394 and contain no registers.
1396 The name GENERAL_REGS must be the name of a class (or an alias for
1397 another name such as ALL_REGS). This is the class of registers
1398 that is allowed by "g" or "r" in a register constraint.
1399 Also, registers outside this class are allocated only when
1400 instructions express preferences for them.
1402 The classes must be numbered in nondecreasing order; that is,
1403 a larger-numbered class must never be contained completely
1404 in a smaller-numbered class.
1406 For any two classes, it is very desirable that there be another
1407 class that represents their union. */
1411 NO_REGS, /* no registers in set */
1412 GR_REGS, /* integer registers */
1413 FP_REGS, /* floating point registers */
1414 HI_REG, /* hi register */
1415 LO_REG, /* lo register */
1416 HILO_REG, /* hilo register pair for 64 bit mode mult */
1417 MD_REGS, /* multiply/divide registers (hi/lo) */
1418 ST_REGS, /* status registers (fp status) */
1419 ALL_REGS, /* all registers */
1420 LIM_REG_CLASSES /* max value + 1 */
1423 #define N_REG_CLASSES (int) LIM_REG_CLASSES
1425 #define GENERAL_REGS GR_REGS
1427 /* An initializer containing the names of the register classes as C
1428 string constants. These names are used in writing some of the
1431 #define REG_CLASS_NAMES \
1444 /* An initializer containing the contents of the register classes,
1445 as integers which are bit masks. The Nth integer specifies the
1446 contents of class N. The way the integer MASK is interpreted is
1447 that register R is in the class if `MASK & (1 << R)' is 1.
1449 When the machine has more than 32 registers, an integer does not
1450 suffice. Then the integers are replaced by sub-initializers,
1451 braced groupings containing several integers. Each
1452 sub-initializer must be suitable as an initializer for the type
1453 `HARD_REG_SET' which is defined in `hard-reg-set.h'. */
1455 #define REG_CLASS_CONTENTS \
1457 { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
1458 { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \
1459 { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \
1460 { 0x00000000, 0x00000000, 0x00000001 }, /* hi register */ \
1461 { 0x00000000, 0x00000000, 0x00000002 }, /* lo register */ \
1462 { 0x00000000, 0x00000000, 0x00000004 }, /* hilo register */ \
1463 { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \
1464 { 0x00000000, 0x00000000, 0x00000008 }, /* status registers */ \
1465 { 0xffffffff, 0xffffffff, 0x0000000f } /* all registers */ \
1469 /* A C expression whose value is a register class containing hard
1470 register REGNO. In general there is more that one such class;
1471 choose a class which is "minimal", meaning that no smaller class
1472 also contains the register. */
1474 extern enum reg_class mips_regno_to_class[];
1476 #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ]
1478 /* A macro whose definition is the name of the class to which a
1479 valid base register must belong. A base register is one used in
1480 an address which is the register value plus a displacement. */
1482 #define BASE_REG_CLASS GR_REGS
1484 /* A macro whose definition is the name of the class to which a
1485 valid index register must belong. An index register is one used
1486 in an address where its value is either multiplied by a scale
1487 factor or added to another register (as well as added to a
1490 #define INDEX_REG_CLASS NO_REGS
1493 /* REGISTER AND CONSTANT CLASSES */
1495 /* Get reg_class from a letter such as appears in the machine
1498 DEFINED REGISTER CLASSES:
1500 'd' General (aka integer) registers
1501 'f' Floating point registers
1504 'x' Multiply/divide registers
1506 'z' FP Status register
1507 'b' All registers */
1509 extern enum reg_class mips_char_to_class[];
1511 #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ]
1513 /* The letters I, J, K, L, M, N, O, and P in a register constraint
1514 string can be used to stand for particular ranges of immediate
1515 operands. This macro defines what the ranges are. C is the
1516 letter, and VALUE is a constant value. Return 1 if VALUE is
1517 in the range specified by C. */
1521 `I' is used for the range of constants an arithmetic insn can
1522 actually contain (16 bits signed integers).
1524 `J' is used for the range which is just zero (ie, $r0).
1526 `K' is used for the range of constants a logical insn can actually
1527 contain (16 bit zero-extended integers).
1529 `L' is used for the range of constants that be loaded with lui
1530 (ie, the bottom 16 bits are zero).
1532 `M' is used for the range of constants that take two words to load
1533 (ie, not matched by `I', `K', and `L').
1535 `N' is used for negative 16 bit constants.
1537 `O' is an exact power of 2 (not yet used in the md file).
1539 `P' is used for positive 16 bit constants. */
1541 #define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1542 #define SMALL_INT_UNSIGNED(X) ((unsigned HOST_WIDE_INT) (INTVAL (X)) < 0x10000)
1544 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1545 ((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \
1546 : (C) == 'J' ? ((VALUE) == 0) \
1547 : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000) \
1548 : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0 \
1549 && (((VALUE) & ~2147483647) == 0 \
1550 || ((VALUE) & ~2147483647) == ~2147483647)) \
1551 : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \
1552 && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \
1553 && (((VALUE) & 0x0000ffff) != 0 \
1554 || (((VALUE) & ~2147483647) != 0 \
1555 && ((VALUE) & ~2147483647) != ~2147483647))) \
1556 : (C) == 'N' ? (((VALUE) & ~0x0000ffff) == ~0x0000ffff) \
1557 : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \
1558 : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \
1561 /* Similar, but for floating constants, and defining letters G and H.
1562 Here VALUE is the CONST_DOUBLE rtx itself. */
1566 'G' : Floating point 0 */
1568 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1570 && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
1572 /* Letters in the range `Q' through `U' may be defined in a
1573 machine-dependent fashion to stand for arbitrary operand types.
1574 The machine description macro `EXTRA_CONSTRAINT' is passed the
1575 operand as its first argument and the constraint letter as its
1578 `Q' is for memory references which take more than 1 instruction.
1579 `R' is for memory references which take 1 word for the instruction.
1580 `S' is for references to extern items which are PIC for OSF/rose. */
1582 #define EXTRA_CONSTRAINT(OP,CODE) \
1583 ((GET_CODE (OP) != MEM) ? FALSE \
1584 : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
1585 : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
1586 : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \
1587 && HALF_PIC_ADDRESS_P (OP)) \
1590 /* Given an rtx X being reloaded into a reg required to be
1591 in class CLASS, return the class of reg to actually use.
1592 In general this is just CLASS; but on some machines
1593 in some cases it is preferable to use a more restrictive class. */
1595 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
1596 ((CLASS) != ALL_REGS \
1598 : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1599 || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
1600 ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \
1601 : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
1602 || GET_MODE (X) == VOIDmode) \
1606 /* Certain machines have the property that some registers cannot be
1607 copied to some other registers without using memory. Define this
1608 macro on those machines to be a C expression that is non-zero if
1609 objects of mode MODE in registers of CLASS1 can only be copied to
1610 registers of class CLASS2 by storing a register of CLASS1 into
1611 memory and loading that memory location into a register of CLASS2.
1613 Do not define this macro if its value would always be zero. */
1615 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1616 ((!TARGET_DEBUG_H_MODE \
1617 && GET_MODE_CLASS (MODE) == MODE_INT \
1618 && ((CLASS1 == FP_REGS && CLASS2 == GR_REGS) \
1619 || (CLASS1 == GR_REGS && CLASS2 == FP_REGS))) \
1620 || (TARGET_FLOAT64 && !TARGET_64BIT && (MODE) == DFmode \
1621 && ((CLASS1 == GR_REGS && CLASS2 == FP_REGS) \
1622 || (CLASS2 == GR_REGS && CLASS1 == FP_REGS))))
1624 /* The HI and LO registers can only be reloaded via the general
1627 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
1628 mips_secondary_reload_class (CLASS, MODE, X, 1)
1629 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
1630 mips_secondary_reload_class (CLASS, MODE, X, 0)
1632 /* Not declared above, with the other functions, because enum
1633 reg_class is not declared yet. */
1634 extern enum reg_class mips_secondary_reload_class ();
1636 /* Return the maximum number of consecutive registers
1637 needed to represent mode MODE in a register of class CLASS. */
1639 #define CLASS_UNITS(mode, size) \
1640 ((GET_MODE_SIZE (mode) + (size) - 1) / (size))
1642 #define CLASS_MAX_NREGS(CLASS, MODE) \
1643 ((CLASS) == FP_REGS \
1645 ? CLASS_UNITS (MODE, 8) \
1646 : 2 * CLASS_UNITS (MODE, 8)) \
1647 : CLASS_UNITS (MODE, UNITS_PER_WORD))
1649 /* If defined, this is a C expression whose value should be
1650 nonzero if the insn INSN has the effect of mysteriously
1651 clobbering the contents of hard register number REGNO. By
1652 "mysterious" we mean that the insn's RTL expression doesn't
1653 describe such an effect.
1655 If this macro is not defined, it means that no insn clobbers
1656 registers mysteriously. This is the usual situation; all else
1657 being equal, it is best for the RTL expression to show all the
1660 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */
1663 /* Stack layout; function entry, exit and calling. */
1665 /* Define this if pushing a word on the stack
1666 makes the stack pointer a smaller address. */
1667 #define STACK_GROWS_DOWNWARD
1669 /* Define this if the nominal address of the stack frame
1670 is at the high-address end of the local variables;
1671 that is, each additional local variable allocated
1672 goes at a more negative offset in the frame. */
1673 /* #define FRAME_GROWS_DOWNWARD */
1675 /* Offset within stack frame to start allocating local variables at.
1676 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1677 first local allocated. Otherwise, it is the offset to the BEGINNING
1678 of the first local allocated. */
1679 #define STARTING_FRAME_OFFSET \
1680 (current_function_outgoing_args_size \
1681 + (TARGET_ABICALLS ? MIPS_STACK_ALIGN (UNITS_PER_WORD) : 0))
1683 /* Offset from the stack pointer register to an item dynamically
1684 allocated on the stack, e.g., by `alloca'.
1686 The default value for this macro is `STACK_POINTER_OFFSET' plus the
1687 length of the outgoing arguments. The default is correct for most
1688 machines. See `function.c' for details.
1690 The MIPS ABI states that functions which dynamically allocate the
1691 stack must not have 0 for STACK_DYNAMIC_OFFSET, since it looks like
1692 we are trying to create a second frame pointer to the function, so
1693 allocate some stack space to make it happy.
1695 However, the linker currently complains about linking any code that
1696 dynamically allocates stack space, and there seems to be a bug in
1697 STACK_DYNAMIC_OFFSET, so don't define this right now. */
1700 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
1701 ((current_function_outgoing_args_size == 0 && current_function_calls_alloca) \
1702 ? 4*UNITS_PER_WORD \
1703 : current_function_outgoing_args_size)
1706 /* The return address for the current frame is in r31 is this is a leaf
1707 function. Otherwise, it is on the stack. It is at a variable offset
1708 from sp/fp/ap, so we define a fake hard register rap which is a
1709 poiner to the return address on the stack. This always gets eliminated
1710 during reload to be either the frame pointer or the stack pointer plus
1713 /* ??? This definition fails for leaf functions. There is currently no
1714 general solution for this problem. */
1716 /* ??? There appears to be no way to get the return address of any previous
1717 frame except by disassembling instructions in the prologue/epilogue.
1718 So currently we support only the current frame. */
1720 #define RETURN_ADDR_RTX(count, frame) \
1722 ? gen_rtx (MEM, Pmode, gen_rtx (REG, Pmode, RETURN_ADDRESS_POINTER_REGNUM))\
1723 : (fatal ("RETURN_ADDR_RTX not supported for count != 0"), (rtx) 0))
1725 /* Structure to be filled in by compute_frame_size with register
1726 save masks, and offsets for the current function. */
1728 struct mips_frame_info
1730 long total_size; /* # bytes that the entire frame takes up */
1731 long var_size; /* # bytes that variables take up */
1732 long args_size; /* # bytes that outgoing arguments take up */
1733 long extra_size; /* # bytes of extra gunk */
1734 int gp_reg_size; /* # bytes needed to store gp regs */
1735 int fp_reg_size; /* # bytes needed to store fp regs */
1736 long mask; /* mask of saved gp registers */
1737 long fmask; /* mask of saved fp registers */
1738 long gp_save_offset; /* offset from vfp to store gp registers */
1739 long fp_save_offset; /* offset from vfp to store fp registers */
1740 long gp_sp_offset; /* offset from new sp to store gp registers */
1741 long fp_sp_offset; /* offset from new sp to store fp registers */
1742 int initialized; /* != 0 if frame size already calculated */
1743 int num_gp; /* number of gp registers saved */
1744 int num_fp; /* number of fp registers saved */
1747 extern struct mips_frame_info current_frame_info;
1749 /* Store in the variable DEPTH the initial difference between the
1750 frame pointer reg contents and the stack pointer reg contents,
1751 as of the start of the function body. This depends on the layout
1752 of the fixed parts of the stack frame and on how registers are saved. */
1754 /* #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
1755 ((VAR) = compute_frame_size (get_frame_size ())) */
1757 /* If defined, this macro specifies a table of register pairs used to
1758 eliminate unneeded registers that point into the stack frame. If
1759 it is not defined, the only elimination attempted by the compiler
1760 is to replace references to the frame pointer with references to
1763 The definition of this macro is a list of structure
1764 initializations, each of which specifies an original and
1765 replacement register.
1767 On some machines, the position of the argument pointer is not
1768 known until the compilation is completed. In such a case, a
1769 separate hard register must be used for the argument pointer.
1770 This register can be eliminated by replacing it with either the
1771 frame pointer or the argument pointer, depending on whether or not
1772 the frame pointer has been eliminated.
1774 In this case, you might specify:
1775 #define ELIMINABLE_REGS \
1776 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1777 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1778 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1780 Note that the elimination of the argument pointer with the stack
1781 pointer is specified first since that is the preferred elimination. */
1783 #define ELIMINABLE_REGS \
1784 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1785 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1786 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1787 { RETURN_ADDRESS_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1788 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1790 /* A C expression that returns non-zero if the compiler is allowed to
1791 try to replace register number FROM-REG with register number
1792 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
1793 defined, and will usually be the constant 1, since most of the
1794 cases preventing register elimination are things that the compiler
1795 already knows about. */
1797 #define CAN_ELIMINATE(FROM, TO) \
1798 (!frame_pointer_needed \
1799 || ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1800 || ((FROM) == RETURN_ADDRESS_POINTER_REGNUM \
1801 && (TO) == FRAME_POINTER_REGNUM))
1803 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
1804 specifies the initial difference between the specified pair of
1805 registers. This macro must be defined if `ELIMINABLE_REGS' is
1808 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1809 { compute_frame_size (get_frame_size ()); \
1810 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1812 else if ((FROM) == ARG_POINTER_REGNUM \
1813 && ((TO) == FRAME_POINTER_REGNUM \
1814 || (TO) == STACK_POINTER_REGNUM)) \
1815 (OFFSET) = (current_frame_info.total_size \
1816 - (mips_abi != ABI_32 \
1817 ? current_function_pretend_args_size \
1819 else if ((FROM) == RETURN_ADDRESS_POINTER_REGNUM \
1820 && ((TO) == FRAME_POINTER_REGNUM \
1821 || (TO) == STACK_POINTER_REGNUM)) \
1822 (OFFSET) = current_frame_info.gp_sp_offset; \
1827 /* If we generate an insn to push BYTES bytes,
1828 this says how many the stack pointer really advances by.
1829 On the vax, sp@- in a byte insn really pushes a word. */
1831 /* #define PUSH_ROUNDING(BYTES) 0 */
1833 /* If defined, the maximum amount of space required for outgoing
1834 arguments will be computed and placed into the variable
1835 `current_function_outgoing_args_size'. No space will be pushed
1836 onto the stack for each call; instead, the function prologue
1837 should increase the stack frame size by this amount.
1839 It is not proper to define both `PUSH_ROUNDING' and
1840 `ACCUMULATE_OUTGOING_ARGS'. */
1841 #define ACCUMULATE_OUTGOING_ARGS
1843 /* Offset from the argument pointer register to the first argument's
1844 address. On some machines it may depend on the data type of the
1847 If `ARGS_GROW_DOWNWARD', this is the offset to the location above
1848 the first argument's address.
1850 On the MIPS, we must skip the first argument position if we are
1851 returning a structure or a union, to account for its address being
1852 passed in $4. However, at the current time, this produces a compiler
1853 that can't bootstrap, so comment it out for now. */
1856 #define FIRST_PARM_OFFSET(FNDECL) \
1858 && TREE_TYPE (FNDECL) != 0 \
1859 && TREE_TYPE (TREE_TYPE (FNDECL)) != 0 \
1860 && (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE \
1861 || TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE) \
1865 #define FIRST_PARM_OFFSET(FNDECL) 0
1868 /* When a parameter is passed in a register, stack space is still
1869 allocated for it. For the MIPS, stack space must be allocated, cf
1870 Asm Lang Prog Guide page 7-8.
1872 BEWARE that some space is also allocated for non existing arguments
1873 in register. In case an argument list is of form GF used registers
1874 are a0 (a2,a3), but we should push over a1... */
1876 #define REG_PARM_STACK_SPACE(FNDECL) \
1877 ((MAX_ARGS_IN_REGISTERS*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL))
1879 /* Define this if it is the responsibility of the caller to
1880 allocate the area reserved for arguments passed in registers.
1881 If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
1882 of this macro is to determine whether the space is included in
1883 `current_function_outgoing_args_size'. */
1884 #define OUTGOING_REG_PARM_STACK_SPACE
1886 /* Align stack frames on 64 bits (Double Word ). */
1887 #define STACK_BOUNDARY 64
1889 /* Make sure 4 words are always allocated on the stack. */
1891 #ifndef STACK_ARGS_ADJUST
1892 #define STACK_ARGS_ADJUST(SIZE) \
1894 if (SIZE.constant < 4 * UNITS_PER_WORD) \
1895 SIZE.constant = 4 * UNITS_PER_WORD; \
1900 /* A C expression that should indicate the number of bytes of its
1901 own arguments that a function function pops on returning, or 0
1902 if the function pops no arguments and the caller must therefore
1903 pop them all after the function returns.
1905 FUNDECL is the declaration node of the function (as a tree).
1907 FUNTYPE is a C variable whose value is a tree node that
1908 describes the function in question. Normally it is a node of
1909 type `FUNCTION_TYPE' that describes the data type of the function.
1910 From this it is possible to obtain the data types of the value
1911 and arguments (if known).
1913 When a call to a library function is being considered, FUNTYPE
1914 will contain an identifier node for the library function. Thus,
1915 if you need to distinguish among various library functions, you
1916 can do so by their names. Note that "library function" in this
1917 context means a function used to perform arithmetic, whose name
1918 is known specially in the compiler and was not mentioned in the
1919 C code being compiled.
1921 STACK-SIZE is the number of bytes of arguments passed on the
1922 stack. If a variable number of bytes is passed, it is zero, and
1923 argument popping will always be the responsibility of the
1924 calling function. */
1926 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1929 /* Symbolic macros for the registers used to return integer and floating
1932 #define GP_RETURN (GP_REG_FIRST + 2)
1933 #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0))
1935 /* Symbolic macros for the first/last argument registers. */
1937 #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1938 #define GP_ARG_LAST (GP_REG_FIRST + 7)
1939 #define FP_ARG_FIRST (FP_REG_FIRST + 12)
1940 #define FP_ARG_LAST (FP_REG_FIRST + 15)
1942 #define MAX_ARGS_IN_REGISTERS 4
1944 /* Define how to find the value returned by a library function
1945 assuming the value has mode MODE. */
1947 #define LIBCALL_VALUE(MODE) \
1948 gen_rtx (REG, MODE, \
1949 ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
1950 && (! TARGET_SINGLE_FLOAT \
1951 || GET_MODE_SIZE (MODE) <= 4)) \
1955 /* Define how to find the value returned by a function.
1956 VALTYPE is the data type of the value (as a tree).
1957 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1958 otherwise, FUNC is 0. */
1960 #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
1963 /* 1 if N is a possible register number for a function value.
1964 On the MIPS, R2 R3 and F0 F2 are the only register thus used.
1965 Currently, R2 and F0 are only implemented here (C has no complex type) */
1967 #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
1969 /* 1 if N is a possible register number for function argument passing. */
1971 #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \
1972 || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \
1975 /* A C expression which can inhibit the returning of certain function
1976 values in registers, based on the type of value. A nonzero value says
1977 to return the function value in memory, just as large structures are
1978 always returned. Here TYPE will be a C expression of type
1979 `tree', representing the data type of the value.
1981 Note that values of mode `BLKmode' must be explicitly
1982 handled by this macro. Also, the option `-fpcc-struct-return'
1983 takes effect regardless of this macro. On most systems, it is
1984 possible to leave the macro undefined; this causes a default
1985 definition to be used, whose value is the constant 1 for BLKmode
1986 values, and 0 otherwise.
1988 GCC normally converts 1 byte structures into chars, 2 byte
1989 structs into shorts, and 4 byte structs into ints, and returns
1990 them this way. Defining the following macro overrides this,
1991 to give us MIPS cc compatibility. */
1993 #define RETURN_IN_MEMORY(TYPE) \
1994 (TYPE_MODE (TYPE) == BLKmode)
1996 /* A code distinguishing the floating point format of the target
1997 machine. There are three defined values: IEEE_FLOAT_FORMAT,
1998 VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */
2000 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
2003 /* Define a data type for recording info about an argument list
2004 during the scan of that argument list. This data type should
2005 hold all necessary information about the function itself
2006 and about the args processed so far, enough to enable macros
2007 such as FUNCTION_ARG to determine where the next arg should go.
2010 typedef struct mips_args {
2011 int gp_reg_found; /* whether a gp register was found yet */
2012 int arg_number; /* argument number */
2013 int arg_words; /* # total words the arguments take */
2014 int num_adjusts; /* number of adjustments made */
2015 /* Adjustments made to args pass in regs. */
2016 /* ??? The size is doubled to work around a
2017 bug in the code that sets the adjustments
2019 struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS*2];
2022 /* Initialize a variable CUM of type CUMULATIVE_ARGS
2023 for a call to a function whose data type is FNTYPE.
2024 For a library call, FNTYPE is 0.
2028 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
2029 init_cumulative_args (&CUM, FNTYPE, LIBNAME) \
2031 /* Update the data in CUM to advance over an argument
2032 of mode MODE and data type TYPE.
2033 (TYPE is null for libcalls where that information may not be available.) */
2035 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
2036 function_arg_advance (&CUM, MODE, TYPE, NAMED)
2038 /* Determine where to put an argument to a function.
2039 Value is zero to push the argument on the stack,
2040 or a hard register in which to store the argument.
2042 MODE is the argument's machine mode.
2043 TYPE is the data type of the argument (as a tree).
2044 This is null for libcalls where that information may
2046 CUM is a variable of type CUMULATIVE_ARGS which gives info about
2047 the preceding args and about the function being called.
2048 NAMED is nonzero if this argument is a named parameter
2049 (otherwise it is an extra parameter matching an ellipsis). */
2051 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
2052 function_arg( &CUM, MODE, TYPE, NAMED)
2054 /* For an arg passed partly in registers and partly in memory,
2055 this is the number of registers used.
2056 For args passed entirely in registers or entirely in memory, zero. */
2058 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
2059 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
2061 /* If defined, a C expression that gives the alignment boundary, in
2062 bits, of an argument with the specified mode and type. If it is
2063 not defined, `PARM_BOUNDARY' is used for all arguments. */
2065 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
2067 ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
2069 : TYPE_ALIGN(TYPE)) \
2070 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
2072 : GET_MODE_ALIGNMENT(MODE)))
2075 /* This macro generates the assembly code for function entry.
2076 FILE is a stdio stream to output the code to.
2077 SIZE is an int: how many units of temporary storage to allocate.
2078 Refer to the array `regs_ever_live' to determine which registers
2079 to save; `regs_ever_live[I]' is nonzero if register number I
2080 is ever used in the function. This macro is responsible for
2081 knowing which registers should not be saved even if used. */
2083 #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
2085 /* This macro generates the assembly code for function exit,
2086 on machines that need it. If FUNCTION_EPILOGUE is not defined
2087 then individual return instructions are generated for each
2088 return statement. Args are same as for FUNCTION_PROLOGUE. */
2090 #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
2092 /* Define the number of delay slots needed for the function epilogue.
2094 On the mips, we need a slot if either no stack has been allocated,
2095 or the only register saved is the return register. */
2097 #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots ()
2099 /* Define whether INSN can be placed in delay slot N for the epilogue.
2100 No references to the stack must be made, since on the MIPS, the
2101 delay slot is done after the stack has been cleaned up. */
2103 #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
2104 (get_attr_dslot (INSN) == DSLOT_NO \
2105 && get_attr_length (INSN) == 1 \
2106 && ! epilogue_reg_mentioned_p (PATTERN (INSN)))
2108 /* Tell prologue and epilogue if register REGNO should be saved / restored. */
2110 #define MUST_SAVE_REGISTER(regno) \
2111 ((regs_ever_live[regno] && !call_used_regs[regno]) \
2112 || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \
2113 || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
2115 /* ALIGN FRAMES on double word boundaries */
2117 #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
2120 /* Output assembler code to FILE to increment profiler label # LABELNO
2121 for profiling a function entry. */
2123 #define FUNCTION_PROFILER(FILE, LABELNO) \
2125 fprintf (FILE, "\t.set\tnoreorder\n"); \
2126 fprintf (FILE, "\t.set\tnoat\n"); \
2127 fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
2128 reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
2129 fprintf (FILE, "\tjal\t_mcount\n"); \
2131 "\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from stack\n", \
2132 TARGET_64BIT ? "dsubu" : "subu", \
2133 reg_names[STACK_POINTER_REGNUM], \
2134 reg_names[STACK_POINTER_REGNUM], \
2135 TARGET_LONG64 ? 16 : 8); \
2136 fprintf (FILE, "\t.set\treorder\n"); \
2137 fprintf (FILE, "\t.set\tat\n"); \
2140 /* Define this macro if the code for function profiling should come
2141 before the function prologue. Normally, the profiling code comes
2144 /* #define PROFILE_BEFORE_PROLOGUE */
2146 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
2147 the stack pointer does not matter. The value is tested only in
2148 functions that have frame pointers.
2149 No definition is equivalent to always zero. */
2151 #define EXIT_IGNORE_STACK 1
2154 /* A C statement to output, on the stream FILE, assembler code for a
2155 block of data that contains the constant parts of a trampoline.
2156 This code should not include a label--the label is taken care of
2159 #define TRAMPOLINE_TEMPLATE(STREAM) \
2161 fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
2162 fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
2163 fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
2164 if (TARGET_LONG64) \
2166 fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \
2167 fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \
2171 fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw $3,20($31)\n"); \
2172 fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw $2,24($31)\n"); \
2174 fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \
2175 fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
2176 fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
2177 if (TARGET_LONG64) \
2179 fprintf (STREAM, "\t.dword\t0x00000000\t\t# <function address>\n"); \
2180 fprintf (STREAM, "\t.dword\t0x00000000\t\t# <static chain value>\n"); \
2184 fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
2185 fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
2189 /* A C expression for the size in bytes of the trampoline, as an
2192 #define TRAMPOLINE_SIZE (32 + (TARGET_LONG64 ? 16 : 8))
2194 /* Alignment required for trampolines, in bits. */
2196 #define TRAMPOLINE_ALIGNMENT (TARGET_LONG64 ? 64 : 32)
2198 /* A C statement to initialize the variable parts of a trampoline.
2199 ADDR is an RTX for the address of the trampoline; FNADDR is an
2200 RTX for the address of the nested function; STATIC_CHAIN is an
2201 RTX for the static chain value that should be passed to the
2202 function when it is called. */
2204 #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
2207 if (TARGET_LONG64) \
2209 emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \
2210 emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\
2214 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), FUNC); \
2215 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 36)), CHAIN);\
2218 /* Flush the instruction cache. */ \
2219 /* ??? Should check the return value for errors. */ \
2220 emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "cacheflush"), \
2221 0, VOIDmode, 3, addr, Pmode, \
2222 GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\
2223 GEN_INT (1), TYPE_MODE (integer_type_node)); \
2226 /* Addressing modes, and classification of registers for them. */
2228 /* #define HAVE_POST_INCREMENT */
2229 /* #define HAVE_POST_DECREMENT */
2231 /* #define HAVE_PRE_DECREMENT */
2232 /* #define HAVE_PRE_INCREMENT */
2234 /* These assume that REGNO is a hard or pseudo reg number.
2235 They give nonzero only if REGNO is a hard reg of the suitable class
2236 or a pseudo reg currently allocated to a suitable hard reg.
2237 These definitions are NOT overridden anywhere. */
2239 #define GP_REG_OR_PSEUDO_STRICT_P(regno) \
2240 GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno])
2242 #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \
2243 (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno)))
2245 #define REGNO_OK_FOR_INDEX_P(regno) 0
2246 #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
2248 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
2249 and check its validity for a certain class.
2250 We have two alternate definitions for each of them.
2251 The usual definition accepts all pseudo regs; the other rejects them all.
2252 The symbol REG_OK_STRICT causes the latter definition to be used.
2254 Most source files want to accept pseudo regs in the hope that
2255 they will get allocated to the class that the insn wants them to be in.
2256 Some source files that are used after register allocation
2257 need to be strict. */
2259 #ifndef REG_OK_STRICT
2261 #define REG_OK_STRICT_P 0
2262 #define REG_OK_FOR_INDEX_P(X) 0
2263 #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
2267 #define REG_OK_STRICT_P 1
2268 #define REG_OK_FOR_INDEX_P(X) 0
2269 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
2274 /* Maximum number of registers that can appear in a valid memory address. */
2276 #define MAX_REGS_PER_ADDRESS 1
2278 /* A C compound statement with a conditional `goto LABEL;' executed
2279 if X (an RTX) is a legitimate memory address on the target
2280 machine for a memory operand of mode MODE.
2282 It usually pays to define several simpler macros to serve as
2283 subroutines for this one. Otherwise it may be too complicated
2286 This macro must exist in two variants: a strict variant and a
2287 non-strict one. The strict variant is used in the reload pass.
2288 It must be defined so that any pseudo-register that has not been
2289 allocated a hard register is considered a memory reference. In
2290 contexts where some kind of register is required, a
2291 pseudo-register with no hard register must be rejected.
2293 The non-strict variant is used in other passes. It must be
2294 defined to accept all pseudo-registers in every context where
2295 some kind of register is required.
2297 Compiler source files that want to use the strict variant of
2298 this macro define the macro `REG_OK_STRICT'. You should use an
2299 `#ifdef REG_OK_STRICT' conditional to define the strict variant
2300 in that case and the non-strict variant otherwise.
2302 Typically among the subroutines used to define
2303 `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for
2304 acceptable registers for various purposes (one for base
2305 registers, one for index registers, and so on). Then only these
2306 subroutine macros need have two variants; the higher levels of
2307 macros may be the same whether strict or not.
2309 Normally, constant addresses which are the sum of a `symbol_ref'
2310 and an integer are stored inside a `const' RTX to mark them as
2311 constant. Therefore, there is no need to recognize such sums
2312 specifically as legitimate addresses. Normally you would simply
2313 recognize any `const' as legitimate.
2315 Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle
2316 constant sums that are not marked with `const'. It assumes
2317 that a naked `plus' indicates indexing. If so, then you *must*
2318 reject such naked constant sums as illegitimate addresses, so
2319 that none of them will be given to `PRINT_OPERAND_ADDRESS'.
2321 On some machines, whether a symbolic address is legitimate
2322 depends on the section that the address refers to. On these
2323 machines, define the macro `ENCODE_SECTION_INFO' to store the
2324 information into the `symbol_ref', and then check for it here.
2325 When you see a `const', you will have to look inside it to find
2326 the `symbol_ref' in order to determine the section. */
2329 #define GO_PRINTF(x) trace(x)
2330 #define GO_PRINTF2(x,y) trace(x,y)
2331 #define GO_DEBUG_RTX(x) debug_rtx(x)
2334 #define GO_PRINTF(x)
2335 #define GO_PRINTF2(x,y)
2336 #define GO_DEBUG_RTX(x)
2339 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
2341 register rtx xinsn = (X); \
2343 if (TARGET_DEBUG_B_MODE) \
2345 GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \
2346 (REG_OK_STRICT_P) ? "" : "not "); \
2347 GO_DEBUG_RTX (xinsn); \
2350 if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \
2353 if (CONSTANT_ADDRESS_P (xinsn)) \
2356 if (GET_CODE (xinsn) == PLUS) \
2358 register rtx xplus0 = XEXP (xinsn, 0); \
2359 register rtx xplus1 = XEXP (xinsn, 1); \
2360 register enum rtx_code code0 = GET_CODE (xplus0); \
2361 register enum rtx_code code1 = GET_CODE (xplus1); \
2363 if (code0 != REG && code1 == REG) \
2365 xplus0 = XEXP (xinsn, 1); \
2366 xplus1 = XEXP (xinsn, 0); \
2367 code0 = GET_CODE (xplus0); \
2368 code1 = GET_CODE (xplus1); \
2371 if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \
2373 if (code1 == CONST_INT \
2374 && INTVAL (xplus1) >= -32768 \
2375 && INTVAL (xplus1) + GET_MODE_SIZE (MODE) - 1 <= 32767) \
2378 /* For some code sequences, you actually get better code by \
2379 pretending that the MIPS supports an address mode of a \
2380 constant address + a register, even though the real \
2381 machine doesn't support it. This is because the \
2382 assembler can use $r1 to load just the high 16 bits, add \
2383 in the register, and fold the low 16 bits into the memory \
2384 reference, whereas the compiler generates a 4 instruction \
2385 sequence. On the other hand, CSE is not as effective. \
2386 It would be a win to generate the lui directly, but the \
2387 MIPS assembler does not have syntax to generate the \
2388 appropriate relocation. */ \
2390 /* Also accept CONST_INT addresses here, so no else. */ \
2391 /* Reject combining an embedded PIC text segment reference \
2392 with a register. That requires an additional \
2394 /* ??? Reject combining an address with a register for the MIPS \
2395 64 bit ABI, because the SGI assembler can not handle this. */ \
2396 if (!TARGET_DEBUG_A_MODE \
2397 && mips_abi == ABI_32 \
2398 && CONSTANT_ADDRESS_P (xplus1) \
2399 && (!TARGET_EMBEDDED_PIC \
2401 || GET_CODE (XEXP (xplus1, 0)) != MINUS)) \
2406 if (TARGET_DEBUG_B_MODE) \
2407 GO_PRINTF ("Not a legitimate address\n"); \
2411 /* A C expression that is 1 if the RTX X is a constant which is a
2412 valid address. This is defined to be the same as `CONSTANT_P (X)',
2413 but rejecting CONST_DOUBLE. */
2414 /* When pic, we must reject addresses of the form symbol+large int.
2415 This is because an instruction `sw $4,s+70000' needs to be converted
2416 by the assembler to `lw $at,s($gp);sw $4,70000($at)'. Normally the
2417 assembler would use $at as a temp to load in the large offset. In this
2418 case $at is already in use. We convert such problem addresses to
2419 `la $5,s;sw $4,70000($5)' via LEGITIMIZE_ADDRESS. */
2420 /* ??? SGI Irix 6 assembler fails for CONST address, so reject them. */
2421 #define CONSTANT_ADDRESS_P(X) \
2422 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
2423 || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
2424 || (GET_CODE (X) == CONST \
2425 && ! (flag_pic && pic_address_needs_scratch (X)) \
2426 && mips_abi == ABI_32)) \
2427 && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X)))
2429 /* Define this, so that when PIC, reload won't try to reload invalid
2430 addresses which require two reload registers. */
2432 #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
2434 /* Nonzero if the constant value X is a legitimate general operand.
2435 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
2437 At present, GAS doesn't understand li.[sd], so don't allow it
2438 to be generated at present. Also, the MIPS assembler does not
2439 grok li.d Infinity. */
2441 /* ??? SGI Irix 6 assembler fails for CONST address, so reject them. */
2442 #define LEGITIMATE_CONSTANT_P(X) \
2443 ((GET_CODE (X) != CONST_DOUBLE \
2444 || mips_const_double_ok (X, GET_MODE (X))) \
2445 && ! (GET_CODE (X) == CONST && mips_abi != ABI_32))
2447 /* A C compound statement that attempts to replace X with a valid
2448 memory address for an operand of mode MODE. WIN will be a C
2449 statement label elsewhere in the code; the macro definition may
2452 GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN);
2454 to avoid further processing if the address has become legitimate.
2456 X will always be the result of a call to `break_out_memory_refs',
2457 and OLDX will be the operand that was given to that function to
2460 The code generated by this macro should not alter the
2461 substructure of X. If it transforms X into a more legitimate
2462 form, it should assign X (which will always be a C variable) a
2465 It is not necessary for this macro to come up with a legitimate
2466 address. The compiler has standard ways of doing so in all
2467 cases. In fact, it is safe for this macro to do nothing. But
2468 often a machine-dependent strategy can generate better code.
2470 For the MIPS, transform:
2472 memory(X + <large int>)
2476 Y = <large int> & ~0x7fff;
2478 memory (Z + (<large int> & 0x7fff));
2480 This is for CSE to find several similar references, and only use one Z.
2482 When PIC, convert addresses of the form memory (symbol+large int) to
2483 memory (reg+large int). */
2486 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
2488 register rtx xinsn = (X); \
2490 if (TARGET_DEBUG_B_MODE) \
2492 GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \
2493 GO_DEBUG_RTX (xinsn); \
2496 if (GET_CODE (xinsn) == CONST \
2497 && ((flag_pic && pic_address_needs_scratch (xinsn)) \
2498 /* ??? SGI's Irix 6 assembler can't handle CONST. */ \
2499 || mips_abi != ABI_32)) \
2501 rtx ptr_reg = gen_reg_rtx (Pmode); \
2502 rtx constant = XEXP (XEXP (xinsn, 0), 1); \
2504 emit_move_insn (ptr_reg, XEXP (XEXP (xinsn, 0), 0)); \
2506 X = gen_rtx (PLUS, Pmode, ptr_reg, constant); \
2507 if (SMALL_INT (constant)) \
2509 /* Otherwise we fall through so the code below will fix the \
2514 if (GET_CODE (xinsn) == PLUS) \
2516 register rtx xplus0 = XEXP (xinsn, 0); \
2517 register rtx xplus1 = XEXP (xinsn, 1); \
2518 register enum rtx_code code0 = GET_CODE (xplus0); \
2519 register enum rtx_code code1 = GET_CODE (xplus1); \
2521 if (code0 != REG && code1 == REG) \
2523 xplus0 = XEXP (xinsn, 1); \
2524 xplus1 = XEXP (xinsn, 0); \
2525 code0 = GET_CODE (xplus0); \
2526 code1 = GET_CODE (xplus1); \
2529 if (code0 == REG && REG_OK_FOR_BASE_P (xplus0) \
2530 && code1 == CONST_INT && !SMALL_INT (xplus1)) \
2532 rtx int_reg = gen_reg_rtx (Pmode); \
2533 rtx ptr_reg = gen_reg_rtx (Pmode); \
2535 emit_move_insn (int_reg, \
2536 GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \
2538 emit_insn (gen_rtx (SET, VOIDmode, \
2540 gen_rtx (PLUS, Pmode, xplus0, int_reg))); \
2542 X = gen_rtx (PLUS, Pmode, ptr_reg, \
2543 GEN_INT (INTVAL (xplus1) & 0x7fff)); \
2548 if (TARGET_DEBUG_B_MODE) \
2549 GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \
2553 /* A C statement or compound statement with a conditional `goto
2554 LABEL;' executed if memory address X (an RTX) can have different
2555 meanings depending on the machine mode of the memory reference it
2558 Autoincrement and autodecrement addresses typically have
2559 mode-dependent effects because the amount of the increment or
2560 decrement is the size of the operand being addressed. Some
2561 machines have other mode-dependent addresses. Many RISC machines
2562 have no mode-dependent addresses.
2564 You may assume that ADDR is a valid address for the machine. */
2566 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
2569 /* Define this macro if references to a symbol must be treated
2570 differently depending on something about the variable or
2571 function named by the symbol (such as what section it is in).
2573 The macro definition, if any, is executed immediately after the
2574 rtl for DECL has been created and stored in `DECL_RTL (DECL)'.
2575 The value of the rtl will be a `mem' whose address is a
2578 The usual thing for this macro to do is to a flag in the
2579 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
2580 name string in the `symbol_ref' (if one bit is not enough
2583 The best way to modify the name string is by adding text to the
2584 beginning, with suitable punctuation to prevent any ambiguity.
2585 Allocate the new name in `saveable_obstack'. You will have to
2586 modify `ASM_OUTPUT_LABELREF' to remove and decode the added text
2587 and output the name accordingly.
2589 You can also check the information stored in the `symbol_ref' in
2590 the definition of `GO_IF_LEGITIMATE_ADDRESS' or
2591 `PRINT_OPERAND_ADDRESS'. */
2593 #define ENCODE_SECTION_INFO(DECL) \
2596 if (TARGET_EMBEDDED_PIC) \
2598 if (TREE_CODE (DECL) == VAR_DECL) \
2599 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2600 else if (TREE_CODE (DECL) == FUNCTION_DECL) \
2601 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 0; \
2602 else if (TREE_CODE (DECL) == STRING_CST \
2603 && ! flag_writable_strings) \
2604 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 0; \
2606 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
2609 else if (TARGET_GP_OPT && TREE_CODE (DECL) == VAR_DECL) \
2611 int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2613 if (size > 0 && size <= mips_section_threshold) \
2614 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2617 else if (HALF_PIC_P ()) \
2618 HALF_PIC_ENCODE (DECL); \
2623 /* Specify the machine mode that this machine uses
2624 for the index in the tablejump instruction. */
2625 #define CASE_VECTOR_MODE (TARGET_LONG64 ? DImode : SImode)
2627 /* Define this if the tablejump instruction expects the table
2628 to contain offsets from the address of the table.
2629 Do not define this if the table should contain absolute addresses. */
2630 /* #define CASE_VECTOR_PC_RELATIVE */
2632 /* Specify the tree operation to be used to convert reals to integers. */
2633 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2635 /* This is the kind of divide that is easiest to do in the general case. */
2636 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2638 /* Define this as 1 if `char' should by default be signed; else as 0. */
2639 #ifndef DEFAULT_SIGNED_CHAR
2640 #define DEFAULT_SIGNED_CHAR 1
2643 /* Max number of bytes we can move from memory to memory
2644 in one reasonably fast instruction. */
2645 #define MOVE_MAX (TARGET_64BIT ? 8 : 4)
2646 #define MAX_MOVE_MAX 8
2648 /* Define this macro as a C expression which is nonzero if
2649 accessing less than a word of memory (i.e. a `char' or a
2650 `short') is no faster than accessing a word of memory, i.e., if
2651 such access require more than one instruction or if there is no
2652 difference in cost between byte and (aligned) word loads.
2654 On RISC machines, it tends to generate better code to define
2655 this as 1, since it avoids making a QI or HI mode register. */
2656 #define SLOW_BYTE_ACCESS 1
2658 /* We assume that the store-condition-codes instructions store 0 for false
2659 and some other value for true. This is the value stored for true. */
2661 #define STORE_FLAG_VALUE 1
2663 /* Define this if zero-extension is slow (more than one real instruction). */
2664 #define SLOW_ZERO_EXTEND
2666 /* Define this to be nonzero if shift instructions ignore all but the low-order
2668 #define SHIFT_COUNT_TRUNCATED 1
2670 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2671 is done just by pretending it is already truncated. */
2672 /* In 64 bit mode, 32 bit instructions require that register values be properly
2673 sign-extended to 64 bits. As a result, a truncate is not a no-op if it
2674 converts a value >32 bits to a value <32 bits. */
2675 /* ??? This results in inefficient code for 64 bit to 32 conversions.
2676 Something needs to be done about this. Perhaps not use any 32 bit
2677 instructions? Perhaps use PROMOTE_MODE? */
2678 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) \
2679 (TARGET_64BIT ? ((INPREC) <= 32 || (OUTPREC) > 32) : 1)
2681 /* Define this macro to control use of the character `$' in
2682 identifier names. The value should be 0, 1, or 2. 0 means `$'
2683 is not allowed by default; 1 means it is allowed by default if
2684 `-traditional' is used; 2 means it is allowed by default provided
2685 `-ansi' is not used. 1 is the default; there is no need to
2686 define this macro in that case. */
2688 #ifndef DOLLARS_IN_IDENTIFIERS
2689 #define DOLLARS_IN_IDENTIFIERS 1
2692 /* Specify the machine mode that pointers have.
2693 After generation of rtl, the compiler makes no further distinction
2694 between pointers and any other objects of this machine mode. */
2696 #define Pmode (TARGET_LONG64 ? DImode : SImode)
2698 /* A function address in a call instruction
2699 is a word address (for indexing purposes)
2700 so give the MEM rtx a words's mode. */
2702 #define FUNCTION_MODE (TARGET_LONG64 ? DImode : SImode)
2704 /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
2705 memset, instead of the BSD functions bcopy and bzero. */
2707 #if defined(MIPS_SYSV) || defined(OSF_OS)
2708 #define TARGET_MEM_FUNCTIONS
2712 /* A part of a C `switch' statement that describes the relative
2713 costs of constant RTL expressions. It must contain `case'
2714 labels for expression codes `const_int', `const', `symbol_ref',
2715 `label_ref' and `const_double'. Each case must ultimately reach
2716 a `return' statement to return the relative cost of the use of
2717 that kind of constant value in an expression. The cost may
2718 depend on the precise value of the constant, which is available
2719 for examination in X.
2721 CODE is the expression code--redundant, since it can be obtained
2722 with `GET_CODE (X)'. */
2724 #define CONST_COSTS(X,CODE,OUTER_CODE) \
2726 /* Always return 0, since we don't have different sized \
2727 instructions, hence different costs according to Richard \
2732 return COSTS_N_INSNS (2); \
2736 rtx offset = const0_rtx; \
2737 rtx symref = eliminate_constant_term (XEXP (X, 0), &offset); \
2739 if (GET_CODE (symref) == LABEL_REF) \
2740 return COSTS_N_INSNS (2); \
2742 if (GET_CODE (symref) != SYMBOL_REF) \
2743 return COSTS_N_INSNS (4); \
2745 /* let's be paranoid.... */ \
2746 if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \
2747 return COSTS_N_INSNS (2); \
2749 return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \
2753 return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \
2755 case CONST_DOUBLE: \
2758 split_double (X, &high, &low); \
2759 return COSTS_N_INSNS ((high == CONST0_RTX (GET_MODE (high)) \
2760 || low == CONST0_RTX (GET_MODE (low))) \
2764 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2765 This can be used, for example, to indicate how costly a multiply
2766 instruction is. In writing this macro, you can use the construct
2767 `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
2769 This macro is optional; do not define it if the default cost
2770 assumptions are adequate for the target machine.
2772 If -mdebugd is used, change the multiply cost to 2, so multiply by
2773 a constant isn't converted to a series of shifts. This helps
2774 strength reduction, and also makes it easier to identify what the
2775 compiler is doing. */
2777 /* ??? Fix this to be right for the R8000. */
2778 #define RTX_COSTS(X,CODE,OUTER_CODE) \
2781 int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
2782 if (simple_memory_operand (X, GET_MODE (X))) \
2783 return COSTS_N_INSNS (num_words); \
2785 return COSTS_N_INSNS (2*num_words); \
2789 return COSTS_N_INSNS (6); \
2792 return COSTS_N_INSNS ((GET_MODE (X) == DImode && !TARGET_64BIT) ? 2 : 1); \
2797 if (GET_MODE (X) == DImode && !TARGET_64BIT) \
2798 return COSTS_N_INSNS (2); \
2800 return COSTS_N_INSNS (1); \
2805 if (GET_MODE (X) == DImode && !TARGET_64BIT) \
2806 return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 4 : 12); \
2808 return COSTS_N_INSNS (1); \
2812 enum machine_mode xmode = GET_MODE (X); \
2813 if (xmode == SFmode || xmode == DFmode) \
2814 return COSTS_N_INSNS (1); \
2816 return COSTS_N_INSNS (4); \
2822 enum machine_mode xmode = GET_MODE (X); \
2823 if (xmode == SFmode || xmode == DFmode) \
2825 if (mips_cpu == PROCESSOR_R3000) \
2826 return COSTS_N_INSNS (2); \
2827 else if (mips_cpu == PROCESSOR_R6000) \
2828 return COSTS_N_INSNS (3); \
2830 return COSTS_N_INSNS (6); \
2833 if (xmode == DImode && !TARGET_64BIT) \
2834 return COSTS_N_INSNS (4); \
2836 return COSTS_N_INSNS (1); \
2840 return COSTS_N_INSNS ((GET_MODE (X) == DImode && !TARGET_64BIT) ? 4 : 1); \
2844 enum machine_mode xmode = GET_MODE (X); \
2845 if (xmode == SFmode) \
2847 if (mips_cpu == PROCESSOR_R3000) \
2848 return COSTS_N_INSNS (4); \
2849 else if (mips_cpu == PROCESSOR_R6000) \
2850 return COSTS_N_INSNS (5); \
2852 return COSTS_N_INSNS (7); \
2855 if (xmode == DFmode) \
2857 if (mips_cpu == PROCESSOR_R3000) \
2858 return COSTS_N_INSNS (5); \
2859 else if (mips_cpu == PROCESSOR_R6000) \
2860 return COSTS_N_INSNS (6); \
2862 return COSTS_N_INSNS (8); \
2865 if (mips_cpu == PROCESSOR_R3000) \
2866 return COSTS_N_INSNS (12); \
2867 else if (mips_cpu == PROCESSOR_R6000) \
2868 return COSTS_N_INSNS (17); \
2870 return COSTS_N_INSNS (10); \
2876 enum machine_mode xmode = GET_MODE (X); \
2877 if (xmode == SFmode) \
2879 if (mips_cpu == PROCESSOR_R3000) \
2880 return COSTS_N_INSNS (12); \
2881 else if (mips_cpu == PROCESSOR_R6000) \
2882 return COSTS_N_INSNS (15); \
2884 return COSTS_N_INSNS (23); \
2887 if (xmode == DFmode) \
2889 if (mips_cpu == PROCESSOR_R3000) \
2890 return COSTS_N_INSNS (19); \
2891 else if (mips_cpu == PROCESSOR_R6000) \
2892 return COSTS_N_INSNS (16); \
2894 return COSTS_N_INSNS (36); \
2897 /* fall through */ \
2901 if (mips_cpu == PROCESSOR_R3000) \
2902 return COSTS_N_INSNS (35); \
2903 else if (mips_cpu == PROCESSOR_R6000) \
2904 return COSTS_N_INSNS (38); \
2906 return COSTS_N_INSNS (69);
2908 /* An expression giving the cost of an addressing mode that
2909 contains ADDRESS. If not defined, the cost is computed from the
2910 form of the ADDRESS expression and the `CONST_COSTS' values.
2912 For most CISC machines, the default cost is a good approximation
2913 of the true cost of the addressing mode. However, on RISC
2914 machines, all instructions normally have the same length and
2915 execution time. Hence all addresses will have equal costs.
2917 In cases where more than one form of an address is known, the
2918 form with the lowest cost will be used. If multiple forms have
2919 the same, lowest, cost, the one that is the most complex will be
2922 For example, suppose an address that is equal to the sum of a
2923 register and a constant is used twice in the same basic block.
2924 When this macro is not defined, the address will be computed in
2925 a register and memory references will be indirect through that
2926 register. On machines where the cost of the addressing mode
2927 containing the sum is no higher than that of a simple indirect
2928 reference, this will produce an additional instruction and
2929 possibly require an additional register. Proper specification
2930 of this macro eliminates this overhead for such machines.
2932 Similar use of this macro is made in strength reduction of loops.
2934 ADDRESS need not be valid as an address. In such a case, the
2935 cost is not relevant and can be any value; invalid addresses
2936 need not be assigned a different cost.
2938 On machines where an address involving more than one register is
2939 as cheap as an address computation involving only one register,
2940 defining `ADDRESS_COST' to reflect this can cause two registers
2941 to be live over a region of code where only one would have been
2942 if `ADDRESS_COST' were not defined in that manner. This effect
2943 should be considered in the definition of this macro.
2944 Equivalent costs should probably only be given to addresses with
2945 different numbers of registers on machines with lots of registers.
2947 This macro will normally either not be defined or be defined as
2950 #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR))
2952 /* A C expression for the cost of moving data from a register in
2953 class FROM to one in class TO. The classes are expressed using
2954 the enumeration values such as `GENERAL_REGS'. A value of 2 is
2955 the default; other values are interpreted relative to that.
2957 It is not required that the cost always equal 2 when FROM is the
2958 same as TO; on some machines it is expensive to move between
2959 registers if they are not general registers.
2961 If reload sees an insn consisting of a single `set' between two
2962 hard registers, and if `REGISTER_MOVE_COST' applied to their
2963 classes returns a value of 2, reload does not check to ensure
2964 that the constraints of the insn are met. Setting a cost of
2965 other than 2 will allow reload to verify that the constraints are
2966 met. You should do this if the `movM' pattern's constraints do
2967 not allow such copying. */
2969 #define REGISTER_MOVE_COST(FROM, TO) \
2970 ((FROM) == GR_REGS && (TO) == GR_REGS ? 2 \
2971 : (FROM) == FP_REGS && (TO) == FP_REGS ? 2 \
2972 : (FROM) == GR_REGS && (TO) == FP_REGS ? 4 \
2973 : (FROM) == FP_REGS && (TO) == GR_REGS ? 4 \
2974 : (((FROM) == HI_REG || (FROM) == LO_REG \
2975 || (FROM) == MD_REGS || (FROM) == HILO_REG) \
2976 && (TO) == GR_REGS) ? 6 \
2977 : (((TO) == HI_REG || (TO) == LO_REG \
2978 || (TO) == MD_REGS || (FROM) == HILO_REG) \
2979 && (FROM) == GR_REGS) ? 6 \
2982 /* ??? Fix this to be right for the R8000. */
2983 #define MEMORY_MOVE_COST(MODE) \
2984 ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 6 : 4)
2986 /* A C expression for the cost of a branch instruction. A value of
2987 1 is the default; other values are interpreted relative to that. */
2989 /* ??? Fix this to be right for the R8000. */
2990 #define BRANCH_COST \
2991 ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1)
2993 /* A C statement (sans semicolon) to update the integer variable COST
2994 based on the relationship between INSN that is dependent on
2995 DEP_INSN through the dependence LINK. The default is to make no
2996 adjustment to COST. On the MIPS, ignore the cost of anti- and
2997 output-dependencies. */
2999 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
3000 if (REG_NOTE_KIND (LINK) != 0) \
3001 (COST) = 0; /* Anti or output dependence. */
3003 /* Optionally define this if you have added predicates to
3004 `MACHINE.c'. This macro is called within an initializer of an
3005 array of structures. The first field in the structure is the
3006 name of a predicate and the second field is an array of rtl
3007 codes. For each predicate, list all rtl codes that can be in
3008 expressions matched by the predicate. The list should have a
3009 trailing comma. Here is an example of two entries in the list
3010 for a typical RISC machine:
3012 #define PREDICATE_CODES \
3013 {"gen_reg_rtx_operand", {SUBREG, REG}}, \
3014 {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
3016 Defining this macro does not affect the generated code (however,
3017 incorrect definitions that omit an rtl code that may be matched
3018 by the predicate can cause the compiler to malfunction).
3019 Instead, it allows the table built by `genrecog' to be more
3020 compact and efficient, thus speeding up the compiler. The most
3021 important predicates to include in the list specified by this
3022 macro are thoses used in the most insn patterns. */
3024 #define PREDICATE_CODES \
3025 {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
3026 {"arith_operand", { REG, CONST_INT, SUBREG }}, \
3027 {"arith32_operand", { REG, CONST_INT, SUBREG }}, \
3028 {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \
3029 {"small_int", { CONST_INT }}, \
3030 {"large_int", { CONST_INT }}, \
3031 {"mips_const_double_ok", { CONST_DOUBLE }}, \
3032 {"simple_memory_operand", { MEM, SUBREG }}, \
3033 {"equality_op", { EQ, NE }}, \
3034 {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
3036 {"pc_or_label_operand", { PC, LABEL_REF }}, \
3037 {"call_insn_operand", { MEM }}, \
3040 /* If defined, a C statement to be executed just prior to the
3041 output of assembler code for INSN, to modify the extracted
3042 operands so they will be output differently.
3044 Here the argument OPVEC is the vector containing the operands
3045 extracted from INSN, and NOPERANDS is the number of elements of
3046 the vector which contain meaningful data for this insn. The
3047 contents of this vector are what will be used to convert the
3048 insn template into assembler code, so you can change the
3049 assembler output by changing the contents of the vector.
3051 We use it to check if the current insn needs a nop in front of it
3052 because of load delays, and also to update the delay slot
3055 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
3056 final_prescan_insn (INSN, OPVEC, NOPERANDS)
3059 /* Tell final.c how to eliminate redundant test instructions.
3060 Here we define machine-dependent flags and fields in cc_status
3061 (see `conditions.h'). */
3063 /* A list of names to be used for additional modes for condition code
3064 values in registers. These names are added to `enum machine_mode'
3065 and all have class `MODE_CC'. By convention, they should start
3066 with `CC' and end with `mode'.
3068 You should only define this macro if your machine does not use
3069 `cc0' and only if additional modes are required.
3071 On the MIPS, we use CC_FPmode for all floating point except for not
3072 equal, CC_REV_FPmode for not equal (to reverse the sense of the
3073 jump), CC_EQmode for integer equality/inequality comparisons,
3074 CC_0mode for comparisons against 0, and CCmode for other integer
3077 #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode
3079 /* A list of C strings giving the names for the modes listed in
3080 `EXTRA_CC_MODES'. */
3082 #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP"
3084 /* Returns a mode from class `MODE_CC' to be used when comparison
3085 operation code OP is applied to rtx X. */
3087 #define SELECT_CC_MODE(OP, X, Y) \
3088 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
3090 : ((OP == NE) ? CC_REV_FPmode : CC_FPmode))
3093 /* Control the assembler format that we output. */
3095 /* Output at beginning of assembler file.
3096 If we are optimizing to use the global pointer, create a temporary
3097 file to hold all of the text stuff, and write it out to the end.
3098 This is needed because the MIPS assembler is evidently one pass,
3099 and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata
3100 declaration when the code is processed, it generates a two
3101 instruction sequence. */
3103 #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM)
3105 /* Output to assembler file text saying following lines
3106 may contain character constants, extra white space, comments, etc. */
3108 #define ASM_APP_ON " #APP\n"
3110 /* Output to assembler file text saying following lines
3111 no longer contain unusual constructs. */
3113 #define ASM_APP_OFF " #NO_APP\n"
3115 /* How to refer to registers in assembler output.
3116 This sequence is indexed by compiler's hard-register-number (see above).
3118 In order to support the two different conventions for register names,
3119 we use the name of a table set up in mips.c, which is overwritten
3120 if -mrnames is used. */
3122 #define REGISTER_NAMES \
3124 &mips_reg_names[ 0][0], \
3125 &mips_reg_names[ 1][0], \
3126 &mips_reg_names[ 2][0], \
3127 &mips_reg_names[ 3][0], \
3128 &mips_reg_names[ 4][0], \
3129 &mips_reg_names[ 5][0], \
3130 &mips_reg_names[ 6][0], \
3131 &mips_reg_names[ 7][0], \
3132 &mips_reg_names[ 8][0], \
3133 &mips_reg_names[ 9][0], \
3134 &mips_reg_names[10][0], \
3135 &mips_reg_names[11][0], \
3136 &mips_reg_names[12][0], \
3137 &mips_reg_names[13][0], \
3138 &mips_reg_names[14][0], \
3139 &mips_reg_names[15][0], \
3140 &mips_reg_names[16][0], \
3141 &mips_reg_names[17][0], \
3142 &mips_reg_names[18][0], \
3143 &mips_reg_names[19][0], \
3144 &mips_reg_names[20][0], \
3145 &mips_reg_names[21][0], \
3146 &mips_reg_names[22][0], \
3147 &mips_reg_names[23][0], \
3148 &mips_reg_names[24][0], \
3149 &mips_reg_names[25][0], \
3150 &mips_reg_names[26][0], \
3151 &mips_reg_names[27][0], \
3152 &mips_reg_names[28][0], \
3153 &mips_reg_names[29][0], \
3154 &mips_reg_names[30][0], \
3155 &mips_reg_names[31][0], \
3156 &mips_reg_names[32][0], \
3157 &mips_reg_names[33][0], \
3158 &mips_reg_names[34][0], \
3159 &mips_reg_names[35][0], \
3160 &mips_reg_names[36][0], \
3161 &mips_reg_names[37][0], \
3162 &mips_reg_names[38][0], \
3163 &mips_reg_names[39][0], \
3164 &mips_reg_names[40][0], \
3165 &mips_reg_names[41][0], \
3166 &mips_reg_names[42][0], \
3167 &mips_reg_names[43][0], \
3168 &mips_reg_names[44][0], \
3169 &mips_reg_names[45][0], \
3170 &mips_reg_names[46][0], \
3171 &mips_reg_names[47][0], \
3172 &mips_reg_names[48][0], \
3173 &mips_reg_names[49][0], \
3174 &mips_reg_names[50][0], \
3175 &mips_reg_names[51][0], \
3176 &mips_reg_names[52][0], \
3177 &mips_reg_names[53][0], \
3178 &mips_reg_names[54][0], \
3179 &mips_reg_names[55][0], \
3180 &mips_reg_names[56][0], \
3181 &mips_reg_names[57][0], \
3182 &mips_reg_names[58][0], \
3183 &mips_reg_names[59][0], \
3184 &mips_reg_names[60][0], \
3185 &mips_reg_names[61][0], \
3186 &mips_reg_names[62][0], \
3187 &mips_reg_names[63][0], \
3188 &mips_reg_names[64][0], \
3189 &mips_reg_names[65][0], \
3190 &mips_reg_names[66][0], \
3191 &mips_reg_names[67][0], \
3192 &mips_reg_names[68][0], \
3195 /* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c.
3196 So define this for it. */
3197 #define DEBUG_REGISTER_NAMES \
3199 "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
3200 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
3201 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
3202 "t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
3203 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \
3204 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
3205 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \
3206 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \
3207 "hi", "lo", "accum","$fcr31","$rap" \
3210 /* If defined, a C initializer for an array of structures
3211 containing a name and a register number. This macro defines
3212 additional names for hard registers, thus allowing the `asm'
3213 option in declarations to refer to registers using alternate
3216 We define both names for the integer registers here. */
3218 #define ADDITIONAL_REGISTER_NAMES \
3220 { "$0", 0 + GP_REG_FIRST }, \
3221 { "$1", 1 + GP_REG_FIRST }, \
3222 { "$2", 2 + GP_REG_FIRST }, \
3223 { "$3", 3 + GP_REG_FIRST }, \
3224 { "$4", 4 + GP_REG_FIRST }, \
3225 { "$5", 5 + GP_REG_FIRST }, \
3226 { "$6", 6 + GP_REG_FIRST }, \
3227 { "$7", 7 + GP_REG_FIRST }, \
3228 { "$8", 8 + GP_REG_FIRST }, \
3229 { "$9", 9 + GP_REG_FIRST }, \
3230 { "$10", 10 + GP_REG_FIRST }, \
3231 { "$11", 11 + GP_REG_FIRST }, \
3232 { "$12", 12 + GP_REG_FIRST }, \
3233 { "$13", 13 + GP_REG_FIRST }, \
3234 { "$14", 14 + GP_REG_FIRST }, \
3235 { "$15", 15 + GP_REG_FIRST }, \
3236 { "$16", 16 + GP_REG_FIRST }, \
3237 { "$17", 17 + GP_REG_FIRST }, \
3238 { "$18", 18 + GP_REG_FIRST }, \
3239 { "$19", 19 + GP_REG_FIRST }, \
3240 { "$20", 20 + GP_REG_FIRST }, \
3241 { "$21", 21 + GP_REG_FIRST }, \
3242 { "$22", 22 + GP_REG_FIRST }, \
3243 { "$23", 23 + GP_REG_FIRST }, \
3244 { "$24", 24 + GP_REG_FIRST }, \
3245 { "$25", 25 + GP_REG_FIRST }, \
3246 { "$26", 26 + GP_REG_FIRST }, \
3247 { "$27", 27 + GP_REG_FIRST }, \
3248 { "$28", 28 + GP_REG_FIRST }, \
3249 { "$29", 29 + GP_REG_FIRST }, \
3250 { "$30", 30 + GP_REG_FIRST }, \
3251 { "$31", 31 + GP_REG_FIRST }, \
3252 { "$sp", 29 + GP_REG_FIRST }, \
3253 { "$fp", 30 + GP_REG_FIRST }, \
3254 { "at", 1 + GP_REG_FIRST }, \
3255 { "v0", 2 + GP_REG_FIRST }, \
3256 { "v1", 3 + GP_REG_FIRST }, \
3257 { "a0", 4 + GP_REG_FIRST }, \
3258 { "a1", 5 + GP_REG_FIRST }, \
3259 { "a2", 6 + GP_REG_FIRST }, \
3260 { "a3", 7 + GP_REG_FIRST }, \
3261 { "t0", 8 + GP_REG_FIRST }, \
3262 { "t1", 9 + GP_REG_FIRST }, \
3263 { "t2", 10 + GP_REG_FIRST }, \
3264 { "t3", 11 + GP_REG_FIRST }, \
3265 { "t4", 12 + GP_REG_FIRST }, \
3266 { "t5", 13 + GP_REG_FIRST }, \
3267 { "t6", 14 + GP_REG_FIRST }, \
3268 { "t7", 15 + GP_REG_FIRST }, \
3269 { "s0", 16 + GP_REG_FIRST }, \
3270 { "s1", 17 + GP_REG_FIRST }, \
3271 { "s2", 18 + GP_REG_FIRST }, \
3272 { "s3", 19 + GP_REG_FIRST }, \
3273 { "s4", 20 + GP_REG_FIRST }, \
3274 { "s5", 21 + GP_REG_FIRST }, \
3275 { "s6", 22 + GP_REG_FIRST }, \
3276 { "s7", 23 + GP_REG_FIRST }, \
3277 { "t8", 24 + GP_REG_FIRST }, \
3278 { "t9", 25 + GP_REG_FIRST }, \
3279 { "k0", 26 + GP_REG_FIRST }, \
3280 { "k1", 27 + GP_REG_FIRST }, \
3281 { "gp", 28 + GP_REG_FIRST }, \
3282 { "sp", 29 + GP_REG_FIRST }, \
3283 { "fp", 30 + GP_REG_FIRST }, \
3284 { "ra", 31 + GP_REG_FIRST }, \
3285 { "$sp", 29 + GP_REG_FIRST }, \
3286 { "$fp", 30 + GP_REG_FIRST }, \
3287 { "cc", FPSW_REGNUM }, \
3290 /* Define results of standard character escape sequences. */
3291 #define TARGET_BELL 007
3292 #define TARGET_BS 010
3293 #define TARGET_TAB 011
3294 #define TARGET_NEWLINE 012
3295 #define TARGET_VT 013
3296 #define TARGET_FF 014
3297 #define TARGET_CR 015
3299 /* A C compound statement to output to stdio stream STREAM the
3300 assembler syntax for an instruction operand X. X is an RTL
3303 CODE is a value that can be used to specify one of several ways
3304 of printing the operand. It is used when identical operands
3305 must be printed differently depending on the context. CODE
3306 comes from the `%' specification that was used to request
3307 printing of the operand. If the specification was just `%DIGIT'
3308 then CODE is 0; if the specification was `%LTR DIGIT' then CODE
3309 is the ASCII code for LTR.
3311 If X is a register, this macro should print the register's name.
3312 The names can be found in an array `reg_names' whose type is
3313 `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
3315 When the machine description has a specification `%PUNCT' (a `%'
3316 followed by a punctuation character), this macro is called with
3317 a null pointer for X and the punctuation character for CODE.
3319 See mips.c for the MIPS specific codes. */
3321 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
3323 /* A C expression which evaluates to true if CODE is a valid
3324 punctuation character for use in the `PRINT_OPERAND' macro. If
3325 `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
3326 punctuation characters (except for the standard one, `%') are
3327 used in this way. */
3329 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE]
3331 /* A C compound statement to output to stdio stream STREAM the
3332 assembler syntax for an instruction operand that is a memory
3333 reference whose address is ADDR. ADDR is an RTL expression.
3335 On some machines, the syntax for a symbolic address depends on
3336 the section that the address refers to. On these machines,
3337 define the macro `ENCODE_SECTION_INFO' to store the information
3338 into the `symbol_ref', and then check for it here. */
3340 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
3343 /* A C statement, to be executed after all slot-filler instructions
3344 have been output. If necessary, call `dbr_sequence_length' to
3345 determine the number of slots filled in a sequence (zero if not
3346 currently outputting a sequence), to decide how many no-ops to
3347 output, or whatever.
3349 Don't define this macro if it has nothing to do, but it is
3350 helpful in reading assembly output if the extent of the delay
3351 sequence is made explicit (e.g. with white space).
3353 Note that output routines for instructions with delay slots must
3354 be prepared to deal with not being output as part of a sequence
3355 (i.e. when the scheduling pass is not run, or when no slot
3356 fillers could be found.) The variable `final_sequence' is null
3357 when not processing a sequence, otherwise it contains the
3358 `sequence' rtx being output. */
3360 #define DBR_OUTPUT_SEQEND(STREAM) \
3363 if (set_nomacro > 0 && --set_nomacro == 0) \
3364 fputs ("\t.set\tmacro\n", STREAM); \
3366 if (set_noreorder > 0 && --set_noreorder == 0) \
3367 fputs ("\t.set\treorder\n", STREAM); \
3369 dslots_jump_filled++; \
3370 fputs ("\n", STREAM); \
3375 /* How to tell the debugger about changes of source files. Note, the
3376 mips ECOFF format cannot deal with changes of files inside of
3377 functions, which means the output of parser generators like bison
3378 is generally not debuggable without using the -l switch. Lose,
3379 lose, lose. Silicon graphics seems to want all .file's hardwired
3382 #ifndef SET_FILE_NUMBER
3383 #define SET_FILE_NUMBER() ++num_source_filenames
3386 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
3387 mips_output_filename (STREAM, NAME)
3389 /* This is defined so that it can be overridden in iris6.h. */
3390 #define ASM_OUTPUT_FILENAME(STREAM, NUM_SOURCE_FILENAMES, NAME) \
3393 fprintf (STREAM, "\t.file\t%d ", NUM_SOURCE_FILENAMES); \
3394 output_quoted_string (STREAM, NAME); \
3395 fputs ("\n", STREAM); \
3399 /* This is how to output a note the debugger telling it the line number
3400 to which the following sequence of instructions corresponds.
3401 Silicon graphics puts a label after each .loc. */
3403 #ifndef LABEL_AFTER_LOC
3404 #define LABEL_AFTER_LOC(STREAM)
3407 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
3408 mips_output_lineno (STREAM, LINE)
3410 /* The MIPS implementation uses some labels for it's own purpose. The
3411 following lists what labels are created, and are all formed by the
3412 pattern $L[a-z].*. The machine independent portion of GCC creates
3413 labels matching: $L[A-Z][0-9]+ and $L[0-9]+.
3415 LM[0-9]+ Silicon Graphics/ECOFF stabs label before each stmt.
3416 $Lb[0-9]+ Begin blocks for MIPS debug support
3417 $Lc[0-9]+ Label for use in s<xx> operation.
3418 $Le[0-9]+ End blocks for MIPS debug support
3419 $Lp\..+ Half-pic labels. */
3421 /* This is how to output the definition of a user-level label named NAME,
3422 such as the label on a static function or variable NAME.
3424 If we are optimizing the gp, remember that this label has been put
3425 out, so we know not to emit an .extern for it in mips_asm_file_end.
3426 We use one of the common bits in the IDENTIFIER tree node for this,
3427 since those bits seem to be unused, and we don't have any method
3428 of getting the decl nodes from the name. */
3430 #define ASM_OUTPUT_LABEL(STREAM,NAME) \
3432 assemble_name (STREAM, NAME); \
3433 fputs (":\n", STREAM); \
3437 /* A C statement (sans semicolon) to output to the stdio stream
3438 STREAM any text necessary for declaring the name NAME of an
3439 initialized variable which is being defined. This macro must
3440 output the label definition (perhaps using `ASM_OUTPUT_LABEL').
3441 The argument DECL is the `VAR_DECL' tree node representing the
3444 If this macro is not defined, then the variable name is defined
3445 in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */
3447 #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
3450 mips_declare_object (STREAM, NAME, "", ":\n", 0); \
3451 HALF_PIC_DECLARE (NAME); \
3456 /* This is how to output a command to make the user-level label named NAME
3457 defined for reference from other files. */
3459 #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
3461 fputs ("\t.globl\t", STREAM); \
3462 assemble_name (STREAM, NAME); \
3463 fputs ("\n", STREAM); \
3466 /* This says how to define a global common symbol. */
3468 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
3469 mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (SIZE))
3471 /* This says how to define a local common symbol (ie, not visible to
3474 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
3475 mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (SIZE))
3478 /* This says how to output an external. It would be possible not to
3479 output anything and let undefined symbol become external. However
3480 the assembler uses length information on externals to allocate in
3481 data/sdata bss/sbss, thereby saving exec time. */
3483 #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \
3484 mips_output_external(STREAM,DECL,NAME)
3486 /* This says what to print at the end of the assembly file */
3487 #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM)
3490 /* This is how to declare a function name. The actual work of
3491 emitting the label is moved to function_prologue, so that we can
3492 get the line number correctly emitted before the .ent directive,
3493 and after any .file directives.
3495 Also, switch files if we are optimizing the global pointer. */
3497 #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
3499 extern FILE *asm_out_text_file; \
3500 if (TARGET_GP_OPT) \
3502 STREAM = asm_out_text_file; \
3503 /* ??? text_section gets called too soon. If the previous \
3504 function is in a special section and we're not, we have \
3505 to switch back to the text section. We can't call \
3506 text_section again as gcc thinks we're already there. */ \
3507 /* ??? See varasm.c. There are other things that get output \
3508 too early, like alignment (before we've switched STREAM). */ \
3509 if (DECL_SECTION_NAME (DECL) == NULL_TREE) \
3510 fprintf (STREAM, "%s\n", TEXT_SECTION_ASM_OP); \
3513 HALF_PIC_DECLARE (NAME); \
3516 /* This is how to output a reference to a user-level label named NAME.
3517 `assemble_name' uses this. */
3519 #define ASM_OUTPUT_LABELREF(STREAM,NAME) \
3520 fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, NAME)
3522 /* This is how to output an internal numbered label where
3523 PREFIX is the class of label and NUM is the number within the class. */
3525 #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \
3526 fprintf (STREAM, "%s%s%d:\n", LOCAL_LABEL_PREFIX, PREFIX, NUM)
3528 /* This is how to store into the string LABEL
3529 the symbol_ref name of an internal numbered label where
3530 PREFIX is the class of label and NUM is the number within the class.
3531 This is suitable for output with `assemble_name'. */
3533 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
3534 sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
3536 /* This is how to output an assembler line defining a `double' constant. */
3538 #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \
3539 mips_output_double (STREAM, VALUE)
3542 /* This is how to output an assembler line defining a `float' constant. */
3544 #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \
3545 mips_output_float (STREAM, VALUE)
3548 /* This is how to output an assembler line defining an `int' constant. */
3550 #define ASM_OUTPUT_INT(STREAM,VALUE) \
3552 fprintf (STREAM, "\t.word\t"); \
3553 output_addr_const (STREAM, (VALUE)); \
3554 fprintf (STREAM, "\n"); \
3557 /* Likewise for 64 bit, `char' and `short' constants. */
3559 #define ASM_OUTPUT_DOUBLE_INT(STREAM,VALUE) \
3563 fprintf (STREAM, "\t.dword\t"); \
3564 if (HOST_BITS_PER_WIDE_INT < 64 || GET_CODE (VALUE) != CONST_INT) \
3565 /* We can't use 'X' for negative numbers, because then we won't \
3566 get the right value for the upper 32 bits. */ \
3567 output_addr_const (STREAM, VALUE); \
3569 /* We must use 'X', because otherwise LONG_MIN will print as \
3570 a number that the Irix 6 assembler won't accept. */ \
3571 print_operand (STREAM, VALUE, 'X'); \
3572 fprintf (STREAM, "\n"); \
3576 assemble_integer (operand_subword ((VALUE), 0, 0, DImode), \
3577 UNITS_PER_WORD, 1); \
3578 assemble_integer (operand_subword ((VALUE), 1, 0, DImode), \
3579 UNITS_PER_WORD, 1); \
3583 #define ASM_OUTPUT_SHORT(STREAM,VALUE) \
3585 fprintf (STREAM, "\t.half\t"); \
3586 output_addr_const (STREAM, (VALUE)); \
3587 fprintf (STREAM, "\n"); \
3590 #define ASM_OUTPUT_CHAR(STREAM,VALUE) \
3592 fprintf (STREAM, "\t.byte\t"); \
3593 output_addr_const (STREAM, (VALUE)); \
3594 fprintf (STREAM, "\n"); \
3597 /* This is how to output an assembler line for a numeric constant byte. */
3599 #define ASM_OUTPUT_BYTE(STREAM,VALUE) \
3600 fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE))
3602 /* This is how to output an element of a case-vector that is absolute. */
3604 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
3605 fprintf (STREAM, "\t%s\t%sL%d\n", \
3606 TARGET_LONG64 ? ".dword" : ".word", \
3607 LOCAL_LABEL_PREFIX, \
3610 /* This is how to output an element of a case-vector that is relative.
3611 This is used for pc-relative code (e.g. when TARGET_ABICALLS or
3612 TARGET_EMBEDDED_PIC). */
3614 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \
3616 if (TARGET_EMBEDDED_PIC) \
3617 fprintf (STREAM, "\t%s\t%sL%d-%sLS%d\n", \
3618 TARGET_LONG64 ? ".dword" : ".word", \
3619 LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \
3620 else if (mips_abi == ABI_32) \
3621 fprintf (STREAM, "\t%s\t%sL%d\n", \
3622 TARGET_LONG64 ? ".gpdword" : ".gpword", \
3623 LOCAL_LABEL_PREFIX, VALUE); \
3625 fprintf (STREAM, "\t%s\t%sL%d\n", \
3626 TARGET_LONG64 ? ".dword" : ".word", \
3627 LOCAL_LABEL_PREFIX, VALUE); \
3630 /* When generating embedded PIC code we want to put the jump table in
3631 the .text section. In all other cases, we want to put the jump
3632 table in the .rdata section. Unfortunately, we can't use
3633 JUMP_TABLES_IN_TEXT_SECTION, because it is not conditional.
3634 Instead, we use ASM_OUTPUT_CASE_LABEL to switch back to the .text
3635 section if appropriate. */
3636 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, INSN) \
3638 if (TARGET_EMBEDDED_PIC) \
3640 ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
3643 /* This is how to output an assembler line
3644 that says to advance the location counter
3645 to a multiple of 2**LOG bytes. */
3647 #define ASM_OUTPUT_ALIGN(STREAM,LOG) \
3649 int mask = (1 << (LOG)) - 1; \
3650 fprintf (STREAM, "\t.align\t%d\n", (LOG)); \
3653 /* This is how to output an assembler line to to advance the location
3654 counter by SIZE bytes. */
3656 #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
3657 fprintf (STREAM, "\t.space\t%u\n", (SIZE))
3659 /* This is how to output a string. */
3660 #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \
3662 register int i, c, len = (LEN), cur_pos = 17; \
3663 register unsigned char *string = (unsigned char *)(STRING); \
3664 fprintf ((STREAM), "\t.ascii\t\""); \
3665 for (i = 0; i < len; i++) \
3667 register int c = string[i]; \
3673 putc ('\\', (STREAM)); \
3674 putc (c, (STREAM)); \
3678 case TARGET_NEWLINE: \
3679 fputs ("\\n", (STREAM)); \
3681 && (((c = string[i+1]) >= '\040' && c <= '~') \
3682 || c == TARGET_TAB)) \
3683 cur_pos = 32767; /* break right here */ \
3689 fputs ("\\t", (STREAM)); \
3694 fputs ("\\f", (STREAM)); \
3699 fputs ("\\b", (STREAM)); \
3704 fputs ("\\r", (STREAM)); \
3709 if (c >= ' ' && c < 0177) \
3711 putc (c, (STREAM)); \
3716 fprintf ((STREAM), "\\%03o", c); \
3721 if (cur_pos > 72 && i+1 < len) \
3724 fprintf ((STREAM), "\"\n\t.ascii\t\""); \
3727 fprintf ((STREAM), "\"\n"); \
3730 /* Handle certain cpp directives used in header files on sysV. */
3731 #define SCCS_DIRECTIVE
3733 /* Output #ident as a in the read-only data section. */
3734 #define ASM_OUTPUT_IDENT(FILE, STRING) \
3737 int size = strlen (p) + 1; \
3739 assemble_string (p, size); \
3742 /* Default to -G 8 */
3743 #ifndef MIPS_DEFAULT_GVALUE
3744 #define MIPS_DEFAULT_GVALUE 8
3747 /* Define the strings to put out for each section in the object file. */
3748 #define TEXT_SECTION_ASM_OP "\t.text" /* instructions */
3749 #define DATA_SECTION_ASM_OP "\t.data" /* large data */
3750 #define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */
3751 #define RDATA_SECTION_ASM_OP "\t.rdata" /* read-only data */
3752 #define READONLY_DATA_SECTION rdata_section
3753 #define SMALL_DATA_SECTION sdata_section
3755 /* What other sections we support other than the normal .data/.text. */
3757 #define EXTRA_SECTIONS in_sdata, in_rdata
3759 /* Define the additional functions to select our additional sections. */
3761 /* on the MIPS it is not a good idea to put constants in the text
3762 section, since this defeats the sdata/data mechanism. This is
3763 especially true when -O is used. In this case an effort is made to
3764 address with faster (gp) register relative addressing, which can
3765 only get at sdata and sbss items (there is no stext !!) However,
3766 if the constant is too large for sdata, and it's readonly, it
3767 will go into the .rdata section. */
3769 #define EXTRA_SECTION_FUNCTIONS \
3773 if (in_section != in_sdata) \
3775 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
3776 in_section = in_sdata; \
3783 if (in_section != in_rdata) \
3785 fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \
3786 in_section = in_rdata; \
3790 /* Given a decl node or constant node, choose the section to output it in
3791 and select that section. */
3793 #define SELECT_RTX_SECTION(MODE,RTX) mips_select_rtx_section (MODE, RTX)
3795 #define SELECT_SECTION(DECL, RELOC) mips_select_section (DECL, RELOC)
3798 /* Store in OUTPUT a string (made with alloca) containing
3799 an assembler-name for a local static variable named NAME.
3800 LABELNO is an integer which is different for each call. */
3802 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
3803 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
3804 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
3806 #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
3809 fprintf (STREAM, "\t%s\t%s,%s,8\n\t%s\t%s,0(%s)\n", \
3810 TARGET_64BIT ? "dsubu" : "subu", \
3811 reg_names[STACK_POINTER_REGNUM], \
3812 reg_names[STACK_POINTER_REGNUM], \
3813 TARGET_64BIT ? "sd" : "sw", \
3815 reg_names[STACK_POINTER_REGNUM]); \
3819 #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
3822 if (! set_noreorder) \
3823 fprintf (STREAM, "\t.set\tnoreorder\n"); \
3825 dslots_load_total++; \
3826 dslots_load_filled++; \
3827 fprintf (STREAM, "\t%s\t%s,0(%s)\n\t%s\t%s,%s,8\n", \
3828 TARGET_64BIT ? "ld" : "lw", \
3830 reg_names[STACK_POINTER_REGNUM], \
3831 TARGET_64BIT ? "daddu" : "addu", \
3832 reg_names[STACK_POINTER_REGNUM], \
3833 reg_names[STACK_POINTER_REGNUM]); \
3835 if (! set_noreorder) \
3836 fprintf (STREAM, "\t.set\treorder\n"); \
3840 /* Define the parentheses used to group arithmetic operations
3841 in assembler code. */
3843 #define ASM_OPEN_PAREN "("
3844 #define ASM_CLOSE_PAREN ")"
3846 /* How to start an assembler comment.
3847 The leading space is important (the mips native assembler requires it). */
3848 #ifndef ASM_COMMENT_START
3849 #define ASM_COMMENT_START " #"
3853 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
3854 and mips-tdump.c to print them out.
3856 These must match the corresponding definitions in gdb/mipsread.c.
3857 Unfortunately, gcc and gdb do not currently share any directories. */
3859 #define CODE_MASK 0x8F300
3860 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
3861 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
3862 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
3865 /* Default definitions for size_t and ptrdiff_t. */
3868 #define NO_BUILTIN_SIZE_TYPE
3869 #define SIZE_TYPE (TARGET_LONG64 ? "long unsigned int" : "unsigned int")
3872 #ifndef PTRDIFF_TYPE
3873 #define NO_BUILTIN_PTRDIFF_TYPE
3874 #define PTRDIFF_TYPE (TARGET_LONG64 ? "long int" : "int")
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