gcc/config/ip2k/ip2k.h

   1 /* Definitions of target machine for GCC,
   2    For Ubicom IP2022 Communications Controller
   3
   4    Copyright (C) 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
   5    Contributed by Red Hat, Inc and Ubicom, Inc.
   6
   7 This file is part of GCC.
   8
   9 GCC is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 GCC is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GCC; see the file COPYING.  If not, write to
  21 the Free Software Foundation, 59 Temple Place - Suite 330,
  22 Boston, MA 02111-1307, USA.  */
  23
  24 \f
  25 #undef ASM_SPEC /* We have a GAS assembler.  */
  26
  27 #define TARGET_CPU_CPP_BUILTINS()               \
  28   do                                            \
  29     {                                           \
  30       builtin_define_std ("IP2K");              \
  31       builtin_define ("_DOUBLE_IS_32BITS");     \
  32       builtin_define ("_BUFSIZ=512");           \
  33       builtin_define ("__FILENAME_MAX__=128");  \
  34     }                                           \
  35   while (0)
  36
  37 /* This declaration should be present.  */
  38 extern int target_flags;
  39
  40 #define TARGET_SWITCHES {{"",0, NULL}}
  41
  42 #define TARGET_VERSION fprintf (stderr, " (ip2k, GNU assembler syntax)")
  43
  44 /* Caller-saves is not a win for the IP2K.  Pretty much anywhere that
  45    a register is permitted allows SP-relative addresses too.
  46
  47    This machine doesn't have PIC addressing modes, so disable that also.  */
  48
  49 #define OVERRIDE_OPTIONS        \
  50     do {                        \
  51         flag_caller_saves = 0;  \
  52         flag_pic = 0;           \
  53     } while (0)
  54
  55 /* Put each function in its own section so that PAGE-instruction
  56    relaxation can do its best.  */
  57 #define OPTIMIZATION_OPTIONS(LEVEL, SIZEFLAG)   \
  58     do {                                        \
  59         if ((LEVEL) || (SIZEFLAG))              \
  60             flag_function_sections = 1; \
  61     } while (0)
  62
  63 #define BITS_BIG_ENDIAN 0
  64 #define BYTES_BIG_ENDIAN 1
  65 #define WORDS_BIG_ENDIAN 1
  66 #define BITS_PER_WORD 8
  67 #define UNITS_PER_WORD (BITS_PER_WORD / BITS_PER_UNIT)
  68
  69 /* Width in bits of a pointer.
  70    See also the macro `Pmode' defined below.  */
  71 #define POINTER_SIZE 16
  72
  73 /* Maximum sized of reasonable data type DImode or Dfmode ...  */
  74 #define MAX_FIXED_MODE_SIZE 64
  75
  76 #define PARM_BOUNDARY 8
  77 #define FUNCTION_BOUNDARY 16
  78 #define EMPTY_FIELD_BOUNDARY 8
  79 #define BIGGEST_ALIGNMENT 8
  80
  81 #define STRICT_ALIGNMENT 0
  82
  83 #define PCC_BITFIELD_TYPE_MATTERS 1
  84
  85 #undef INT_TYPE_SIZE
  86 #define INT_TYPE_SIZE 16
  87
  88 #undef SHORT_TYPE_SIZE
  89 #define SHORT_TYPE_SIZE 16
  90
  91 #undef LONG_TYPE_SIZE
  92 #define LONG_TYPE_SIZE 32
  93
  94 #undef LONG_LONG_TYPE_SIZE
  95 #define LONG_LONG_TYPE_SIZE     64
  96
  97 #undef CHAR_TYPE_SIZE
  98 #define  CHAR_TYPE_SIZE 8
  99
 100 #undef FLOAT_TYPE_SIZE
 101 #define FLOAT_TYPE_SIZE 32
 102
 103 #undef DOUBLE_TYPE_SIZE
 104 #define DOUBLE_TYPE_SIZE 32
 105
 106 #undef LONG_DOUBLE_TYPE_SIZE
 107 #define LONG_DOUBLE_TYPE_SIZE   32
 108
 109 #define DEFAULT_SIGNED_CHAR 1
 110
 111 #define SIZE_TYPE "unsigned int"
 112
 113 #define PTRDIFF_TYPE "int"
 114
 115 #undef WCHAR_TYPE
 116 #define WCHAR_TYPE "int"
 117 #undef WCHAR_TYPE_SIZE
 118 #define WCHAR_TYPE_SIZE 16
 119
 120 #define HARD_REG_SIZE           (UNITS_PER_WORD)
 121 /* Standard register usage.
 122
 123    for the IP2K, we are going to have a LOT of registers, but only some of them
 124    are named.  */
 125
 126 #define FIRST_PSEUDO_REGISTER (0x104) /* Skip over physical regs, VFP, AP.  */
 127
 128 #define REG_IP          0x4
 129 #define REG_IPH         REG_IP
 130 #define REG_IPL         0x5
 131
 132 #define REG_SP          0x6
 133 #define REG_SPH         REG_SP
 134 #define REG_SPL         0x7
 135
 136 #define REG_PCH         0x8
 137 #define REG_PCL         0x9
 138
 139 #define REG_W           0xa
 140 #define REG_STATUS      0xb
 141
 142 #define REG_DP          0xc
 143 #define REG_DPH         REG_DP
 144 #define REG_DPL         0xd
 145
 146 #define REG_MULH        0xf
 147
 148 #define REG_CALLH       0x7e            /* Call-stack readout.  */
 149 #define REG_CALLL       0x7f
 150
 151
 152 #define REG_RESULT      0x80    /* Result register (upto 8 bytes).  */
 153 #define REG_FP          0xfd    /* 2 bytes for FRAME chain  */
 154
 155 #define REG_ZERO        0xff    /* Initialized to zero by runtime.  */
 156
 157 #define REG_VFP         0x100   /* Virtual frame pointer.  */
 158 #define REG_AP          0x102   /* Virtual arg pointer.  */
 159
 160 /* Status register bits.  */
 161 #define Z_FLAG  0x2
 162 #define DC_FLAG 0x1
 163 #define C_FLAG  0x0
 164
 165 #define FIXED_REGISTERS {\
 166 1,1,1,1,0,0,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
 167 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
 168 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
 169 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
 170 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,/*r128..r159*/\
 171 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
 172 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
 173 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
 174 1,1,1,1}
 175
 176 #define CALL_USED_REGISTERS {                   \
 177 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
 178 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
 179 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
 180 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
 181 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r128..r159*/\
 182 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
 183 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
 184 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
 185 1,1,1,1}
 186
 187 #define NON_SAVING_SETJMP 0
 188
 189 #define REG_ALLOC_ORDER {                       \
 190     0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f,    \
 191     0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,    \
 192     0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f,    \
 193     0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,    \
 194     0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7,    \
 195     0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf,    \
 196     0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7,    \
 197     0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf,    \
 198     0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xc7,    \
 199     0xc8,0xc9,0xca,0xcb,0xcc,0xcd,0xce,0xcf,    \
 200     0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,0xd7,    \
 201     0xd8,0xd9,0xda,0xdb,0xdc,0xdd,0xde,0xdf,    \
 202     0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,    \
 203     0xe8,0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,    \
 204     0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,    \
 205     0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,    \
 206     0x00,0x01,0x02,0x03,0x0c,0x0d,0x06,0x07,    \
 207     0x08,0x09,0x0a,0x0b,0x04,0x05,0x0e,0x0f,    \
 208     0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,    \
 209     0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,    \
 210     0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,    \
 211     0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,    \
 212     0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,    \
 213     0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,    \
 214     0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,    \
 215     0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,    \
 216     0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,    \
 217     0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f,    \
 218     0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,    \
 219     0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f,    \
 220     0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,    \
 221     0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f,    \
 222     0x100,0x101,0x102,0x103}
 223
 224
 225 #define ORDER_REGS_FOR_LOCAL_ALLOC ip2k_init_local_alloc (reg_alloc_order)
 226
 227 /* Are we allowed to rename registers?  For some reason, regrename was
 228    changing DP to IP (when it appeared in addresses like (plus:HI
 229    (reg: DP) (const_int 37)) - and that's bad because IP doesn't
 230    permit offsets!  */
 231
 232 #define HARD_REGNO_RENAME_OK(REG, NREG)                         \
 233   (((REG) == REG_DPH) ? 0                                       \
 234     : ((REG) == REG_IPH) ? ((NREG) == REG_DPH)                  \
 235     : (((NREG) == REG_IPL) || ((NREG) == REG_DPL)) ? 0 : 1)
 236
 237 #define HARD_REGNO_NREGS(REGNO, MODE) \
 238   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 239
 240 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
 241
 242 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 243    (((MODE1) == QImode && (MODE2) == HImode)    \
 244     || ((MODE2) == QImode && (MODE1) == HImode))
 245 /* We originally had this as follows - this isn't a win on the IP2k
 246    though as registers just get in our way!
 247
 248    #define MODES_TIEABLE_P(MODE1, MODE2) \
 249     (((MODE1) > HImode && (MODE2) == HImode)
 250      || ((MODE1) == HImode && (MODE2) > HImode))  */
 251
 252 enum reg_class {
 253   NO_REGS,
 254   DPH_REGS,
 255   DPL_REGS,
 256   DP_REGS,
 257   SP_REGS,
 258   IPH_REGS,
 259   IPL_REGS,
 260   IP_REGS,
 261   DP_SP_REGS,
 262   PTR_REGS,
 263   NONPTR_REGS,
 264   NONSP_REGS,
 265   GENERAL_REGS,
 266   ALL_REGS = GENERAL_REGS,
 267   LIM_REG_CLASSES
 268 };
 269
 270 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 271
 272 #define REG_CLASS_NAMES {                       \
 273                 "NO_REGS",                      \
 274                 "DPH_REGS",                     \
 275                 "DPL_REGS",                     \
 276                 "DP_REGS",                      \
 277                 "SP_REGS",                      \
 278                 "IPH_REGS",                     \
 279                 "IPL_REGS",                     \
 280                 "IP_REGS",                      \
 281                 "DP_SP_REGS",                   \
 282                 "PTR_REGS",                     \
 283                 "NONPTR_REGS",                  \
 284                 "NONSP_REGS",                   \
 285                 "GENERAL_REGS"                  \
 286                 }
 287
 288
 289 #define REG_CLASS_CONTENTS {                            \
 290 {0x00000000, 0, 0, 0, 0, 0, 0, 0, 0}, /* NO_REGS */     \
 291 {0x00001000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPH_REGS */    \
 292 {0x00002000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPL_REGS */    \
 293 {0x00003000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_REGS */     \
 294 {0x000000c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SP_REGS */     \
 295 {0x00000010, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPH_REGS */    \
 296 {0x00000020, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPL_REGS */    \
 297 {0x00000030, 0, 0, 0, 0, 0, 0, 0, 0}, /* IP_REGS */     \
 298 {0x000030c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_SP_REGS */  \
 299 {0x000030f0, 0, 0, 0, 0, 0, 0, 0, 0}, /* PTR_REGS */    \
 300 {0xffffcf0f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONPTR_REGS */ \
 301 {0xffffff3f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONSP_REGS */  \
 302 {0xffffffff,-1,-1,-1,-1,-1,-1,-1,15}  /* GENERAL_REGS */ \
 303 }
 304
 305 #define REGNO_REG_CLASS(R)      \
 306   ( (R) == REG_IPH ? IPH_REGS   \
 307   : (R) == REG_IPL ? IPL_REGS   \
 308   : (R) == REG_DPH ? DPH_REGS   \
 309   : (R) == REG_DPL ? DPL_REGS   \
 310   : (R) == REG_SPH ? SP_REGS    \
 311   : (R) == REG_SPL ? SP_REGS    \
 312   : NONPTR_REGS)
 313
 314 #define MODE_BASE_REG_CLASS(MODE) ((MODE) == QImode ? PTR_REGS : DP_SP_REGS)
 315
 316 #define BASE_REG_CLASS PTR_REGS
 317
 318 #define INDEX_REG_CLASS NO_REGS
 319
 320 #define REG_CLASS_FROM_LETTER(C)        \
 321   ( (C) == 'j' ? IPH_REGS               \
 322   : (C) == 'k' ? IPL_REGS               \
 323   : (C) == 'f' ? IP_REGS                \
 324   : (C) == 'y' ? DPH_REGS               \
 325   : (C) == 'z' ? DPL_REGS               \
 326   : (C) == 'b' ? DP_REGS                \
 327   : (C) == 'u' ? NONSP_REGS             \
 328   : (C) == 'q' ? SP_REGS                \
 329   : (C) == 'c' ? DP_SP_REGS             \
 330   : (C) == 'a' ? PTR_REGS               \
 331   : (C) == 'd' ? NONPTR_REGS            \
 332   : NO_REGS)
 333
 334 #define REGNO_OK_FOR_BASE_P(R) \
 335   ((R) == REG_DP || (R) == REG_IP || (R) == REG_SP)
 336
 337 #define REGNO_MODE_OK_FOR_BASE_P(R,M)           \
 338   ((R) == REG_DP || (R) == REG_SP               \
 339    || ((R) == REG_IP && GET_MODE_SIZE (M) <= 1))
 340
 341 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 342
 343 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
 344
 345 #define SMALL_REGISTER_CLASSES 1
 346
 347 #define CLASS_LIKELY_SPILLED_P(CLASS)  class_likely_spilled_p(CLASS)
 348
 349 #define CLASS_MAX_NREGS(CLASS, MODE)   GET_MODE_SIZE (MODE)
 350
 351 #define CONST_OK_FOR_LETTER_P(VALUE, C)                         \
 352   ((C) == 'I' ? (VALUE) >= -255 && (VALUE) <= -1 :              \
 353    (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 7 :                  \
 354    (C) == 'K' ? (VALUE) >= 0 && (VALUE) <= 127 :                \
 355    (C) == 'L' ? (VALUE) > 0 && (VALUE) < 128:                   \
 356    (C) == 'M' ? (VALUE) == -1:                                  \
 357    (C) == 'N' ? (VALUE) == 1:                                   \
 358    (C) == 'O' ? (VALUE) == 0:                                   \
 359    (C) == 'P' ? (VALUE) >= 0 && (VALUE) <= 255:                 \
 360    0)
 361
 362 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
 363
 364 #define EXTRA_CONSTRAINT(X, C) ip2k_extra_constraint (X, C)
 365
 366 /* This is an undocumented variable which describes
 367    how GCC will pop a data.  */
 368 #define STACK_POP_CODE PRE_INC
 369
 370 #define STACK_PUSH_CODE POST_DEC
 371
 372 #define STACK_CHECK_BUILTIN     1
 373 /* Prologue code will do stack checking as necessary.  */
 374
 375 #define STARTING_FRAME_OFFSET (0)
 376
 377 #define FRAME_GROWS_DOWNWARD    1
 378 #define STACK_GROWS_DOWNWARD    1
 379
 380 /* On IP2K arg pointer is virtual and resolves to either SP or FP
 381    after we've resolved what registers are saved (fp chain, return
 382    pc, etc.  */
 383
 384 #define FIRST_PARM_OFFSET(FUNDECL) 0
 385
 386 #define STACK_POINTER_OFFSET 1
 387 /* IP2K stack is post-decremented, so 0(sp) is address of open space
 388    and 1(sp) is offset to the location avobe the forst location at which
 389    outgoing arguments are placed.  */
 390
 391 #define STACK_BOUNDARY 8
 392
 393 #define STACK_POINTER_REGNUM REG_SP
 394
 395 #define FRAME_POINTER_REGNUM REG_VFP
 396 #define HARD_FRAME_POINTER_REGNUM REG_FP
 397
 398 #define ARG_POINTER_REGNUM  REG_AP
 399
 400 /* We don't really want to support nested functions.  But we'll crash
 401    in various testsuite tests if we don't at least define the register
 402    to contain the static chain. The return value register is about as
 403    bad a place as any for this.  */
 404
 405 #define STATIC_CHAIN_REGNUM     REG_RESULT
 406
 407 #define FRAME_POINTER_REQUIRED (!flag_omit_frame_pointer)
 408
 409 #define ELIMINABLE_REGS {                                       \
 410         {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},             \
 411         {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},        \
 412         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},           \
 413         {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},      \
 414         {HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},      \
 415 }
 416
 417 #define CAN_ELIMINATE(FROM, TO)                                 \
 418   ((FROM) == HARD_FRAME_POINTER_REGNUM                          \
 419    ? (flag_omit_frame_pointer && !frame_pointer_needed) : 1)
 420 /* Don't eliminate FP unless we EXPLICITLY_ASKED  */
 421
 422 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 423   ((OFFSET) = ip2k_init_elim_offset ((FROM), (TO)))
 424
 425 #define RETURN_ADDR_RTX(COUNT, X) \
 426   (((COUNT) == 0) ? gen_rtx_REG (HImode, REG_CALLH) : NULL_RTX)
 427
 428 #define PUSH_ROUNDING(NPUSHED) (NPUSHED)
 429
 430 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
 431   ip2k_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))
 432
 433 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
 434
 435 #define CUMULATIVE_ARGS int
 436
 437 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
 438   ((CUM) = 0)
 439
 440 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
 441
 442 /* All arguments are passed on stack - do nothing here.  */
 443
 444 #define FUNCTION_ARG_REGNO_P(R) 0
 445
 446 #define FUNCTION_VALUE(VALTYPE, FUNC)                           \
 447    ((TYPE_MODE (VALTYPE) == QImode)                             \
 448     ? gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT + 1) \
 449     : gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT))
 450
 451 /* Because functions returning 'char' actually widen to 'int', we have to
 452    use $81 as the return location if we think we only have a 'char'.  */
 453
 454 #define LIBCALL_VALUE(MODE)  gen_rtx_REG ((MODE), REG_RESULT)
 455
 456 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_RESULT)
 457
 458 #define DEFAULT_PCC_STRUCT_RETURN 0
 459
 460 #define EPILOGUE_USES(REGNO) 0
 461
 462
 463 /*  Hmmm.  We don't actually like constants as addresses - they always need
 464     to be loaded to a register, except for function calls which take an
 465     address by immediate value.  But changing this to zero had negative
 466     effects, causing the compiler to get very confused....  */
 467
 468 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
 469
 470 #define MAX_REGS_PER_ADDRESS 1
 471
 472 #ifdef REG_OK_STRICT
 473 #  define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
 474 {                                                       \
 475   if (legitimate_address_p ((MODE), (OPERAND), 1))      \
 476     goto ADDR;                                          \
 477 }
 478 #else
 479 #  define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
 480 {                                                       \
 481   if (legitimate_address_p ((MODE), (OPERAND), 0))      \
 482     goto ADDR;                                          \
 483 }
 484 #endif
 485
 486 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
 487
 488 #define REG_OK_FOR_BASE_NOSTRICT_P(X)   \
 489   (REGNO (X) >= FIRST_PSEUDO_REGISTER   \
 490    || (REGNO (X) == REG_FP)             \
 491    || (REGNO (X) == REG_VFP)            \
 492    || (REGNO (X) == REG_AP)             \
 493    || REG_OK_FOR_BASE_STRICT_P(X))
 494
 495 #ifdef REG_OK_STRICT
 496 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
 497 #else
 498 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
 499 #endif
 500
 501 #define REG_OK_FOR_INDEX_P(X) 0
 502
 503 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)             \
 504 do { rtx orig_x = (X);                                  \
 505   (X) = legitimize_address ((X), (OLDX), (MODE), 0);    \
 506   if ((X) != orig_x && memory_address_p ((MODE), (X)))  \
 507     goto WIN;                                           \
 508 } while (0)
 509
 510 /* Is X a legitimate register to reload, or is it a pseudo stack-temp
 511    that is problematic for push_reload() ?  */
 512
 513 #define LRA_REG(X)                                              \
 514   (! (reg_equiv_memory_loc[REGNO (X)]                           \
 515       && (reg_equiv_address[REGNO (X)]                          \
 516           || num_not_at_initial_offset)))
 517
 518 /* Given a register X that failed the LRA_REG test, replace X
 519    by its memory equivalent, find the reloads needed for THAT memory
 520    location and substitute that back for the higher-level reload
 521    that we're conducting...  */
 522
 523 /* WARNING: we reference 'ind_levels' and 'insn' which are local variables
 524    in find_reloads_address (), where the LEGITIMIZE_RELOAD_ADDRESS macro
 525    expands.  */
 526
 527 #define FRA_REG(X,MODE,OPNUM,TYPE)                                      \
 528 do {                                                                    \
 529   rtx tem = make_memloc ((X), REGNO (X));                               \
 530                                                                         \
 531   if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))        \
 532     {                                                                   \
 533       /* Note that we're doing address in address - cf. ADDR_TYPE  */   \
 534       find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),        \
 535                             &XEXP (tem, 0), (OPNUM),                    \
 536                             ADDR_TYPE (TYPE), ind_levels, insn);        \
 537     }                                                                   \
 538   (X) = tem;                                                            \
 539 } while (0)
 540
 541
 542 /* For the IP2K, we want to be clever about picking IP vs DP for a
 543    base pointer since IP only directly supports a zero displacement.
 544    (Note that we have modified all the HI patterns to correctly handle
 545    IP references by manipulating iph:ipl as we fetch the pieces).  */
 546 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND,WIN)                 \
 547 {                                                                            \
 548   if (GET_CODE (X) == PLUS                                                   \
 549       && REG_P (XEXP (X, 0))                                                 \
 550       && GET_CODE (XEXP (X, 1)) == CONST_INT)                                \
 551     {                                                                        \
 552       int disp = INTVAL (XEXP (X, 1));                                       \
 553       int fit = (disp >= 0 && disp <= (127 - 2 * GET_MODE_SIZE (MODE)));     \
 554       rtx reg = XEXP (X, 0);                                                 \
 555       if (!fit)                                                              \
 556         {                                                                    \
 557           push_reload ((X), NULL_RTX, &(X),                                  \
 558                        NULL, MODE_BASE_REG_CLASS (MODE), GET_MODE (X),       \
 559                        VOIDmode, 0, 0, OPNUM, TYPE);                         \
 560           goto WIN;                                                          \
 561         }                                                                    \
 562       if (reg_equiv_memory_loc[REGNO (reg)]                                  \
 563           && (reg_equiv_address[REGNO (reg)] || num_not_at_initial_offset))  \
 564         {                                                                    \
 565           rtx mem = make_memloc (reg, REGNO (reg));                          \
 566           if (! strict_memory_address_p (GET_MODE (mem), XEXP (mem, 0)))     \
 567             {                                                                \
 568               /* Note that we're doing address in address - cf. ADDR_TYPE  */\
 569                find_reloads_address (GET_MODE (mem), &mem, XEXP (mem, 0),    \
 570                                     &XEXP (mem, 0), (OPNUM),                 \
 571                                     ADDR_TYPE (TYPE), (IND), insn);          \
 572             }                                                                \
 573           push_reload (mem, NULL, &XEXP (X, 0), NULL,                        \
 574                        GENERAL_REGS, Pmode, VOIDmode, 0, 0,                  \
 575                        OPNUM, TYPE);                                         \
 576           push_reload (X, NULL, &X, NULL,                                    \
 577                        MODE_BASE_REG_CLASS (MODE), GET_MODE (X), VOIDmode,   \
 578                        0, 0, OPNUM, TYPE);                                   \
 579           goto WIN;                                                          \
 580         }                                                                    \
 581    }                                                                         \
 582 }
 583
 584 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)                \
 585     do {                                                        \
 586         if (ip2k_mode_dependent_address (ADDR)) goto LABEL;     \
 587     } while (0)
 588
 589 #define LEGITIMATE_CONSTANT_P(X) 1
 590
 591 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 7
 592
 593 #define MEMORY_MOVE_COST(MODE,CLASS,IN) 6
 594
 595 #define SLOW_BYTE_ACCESS 0
 596
 597 #define NO_FUNCTION_CSE
 598
 599 #define TEXT_SECTION_ASM_OP ".text"
 600 #define DATA_SECTION_ASM_OP ".data"
 601
 602 #define JUMP_TABLES_IN_TEXT_SECTION 1
 603
 604 #define ASM_COMMENT_START " ; "
 605
 606 #define ASM_APP_ON "/* #APP */\n"
 607
 608 #define ASM_APP_OFF "/* #NOAPP */\n"
 609
 610 #define ASM_OUTPUT_DOUBLE(STREAM, VALUE) \
 611   fprintf ((STREAM), ".double %.20e\n", (VALUE))
 612 #define ASM_OUTPUT_FLOAT(STREAM, VALUE) \
 613   asm_output_float ((STREAM), (VALUE))
 614
 615 #define ASM_OUTPUT_INT(FILE, VALUE)                     \
 616  ( fprintf ((FILE), "\t.long "),                        \
 617    output_addr_const ((FILE), (VALUE)),                 \
 618    fputs ("\n", (FILE)))
 619
 620 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
 621   asm_output_short ((FILE), (VALUE))
 622 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
 623   asm_output_char ((FILE), (VALUE))
 624
 625 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
 626   asm_output_byte ((FILE), (VALUE))
 627
 628 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) \
 629   ((C) == '\n' || ((C) == '$'))
 630
 631 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)  \
 632 do {                                                    \
 633      fputs ("\t.comm ", (STREAM));                      \
 634      assemble_name ((STREAM), (NAME));                  \
 635      fprintf ((STREAM), ",%d\n", (int)(SIZE));          \
 636 } while (0)
 637
 638 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED)   \
 639 do {                                                    \
 640      fputs ("\t.lcomm ", (STREAM));                     \
 641      assemble_name ((STREAM), (NAME));                  \
 642      fprintf ((STREAM), ",%d\n", (int)(SIZE));          \
 643 } while (0)
 644
 645 #undef WEAK_ASM_OP
 646 #define WEAK_ASM_OP     ".weak"
 647
 648 #undef ASM_DECLARE_FUNCTION_SIZE
 649 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)            \
 650   do {                                                          \
 651     if (!flag_inhibit_size_directive)                           \
 652       ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME);                   \
 653   } while (0)
 654
 655 #define ESCAPES \
 656 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 657 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
 658 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
 659 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
 660 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 661 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 662 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 663 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
 664 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
 665    ASM_OUTPUT_LIMITED_STRING macros.  Each byte in the table
 666    corresponds to a particular byte value [0..255].  For any
 667    given byte value, if the value in the corresponding table
 668    position is zero, the given character can be output directly.
 669    If the table value is 1, the byte must be output as a \ooo
 670    octal escape.  If the tables value is anything else, then the
 671    byte value should be output as a \ followed by the value
 672    in the table.  Note that we can use standard UN*X escape
 673    sequences for many control characters, but we don't use
 674    \a to represent BEL because some svr4 assemblers (e.g. on
 675    the i386) don't know about that.  Also, we don't use \v
 676    since some versions of gas, such as 2.2 did not accept it.  */
 677
 678 /* Globalizing directive for a label.  */
 679 #define GLOBAL_ASM_OP ".global\t"
 680
 681 #define REGISTER_NAMES  {                                       \
 682   "$00","$01","$02","$03","iph","ipl","sph","spl",              \
 683   "pch","pcl","wreg","status","dph","dpl","$0e","mulh",         \
 684   "$10","$11","$12","$13","$14","$15","$16","$17",              \
 685   "$18","$19","$1a","$1b","$1c","$1d","$1e","$1f",              \
 686   "$20","$21","$22","$23","$24","$25","$26","$27",              \
 687   "$28","$29","$2a","$2b","$2c","$2d","$2e","$2f",              \
 688   "$30","$31","$32","$33","$34","$35","$36","$37",              \
 689   "$38","$39","$3a","$3b","$3c","$3d","$3e","$3f",              \
 690   "$40","$41","$42","$43","$44","$45","$46","$47",              \
 691   "$48","$49","$4a","$4b","$4c","$4d","$4e","$4f",              \
 692   "$50","$51","$52","$53","$54","$55","$56","$57",              \
 693   "$58","$59","$5a","$5b","$5c","$5d","$5e","$5f",              \
 694   "$60","$61","$62","$63","$64","$65","$66","$67",              \
 695   "$68","$69","$6a","$6b","$6c","$6d","$6e","$6f",              \
 696   "$70","$71","$72","$73","$74","$75","$76","$77",              \
 697   "$78","$79","$7a","$7b","$7c","$7d","callh","calll",          \
 698   "$80","$81","$82","$83","$84","$85","$86","$87",              \
 699   "$88","$89","$8a","$8b","$8c","$8d","$8e","$8f",              \
 700   "$90","$91","$92","$93","$94","$95","$96","$97",              \
 701   "$98","$99","$9a","$9b","$9c","$9d","$9e","$9f",              \
 702   "$a0","$a1","$a2","$a3","$a4","$a5","$a6","$a7",              \
 703   "$a8","$a9","$aa","$ab","$ac","$ad","$ae","$af",              \
 704   "$b0","$b1","$b2","$b3","$b4","$b5","$b6","$b7",              \
 705   "$b8","$b9","$ba","$bb","$bc","$bd","$be","$bf",              \
 706   "$c0","$c1","$c2","$c3","$c4","$c5","$c6","$c7",              \
 707   "$c8","$c9","$ca","$cb","$cc","$cd","$ce","$cf",              \
 708   "$d0","$d1","$d2","$d3","$d4","$d5","$d6","$d7",              \
 709   "$d8","$d9","$da","$db","$dc","$dd","$de","$df",              \
 710   "$e0","$e1","$e2","$e3","$e4","$e5","$e6","$e7",              \
 711   "$e8","$e9","$ea","$eb","$ec","$ed","$ee","$ef",              \
 712   "$f0","$f1","$f2","$f3","$f4","$f5","$f6","$f7",              \
 713   "$f8","$f9","$fa","$fb","$fc","$fd","$fe","$ff",              \
 714   "vfph","vfpl","vaph","vapl"}
 715
 716 #define PRINT_OPERAND(STREAM, X, CODE) \
 717   print_operand ((STREAM), (X), (CODE))
 718
 719 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
 720   ((CODE) == '<' || (CODE) == '>')
 721
 722 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
 723
 724 /* Since register names don't have a prefix, we must preface all
 725    user identifiers with the '_' to prevent confusion.  */
 726
 727 #undef USER_LABEL_PREFIX
 728 #define USER_LABEL_PREFIX "_"
 729 #define LOCAL_LABEL_PREFIX ".L"
 730
 731 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
 732   asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
 733
 734 /* elfos.h presumes that we will want switch/case dispatch tables aligned.
 735    This is not so for the ip2k.  */
 736 #undef ASM_OUTPUT_CASE_LABEL
 737
 738 #undef ASM_OUTPUT_ADDR_VEC_ELT
 739 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
 740   asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
 741
 742 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
 743   fprintf ((STREAM), "\t.align %d\n", (POWER))
 744
 745 /* Since instructions are 16 bit word addresses, we should lie and claim that
 746    the dispatch vectors are in QImode.  Otherwise the offset into the jump
 747    table will be scaled by the MODE_SIZE.  */
 748
 749 #define CASE_VECTOR_MODE QImode
 750
 751 #undef WORD_REGISTER_OPERATIONS
 752
 753 #define MOVE_MAX 1
 754
 755 #define MOVE_RATIO              3
 756 /* MOVE_RATIO is the number of move instructions that is better than a
 757    block move.  Make this small on the IP2k, since the code size grows very
 758    large with each move.  */
 759
 760 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 761
 762 #define Pmode HImode
 763
 764 #define FUNCTION_MODE HImode
 765
 766 #define DOLLARS_IN_IDENTIFIERS 0
 767
 768 extern int ip2k_reorg_in_progress;
 769 /* Flag if we're in the middle of IP2k-specific reorganization.  */
 770
 771 extern int ip2k_reorg_completed;
 772 /* Flag if we've completed our IP2k-specific reorganization.  If we have
 773    then we allow quite a few more tricks than before.  */
 774
 775 extern int ip2k_reorg_split_dimode;
 776 extern int ip2k_reorg_split_simode;
 777 extern int ip2k_reorg_split_qimode;
 778 extern int ip2k_reorg_split_himode;
 779 /* Flags for various split operations that we run in sequence.  */
 780
 781 extern int ip2k_reorg_merge_qimode;
 782 /* Flag to indicate that it's safe to merge QImode operands.  */
 783
 784 #define TRAMPOLINE_TEMPLATE(FILE) abort ()
 785
 786 #define TRAMPOLINE_SIZE 4
 787
 788 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)                       \
 789 {                                                                       \
 790   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)),     \
 791                            CXT);                                        \
 792   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)),     \
 793                            FNADDR);                                     \
 794 }
 795 /* Store in cc_status the expressions
 796    that the condition codes will describe
 797    after execution of an instruction whose pattern is EXP.
 798    Do not alter them if the instruction would not alter the cc's.  */
 799
 800 #define NOTICE_UPDATE_CC(EXP, INSN) (void)(0)
 801
 802 /* Output assembler code to FILE to increment profiler label # LABELNO
 803    for profiling a function entry.  */
 804
 805 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 806   fprintf ((FILE), "/* profiler %d */", (LABELNO))
 807
 808 #undef ENDFILE_SPEC
 809 #undef LINK_SPEC
 810 #undef STARTFILE_SPEC
 811
 812 #if defined(__STDC__) || defined(ALMOST_STDC)
 813 #define AS2(a,b,c) #a "\t" #b "," #c
 814 #define AS1(a,b) #a "\t" #b
 815 #else
 816 #define AS1(a,b) "a     b"
 817 #define AS2(a,b,c) "a   b,c"
 818 #endif
 819 #define OUT_AS1(a,b) output_asm_insn (AS1 (a,b), operands)
 820 #define OUT_AS2(a,b,c) output_asm_insn (AS2 (a,b,c), operands)
 821 #define CR_TAB "\n\t"
 822
 823 #define PREDICATE_CODES                                 \
 824   {"ip2k_ip_operand", {MEM}},                           \
 825   {"ip2k_short_operand", {MEM}},                        \
 826   {"ip2k_gen_operand", {MEM, REG, SUBREG}},             \
 827   {"ip2k_nonptr_operand", {REG, SUBREG}},               \
 828   {"ip2k_ptr_operand", {REG, SUBREG}},                  \
 829   {"ip2k_split_dest_operand", {REG, SUBREG, MEM}},      \
 830   {"ip2k_sp_operand", {REG}},                           \
 831   {"ip2k_nonsp_reg_operand", {REG, SUBREG}},            \
 832   {"ip2k_symbol_ref_operand", {SYMBOL_REF}},            \
 833   {"ip2k_binary_operator", {PLUS, MINUS, MULT, DIV,     \
 834                             UDIV, MOD, UMOD, AND, IOR,  \
 835                             XOR, COMPARE, ASHIFT,       \
 836                             ASHIFTRT, LSHIFTRT}},       \
 837   {"ip2k_unary_operator", {NEG, NOT, SIGN_EXTEND,       \
 838                            ZERO_EXTEND}},               \
 839   {"ip2k_unsigned_comparison_operator", {LTU, GTU, NE,  \
 840                                          EQ, LEU, GEU}},\
 841   {"ip2k_signed_comparison_operator", {LT, GT, LE, GE}},
 842
 843 #define DWARF2_DEBUGGING_INFO 1
 844
 845 #define DWARF2_ASM_LINE_DEBUG_INFO      1
 846
 847 #define DBX_REGISTER_NUMBER(REGNO)      (REGNO)
 848
 849 /* Miscellaneous macros to describe machine specifics.  */
 850
 851 #define IS_PSEUDO_P(R)  (REGNO (R) >= FIRST_PSEUDO_REGISTER)
 852
 853 /* Default calculations would cause DWARF address sizes to be 2 bytes,
 854    but the Harvard architecture of the IP2k and the word-addressed 64k
 855    of instruction memory causes us to want a 32-bit "address" field.  */
 856 #undef DWARF2_ADDR_SIZE
 857 #define DWARF2_ADDR_SIZE        4
 858