1 /* Definitions of target machine GNU compiler. IA-64 version.
2 Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
3 Contributed by James E. Wilson <wilson@cygnus.com> and
4 David Mosberger <davidm@hpl.hp.com>.
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* ??? Look at ABI group documents for list of preprocessor macros and
24 other features required for ABI compliance. */
26 /* ??? Functions containing a non-local goto target save many registers. Why?
27 See for instance execute/920428-2.c. */
29 /* ??? Add support for short data/bss sections. */
32 /* Run-time target specifications */
34 /* Define this to be a string constant containing `-D' options to define the
35 predefined macros that identify this machine and system. These macros will
36 be predefined unless the `-ansi' option is specified. */
37 /* ??? This is undefed in svr4.h. */
38 #define CPP_PREDEFINES "-Dia64 -Amachine=ia64"
40 /* This declaration should be present. */
41 extern int target_flags;
43 /* This series of macros is to allow compiler command arguments to enable or
44 disable the use of optional features of the target machine. */
46 #define MASK_BIG_ENDIAN 0x00000001 /* Generate big endian code. */
48 #define MASK_GNU_AS 0x00000002 /* Generate code for GNU as. */
50 #define MASK_GNU_LD 0x00000004 /* Generate code for GNU ld. */
52 #define MASK_NO_PIC 0x00000008 /* Generate code without GP reg. */
54 #define MASK_VOL_ASM_STOP 0x00000010 /* Emit stop bits for vol ext asm. */
56 /* 0x00000020 is available. */
58 #define MASK_B_STEP 0x00000040 /* Emit code for Itanium B step. */
60 #define MASK_REG_NAMES 0x00000080 /* Use in/loc/out register names. */
62 #define MASK_NO_SDATA 0x00000100 /* Disable sdata/scommon/sbss. */
64 #define MASK_CONST_GP 0x00000200 /* treat gp as program-wide constant */
66 #define MASK_AUTO_PIC 0x00000400 /* generate automatically PIC */
68 #define MASK_INLINE_DIV_LAT 0x00000800 /* inline div, min latency. */
70 #define MASK_INLINE_DIV_THR 0x00001000 /* inline div, max throughput. */
72 #define MASK_DWARF2_ASM 0x40000000 /* test dwarf2 line info via gas. */
74 #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN)
76 #define TARGET_GNU_AS (target_flags & MASK_GNU_AS)
78 #define TARGET_GNU_LD (target_flags & MASK_GNU_LD)
80 #define TARGET_NO_PIC (target_flags & MASK_NO_PIC)
82 #define TARGET_VOL_ASM_STOP (target_flags & MASK_VOL_ASM_STOP)
84 #define TARGET_B_STEP (target_flags & MASK_B_STEP)
86 #define TARGET_REG_NAMES (target_flags & MASK_REG_NAMES)
88 #define TARGET_NO_SDATA (target_flags & MASK_NO_SDATA)
90 #define TARGET_CONST_GP (target_flags & MASK_CONST_GP)
92 #define TARGET_AUTO_PIC (target_flags & MASK_AUTO_PIC)
94 #define TARGET_INLINE_DIV_LAT (target_flags & MASK_INLINE_DIV_LAT)
96 #define TARGET_INLINE_DIV_THR (target_flags & MASK_INLINE_DIV_THR)
98 #define TARGET_INLINE_DIV \
99 (target_flags & (MASK_INLINE_DIV_LAT | MASK_INLINE_DIV_THR))
101 #define TARGET_DWARF2_ASM (target_flags & MASK_DWARF2_ASM)
103 /* This macro defines names of command options to set and clear bits in
104 `target_flags'. Its definition is an initializer with a subgrouping for
105 each command option. */
107 #define TARGET_SWITCHES \
109 { "big-endian", MASK_BIG_ENDIAN, \
110 N_("Generate big endian code") }, \
111 { "little-endian", -MASK_BIG_ENDIAN, \
112 N_("Generate little endian code") }, \
113 { "gnu-as", MASK_GNU_AS, \
114 N_("Generate code for GNU as") }, \
115 { "no-gnu-as", -MASK_GNU_AS, \
116 N_("Generate code for Intel as") }, \
117 { "gnu-ld", MASK_GNU_LD, \
118 N_("Generate code for GNU ld") }, \
119 { "no-gnu-ld", -MASK_GNU_LD, \
120 N_("Generate code for Intel ld") }, \
121 { "no-pic", MASK_NO_PIC, \
122 N_("Generate code without GP reg") }, \
123 { "volatile-asm-stop", MASK_VOL_ASM_STOP, \
124 N_("Emit stop bits before and after volatile extended asms") }, \
125 { "no-volatile-asm-stop", -MASK_VOL_ASM_STOP, \
126 N_("Don't emit stop bits before and after volatile extended asms") }, \
127 { "b-step", MASK_B_STEP, \
128 N_("Emit code for Itanium (TM) processor B step")}, \
129 { "register-names", MASK_REG_NAMES, \
130 N_("Use in/loc/out register names")}, \
131 { "no-sdata", MASK_NO_SDATA, \
132 N_("Disable use of sdata/scommon/sbss")}, \
133 { "sdata", -MASK_NO_SDATA, \
134 N_("Enable use of sdata/scommon/sbss")}, \
135 { "constant-gp", MASK_CONST_GP, \
136 N_("gp is constant (but save/restore gp on indirect calls)") }, \
137 { "auto-pic", MASK_AUTO_PIC, \
138 N_("Generate self-relocatable code") }, \
139 { "inline-divide-min-latency", MASK_INLINE_DIV_LAT, \
140 N_("Generate inline division, optimize for latency") }, \
141 { "inline-divide-max-throughput", MASK_INLINE_DIV_THR, \
142 N_("Generate inline division, optimize for throughput") }, \
143 { "dwarf2-asm", MASK_DWARF2_ASM, \
144 N_("Enable Dwarf 2 line debug info via GNU as")}, \
145 { "no-dwarf2-asm", -MASK_DWARF2_ASM, \
146 N_("Disable Dwarf 2 line debug info via GNU as")}, \
147 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, \
151 /* Default target_flags if no switches are specified */
153 #ifndef TARGET_DEFAULT
154 #define TARGET_DEFAULT MASK_DWARF2_ASM
157 #ifndef TARGET_CPU_DEFAULT
158 #define TARGET_CPU_DEFAULT 0
161 /* This macro is similar to `TARGET_SWITCHES' but defines names of command
162 options that have values. Its definition is an initializer with a
163 subgrouping for each command option. */
165 extern const char *ia64_fixed_range_string;
166 #define TARGET_OPTIONS \
168 { "fixed-range=", &ia64_fixed_range_string, \
169 N_("Specify range of registers to make fixed.")}, \
172 /* This macro is a C statement to print on `stderr' a string describing the
173 particular machine description choice. */
175 #define TARGET_VERSION fprintf (stderr, " (IA-64)");
177 /* Sometimes certain combinations of command options do not make sense on a
178 particular target machine. You can define a macro `OVERRIDE_OPTIONS' to
179 take account of this. This macro, if defined, is executed once just after
180 all the command options have been parsed. */
182 #define OVERRIDE_OPTIONS ia64_override_options ()
184 /* Some machines may desire to change what optimizations are performed for
185 various optimization levels. This macro, if defined, is executed once just
186 after the optimization level is determined and before the remainder of the
187 command options have been parsed. Values set in this macro are used as the
188 default values for the other command line options. */
190 /* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */
192 /* Driver configuration */
194 /* A C string constant that tells the GNU CC driver program options to pass to
195 CPP. It can also specify how to translate options you give to GNU CC into
196 options for GNU CC to pass to the CPP. */
198 /* ??? __LONG_MAX__ depends on LP64/ILP32 switch. */
199 /* ??? An alternative is to modify glimits.h to check for __LP64__ instead
200 of checked for CPU specific defines. We could also get rid of all LONG_MAX
201 defines in other tm.h files. */
203 "%{mcpu=itanium:-D__itanium__} %{mbig-endian:-D__BIG_ENDIAN__} \
204 -D__LONG_MAX__=9223372036854775807L"
206 /* If this macro is defined, the preprocessor will not define the builtin macro
207 `__SIZE_TYPE__'. The macro `__SIZE_TYPE__' must then be defined by
210 This should be defined if `SIZE_TYPE' depends on target dependent flags
211 which are not accessible to the preprocessor. Otherwise, it should not be
213 /* ??? Needs to be defined for P64 code. */
214 /* #define NO_BUILTIN_SIZE_TYPE */
216 /* If this macro is defined, the preprocessor will not define the builtin macro
217 `__PTRDIFF_TYPE__'. The macro `__PTRDIFF_TYPE__' must then be defined by
220 This should be defined if `PTRDIFF_TYPE' depends on target dependent flags
221 which are not accessible to the preprocessor. Otherwise, it should not be
223 /* ??? Needs to be defined for P64 code. */
224 /* #define NO_BUILTIN_PTRDIFF_TYPE */
226 /* A C string constant that tells the GNU CC driver program options to pass to
227 `cc1'. It can also specify how to translate options you give to GNU CC into
228 options for GNU CC to pass to the `cc1'. */
230 /* #define CC1_SPEC "" */
232 /* A C string constant that tells the GNU CC driver program options to pass to
233 `cc1plus'. It can also specify how to translate options you give to GNU CC
234 into options for GNU CC to pass to the `cc1plus'. */
236 /* #define CC1PLUS_SPEC "" */
238 /* A C string constant that tells the GNU CC driver program options to pass to
239 the assembler. It can also specify how to translate options you give to GNU
240 CC into options for GNU CC to pass to the assembler. */
242 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_AS) != 0
245 "%{mno-gnu-as:-N so} %{!mno-gnu-as:-x} %{mconstant-gp} %{mauto-pic}"
249 "%{!mgnu-as:-N so} %{mgnu-as:-x} %{mconstant-gp:-M const_gp}\
250 %{mauto-pic:-M no_plabel}"
253 /* A C string constant that tells the GNU CC driver program options to pass to
254 the linker. It can also specify how to translate options you give to GNU CC
255 into options for GNU CC to pass to the linker. */
257 /* The Intel linker does not support dynamic linking, so we need -dn.
258 The Intel linker gives annoying messages unless -N so is used. */
259 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_LD) != 0
261 #define LINK_SPEC "%{mno-gnu-ld:-dn -N so}"
264 #define LINK_SPEC "%{!mgnu-ld:-dn -N so}"
270 /* Define this macro to have the value 1 if the most significant bit in a byte
271 has the lowest number; otherwise define it to have the value zero. */
273 #define BITS_BIG_ENDIAN 0
275 /* Define this macro to have the value 1 if the most significant byte in a word
276 has the lowest number. This macro need not be a constant. */
278 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
280 /* Define this macro to have the value 1 if, in a multiword object, the most
281 significant word has the lowest number. */
283 #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
285 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must be a
286 constant value with the same meaning as WORDS_BIG_ENDIAN, which will be used
287 only when compiling libgcc2.c. Typically the value will be set based on
288 preprocessor defines. */
289 #if defined(__BIG_ENDIAN__)
290 #define LIBGCC2_WORDS_BIG_ENDIAN 1
292 #define LIBGCC2_WORDS_BIG_ENDIAN 0
295 /* Define this macro to be the number of bits in an addressable storage unit
296 (byte); normally 8. */
297 #define BITS_PER_UNIT 8
299 /* Number of bits in a word; normally 32. */
300 #define BITS_PER_WORD 64
302 /* Number of storage units in a word; normally 4. */
303 #define UNITS_PER_WORD 8
305 /* Width of a pointer, in bits. You must specify a value no wider than the
306 width of `Pmode'. If it is not equal to the width of `Pmode', you must
307 define `POINTERS_EXTEND_UNSIGNED'. */
308 /* ??? Implement optional 32 bit pointer size later? */
309 #define POINTER_SIZE 64
311 /* A C expression whose value is nonzero if pointers that need to be extended
312 from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and zero if
313 they are zero-extended.
315 You need not define this macro if the `POINTER_SIZE' is equal to the width
317 /* ??? May need this for 32 bit pointers. */
318 /* #define POINTERS_EXTEND_UNSIGNED */
320 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
321 which has the specified mode and signedness is to be stored in a register.
322 This macro is only called when TYPE is a scalar type. */
323 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
326 if (GET_MODE_CLASS (MODE) == MODE_INT \
327 && GET_MODE_SIZE (MODE) < 4) \
332 /* Define this macro if the promotion described by `PROMOTE_MODE' should also
333 be done for outgoing function arguments. */
334 /* ??? ABI doesn't allow us to define this. */
335 /* #define PROMOTE_FUNCTION_ARGS */
337 /* Define this macro if the promotion described by `PROMOTE_MODE' should also
338 be done for the return value of functions.
340 If this macro is defined, `FUNCTION_VALUE' must perform the same promotions
341 done by `PROMOTE_MODE'. */
342 /* ??? ABI doesn't allow us to define this. */
343 /* #define PROMOTE_FUNCTION_RETURN */
345 /* Normal alignment required for function parameters on the stack, in bits.
346 All stack parameters receive at least this much alignment regardless of data
347 type. On most machines, this is the same as the size of an integer. */
348 #define PARM_BOUNDARY 64
350 /* Define this macro if you wish to preserve a certain alignment for the stack
351 pointer. The definition is a C expression for the desired alignment
352 (measured in bits). */
354 #define STACK_BOUNDARY 128
356 /* Align frames on double word boundaries */
357 #ifndef IA64_STACK_ALIGN
358 #define IA64_STACK_ALIGN(LOC) (((LOC) + 15) & ~15)
361 /* Alignment required for a function entry point, in bits. */
362 #define FUNCTION_BOUNDARY 128
364 /* Biggest alignment that any data type can require on this machine,
366 /* Optional x86 80-bit float, quad-precision 128-bit float, and quad-word
367 128 bit integers all require 128 bit alignment. */
368 #define BIGGEST_ALIGNMENT 128
370 /* If defined, a C expression to compute the alignment for a static variable.
371 TYPE is the data type, and ALIGN is the alignment that the object
372 would ordinarily have. The value of this macro is used instead of that
373 alignment to align the object. */
375 #define DATA_ALIGNMENT(TYPE, ALIGN) \
376 (TREE_CODE (TYPE) == ARRAY_TYPE \
377 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
378 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
380 /* If defined, a C expression to compute the alignment given to a constant that
381 is being placed in memory. CONSTANT is the constant and ALIGN is the
382 alignment that the object would ordinarily have. The value of this macro is
383 used instead of that alignment to align the object. */
385 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
386 (TREE_CODE (EXP) == STRING_CST \
387 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
389 /* Define this macro to be the value 1 if instructions will fail to work if
390 given data not on the nominal alignment. If instructions will merely go
391 slower in that case, define this macro as 0. */
392 #define STRICT_ALIGNMENT 1
394 /* Define this if you wish to imitate the way many other C compilers handle
395 alignment of bitfields and the structures that contain them.
396 The behavior is that the type written for a bitfield (`int', `short', or
397 other integer type) imposes an alignment for the entire structure, as if the
398 structure really did contain an ordinary field of that type. In addition,
399 the bitfield is placed within the structure so that it would fit within such
400 a field, not crossing a boundary for it. */
401 #define PCC_BITFIELD_TYPE_MATTERS 1
403 /* An integer expression for the size in bits of the largest integer machine
404 mode that should actually be used. */
406 /* Allow pairs of registers to be used, which is the intent of the default. */
407 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
409 /* A code distinguishing the floating point format of the target machine. */
410 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
412 /* GNU CC supports two ways of implementing C++ vtables: traditional or with
413 so-called "thunks". The flag `-fvtable-thunk' chooses between them. Define
414 this macro to be a C expression for the default value of that flag. If
415 `DEFAULT_VTABLE_THUNKS' is 0, GNU CC uses the traditional implementation by
416 default. The "thunk" implementation is more efficient (especially if you
417 have provided an implementation of `ASM_OUTPUT_MI_THUNK', but is not binary
418 compatible with code compiled using the traditional implementation. If you
419 are writing a new ports, define `DEFAULT_VTABLE_THUNKS' to 1.
421 If you do not define this macro, the default for `-fvtable-thunk' is 0. */
422 #define DEFAULT_VTABLE_THUNKS 1
425 /* Layout of Source Language Data Types */
427 /* A C expression for the size in bits of the type `int' on the target machine.
428 If you don't define this, the default is one word. */
429 #define INT_TYPE_SIZE 32
431 /* A C expression for the size in bits of the type `short' on the target
432 machine. If you don't define this, the default is half a word. (If this
433 would be less than one storage unit, it is rounded up to one unit.) */
434 #define SHORT_TYPE_SIZE 16
436 /* A C expression for the size in bits of the type `long' on the target
437 machine. If you don't define this, the default is one word. */
438 /* ??? Should be 32 for ILP32 code. */
439 #define LONG_TYPE_SIZE 64
441 /* Maximum number for the size in bits of the type `long' on the target
442 machine. If this is undefined, the default is `LONG_TYPE_SIZE'. Otherwise,
443 it is the constant value that is the largest value that `LONG_TYPE_SIZE' can
444 have at run-time. This is used in `cpp'. */
445 /* ??? Should be 64 for ILP32 code. */
446 /* #define MAX_LONG_TYPE_SIZE */
448 /* A C expression for the size in bits of the type `long long' on the target
449 machine. If you don't define this, the default is two words. If you want
450 to support GNU Ada on your machine, the value of macro must be at least 64. */
451 #define LONG_LONG_TYPE_SIZE 64
453 /* A C expression for the size in bits of the type `char' on the target
454 machine. If you don't define this, the default is one quarter of a word.
455 (If this would be less than one storage unit, it is rounded up to one unit.) */
456 #define CHAR_TYPE_SIZE 8
458 /* A C expression for the size in bits of the type `float' on the target
459 machine. If you don't define this, the default is one word. */
460 #define FLOAT_TYPE_SIZE 32
462 /* A C expression for the size in bits of the type `double' on the target
463 machine. If you don't define this, the default is two words. */
464 #define DOUBLE_TYPE_SIZE 64
466 /* A C expression for the size in bits of the type `long double' on the target
467 machine. If you don't define this, the default is two words. */
468 #define LONG_DOUBLE_TYPE_SIZE 128
470 /* Tell real.c that this is the 80-bit Intel extended float format
471 packaged in a 128-bit entity. */
472 #define INTEL_EXTENDED_IEEE_FORMAT
474 /* An expression whose value is 1 or 0, according to whether the type `char'
475 should be signed or unsigned by default. The user can always override this
476 default with the options `-fsigned-char' and `-funsigned-char'. */
477 #define DEFAULT_SIGNED_CHAR 1
479 /* A C expression for a string describing the name of the data type to use for
480 size values. The typedef name `size_t' is defined using the contents of the
482 /* ??? Needs to be defined for P64 code. */
483 /* #define SIZE_TYPE */
485 /* A C expression for a string describing the name of the data type to use for
486 the result of subtracting two pointers. The typedef name `ptrdiff_t' is
487 defined using the contents of the string. See `SIZE_TYPE' above for more
489 /* ??? Needs to be defined for P64 code. */
490 /* #define PTRDIFF_TYPE */
492 /* A C expression for a string describing the name of the data type to use for
493 wide characters. The typedef name `wchar_t' is defined using the contents
494 of the string. See `SIZE_TYPE' above for more information. */
495 /* #define WCHAR_TYPE */
497 /* A C expression for the size in bits of the data type for wide characters.
498 This is used in `cpp', which cannot make use of `WCHAR_TYPE'. */
499 /* #define WCHAR_TYPE_SIZE */
501 /* Maximum number for the size in bits of the data type for wide characters.
502 If this is undefined, the default is `WCHAR_TYPE_SIZE'. Otherwise, it is
503 the constant value that is the largest value that `WCHAR_TYPE_SIZE' can have
504 at run-time. This is used in `cpp'. */
505 /* #define MAX_WCHAR_TYPE_SIZE */
507 /* A C constant expression for the integer value for escape sequence
509 #define TARGET_BELL 0x7
511 /* C constant expressions for the integer values for escape sequences
512 `\b', `\t' and `\n'. */
513 #define TARGET_BS 0x8
514 #define TARGET_TAB 0x9
515 #define TARGET_NEWLINE 0xa
517 /* C constant expressions for the integer values for escape sequences
518 `\v', `\f' and `\r'. */
519 #define TARGET_VT 0xb
520 #define TARGET_FF 0xc
521 #define TARGET_CR 0xd
524 /* Register Basics */
526 /* Number of hardware registers known to the compiler.
527 We have 128 general registers, 128 floating point registers,
528 64 predicate registers, 8 branch registers, one frame pointer,
529 and several "application" registers. */
531 #define FIRST_PSEUDO_REGISTER 335
533 /* Ranges for the various kinds of registers. */
534 #define ADDL_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 3)
535 #define GR_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 127)
536 #define FR_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 255)
537 #define PR_REGNO_P(REGNO) ((REGNO) >= 256 && (REGNO) <= 319)
538 #define BR_REGNO_P(REGNO) ((REGNO) >= 320 && (REGNO) <= 327)
539 #define GENERAL_REGNO_P(REGNO) \
540 (GR_REGNO_P (REGNO) \
541 || (REGNO) == FRAME_POINTER_REGNUM \
542 || (REGNO) == RETURN_ADDRESS_POINTER_REGNUM)
544 #define GR_REG(REGNO) ((REGNO) + 0)
545 #define FR_REG(REGNO) ((REGNO) + 128)
546 #define PR_REG(REGNO) ((REGNO) + 256)
547 #define BR_REG(REGNO) ((REGNO) + 320)
548 #define OUT_REG(REGNO) ((REGNO) + 120)
549 #define IN_REG(REGNO) ((REGNO) + 112)
550 #define LOC_REG(REGNO) ((REGNO) + 32)
552 #define AR_CCV_REGNUM 330
553 #define AR_UNAT_REGNUM 331
554 #define AR_PFS_REGNUM 332
555 #define AR_LC_REGNUM 333
556 #define AR_EC_REGNUM 334
558 #define IN_REGNO_P(REGNO) ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))
559 #define LOC_REGNO_P(REGNO) ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))
560 #define OUT_REGNO_P(REGNO) ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))
562 #define AR_M_REGNO_P(REGNO) ((REGNO) == AR_CCV_REGNUM \
563 || (REGNO) == AR_UNAT_REGNUM)
564 #define AR_I_REGNO_P(REGNO) ((REGNO) >= AR_PFS_REGNUM \
565 && (REGNO) < FIRST_PSEUDO_REGISTER)
566 #define AR_REGNO_P(REGNO) ((REGNO) >= AR_CCV_REGNUM \
567 && (REGNO) < FIRST_PSEUDO_REGISTER)
570 /* ??? Don't really need two sets of macros. I like this one better because
571 it is less typing. */
572 #define R_GR(REGNO) GR_REG (REGNO)
573 #define R_FR(REGNO) FR_REG (REGNO)
574 #define R_PR(REGNO) PR_REG (REGNO)
575 #define R_BR(REGNO) BR_REG (REGNO)
577 /* An initializer that says which registers are used for fixed purposes all
578 throughout the compiled code and are therefore not available for general
582 r1: global pointer (gp)
583 r12: stack pointer (sp)
584 r13: thread pointer (tp)
588 fp: eliminable frame pointer */
590 /* The last 16 stacked regs are reserved for the 8 input and 8 output
593 #define FIXED_REGISTERS \
594 { /* General registers. */ \
595 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
596 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
597 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
598 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
599 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
600 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
601 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
602 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
603 /* Floating-point registers. */ \
604 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
605 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
606 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
607 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
608 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
609 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
610 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
611 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
612 /* Predicate registers. */ \
613 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
614 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
615 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
616 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
617 /* Branch registers. */ \
618 0, 0, 0, 0, 0, 0, 0, 0, \
619 /*FP RA CCV UNAT PFS LC EC */ \
620 1, 1, 1, 1, 1, 0, 1 \
623 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered
624 (in general) by function calls as well as for fixed registers. This
625 macro therefore identifies the registers that are not available for
626 general allocation of values that must live across function calls. */
628 #define CALL_USED_REGISTERS \
629 { /* General registers. */ \
630 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
631 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
632 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
633 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
634 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
635 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
636 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
637 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
638 /* Floating-point registers. */ \
639 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
640 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
641 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
642 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
643 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
644 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
645 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
646 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
647 /* Predicate registers. */ \
648 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
649 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
650 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
651 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
652 /* Branch registers. */ \
653 1, 0, 0, 0, 0, 0, 1, 1, \
654 /*FP RA CCV UNAT PFS LC EC */ \
655 1, 1, 1, 1, 1, 0, 1 \
658 /* Define this macro if the target machine has register windows. This C
659 expression returns the register number as seen by the called function
660 corresponding to the register number OUT as seen by the calling function.
661 Return OUT if register number OUT is not an outbound register. */
663 #define INCOMING_REGNO(OUT) \
664 ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))
666 /* Define this macro if the target machine has register windows. This C
667 expression returns the register number as seen by the calling function
668 corresponding to the register number IN as seen by the called function.
669 Return IN if register number IN is not an inbound register. */
671 #define OUTGOING_REGNO(IN) \
672 ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))
674 /* Define this macro if the target machine has register windows. This
675 C expression returns true if the register is call-saved but is in the
678 #define LOCAL_REGNO(REGNO) \
679 (IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))
681 /* Add any extra modes needed to represent the condition code.
683 CCImode is used to mark a single predicate register instead
684 of a register pair. This is currently only used in reg_raw_mode
685 so that flow doesn't do something stupid. */
687 #define EXTRA_CC_MODES CC(CCImode, "CCI")
689 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
690 return the mode to be used for the comparison. Must be defined if
691 EXTRA_CC_MODES is defined. */
693 #define SELECT_CC_MODE(OP,X,Y) CCmode
695 /* Order of allocation of registers */
697 /* If defined, an initializer for a vector of integers, containing the numbers
698 of hard registers in the order in which GNU CC should prefer to use them
699 (from most preferred to least).
701 If this macro is not defined, registers are used lowest numbered first (all
704 One use of this macro is on machines where the highest numbered registers
705 must always be saved and the save-multiple-registers instruction supports
706 only sequences of consecutive registers. On such machines, define
707 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
708 allocatable register first. */
710 /* ??? Should the GR return value registers come before or after the rest
711 of the caller-save GRs? */
713 #define REG_ALLOC_ORDER \
715 /* Caller-saved general registers. */ \
716 R_GR (14), R_GR (15), R_GR (16), R_GR (17), \
717 R_GR (18), R_GR (19), R_GR (20), R_GR (21), R_GR (22), R_GR (23), \
718 R_GR (24), R_GR (25), R_GR (26), R_GR (27), R_GR (28), R_GR (29), \
719 R_GR (30), R_GR (31), \
720 /* Output registers. */ \
721 R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \
722 R_GR (126), R_GR (127), \
723 /* Caller-saved general registers, also used for return values. */ \
724 R_GR (8), R_GR (9), R_GR (10), R_GR (11), \
725 /* addl caller-saved general registers. */ \
726 R_GR (2), R_GR (3), \
727 /* Caller-saved FP registers. */ \
728 R_FR (6), R_FR (7), \
729 /* Caller-saved FP registers, used for parameters and return values. */ \
730 R_FR (8), R_FR (9), R_FR (10), R_FR (11), \
731 R_FR (12), R_FR (13), R_FR (14), R_FR (15), \
732 /* Rotating caller-saved FP registers. */ \
733 R_FR (32), R_FR (33), R_FR (34), R_FR (35), \
734 R_FR (36), R_FR (37), R_FR (38), R_FR (39), R_FR (40), R_FR (41), \
735 R_FR (42), R_FR (43), R_FR (44), R_FR (45), R_FR (46), R_FR (47), \
736 R_FR (48), R_FR (49), R_FR (50), R_FR (51), R_FR (52), R_FR (53), \
737 R_FR (54), R_FR (55), R_FR (56), R_FR (57), R_FR (58), R_FR (59), \
738 R_FR (60), R_FR (61), R_FR (62), R_FR (63), R_FR (64), R_FR (65), \
739 R_FR (66), R_FR (67), R_FR (68), R_FR (69), R_FR (70), R_FR (71), \
740 R_FR (72), R_FR (73), R_FR (74), R_FR (75), R_FR (76), R_FR (77), \
741 R_FR (78), R_FR (79), R_FR (80), R_FR (81), R_FR (82), R_FR (83), \
742 R_FR (84), R_FR (85), R_FR (86), R_FR (87), R_FR (88), R_FR (89), \
743 R_FR (90), R_FR (91), R_FR (92), R_FR (93), R_FR (94), R_FR (95), \
744 R_FR (96), R_FR (97), R_FR (98), R_FR (99), R_FR (100), R_FR (101), \
745 R_FR (102), R_FR (103), R_FR (104), R_FR (105), R_FR (106), R_FR (107), \
746 R_FR (108), R_FR (109), R_FR (110), R_FR (111), R_FR (112), R_FR (113), \
747 R_FR (114), R_FR (115), R_FR (116), R_FR (117), R_FR (118), R_FR (119), \
748 R_FR (120), R_FR (121), R_FR (122), R_FR (123), R_FR (124), R_FR (125), \
749 R_FR (126), R_FR (127), \
750 /* Caller-saved predicate registers. */ \
751 R_PR (6), R_PR (7), R_PR (8), R_PR (9), R_PR (10), R_PR (11), \
752 R_PR (12), R_PR (13), R_PR (14), R_PR (15), \
753 /* Rotating caller-saved predicate registers. */ \
754 R_PR (16), R_PR (17), \
755 R_PR (18), R_PR (19), R_PR (20), R_PR (21), R_PR (22), R_PR (23), \
756 R_PR (24), R_PR (25), R_PR (26), R_PR (27), R_PR (28), R_PR (29), \
757 R_PR (30), R_PR (31), R_PR (32), R_PR (33), R_PR (34), R_PR (35), \
758 R_PR (36), R_PR (37), R_PR (38), R_PR (39), R_PR (40), R_PR (41), \
759 R_PR (42), R_PR (43), R_PR (44), R_PR (45), R_PR (46), R_PR (47), \
760 R_PR (48), R_PR (49), R_PR (50), R_PR (51), R_PR (52), R_PR (53), \
761 R_PR (54), R_PR (55), R_PR (56), R_PR (57), R_PR (58), R_PR (59), \
762 R_PR (60), R_PR (61), R_PR (62), R_PR (63), \
763 /* Caller-saved branch registers. */ \
764 R_BR (6), R_BR (7), \
766 /* Stacked callee-saved general registers. */ \
767 R_GR (32), R_GR (33), R_GR (34), R_GR (35), \
768 R_GR (36), R_GR (37), R_GR (38), R_GR (39), R_GR (40), R_GR (41), \
769 R_GR (42), R_GR (43), R_GR (44), R_GR (45), R_GR (46), R_GR (47), \
770 R_GR (48), R_GR (49), R_GR (50), R_GR (51), R_GR (52), R_GR (53), \
771 R_GR (54), R_GR (55), R_GR (56), R_GR (57), R_GR (58), R_GR (59), \
772 R_GR (60), R_GR (61), R_GR (62), R_GR (63), R_GR (64), R_GR (65), \
773 R_GR (66), R_GR (67), R_GR (68), R_GR (69), R_GR (70), R_GR (71), \
774 R_GR (72), R_GR (73), R_GR (74), R_GR (75), R_GR (76), R_GR (77), \
775 R_GR (78), R_GR (79), R_GR (80), R_GR (81), R_GR (82), R_GR (83), \
776 R_GR (84), R_GR (85), R_GR (86), R_GR (87), R_GR (88), R_GR (89), \
777 R_GR (90), R_GR (91), R_GR (92), R_GR (93), R_GR (94), R_GR (95), \
778 R_GR (96), R_GR (97), R_GR (98), R_GR (99), R_GR (100), R_GR (101), \
779 R_GR (102), R_GR (103), R_GR (104), R_GR (105), R_GR (106), R_GR (107), \
781 /* Input registers. */ \
782 R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \
783 R_GR (118), R_GR (119), \
784 /* Callee-saved general registers. */ \
785 R_GR (4), R_GR (5), R_GR (6), R_GR (7), \
786 /* Callee-saved FP registers. */ \
787 R_FR (2), R_FR (3), R_FR (4), R_FR (5), R_FR (16), R_FR (17), \
788 R_FR (18), R_FR (19), R_FR (20), R_FR (21), R_FR (22), R_FR (23), \
789 R_FR (24), R_FR (25), R_FR (26), R_FR (27), R_FR (28), R_FR (29), \
790 R_FR (30), R_FR (31), \
791 /* Callee-saved predicate registers. */ \
792 R_PR (1), R_PR (2), R_PR (3), R_PR (4), R_PR (5), \
793 /* Callee-saved branch registers. */ \
794 R_BR (1), R_BR (2), R_BR (3), R_BR (4), R_BR (5), \
796 /* ??? Stacked registers reserved for fp, rp, and ar.pfs. */ \
797 R_GR (109), R_GR (110), R_GR (111), \
799 /* Special general registers. */ \
800 R_GR (0), R_GR (1), R_GR (12), R_GR (13), \
801 /* Special FP registers. */ \
802 R_FR (0), R_FR (1), \
803 /* Special predicate registers. */ \
805 /* Special branch registers. */ \
807 /* Other fixed registers. */ \
808 FRAME_POINTER_REGNUM, RETURN_ADDRESS_POINTER_REGNUM, \
809 AR_CCV_REGNUM, AR_UNAT_REGNUM, AR_PFS_REGNUM, AR_LC_REGNUM, \
813 /* How Values Fit in Registers */
815 /* A C expression for the number of consecutive hard registers, starting at
816 register number REGNO, required to hold a value of mode MODE. */
818 /* ??? We say that BImode PR values require two registers. This allows us to
819 easily store the normal and inverted values. We use CCImode to indicate
820 a single predicate register. */
822 #define HARD_REGNO_NREGS(REGNO, MODE) \
823 ((REGNO) == PR_REG (0) && (MODE) == DImode ? 64 \
824 : PR_REGNO_P (REGNO) && (MODE) == BImode ? 2 \
825 : PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1 \
826 : FR_REGNO_P (REGNO) && (MODE) == TFmode ? 1 \
827 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
829 /* A C expression that is nonzero if it is permissible to store a value of mode
830 MODE in hard register number REGNO (or in several registers starting with
833 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
834 (FR_REGNO_P (REGNO) ? \
835 GET_MODE_CLASS (MODE) != MODE_CC && (MODE) != TImode && (MODE) != BImode \
836 : PR_REGNO_P (REGNO) ? \
837 (MODE) == BImode || GET_MODE_CLASS (MODE) == MODE_CC \
838 : GR_REGNO_P (REGNO) ? (MODE) != CCImode && (MODE) != TFmode \
839 : AR_REGNO_P (REGNO) ? (MODE) == DImode \
840 : BR_REGNO_P (REGNO) ? (MODE) == DImode \
843 /* A C expression that is nonzero if it is desirable to choose register
844 allocation so as to avoid move instructions between a value of mode MODE1
845 and a value of mode MODE2.
847 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
848 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
850 /* Don't tie integer and FP modes, as that causes us to get integer registers
851 allocated for FP instructions. TFmode only supported in FP registers so
852 we can't tie it with any other modes. */
853 #define MODES_TIEABLE_P(MODE1, MODE2) \
854 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \
855 && (((MODE1) == TFmode) == ((MODE2) == TFmode)) \
856 && (((MODE1) == BImode) == ((MODE2) == BImode)))
858 /* Handling Leaf Functions */
860 /* A C initializer for a vector, indexed by hard register number, which
861 contains 1 for a register that is allowable in a candidate for leaf function
863 /* ??? This might be useful. */
864 /* #define LEAF_REGISTERS */
866 /* A C expression whose value is the register number to which REGNO should be
867 renumbered, when a function is treated as a leaf function. */
868 /* ??? This might be useful. */
869 /* #define LEAF_REG_REMAP(REGNO) */
872 /* Register Classes */
874 /* An enumeral type that must be defined with all the register class names as
875 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
876 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
877 which is not a register class but rather tells how many classes there
879 /* ??? When compiling without optimization, it is possible for the only use of
880 a pseudo to be a parameter load from the stack with a REG_EQUIV note.
881 Regclass handles this case specially and does not assign any costs to the
882 pseudo. The pseudo then ends up using the last class before ALL_REGS.
883 Thus we must not let either PR_REGS or BR_REGS be the last class. The
884 testcase for this is gcc.c-torture/execute/va-arg-7.c. */
900 #define GENERAL_REGS GR_REGS
902 /* The number of distinct register classes. */
903 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
905 /* An initializer containing the names of the register classes as C string
906 constants. These names are used in writing some of the debugging dumps. */
907 #define REG_CLASS_NAMES \
908 { "NO_REGS", "PR_REGS", "BR_REGS", "ADDL_REGS", "GR_REGS", "FR_REGS", \
909 "GR_AND_FR_REGS", "AR_M_REGS", "AR_I_REGS", "ALL_REGS" }
911 /* An initializer containing the contents of the register classes, as integers
912 which are bit masks. The Nth integer specifies the contents of class N.
913 The way the integer MASK is interpreted is that register R is in the class
914 if `MASK & (1 << R)' is 1. */
915 #define REG_CLASS_CONTENTS \
918 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
919 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
920 0x00000000, 0x00000000, 0x0000 }, \
922 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
923 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
924 0xFFFFFFFF, 0xFFFFFFFF, 0x0000 }, \
926 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
927 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
928 0x00000000, 0x00000000, 0x00FF }, \
930 { 0x0000000F, 0x00000000, 0x00000000, 0x00000000, \
931 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
932 0x00000000, 0x00000000, 0x0000 }, \
934 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
935 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
936 0x00000000, 0x00000000, 0x0300 }, \
938 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
939 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
940 0x00000000, 0x00000000, 0x0000 }, \
941 /* GR_AND_FR_REGS. */ \
942 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
943 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
944 0x00000000, 0x00000000, 0x0300 }, \
946 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
947 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
948 0x00000000, 0x00000000, 0x0C00 }, \
950 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
951 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
952 0x00000000, 0x00000000, 0x7000 }, \
954 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
955 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
956 0xFFFFFFFF, 0xFFFFFFFF, 0x7FFF }, \
959 /* A C expression whose value is a register class containing hard register
960 REGNO. In general there is more than one such class; choose a class which
961 is "minimal", meaning that no smaller class also contains the register. */
962 /* The NO_REGS case is primarily for the benefit of rws_access_reg, which
963 may call here with private (invalid) register numbers, such as
965 #define REGNO_REG_CLASS(REGNO) \
966 (ADDL_REGNO_P (REGNO) ? ADDL_REGS \
967 : GENERAL_REGNO_P (REGNO) ? GR_REGS \
968 : FR_REGNO_P (REGNO) ? FR_REGS \
969 : PR_REGNO_P (REGNO) ? PR_REGS \
970 : BR_REGNO_P (REGNO) ? BR_REGS \
971 : AR_M_REGNO_P (REGNO) ? AR_M_REGS \
972 : AR_I_REGNO_P (REGNO) ? AR_I_REGS \
975 /* A macro whose definition is the name of the class to which a valid base
976 register must belong. A base register is one used in an address which is
977 the register value plus a displacement. */
978 #define BASE_REG_CLASS GENERAL_REGS
980 /* A macro whose definition is the name of the class to which a valid index
981 register must belong. An index register is one used in an address where its
982 value is either multiplied by a scale factor or added to another register
983 (as well as added to a displacement). This is needed for POST_MODIFY. */
984 #define INDEX_REG_CLASS GENERAL_REGS
986 /* A C expression which defines the machine-dependent operand constraint
987 letters for register classes. If CHAR is such a letter, the value should be
988 the register class corresponding to it. Otherwise, the value should be
989 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
990 will not be passed to this macro; you do not need to handle it. */
992 #define REG_CLASS_FROM_LETTER(CHAR) \
993 ((CHAR) == 'f' ? FR_REGS \
994 : (CHAR) == 'a' ? ADDL_REGS \
995 : (CHAR) == 'b' ? BR_REGS \
996 : (CHAR) == 'c' ? PR_REGS \
997 : (CHAR) == 'd' ? AR_M_REGS \
998 : (CHAR) == 'e' ? AR_I_REGS \
1001 /* A C expression which is nonzero if register number NUM is suitable for use
1002 as a base register in operand addresses. It may be either a suitable hard
1003 register or a pseudo register that has been allocated such a hard reg. */
1004 #define REGNO_OK_FOR_BASE_P(REGNO) \
1005 (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))
1007 /* A C expression which is nonzero if register number NUM is suitable for use
1008 as an index register in operand addresses. It may be either a suitable hard
1009 register or a pseudo register that has been allocated such a hard reg.
1010 This is needed for POST_MODIFY. */
1011 #define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM)
1013 /* A C expression that places additional restrictions on the register class to
1014 use when it is necessary to copy value X into a register in class CLASS.
1015 The value is a register class; perhaps CLASS, or perhaps another, smaller
1018 /* Don't allow volatile mem reloads into floating point registers. This
1019 is defined to force reload to choose the r/m case instead of the f/f case
1020 when reloading (set (reg fX) (mem/v)).
1022 Do not reload expressions into AR regs. */
1024 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
1025 (CLASS == FR_REGS && GET_CODE (X) == MEM && MEM_VOLATILE_P (X) ? NO_REGS \
1026 : CLASS == FR_REGS && GET_CODE (X) == CONST_DOUBLE ? NO_REGS \
1027 : GET_RTX_CLASS (GET_CODE (X)) != 'o' && CLASS > GR_AND_FR_REGS ? NO_REGS \
1030 /* You should define this macro to indicate to the reload phase that it may
1031 need to allocate at least one register for a reload in addition to the
1032 register to contain the data. Specifically, if copying X to a register
1033 CLASS in MODE requires an intermediate register, you should define this
1034 to return the largest register class all of whose registers can be used
1035 as intermediate registers or scratch registers. */
1037 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
1038 ia64_secondary_reload_class (CLASS, MODE, X)
1040 /* Certain machines have the property that some registers cannot be copied to
1041 some other registers without using memory. Define this macro on those
1042 machines to be a C expression that is non-zero if objects of mode M in
1043 registers of CLASS1 can only be copied to registers of class CLASS2 by
1044 storing a register of CLASS1 into memory and loading that memory location
1045 into a register of CLASS2. */
1048 /* ??? May need this, but since we've disallowed TFmode in GR_REGS,
1049 I'm not quite sure how it could be invoked. The normal problems
1050 with unions should be solved with the addressof fiddling done by
1051 movtf and friends. */
1052 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1053 ((MODE) == TFmode && (((CLASS1) == GR_REGS && (CLASS2) == FR_REGS) \
1054 || ((CLASS1) == FR_REGS && (CLASS2) == GR_REGS)))
1057 /* A C expression for the maximum number of consecutive registers of
1058 class CLASS needed to hold a value of mode MODE.
1059 This is closely related to the macro `HARD_REGNO_NREGS'. */
1061 #define CLASS_MAX_NREGS(CLASS, MODE) \
1062 ((MODE) == BImode && (CLASS) == PR_REGS ? 2 \
1063 : ((CLASS) == FR_REGS && (MODE) == TFmode) ? 1 \
1064 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1066 /* If defined, gives a class of registers that cannot be used as the
1067 operand of a SUBREG that changes the mode of the object illegally. */
1069 #define CLASS_CANNOT_CHANGE_MODE FR_REGS
1071 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE.
1072 In FP regs, we can't change FP values to integer values and vice
1073 versa, but we can change e.g. DImode to SImode. */
1075 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
1076 (GET_MODE_CLASS (FROM) != GET_MODE_CLASS (TO))
1078 /* A C expression that defines the machine-dependent operand constraint
1079 letters (`I', `J', `K', .. 'P') that specify particular ranges of
1082 /* 14 bit signed immediate for arithmetic instructions. */
1083 #define CONST_OK_FOR_I(VALUE) \
1084 ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)
1085 /* 22 bit signed immediate for arith instructions with r0/r1/r2/r3 source. */
1086 #define CONST_OK_FOR_J(VALUE) \
1087 ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)
1088 /* 8 bit signed immediate for logical instructions. */
1089 #define CONST_OK_FOR_K(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)
1090 /* 8 bit adjusted signed immediate for compare pseudo-ops. */
1091 #define CONST_OK_FOR_L(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)
1092 /* 6 bit unsigned immediate for shift counts. */
1093 #define CONST_OK_FOR_M(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)
1094 /* 9 bit signed immediate for load/store post-increments. */
1095 #define CONST_OK_FOR_N(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)
1096 /* 0 for r0. Used by Linux kernel, do not change. */
1097 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
1098 /* 0 or -1 for dep instruction. */
1099 #define CONST_OK_FOR_P(VALUE) ((VALUE) == 0 || (VALUE) == -1)
1101 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1102 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) \
1103 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \
1104 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \
1105 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \
1106 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \
1107 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \
1108 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \
1109 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \
1112 /* A C expression that defines the machine-dependent operand constraint letters
1113 (`G', `H') that specify particular ranges of `const_double' values. */
1115 /* 0.0 and 1.0 for fr0 and fr1. */
1116 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
1117 ((VALUE) == CONST0_RTX (GET_MODE (VALUE)) \
1118 || (VALUE) == CONST1_RTX (GET_MODE (VALUE)))
1120 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1121 ((C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) : 0)
1123 /* A C expression that defines the optional machine-dependent constraint
1124 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
1125 types of operands, usually memory references, for the target machine. */
1127 /* Non-volatile memory for FP_REG loads/stores. */
1128 #define CONSTRAINT_OK_FOR_Q(VALUE) \
1129 (memory_operand((VALUE), VOIDmode) && ! MEM_VOLATILE_P (VALUE))
1130 /* 1..4 for shladd arguments. */
1131 #define CONSTRAINT_OK_FOR_R(VALUE) \
1132 (GET_CODE (VALUE) == CONST_INT && INTVAL (VALUE) >= 1 && INTVAL (VALUE) <= 4)
1133 /* Non-post-inc memory for asms and other unsavory creatures. */
1134 #define CONSTRAINT_OK_FOR_S(VALUE) \
1135 (GET_CODE (VALUE) == MEM \
1136 && GET_RTX_CLASS (GET_CODE (XEXP ((VALUE), 0))) != 'a' \
1137 && (reload_in_progress || memory_operand ((VALUE), VOIDmode)))
1139 #define EXTRA_CONSTRAINT(VALUE, C) \
1140 ((C) == 'Q' ? CONSTRAINT_OK_FOR_Q (VALUE) \
1141 : (C) == 'R' ? CONSTRAINT_OK_FOR_R (VALUE) \
1142 : (C) == 'S' ? CONSTRAINT_OK_FOR_S (VALUE) \
1145 /* Basic Stack Layout */
1147 /* Define this macro if pushing a word onto the stack moves the stack pointer
1148 to a smaller address. */
1149 #define STACK_GROWS_DOWNWARD 1
1151 /* Define this macro if the addresses of local variable slots are at negative
1152 offsets from the frame pointer. */
1153 /* #define FRAME_GROWS_DOWNWARD */
1155 /* Offset from the frame pointer to the first local variable slot to
1157 #define STARTING_FRAME_OFFSET 0
1159 /* Offset from the stack pointer register to the first location at which
1160 outgoing arguments are placed. If not specified, the default value of zero
1161 is used. This is the proper value for most machines. */
1162 /* IA64 has a 16 byte scratch area that is at the bottom of the stack. */
1163 #define STACK_POINTER_OFFSET 16
1165 /* Offset from the argument pointer register to the first argument's address.
1166 On some machines it may depend on the data type of the function. */
1167 #define FIRST_PARM_OFFSET(FUNDECL) 0
1169 /* A C expression whose value is RTL representing the value of the return
1170 address for the frame COUNT steps up from the current frame, after the
1173 /* ??? Frames other than zero would likely require interpreting the frame
1174 unwind info, so we don't try to support them. We would also need to define
1175 DYNAMIC_CHAIN_ADDRESS and SETUP_FRAME_ADDRESS (for the reg stack flush). */
1177 #define RETURN_ADDR_RTX(COUNT, FRAME) \
1178 ((COUNT) == 0 ? return_address_pointer_rtx : const0_rtx)
1180 /* A C expression whose value is RTL representing the location of the incoming
1181 return address at the beginning of any function, before the prologue. This
1182 RTL is either a `REG', indicating that the return value is saved in `REG',
1183 or a `MEM' representing a location in the stack. This enables DWARF2
1184 unwind info for C++ EH. */
1185 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0))
1187 /* ??? This is not defined because of three problems.
1188 1) dwarf2out.c assumes that DWARF_FRAME_RETURN_COLUMN fits in one byte.
1189 The default value is FIRST_PSEUDO_REGISTER which doesn't. This can be
1190 worked around by setting PC_REGNUM to FR_REG (0) which is an otherwise
1191 unused register number.
1192 2) dwarf2out_frame_debug core dumps while processing prologue insns. We
1193 need to refine which insns have RTX_FRAME_RELATED_P set and which don't.
1194 3) It isn't possible to turn off EH frame info by defining DWARF2_UNIND_INFO
1195 to zero, despite what the documentation implies, because it is tested in
1196 a few places with #ifdef instead of #if. */
1197 #undef INCOMING_RETURN_ADDR_RTX
1199 /* A C expression whose value is an integer giving the offset, in bytes, from
1200 the value of the stack pointer register to the top of the stack frame at the
1201 beginning of any function, before the prologue. The top of the frame is
1202 defined to be the value of the stack pointer in the previous frame, just
1203 before the call instruction. */
1204 #define INCOMING_FRAME_SP_OFFSET 0
1207 /* Register That Address the Stack Frame. */
1209 /* The register number of the stack pointer register, which must also be a
1210 fixed register according to `FIXED_REGISTERS'. On most machines, the
1211 hardware determines which register this is. */
1213 #define STACK_POINTER_REGNUM 12
1215 /* The register number of the frame pointer register, which is used to access
1216 automatic variables in the stack frame. On some machines, the hardware
1217 determines which register this is. On other machines, you can choose any
1218 register you wish for this purpose. */
1220 #define FRAME_POINTER_REGNUM 328
1222 /* Base register for access to local variables of the function. */
1223 #define HARD_FRAME_POINTER_REGNUM LOC_REG (79)
1225 /* The register number of the arg pointer register, which is used to access the
1226 function's argument list. */
1227 /* r0 won't otherwise be used, so put the always eliminated argument pointer
1229 #define ARG_POINTER_REGNUM R_GR(0)
1231 /* The register number for the return address register. For IA-64, this
1232 is not actually a pointer as the name suggests, but that's a name that
1233 gen_rtx_REG already takes care to keep unique. We modify
1234 return_address_pointer_rtx in ia64_expand_prologue to reference the
1235 final output regnum. */
1236 #define RETURN_ADDRESS_POINTER_REGNUM 329
1238 /* Register numbers used for passing a function's static chain pointer. */
1239 /* ??? The ABI sez the static chain should be passed as a normal parameter. */
1240 #define STATIC_CHAIN_REGNUM 15
1242 /* Eliminating the Frame Pointer and the Arg Pointer */
1244 /* A C expression which is nonzero if a function must have and use a frame
1245 pointer. This expression is evaluated in the reload pass. If its value is
1246 nonzero the function will have a frame pointer. */
1247 #define FRAME_POINTER_REQUIRED 0
1249 /* Show we can debug even without a frame pointer. */
1250 #define CAN_DEBUG_WITHOUT_FP
1252 /* If defined, this macro specifies a table of register pairs used to eliminate
1253 unneeded registers that point into the stack frame. */
1255 #define ELIMINABLE_REGS \
1257 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1258 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
1259 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1260 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
1261 {RETURN_ADDRESS_POINTER_REGNUM, BR_REG (0)}, \
1264 /* A C expression that returns non-zero if the compiler is allowed to try to
1265 replace register number FROM with register number TO. The frame pointer
1266 is automatically handled. */
1268 #define CAN_ELIMINATE(FROM, TO) \
1269 (TO == BR_REG (0) ? current_function_is_leaf : 1)
1271 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
1272 specifies the initial difference between the specified pair of
1273 registers. This macro must be defined if `ELIMINABLE_REGS' is
1275 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1276 ((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))
1278 /* Passing Function Arguments on the Stack */
1280 /* Define this macro if an argument declared in a prototype as an integral type
1281 smaller than `int' should actually be passed as an `int'. In addition to
1282 avoiding errors in certain cases of mismatch, it also makes for better code
1283 on certain machines. */
1284 /* ??? Investigate. */
1285 /* #define PROMOTE_PROTOTYPES */
1287 /* If defined, the maximum amount of space required for outgoing arguments will
1288 be computed and placed into the variable
1289 `current_function_outgoing_args_size'. */
1291 #define ACCUMULATE_OUTGOING_ARGS 1
1293 /* A C expression that should indicate the number of bytes of its own arguments
1294 that a function pops on returning, or 0 if the function pops no arguments
1295 and the caller must therefore pop them all after the function returns. */
1297 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
1300 /* Function Arguments in Registers */
1302 #define MAX_ARGUMENT_SLOTS 8
1303 #define MAX_INT_RETURN_SLOTS 4
1304 #define GR_ARG_FIRST IN_REG (0)
1305 #define GR_RET_FIRST GR_REG (8)
1306 #define GR_RET_LAST GR_REG (11)
1307 #define FR_ARG_FIRST FR_REG (8)
1308 #define FR_RET_FIRST FR_REG (8)
1309 #define FR_RET_LAST FR_REG (15)
1310 #define AR_ARG_FIRST OUT_REG (0)
1312 /* A C expression that controls whether a function argument is passed in a
1313 register, and which register. */
1315 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1316 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)
1318 /* Define this macro if the target machine has "register windows", so that the
1319 register in which a function sees an arguments is not necessarily the same
1320 as the one in which the caller passed the argument. */
1322 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1323 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)
1325 /* A C expression for the number of words, at the beginning of an argument,
1326 must be put in registers. The value must be zero for arguments that are
1327 passed entirely in registers or that are entirely pushed on the stack. */
1329 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1330 ia64_function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1332 /* A C expression that indicates when an argument must be passed by reference.
1333 If nonzero for an argument, a copy of that argument is made in memory and a
1334 pointer to the argument is passed instead of the argument itself. The
1335 pointer is passed in whatever way is appropriate for passing a pointer to
1338 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) 0
1340 /* A C type for declaring a variable that is used as the first argument of
1341 `FUNCTION_ARG' and other related values. For some target machines, the type
1342 `int' suffices and can hold the number of bytes of argument so far. */
1344 typedef struct ia64_args
1346 int words; /* # words of arguments so far */
1347 int fp_regs; /* # FR registers used so far */
1348 int prototype; /* whether function prototyped */
1351 /* A C statement (sans semicolon) for initializing the variable CUM for the
1352 state at the beginning of the argument list. */
1354 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
1357 (CUM).fp_regs = 0; \
1358 (CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
1361 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
1362 arguments for the function being compiled. If this macro is undefined,
1363 `INIT_CUMULATIVE_ARGS' is used instead. */
1365 /* We set prototype to true so that we never try to return a PARALLEL from
1367 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
1370 (CUM).fp_regs = 0; \
1371 (CUM).prototype = 1; \
1374 /* A C statement (sans semicolon) to update the summarizer variable CUM to
1375 advance past an argument in the argument list. The values MODE, TYPE and
1376 NAMED describe that argument. Once this is done, the variable CUM is
1377 suitable for analyzing the *following* argument with `FUNCTION_ARG'. */
1379 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1380 ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)
1382 /* If defined, a C expression that gives the alignment boundary, in bits, of an
1383 argument with the specified mode and type. */
1385 /* Arguments with alignment larger than 8 bytes start at the next even
1386 boundary. See ia64_function_arg. */
1388 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1389 (((TYPE) ? (TYPE_ALIGN (TYPE) > 8 * BITS_PER_UNIT) \
1390 : (((((MODE) == BLKmode \
1391 ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1392 + UNITS_PER_WORD - 1) / UNITS_PER_WORD) > 1)) \
1393 ? 128 : PARM_BOUNDARY)
1395 /* A C expression that is nonzero if REGNO is the number of a hard register in
1396 which function arguments are sometimes passed. This does *not* include
1397 implicit arguments such as the static chain and the structure-value address.
1398 On many machines, no registers can be used for this purpose since all
1399 function arguments are pushed on the stack. */
1400 #define FUNCTION_ARG_REGNO_P(REGNO) \
1401 (((REGNO) >= GR_ARG_FIRST && (REGNO) < (GR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
1402 || ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))
1404 /* Implement `va_start' for varargs and stdarg. */
1405 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1406 ia64_va_start (stdarg, valist, nextarg)
1408 /* Implement `va_arg'. */
1409 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1410 ia64_va_arg (valist, type)
1412 /* How Scalar Function Values are Returned */
1414 /* A C expression to create an RTX representing the place where a function
1415 returns a value of data type VALTYPE. */
1417 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1418 ia64_function_value (VALTYPE, FUNC)
1420 /* A C expression to create an RTX representing the place where a library
1421 function returns a value of mode MODE. */
1423 #define LIBCALL_VALUE(MODE) \
1424 gen_rtx_REG (MODE, \
1425 ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
1426 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
1427 ? FR_RET_FIRST : GR_RET_FIRST))
1429 /* A C expression that is nonzero if REGNO is the number of a hard register in
1430 which the values of called function may come back. */
1432 #define FUNCTION_VALUE_REGNO_P(REGNO) \
1433 (((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST) \
1434 || ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))
1437 /* How Large Values are Returned */
1439 /* A nonzero value says to return the function value in memory, just as large
1440 structures are always returned. */
1442 #define RETURN_IN_MEMORY(TYPE) \
1443 ia64_return_in_memory (TYPE)
1445 /* If you define this macro to be 0, then the conventions used for structure
1446 and union return values are decided by the `RETURN_IN_MEMORY' macro. */
1448 #define DEFAULT_PCC_STRUCT_RETURN 0
1450 /* If the structure value address is passed in a register, then
1451 `STRUCT_VALUE_REGNUM' should be the number of that register. */
1453 #define STRUCT_VALUE_REGNUM GR_REG (8)
1456 /* Caller-Saves Register Allocation */
1458 /* A C expression to determine whether it is worthwhile to consider placing a
1459 pseudo-register in a call-clobbered hard register and saving and restoring
1460 it around each function call. The expression should be 1 when this is worth
1461 doing, and 0 otherwise.
1463 If you don't define this macro, a default is used which is good on most
1464 machines: `4 * CALLS < REFS'. */
1465 /* ??? Investigate. */
1466 /* #define CALLER_SAVE_PROFITABLE(REFS, CALLS) */
1469 /* Function Entry and Exit */
1471 /* A C compound statement that outputs the assembler code for entry to a
1474 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1475 ia64_function_prologue (FILE, SIZE)
1477 /* This macro notes the end of the prologue. */
1479 #define FUNCTION_END_PROLOGUE(FILE) ia64_output_end_prologue (FILE)
1481 /* Define this macro as a C expression that is nonzero if the return
1482 instruction or the function epilogue ignores the value of the stack pointer;
1483 in other words, if it is safe to delete an instruction to adjust the stack
1484 pointer before a return from the function. */
1486 #define EXIT_IGNORE_STACK 1
1488 /* Define this macro as a C expression that is nonzero for registers
1489 used by the epilogue or the `return' pattern. */
1491 #define EPILOGUE_USES(REGNO) ia64_epilogue_uses (REGNO)
1493 /* A C compound statement that outputs the assembler code for exit from a
1496 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1497 ia64_function_epilogue (FILE, SIZE)
1499 /* Output at beginning of assembler file. */
1501 #define ASM_FILE_START(FILE) \
1502 emit_safe_across_calls (FILE)
1504 /* A C compound statement that outputs the assembler code for a thunk function,
1505 used to implement C++ virtual function calls with multiple inheritance. */
1507 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
1509 if (CONST_OK_FOR_I (DELTA)) \
1510 fprintf (FILE, "\tadds r32 = %d, r32\n", (DELTA)); \
1513 if (CONST_OK_FOR_J (DELTA)) \
1514 fprintf (FILE, "\taddl r2 = %d, r0\n", (DELTA)); \
1516 fprintf (FILE, "\tmovl r2 = %d\n", (DELTA)); \
1517 fprintf (FILE, "\t;;\n"); \
1518 fprintf (FILE, "\tadd r32 = r2, r32\n"); \
1520 fprintf (FILE, "\tbr "); \
1521 assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
1522 fprintf (FILE, "\n"); \
1526 /* Generating Code for Profiling. */
1528 /* A C statement or compound statement to output to FILE some assembler code to
1529 call the profiling subroutine `mcount'. */
1531 /* ??? Unclear if this will actually work. No way to test this currently. */
1533 #define FUNCTION_PROFILER(FILE, LABELNO) \
1536 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", LABELNO); \
1537 fputs ("\taddl r16 = @ltoff(", FILE); \
1538 assemble_name (FILE, buf); \
1539 fputs ("), gp\n", FILE); \
1540 fputs ("\tmov r17 = r1;;\n", FILE); \
1541 fputs ("\tld8 out0 = [r16]\n", FILE); \
1542 fputs ("\tmov r18 = b0\n", FILE); \
1543 fputs ("\tbr.call.sptk.many rp = mcount;;\n", FILE); \
1544 fputs ("\tmov b0 = r18\n", FILE); \
1545 fputs ("\tmov r1 = r17;;\n", FILE); \
1548 /* A C statement or compound statement to output to FILE some assembler code to
1549 initialize basic-block profiling for the current object module. */
1551 /* ??? Unclear if this will actually work. No way to test this currently. */
1553 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1555 int labelno = LABELNO; \
1556 switch (profile_block_flag) \
1559 fputs ("\taddl r16 = @ltoff(LPBX0), gp\n", FILE); \
1560 fprintf (FILE, "\tmov out1 = %d;;\n", labelno); \
1561 fputs ("\tld8 out0 = [r16]\n", FILE); \
1562 fputs ("\tmov r17 = r1\n", FILE); \
1563 fputs ("\tmov r18 = b0\n", FILE); \
1564 fputs ("\tbr.call.sptk.many rp = __bb_init_trace_func;;\n", FILE);\
1565 fputs ("\tmov r1 = r17\n", FILE); \
1566 fputs ("\tmov b0 = r18;;\n", FILE); \
1569 fputs ("\taddl r16 = @ltoff(LPBX0), gp;;\n", FILE); \
1570 fputs ("\tld8 out0 = [r16];;\n", FILE); \
1571 fputs ("\tld8 r17 = [out0];;\n", FILE); \
1572 fputs ("\tcmp.eq p6, p0 = r0, r17;;\n", FILE); \
1573 fputs ("(p6)\tmov r16 = r1\n", FILE); \
1574 fputs ("(p6)\tmov r17 = b0\n", FILE); \
1575 fputs ("(p6)\tbr.call.sptk.many rp = __bb_init_func;;\n", FILE); \
1576 fputs ("(p6)\tmov r1 = r16\n", FILE); \
1577 fputs ("(p6)\tmov b0 = r17;;\n", FILE); \
1582 /* A C statement or compound statement to output to FILE some assembler code to
1583 increment the count associated with the basic block number BLOCKNO. */
1585 /* ??? This can't work unless we mark some registers as fixed, so that we
1586 can use them as temporaries in this macro. We need two registers for -a
1587 profiling and 4 registers for -ax profiling. */
1589 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1591 int blockn = BLOCKNO; \
1592 switch (profile_block_flag) \
1595 fputs ("\taddl r2 = @ltoff(__bb), gp\n", FILE); \
1596 fputs ("\taddl r3 = @ltoff(LPBX0), gp;;\n", FILE); \
1597 fprintf (FILE, "\tmov r9 = %d\n", blockn); \
1598 fputs ("\tld8 r2 = [r2]\n", FILE); \
1599 fputs ("\tld8 r3 = [r3];;\n", FILE); \
1600 fputs ("\tadd r8 = 8, r2\n", FILE); \
1601 fputs ("\tst8 [r2] = r9;;\n", FILE); \
1602 fputs ("\tst8 [r8] = r3\n", FILE); \
1603 fputs ("\tbr.call.sptk.many rp = __bb_trace_func\n", FILE); \
1607 fputs ("\taddl r2 = @ltoff(LPBX2), gp;;\n", FILE); \
1608 fputs ("\tld8 r2 = [r2];;\n", FILE); \
1609 fprintf (FILE, "\taddl r2 = %d, r2;;\n", 8 * blockn); \
1610 fputs ("\tld8 r3 = [r2];;\n", FILE); \
1611 fputs ("\tadd r3 = 1, r3;;\n", FILE); \
1612 fputs ("\tst8 [r2] = r3;;\n", FILE); \
1617 /* A C statement or compound statement to output to FILE assembler
1618 code to call function `__bb_trace_ret'. */
1620 /* ??? Unclear if this will actually work. No way to test this currently. */
1622 /* ??? This needs to be emitted into the epilogue. Perhaps rewrite to emit
1623 rtl and call from ia64_expand_epilogue? */
1625 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1626 fputs ("\tbr.call.sptk.many rp = __bb_trace_ret\n", FILE);
1627 #undef FUNCTION_BLOCK_PROFILER_EXIT
1629 /* A C statement or compound statement to save all registers, which may be
1630 clobbered by a function call, including condition codes. */
1632 /* ??? We would have to save 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly
1633 other things. This is not practical. Perhaps leave this feature (-ax)
1634 unsupported by undefining above macros? */
1636 /* #define MACHINE_STATE_SAVE(ID) */
1638 /* A C statement or compound statement to restore all registers, including
1639 condition codes, saved by `MACHINE_STATE_SAVE'. */
1641 /* ??? We would have to restore 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly
1642 other things. This is not practical. Perhaps leave this feature (-ax)
1643 unsupported by undefining above macros? */
1645 /* #define MACHINE_STATE_RESTORE(ID) */
1648 /* Implementing the Varargs Macros. */
1650 /* Define this macro to store the anonymous register arguments into the stack
1651 so that all the arguments appear to have been passed consecutively on the
1654 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_ARGS_SIZE, SECOND_TIME) \
1655 ia64_setup_incoming_varargs (ARGS_SO_FAR, MODE, TYPE, & PRETEND_ARGS_SIZE, SECOND_TIME)
1657 /* Define this macro if the location where a function argument is passed
1658 depends on whether or not it is a named argument. */
1660 #define STRICT_ARGUMENT_NAMING 1
1663 /* Trampolines for Nested Functions. */
1665 /* We need 32 bytes, so we can save the sp, ar.rnat, ar.bsp, and ar.pfs of
1666 the function containing a non-local goto target. */
1668 #define STACK_SAVEAREA_MODE(LEVEL) \
1669 ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
1671 /* Output assembler code for a block containing the constant parts of
1672 a trampoline, leaving space for the variable parts.
1674 The trampoline should set the static chain pointer to value placed
1675 into the trampoline and should branch to the specified routine.
1676 To make the normal indirect-subroutine calling convention work,
1677 the trampoline must look like a function descriptor; the first
1678 word being the target address and the second being the target's
1681 We abuse the concept of a global pointer by arranging for it
1682 to point to the data we need to load. The complete trampoline
1683 has the following form:
1685 +-------------------+ \
1686 TRAMP: | __ia64_trampoline | |
1687 +-------------------+ > fake function descriptor
1689 +-------------------+ /
1690 | target descriptor |
1691 +-------------------+
1693 +-------------------+
1696 /* A C expression for the size in bytes of the trampoline, as an integer. */
1698 #define TRAMPOLINE_SIZE 32
1700 /* Alignment required for trampolines, in bits. */
1702 #define TRAMPOLINE_ALIGNMENT 64
1704 /* A C statement to initialize the variable parts of a trampoline. */
1706 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
1707 ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN))
1709 /* Implicit Calls to Library Routines */
1711 /* ??? The ia64 linux kernel requires that we use the standard names for
1712 divide and modulo routines. However, if we aren't careful, lib1funcs.asm
1713 will be overridden by libgcc2.c. We avoid this by using different names
1714 for lib1funcs.asm modules, e.g. __divdi3 vs _divdi3. Since lib1funcs.asm
1715 goes into libgcc.a first, the linker will find it first. */
1717 /* Define this macro if GNU CC should generate calls to the System V (and ANSI
1718 C) library functions `memcpy' and `memset' rather than the BSD functions
1719 `bcopy' and `bzero'. */
1721 #define TARGET_MEM_FUNCTIONS
1724 /* Addressing Modes */
1726 /* Define this macro if the machine supports post-increment addressing. */
1728 #define HAVE_POST_INCREMENT 1
1729 #define HAVE_POST_DECREMENT 1
1730 #define HAVE_POST_MODIFY_DISP 1
1731 #define HAVE_POST_MODIFY_REG 1
1733 /* A C expression that is 1 if the RTX X is a constant which is a valid
1736 #define CONSTANT_ADDRESS_P(X) 0
1738 /* The max number of registers that can appear in a valid memory address. */
1740 #define MAX_REGS_PER_ADDRESS 2
1742 /* A C compound statement with a conditional `goto LABEL;' executed if X (an
1743 RTX) is a legitimate memory address on the target machine for a memory
1744 operand of mode MODE. */
1746 #define LEGITIMATE_ADDRESS_REG(X) \
1747 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1748 || (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG \
1749 && REG_OK_FOR_BASE_P (XEXP (X, 0))))
1751 #define LEGITIMATE_ADDRESS_DISP(R, X) \
1752 (GET_CODE (X) == PLUS \
1753 && rtx_equal_p (R, XEXP (X, 0)) \
1754 && (LEGITIMATE_ADDRESS_REG (XEXP (X, 1)) \
1755 || (GET_CODE (XEXP (X, 1)) == CONST_INT \
1756 && INTVAL (XEXP (X, 1)) >= -256 \
1757 && INTVAL (XEXP (X, 1)) < 256)))
1759 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
1761 if (LEGITIMATE_ADDRESS_REG (X)) \
1763 else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \
1764 && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
1765 && XEXP (X, 0) != arg_pointer_rtx) \
1767 else if (GET_CODE (X) == POST_MODIFY \
1768 && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
1769 && XEXP (X, 0) != arg_pointer_rtx \
1770 && LEGITIMATE_ADDRESS_DISP (XEXP (X, 0), XEXP (X, 1))) \
1774 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1775 use as a base register. */
1777 #ifdef REG_OK_STRICT
1778 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1780 #define REG_OK_FOR_BASE_P(X) \
1781 (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1784 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1785 use as an index register. This is needed for POST_MODIFY. */
1787 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1789 /* A C compound statement that attempts to replace X with a valid memory
1790 address for an operand of mode MODE.
1792 This must be present, but there is nothing useful to be done here. */
1794 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1796 /* A C statement or compound statement with a conditional `goto LABEL;'
1797 executed if memory address X (an RTX) can have different meanings depending
1798 on the machine mode of the memory reference it is used for or if the address
1799 is valid for some modes but not others. */
1801 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1802 if (GET_CODE (ADDR) == POST_DEC || GET_CODE (ADDR) == POST_INC) \
1805 /* A C expression that is nonzero if X is a legitimate constant for an
1806 immediate operand on the target machine. */
1808 #define LEGITIMATE_CONSTANT_P(X) \
1809 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
1810 || GET_MODE (X) == DImode || CONST_DOUBLE_OK_FOR_G (X)) \
1813 /* Condition Code Status */
1815 /* One some machines not all possible comparisons are defined, but you can
1816 convert an invalid comparison into a valid one. */
1817 /* ??? Investigate. See the alpha definition. */
1818 /* #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) */
1821 /* Describing Relative Costs of Operations */
1823 /* A part of a C `switch' statement that describes the relative costs of
1824 constant RTL expressions. */
1826 /* ??? This is incomplete. */
1828 #define CONST_COSTS(X, CODE, OUTER_CODE) \
1830 if ((X) == const0_rtx) \
1832 switch (OUTER_CODE) \
1835 return CONST_OK_FOR_J (INTVAL (X)) ? 0 : COSTS_N_INSNS (1); \
1837 if (CONST_OK_FOR_I (INTVAL (X))) \
1839 if (CONST_OK_FOR_J (INTVAL (X))) \
1841 return COSTS_N_INSNS (1); \
1843 if (CONST_OK_FOR_K (INTVAL (X)) || CONST_OK_FOR_L (INTVAL (X))) \
1845 return COSTS_N_INSNS (1); \
1847 case CONST_DOUBLE: \
1848 return COSTS_N_INSNS (1); \
1852 return COSTS_N_INSNS (3);
1854 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. */
1856 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1858 /* For multiplies wider than HImode, we have to go to the FPU, \
1859 which normally involves copies. Plus there's the latency \
1860 of the multiply itself, and the latency of the instructions to \
1861 transfer integer regs to FP regs. */ \
1862 if (GET_MODE_SIZE (GET_MODE (X)) > 2) \
1863 return COSTS_N_INSNS (10); \
1864 return COSTS_N_INSNS (2); \
1870 return COSTS_N_INSNS (1); \
1875 /* We make divide expensive, so that divide-by-constant will be \
1876 optimized to a multiply. */ \
1877 return COSTS_N_INSNS (60);
1879 /* An expression giving the cost of an addressing mode that contains ADDRESS.
1880 If not defined, the cost is computed from the ADDRESS expression and the
1881 `CONST_COSTS' values. */
1883 #define ADDRESS_COST(ADDRESS) 0
1885 /* A C expression for the cost of moving data from a register in class FROM to
1888 #define REGISTER_MOVE_COST(MODE, FROM, TO) \
1889 ia64_register_move_cost((FROM), (TO))
1891 /* A C expression for the cost of moving data of mode M between a
1892 register and memory. */
1893 #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
1894 ((CLASS) == GENERAL_REGS || (CLASS) == FR_REGS ? 4 : 10)
1896 /* A C expression for the cost of a branch instruction. A value of 1 is the
1897 default; other values are interpreted relative to that. Used by the
1898 if-conversion code as max instruction count. */
1899 /* ??? This requires investigation. The primary effect might be how
1900 many additional insn groups we run into, vs how good the dynamic
1901 branch predictor is. */
1903 #define BRANCH_COST 6
1905 /* Define this macro as a C expression which is nonzero if accessing less than
1906 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
1909 #define SLOW_BYTE_ACCESS 1
1911 /* Define this macro if it is as good or better to call a constant function
1912 address than to call an address kept in a register.
1914 Indirect function calls are more expensive that direct function calls, so
1915 don't cse function addresses. */
1917 #define NO_FUNCTION_CSE
1920 /* Dividing the output into sections. */
1922 /* A C expression whose value is a string containing the assembler operation
1923 that should precede instructions and read-only data. */
1925 #define TEXT_SECTION_ASM_OP "\t.text"
1927 /* A C expression whose value is a string containing the assembler operation to
1928 identify the following data as writable initialized data. */
1930 #define DATA_SECTION_ASM_OP "\t.data"
1932 /* If defined, a C expression whose value is a string containing the assembler
1933 operation to identify the following data as uninitialized global data. */
1935 #define BSS_SECTION_ASM_OP "\t.bss"
1937 /* Define this macro if jump tables (for `tablejump' insns) should be output in
1938 the text section, along with the assembler instructions. */
1940 /* ??? It is probably better for the jump tables to be in the rodata section,
1941 which is where they go by default. Unfortunately, that currently does not
1942 work, because of some problem with pcrelative relocations not getting
1943 resolved correctly. */
1944 /* ??? FIXME ??? rth says that we should use @gprel to solve this problem. */
1945 /* ??? If jump tables are in the text section, then we can use 4 byte
1946 entries instead of 8 byte entries. */
1948 #define JUMP_TABLES_IN_TEXT_SECTION 1
1950 /* Define this macro if references to a symbol must be treated differently
1951 depending on something about the variable or function named by the symbol
1952 (such as what section it is in). */
1954 #define ENCODE_SECTION_INFO(DECL) ia64_encode_section_info (DECL)
1956 /* If a variable is weakened, made one only or moved into a different
1957 section, it may be necessary to redo the section info to move the
1958 variable out of sdata. */
1960 #define REDO_SECTION_INFO_P(DECL) \
1961 ((TREE_CODE (DECL) == VAR_DECL) \
1962 && (DECL_ONE_ONLY (DECL) || DECL_WEAK (DECL) || DECL_COMMON (DECL) \
1963 || DECL_SECTION_NAME (DECL) != 0))
1965 #define SDATA_NAME_FLAG_CHAR '@'
1967 #define IA64_DEFAULT_GVALUE 8
1969 /* Decode SYM_NAME and store the real name part in VAR, sans the characters
1970 that encode section info. */
1972 #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
1973 (VAR) = (SYMBOL_NAME) + ((SYMBOL_NAME)[0] == SDATA_NAME_FLAG_CHAR)
1976 /* Position Independent Code. */
1978 /* The register number of the register used to address a table of static data
1979 addresses in memory. */
1981 /* ??? Should modify ia64.md to use pic_offset_table_rtx instead of
1982 gen_rtx_REG (DImode, 1). */
1984 /* ??? Should we set flag_pic? Probably need to define
1985 LEGITIMIZE_PIC_OPERAND_P to make that work. */
1987 #define PIC_OFFSET_TABLE_REGNUM GR_REG (1)
1989 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is
1990 clobbered by calls. */
1992 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
1995 /* The Overall Framework of an Assembler File. */
1997 /* A C string constant describing how to begin a comment in the target
1998 assembler language. The compiler assumes that the comment will end at the
2001 #define ASM_COMMENT_START "//"
2003 /* A C string constant for text to be output before each `asm' statement or
2004 group of consecutive ones. */
2006 /* ??? This won't work with the Intel assembler, because it does not accept
2007 # as a comment start character. However, //APP does not work in gas, so we
2008 can't use that either. Same problem for ASM_APP_OFF below. */
2010 #define ASM_APP_ON "#APP\n"
2012 /* A C string constant for text to be output after each `asm' statement or
2013 group of consecutive ones. */
2015 #define ASM_APP_OFF "#NO_APP\n"
2018 /* Output of Data. */
2020 /* A C statement to output to the stdio stream STREAM an assembler instruction
2021 to assemble a floating-point constant of `TFmode', `DFmode', `SFmode',
2022 respectively, whose value is VALUE. */
2024 /* ??? Must reverse the word order for big-endian code? */
2026 #define ASM_OUTPUT_LONG_DOUBLE(FILE, VALUE) \
2029 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, t); \
2030 fprintf (FILE, "\tdata4 0x%08lx, 0x%08lx, 0x%08lx, 0x%08lx\n", \
2031 t[0] & 0xffffffff, t[1] & 0xffffffff, t[2] & 0xffffffff, 0L);\
2034 /* ??? Must reverse the word order for big-endian code? */
2036 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2039 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, t); \
2040 fprintf (FILE, "\tdata8 0x%08lx%08lx\n", \
2041 t[1] & 0xffffffff, t[0] & 0xffffffff); \
2044 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2047 REAL_VALUE_TO_TARGET_SINGLE (VALUE, t); \
2048 fprintf (FILE, "\tdata4 0x%lx\n", t & 0xffffffff); \
2051 /* A C statement to output to the stdio stream STREAM an assembler instruction
2052 to assemble an integer of 1, 2, 4, or 8 bytes, respectively, whose value
2055 /* This is how to output an assembler line defining a `char' constant. */
2057 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
2059 fprintf (FILE, "%s", ASM_BYTE_OP); \
2060 output_addr_const (FILE, (VALUE)); \
2061 fprintf (FILE, "\n"); \
2064 /* This is how to output an assembler line defining a `short' constant. */
2066 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
2068 fprintf (FILE, "\tdata2\t"); \
2069 output_addr_const (FILE, (VALUE)); \
2070 fprintf (FILE, "\n"); \
2073 /* This is how to output an assembler line defining an `int' constant.
2074 We also handle symbol output here. */
2076 /* ??? For ILP32, also need to handle function addresses here. */
2078 #define ASM_OUTPUT_INT(FILE, VALUE) \
2080 fprintf (FILE, "\tdata4\t"); \
2081 output_addr_const (FILE, (VALUE)); \
2082 fprintf (FILE, "\n"); \
2085 /* This is how to output an assembler line defining a `long' constant.
2086 We also handle symbol output here. */
2088 #define ASM_OUTPUT_DOUBLE_INT(FILE, VALUE) \
2090 fprintf (FILE, "\tdata8\t"); \
2091 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \
2092 fprintf (FILE, "@fptr("); \
2093 output_addr_const (FILE, (VALUE)); \
2094 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \
2095 fprintf (FILE, ")"); \
2096 fprintf (FILE, "\n"); \
2099 /* This is how to output an assembler line defining a `char' constant
2100 to an xdata segment. */
2102 #define ASM_OUTPUT_XDATA_CHAR(FILE, SECTION, VALUE) \
2104 fprintf (FILE, "\t.xdata1\t\"%s\", ", SECTION); \
2105 output_addr_const (FILE, (VALUE)); \
2106 fprintf (FILE, "\n"); \
2109 /* This is how to output an assembler line defining a `short' constant
2110 to an xdata segment. */
2112 #define ASM_OUTPUT_XDATA_SHORT(FILE, SECTION, VALUE) \
2114 fprintf (FILE, "\t.xdata2\t\"%s\", ", SECTION); \
2115 output_addr_const (FILE, (VALUE)); \
2116 fprintf (FILE, "\n"); \
2119 /* This is how to output an assembler line defining an `int' constant
2120 to an xdata segment. We also handle symbol output here. */
2122 /* ??? For ILP32, also need to handle function addresses here. */
2124 #define ASM_OUTPUT_XDATA_INT(FILE, SECTION, VALUE) \
2126 fprintf (FILE, "\t.xdata4\t\"%s\", ", SECTION); \
2127 output_addr_const (FILE, (VALUE)); \
2128 fprintf (FILE, "\n"); \
2131 /* This is how to output an assembler line defining a `long' constant
2132 to an xdata segment. We also handle symbol output here. */
2134 #define ASM_OUTPUT_XDATA_DOUBLE_INT(FILE, SECTION, VALUE) \
2136 int need_closing_paren = 0; \
2137 fprintf (FILE, "\t.xdata8\t\"%s\", ", SECTION); \
2138 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) \
2139 && GET_CODE (VALUE) == SYMBOL_REF) \
2141 fprintf (FILE, SYMBOL_REF_FLAG (VALUE) ? "@fptr(" : "@segrel("); \
2142 need_closing_paren = 1; \
2144 output_addr_const (FILE, VALUE); \
2145 if (need_closing_paren) \
2146 fprintf (FILE, ")"); \
2147 fprintf (FILE, "\n"); \
2151 /* Output EH data to the unwind segment. */
2152 #define ASM_OUTPUT_EH_CHAR(FILE, VALUE) \
2153 ASM_OUTPUT_XDATA_CHAR(FILE, ".IA_64.unwind_info", VALUE)
2155 #define ASM_OUTPUT_EH_SHORT(FILE, VALUE) \
2156 ASM_OUTPUT_XDATA_SHORT(FILE, ".IA_64.unwind_info", VALUE)
2158 #define ASM_OUTPUT_EH_INT(FILE, VALUE) \
2159 ASM_OUTPUT_XDATA_INT(FILE, ".IA_64.unwind_info", VALUE)
2161 #define ASM_OUTPUT_EH_DOUBLE_INT(FILE, VALUE) \
2162 ASM_OUTPUT_XDATA_DOUBLE_INT(FILE, ".IA_64.unwind_info", VALUE)
2164 /* A C statement to output to the stdio stream STREAM an assembler instruction
2165 to assemble a single byte containing the number VALUE. */
2167 #define ASM_OUTPUT_BYTE(STREAM, VALUE) \
2168 fprintf (STREAM, "%s0x%x\n", ASM_BYTE_OP, (int)(VALUE) & 0xff)
2170 /* These macros are defined as C string constant, describing the syntax in the
2171 assembler for grouping arithmetic expressions. */
2173 #define ASM_OPEN_PAREN "("
2174 #define ASM_CLOSE_PAREN ")"
2177 /* Output of Uninitialized Variables. */
2179 /* This is all handled by svr4.h. */
2182 /* Output and Generation of Labels. */
2184 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2185 assembler definition of a label named NAME. */
2187 /* See the ASM_OUTPUT_LABELREF definition in sysv4.h for an explanation of
2188 why ia64_asm_output_label exists. */
2190 extern int ia64_asm_output_label;
2191 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
2193 ia64_asm_output_label = 1; \
2194 assemble_name (STREAM, NAME); \
2195 fputs (":\n", STREAM); \
2196 ia64_asm_output_label = 0; \
2199 /* A C statement (sans semicolon) to output to the stdio stream STREAM some
2200 commands that will make the label NAME global; that is, available for
2201 reference from other files. */
2203 #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
2205 fputs ("\t.global ", STREAM); \
2206 assemble_name (STREAM, NAME); \
2207 fputs ("\n", STREAM); \
2210 /* A C statement (sans semicolon) to output to the stdio stream STREAM any text
2211 necessary for declaring the name of an external symbol named NAME which is
2212 referenced in this compilation but not defined. */
2214 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
2215 ia64_asm_output_external (FILE, DECL, NAME)
2217 /* A C statement to store into the string STRING a label whose name is made
2218 from the string PREFIX and the number NUM. */
2220 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
2222 sprintf (LABEL, "*.%s%d", PREFIX, NUM); \
2225 /* A C expression to assign to OUTVAR (which is a variable of type `char *') a
2226 newly allocated string made from the string NAME and the number NUMBER, with
2227 some suitable punctuation added. */
2229 /* ??? Not sure if using a ? in the name for Intel as is safe. */
2231 #define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \
2233 (OUTVAR) = (char *) alloca (strlen (NAME) + 12); \
2234 sprintf (OUTVAR, "%s%c%ld", (NAME), (TARGET_GNU_AS ? '.' : '?'), \
2238 /* A C statement to output to the stdio stream STREAM assembler code which
2239 defines (equates) the symbol NAME to have the value VALUE. */
2241 #define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \
2243 assemble_name (STREAM, NAME); \
2244 fputs (" = ", STREAM); \
2245 assemble_name (STREAM, VALUE); \
2246 fputc ('\n', STREAM); \
2250 /* Macros Controlling Initialization Routines. */
2252 /* This is handled by svr4.h and sysv4.h. */
2255 /* Output of Assembler Instructions. */
2257 /* A C initializer containing the assembler's names for the machine registers,
2258 each one as a C string constant. */
2260 #define REGISTER_NAMES \
2262 /* General registers. */ \
2263 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
2264 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
2265 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
2267 /* Local registers. */ \
2268 "loc0", "loc1", "loc2", "loc3", "loc4", "loc5", "loc6", "loc7", \
2269 "loc8", "loc9", "loc10","loc11","loc12","loc13","loc14","loc15", \
2270 "loc16","loc17","loc18","loc19","loc20","loc21","loc22","loc23", \
2271 "loc24","loc25","loc26","loc27","loc28","loc29","loc30","loc31", \
2272 "loc32","loc33","loc34","loc35","loc36","loc37","loc38","loc39", \
2273 "loc40","loc41","loc42","loc43","loc44","loc45","loc46","loc47", \
2274 "loc48","loc49","loc50","loc51","loc52","loc53","loc54","loc55", \
2275 "loc56","loc57","loc58","loc59","loc60","loc61","loc62","loc63", \
2276 "loc64","loc65","loc66","loc67","loc68","loc69","loc70","loc71", \
2277 "loc72","loc73","loc74","loc75","loc76","loc77","loc78","loc79", \
2278 /* Input registers. */ \
2279 "in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7", \
2280 /* Output registers. */ \
2281 "out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7", \
2282 /* Floating-point registers. */ \
2283 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
2284 "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \
2285 "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \
2286 "f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", \
2287 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", \
2288 "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", \
2289 "f60", "f61", "f62", "f63", "f64", "f65", "f66", "f67", "f68", "f69", \
2290 "f70", "f71", "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", \
2291 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", "f88", "f89", \
2292 "f90", "f91", "f92", "f93", "f94", "f95", "f96", "f97", "f98", "f99", \
2293 "f100","f101","f102","f103","f104","f105","f106","f107","f108","f109",\
2294 "f110","f111","f112","f113","f114","f115","f116","f117","f118","f119",\
2295 "f120","f121","f122","f123","f124","f125","f126","f127", \
2296 /* Predicate registers. */ \
2297 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", \
2298 "p10", "p11", "p12", "p13", "p14", "p15", "p16", "p17", "p18", "p19", \
2299 "p20", "p21", "p22", "p23", "p24", "p25", "p26", "p27", "p28", "p29", \
2300 "p30", "p31", "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", \
2301 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", "p48", "p49", \
2302 "p50", "p51", "p52", "p53", "p54", "p55", "p56", "p57", "p58", "p59", \
2303 "p60", "p61", "p62", "p63", \
2304 /* Branch registers. */ \
2305 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", \
2306 /* Frame pointer. Return address. */ \
2307 "sfp", "retaddr", "ar.ccv", "ar.unat", "ar.pfs", "ar.lc", "ar.ec", \
2310 /* If defined, a C initializer for an array of structures containing a name and
2311 a register number. This macro defines additional names for hard registers,
2312 thus allowing the `asm' option in declarations to refer to registers using
2315 #define ADDITIONAL_REGISTER_NAMES \
2317 { "gp", R_GR (1) }, \
2318 { "sp", R_GR (12) }, \
2319 { "in0", IN_REG (0) }, \
2320 { "in1", IN_REG (1) }, \
2321 { "in2", IN_REG (2) }, \
2322 { "in3", IN_REG (3) }, \
2323 { "in4", IN_REG (4) }, \
2324 { "in5", IN_REG (5) }, \
2325 { "in6", IN_REG (6) }, \
2326 { "in7", IN_REG (7) }, \
2327 { "out0", OUT_REG (0) }, \
2328 { "out1", OUT_REG (1) }, \
2329 { "out2", OUT_REG (2) }, \
2330 { "out3", OUT_REG (3) }, \
2331 { "out4", OUT_REG (4) }, \
2332 { "out5", OUT_REG (5) }, \
2333 { "out6", OUT_REG (6) }, \
2334 { "out7", OUT_REG (7) }, \
2335 { "loc0", LOC_REG (0) }, \
2336 { "loc1", LOC_REG (1) }, \
2337 { "loc2", LOC_REG (2) }, \
2338 { "loc3", LOC_REG (3) }, \
2339 { "loc4", LOC_REG (4) }, \
2340 { "loc5", LOC_REG (5) }, \
2341 { "loc6", LOC_REG (6) }, \
2342 { "loc7", LOC_REG (7) }, \
2343 { "loc8", LOC_REG (8) }, \
2344 { "loc9", LOC_REG (9) }, \
2345 { "loc10", LOC_REG (10) }, \
2346 { "loc11", LOC_REG (11) }, \
2347 { "loc12", LOC_REG (12) }, \
2348 { "loc13", LOC_REG (13) }, \
2349 { "loc14", LOC_REG (14) }, \
2350 { "loc15", LOC_REG (15) }, \
2351 { "loc16", LOC_REG (16) }, \
2352 { "loc17", LOC_REG (17) }, \
2353 { "loc18", LOC_REG (18) }, \
2354 { "loc19", LOC_REG (19) }, \
2355 { "loc20", LOC_REG (20) }, \
2356 { "loc21", LOC_REG (21) }, \
2357 { "loc22", LOC_REG (22) }, \
2358 { "loc23", LOC_REG (23) }, \
2359 { "loc24", LOC_REG (24) }, \
2360 { "loc25", LOC_REG (25) }, \
2361 { "loc26", LOC_REG (26) }, \
2362 { "loc27", LOC_REG (27) }, \
2363 { "loc28", LOC_REG (28) }, \
2364 { "loc29", LOC_REG (29) }, \
2365 { "loc30", LOC_REG (30) }, \
2366 { "loc31", LOC_REG (31) }, \
2367 { "loc32", LOC_REG (32) }, \
2368 { "loc33", LOC_REG (33) }, \
2369 { "loc34", LOC_REG (34) }, \
2370 { "loc35", LOC_REG (35) }, \
2371 { "loc36", LOC_REG (36) }, \
2372 { "loc37", LOC_REG (37) }, \
2373 { "loc38", LOC_REG (38) }, \
2374 { "loc39", LOC_REG (39) }, \
2375 { "loc40", LOC_REG (40) }, \
2376 { "loc41", LOC_REG (41) }, \
2377 { "loc42", LOC_REG (42) }, \
2378 { "loc43", LOC_REG (43) }, \
2379 { "loc44", LOC_REG (44) }, \
2380 { "loc45", LOC_REG (45) }, \
2381 { "loc46", LOC_REG (46) }, \
2382 { "loc47", LOC_REG (47) }, \
2383 { "loc48", LOC_REG (48) }, \
2384 { "loc49", LOC_REG (49) }, \
2385 { "loc50", LOC_REG (50) }, \
2386 { "loc51", LOC_REG (51) }, \
2387 { "loc52", LOC_REG (52) }, \
2388 { "loc53", LOC_REG (53) }, \
2389 { "loc54", LOC_REG (54) }, \
2390 { "loc55", LOC_REG (55) }, \
2391 { "loc56", LOC_REG (56) }, \
2392 { "loc57", LOC_REG (57) }, \
2393 { "loc58", LOC_REG (58) }, \
2394 { "loc59", LOC_REG (59) }, \
2395 { "loc60", LOC_REG (60) }, \
2396 { "loc61", LOC_REG (61) }, \
2397 { "loc62", LOC_REG (62) }, \
2398 { "loc63", LOC_REG (63) }, \
2399 { "loc64", LOC_REG (64) }, \
2400 { "loc65", LOC_REG (65) }, \
2401 { "loc66", LOC_REG (66) }, \
2402 { "loc67", LOC_REG (67) }, \
2403 { "loc68", LOC_REG (68) }, \
2404 { "loc69", LOC_REG (69) }, \
2405 { "loc70", LOC_REG (70) }, \
2406 { "loc71", LOC_REG (71) }, \
2407 { "loc72", LOC_REG (72) }, \
2408 { "loc73", LOC_REG (73) }, \
2409 { "loc74", LOC_REG (74) }, \
2410 { "loc75", LOC_REG (75) }, \
2411 { "loc76", LOC_REG (76) }, \
2412 { "loc77", LOC_REG (77) }, \
2413 { "loc78", LOC_REG (78) }, \
2414 { "loc79", LOC_REG (79) }, \
2417 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2418 for an instruction operand X. X is an RTL expression. */
2420 #define PRINT_OPERAND(STREAM, X, CODE) \
2421 ia64_print_operand (STREAM, X, CODE)
2423 /* A C expression which evaluates to true if CODE is a valid punctuation
2424 character for use in the `PRINT_OPERAND' macro. */
2426 /* ??? Keep this around for now, as we might need it later. */
2428 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2429 ((CODE) == '+' || (CODE) == ',')
2431 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2432 for an instruction operand that is a memory reference whose address is X. X
2433 is an RTL expression. */
2435 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
2436 ia64_print_operand_address (STREAM, X)
2438 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and
2439 `%I' options of `asm_fprintf' (see `final.c'). */
2441 #define REGISTER_PREFIX ""
2442 #define LOCAL_LABEL_PREFIX "."
2443 #define USER_LABEL_PREFIX ""
2444 #define IMMEDIATE_PREFIX ""
2447 /* Output of dispatch tables. */
2449 /* This macro should be provided on machines where the addresses in a dispatch
2450 table are relative to the table's own address. */
2452 /* ??? Depends on the pointer size. */
2454 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
2455 fprintf (STREAM, "\tdata8 .L%d-.L%d\n", VALUE, REL)
2457 /* This is how to output an element of a case-vector that is absolute.
2458 (Ia64 does not use such vectors, but we must define this macro anyway.) */
2460 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) abort ()
2462 /* Define this if something special must be output at the end of a jump-table.
2463 We need to align back to a 16 byte boundary because offsets are smaller than
2466 #define ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) ASM_OUTPUT_ALIGN (STREAM, 4)
2468 /* Jump tables only need 8 byte alignment. */
2470 #define ADDR_VEC_ALIGN(ADDR_VEC) 3
2473 /* Assembler Commands for Exception Regions. */
2475 /* ??? This entire section of ia64.h needs to be implemented and then cleaned
2478 /* A C expression to output text to mark the start of an exception region.
2480 This macro need not be defined on most platforms. */
2481 /* #define ASM_OUTPUT_EH_REGION_BEG() */
2483 /* A C expression to output text to mark the end of an exception region.
2485 This macro need not be defined on most platforms. */
2486 /* #define ASM_OUTPUT_EH_REGION_END() */
2488 /* A C expression to switch to the section in which the main exception table is
2489 to be placed. The default is a section named `.gcc_except_table' on machines
2490 that support named sections via `ASM_OUTPUT_SECTION_NAME', otherwise if `-fpic'
2491 or `-fPIC' is in effect, the `data_section', otherwise the
2492 `readonly_data_section'. */
2493 /* #define EXCEPTION_SECTION() */
2495 /* If defined, a C string constant for the assembler operation to switch to the
2496 section for exception handling frame unwind information. If not defined,
2497 GNU CC will provide a default definition if the target supports named
2498 sections. `crtstuff.c' uses this macro to switch to the appropriate
2501 You should define this symbol if your target supports DWARF 2 frame unwind
2502 information and the default definition does not work. */
2503 #define EH_FRAME_SECTION_ASM_OP "\t.section\t.IA_64.unwind,\"aw\""
2505 /* A C expression that is nonzero if the normal exception table output should
2508 This macro need not be defined on most platforms. */
2509 /* #define OMIT_EH_TABLE() */
2511 /* Alternate runtime support for looking up an exception at runtime and finding
2512 the associated handler, if the default method won't work.
2514 This macro need not be defined on most platforms. */
2515 /* #define EH_TABLE_LOOKUP() */
2517 /* A C expression that decides whether or not the current function needs to
2518 have a function unwinder generated for it. See the file `except.c' for
2519 details on when to define this, and how. */
2520 /* #define DOESNT_NEED_UNWINDER */
2522 /* An rtx used to mask the return address found via RETURN_ADDR_RTX, so that it
2523 does not contain any extraneous set bits in it. */
2524 /* #define MASK_RETURN_ADDR */
2526 /* Assembler Commands for Alignment. */
2528 /* The alignment (log base 2) to put in front of LABEL, which follows
2531 /* ??? Investigate. */
2533 /* ??? Emitting align directives increases the size of the line number debug
2534 info, because each .align forces use of an extended opcode. Perhaps try
2535 to fix this in the assembler? */
2537 /* #define LABEL_ALIGN_AFTER_BARRIER(LABEL) */
2539 /* The desired alignment for the location counter at the beginning
2542 /* ??? Investigate. */
2543 /* #define LOOP_ALIGN(LABEL) */
2545 /* Define this macro if `ASM_OUTPUT_SKIP' should not be used in the text
2546 section because it fails put zeros in the bytes that are skipped. */
2548 #define ASM_NO_SKIP_IN_TEXT 1
2550 /* A C statement to output to the stdio stream STREAM an assembler command to
2551 advance the location counter to a multiple of 2 to the POWER bytes. */
2553 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
2554 fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
2557 /* Macros Affecting all Debug Formats. */
2559 /* This is handled in svr4.h and sysv4.h. */
2562 /* Specific Options for DBX Output. */
2564 /* This is handled by dbxelf.h which is included by svr4.h. */
2567 /* Open ended Hooks for DBX Output. */
2572 /* File names in DBX format. */
2577 /* Macros for SDB and Dwarf Output. */
2579 /* Define this macro if GNU CC should produce dwarf version 2 format debugging
2580 output in response to the `-g' option. */
2582 #define DWARF2_DEBUGGING_INFO
2584 /* Section names for DWARF2 debug info. */
2586 #define DEBUG_INFO_SECTION ".debug_info, \"\", \"progbits\""
2587 #define ABBREV_SECTION ".debug_abbrev, \"\", \"progbits\""
2588 #define ARANGES_SECTION ".debug_aranges, \"\", \"progbits\""
2589 #define DEBUG_LINE_SECTION ".debug_line, \"\", \"progbits\""
2590 #define PUBNAMES_SECTION ".debug_pubnames, \"\", \"progbits\""
2592 /* C string constants giving the pseudo-op to use for a sequence of
2593 2, 4, and 8 byte unaligned constants. dwarf2out.c needs these. */
2595 #define UNALIGNED_SHORT_ASM_OP "\tdata2.ua\t"
2596 #define UNALIGNED_INT_ASM_OP "\tdata4.ua\t"
2597 #define UNALIGNED_DOUBLE_INT_ASM_OP "\tdata8.ua\t"
2599 /* We need to override the default definition for this in dwarf2out.c so that
2600 we can emit the necessary # postfix. */
2601 #define ASM_NAME_TO_STRING(STR, NAME) \
2603 if ((NAME)[0] == '*') \
2604 dyn_string_append (STR, NAME + 1); \
2608 STRIP_NAME_ENCODING (newstr, NAME); \
2609 dyn_string_append (STR, user_label_prefix); \
2610 dyn_string_append (STR, newstr); \
2611 dyn_string_append (STR, "#"); \
2616 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DWARF2_ASM)
2618 /* Use tags for debug info labels, so that they don't break instruction
2619 bundles. This also avoids getting spurious DV warnings from the
2620 assembler. This is similar to ASM_OUTPUT_INTERNAL_LABEL, except that we
2621 add brackets around the label. */
2623 #define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM) \
2624 fprintf (FILE, "[.%s%d:]\n", PREFIX, NUM)
2626 /* Use section-relative relocations for debugging offsets. Unlike other
2627 targets that fake this by putting the section VMA at 0, IA-64 has
2628 proper relocations for them. */
2629 #define ASM_OUTPUT_DWARF_OFFSET(FILE, SIZE, LABEL) \
2631 fputs (((SIZE) == 4 ? UNALIGNED_INT_ASM_OP \
2632 : (SIZE) == 8 ? UNALIGNED_DOUBLE_INT_ASM_OP \
2633 : (abort (), "")), FILE); \
2634 fputs ("@secrel(", FILE); \
2635 assemble_name (FILE, LABEL); \
2636 fputc (')', FILE); \
2639 /* Emit a PC-relative relocation. */
2640 #define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL) \
2642 fputs (((SIZE) == 4 ? UNALIGNED_INT_ASM_OP \
2643 : (SIZE) == 8 ? UNALIGNED_DOUBLE_INT_ASM_OP \
2644 : (abort (), "")), FILE); \
2645 fputs ("@pcrel(", FILE); \
2646 assemble_name (FILE, LABEL); \
2647 fputc (')', FILE); \
2650 /* Cross Compilation and Floating Point. */
2652 /* Define to enable software floating point emulation. */
2653 #define REAL_ARITHMETIC
2656 /* Register Renaming Parameters. */
2658 /* A C expression that is nonzero if hard register number REGNO2 can be
2659 considered for use as a rename register for REGNO1 */
2661 #define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
2662 ia64_hard_regno_rename_ok((REGNO1), (REGNO2))
2664 /* Define this macro if the compiler should use extended basic blocks
2665 when renaming registers. Define this macro if the target has predicate
2668 #define RENAME_EXTENDED_BLOCKS
2671 /* Miscellaneous Parameters. */
2673 /* Define this if you have defined special-purpose predicates in the file
2674 `MACHINE.c'. For each predicate, list all rtl codes that can be in
2675 expressions matched by the predicate. */
2677 #define PREDICATE_CODES \
2678 { "call_operand", {SUBREG, REG, SYMBOL_REF}}, \
2679 { "got_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
2680 { "sdata_symbolic_operand", {SYMBOL_REF, CONST}}, \
2681 { "symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
2682 { "function_operand", {SYMBOL_REF}}, \
2683 { "setjmp_operand", {SYMBOL_REF}}, \
2684 { "destination_operand", {SUBREG, REG, MEM}}, \
2685 { "not_postinc_memory_operand", {MEM}}, \
2686 { "move_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2687 CONSTANT_P_RTX, SYMBOL_REF, CONST, LABEL_REF}}, \
2688 { "gr_register_operand", {SUBREG, REG}}, \
2689 { "fr_register_operand", {SUBREG, REG}}, \
2690 { "grfr_register_operand", {SUBREG, REG}}, \
2691 { "gr_nonimmediate_operand", {SUBREG, REG, MEM}}, \
2692 { "fr_nonimmediate_operand", {SUBREG, REG, MEM}}, \
2693 { "grfr_nonimmediate_operand", {SUBREG, REG, MEM}}, \
2694 { "gr_reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2695 { "gr_reg_or_5bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2696 { "gr_reg_or_6bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2697 { "gr_reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2698 { "grfr_reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2699 { "gr_reg_or_8bit_adjusted_operand", {SUBREG, REG, CONST_INT, \
2701 { "gr_reg_or_8bit_and_adjusted_operand", {SUBREG, REG, CONST_INT, \
2703 { "gr_reg_or_14bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2704 { "gr_reg_or_22bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2705 { "shift_count_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2706 { "shift_32bit_count_operand", {SUBREG, REG, CONST_INT, \
2708 { "shladd_operand", {CONST_INT}}, \
2709 { "fetchadd_operand", {CONST_INT}}, \
2710 { "fr_reg_or_fp01_operand", {SUBREG, REG, CONST_DOUBLE}}, \
2711 { "normal_comparison_operator", {EQ, NE, GT, LE, GTU, LEU}}, \
2712 { "adjusted_comparison_operator", {LT, GE, LTU, GEU}}, \
2713 { "signed_inequality_operator", {GE, GT, LE, LT}}, \
2714 { "predicate_operator", {NE, EQ}}, \
2715 { "ar_lc_reg_operand", {REG}}, \
2716 { "ar_ccv_reg_operand", {REG}}, \
2717 { "general_tfmode_operand", {SUBREG, REG, CONST_DOUBLE, MEM}}, \
2718 { "destination_tfmode_operand", {SUBREG, REG, MEM}}, \
2719 { "tfreg_or_fp01_operand", {REG, CONST_DOUBLE}},
2721 /* An alias for a machine mode name. This is the machine mode that elements of
2722 a jump-table should have. */
2724 #define CASE_VECTOR_MODE Pmode
2726 /* Define as C expression which evaluates to nonzero if the tablejump
2727 instruction expects the table to contain offsets from the address of the
2730 #define CASE_VECTOR_PC_RELATIVE 1
2732 /* Define this macro if operations between registers with integral mode smaller
2733 than a word are always performed on the entire register. */
2735 #define WORD_REGISTER_OPERATIONS
2737 /* Define this macro to be a C expression indicating when insns that read
2738 memory in MODE, an integral mode narrower than a word, set the bits outside
2739 of MODE to be either the sign-extension or the zero-extension of the data
2742 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
2744 /* An alias for a tree code that should be used by default for conversion of
2745 floating point values to fixed point. */
2747 /* ??? Looks like this macro is obsolete and should be deleted everywhere. */
2749 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2751 /* An alias for a tree code that is the easiest kind of division to compile
2752 code for in the general case. */
2754 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2756 /* The maximum number of bytes that a single instruction can move quickly from
2757 memory to memory. */
2760 /* A C expression which is nonzero if on this machine it is safe to "convert"
2761 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
2762 than INPREC) by merely operating on it as if it had only OUTPREC bits. */
2764 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2766 /* A C expression describing the value returned by a comparison operator with
2767 an integral mode and stored by a store-flag instruction (`sCOND') when the
2768 condition is true. */
2770 /* ??? Investigate using -1 instead of 1. */
2772 #define STORE_FLAG_VALUE 1
2774 /* An alias for the machine mode for pointers. */
2776 /* ??? This would change if we had ILP32 support. */
2778 #define Pmode DImode
2780 /* An alias for the machine mode used for memory references to functions being
2781 called, in `call' RTL expressions. */
2783 #define FUNCTION_MODE Pmode
2785 /* Define this macro to handle System V style pragmas: #pragma pack and
2786 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
2789 #define HANDLE_SYSV_PRAGMA
2791 /* If defined, a C expression whose value is nonzero if IDENTIFIER with
2792 arguments ARGS is a valid machine specific attribute for TYPE. The
2793 attributes in ATTRIBUTES have previously been assigned to TYPE. */
2795 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, IDENTIFIER, ARGS) \
2796 ia64_valid_type_attribute (TYPE, ATTRIBUTES, IDENTIFIER, ARGS)
2798 /* In rare cases, correct code generation requires extra machine dependent
2799 processing between the second jump optimization pass and delayed branch
2800 scheduling. On those machines, define this macro as a C statement to act on
2801 the code starting at INSN. */
2803 #define MACHINE_DEPENDENT_REORG(INSN) ia64_reorg (INSN)
2805 /* A C expression for the maximum number of instructions to execute via
2806 conditional execution instructions instead of a branch. A value of
2807 BRANCH_COST+1 is the default if the machine does not use
2808 cc0, and 1 if it does use cc0. */
2809 /* ??? Investigate. */
2810 #define MAX_CONDITIONAL_EXECUTE 12
2812 /* A C statement (sans semicolon) to update the integer scheduling
2813 priority `INSN_PRIORITY(INSN)'. */
2815 /* ??? Investigate. */
2816 /* #define ADJUST_PRIORITY (INSN) */
2818 /* A C statement (sans semicolon) to update the integer variable COST
2819 based on the relationship between INSN that is dependent on
2820 DEP_INSN through the dependence LINK. The default is to make no
2821 adjustment to COST. This can be used for example to specify to
2822 the scheduler that an output- or anti-dependence does not incur
2823 the same cost as a data-dependence. */
2825 #define ADJUST_COST(insn,link,dep_insn,cost) \
2826 (cost) = ia64_adjust_cost(insn, link, dep_insn, cost)
2828 #define ISSUE_RATE ia64_issue_rate ()
2830 #define MD_SCHED_INIT(DUMP, SCHED_VERBOSE, MAX_READY) \
2831 ia64_sched_init (DUMP, SCHED_VERBOSE, MAX_READY)
2833 #define MD_SCHED_REORDER(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \
2834 (CIM) = ia64_sched_reorder (DUMP, SCHED_VERBOSE, READY, &N_READY, 0, CLOCK)
2836 #define MD_SCHED_REORDER2(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \
2837 (CIM) = ia64_sched_reorder2 (DUMP, SCHED_VERBOSE, READY, &N_READY, CLOCK)
2839 #define MD_SCHED_FINISH(DUMP, SCHED_VERBOSE) \
2840 ia64_sched_finish (DUMP, SCHED_VERBOSE)
2842 #define MD_SCHED_VARIABLE_ISSUE(DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE) \
2844 = ia64_variable_issue (DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE))
2846 extern int ia64_final_schedule;
2848 /* ??? Hack until frame-ia64.c is updated.
2849 #define IA64_UNWIND_INFO 1
2852 #define HANDLER_SECTION fprintf (asm_out_file, "\t.personality\t__ia64_personality_v1\n\t.handlerdata\n");
2853 #define IA64_UNWIND_EMIT(f,i) process_for_unwind_directive (f,i)
2855 /* This function contains machine specific function data. */
2856 struct machine_function
2858 /* The new stack pointer when unwinding from EH. */
2859 struct rtx_def* ia64_eh_epilogue_sp;
2861 /* The new bsp value when unwinding from EH. */
2862 struct rtx_def* ia64_eh_epilogue_bsp;
2864 /* The GP value save register. */
2865 struct rtx_def* ia64_gp_save;
2867 /* The number of varargs registers to save. */
2874 IA64_BUILTIN_SYNCHRONIZE,
2876 IA64_BUILTIN_FETCH_AND_ADD_SI,
2877 IA64_BUILTIN_FETCH_AND_SUB_SI,
2878 IA64_BUILTIN_FETCH_AND_OR_SI,
2879 IA64_BUILTIN_FETCH_AND_AND_SI,
2880 IA64_BUILTIN_FETCH_AND_XOR_SI,
2881 IA64_BUILTIN_FETCH_AND_NAND_SI,
2883 IA64_BUILTIN_ADD_AND_FETCH_SI,
2884 IA64_BUILTIN_SUB_AND_FETCH_SI,
2885 IA64_BUILTIN_OR_AND_FETCH_SI,
2886 IA64_BUILTIN_AND_AND_FETCH_SI,
2887 IA64_BUILTIN_XOR_AND_FETCH_SI,
2888 IA64_BUILTIN_NAND_AND_FETCH_SI,
2890 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI,
2891 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI,
2893 IA64_BUILTIN_SYNCHRONIZE_SI,
2895 IA64_BUILTIN_LOCK_TEST_AND_SET_SI,
2897 IA64_BUILTIN_LOCK_RELEASE_SI,
2899 IA64_BUILTIN_FETCH_AND_ADD_DI,
2900 IA64_BUILTIN_FETCH_AND_SUB_DI,
2901 IA64_BUILTIN_FETCH_AND_OR_DI,
2902 IA64_BUILTIN_FETCH_AND_AND_DI,
2903 IA64_BUILTIN_FETCH_AND_XOR_DI,
2904 IA64_BUILTIN_FETCH_AND_NAND_DI,
2906 IA64_BUILTIN_ADD_AND_FETCH_DI,
2907 IA64_BUILTIN_SUB_AND_FETCH_DI,
2908 IA64_BUILTIN_OR_AND_FETCH_DI,
2909 IA64_BUILTIN_AND_AND_FETCH_DI,
2910 IA64_BUILTIN_XOR_AND_FETCH_DI,
2911 IA64_BUILTIN_NAND_AND_FETCH_DI,
2913 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI,
2914 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI,
2916 IA64_BUILTIN_SYNCHRONIZE_DI,
2918 IA64_BUILTIN_LOCK_TEST_AND_SET_DI,
2920 IA64_BUILTIN_LOCK_RELEASE_DI,
2923 IA64_BUILTIN_FLUSHRS
2926 /* Codes for expand_compare_and_swap and expand_swap_and_compare. */
2928 IA64_ADD_OP, IA64_SUB_OP, IA64_OR_OP, IA64_AND_OP, IA64_XOR_OP, IA64_NAND_OP
2931 #define MD_INIT_BUILTINS do { \
2932 ia64_init_builtins (); \
2935 #define MD_EXPAND_BUILTIN(EXP, TARGET, SUBTARGET, MODE, IGNORE) \
2936 ia64_expand_builtin ((EXP), (TARGET), (SUBTARGET), (MODE), (IGNORE))
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