1 ; Options for the ARM port of the compiler.
3 ; Copyright (C) 2005-2013 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
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13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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18 ; along with GCC; see the file COPYING3. If not see
19 ; <http://www.gnu.org/licenses/>.
25 Name(tls_type) Type(enum arm_tls_type)
29 Enum(tls_type) String(gnu) Value(TLS_GNU)
32 Enum(tls_type) String(gnu2) Value(TLS_GNU2)
35 Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI)
39 Name(arm_abi_type) Type(enum arm_abi_type)
40 Known ARM ABIs (for use with the -mabi= option):
43 Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS)
46 Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
49 Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
52 Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
55 Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
58 Target Report Mask(ABORT_NORETURN)
59 Generate a call to abort if a noreturn function returns
62 Target RejectNegative Mask(APCS_FRAME) Undocumented
65 Target Report Mask(APCS_FLOAT)
66 Pass FP arguments in FP registers
69 Target Report Mask(APCS_FRAME)
70 Generate APCS conformant stack frames
73 Target Report Mask(APCS_REENT)
74 Generate re-entrant, PIC code
77 Target Report Mask(APCS_STACK) Undocumented
80 Target RejectNegative Joined Enum(arm_arch) Var(arm_arch_option)
81 Specify the name of the target architecture
83 ; Other arm_arch values are loaded from arm-tables.opt
84 ; but that is a generated file and this is an odd-one-out.
86 Enum(arm_arch) String(native) Value(-1) DriverOnly
89 Target Report RejectNegative InverseMask(THUMB)
90 Generate code in 32 bit ARM state.
93 Target Report RejectNegative Mask(BIG_END)
94 Assume target CPU is configured as big endian
96 mcallee-super-interworking
97 Target Report Mask(CALLEE_INTERWORKING)
98 Thumb: Assume non-static functions may be called from ARM code
100 mcaller-super-interworking
101 Target Report Mask(CALLER_INTERWORKING)
102 Thumb: Assume function pointers may go to non-Thumb aware code
105 Target RejectNegative Joined Enum(processor_type) Var(arm_cpu_option) Init(arm_none)
106 Specify the name of the target CPU
109 Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI)
110 Specify if floating point hardware should be used
113 Name(float_abi_type) Type(enum float_abi_type)
114 Known floating-point ABIs (for use with the -mfloat-abi= option):
117 Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT)
120 Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
123 Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
126 Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
127 Specify the __fp16 floating-point format
130 Name(arm_fp16_format_type) Type(enum arm_fp16_format_type)
131 Known __fp16 formats (for use with the -mfp16-format= option):
134 Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE)
137 Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE)
140 Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE)
143 Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index)
144 Specify the name of the target floating point hardware/format
147 Target RejectNegative Alias(mfloat-abi=, hard) Undocumented
150 Target Report RejectNegative InverseMask(BIG_END)
151 Assume target CPU is configured as little endian
154 Target Report Mask(LONG_CALLS)
155 Generate call insns as indirect calls, if necessary
158 Target RejectNegative Joined Var(arm_pic_register_string)
159 Specify the register to be used for PIC addressing
162 Target Report Mask(POKE_FUNCTION_NAME)
163 Store function names in object code
166 Target Report Mask(SCHED_PROLOG)
167 Permit scheduling of a function's prologue sequence
170 Target Report Mask(SINGLE_PIC_BASE)
171 Do not load the PIC register in function prologues
174 Target RejectNegative Alias(mfloat-abi=, soft) Undocumented
176 mstructure-size-boundary=
177 Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY)
178 Specify the minimum bit alignment of structures
181 Target Report RejectNegative Mask(THUMB)
182 Generate code for Thumb state
185 Target Report Mask(INTERWORK)
186 Support calls between Thumb and ARM instruction sets
189 Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU)
190 Specify thread local storage scheme
193 Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO)
194 Specify how to access the thread pointer
197 Name(arm_tp_type) Type(enum arm_tp_type)
198 Valid arguments to -mtp=:
201 Enum(arm_tp_type) String(soft) Value(TP_SOFT)
204 Enum(arm_tp_type) String(auto) Value(TP_AUTO)
207 Enum(arm_tp_type) String(cp15) Value(TP_CP15)
210 Target Report Mask(TPCS_FRAME)
211 Thumb: Generate (non-leaf) stack frames even if not needed
214 Target Report Mask(TPCS_LEAF_FRAME)
215 Thumb: Generate (leaf) stack frames even if not needed
218 Target RejectNegative Joined Enum(processor_type) Var(arm_tune_option) Init(arm_none)
219 Tune code for the given processor
221 ; Other processor_type values are loaded from arm-tables.opt
222 ; but that is a generated file and this is an odd-one-out.
224 Enum(processor_type) String(native) Value(-1) DriverOnly
227 Target Report RejectNegative Mask(LITTLE_WORDS)
228 Assume big endian bytes, little endian words. This option is deprecated.
230 mvectorize-with-neon-quad
231 Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
232 Use Neon quad-word (rather than double-word) registers for vectorization
234 mvectorize-with-neon-double
235 Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE)
236 Use Neon double-word (rather than quad-word) registers for vectorization
239 Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
240 Only generate absolute relocations on word sized values.
243 Target Report Var(fix_cm3_ldrd) Init(2)
244 Avoid overlapping destination and address registers on LDRD instructions
245 that may trigger Cortex-M3 errata.
248 Target Report Var(unaligned_access) Init(2)
249 Enable unaligned word and halfword accesses to packed data.