1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Names to predefine in the preprocessor for this target machine. */
24 #define CPP_PREDEFINES "\
25 -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \
26 -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)"
28 /* Write out the correct language type definition for the header files.
29 Unless we have assembler language, write out the symbols for C. */
31 %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \
32 %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
33 %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
34 %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
35 %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
36 %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}"
38 /* Set the spec to use for signed char. The default tests the above macro
39 but DEC's compiler can't handle the conditional in a "constant"
42 #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
44 /* No point in running CPP on our assembler output. */
45 #define ASM_SPEC "-nocpp %{pg}"
47 /* Under OSF/1, -p and -pg require -lprof1. */
49 #define LIB_SPEC "%{p:-lprof1} %{pg:-lprof1} %{a:-lprof2} -lc"
51 /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are
52 optimizing, -O1 if we are not. Pass -shared, -non_shared or
53 -call_shared as appropriate. Also pass -pg. */
55 "-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} \
56 %{!static:%{shared:-shared} %{!shared:-call_shared}} %{pg} %{taso} \
59 #define WORD_SWITCH_TAKES_ARG(STR) \
60 (!strcmp (STR, "rpath") || !strcmp (STR, "include") \
61 || !strcmp (STR, "imacros") || !strcmp (STR, "aux-info") \
62 || !strcmp (STR, "idirafter") || !strcmp (STR, "iprefix") \
63 || !strcmp (STR, "iwithprefix") || !strcmp (STR, "iwithprefixbefore") \
64 || !strcmp (STR, "isystem"))
66 #define STARTFILE_SPEC \
67 "%{!shared:%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}}"
69 /* Print subsidiary information on the compiler version in use. */
70 #define TARGET_VERSION
72 /* Default this to not be compiling for Windows/NT. */
77 /* Define the location for the startup file on OSF/1 for Alpha. */
79 #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
81 /* Run-time compilation parameters selecting different hardware subsets. */
83 extern int target_flags;
85 /* This means that floating-point support exists in the target implementation
86 of the Alpha architecture. This is usually the default. */
88 #define TARGET_FP (target_flags & 1)
90 /* This means that floating-point registers are allowed to be used. Note
91 that Alpha implementations without FP operations are required to
92 provide the FP registers. */
94 #define TARGET_FPREGS (target_flags & 2)
96 /* This means that gas is used to process the assembler file. */
99 #define TARGET_GAS (target_flags & MASK_GAS)
101 /* Macro to define tables used to set the flags.
102 This is a list in braces of pairs in braces,
103 each pair being { "NAME", VALUE }
104 where VALUE is the bits to set or minus the bits to clear.
105 An empty string NAME is used to identify the default VALUE. */
107 #define TARGET_SWITCHES \
108 { {"no-soft-float", 1}, \
109 {"soft-float", -1}, \
111 {"no-fp-regs", -3}, \
112 {"alpha-as", -MASK_GAS}, \
114 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} }
116 #define TARGET_DEFAULT 3
118 #ifndef TARGET_CPU_DEFAULT
119 #define TARGET_CPU_DEFAULT 0
122 /* Define this macro to change register usage conditional on target flags.
124 On the Alpha, we use this to disable the floating-point registers when
127 #define CONDITIONAL_REGISTER_USAGE \
128 if (! TARGET_FPREGS) \
129 for (i = 32; i < 63; i++) \
130 fixed_regs[i] = call_used_regs[i] = 1;
132 /* Show we can debug even without a frame pointer. */
133 #define CAN_DEBUG_WITHOUT_FP
135 /* target machine storage layout */
137 /* Define to enable software floating point emulation. */
138 #define REAL_ARITHMETIC
140 /* Define the size of `int'. The default is the same as the word size. */
141 #define INT_TYPE_SIZE 32
143 /* Define the size of `long long'. The default is the twice the word size. */
144 #define LONG_LONG_TYPE_SIZE 64
146 /* The two floating-point formats we support are S-floating, which is
147 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
148 and `long double' are T. */
150 #define FLOAT_TYPE_SIZE 32
151 #define DOUBLE_TYPE_SIZE 64
152 #define LONG_DOUBLE_TYPE_SIZE 64
154 #define WCHAR_TYPE "short unsigned int"
155 #define WCHAR_TYPE_SIZE 16
157 /* Define this macro if it is advisable to hold scalars in registers
158 in a wider mode than that declared by the program. In such cases,
159 the value is constrained to be within the bounds of the declared
160 type, but kept valid in the wider mode. The signedness of the
161 extension may differ from that of the type.
163 For Alpha, we always store objects in a full register. 32-bit objects
164 are always sign-extended, but smaller objects retain their signedness. */
166 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
167 if (GET_MODE_CLASS (MODE) == MODE_INT \
168 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
170 if ((MODE) == SImode) \
175 /* Define this if function arguments should also be promoted using the above
178 #define PROMOTE_FUNCTION_ARGS
180 /* Likewise, if the function return value is promoted. */
182 #define PROMOTE_FUNCTION_RETURN
184 /* Define this if most significant bit is lowest numbered
185 in instructions that operate on numbered bit-fields.
187 There are no such instructions on the Alpha, but the documentation
189 #define BITS_BIG_ENDIAN 0
191 /* Define this if most significant byte of a word is the lowest numbered.
192 This is false on the Alpha. */
193 #define BYTES_BIG_ENDIAN 0
195 /* Define this if most significant word of a multiword number is lowest
198 For Alpha we can decide arbitrarily since there are no machine instructions
199 for them. Might as well be consistent with bytes. */
200 #define WORDS_BIG_ENDIAN 0
202 /* number of bits in an addressable storage unit */
203 #define BITS_PER_UNIT 8
205 /* Width in bits of a "word", which is the contents of a machine register.
206 Note that this is not necessarily the width of data type `int';
207 if using 16-bit ints on a 68000, this would still be 32.
208 But on a machine with 16-bit registers, this would be 16. */
209 #define BITS_PER_WORD 64
211 /* Width of a word, in units (bytes). */
212 #define UNITS_PER_WORD 8
214 /* Width in bits of a pointer.
215 See also the macro `Pmode' defined below. */
216 #define POINTER_SIZE 64
218 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
219 #define PARM_BOUNDARY 64
221 /* Boundary (in *bits*) on which stack pointer should be aligned. */
222 #define STACK_BOUNDARY 64
224 /* Allocation boundary (in *bits*) for the code of a function. */
225 #define FUNCTION_BOUNDARY 64
227 /* Alignment of field after `int : 0' in a structure. */
228 #define EMPTY_FIELD_BOUNDARY 64
230 /* Every structure's size must be a multiple of this. */
231 #define STRUCTURE_SIZE_BOUNDARY 8
233 /* A bitfield declared as `int' forces `int' alignment for the struct. */
234 #define PCC_BITFIELD_TYPE_MATTERS 1
236 /* Align loop starts for optimal branching.
238 ??? Kludge this and the next macro for the moment by not doing anything if
239 we don't optimize and also if we are writing ECOFF symbols to work around
240 a bug in DEC's assembler. */
242 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
243 if (optimize > 0 && write_symbols != SDB_DEBUG) \
244 ASM_OUTPUT_ALIGN (FILE, 5)
246 /* This is how to align an instruction for optimal branching.
247 On Alpha we'll get better performance by aligning on a quadword
250 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
251 if (optimize > 0 && write_symbols != SDB_DEBUG) \
252 ASM_OUTPUT_ALIGN ((FILE), 4)
254 /* No data type wants to be aligned rounder than this. */
255 #define BIGGEST_ALIGNMENT 64
257 /* Make strings word-aligned so strcpy from constants will be faster. */
258 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
259 (TREE_CODE (EXP) == STRING_CST \
260 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
262 /* Make arrays of chars word-aligned for the same reasons. */
263 #define DATA_ALIGNMENT(TYPE, ALIGN) \
264 (TREE_CODE (TYPE) == ARRAY_TYPE \
265 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
266 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
268 /* Set this non-zero if move instructions will actually fail to work
269 when given unaligned data.
271 Since we get an error message when we do one, call them invalid. */
273 #define STRICT_ALIGNMENT 1
275 /* Set this non-zero if unaligned move instructions are extremely slow.
277 On the Alpha, they trap. */
279 #define SLOW_UNALIGNED_ACCESS 1
281 /* Standard register usage. */
283 /* Number of actual hardware registers.
284 The hardware registers are assigned numbers for the compiler
285 from 0 to just below FIRST_PSEUDO_REGISTER.
286 All registers that the compiler knows about must be given numbers,
287 even those that are not normally considered general registers.
289 We define all 32 integer registers, even though $31 is always zero,
290 and all 32 floating-point registers, even though $f31 is also
291 always zero. We do not bother defining the FP status register and
292 there are no other registers.
294 Since $31 is always zero, we will use register number 31 as the
295 argument pointer. It will never appear in the generated code
296 because we will always be eliminating it in favor of the stack
297 pointer or hardware frame pointer.
299 Likewise, we use $f31 for the frame pointer, which will always
300 be eliminated in favor of the hardware frame pointer or the
303 #define FIRST_PSEUDO_REGISTER 64
305 /* 1 for registers that have pervasive standard uses
306 and are not available for the register allocator. */
308 #define FIXED_REGISTERS \
309 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
310 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
311 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
312 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
314 /* 1 for registers not available across function calls.
315 These must include the FIXED_REGISTERS and also any
316 registers that can be used without being saved.
317 The latter must include the registers where values are returned
318 and the register where structure-value addresses are passed.
319 Aside from that, you can include as many other registers as you like. */
320 #define CALL_USED_REGISTERS \
321 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
322 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
323 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
324 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
326 /* List the order in which to allocate registers. Each register must be
327 listed once, even those in FIXED_REGISTERS.
329 We allocate in the following order:
330 $f1 (nonsaved floating-point register)
333 $f21-$f16 (likewise, but input args)
334 $f0 (nonsaved, but return value)
335 $f2-$f9 (saved floating-point registers)
336 $1-$8 (nonsaved integer registers)
339 $0 (likewise, but return value)
340 $21-$16 (likewise, but input args)
341 $27 (procedure value in OSF, nonsaved in NT)
342 $9-$14 (saved integer registers)
346 $30, $31, $f31 (stack pointer and always zero/ap & fp) */
348 #define REG_ALLOC_ORDER \
350 42, 43, 44, 45, 46, 47, \
351 54, 55, 56, 57, 58, 59, 60, 61, 62, \
352 53, 52, 51, 50, 49, 48, \
354 34, 35, 36, 37, 38, 39, 40, 41, \
355 1, 2, 3, 4, 5, 6, 7, 8, \
359 21, 20, 19, 18, 17, 16, \
361 9, 10, 11, 12, 13, 14, \
367 /* Return number of consecutive hard regs needed starting at reg REGNO
368 to hold something of mode MODE.
369 This is ordinarily the length in words of a value of mode MODE
370 but can be less for certain modes in special long registers. */
372 #define HARD_REGNO_NREGS(REGNO, MODE) \
373 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
375 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
376 On Alpha, the integer registers can hold any mode. The floating-point
377 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
378 or 8-bit values. If we only allowed the larger integers into FP registers,
379 we'd have to say that QImode and SImode aren't tiable, which is a
380 pain. So say all registers can hold everything and see how that works. */
382 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
384 /* Value is 1 if it is a good idea to tie two pseudo registers
385 when one has mode MODE1 and one has mode MODE2.
386 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
387 for any hard reg, then this must be 0 for correct output. */
389 #define MODES_TIEABLE_P(MODE1, MODE2) 1
391 /* Specify the registers used for certain standard purposes.
392 The values of these macros are register numbers. */
394 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
395 /* #define PC_REGNUM */
397 /* Register to use for pushing function arguments. */
398 #define STACK_POINTER_REGNUM 30
400 /* Base register for access to local variables of the function. */
401 #define HARD_FRAME_POINTER_REGNUM 15
403 /* Value should be nonzero if functions must have frame pointers.
404 Zero means the frame pointer need not be set up (and parms
405 may be accessed via the stack pointer) in functions that seem suitable.
406 This is computed in `reload', in reload1.c. */
407 #define FRAME_POINTER_REQUIRED 0
409 /* Base register for access to arguments of the function. */
410 #define ARG_POINTER_REGNUM 31
412 /* Base register for access to local variables of function. */
413 #define FRAME_POINTER_REGNUM 63
415 /* Register in which static-chain is passed to a function.
417 For the Alpha, this is based on an example; the calling sequence
418 doesn't seem to specify this. */
419 #define STATIC_CHAIN_REGNUM 1
421 /* Register in which address to store a structure value
422 arrives in the function. On the Alpha, the address is passed
423 as a hidden argument. */
424 #define STRUCT_VALUE 0
426 /* Define the classes of registers for register constraints in the
427 machine description. Also define ranges of constants.
429 One of the classes must always be named ALL_REGS and include all hard regs.
430 If there is more than one class, another class must be named NO_REGS
431 and contain no registers.
433 The name GENERAL_REGS must be the name of a class (or an alias for
434 another name such as ALL_REGS). This is the class of registers
435 that is allowed by "g" or "r" in a register constraint.
436 Also, registers outside this class are allocated only when
437 instructions express preferences for them.
439 The classes must be numbered in nondecreasing order; that is,
440 a larger-numbered class must never be contained completely
441 in a smaller-numbered class.
443 For any two classes, it is very desirable that there be another
444 class that represents their union. */
446 enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
449 #define N_REG_CLASSES (int) LIM_REG_CLASSES
451 /* Give names of register classes as strings for dump file. */
453 #define REG_CLASS_NAMES \
454 {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
456 /* Define which registers fit in which classes.
457 This is an initializer for a vector of HARD_REG_SET
458 of length N_REG_CLASSES. */
460 #define REG_CLASS_CONTENTS \
461 { {0, 0}, {~0, 0x80000000}, {0, 0x7fffffff}, {~0, ~0} }
463 /* The same information, inverted:
464 Return the class number of the smallest class containing
465 reg number REGNO. This could be a conditional expression
466 or could index an array. */
468 #define REGNO_REG_CLASS(REGNO) \
469 ((REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS : GENERAL_REGS)
471 /* The class value for index registers, and the one for base regs. */
472 #define INDEX_REG_CLASS NO_REGS
473 #define BASE_REG_CLASS GENERAL_REGS
475 /* Get reg_class from a letter such as appears in the machine description. */
477 #define REG_CLASS_FROM_LETTER(C) \
478 ((C) == 'f' ? FLOAT_REGS : NO_REGS)
480 /* Define this macro to change register usage conditional on target flags. */
481 /* #define CONDITIONAL_REGISTER_USAGE */
483 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
484 can be used to stand for particular ranges of immediate operands.
485 This macro defines what the ranges are.
486 C is the letter, and VALUE is a constant value.
487 Return 1 if VALUE is in the range specified by C.
490 `I' is used for the range of constants most insns can contain.
491 `J' is the constant zero.
492 `K' is used for the constant in an LDA insn.
493 `L' is used for the constant in a LDAH insn.
494 `M' is used for the constants that can be AND'ed with using a ZAP insn.
495 `N' is used for complemented 8-bit constants.
496 `O' is used for negated 8-bit constants.
497 `P' is used for the constants 1, 2 and 3. */
499 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
500 ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \
501 : (C) == 'J' ? (VALUE) == 0 \
502 : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
503 : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
504 && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0) \
505 && ((HOST_BITS_PER_WIDE_INT == 64 \
506 || (unsigned) (VALUE) != 0x80000000u))) \
507 : (C) == 'M' ? zap_mask (VALUE) \
508 : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \
509 : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \
510 : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \
513 /* Similar, but for floating or large integer constants, and defining letters
514 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
516 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
517 that is the operand of a ZAP insn. */
519 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
520 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
521 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
522 : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \
523 && zap_mask (CONST_DOUBLE_LOW (VALUE)) \
524 && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \
527 /* Optional extra constraints for this machine.
529 For the Alpha, `Q' means that this is a memory operand but not a
530 reference to an unaligned location.
531 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
534 #define EXTRA_CONSTRAINT(OP, C) \
535 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \
536 : (C) == 'R' ? current_file_function_operand (OP, Pmode) \
539 /* Given an rtx X being reloaded into a reg required to be
540 in class CLASS, return the class of reg to actually use.
541 In general this is just CLASS; but on some machines
542 in some cases it is preferable to use a more restrictive class.
544 On the Alpha, all constants except zero go into a floating-point
545 register via memory. */
547 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
548 (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \
549 ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \
552 /* Loading and storing HImode or QImode values to and from memory
553 usually requires a scratch register. The exceptions are loading
554 QImode and HImode from an aligned address to a general register.
555 We also cannot load an unaligned address or a paradoxical SUBREG into an
558 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
559 (((GET_CODE (IN) == MEM \
560 || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \
561 || (GET_CODE (IN) == SUBREG \
562 && (GET_CODE (SUBREG_REG (IN)) == MEM \
563 || (GET_CODE (SUBREG_REG (IN)) == REG \
564 && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \
565 && (((CLASS) == FLOAT_REGS \
566 && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \
567 || (((MODE) == QImode || (MODE) == HImode) \
568 && unaligned_memory_operand (IN, MODE)))) \
570 : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \
571 && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \
572 : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == SUBREG \
573 && (GET_MODE_SIZE (GET_MODE (IN)) \
574 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (IN))))) ? GENERAL_REGS \
577 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
578 (((GET_CODE (OUT) == MEM \
579 || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \
580 || (GET_CODE (OUT) == SUBREG \
581 && (GET_CODE (SUBREG_REG (OUT)) == MEM \
582 || (GET_CODE (SUBREG_REG (OUT)) == REG \
583 && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \
584 && (((MODE) == HImode || (MODE) == QImode \
585 || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \
587 : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \
588 && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \
589 : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == SUBREG \
590 && (GET_MODE_SIZE (GET_MODE (OUT)) \
591 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (OUT))))) ? GENERAL_REGS \
594 /* If we are copying between general and FP registers, we need a memory
597 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2))
599 /* Specify the mode to be used for memory when a secondary memory
600 location is needed. If MODE is floating-point, use it. Otherwise,
601 widen to a word like the default. This is needed because we always
602 store integers in FP registers in quadword format. This whole
603 area is very tricky! */
604 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
605 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
606 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
607 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
609 /* Return the maximum number of consecutive registers
610 needed to represent mode MODE in a register of class CLASS. */
612 #define CLASS_MAX_NREGS(CLASS, MODE) \
613 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
615 /* If defined, gives a class of registers that cannot be used as the
616 operand of a SUBREG that changes the size of the object. */
618 #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS
620 /* Define the cost of moving between registers of various classes. Moving
621 between FLOAT_REGS and anything else except float regs is expensive.
622 In fact, we make it quite expensive because we really don't want to
623 do these moves unless it is clearly worth it. Optimizations may
624 reduce the impact of not being able to allocate a pseudo to a
627 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
628 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20)
630 /* A C expressions returning the cost of moving data of MODE from a register to
633 On the Alpha, bump this up a bit. */
635 #define MEMORY_MOVE_COST(MODE) 6
637 /* Provide the cost of a branch. Exact meaning under development. */
638 #define BRANCH_COST 5
640 /* Adjust the cost of dependencies. */
642 #define ADJUST_COST(INSN,LINK,DEP,COST) \
643 (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST)
645 /* Stack layout; function entry, exit and calling. */
647 /* Define this if pushing a word on the stack
648 makes the stack pointer a smaller address. */
649 #define STACK_GROWS_DOWNWARD
651 /* Define this if the nominal address of the stack frame
652 is at the high-address end of the local variables;
653 that is, each additional local variable allocated
654 goes at a more negative offset in the frame. */
655 /* #define FRAME_GROWS_DOWNWARD */
657 /* Offset within stack frame to start allocating local variables at.
658 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
659 first local allocated. Otherwise, it is the offset to the BEGINNING
660 of the first local allocated. */
662 #define STARTING_FRAME_OFFSET 0
664 /* If we generate an insn to push BYTES bytes,
665 this says how many the stack pointer really advances by.
666 On Alpha, don't define this because there are no push insns. */
667 /* #define PUSH_ROUNDING(BYTES) */
669 /* Define this if the maximum size of all the outgoing args is to be
670 accumulated and pushed during the prologue. The amount can be
671 found in the variable current_function_outgoing_args_size. */
672 #define ACCUMULATE_OUTGOING_ARGS
674 /* Offset of first parameter from the argument pointer register value. */
676 #define FIRST_PARM_OFFSET(FNDECL) 0
678 /* Definitions for register eliminations.
680 We have two registers that can be eliminated on the Alpha. First, the
681 frame pointer register can often be eliminated in favor of the stack
682 pointer register. Secondly, the argument pointer register can always be
683 eliminated; it is replaced with either the stack or frame pointer. */
685 /* This is an array of structures. Each structure initializes one pair
686 of eliminable registers. The "from" register number is given first,
687 followed by "to". Eliminations of the same "from" register are listed
688 in order of preference. */
690 #define ELIMINABLE_REGS \
691 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
692 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
693 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
694 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
696 /* Given FROM and TO register numbers, say whether this elimination is allowed.
697 Frame pointer elimination is automatically handled.
699 All eliminations are valid since the cases where FP can't be
700 eliminated are already handled. */
702 #define CAN_ELIMINATE(FROM, TO) 1
704 /* Round up to a multiple of 16 bytes. */
705 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
707 /* Define the offset between two registers, one to be eliminated, and the other
708 its replacement, at the start of a routine. */
709 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
710 { if ((FROM) == FRAME_POINTER_REGNUM) \
711 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
712 + alpha_sa_size ()); \
713 else if ((FROM) == ARG_POINTER_REGNUM) \
714 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
716 + (ALPHA_ROUND (get_frame_size () \
717 + current_function_pretend_args_size) \
718 - current_function_pretend_args_size)); \
721 /* Define this if stack space is still allocated for a parameter passed
723 /* #define REG_PARM_STACK_SPACE */
725 /* Value is the number of bytes of arguments automatically
726 popped when returning from a subroutine call.
727 FUNDECL is the declaration node of the function (as a tree),
728 FUNTYPE is the data type of the function (as a tree),
729 or for a library call it is an identifier node for the subroutine name.
730 SIZE is the number of bytes of arguments passed on the stack. */
732 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
734 /* Define how to find the value returned by a function.
735 VALTYPE is the data type of the value (as a tree).
736 If the precise function being called is known, FUNC is its FUNCTION_DECL;
737 otherwise, FUNC is 0.
739 On Alpha the value is found in $0 for integer functions and
740 $f0 for floating-point functions. */
742 #define FUNCTION_VALUE(VALTYPE, FUNC) \
744 (INTEGRAL_MODE_P (TYPE_MODE (VALTYPE)) \
745 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
746 ? word_mode : TYPE_MODE (VALTYPE), \
747 TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0)
749 /* Define how to find the value returned by a library function
750 assuming the value has mode MODE. */
752 #define LIBCALL_VALUE(MODE) \
753 gen_rtx (REG, MODE, \
754 TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0)
756 /* The definition of this macro implies that there are cases where
757 a scalar value cannot be returned in registers.
759 For the Alpha, any structure or union type is returned in memory, as
760 are integers whose size is larger than 64 bits. */
762 #define RETURN_IN_MEMORY(TYPE) \
763 (TYPE_MODE (TYPE) == BLKmode \
764 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
766 /* 1 if N is a possible register number for a function value
767 as seen by the caller. */
769 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32)
771 /* 1 if N is a possible register number for function argument passing.
772 On Alpha, these are $16-$21 and $f16-$f21. */
774 #define FUNCTION_ARG_REGNO_P(N) \
775 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
777 /* Define a data type for recording info about an argument list
778 during the scan of that argument list. This data type should
779 hold all necessary information about the function itself
780 and about the args processed so far, enough to enable macros
781 such as FUNCTION_ARG to determine where the next arg should go.
783 On Alpha, this is a single integer, which is a number of words
784 of arguments scanned so far.
785 Thus 6 or more means all following args should go on the stack. */
787 #define CUMULATIVE_ARGS int
789 /* Initialize a variable CUM of type CUMULATIVE_ARGS
790 for a call to a function whose data type is FNTYPE.
791 For a library call, FNTYPE is 0. */
793 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0
795 /* Define intermediate macro to compute the size (in registers) of an argument
798 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
800 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
801 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
803 /* Update the data in CUM to advance over an argument
804 of mode MODE and data type TYPE.
805 (TYPE is null for libcalls where that information may not be available.) */
807 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
808 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
811 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
813 /* Determine where to put an argument to a function.
814 Value is zero to push the argument on the stack,
815 or a hard register in which to store the argument.
817 MODE is the argument's machine mode.
818 TYPE is the data type of the argument (as a tree).
819 This is null for libcalls where that information may
821 CUM is a variable of type CUMULATIVE_ARGS which gives info about
822 the preceding args and about the function being called.
823 NAMED is nonzero if this argument is a named parameter
824 (otherwise it is an extra parameter matching an ellipsis).
826 On Alpha the first 6 words of args are normally in registers
827 and the rest are pushed. */
829 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
830 ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
831 ? gen_rtx(REG, (MODE), \
832 (CUM) + 16 + ((TARGET_FPREGS \
833 && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
834 || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
838 /* Specify the padding direction of arguments.
840 On the Alpha, we must pad upwards in order to be able to pass args in
843 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
845 /* For an arg passed partly in registers and partly in memory,
846 this is the number of registers used.
847 For args passed entirely in registers or entirely in memory, zero. */
849 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
850 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
853 /* Perform any needed actions needed for a function that is receiving a
854 variable number of arguments.
858 MODE and TYPE are the mode and type of the current parameter.
860 PRETEND_SIZE is a variable that should be set to the amount of stack
861 that must be pushed by the prolog to pretend that our caller pushed
864 Normally, this macro will push all remaining incoming registers on the
865 stack and set PRETEND_SIZE to the length of the registers pushed.
867 On the Alpha, we allocate space for all 12 arg registers, but only
868 push those that are remaining.
870 However, if NO registers need to be saved, don't allocate any space.
871 This is not only because we won't need the space, but because AP includes
872 the current_pretend_args_size and we don't want to mess up any
873 ap-relative addresses already made.
875 If we are not to use the floating-point registers, save the integer
876 registers where we would put the floating-point registers. This is
877 not the most efficient way to implement varargs with just one register
878 class, but it isn't worth doing anything more efficient in this rare
882 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
887 move_block_from_reg \
889 gen_rtx (MEM, BLKmode, \
890 plus_constant (virtual_incoming_args_rtx, \
891 ((CUM) + 6)* UNITS_PER_WORD)), \
892 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
893 move_block_from_reg \
894 (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \
895 gen_rtx (MEM, BLKmode, \
896 plus_constant (virtual_incoming_args_rtx, \
897 (CUM) * UNITS_PER_WORD)), \
898 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
900 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
904 /* Try to output insns to set TARGET equal to the constant C if it can be
905 done in less than N insns. Do all computations in MODE. Returns the place
906 where the output has been placed if it can be done and the insns have been
907 emitted. If it would take more than N insns, zero is returned and no
908 insns and emitted. */
909 extern struct rtx_def *alpha_emit_set_const ();
911 /* Generate necessary RTL for __builtin_saveregs().
912 ARGLIST is the argument list; see expr.c. */
913 extern struct rtx_def *alpha_builtin_saveregs ();
914 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST)
916 /* Define the information needed to generate branch and scc insns. This is
917 stored from the compare operation. Note that we can't use "rtx" here
918 since it hasn't been defined! */
920 extern struct rtx_def *alpha_compare_op0, *alpha_compare_op1;
921 extern int alpha_compare_fp_p;
923 /* This macro produces the initial definition of a function name. On the
924 Alpha, we need to save the function name for the prologue and epilogue. */
926 extern char *alpha_function_name;
928 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
930 alpha_function_name = NAME; \
933 /* This macro generates the assembly code for function entry.
934 FILE is a stdio stream to output the code to.
935 SIZE is an int: how many units of temporary storage to allocate.
936 Refer to the array `regs_ever_live' to determine which registers
937 to save; `regs_ever_live[I]' is nonzero if register number I
938 is ever used in the function. This macro is responsible for
939 knowing which registers should not be saved even if used. */
941 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
943 /* Output assembler code to FILE to increment profiler label # LABELNO
944 for profiling a function entry. Under OSF/1, profiling is enabled
945 by simply passing -pg to the assembler and linker. */
947 #define FUNCTION_PROFILER(FILE, LABELNO)
949 /* Output assembler code to FILE to initialize this source file's
950 basic block profiling info, if that has not already been done.
951 This assumes that __bb_init_func doesn't garble a1-a5. */
953 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
955 ASM_OUTPUT_REG_PUSH (FILE, 16); \
956 fputs ("\tlda $16,$PBX32\n", (FILE)); \
957 fputs ("\tldq $26,0($16)\n", (FILE)); \
958 fputs ("\tbne $26,1f\n", (FILE)); \
959 fputs ("\tlda $27,__bb_init_func\n", (FILE)); \
960 fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \
961 fputs ("\tldgp $29,0($26)\n", (FILE)); \
962 fputs ("1:\n", (FILE)); \
963 ASM_OUTPUT_REG_POP (FILE, 16); \
966 /* Output assembler code to FILE to increment the entry-count for
967 the BLOCKNO'th basic block in this source file. */
969 #define BLOCK_PROFILER(FILE, BLOCKNO) \
971 int blockn = (BLOCKNO); \
972 fputs ("\tsubq $30,16,$30\n", (FILE)); \
973 fputs ("\tstq $26,0($30)\n", (FILE)); \
974 fputs ("\tstq $27,8($30)\n", (FILE)); \
975 fputs ("\tlda $26,$PBX34\n", (FILE)); \
976 fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \
977 fputs ("\taddq $27,1,$27\n", (FILE)); \
978 fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \
979 fputs ("\tldq $26,0($30)\n", (FILE)); \
980 fputs ("\tldq $27,8($30)\n", (FILE)); \
981 fputs ("\taddq $30,16,$30\n", (FILE)); \
985 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
986 the stack pointer does not matter. The value is tested only in
987 functions that have frame pointers.
988 No definition is equivalent to always zero. */
990 #define EXIT_IGNORE_STACK 1
992 /* This macro generates the assembly code for function exit,
993 on machines that need it. If FUNCTION_EPILOGUE is not defined
994 then individual return instructions are generated for each
995 return statement. Args are same as for FUNCTION_PROLOGUE.
997 The function epilogue should not depend on the current stack pointer!
998 It should use the frame pointer only. This is mandatory because
999 of alloca; we also take advantage of it to omit stack adjustments
1000 before returning. */
1002 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
1005 /* Output assembler code for a block containing the constant parts
1006 of a trampoline, leaving space for the variable parts.
1008 The trampoline should set the static chain pointer to value placed
1009 into the trampoline and should branch to the specified routine.
1010 Note that $27 has been set to the address of the trampoline, so we can
1011 use it for addressability of the two data items. Trampolines are always
1012 aligned to FUNCTION_BOUNDARY, which is 64 bits. */
1014 #define TRAMPOLINE_TEMPLATE(FILE) \
1016 fprintf (FILE, "\tldq $1,24($27)\n"); \
1017 fprintf (FILE, "\tldq $27,16($27)\n"); \
1018 fprintf (FILE, "\tjmp $31,($27),0\n"); \
1019 fprintf (FILE, "\tnop\n"); \
1020 fprintf (FILE, "\t.quad 0,0\n"); \
1023 /* Section in which to place the trampoline. On Alpha, instructions
1024 may only be placed in a text segment. */
1026 #define TRAMPOLINE_SECTION text_section
1028 /* Length in units of the trampoline for entering a nested function. */
1030 #define TRAMPOLINE_SIZE 32
1032 /* Emit RTL insns to initialize the variable parts of a trampoline.
1033 FNADDR is an RTX for the address of the function's pure code.
1034 CXT is an RTX for the static chain value for the function. We assume
1035 here that a function will be called many more times than its address
1036 is taken (e.g., it might be passed to qsort), so we take the trouble
1037 to initialize the "hint" field in the JMP insn. Note that the hint
1038 field is PC (new) + 4 * bits 13:0. */
1040 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1042 rtx _temp, _temp1, _addr; \
1044 _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1045 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \
1046 _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1047 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \
1049 _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \
1050 _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \
1052 _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \
1053 build_int_2 (2, 0), NULL_RTX, 1); \
1054 _temp = expand_and (gen_lowpart (SImode, _temp), \
1055 GEN_INT (0x3fff), 0); \
1057 _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \
1058 _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \
1059 _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \
1060 _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \
1063 emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \
1065 emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \
1066 "__enable_execute_stack"), \
1067 0, VOIDmode, 1,_addr, Pmode); \
1069 emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
1070 gen_rtvec (1, const0_rtx), 0)); \
1073 /* Attempt to turn on access permissions for the stack. */
1075 #define TRANSFER_FROM_TRAMPOLINE \
1078 __enable_execute_stack (addr) \
1081 long size = getpagesize (); \
1082 long mask = ~(size-1); \
1083 char *page = (char *) (((long) addr) & mask); \
1084 char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
1086 /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
1087 if (mprotect (page, end - page, 7) < 0) \
1088 perror ("mprotect of trampoline code"); \
1091 /* Addressing modes, and classification of registers for them. */
1093 /* #define HAVE_POST_INCREMENT */
1094 /* #define HAVE_POST_DECREMENT */
1096 /* #define HAVE_PRE_DECREMENT */
1097 /* #define HAVE_PRE_INCREMENT */
1099 /* Macros to check register numbers against specific register classes. */
1101 /* These assume that REGNO is a hard or pseudo reg number.
1102 They give nonzero only if REGNO is a hard reg of the suitable class
1103 or a pseudo reg currently allocated to a suitable hard reg.
1104 Since they use reg_renumber, they are safe only once reg_renumber
1105 has been allocated, which happens in local-alloc.c. */
1107 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1108 #define REGNO_OK_FOR_BASE_P(REGNO) \
1109 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1110 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1112 /* Maximum number of registers that can appear in a valid memory address. */
1113 #define MAX_REGS_PER_ADDRESS 1
1115 /* Recognize any constant value that is a valid address. For the Alpha,
1116 there are only constants none since we want to use LDA to load any
1117 symbolic addresses into registers. */
1119 #define CONSTANT_ADDRESS_P(X) \
1120 (GET_CODE (X) == CONST_INT \
1121 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1123 /* Include all constant integers and constant doubles, but not
1124 floating-point, except for floating-point zero. */
1126 #define LEGITIMATE_CONSTANT_P(X) \
1127 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1128 || (X) == CONST0_RTX (GET_MODE (X)))
1130 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1131 and check its validity for a certain class.
1132 We have two alternate definitions for each of them.
1133 The usual definition accepts all pseudo regs; the other rejects
1134 them unless they have been allocated suitable hard regs.
1135 The symbol REG_OK_STRICT causes the latter definition to be used.
1137 Most source files want to accept pseudo regs in the hope that
1138 they will get allocated to the class that the insn wants them to be in.
1139 Source files for reload pass need to be strict.
1140 After reload, it makes no difference, since pseudo regs have
1141 been eliminated by then. */
1143 #ifndef REG_OK_STRICT
1145 /* Nonzero if X is a hard reg that can be used as an index
1146 or if it is a pseudo reg. */
1147 #define REG_OK_FOR_INDEX_P(X) 0
1148 /* Nonzero if X is a hard reg that can be used as a base reg
1149 or if it is a pseudo reg. */
1150 #define REG_OK_FOR_BASE_P(X) \
1151 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1155 /* Nonzero if X is a hard reg that can be used as an index. */
1156 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1157 /* Nonzero if X is a hard reg that can be used as a base reg. */
1158 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1162 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1163 that is a valid memory address for an instruction.
1164 The MODE argument is the machine mode for the MEM expression
1165 that wants to use this address.
1167 For Alpha, we have either a constant address or the sum of a register
1168 and a constant address, or just a register. For DImode, any of those
1169 forms can be surrounded with an AND that clear the low-order three bits;
1170 this is an "unaligned" access.
1172 We also allow a SYMBOL_REF that is the name of the current function as
1173 valid address. This is for CALL_INSNs. It cannot be used in any other
1176 First define the basic valid address. */
1178 #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \
1179 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1181 if (CONSTANT_ADDRESS_P (X)) \
1183 if (GET_CODE (X) == PLUS \
1184 && REG_P (XEXP (X, 0)) \
1185 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1186 && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1190 /* Now accept the simple address, or, for DImode only, an AND of a simple
1191 address that turns off the low three bits. */
1193 extern char *current_function_name;
1195 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1196 { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \
1197 if ((MODE) == DImode \
1198 && GET_CODE (X) == AND \
1199 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1200 && INTVAL (XEXP (X, 1)) == -8) \
1201 GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \
1202 if ((MODE) == Pmode && GET_CODE (X) == SYMBOL_REF \
1203 && ! strcmp (XSTR (X, 0), current_function_name)) \
1207 /* Try machine-dependent ways of modifying an illegitimate address
1208 to be legitimate. If we find one, return the new, valid address.
1209 This macro is used in only one place: `memory_address' in explow.c.
1211 OLDX is the address as it was before break_out_memory_refs was called.
1212 In some cases it is useful to look at this to decide what needs to be done.
1214 MODE and WIN are passed so that this macro can use
1215 GO_IF_LEGITIMATE_ADDRESS.
1217 It is always safe for this macro to do nothing. It exists to recognize
1218 opportunities to optimize the output.
1220 For the Alpha, there are three cases we handle:
1222 (1) If the address is (plus reg const_int) and the CONST_INT is not a
1223 valid offset, compute the high part of the constant and add it to the
1224 register. Then our address is (plus temp low-part-const).
1225 (2) If the address is (const (plus FOO const_int)), find the low-order
1226 part of the CONST_INT. Then load FOO plus any high-order part of the
1227 CONST_INT into a register. Our address is (plus reg low-part-const).
1228 This is done to reduce the number of GOT entries.
1229 (3) If we have a (plus reg const), emit the load as in (2), then add
1230 the two registers, and finally generate (plus reg low-part-const) as
1233 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1234 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1235 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1236 && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1238 HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
1239 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1240 HOST_WIDE_INT highpart = val - lowpart; \
1241 rtx high = GEN_INT (highpart); \
1242 rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \
1243 high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \
1245 (X) = plus_constant (temp, lowpart); \
1248 else if (GET_CODE (X) == CONST \
1249 && GET_CODE (XEXP (X, 0)) == PLUS \
1250 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \
1252 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \
1253 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1254 HOST_WIDE_INT highpart = val - lowpart; \
1255 rtx high = XEXP (XEXP (X, 0), 0); \
1258 high = plus_constant (high, highpart); \
1260 (X) = plus_constant (force_reg (Pmode, high), lowpart); \
1263 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1264 && GET_CODE (XEXP (X, 1)) == CONST \
1265 && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \
1266 && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \
1268 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \
1269 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1270 HOST_WIDE_INT highpart = val - lowpart; \
1271 rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \
1274 high = plus_constant (high, highpart); \
1276 high = expand_binop (Pmode, add_optab, XEXP (X, 0), \
1277 force_reg (Pmode, high), \
1278 high, 1, OPTAB_LIB_WIDEN); \
1279 (X) = plus_constant (high, lowpart); \
1284 /* Go to LABEL if ADDR (a legitimate address expression)
1285 has an effect that depends on the machine mode it is used for.
1286 On the Alpha this is true only for the unaligned modes. We can
1287 simplify this test since we know that the address must be valid. */
1289 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1290 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1292 /* Compute the cost of an address. For the Alpha, all valid addresses are
1295 #define ADDRESS_COST(X) 0
1297 /* Define this if some processing needs to be done immediately before
1298 emitting code for an insn. */
1300 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1302 /* Specify the machine mode that this machine uses
1303 for the index in the tablejump instruction. */
1304 #define CASE_VECTOR_MODE SImode
1306 /* Define this if the tablejump instruction expects the table
1307 to contain offsets from the address of the table.
1308 Do not define this if the table should contain absolute addresses.
1309 On the Alpha, the table is really GP-relative, not relative to the PC
1310 of the table, but we pretend that it is PC-relative; this should be OK,
1311 but we should try to find some better way sometime. */
1312 #define CASE_VECTOR_PC_RELATIVE
1314 /* Specify the tree operation to be used to convert reals to integers. */
1315 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1317 /* This is the kind of divide that is easiest to do in the general case. */
1318 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1320 /* Define this as 1 if `char' should by default be signed; else as 0. */
1321 #define DEFAULT_SIGNED_CHAR 1
1323 /* This flag, if defined, says the same insns that convert to a signed fixnum
1324 also convert validly to an unsigned one.
1326 We actually lie a bit here as overflow conditions are different. But
1327 they aren't being checked anyway. */
1329 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1331 /* Max number of bytes we can move to or from memory
1332 in one reasonably fast instruction. */
1336 /* Largest number of bytes of an object that can be placed in a register.
1337 On the Alpha we have plenty of registers, so use TImode. */
1338 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1340 /* Nonzero if access to memory by bytes is no faster than for words.
1341 Also non-zero if doing byte operations (specifically shifts) in registers
1344 On the Alpha, we want to not use the byte operation and instead use
1345 masking operations to access fields; these will save instructions. */
1347 #define SLOW_BYTE_ACCESS 1
1349 /* Define if operations between registers always perform the operation
1350 on the full register even if a narrower mode is specified. */
1351 #define WORD_REGISTER_OPERATIONS
1353 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1354 will either zero-extend or sign-extend. The value of this macro should
1355 be the code that says which one of the two operations is implicitly
1356 done, NIL if none. */
1357 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
1359 /* Define if loading short immediate values into registers sign extends. */
1360 #define SHORT_IMMEDIATES_SIGN_EXTEND
1362 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1363 is done just by pretending it is already truncated. */
1364 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1366 /* We assume that the store-condition-codes instructions store 0 for false
1367 and some other value for true. This is the value stored for true. */
1369 #define STORE_FLAG_VALUE 1
1371 /* Define the value returned by a floating-point comparison instruction. */
1373 #define FLOAT_STORE_FLAG_VALUE 0.5
1375 /* Canonicalize a comparison from one we don't have to one we do have. */
1377 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1379 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1380 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1385 (CODE) = swap_condition (CODE); \
1387 if (((CODE) == LT || (CODE) == LTU) \
1388 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1390 (CODE) = (CODE) == LT ? LE : LEU; \
1391 (OP1) = GEN_INT (255); \
1395 /* Specify the machine mode that pointers have.
1396 After generation of rtl, the compiler makes no further distinction
1397 between pointers and any other objects of this machine mode. */
1398 #define Pmode DImode
1400 /* Mode of a function address in a call instruction (for indexing purposes). */
1402 #define FUNCTION_MODE Pmode
1404 /* Define this if addresses of constant functions
1405 shouldn't be put through pseudo regs where they can be cse'd.
1406 Desirable on machines where ordinary constants are expensive
1407 but a CALL with constant address is cheap.
1409 We define this on the Alpha so that gen_call and gen_call_value
1410 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1411 then copy it into a register, thus actually letting the address be
1414 #define NO_FUNCTION_CSE
1416 /* Define this to be nonzero if shift instructions ignore all but the low-order
1418 #define SHIFT_COUNT_TRUNCATED 1
1420 /* Use atexit for static constructors/destructors, instead of defining
1421 our own exit function. */
1424 /* Compute the cost of computing a constant rtl expression RTX
1425 whose rtx-code is CODE. The body of this macro is a portion
1426 of a switch statement. If the code is computed here,
1427 return it with a return statement. Otherwise, break from the switch.
1429 If this is an 8-bit constant, return zero since it can be used
1430 nearly anywhere with no cost. If it is a valid operand for an
1431 ADD or AND, likewise return 0 if we know it will be used in that
1432 context. Otherwise, return 2 since it might be used there later.
1433 All other constants take at least two insns. */
1435 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1437 if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \
1439 case CONST_DOUBLE: \
1440 if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \
1441 || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \
1443 else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \
1446 return COSTS_N_INSNS (2); \
1450 return COSTS_N_INSNS (3);
1452 /* Provide the costs of a rtl expression. This is in the body of a
1455 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1456 case PLUS: case MINUS: \
1457 if (FLOAT_MODE_P (GET_MODE (X))) \
1458 return COSTS_N_INSNS (6); \
1459 else if (GET_CODE (XEXP (X, 0)) == MULT \
1460 && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1461 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1462 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1465 if (FLOAT_MODE_P (GET_MODE (X))) \
1466 return COSTS_N_INSNS (6); \
1467 return COSTS_N_INSNS (23); \
1469 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1470 && INTVAL (XEXP (X, 1)) <= 3) \
1472 /* ... fall through ... */ \
1473 case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \
1474 return COSTS_N_INSNS (2); \
1475 case DIV: case UDIV: case MOD: case UMOD: \
1476 if (GET_MODE (X) == SFmode) \
1477 return COSTS_N_INSNS (34); \
1478 else if (GET_MODE (X) == DFmode) \
1479 return COSTS_N_INSNS (63); \
1481 return COSTS_N_INSNS (70); \
1483 return COSTS_N_INSNS (3); \
1484 case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \
1485 case FLOAT_EXTEND: case FLOAT_TRUNCATE: \
1486 return COSTS_N_INSNS (6); \
1487 case NEG: case ABS: \
1488 if (FLOAT_MODE_P (GET_MODE (X))) \
1489 return COSTS_N_INSNS (6); \
1492 /* Control the assembler format that we output. */
1494 /* Output at beginning of assembler file. */
1496 #define ASM_FILE_START(FILE) \
1498 alpha_write_verstamp (FILE); \
1499 fprintf (FILE, "\t.set noreorder\n"); \
1500 fprintf (FILE, "\t.set volatile\n"); \
1501 fprintf (FILE, "\t.set noat\n"); \
1502 ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \
1505 /* Output to assembler file text saying following lines
1506 may contain character constants, extra white space, comments, etc. */
1508 #define ASM_APP_ON ""
1510 /* Output to assembler file text saying following lines
1511 no longer contain unusual constructs. */
1513 #define ASM_APP_OFF ""
1515 #define TEXT_SECTION_ASM_OP ".text"
1517 /* Output before read-only data. */
1519 #define READONLY_DATA_SECTION_ASM_OP ".rdata"
1521 /* Output before writable data. */
1523 #define DATA_SECTION_ASM_OP ".data"
1525 /* Define an extra section for read-only data, a routine to enter it, and
1526 indicate that it is for read-only data.
1528 The first timem we enter the readonly data sectiono for a file, we write
1529 eight bytes of zero. This works around a bug in DEC's assembler in
1530 some versions of OSF/1 V3.x. */
1532 #define EXTRA_SECTIONS readonly_data
1534 #define EXTRA_SECTION_FUNCTIONS \
1536 literal_section () \
1538 if (in_section != readonly_data) \
1540 static int firsttime = 1; \
1542 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1546 ASM_OUTPUT_DOUBLE_INT (asm_out_file, const0_rtx); \
1549 in_section = readonly_data; \
1553 #define READONLY_DATA_SECTION literal_section
1555 /* If we are referencing a function that is static, make the SYMBOL_REF
1556 special. We use this to see indicate we can branch to this function
1557 without setting PV or restoring GP. */
1559 #define ENCODE_SECTION_INFO(DECL) \
1560 if (TREE_CODE (DECL) == FUNCTION_DECL && ! TREE_PUBLIC (DECL)) \
1561 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1563 /* How to refer to registers in assembler output.
1564 This sequence is indexed by compiler's hard-register-number (see above). */
1566 #define REGISTER_NAMES \
1567 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1568 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1569 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1570 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1571 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1572 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1573 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1574 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1576 /* How to renumber registers for dbx and gdb. */
1578 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1580 /* This is how to output the definition of a user-level label named NAME,
1581 such as the label on a static function or variable NAME. */
1583 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1584 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1586 /* This is how to output a command to make the user-level label named NAME
1587 defined for reference from other files. */
1589 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1590 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1592 /* This is how to output a reference to a user-level label named NAME.
1593 `assemble_name' uses this. */
1595 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1596 fprintf (FILE, "%s", NAME)
1598 /* This is how to output an internal numbered label where
1599 PREFIX is the class of label and NUM is the number within the class. */
1601 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1602 if ((PREFIX)[0] == 'L') \
1603 fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \
1605 fprintf (FILE, "%s%d:\n", PREFIX, NUM);
1607 /* This is how to output a label for a jump table. Arguments are the same as
1608 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1611 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1612 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1614 /* This is how to store into the string LABEL
1615 the symbol_ref name of an internal numbered label where
1616 PREFIX is the class of label and NUM is the number within the class.
1617 This is suitable for output with `assemble_name'. */
1619 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1620 if ((PREFIX)[0] == 'L') \
1621 sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \
1623 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1625 /* This is how to output an assembler line defining a `double' constant. */
1627 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1629 if (REAL_VALUE_ISINF (VALUE) \
1630 || REAL_VALUE_ISNAN (VALUE) \
1631 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1634 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1635 fprintf (FILE, "\t.quad 0x%lx%08lx\n", \
1636 t[1] & 0xffffffff, t[0] & 0xffffffff); \
1641 REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \
1642 fprintf (FILE, "\t.t_floating %s\n", str); \
1646 /* This is how to output an assembler line defining a `float' constant. */
1648 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1650 if (REAL_VALUE_ISINF (VALUE) \
1651 || REAL_VALUE_ISNAN (VALUE) \
1652 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1655 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1656 fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
1661 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1662 fprintf (FILE, "\t.s_floating %s\n", str); \
1666 /* This is how to output an assembler line defining an `int' constant. */
1668 #define ASM_OUTPUT_INT(FILE,VALUE) \
1669 ( fprintf (FILE, "\t.long "), \
1670 output_addr_const (FILE, (VALUE)), \
1671 fprintf (FILE, "\n"))
1673 /* This is how to output an assembler line defining a `long' constant. */
1675 #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
1676 ( fprintf (FILE, "\t.quad "), \
1677 output_addr_const (FILE, (VALUE)), \
1678 fprintf (FILE, "\n"))
1680 /* Likewise for `char' and `short' constants. */
1682 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1683 fprintf (FILE, "\t.word %d\n", \
1684 (GET_CODE (VALUE) == CONST_INT \
1685 ? INTVAL (VALUE) & 0xffff : (abort (), 0)))
1687 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1688 fprintf (FILE, "\t.byte %d\n", \
1689 (GET_CODE (VALUE) == CONST_INT \
1690 ? INTVAL (VALUE) & 0xff : (abort (), 0)))
1692 /* We use the default ASCII-output routine, except that we don't write more
1693 than 50 characters since the assembler doesn't support very long lines. */
1695 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1697 FILE *_hide_asm_out_file = (MYFILE); \
1698 unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1699 int _hide_thissize = (MYLENGTH); \
1700 int _size_so_far = 0; \
1702 FILE *asm_out_file = _hide_asm_out_file; \
1703 unsigned char *p = _hide_p; \
1704 int thissize = _hide_thissize; \
1706 fprintf (asm_out_file, "\t.ascii \""); \
1708 for (i = 0; i < thissize; i++) \
1710 register int c = p[i]; \
1712 if (_size_so_far ++ > 50 && i < thissize - 4) \
1713 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1715 if (c == '\"' || c == '\\') \
1716 putc ('\\', asm_out_file); \
1717 if (c >= ' ' && c < 0177) \
1718 putc (c, asm_out_file); \
1721 fprintf (asm_out_file, "\\%o", c); \
1722 /* After an octal-escape, if a digit follows, \
1723 terminate one string constant and start another. \
1724 The Vax assembler fails to stop reading the escape \
1725 after three digits, so this is the only way we \
1726 can get it to parse the data properly. */ \
1727 if (i < thissize - 1 \
1728 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1729 fprintf (asm_out_file, "\"\n\t.ascii \""); \
1732 fprintf (asm_out_file, "\"\n"); \
1737 /* This is how to output an insn to push a register on the stack.
1738 It need not be very fast code. */
1740 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1741 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1742 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1745 /* This is how to output an insn to pop a register from the stack.
1746 It need not be very fast code. */
1748 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1749 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1750 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1753 /* This is how to output an assembler line for a numeric constant byte. */
1755 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1756 fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff)
1758 /* This is how to output an element of a case-vector that is absolute.
1759 (Alpha does not use such vectors, but we must define this macro anyway.) */
1761 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1763 /* This is how to output an element of a case-vector that is relative. */
1766 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1767 fprintf (FILE, "\t.long $%d\n", (VALUE) + 32)
1769 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1770 fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32)
1773 /* This is how to output an assembler line
1774 that says to advance the location counter
1775 to a multiple of 2**LOG bytes. */
1777 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1779 fprintf (FILE, "\t.align %d\n", LOG);
1781 /* This is how to advance the location counter by SIZE bytes. */
1783 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1784 fprintf (FILE, "\t.space %d\n", (SIZE))
1786 /* This says how to output an assembler line
1787 to define a global common symbol. */
1789 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1790 ( fputs ("\t.comm ", (FILE)), \
1791 assemble_name ((FILE), (NAME)), \
1792 fprintf ((FILE), ",%d\n", (SIZE)))
1794 /* This says how to output an assembler line
1795 to define a local common symbol. */
1797 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1798 ( fputs ("\t.lcomm ", (FILE)), \
1799 assemble_name ((FILE), (NAME)), \
1800 fprintf ((FILE), ",%d\n", (SIZE)))
1802 /* Store in OUTPUT a string (made with alloca) containing
1803 an assembler-name for a local static variable named NAME.
1804 LABELNO is an integer which is different for each call. */
1806 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1807 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1808 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1810 /* Define the parentheses used to group arithmetic operations
1811 in assembler code. */
1813 #define ASM_OPEN_PAREN "("
1814 #define ASM_CLOSE_PAREN ")"
1816 /* Define results of standard character escape sequences. */
1817 #define TARGET_BELL 007
1818 #define TARGET_BS 010
1819 #define TARGET_TAB 011
1820 #define TARGET_NEWLINE 012
1821 #define TARGET_VT 013
1822 #define TARGET_FF 014
1823 #define TARGET_CR 015
1825 /* Print operand X (an rtx) in assembler syntax to file FILE.
1826 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1827 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1829 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1831 /* Determine which codes are valid without a following integer. These must
1832 not be alphabetic. */
1834 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1836 /* Print a memory address as an operand to reference that memory location. */
1838 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1839 { rtx addr = (ADDR); \
1841 HOST_WIDE_INT offset = 0; \
1843 if (GET_CODE (addr) == AND) \
1844 addr = XEXP (addr, 0); \
1846 if (GET_CODE (addr) == REG) \
1847 basereg = REGNO (addr); \
1848 else if (GET_CODE (addr) == CONST_INT) \
1849 offset = INTVAL (addr); \
1850 else if (GET_CODE (addr) == PLUS \
1851 && GET_CODE (XEXP (addr, 0)) == REG \
1852 && GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1853 basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \
1857 fprintf (FILE, "%d($%d)", offset, basereg); \
1859 /* Define the codes that are matched by predicates in alpha.c. */
1861 #define PREDICATE_CODES \
1862 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1863 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1864 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1865 {"cint8_operand", {CONST_INT}}, \
1866 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1867 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1868 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1869 {"const48_operand", {CONST_INT}}, \
1870 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1871 {"or_operand", {SUBREG, REG, CONST_INT}}, \
1872 {"mode_mask_operand", {CONST_INT}}, \
1873 {"mul8_operand", {CONST_INT}}, \
1874 {"mode_width_operand", {CONST_INT}}, \
1875 {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1876 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1877 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1878 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
1879 {"fp0_operand", {CONST_DOUBLE}}, \
1880 {"current_file_function_operand", {SYMBOL_REF}}, \
1881 {"call_operand", {REG, SYMBOL_REF}}, \
1882 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1883 SYMBOL_REF, CONST, LABEL_REF}}, \
1884 {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1885 SYMBOL_REF, CONST, LABEL_REF}}, \
1886 {"aligned_memory_operand", {MEM}}, \
1887 {"unaligned_memory_operand", {MEM}}, \
1888 {"any_memory_operand", {MEM}},
1890 /* Tell collect that the object format is ECOFF. */
1891 #define OBJECT_FORMAT_COFF
1892 #define EXTENDED_COFF
1894 /* If we use NM, pass -g to it so it only lists globals. */
1895 #define NM_FLAGS "-pg"
1897 /* Definitions for debugging. */
1899 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
1900 #define DBX_DEBUGGING_INFO /* generate embedded stabs */
1901 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
1903 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1904 #define PREFERRED_DEBUGGING_TYPE \
1905 ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
1909 /* Correct the offset of automatic variables and arguments. Note that
1910 the Alpha debug format wants all automatic variables and arguments
1911 to be in terms of two different offsets from the virtual frame pointer,
1912 which is the stack pointer before any adjustment in the function.
1913 The offset for the argument pointer is fixed for the native compiler,
1914 it is either zero (for the no arguments case) or large enough to hold
1915 all argument registers.
1916 The offset for the auto pointer is the fourth argument to the .frame
1917 directive (local_offset).
1918 To stay compatible with the native tools we use the same offsets
1919 from the virtual frame pointer and adjust the debugger arg/auto offsets
1920 accordingly. These debugger offsets are set up in output_prolog. */
1922 long alpha_arg_offset;
1923 long alpha_auto_offset;
1924 #define DEBUGGER_AUTO_OFFSET(X) \
1925 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1926 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1929 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1930 alpha_output_lineno (STREAM, LINE)
1931 extern void alpha_output_lineno ();
1933 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1934 alpha_output_filename (STREAM, NAME)
1935 extern void alpha_output_filename ();
1938 /* mips-tfile.c limits us to strings of one page. */
1939 #define DBX_CONTIN_LENGTH 4000
1941 /* By default, turn on GDB extensions. */
1942 #define DEFAULT_GDB_EXTENSIONS 1
1944 /* If we are smuggling stabs through the ALPHA ECOFF object
1945 format, put a comment in front of the .stab<x> operation so
1946 that the ALPHA assembler does not choke. The mips-tfile program
1947 will correctly put the stab into the object file. */
1949 #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
1950 #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
1951 #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
1953 /* Forward references to tags are allowed. */
1954 #define SDB_ALLOW_FORWARD_REFERENCES
1956 /* Unknown tags are also allowed. */
1957 #define SDB_ALLOW_UNKNOWN_REFERENCES
1959 #define PUT_SDB_DEF(a) \
1961 fprintf (asm_out_file, "\t%s.def\t", \
1962 (TARGET_GAS) ? "" : "#"); \
1963 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1964 fputc (';', asm_out_file); \
1967 #define PUT_SDB_PLAIN_DEF(a) \
1969 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1970 (TARGET_GAS) ? "" : "#", (a)); \
1973 #define PUT_SDB_TYPE(a) \
1975 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1978 /* For block start and end, we create labels, so that
1979 later we can figure out where the correct offset is.
1980 The normal .ent/.end serve well enough for functions,
1981 so those are just commented out. */
1983 extern int sdb_label_count; /* block start/end next label # */
1985 #define PUT_SDB_BLOCK_START(LINE) \
1987 fprintf (asm_out_file, \
1988 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1990 (TARGET_GAS) ? "" : "#", \
1993 sdb_label_count++; \
1996 #define PUT_SDB_BLOCK_END(LINE) \
1998 fprintf (asm_out_file, \
1999 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
2001 (TARGET_GAS) ? "" : "#", \
2004 sdb_label_count++; \
2007 #define PUT_SDB_FUNCTION_START(LINE)
2009 #define PUT_SDB_FUNCTION_END(LINE)
2011 #define PUT_SDB_EPILOGUE_END(NAME)
2013 /* Specify to run a post-processor, mips-tfile after the assembler
2014 has run to stuff the ecoff debug information into the object file.
2015 This is needed because the Alpha assembler provides no way
2016 of specifying such information in the assembly file. */
2018 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0
2020 #define ASM_FINAL_SPEC "\
2021 %{malpha-as: %{!mno-mips-tfile: \
2022 \n mips-tfile %{v*: -v} \
2024 %{!K: %{save-temps: -I %b.o~}} \
2025 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
2026 %{.s:%i} %{!.s:%g.s}}}"
2029 #define ASM_FINAL_SPEC "\
2030 %{!mgas: %{!mno-mips-tfile: \
2031 \n mips-tfile %{v*: -v} \
2033 %{!K: %{save-temps: -I %b.o~}} \
2034 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
2035 %{.s:%i} %{!.s:%g.s}}}"
2039 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
2040 mips-tdump.c to print them out.
2042 These must match the corresponding definitions in gdb/mipsread.c.
2043 Unfortunately, gcc and gdb do not currently share any directories. */
2045 #define CODE_MASK 0x8F300
2046 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
2047 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
2048 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
2050 /* Override some mips-tfile definitions. */
2052 #define SHASH_SIZE 511
2053 #define THASH_SIZE 55
2055 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
2057 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
2059 /* The system headers under OSF/1 are C++-aware. */
2060 #define NO_IMPLICIT_EXTERN_C
2062 /* The linker will stick __main into the .init section. */
2063 #define HAS_INIT_SECTION
2064 #define LD_INIT_SWITCH "-init"
2065 #define LD_FINI_SWITCH "-fini"
2067 /* We do want to link in libgcc when building shared libraries under OSF/1. */
2068 #define LIBGCC_SPEC "-lgcc"
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