1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "insn-config.h"
28 #include "hard-reg-set.h"
30 #include "basic-block.h"
38 #define MAX_MOVE_MAX MOVE_MAX
41 #ifndef MIN_UNITS_PER_WORD
42 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
45 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
47 /* Modes for each hard register that we can save. The smallest mode is wide
48 enough to save the entire contents of the register. When saving the
49 register because it is live we first try to save in multi-register modes.
50 If that is not possible the save is done one register at a time. */
52 static enum machine_mode
53 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
55 /* For each hard register, a place on the stack where it can be saved,
59 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
61 /* We will only make a register eligible for caller-save if it can be
62 saved in its widest mode with a simple SET insn as long as the memory
63 address is valid. We record the INSN_CODE is those insns here since
64 when we emit them, the addresses might not be valid, so they might not
68 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
70 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
72 /* Set of hard regs currently residing in save area (during insn scan). */
74 static HARD_REG_SET hard_regs_saved;
76 /* Number of registers currently in hard_regs_saved. */
78 static int n_regs_saved;
80 /* Computed by mark_referenced_regs, all regs referenced in a given
82 static HARD_REG_SET referenced_regs;
84 /* Computed in mark_set_regs, holds all registers set by the current
86 static HARD_REG_SET this_insn_sets;
89 static void mark_set_regs PARAMS ((rtx, rtx, void *));
90 static void mark_referenced_regs PARAMS ((rtx));
91 static int insert_save PARAMS ((struct insn_chain *, int, int,
93 enum machine_mode *));
94 static int insert_restore PARAMS ((struct insn_chain *, int, int,
95 int, enum machine_mode *));
96 static struct insn_chain *insert_one_insn PARAMS ((struct insn_chain *, int,
98 static void add_stored_regs PARAMS ((rtx, rtx, void *));
100 /* Initialize for caller-save.
102 Look at all the hard registers that are used by a call and for which
103 regclass.c has not already excluded from being used across a call.
105 Ensure that we can find a mode to save the register and that there is a
106 simple insn to save and restore the register. This latter check avoids
107 problems that would occur if we tried to save the MQ register of some
108 machines directly into memory. */
117 enum machine_mode mode;
119 /* First find all the registers that we need to deal with and all
120 the modes that they can have. If we can't find a mode to use,
121 we can't have the register live over calls. */
123 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
125 if (call_used_regs[i] && ! call_fixed_regs[i])
127 for (j = 1; j <= MOVE_MAX_WORDS; j++)
129 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
131 if (regno_save_mode[i][j] == VOIDmode && j == 1)
133 call_fixed_regs[i] = 1;
134 SET_HARD_REG_BIT (call_fixed_reg_set, i);
139 regno_save_mode[i][1] = VOIDmode;
142 /* The following code tries to approximate the conditions under which
143 we can easily save and restore a register without scratch registers or
144 other complexities. It will usually work, except under conditions where
145 the validity of an insn operand is dependent on the address offset.
146 No such cases are currently known.
148 We first find a typical offset from some BASE_REG_CLASS register.
149 This address is chosen by finding the first register in the class
150 and by finding the smallest power of two that is a valid offset from
151 that register in every mode we will use to save registers. */
153 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
154 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
157 if (i == FIRST_PSEUDO_REGISTER)
160 addr_reg = gen_rtx_REG (Pmode, i);
162 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
164 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
166 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
167 if (regno_save_mode[i][1] != VOIDmode
168 && ! strict_memory_address_p (regno_save_mode[i][1], address))
171 if (i == FIRST_PSEUDO_REGISTER)
175 /* If we didn't find a valid address, we must use register indirect. */
179 /* Next we try to form an insn to save and restore the register. We
180 see if such an insn is recognized and meets its constraints. */
184 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
185 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
186 if (HARD_REGNO_MODE_OK (i, mode))
188 rtx mem = gen_rtx_MEM (mode, address);
189 rtx reg = gen_rtx_REG (mode, i);
190 rtx savepat = gen_rtx_SET (VOIDmode, mem, reg);
191 rtx restpat = gen_rtx_SET (VOIDmode, reg, mem);
192 rtx saveinsn = emit_insn (savepat);
193 rtx restinsn = emit_insn (restpat);
196 reg_save_code[i][mode] = recog_memoized (saveinsn);
197 reg_restore_code[i][mode] = recog_memoized (restinsn);
199 /* Now extract both insns and see if we can meet their
201 ok = (reg_save_code[i][mode] != -1
202 && reg_restore_code[i][mode] != -1);
205 extract_insn (saveinsn);
206 ok = constrain_operands (1);
207 extract_insn (restinsn);
208 ok &= constrain_operands (1);
213 reg_save_code[i][mode] = -1;
214 reg_restore_code[i][mode] = -1;
219 reg_save_code[i][mode] = -1;
220 reg_restore_code[i][mode] = -1;
222 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
223 for (j = 1; j <= MOVE_MAX_WORDS; j++)
224 if (reg_save_code [i][regno_save_mode[i][j]] == -1)
226 regno_save_mode[i][j] = VOIDmode;
229 call_fixed_regs[i] = 1;
230 SET_HARD_REG_BIT (call_fixed_reg_set, i);
237 /* Initialize save areas by showing that we haven't allocated any yet. */
244 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
245 for (j = 1; j <= MOVE_MAX_WORDS; j++)
246 regno_save_mem[i][j] = 0;
249 /* Allocate save areas for any hard registers that might need saving.
250 We take a conservative approach here and look for call-clobbered hard
251 registers that are assigned to pseudos that cross calls. This may
252 overestimate slightly (especially if some of these registers are later
253 used as spill registers), but it should not be significant.
257 In the fallback case we should iterate backwards across all possible
258 modes for the save, choosing the largest available one instead of
259 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
261 We do not try to use "move multiple" instructions that exist
262 on some machines (such as the 68k moveml). It could be a win to try
263 and use them when possible. The hard part is doing it in a way that is
264 machine independent since they might be saving non-consecutive
265 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
272 HARD_REG_SET hard_regs_used;
274 /* Allocate space in the save area for the largest multi-register
275 pseudos first, then work backwards to single register
278 /* Find and record all call-used hard-registers in this function. */
279 CLEAR_HARD_REG_SET (hard_regs_used);
280 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
281 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
283 unsigned int regno = reg_renumber[i];
284 unsigned int endregno
285 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
287 for (r = regno; r < endregno; r++)
288 if (call_used_regs[r])
289 SET_HARD_REG_BIT (hard_regs_used, r);
292 /* Now run through all the call-used hard-registers and allocate
293 space for them in the caller-save area. Try to allocate space
294 in a manner which allows multi-register saves/restores to be done. */
296 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
297 for (j = MOVE_MAX_WORDS; j > 0; j--)
301 /* If no mode exists for this size, try another. Also break out
302 if we have already saved this hard register. */
303 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
306 /* See if any register in this group has been saved. */
307 for (k = 0; k < j; k++)
308 if (regno_save_mem[i + k][1])
316 for (k = 0; k < j; k++)
317 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
325 /* We have found an acceptable mode to store in. */
327 = assign_stack_local (regno_save_mode[i][j],
328 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
330 /* Setup single word save area just in case... */
331 for (k = 0; k < j; k++)
332 /* This should not depend on WORDS_BIG_ENDIAN.
333 The order of words in regs is the same as in memory. */
334 regno_save_mem[i + k][1]
335 = adjust_address_nv (regno_save_mem[i][j],
336 regno_save_mode[i + k][1],
340 /* Now loop again and set the alias set of any save areas we made to
341 the alias set used to represent frame objects. */
342 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
343 for (j = MOVE_MAX_WORDS; j > 0; j--)
344 if (regno_save_mem[i][j] != 0)
345 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
348 /* Find the places where hard regs are live across calls and save them. */
351 save_call_clobbered_regs ()
353 struct insn_chain *chain, *next;
354 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
356 CLEAR_HARD_REG_SET (hard_regs_saved);
359 for (chain = reload_insn_chain; chain != 0; chain = next)
361 rtx insn = chain->insn;
362 enum rtx_code code = GET_CODE (insn);
366 if (chain->is_caller_save_insn)
369 if (GET_RTX_CLASS (code) == 'i')
371 /* If some registers have been saved, see if INSN references
372 any of them. We must restore them before the insn if so. */
378 if (code == JUMP_INSN)
379 /* Restore all registers if this is a JUMP_INSN. */
380 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
383 CLEAR_HARD_REG_SET (referenced_regs);
384 mark_referenced_regs (PATTERN (insn));
385 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
388 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
389 if (TEST_HARD_REG_BIT (referenced_regs, regno))
390 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
393 if (code == CALL_INSN)
396 HARD_REG_SET hard_regs_to_save;
398 /* Use the register life information in CHAIN to compute which
399 regs are live during the call. */
400 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
401 &chain->live_throughout);
402 /* Save hard registers always in the widest mode availble. */
403 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
404 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
405 save_mode [regno] = regno_save_mode [regno][1];
407 save_mode [regno] = VOIDmode;
409 /* Look trought all live pseudos, mark their hard registers
410 and choose proper mode for saving. */
411 EXECUTE_IF_SET_IN_REG_SET
412 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno,
414 int r = reg_renumber[regno];
419 enum machine_mode mode;
421 nregs = HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (regno));
422 mode = HARD_REGNO_CALLER_SAVE_MODE
423 (r, nregs, PSEUDO_REGNO_MODE (regno));
424 if (GET_MODE_BITSIZE (mode)
425 > GET_MODE_BITSIZE (save_mode[r]))
428 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
434 /* Record all registers set in this call insn. These don't need
435 to be saved. N.B. the call insn might set a subreg of a
436 multi-hard-reg pseudo; then the pseudo is considered live
437 during the call, but the subreg that is set isn't. */
438 CLEAR_HARD_REG_SET (this_insn_sets);
439 note_stores (PATTERN (insn), mark_set_regs, NULL);
441 /* Compute which hard regs must be saved before this call. */
442 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
443 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
444 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
445 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
447 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
448 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
449 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
451 /* Must recompute n_regs_saved. */
453 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
454 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
459 if (chain->next == 0 || chain->next->block > chain->block)
462 /* At the end of the basic block, we must restore any registers that
463 remain saved. If the last insn in the block is a JUMP_INSN, put
464 the restore before the insn, otherwise, put it after the insn. */
467 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
468 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
469 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
470 regno, MOVE_MAX_WORDS, save_mode);
475 /* Here from note_stores when an insn stores a value in a register.
476 Set the proper bit or bits in this_insn_sets. All pseudos that have
477 been assigned hard regs have had their register number changed already,
478 so we can ignore pseudos. */
480 mark_set_regs (reg, setter, data)
482 rtx setter ATTRIBUTE_UNUSED;
483 void *data ATTRIBUTE_UNUSED;
485 int regno, endregno, i;
486 enum machine_mode mode = GET_MODE (reg);
488 if (GET_CODE (reg) == SUBREG)
490 rtx inner = SUBREG_REG (reg);
491 if (GET_CODE (inner) != REG || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
494 regno = subreg_hard_regno (reg, 1);
496 else if (GET_CODE (reg) == REG
497 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
502 endregno = regno + HARD_REGNO_NREGS (regno, mode);
504 for (i = regno; i < endregno; i++)
505 SET_HARD_REG_BIT (this_insn_sets, i);
508 /* Here from note_stores when an insn stores a value in a register.
509 Set the proper bit or bits in the passed regset. All pseudos that have
510 been assigned hard regs have had their register number changed already,
511 so we can ignore pseudos. */
513 add_stored_regs (reg, setter, data)
518 int regno, endregno, i;
519 enum machine_mode mode = GET_MODE (reg);
522 if (GET_CODE (setter) == CLOBBER)
525 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
527 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
528 GET_MODE (SUBREG_REG (reg)),
531 reg = SUBREG_REG (reg);
534 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
537 regno = REGNO (reg) + offset;
538 endregno = regno + HARD_REGNO_NREGS (regno, mode);
540 for (i = regno; i < endregno; i++)
541 SET_REGNO_REG_SET ((regset) data, i);
544 /* Walk X and record all referenced registers in REFERENCED_REGS. */
546 mark_referenced_regs (x)
549 enum rtx_code code = GET_CODE (x);
554 mark_referenced_regs (SET_SRC (x));
555 if (code == SET || code == CLOBBER)
559 if (code == REG || code == PC || code == CC0
560 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
561 /* If we're setting only part of a multi-word register,
562 we shall mark it as referenced, because the words
563 that are not being set should be restored. */
564 && ((GET_MODE_SIZE (GET_MODE (x))
565 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
566 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
567 <= UNITS_PER_WORD))))
570 if (code == MEM || code == SUBREG)
578 int regno = REGNO (x);
579 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
580 : reg_renumber[regno]);
584 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
586 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
588 /* If this is a pseudo that did not get a hard register, scan its
589 memory location, since it might involve the use of another
590 register, which might be saved. */
591 else if (reg_equiv_mem[regno] != 0)
592 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
593 else if (reg_equiv_address[regno] != 0)
594 mark_referenced_regs (reg_equiv_address[regno]);
598 fmt = GET_RTX_FORMAT (code);
599 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
602 mark_referenced_regs (XEXP (x, i));
603 else if (fmt[i] == 'E')
604 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
605 mark_referenced_regs (XVECEXP (x, i, j));
609 /* Insert a sequence of insns to restore. Place these insns in front of
610 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
611 the maximum number of registers which should be restored during this call.
612 It should never be less than 1 since we only work with entire registers.
614 Note that we have verified in init_caller_save that we can do this
615 with a simple SET, so use it. Set INSN_CODE to what we save there
616 since the address might not be valid so the insn might not be recognized.
617 These insns will be reloaded and have register elimination done by
618 find_reload, so we need not worry about that here.
620 Return the extra number of registers saved. */
623 insert_restore (chain, before_p, regno, maxrestore, save_mode)
624 struct insn_chain *chain;
628 enum machine_mode *save_mode;
633 unsigned int numregs = 0;
634 struct insn_chain *new;
637 /* A common failure mode if register status is not correct in the RTL
638 is for this routine to be called with a REGNO we didn't expect to
639 save. That will cause us to write an insn with a (nil) SET_DEST
640 or SET_SRC. Instead of doing so and causing a crash later, check
641 for this common case and abort here instead. This will remove one
642 step in debugging such problems. */
644 if (regno_save_mem[regno][1] == 0)
647 /* Get the pattern to emit and update our status.
649 See if we can restore `maxrestore' registers at once. Work
650 backwards to the single register case. */
651 for (i = maxrestore; i > 0; i--)
656 if (regno_save_mem[regno][i] == 0)
659 for (j = 0; j < i; j++)
660 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
665 /* Must do this one restore at a time */
673 mem = regno_save_mem [regno][numregs];
674 if (save_mode [regno] != VOIDmode
675 && save_mode [regno] != GET_MODE (mem)
676 && numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
677 mem = adjust_address (mem, save_mode[regno], 0);
678 pat = gen_rtx_SET (VOIDmode,
679 gen_rtx_REG (GET_MODE (mem),
681 code = reg_restore_code[regno][GET_MODE (mem)];
682 new = insert_one_insn (chain, before_p, code, pat);
684 /* Clear status for all registers we restored. */
685 for (k = 0; k < i; k++)
687 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
688 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
694 /* Tell our callers how many extra registers we saved/restored */
698 /* Like insert_restore above, but save registers instead. */
700 insert_save (chain, before_p, regno, to_save, save_mode)
701 struct insn_chain *chain;
704 HARD_REG_SET *to_save;
705 enum machine_mode *save_mode;
711 unsigned int numregs = 0;
712 struct insn_chain *new;
715 /* A common failure mode if register status is not correct in the RTL
716 is for this routine to be called with a REGNO we didn't expect to
717 save. That will cause us to write an insn with a (nil) SET_DEST
718 or SET_SRC. Instead of doing so and causing a crash later, check
719 for this common case and abort here instead. This will remove one
720 step in debugging such problems. */
722 if (regno_save_mem[regno][1] == 0)
725 /* Get the pattern to emit and update our status.
727 See if we can save several registers with a single instruction.
728 Work backwards to the single register case. */
729 for (i = MOVE_MAX_WORDS; i > 0; i--)
733 if (regno_save_mem[regno][i] == 0)
736 for (j = 0; j < i; j++)
737 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
742 /* Must do this one save at a time */
750 mem = regno_save_mem [regno][numregs];
751 if (save_mode [regno] != VOIDmode
752 && save_mode [regno] != GET_MODE (mem)
753 && numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
754 mem = adjust_address (mem, save_mode[regno], 0);
755 pat = gen_rtx_SET (VOIDmode, mem,
756 gen_rtx_REG (GET_MODE (mem),
758 code = reg_save_code[regno][GET_MODE (mem)];
759 new = insert_one_insn (chain, before_p, code, pat);
761 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
762 for (k = 0; k < numregs; k++)
764 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
765 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
769 /* Tell our callers how many extra registers we saved/restored */
773 /* Emit a new caller-save insn and set the code. */
774 static struct insn_chain *
775 insert_one_insn (chain, before_p, code, pat)
776 struct insn_chain *chain;
781 rtx insn = chain->insn;
782 struct insn_chain *new;
785 /* If INSN references CC0, put our insns in front of the insn that sets
786 CC0. This is always safe, since the only way we could be passed an
787 insn that references CC0 is for a restore, and doing a restore earlier
788 isn't a problem. We do, however, assume here that CALL_INSNs don't
789 reference CC0. Guard against non-INSN's like CODE_LABEL. */
791 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
793 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
794 chain = chain->prev, insn = chain->insn;
797 new = new_insn_chain ();
802 new->prev = chain->prev;
804 new->prev->next = new;
806 reload_insn_chain = new;
810 new->insn = emit_insn_before (pat, insn);
811 /* ??? It would be nice if we could exclude the already / still saved
812 registers from the live sets. */
813 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
814 /* Registers that die in CHAIN->INSN still live in the new insn. */
815 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
817 if (REG_NOTE_KIND (link) == REG_DEAD)
819 rtx reg = XEXP (link, 0);
822 if (GET_CODE (reg) != REG)
826 if (regno >= FIRST_PSEUDO_REGISTER)
827 regno = reg_renumber[regno];
830 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
832 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
835 CLEAR_REG_SET (&new->dead_or_set);
836 if (chain->insn == BLOCK_HEAD (chain->block))
837 BLOCK_HEAD (chain->block) = new->insn;
841 new->next = chain->next;
843 new->next->prev = new;
846 new->insn = emit_insn_after (pat, insn);
847 /* ??? It would be nice if we could exclude the already / still saved
848 registers from the live sets, and observe REG_UNUSED notes. */
849 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
850 /* Registers that are set in CHAIN->INSN live in the new insn.
851 (Unless there is a REG_UNUSED note for them, but we don't
852 look for them here.) */
853 note_stores (PATTERN (chain->insn), add_stored_regs,
854 &new->live_throughout);
855 CLEAR_REG_SET (&new->dead_or_set);
856 if (chain->insn == BLOCK_END (chain->block))
857 BLOCK_END (chain->block) = new->insn;
859 new->block = chain->block;
860 new->is_caller_save_insn = 1;
862 INSN_CODE (new->insn) = code;