gcc/ChangeLog.linaro

   1 2015-01-11  Yvan Roux  <yvan.roux@linaro.org>
   2
   3         Backport from trunk r217362, r217546.
   4         2014-11-14  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
   5
   6         PR target/63724
   7         * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Split out
   8         numerical immediate handling to...
   9         (aarch64_internal_mov_immediate): ...this. New.
  10         (aarch64_rtx_costs): Use aarch64_internal_mov_immediate.
  11         (aarch64_mov_operand_p): Relax predicate.
  12         * config/aarch64/aarch64.md (mov<mode>:GPI): Do not expand CONST_INTs.
  13         (*movsi_aarch64): Turn into define_insn_and_split and new alternative
  14         for 'n'.
  15         (*movdi_aarch64): Likewise.
  16
  17         2014-11-11  James Greenhalgh  <james.greenhalgh@arm.com>
  18
  19         * config/aarch64/aarch64-simd.md
  20         (aarch64_simd_bsl<mode>_internal): Remove float cases, canonicalize.
  21         (aarch64_simd_bsl<mode>): Add gen_lowpart expressions where we
  22         are punning between float vectors and integer vectors.
  23
  24 2014-12-11  Yvan Roux  <yvan.roux@linaro.org>
  25
  26         * LINARO-VERSION: Bump version.
  27
  28 2014-12-11  Yvan Roux  <yvan.roux@linaro.org>
  29
  30         GCC Linaro 4.9-2014.12 released.
  31         * LINARO-VERSION: Update.
  32
  33 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
  34
  35         Backport from trunk r217079, r217080.
  36         2014-11-04  Alan Lawrence  <alan.lawrence@arm.com>
  37
  38         config/arm/neon.md (reduc_smin_<mode> *2): Rename to...
  39         (reduc_smin_scal_<mode> *2): ...this; extract scalar result.
  40         (reduc_smax_<mode> *2): Rename to...
  41         (reduc_smax_scal_<mode> *2): ...this; extract scalar result.
  42         (reduc_umin_<mode> *2): Rename to...
  43         (reduc_umin_scal_<mode> *2): ...this; extract scalar result.
  44         (reduc_umax_<mode> *2): Rename to...
  45         (reduc_umax_scal_<mode> *2): ...this; extract scalar result.
  46
  47         2014-11-04  Alan Lawrence  <alan.lawrence@arm.com>
  48
  49         config/arm/neon.md (reduc_plus_*): Rename to...
  50         (reduc_plus_scal_*): ...this; reduce to temp and extract scalar result.
  51
  52 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
  53
  54         Fix Backport from trunk r216524 (committed at r218379).
  55         Add missing file: config/aarch64/aarch64-cost-tables.h
  56
  57         * config/aarch64/aarch64-cost-tables.h: New file.
  58
  59 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
  60
  61         Backport from trunk r217076.
  62         2014-11-04  Michael Collison <michael.collison@linaro.org>
  63
  64         * config/aarch64/iterators.md (lconst_atomic): New mode attribute
  65         to support constraints for CONST_INT in atomic operations.
  66         * config/aarch64/atomics.md
  67         (atomic_<atomic_optab><mode>): Use lconst_atomic constraint.
  68         (atomic_nand<mode>): Likewise.
  69         (atomic_fetch_<atomic_optab><mode>): Likewise.
  70         (atomic_fetch_nand<mode>): Likewise.
  71         (atomic_<atomic_optab>_fetch<mode>): Likewise.
  72         (atomic_nand_fetch<mode>): Likewise.
  73
  74 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
  75
  76         Backport from trunk r217026.
  77         2014-11-03  Zhenqiang Chen  <zhenqiang.chen@arm.com>
  78
  79         * ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
  80         Allow CC mode if HAVE_cbranchcc4.
  81
  82 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
  83
  84         Backport from trunk r217014.
  85         2014-11-02  Michael Collison  <michael.collison@linaro.org>
  86
  87         * config/arm/arm.h (CLZ_DEFINED_VALUE_AT_ZERO) : Update
  88         to support vector modes.
  89         (CTZ_DEFINED_VALUE_AT_ZERO): Ditto.
  90
  91 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
  92
  93         Backport from trunk r216996, r216998, r216999, r217001, r217002, r217003,
  94         r217004, r217742.
  95         2014-11-18  James Greenhalgh  <james.greenhalgh@arm.com>
  96
  97         PR target/63937
  98         * target.def (use_by_pieces_infrastructure_p): Take unsigned
  99         HOST_WIDE_INT as the size parameter.
 100         * targhooks.c (default_use_by_pieces_infrastructure_p): Likewise.
 101         * targhooks.h (default_use_by_pieces_infrastructure_p): Likewise.
 102         * config/arc/arc.c (arc_use_by_pieces_infrastructure_p)): Likewise.
 103         * config/mips/mips.c (mips_use_by_pieces_infrastructure_p)): Likewise.
 104         * config/s390/s390.c (s390_use_by_pieces_infrastructure_p)): Likewise.
 105         * config/sh/sh.c (sh_use_by_pieces_infrastructure_p)): Likewise.
 106         * config/aarch64/aarch64.c
 107         (aarch64_use_by_pieces_infrastructure_p)): Likewise.
 108         * doc/tm.texi: Regenerate.
 109
 110         2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>
 111
 112         * doc/tm.texi.in (MOVE_BY_PIECES_P): Remove.
 113         (CLEAR_BY_PIECES_P): Likewise.
 114         (SET_BY_PIECES_P): Likewise.
 115         (STORE_BY_PIECES_P): Likewise.
 116         * doc/tm.texi: Regenerate.
 117         * system.h: Poison MOVE_BY_PIECES_P, CLEAR_BY_PIECES_P,
 118         SET_BY_PIECES_P, STORE_BY_PIECES_P.
 119         * expr.c (MOVE_BY_PIECES_P): Remove.
 120         (CLEAR_BY_PIECES_P): Likewise.
 121         (SET_BY_PIECES_P): Likewise.
 122         (STORE_BY_PIECES_P): Likewise.
 123         (can_move_by_pieces): Rewrite in terms of
 124         targetm.use_by_pieces_infrastructure_p.
 125         (emit_block_move_hints): Likewise.
 126         (can_store_by_pieces): Likewise.
 127         (store_by_pieces): Likewise.
 128         (clear_storage_hints): Likewise.
 129         (emit_push_insn): Likewise.
 130         (expand_constructor): Likewise.
 131
 132         2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>
 133
 134         * config/aarch64/aarch64.c
 135         (aarch64_use_by_pieces_infrastructre_p): New.
 136         (TARGET_USE_BY_PIECES_INFRASTRUCTURE): Likewise.
 137         * config/aarch64/aarch64.h (STORE_BY_PIECES_P): Delete.
 138
 139         2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>
 140
 141         * config/mips/mips.h (MOVE_BY_PIECES_P): Remove.
 142         (STORE_BY_PIECES_P): Likewise.
 143         * config/mips/mips.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
 144         (mips_move_by_pieces_p): Rename to...
 145         (mips_use_by_pieces_infrastructure_p): ...this, use new hook
 146         parameters, use the default hook implementation as a
 147         fall-back.
 148
 149         2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>
 150
 151         * config/sh/sh.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
 152         (sh_use_by_pieces_infrastructure_p): Likewise.
 153         * config/sh/sh.h (MOVE_BY_PIECES_P): Remove.
 154         (STORE_BY_PIECES_P): Likewise.
 155         (SET_BY_PIECES_P): Likewise.
 156
 157         2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>
 158
 159         * config/arc/arc.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
 160         (arc_use_by_pieces_infrastructure_p): Likewise.
 161         * confir/arc/arc.h (MOVE_BY_PIECES_P): Delete.
 162         (CAN_MOVE_BY_PIECES): Likewise.
 163
 164         2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>
 165
 166         * config/s390/s390.c (s390_use_by_pieces_infrastructure_p): New.
 167         (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Likewise.
 168         * config/s390/s390.h (MOVE_BY_PIECES_P): Remove.
 169         (CLEAR_BY_PIECES): Likewise.
 170         (SET_BY_PIECES): Likewise.
 171         (STORE_BY_PIECES): Likewise.
 172
 173         2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>
 174
 175         * target.def (use_by_pieces_infrastructure_p): New.
 176         * doc/tm.texi.in (MOVE_BY_PIECES_P): Describe that this macro
 177         is deprecated.
 178         (STORE_BY_PIECES_P): Likewise.
 179         (CLEAR_BY_PIECES_P): Likewise.
 180         (SET_BY_PIECES_P): Likewise.
 181         (TARGET_MOVE_BY_PIECES_PROFITABLE_P): Add hook.
 182         * doc/tm.texi: Regenerate.
 183         * expr.c (MOVE_BY_PIECES_P): Rewrite in terms of
 184         TARGET_USE_BY_PIECES_INFRASTRUCTURE_P.
 185         (STORE_BY_PIECES_P): Likewise.
 186         (CLEAR_BY_PIECES_P): Likewise.
 187         (SET_BY_PIECES_P): Likewise.
 188         (STORE_MAX_PIECES): Move to...
 189         * defaults.h (STORE_MAX_PIECES): ...here.
 190         * targhooks.c (get_move_ratio): New.
 191         (default_use_by_pieces_infrastructure_p): Likewise.
 192         * targhooks.h (default_use_by_pieces_infrastructure_p): New.
 193         * target.h (by_pieces_operation): New.
 194
 195 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 196
 197         Backport from trunk r216765.
 198         2014-10-27  Jiong Wang <jiong.wang@arm.com>
 199
 200         PR target/63442
 201         * optabs.c (prepare_cmp_insn): Use "ret_mode" instead of "word_mode".
 202
 203 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 204
 205         Backport from trunk r216630.
 206         2014-10-24  Felix Yang  <felix.yang@huawei.com>
 207         Jiji Jiang  <jiangjiji@huawei.com>
 208
 209         PR target/63173
 210         * config/aarch64/arm_neon.h (__LD2R_FUNC): Remove macro.
 211         (__LD3R_FUNC): Ditto.
 212         (__LD4R_FUNC): Ditto.
 213         (vld2_dup_s8, vld2_dup_s16, vld2_dup_s32, vld2_dup_f32, vld2_dup_f64,
 214          vld2_dup_u8, vld2_dup_u16, vld2_dup_u32, vld2_dup_p8, vld2_dup_p16
 215          vld2_dup_s64, vld2_dup_u64, vld2q_dup_s8, vld2q_dup_p8,
 216          vld2q_dup_s16, vld2q_dup_p16, vld2q_dup_s32, vld2q_dup_s64,
 217          vld2q_dup_u8, vld2q_dup_u16, vld2q_dup_u32, vld2q_dup_u64
 218          vld2q_dup_f32, vld2q_dup_f64): Rewrite using builtin functions.
 219         (vld3_dup_s64, vld3_dup_u64, vld3_dup_f64, vld3_dup_s8
 220          vld3_dup_p8, vld3_dup_s16, vld3_dup_p16, vld3_dup_s32
 221          vld3_dup_u8, vld3_dup_u16, vld3_dup_u32, vld3_dup_f32
 222          vld3q_dup_s8, vld3q_dup_p8, vld3q_dup_s16, vld3q_dup_p16
 223          vld3q_dup_s32, vld3q_dup_s64, vld3q_dup_u8, vld3q_dup_u16
 224          vld3q_dup_u32, vld3q_dup_u64, vld3q_dup_f32, vld3q_dup_f64): Likewise.
 225         (vld4_dup_s64, vld4_dup_u64, vld4_dup_f64, vld4_dup_s8
 226          vld4_dup_p8, vld4_dup_s16, vld4_dup_p16, vld4_dup_s32
 227          vld4_dup_u8, vld4_dup_u16, vld4_dup_u32, vld4_dup_f32
 228          vld4q_dup_s8, vld4q_dup_p8, vld4q_dup_s16, vld4q_dup_p16
 229          vld4q_dup_s32, vld4q_dup_s64, vld4q_dup_u8, vld4q_dup_u16
 230          vld4q_dup_u32, vld4q_dup_u64, vld4q_dup_f32, vld4q_dup_f64): Likewise.
 231         * config/aarch64/aarch64.md (define_c_enum "unspec"): Add
 232         UNSPEC_LD2_DUP, UNSPEC_LD3_DUP, UNSPEC_LD4_DUP.
 233         * config/aarch64/aarch64-simd-builtins.def (ld2r, ld3r, ld4r): New
 234         builtins.
 235         * config/aarch64/aarch64-simd.md (aarch64_simd_ld2r<mode>): New pattern.
 236         (aarch64_simd_ld3r<mode>): Likewise.
 237         (aarch64_simd_ld4r<mode>): Likewise.
 238         (aarch64_ld2r<mode>): New expand.
 239         (aarch64_ld3r<mode>): Likewise.
 240         (aarch64_ld4r<mode>): Likewise.
 241
 242 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 243
 244         Backport from trunk r217971.
 245         2014-11-22  Uros Bizjak  <ubizjak@gmail.com>
 246
 247         * params.def (PARAM_MAX_COMPLETELY_PEELED_INSNS): Increase to 200.
 248         * config/i386/i386.c (ix86_option_override_internal): Do not increase
 249         PARAM_MAX_COMPLETELY_PEELED_INSNS.
 250
 251 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 252
 253         Backport from trunk r216524.
 254         2014-10-21  Andrew Pinski  <apinski@cavium.com>
 255
 256         * doc/invoke.texi (AARCH64/mtune): Document thunderx as an
 257         available option also.
 258         * config/aarch64/aarch64-cost-tables.h: New file.
 259         * config/aarch64/aarch64-cores.def (thunderx): New core.
 260         * config/aarch64/aarch64-tune.md: Regenerate.
 261         * config/aarch64/aarch64.c: Include aarch64-cost-tables.h instead
 262         of config/arm/aarch-cost-tables.h.
 263         (thunderx_regmove_cost): New variable.
 264         (thunderx_tunings): New variable.
 265
 266 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 267
 268         Backport from trunk r216336.
 269         2014-10-16  Richard Earnshaw  <rearnsha@arm.com>
 270
 271         * config/aarch64/aarch64.c (aarch64_legitimize_address): New function.
 272         (TARGET_LEGITIMIZE_ADDRESS): Redefine.
 273
 274 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 275
 276         Backport from trunk r216253.
 277         2014-10-15  Renlin Li <renlin.li@arm.com>
 278
 279         * config/aarch64/aarch64.h (ARM_DEFAULT_PCS, arm_pcs_variant): Delete.
 280
 281 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 282
 283         Backport from trunk r215711.
 284         2014-09-30  Terry Guo  <terry.guo@arm.com>
 285
 286         * config/arm/arm-cores.def (cortex-m7): New core name.
 287         * config/arm/arm-fpus.def (fpv5-sp-d16): New fpu name.
 288         (fpv5-d16): Ditto.
 289         * config/arm/arm-tables.opt: Regenerated.
 290         * config/arm/arm-tune.md: Regenerated.
 291         * config/arm/arm.h (TARGET_VFP5): New macro.
 292         * config/arm/bpabi.h (BE8_LINK_SPEC): Include cortex-m7.
 293         * config/arm/vfp.md (<vrint_pattern><SDF:mode>2,
 294         smax<mode>3, smin<mode>3): Enabled for FPU FPv5.
 295         * doc/invoke.texi: Document new cpu and fpu names.
 296
 297 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 298
 299         Backport from trunk r215707, r215842.
 300         2014-10-03  David Sherwood  <david.sherwood@arm.com>
 301
 302         * ira-int.h (ira_allocno): Mark hard_regno as signed.
 303
 304         2014-09-30  David Sherwood  <david.sherwood@arm.com>
 305
 306         * ira-int.h (ira_allocno): Add "wmode" field.
 307         * ira-build.c (create_insn_allocnos): Add new "parent" function
 308         parameter.
 309         * ira-conflicts.c (ira_build_conflicts): Add conflicts for registers
 310         that cannot be accessed in wmode.
 311
 312 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 313
 314         Backport from trunk r215540.
 315         2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>
 316
 317         PR rtl-optimization/63210
 318         * ira-color.c (assign_hard_reg): Ignore conflict cost if the
 319         HARD_REGNO is not available for CONFLICT_A.
 320
 321 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 322
 323         Backport from trunk r215046.
 324         2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 325
 326         PR target/61749
 327         * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
 328         Use qualifier_immediate for last operand.  Rename to...
 329         (aarch64_types_ternop_lane_qualifiers): ... This.
 330         (TYPES_QUADOP): Rename to...
 331         (TYPES_TERNOP_LANE): ... This.
 332         (aarch64_simd_expand_args): Return const0_rtx when encountering user
 333         error.  Change return of 0 to return of NULL_RTX.
 334         (aarch64_crc32_expand_builtin): Likewise.
 335         (aarch64_expand_builtin): Return NULL_RTX instead of 0.
 336         ICE when expanding unknown builtin.
 337         * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
 338         TERNOP_LANE qualifiers.
 339         (sqdmlsl_lane): Likewise.
 340         (sqdmlal_laneq): Likewise.
 341         (sqdmlsl_laneq): Likewise.
 342         (sqdmlal2_lane): Likewise.
 343         (sqdmlsl2_lane): Likewise.
 344         (sqdmlal2_laneq): Likewise.
 345         (sqdmlsl2_laneq): Likewise.
 346
 347 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 348
 349         Backport from trunk r215013.
 350         2014-09-08  Joseph Myers  <joseph@codesourcery.com>
 351
 352         * defaults.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
 353         Remove.
 354         * doc/tm.texi.in (ROUND_TOWARDS_ZERO, LARGEST_EXPONENT_IS_NORMAL):
 355         Remove.
 356         * doc/tm.texi: Regenerate.
 357         * system.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
 358         Poison.
 359         * config/arm/arm.h (LARGEST_EXPONENT_IS_NORMAL): Remove.
 360         * config/cris/cris.h (__make_dp): Remove.
 361
 362 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 363
 364         Backport from trunk r214952.
 365         2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>
 366
 367         * config/aarch64/arm_neon.h (__GET_HIGH): New macro.
 368         (vget_high_f32, vget_high_f64, vget_high_p8, vget_high_p16,
 369         vget_high_s8, vget_high_s16, vget_high_s32, vget_high_s64,
 370         vget_high_u8, vget_high_u16, vget_high_u32, vget_high_u64):
 371         Remove temporary __asm__ and reimplement.
 372
 373 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 374
 375         Backport from trunk r214948, r214949.
 376         2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>
 377
 378         * config/aarch64/aarch64-builtins.c (aarch64_fold_builtin): Remove code
 379         handling cmge, cmgt, cmeq, cmtst.
 380
 381         * config/aarch64/aarch64-simd-builtins.def (cmeq, cmge, cmgt, cmle,
 382         cmlt, cmgeu, cmgtu, cmtst): Remove.
 383
 384         * config/aarch64/arm_neon.h (vceq_*, vceqq_*, vceqz_*, vceqzq_*,
 385         vcge_*, vcgeq_*, vcgez_*, vcgezq_*, vcgt_*, vcgtq_*, vcgtz_*,
 386         vcgtzq_*, vcle_*, vcleq_*, vclez_*, vclezq_*, vclt_*, vcltq_*,
 387         vcltz_*, vcltzq_*, vtst_*, vtstq_*): Use gcc vector extensions.
 388
 389         2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>
 390
 391         * config/aarch64/aarch64-builtins.c (aarch64_types_cmtst_qualifiers,
 392         TYPES_TST): Define.
 393         (aarch64_fold_builtin): Update pattern for cmtst.
 394
 395         * config/aarch64/aarch64-protos.h (aarch64_const_vec_all_same_int_p):
 396         Declare.
 397
 398         * config/aarch64/aarch64-simd-builtins.def (cmtst): Update qualifiers.
 399
 400         * config/aarch64/aarch64-simd.md (aarch64_vcond_internal<mode><mode>):
 401         Switch operands, separate out more cases, refactor.
 402
 403         (aarch64_cmtst<mode>): Rewrite pattern to match (plus ... -1).
 404
 405         * config/aarch64.c (aarch64_const_vec_all_same_int_p): Take single
 406         argument; rename old version to...
 407         (aarch64_const_vec_all_same_in_range_p): ...this.
 408         (aarch64_print_operand, aarch64_simd_shift_imm_p): Follow renaming.
 409
 410         * config/aarch64/predicates.md (aarch64_simd_imm_minus_one): Define.
 411
 412 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 413
 414         Backport from trunk r214008.
 415         2014-08-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 416
 417         * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Move
 418         one_match > zero_match case to just before simple_sequence.
 419
 420 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 421
 422         Backport from trunk r213382.
 423         2014-07-31  James Greenhalgh  <james.greenhalgh@arm.com>
 424
 425         * config/aarch64/arm_neon.h (vpadd_<suf><8,16,32,64>): Move to
 426         correct alphabetical position.
 427         (vpaddd_f64): Rewrite using builtins.
 428         (vpaddd_s64): Move to correct alphabetical position.
 429         (vpaddd_u64): New.
 430
 431 2014-12-04  Yvan Roux  <yvan.roux@linaro.org>
 432
 433         Backport from trunk r210735, r215206, r215207, r215208.
 434         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 435
 436         * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
 437         for A57.
 438         (cortexa53_regmove_cost): New cost table for A53.  Increase GP2FP/FP2GP
 439         cost to spilling from integer to FP registers.
 440
 441         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 442
 443         * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
 444         move handling.
 445         (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
 446         are now handled correctly.
 447
 448         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 449
 450         * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
 451         handling of CALLER_SAVE_REGS and POINTER_REGS.
 452
 453         2014-05-22  Kugan Vivekanandarajah  <kuganv@linaro.org>
 454
 455         * config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS
 456         to GENERAL_REGS.
 457         (aarch64_secondary_reload) : LikeWise.
 458         (aarch64_class_max_nregs) : Remove CORE_REGS.
 459         * config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS.
 460         (REG_CLASS_NAMES) : Likewise.
 461         (REG_CLASS_CONTENTS) : LikeWise.
 462         (INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.
 463
 464 2014-11-14  Yvan Roux  <yvan.roux@linaro.org>
 465
 466         * LINARO-VERSION: Bump version.
 467
 468 2014-11-14  Yvan Roux  <yvan.roux@linaro.org>
 469
 470         GCC Linaro 4.9-2014.11 released.
 471         * LINARO-VERSION: Update.
 472
 473 2014-11-14  Yvan Roux  <yvan.roux@linaro.org>
 474
 475         Add Linaro release macros (Linaro only patch.)
 476
 477         * Makefile.in (LINAROVER, LINAROVER_C, LINAROVER_S): Define.
 478         (CFLAGS-cppbuiltin.o): Add LINAROVER macro definition.
 479         (cppbuiltin.o): Depend on $(LINAROVER).
 480         * cppbuiltin.c (parse_linarover): New.
 481         (define_GNUC__): Define __LINARO_RELEASE__ and __LINARO_SPIN__ macros.
 482
 483 2014-11-13  Yvan Roux  <yvan.roux@linaro.org>
 484
 485         Backport from trunk r216229, r216230.
 486         2014-10-14  Andrew Pinski  <apinski@cavium.com>
 487
 488         * explow.c (convert_memory_address_addr_space): Rename to ...
 489         (convert_memory_address_addr_space_1): This.  Add in_const argument.
 490         Inside a CONST RTL, permute the conversion and addition of constant
 491         for zero and sign extended pointers.
 492         (convert_memory_address_addr_space): New function.
 493
 494         2014-10-14  Andrew Pinski  <apinski@cavium.com>
 495
 496         Revert:
 497         2011-08-19  H.J. Lu  <hongjiu.lu@intel.com>
 498
 499         PR middle-end/49721
 500         * explow.c (convert_memory_address_addr_space): Also permute the
 501         conversion and addition of constant for zero-extend.
 502
 503 2014-10-24  Yvan Roux  <yvan.roux@linaro.org>
 504
 505         * LINARO-VERSION: Bump version.
 506
 507 2014-10-24  Yvan Roux  <yvan.roux@linaro.org>
 508
 509         GCC Linaro 4.9-2014.10-1 released.
 510         * LINARO-VERSION: Update.
 511
 512 2014-10-17  Yvan Roux  <yvan.roux@linaro.org>
 513
 514         * LINARO-VERSION: Bump version.
 515
 516 2014-10-17  Yvan Roux  <yvan.roux@linaro.org>
 517
 518         GCC Linaro 4.9-2014.10 released.
 519         * LINARO-VERSION: Update.
 520
 521 2014-10-10  Yvan Roux  <yvan.roux@linaro.org>
 522
 523         Revert:
 524         2014-10-08  Yvan Roux  <yvan.roux@linaro.org>
 525
 526         Backport from trunk r215206, r215207, r215208.
 527         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 528
 529         * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
 530         for A57.
 531         (cortexa53_regmove_cost): New cost table for A53.  Increase GP2FP/FP2GP
 532         cost to spilling from integer to FP registers.
 533
 534         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 535
 536         * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
 537         move handling.
 538         (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
 539         are now handled correctly.
 540
 541         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 542
 543         * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
 544         handling of CALLER_SAVE_REGS and POINTER_REGS.
 545
 546 2014-10-08  Yvan Roux  <yvan.roux@linaro.org>
 547
 548         Backport from trunk r214825, r214826.
 549         2014-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 550
 551         PR target/62275
 552         * config/arm/neon.md
 553         (neon_vcvt<NEON_VCVT:nvrint_variant><su_optab><VCVTF:mode>
 554         <v_cmp_result>): New pattern.
 555         * config/arm/iterators.md (NEON_VCVT): New int iterator.
 556         * config/arm/arm_neon_builtins.def (vcvtav2sf, vcvtav4sf, vcvtauv2sf,
 557         vcvtauv4sf, vcvtpv2sf, vcvtpv4sf, vcvtpuv2sf, vcvtpuv4sf, vcvtmv2sf,
 558         vcvtmv4sf, vcvtmuv2sf, vcvtmuv4sf): New builtin definitions.
 559         * config/arm/arm.c (arm_builtin_vectorized_function): Handle
 560         BUILT_IN_LROUNDF, BUILT_IN_LFLOORF, BUILT_IN_LCEILF.
 561
 562         2014-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 563
 564         PR target/62275
 565         * config/arm/iterators.md (FIXUORS): New code iterator.
 566         (VCVT): New int iterator.
 567         (su_optab): New code attribute.
 568         (su): Likewise.
 569         * config/arm/vfp.md (l<vrint_pattern><su_optab><mode>si2): New pattern.
 570
 571 2014-10-08  Yvan Roux  <yvan.roux@linaro.org>
 572
 573         Backport from trunk r215471.
 574         2014-09-22  James Greenhalgh  <james.greenhalgh@arm.com>
 575
 576         * config/aarch64/geniterators.sh: New.
 577         * config/aarch64/iterators.md (VDQF_DF): New.
 578         * config/aarch64/t-aarch64: Generate aarch64-builtin-iterators.h.
 579         * config/aarch64/aarch64-builtins.c (BUILTIN_*) Remove.
 580
 581 2014-10-08  Yvan Roux  <yvan.roux@linaro.org>
 582
 583         Backport from trunk r215206, r215207, r215208.
 584         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 585
 586         * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
 587         for A57.
 588         (cortexa53_regmove_cost): New cost table for A53.  Increase GP2FP/FP2GP
 589         cost to spilling from integer to FP registers.
 590
 591         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 592
 593         * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
 594         move handling.
 595         (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
 596         are now handled correctly.
 597
 598         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 599
 600         * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
 601         handling of CALLER_SAVE_REGS and POINTER_REGS.
 602
 603 2014-10-07  Yvan Roux  <yvan.roux@linaro.org>
 604
 605         Backport from trunk r214824.
 606         2014-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 607
 608         * config/aarch64/predicates.md (aarch64_comparison_operation):
 609         New special predicate.
 610         * config/aarch64/aarch64.md (*csinc2<mode>_insn): Use
 611         aarch64_comparison_operation instead of matching an operator.
 612         Update operand numbers.
 613         (csinc3<mode>_insn): Likewise.
 614         (*csinv3<mode>_insn): Likewise.
 615         (*csneg3<mode>_insn): Likewise.
 616         (ffs<mode>2): Update gen_csinc3<mode>_insn callsite.
 617         * config/aarch64/aarch64.c (aarch64_get_condition_code):
 618         Return -1 instead of aborting on invalid condition codes.
 619         (aarch64_print_operand): Update aarch64_get_condition_code callsites
 620         to assert that the returned condition code is valid.
 621         * config/aarch64/aarch64-protos.h (aarch64_get_condition_code): Export.
 622
 623 2014-10-07  Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
 624
 625         Backport from trunk r209643, r211881.
 626         2014-06-22  Richard Henderson  <rth@redhat.com>
 627
 628         PR target/61565
 629         * compare-elim.c (struct comparison): Add eh_note.
 630         (find_comparison_dom_walker::before_dom_children): Don't eliminate
 631         a redundant comparison in a different EH region.  Purge EH edges if
 632         necessary.
 633
 634         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 635
 636         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
 637
 638 2014-10-06  Charles Baylis  <charles.baylis@linaro.org>
 639
 640         Backport from trunk r214945.
 641         2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>
 642
 643         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Replace
 644         varargs with pointer parameter.
 645         (aarch64_simd_expand_builtin): pass pointer into previous.
 646
 647 2014-10-06  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
 648
 649         Backport from trunk r214944.
 650         2014-09-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 651
 652         * config/arm/cortex-a53.md (cortex_a53_alu_shift): Add alu_ext,
 653         alus_ext.
 654
 655 2014-10-06  Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
 656
 657         Backport from trunk r214943.
 658         2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>
 659
 660         * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): New pattern.
 661         * config/aarch64/aarch64-simd-builtins.def (rbit): New builtin.
 662         * config/aarch64/arm_neon.h (vrbit_s8, vrbit_u8, vrbitq_s8, vrbitq_u8):
 663         Replace temporary asm with call to builtin.
 664         (vrbit_p8, vrbitq_p8): New functions.
 665
 666 2014-10-06  Michael Collison  <michael.collison@linaro.org>
 667
 668         Backport from trunk r214886.
 669         2014-09-03  Richard Henderson  <rth@redhat.com>
 670
 671         * config/aarch64/aarch64.c (aarch64_popwb_single_reg): Remove.
 672         (aarch64_popwb_pair_reg): Remove.
 673         (aarch64_set_frame_expr): Remove.
 674         (aarch64_restore_callee_saves): Add CFI_OPS argument; fill it with
 675         the restore ops performed by the insns generated.
 676         (aarch64_expand_epilogue): Attach CFI_OPS to the stack deallocation
 677         insn.  Perform the calls_eh_return addition later; do not attempt to
 678         preserve the CFA in that case.  Don't use aarch64_set_frame_expr.
 679         (aarch64_expand_prologue): Use REG_CFA_ADJUST_CFA directly, or no
 680         special markup at all.  Load cfun->machine->frame.hard_fp_offset
 681         into a local variable.
 682         (aarch64_frame_pointer_required): Don't check calls_alloca.
 683
 684 2014-10-06  Yvan Roux  <yvan.roux@linaro.org>
 685
 686         Backport from trunk r215385.
 687         2014-09-19  James Greenhalgh  <james.greenhalgh@arm.com>
 688
 689         * config/aarch64/aarch64.md (stack_protect_test_<mode>): Mark
 690         scratch register as written.
 691
 692 2014-10-06  Yvan Roux  <yvan.roux@linaro.org>
 693
 694         Backport from trunk r215346.
 695         2014-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 696
 697         * config/arm/neon.md (*movmisalign<mode>_neon_load): Change type
 698         to neon_load1_1reg<q>.
 699
 700 2014-10-06  Yvan Roux  <yvan.roux@linaro.org>
 701
 702         Backport from trunk r215321.
 703         2014-09-17  Andrew Stubbs  <ams@codesourcery.com>
 704
 705         * config/arm/arm.c (arm_option_override): Reject -mfpu=neon
 706         when architecture is older than ARMv7.
 707
 708 2014-10-06  Yvan Roux  <yvan.roux@linaro.org>
 709
 710         Backport from trunk r215260.
 711         2014-09-14  David Sherwood  <david.sherwood@arm.com>
 712
 713         * gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit simd mov.
 714
 715 2014-10-06  Yvan Roux  <yvan.roux@linaro.org>
 716
 717         Backport from trunk r215205.
 718         2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 719
 720         * gcc/ree.c (combine_reaching_defs): Ensure inserted copy don't change
 721         the number of hard registers.
 722
 723 2014-10-06  Yvan Roux  <yvan.roux@linaro.org>
 724
 725         Backport from trunk r215136.
 726         2014-09-10  Xinliang David Li  <davidxl@google.com>
 727
 728         PR target/63209
 729         * config/arm/arm.md (movcond_addsi): Handle case where source
 730         and target operands are the same.
 731
 732 2014-10-06  Yvan Roux  <yvan.roux@linaro.org>
 733
 734         Backport from trunk r215086.
 735         2014-09-09  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 736         Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 737
 738          * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Add crtfastmath.o.
 739          * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATH_ENDFILE_SPEC):
 740         Define.
 741         (ENDFILE_SPEC): Define and use GNU_USER_TARGET_MATH_ENDFILE_SPEC.
 742
 743 2014-10-06  Yvan Roux  <yvan.roux@linaro.org>
 744
 745         Backport from trunk r215067.
 746         2014-09-09  Jiong Wang  <jiong.wang@arm.com>
 747
 748         * config/arm/arm.c (NEON_COPYSIGNF): New enum.
 749         (arm_init_neon_builtins): Support NEON_COPYSIGNF.
 750         (arm_builtin_vectorized_function): Likewise.
 751         * config/arm/arm_neon_builtins.def: New macro for copysignf.
 752         * config/arm/neon.md (neon_copysignf<mode>): New pattern for vector
 753         copysignf.
 754
 755 2014-10-03  Yvan Roux  <yvan.roux@linaro.org>
 756
 757         Backport from trunk r215050, r215051, r215052, r215053, r215054,
 758         r215055, r215056.
 759         2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 760
 761         * config/arm/arm.md (vfp_pop_multiple_with_writeback): Use vldm
 762         mnemonic instead of fldmfdd.
 763         * config/arm/arm.c (vfp_output_fstmd): Rename to...
 764         (vfp_output_vstmd): ... This.  Convert output to UAL syntax.
 765         Output vpush when address register is SP.
 766         * config/arm/arm-protos.h (vfp_output_fstmd): Rename to...
 767         (vfp_output_vstmd): ... This.
 768         * config/arm/vfp.md (push_multi_vfp): Update call to
 769         vfp_output_vstmd.
 770
 771         2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 772
 773         * config/arm/vfp.md (*movcc_vfp): Use UAL syntax.
 774
 775         2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 776
 777         * config/arm/vfp.md (*sqrtsf2_vfp): Use UAL assembly syntax.
 778         (*sqrtdf2_vfp): Likewise.
 779         (*cmpsf_vfp): Likewise.
 780         (*cmpsf_trap_vfp): Likewise.
 781         (*cmpdf_vfp): Likewise.
 782         (*cmpdf_trap_vfp): Likewise.
 783
 784         2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 785
 786         * config/arm/vfp.md (*extendsfdf2_vfp): Use UAL assembly syntax.
 787         (*truncdfsf2_vfp): Likewise.
 788         (*truncsisf2_vfp): Likewise.
 789         (*truncsidf2_vfp): Likewise.
 790         (fixuns_truncsfsi2): Likewise.
 791         (fixuns_truncdfsi2): Likewise.
 792         (*floatsisf2_vfp): Likewise.
 793         (*floatsidf2_vfp): Likewise.
 794         (floatunssisf2): Likewise.
 795         (floatunssidf2): Likewise.
 796
 797         2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 798
 799         * config/arm/vfp.md (*mulsf3_vfp): Use UAL assembly syntax.
 800         (*muldf3_vfp): Likewise.
 801         (*mulsf3negsf_vfp): Likewise.
 802         (*muldf3negdf_vfp): Likewise.
 803         (*mulsf3addsf_vfp): Likewise.
 804         (*muldf3adddf_vfp): Likewise.
 805         (*mulsf3subsf_vfp): Likewise.
 806         (*muldf3subdf_vfp): Likewise.
 807         (*mulsf3negsfaddsf_vfp): Likewise.
 808         (*fmuldf3negdfadddf_vfp): Likewise.
 809         (*mulsf3negsfsubsf_vfp): Likewise.
 810         (*muldf3negdfsubdf_vfp): Likewise.
 811
 812         2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 813
 814         * config/arm/vfp.md (*abssf2_vfp): Use UAL assembly syntax.
 815         (*absdf2_vfp): Likewise.
 816         (*negsf2_vfp): Likewise.
 817         (*negdf2_vfp): Likewise.
 818         (*addsf3_vfp): Likewise.
 819         (*adddf3_vfp): Likewise.
 820         (*subsf3_vfp): Likewise.
 821         (*subdf3_vfp): Likewise.
 822         (*divsf3_vfp): Likewise.
 823         (*divdf3_vfp): Likewise.
 824
 825         2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 826
 827         * config/arm/arm.c (output_move_vfp): Use UAL syntax for load/store
 828         multiple.
 829         (arm_print_operand): Don't convert real values to decimal
 830         representation in default case.
 831         (fp_immediate_constant): Delete.
 832         * config/arm/arm-protos.h (fp_immediate_constant): Likewise.
 833         * config/arm/vfp.md (*arm_movsi_vfp): Convert to VFP moves to UAL
 834         syntax.
 835         (*thumb2_movsi_vfp): Likewise.
 836         (*movdi_vfp): Likewise.
 837         (*movdi_vfp_cortexa8): Likewise.
 838         (*movhf_vfp_neon): Likewise.
 839         (*movhf_vfp): Likewise.
 840         (*movsf_vfp): Likewise.
 841         (*thumb2_movsf_vfp): Likewise.
 842         (*movdf_vfp): Likewise.
 843         (*thumb2_movdf_vfp): Likewise.
 844         (*movsfcc_vfp): Likewise.
 845         (*thumb2_movsfcc_vfp): Likewise.
 846         (*movdfcc_vfp): Likewise.
 847         (*thumb2_movdfcc_vfp): Likewise.
 848
 849 2014-10-03  Yvan Roux  <yvan.roux@linaro.org>
 850
 851         Backport from trunk r214959.
 852         2014-09-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 853
 854         * config/arm/cortex-a53.md (cortex_a53_fpalu): Add f_rints, f_rintd,
 855         f_minmaxs, f_minmaxd types.
 856
 857 2014-10-03  Yvan Roux  <yvan.roux@linaro.org>
 858
 859         Backport from trunk r214947.
 860         2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>
 861
 862         * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
 863         Remove qualifier_const_pointer, update comment.
 864
 865 2014-10-03  Yvan Roux  <yvan.roux@linaro.org>
 866
 867         Backport from trunk r214940.
 868         2014-09-05  James Greenhalgh  <james.greenhalgh@arm.com>
 869
 870         * config/aarch64/aarch64.md (sibcall_value_insn): Give operand 1
 871         DImode.
 872
 873 2014-10-03  Yvan Roux  <yvan.roux@linaro.org>
 874
 875         Backport from trunk r213090.
 876         2014-07-26  Andrew Pinski  <apinski@cavium.com>
 877
 878         * config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
 879         from the read only register.
 880
 881 2014-09-11  Yvan Roux  <yvan.roux@linaro.org>
 882
 883         * LINARO-VERSION: Bump version.
 884
 885 2014-09-10  Yvan Roux  <yvan.roux@linaro.org>
 886
 887         GCC Linaro 4.9-2014.09 released.
 888         * LINARO-VERSION: Update.
 889
 890 2014-09-09  Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
 891
 892         Backport from trunk r215004.
 893         2014-09-07 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
 894
 895         PR target/63190
 896         * config/aarch64/aarch64.md (stack_protect_test_<mode>) Add register
 897         constraint for operand0 and remove write only modifier from operand3.
 898
 899 2014-09-09  Michael Collison  <michael.collison@linaro.org>
 900
 901         Backport from trunk r212178
 902         2014-06-30  Joseph Myers  <joseph@codesourcery.com>
 903
 904         * var-tracking.c (add_stores): Return instead of asserting if old
 905         and new values for conditional store are the same.
 906
 907 2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
 908
 909         Revert:
 910         2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
 911
 912         Backport from trunk r213712.
 913         2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 914
 915         * config/aarch64/aarch64.md (absdi2): Set simd attribute.
 916         (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
 917         (aarch64_movdi_<mode>high): Likewise.
 918         (aarch64_mov<mode>high_di): Likewise.
 919         (aarch64_movdi_<mode>low): Likewise.
 920         (aarch64_mov<mode>low_di): Likewise.
 921         (aarch64_movtilow_tilow): Likewise.
 922         Add comment explaining usage of fp,simd attributes and of
 923         TARGET_FLOAT and TARGET_SIMD.
 924
 925 2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
 926
 927         Backport from trunk r213712.
 928         2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 929
 930         * config/aarch64/aarch64.md (absdi2): Set simd attribute.
 931         (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
 932         (aarch64_movdi_<mode>high): Likewise.
 933         (aarch64_mov<mode>high_di): Likewise.
 934         (aarch64_movdi_<mode>low): Likewise.
 935         (aarch64_mov<mode>low_di): Likewise.
 936         (aarch64_movtilow_tilow): Likewise.
 937         Add comment explaining usage of fp,simd attributes and of
 938         TARGET_FLOAT and TARGET_SIMD.
 939
 940 2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
 941
 942         Backport from trunk r214526.
 943         2014-08-26  Joseph Myers  <joseph@codesourcery.com>
 944
 945         PR target/60606
 946         PR target/61330
 947         * varasm.c (make_decl_rtl): Clear DECL_ASSEMBLER_NAME and
 948         DECL_HARD_REGISTER and return for invalid register specifications.
 949         * cfgexpand.c (expand_one_var): If expand_one_hard_reg_var clears
 950         DECL_HARD_REGISTER, call expand_one_error_var.
 951         * config/arm/arm.c (arm_hard_regno_mode_ok): Do not allow
 952         CC_REGNUM with non-MODE_CC modes.
 953         (arm_regno_class): Return NO_REGS for PC_REGNUM.
 954
 955 2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
 956
 957         Backport from trunk r214503.
 958         2014-08-26  Evandro Menezes <e.menezes@samsung.com>
 959
 960         * config/arm/aarch64/aarch64.c (generic_addrcost_table): Delete
 961         qi cost; add di cost.
 962         (cortexa57_addrcost_table): Likewise.
 963
 964 2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
 965
 966         Backport from trunk r213659.
 967         2014-08-06  Alan Lawrence  <alan.lawrence@arm.com>
 968
 969         * config/aarch64/aarch64.c (aarch64_evpc_dup): Enable for bigendian.
 970         (aarch64_expand_vec_perm_const): Check for dup before zip.
 971
 972 2014-09-02  Yvan Roux  <yvan.roux@linaro.org>
 973
 974         Backport from trunk r213651.
 975         2014-08-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 976
 977         * config/aarch64/aarch64.c (aarch64_classify_address): Use REG_P and
 978         CONST_INT_P instead of GET_CODE and compare.
 979         (aarch64_select_cc_mode): Likewise.
 980         (aarch64_print_operand): Likewise.
 981         (aarch64_rtx_costs): Likewise.
 982         (aarch64_simd_valid_immediate): Likewise.
 983         (aarch64_simd_check_vect_par_cnst_half): Likewise.
 984         (aarch64_simd_emit_pair_result_insn): Likewise.
 985
 986 2014-08-29  Yvan Roux  <yvan.roux@linaro.org>
 987
 988         Backport from trunk r212978.
 989         2014-07-24  Andreas Schwab  <schwab@suse.de>
 990
 991         * lib/target-supports.exp (check_effective_target_arm_nothumb):
 992         Also check for __arm__.
 993
 994 2014-08-29  Christophe Lyon  <christophe.lyon@linaro.org>
 995
 996         Fix backport from trunk 211440:
 997         * config.gcc (aarch64*-*-*): Restore need_64bit_hwint=yes.
 998
 999         This is necessary to build aarch64* compilers on i686 host.
1000
1001 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1002
1003         Backport from trunk r213627.
1004         2014-08-05  James Greenhalgh  <james.greenhalgh@arm.com>
1005
1006         * config/aarch64/aarch64-builtins.c
1007         (aarch64_simd_builtin_type_mode): Delete.
1008         (v8qi_UP): Remap to V8QImode.
1009         (v4hi_UP): Remap to V4HImode.
1010         (v2si_UP): Remap to V2SImode.
1011         (v2sf_UP): Remap to V2SFmode.
1012         (v1df_UP): Remap to V1DFmode.
1013         (di_UP): Remap to DImode.
1014         (df_UP): Remap to DFmode.
1015         (v16qi_UP):V16QImode.
1016         (v8hi_UP): Remap to V8HImode.
1017         (v4si_UP): Remap to V4SImode.
1018         (v4sf_UP): Remap to V4SFmode.
1019         (v2di_UP): Remap to V2DImode.
1020         (v2df_UP): Remap to V2DFmode.
1021         (ti_UP): Remap to TImode.
1022         (ei_UP): Remap to EImode.
1023         (oi_UP): Remap to OImode.
1024         (ci_UP): Map to CImode.
1025         (xi_UP): Remap to XImode.
1026         (si_UP): Remap to SImode.
1027         (sf_UP): Remap to SFmode.
1028         (hi_UP): Remap to HImode.
1029         (qi_UP): Remap to QImode.
1030         (aarch64_simd_builtin_datum): Make mode a machine_mode.
1031         (VAR1): Build builtin name.
1032         (aarch64_init_simd_builtins): Remove dead code.
1033
1034 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1035
1036         Backport from trunk r213713.
1037         2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1038
1039         * config/arm/arm.md (*cmov<mode>): Set type attribute to fcsel.
1040         * config/arm/types.md (f_sels, f_seld): Delete.
1041
1042 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1043
1044         Backport from trunk r213711.
1045         2014-08-07  Ian Bolton  <ian.bolton@arm.com>
1046                     Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1047
1048         * config/aarch64/aarch64.c (aarch64_expand_mov_immediate):
1049         Use MOVN when one of the half-words is 0xffff.
1050
1051 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1052
1053         Backport from trunk r213632.
1054         2014-08-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1055
1056         * config/arm/cortex-a15.md (cortex_a15_alu_shift): Add crc type
1057         to reservation.
1058         * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
1059
1060 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1061
1062         Backport from trunk r213630.
1063         2014-08-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1064
1065         * config/arm/arm.md (clzsi2): Set predicable_short_it attr to no.
1066         (rbitsi2): Likewise.
1067         (*arm_rev): Set predicable and predicable_short_it attributes.
1068
1069 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1070
1071         Backport from trunk r213557.
1072         2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1073                     James Greenhalgh  <james.greenhalgh@arm.com>
1074
1075         * doc/md.texi (clrsb): Document.
1076         (clz): Change reference to x into operand 1.
1077         (ctz): Likewise.
1078         (popcount): Likewise.
1079
1080 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1081
1082         Backport from trunk r213551, r213556.
1083         2014-08-04  Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1084                     Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1085
1086         * sched-deps.c (try_group_insn): Generalise macro fusion hook usage
1087         to any two insns.  Update comment.  Rename to sched_macro_fuse_insns.
1088         (sched_analyze_insn): Update use of try_group_insn to
1089         sched_macro_fuse_insns.
1090         * config/i386/i386.c (ix86_macro_fusion_pair_p): Reject 2nd
1091         arguments that are not conditional jumps.
1092
1093 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1094
1095         Backport from trunk r213490.
1096         2014-08-01  Alan Lawrence  <alan.lawrence@arm.com>
1097
1098         * config/aarch64/aarch64-simd-builtins.def (dup_lane, get_lane): Delete.
1099
1100 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1101
1102         Backport from trunk r213488.
1103         2014-08-01  Jiong Wang <jiong.wang@arm.com>
1104
1105         * config/aarch64/aarch64.c (aarch64_classify_address): Accept all offset
1106         for frame access when strict_p is false.
1107
1108 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1109
1110         Backport from trunk r213485, r213486, r213487.
1111         2014-08-01  Renlin Li <renlin.li@arm.com>
1112                     Jiong Wang <jiong.wang@arm.com>
1113
1114         * config/aarch64/aarch64.c (offset_7bit_signed_scaled_p): Rename to
1115         aarch64_offset_7bit_signed_scaled_p, remove static and use it.
1116         * config/aarch64/aarch64-protos.h (aarch64_offset_7bit_signed_scaled_p):
1117         Declaration.
1118         * config/aarch64/predicates.md (aarch64_mem_pair_offset): Define new
1119         predicate.
1120         * config/aarch64/aarch64.md (loadwb_pair, storewb_pair): Use
1121         aarch64_mem_pair_offset.
1122
1123         2014-08-01  Jiong Wang <jiong.wang@arm.com>
1124
1125         * config/aarch64/aarch64.md (loadwb_pair<GPI:mode>_<P:mode>): Fix
1126         offset.
1127         (loadwb_pair<GPI:mode>_<P:mode>): Likewise.
1128         * config/aarch64/aarch64.c (aarch64_gen_loadwb_pair): Likewise.
1129
1130 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1131
1132         Backport from trunk r213379.
1133         2014-07-31  James Greenhalgh  <james.greenhalgh@arm.com>
1134
1135         * config/aarch64/aarch64-builtins.c
1136         (aarch64_gimple_fold_builtin): Don't fold reduction operations for
1137         BYTES_BIG_ENDIAN.
1138
1139 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
1140
1141         Backport from trunk r213378.
1142         2014-07-31  James Greenhalgh  <james.greenhalgh@arm.com>
1143
1144         * config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Vary
1145         the generated mask based on BYTES_BIG_ENDIAN.
1146         (aarch64_simd_check_vect_par_cnst_half): New.
1147         * config/aarch64/aarch64-protos.h
1148         (aarch64_simd_check_vect_par_cnst_half): New.
1149         * config/aarch64/predicates.md (vect_par_cnst_hi_half): Refactor
1150         the check out to aarch64_simd_check_vect_par_cnst_half.
1151         (vect_par_cnst_lo_half): Likewise.
1152         * config/aarch64/aarch64-simd.md
1153         (aarch64_simd_move_hi_quad_<mode>): Always use vec_par_cnst_lo_half.
1154         (move_hi_quad_<mode>): Always generate a low mask.
1155
1156 2014-08-22  Yvan Roux  <yvan.roux@linaro.org>
1157
1158         Backport from trunk r212927, r213304.
1159         2014-07-30  Jiong Wang  <jiong.wang@arm.com>
1160
1161         * config/arm/arm.c (arm_get_frame_offsets): Adjust condition for
1162         Thumb2.
1163
1164         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1165
1166         * config/arm/arm.c (arm_get_frame_offsets): If both r3 and other
1167         callee-saved registers are available for padding purpose
1168         and r3 is not mandatory, then prefer use those callee-saved
1169         instead of r3.
1170
1171 2014-08-22  Yvan Roux  <yvan.roux@linaro.org>
1172
1173         Backport from trunk r211717, r213692.
1174         2014-08-07  Kugan Vivekanandarajah  <kuganv@linaro.org>
1175
1176         * config/arm/arm.c (bdesc_2arg): Fix typo.
1177         (arm_atomic_assign_expand_fenv): Remove The default implementation.
1178
1179         2014-06-17  Kugan Vivekanandarajah  <kuganv@linaro.org>
1180
1181         * config/arm/arm.c (arm_atomic_assign_expand_fenv): call
1182         default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
1183         (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
1184         __builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
1185         * config/arm/vfp.md (set_fpscr): Make pattern conditional on
1186         TARGET_HARD_FLOAT.
1187         (get_fpscr) : Likewise.
1188
1189 2014-08-22  Yvan Roux  <yvan.roux@linaro.org>
1190
1191         Backport from trunk r212989, r213628.
1192         2014-08-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1193
1194         * convert.c (convert_to_integer): Guard transformation to lrint by
1195         -fno-math-errno.
1196
1197         2014-07-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1198
1199         PR middle-end/61876
1200         * convert.c (convert_to_integer): Do not convert BUILT_IN_ROUND and cast
1201         when flag_errno_math is on.
1202
1203 2014-08-15  Yvan Roux  <yvan.roux@linaro.org>
1204
1205         * LINARO-VERSION: Bump version.
1206
1207 2014-08-14  Yvan Roux  <yvan.roux@linaro.org>
1208
1209         GCC Linaro 4.9-2014.08 released.
1210         * LINARO-VERSION: Update.
1211
1212 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
1213
1214         Backport from trunk r212912, r212913.
1215         2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1216
1217         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle CLRSB, CLZ.
1218         (case UNSPEC): Handle UNSPEC_RBIT.
1219
1220         2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1221
1222         * config/aarch64/aarch64.md: Delete UNSPEC_CLS.
1223         (clrsb<mode>2): Use clrsb RTL code instead of UNSPEC_CLS.
1224
1225 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
1226
1227         Backport from trunk r213555.
1228         2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1229
1230         PR target/61713
1231         * gcc/optabs.c (expand_atomic_test_and_set): Do not try to emit
1232         move to subtarget in serial version if result is ignored.
1233
1234 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
1235
1236         Backport from trunk r213376.
1237         2014-07-31  Charles Baylis  <charles.baylis@linaro.org>
1238
1239         PR target/61948
1240         * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
1241         constraints are satisfied.
1242         (<shift>di3_neon): Likewise.
1243
1244 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
1245
1246         Backport from trunk r211270, r211271, r211273, r211275, r212943,
1247         r212945, r212946, r212947, r212949, r212950, r212951, r212952, r212954,
1248         r212955, r212956, r212957, r212958, r212976, r212996, r212997, r212999,
1249         r213000.
1250         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
1251
1252         * config/aarch64/aarch64.c (aarch64_popwb_single_reg): New function.
1253         (aarch64_expand_epilogue): Optimize epilogue when !frame_pointer_needed.
1254
1255         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
1256
1257         * config/aarch64/aarch64.c (aarch64_pushwb_single_reg): New function.
1258         (aarch64_expand_prologue): Optimize prologue when !frame_pointer_needed.
1259
1260         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
1261
1262         * config/aarch64/aarch64.c (aarch64_restore_callee_saves)
1263         (aarch64_save_callee_saves): New parameter "skip_wb".
1264         (aarch64_expand_prologue, aarch64_expand_epilogue): Update call site.
1265
1266         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
1267
1268         * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and
1269         "wb_candidate2".
1270         * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize above.
1271
1272         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
1273
1274         * config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't
1275         subtract outgoing area size when restoring stack_pointer_rtx.
1276
1277         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1278
1279         * config/aarch64/aarch64.c (aarch64_popwb_pair_reg)
1280         (aarch64_gen_loadwb_pair): New helper function.
1281         (aarch64_expand_epilogue): Simplify code using new helper functions.
1282         * config/aarch64/aarch64.md (loadwb_pair<GPF:mode>_<P:mode>): Define.
1283
1284         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1285
1286         * config/aarch64/aarch64.c (aarch64_pushwb_pair_reg)
1287         (aarch64_gen_storewb_pair): New helper function.
1288         (aarch64_expand_prologue): Simplify code using new helper functions.
1289         * config/aarch64/aarch64.md (storewb_pair<GPF:mode>_<P:mode>): Define.
1290
1291         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1292
1293         * config/aarch64/aarch64.md: (aarch64_save_or_restore_callee_saves):
1294         Rename to aarch64_save_callee_saves, remove restore code.
1295         (aarch64_restore_callee_saves): New function.
1296
1297         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1298
1299         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted.
1300         (aarch64_save_callee_saves): New function to handle reg save
1301         for both core and vectore regs.
1302
1303         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1304
1305         * config/aarch64/aarch64.c (aarch64_gen_load_pair)
1306         (aarch64_gen_store_pair): New helper function.
1307         (aarch64_save_or_restore_callee_save_registers)
1308         (aarch64_save_or_restore_fprs): Use new helper functions.
1309
1310         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1311
1312         * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
1313         (aarch64_save_or_restore_callee_save_registers)
1314         (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
1315
1316         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1317
1318         * config/aarch64/aarch64.c
1319         (aarch64_save_or_restore_callee_save_registers)
1320         (aarch64_save_or_restore_fprs): Hoist calculation of register rtx.
1321
1322         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1323
1324         * config/aarch64/aarch64.c
1325         (aarch64_save_or_restore_callee_save_registers)
1326         (aarch64_save_or_restore_fprs): Remove 'increment'.
1327
1328         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1329
1330         * config/aarch64/aarch64.c
1331         (aarch64_save_or_restore_callee_save_registers)
1332         (aarch64_save_or_restore_fprs): Use register offset in
1333         cfun->machine->frame.reg_offset.
1334
1335         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1336
1337         * config/aarch64/aarch64.c
1338         (aarch64_save_or_restore_callee_save_registers)
1339         (aarch64_save_or_restore_fprs): Remove base_rtx.
1340
1341         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1342
1343         * config/aarch64/aarch64.c
1344         (aarch64_save_or_restore_callee_save_registers): Rename 'offset'
1345         to 'start_offset'.  Remove local variable 'start_offset'.
1346
1347         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1348
1349         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Change
1350         type to HOST_WIDE_INT.
1351
1352         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
1353
1354         * config/aarch64/aarch64.c (aarch64_expand_prologue)
1355         (aarch64_save_or_restore_fprs)
1356         (aarch64_save_or_restore_callee_save_registers): GNU-Stylize code.
1357
1358         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1359
1360         * config/aarch64/aarch64.h (aarch64_frame): Add hard_fp_offset and
1361         frame_size.
1362         * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize
1363         aarch64_frame hard_fp_offset and frame_size.
1364         (aarch64_expand_prologue): Use aarch64_frame hard_fp_offset and
1365         frame_size; remove original_frame_size.
1366         (aarch64_expand_epilogue, aarch64_final_eh_return_addr): Likewise.
1367         (aarch64_initial_elimination_offset): Remove frame_size and
1368         offset.  Use aarch64_frame frame_size.
1369
1370         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1371                     Jiong Wang  <jiong.wang@arm.com>
1372
1373         * config/aarch64/aarch64.c (aarch64_layout_frame): Correct
1374         initialization of R30 offset.  Update offset.  Iterate core
1375         regisers upto X30.  Remove X29, X30 specific code.
1376
1377         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1378                     Jiong Wang  <jiong.wang@arm.com>
1379
1380         * config/aarch64/aarch64.c (SLOT_NOT_REQUIRED, SLOT_REQUIRED): Define.
1381         (aarch64_layout_frame): Use SLOT_NOT_REQUIRED and SLOT_REQUIRED.
1382         (aarch64_register_saved_on_entry): Adjust test.
1383
1384         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1385
1386         * config/aarch64/aarch64.h (machine_function): Move
1387         saved_varargs_size from here...
1388         (aarch64_frameGTY): ... to here.
1389
1390         * config/aarch64/aarch64.c (aarch64_expand_prologue)
1391         (aarch64_expand_epilogue, aarch64_final_eh_return_addr)
1392         (aarch64_initial_elimination_offset)
1393         (aarch64_setup_incoming_varargs): Adjust location of
1394         saved_varargs_size.
1395
1396 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
1397
1398         Backport from trunk r212753.
1399         2014-07-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1400
1401         * config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
1402         (aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.
1403
1404 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
1405
1406         Backport from trunk r212752.
1407         2014-07-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1408
1409         * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Fix type.
1410         (vmlal_high_lane_s32): Likewise.
1411         (vmlal_high_lane_u16): Likewise.
1412         (vmlal_high_lane_u32): Likewise.
1413         (vmlsl_high_lane_s16): Likewise.
1414         (vmlsl_high_lane_s32): Likewise.
1415         (vmlsl_high_lane_u16): Likewise.
1416         (vmlsl_high_lane_u32): Likewise.
1417
1418 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
1419
1420         Backport from trunk r212512.
1421         2014-07-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1422
1423         * config/arm/cortex-a15.md (cortex_a15_alu): Handle clz, rbit.
1424         * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
1425         * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
1426         * config/arm/cortex-a7.md (cortex_a7_alu_reg): Likewise.
1427         * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
1428         * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
1429         * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
1430
1431 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
1432
1433         Backport from trunk r212358.
1434         2014-07-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1435
1436         * config/arm/arm.c (cortexa5_extra_costs): New table.
1437         (arm_cortex_a5_tune): Use cortexa5_extra_costs.
1438
1439 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
1440
1441         Backport from trunk r212296.
1442         2014-07-04  Tom de Vries  <tom@codesourcery.com>
1443
1444         * config/aarch64/aarch64-simd.md
1445         (define_insn "vec_unpack_trunc_<mode>"): Fix constraint.
1446
1447 2014-08-10  Yvan Roux  <yvan.roux@linaro.org>
1448
1449         Backport from trunk r212142, r212225.
1450         2014-07-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1451
1452         * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
1453         variable i.
1454
1455         2014-06-30  Alan Lawrence  <alan.lawrence@arm.com>
1456
1457         * config/aarch64/aarch64-simd.md (vec_perm): Enable for bigendian.
1458         * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Remove assert
1459         against bigendian and adjust indices.
1460
1461 2014-08-10  Yvan Roux  <yvan.roux@linaro.org>
1462
1463         Backport from trunk r211779.
1464         2014-06-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1465
1466         * config/arm/arm_neon.h (vadd_f32): Change #ifdef to __FAST_MATH.
1467
1468 2014-07-30  Yvan Roux  <yvan.roux@linaro.org>
1469
1470         Backport from trunk r211503.
1471         2014-06-12  Alan Lawrence  <alan.lawrence@arm.com>
1472
1473         * config/aarch64/arm_neon.h (vmlaq_n_f64, vmlsq_n_f64, vrsrtsq_f64,
1474         vcge_p8, vcgeq_p8, vcgez_p8, vcgez_u8, vcgez_u16, vcgez_u32, vcgez_u64,
1475         vcgezq_p8, vcgezq_u8, vcgezq_u16, vcgezq_u32, vcgezq_u64, vcgezd_u64,
1476         vcgt_p8, vcgtq_p8, vcgtz_p8, vcgtz_u8, vcgtz_u16, vcgtz_u32, vcgtz_u64,
1477         vcgtzq_p8, vcgtzq_u8, vcgtzq_u16, vcgtzq_u32, vcgtzq_u64, vcgtzd_u64,
1478         vcle_p8, vcleq_p8, vclez_p8, vclez_u64, vclezq_p8, vclezd_u64, vclt_p8,
1479         vcltq_p8, vcltz_p8, vcltzq_p8, vcltzd_u64): Remove functions as they are
1480         not in the spec.
1481
1482 2014-07-30  Yvan Roux  <yvan.roux@linaro.org>
1483
1484         Backport from trunk r211140.
1485         2014-06-02  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1486
1487         * config/aarch64/aarch64.md (set_fpcr): Drop ISB after FPCR write.
1488
1489 2014-07-29  Yvan Roux  <yvan.roux@linaro.org>
1490
1491         * LINARO-VERSION: Bump version.
1492
1493 2014-07-24  Yvan Roux  <yvan.roux@linaro.org>
1494
1495         GCC Linaro 4.9-2014.07-1 released.
1496         * LINARO-VERSION: Update.
1497
1498 2014-07-20  Yvan Roux  <yvan.roux@linaro.org>
1499
1500         Revert:
1501         2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1502
1503         Backport from trunk r211129.
1504         2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1505
1506         PR target/61154
1507         * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
1508         * config/arm/arm.md (mov64 splitter): Replace const_double_operand
1509         with immediate_operand.
1510
1511 2014-07-19  Yvan Roux  <yvan.roux@linaro.org>
1512
1513         * LINARO-VERSION: Bump version.
1514
1515 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
1516
1517         GCC Linaro 4.9-2014.07 released.
1518         * LINARO-VERSION: Update.
1519
1520 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
1521
1522         Backport from trunk r211887, r211899.
1523         2014-06-23  James Greenhalgh  <james.greenhalgh@arm.com>
1524
1525         * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
1526         "yes" where needed.
1527
1528         2014-06-23  James Greenhalgh  <james.greenhalgh@arm.com>
1529
1530         * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
1531         vector registers.
1532
1533 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
1534
1535         Backport from trunk r211440.
1536         2014-06-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1537
1538         * config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers.
1539         * Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to
1540         dependencies.
1541         * config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define.
1542         (aarch64_crc_builtin_datum): New struct.
1543         (aarch64_crc_builtin_data): New.
1544         (aarch64_init_crc32_builtins): New function.
1545         (aarch64_init_builtins): Initialise CRC32 builtins when appropriate.
1546         (aarch64_crc32_expand_builtin): New.
1547         (aarch64_expand_builtin): Add CRC32 builtin expansion case.
1548         * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
1549         __ARM_FEATURE_CRC32 when appropriate.
1550         (TARGET_CRC32): Define.
1551         * config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H,
1552         UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH,
1553         UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values.
1554         (aarch64_<crc_variant>): New pattern.
1555         * config/aarch64/arm_acle.h: New file.
1556         * config/aarch64/iterators.md (CRC): New int iterator.
1557         (crc_variant, crc_mode): New int attributes.
1558         * doc/aarch64-acle-intrinsics.texi: New file.
1559         * doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics.
1560         Include aarch64-acle-intrinsics.texi.
1561
1562 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
1563
1564         Backport from trunk r211174.
1565         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
1566
1567         * config/aarch64/aarch64-simd.md (aarch64_rev<REVERSE:rev-op><mode>):
1568         New pattern.
1569         * config/aarch64/aarch64.c (aarch64_evpc_rev): New function.
1570         (aarch64_expand_vec_perm_const_1): Add call to aarch64_evpc_rev.
1571         * config/aarch64/iterators.md (REVERSE): New iterator.
1572         (UNSPEC_REV64, UNSPEC_REV32, UNSPEC_REV16): New enum elements.
1573         (rev_op): New int_attribute.
1574         * config/aarch64/arm_neon.h (vrev16_p8, vrev16_s8, vrev16_u8,
1575         vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8,
1576         vrev32_s16, vrev32_u8, vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8,
1577         vrev32q_s16, vrev32q_u8, vrev32q_u16, vrev64_f32, vrev64_p8,
1578         vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
1579         vrev64_u32, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8,
1580         vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32):
1581         Replace temporary __asm__ with __builtin_shuffle.
1582
1583 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
1584
1585         Backport from trunk r210216, r210218, r210219.
1586         2014-05-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1587
1588         * config/arm/arm_neon.h: Update comment.
1589         * config/arm/neon-docgen.ml: Delete.
1590         * config/arm/neon-gen.ml: Delete.
1591         * doc/arm-neon-intrinsics.texi: Update comment.
1592
1593         2014-05-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1594
1595         * config/arm/arm_neon_builtins.def (vadd, vsub): Only define the v2sf
1596         and v4sf versions.
1597         (vand, vorr, veor, vorn, vbic): Remove.
1598         * config/arm/neon.md (neon_vadd, neon_vsub, neon_vadd_unspec): Adjust
1599         iterator.
1600         (neon_vsub_unspec): Likewise.
1601         (neon_vorr, neon_vand, neon_vbic, neon_veor, neon_vorn): Remove.
1602
1603         2014-05-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1604
1605         * config/arm/arm_neon.h (vadd_s8): GNU C implementation
1606         (vadd_s16): Likewise.
1607         (vadd_s32): Likewise.
1608         (vadd_f32): Likewise.
1609         (vadd_u8): Likewise.
1610         (vadd_u16): Likewise.
1611         (vadd_u32): Likewise.
1612         (vadd_s64): Likewise.
1613         (vadd_u64): Likewise.
1614         (vaddq_s8): Likewise.
1615         (vaddq_s16): Likewise.
1616         (vaddq_s32): Likewise.
1617         (vaddq_s64): Likewise.
1618         (vaddq_f32): Likewise.
1619         (vaddq_u8): Likewise.
1620         (vaddq_u16): Likewise.
1621         (vaddq_u32): Likewise.
1622         (vaddq_u64): Likewise.
1623         (vmul_s8): Likewise.
1624         (vmul_s16): Likewise.
1625         (vmul_s32): Likewise.
1626         (vmul_f32): Likewise.
1627         (vmul_u8): Likewise.
1628         (vmul_u16): Likewise.
1629         (vmul_u32): Likewise.
1630         (vmul_p8): Likewise.
1631         (vmulq_s8): Likewise.
1632         (vmulq_s16): Likewise.
1633         (vmulq_s32): Likewise.
1634         (vmulq_f32): Likewise.
1635         (vmulq_u8): Likewise.
1636         (vmulq_u16): Likewise.
1637         (vmulq_u32): Likewise.
1638         (vsub_s8): Likewise.
1639         (vsub_s16): Likewise.
1640         (vsub_s32): Likewise.
1641         (vsub_f32): Likewise.
1642         (vsub_u8): Likewise.
1643         (vsub_u16): Likewise.
1644         (vsub_u32): Likewise.
1645         (vsub_s64): Likewise.
1646         (vsub_u64): Likewise.
1647         (vsubq_s8): Likewise.
1648         (vsubq_s16): Likewise.
1649         (vsubq_s32): Likewise.
1650         (vsubq_s64): Likewise.
1651         (vsubq_f32): Likewise.
1652         (vsubq_u8): Likewise.
1653         (vsubq_u16): Likewise.
1654         (vsubq_u32): Likewise.
1655         (vsubq_u64): Likewise.
1656         (vand_s8): Likewise.
1657         (vand_s16): Likewise.
1658         (vand_s32): Likewise.
1659         (vand_u8): Likewise.
1660         (vand_u16): Likewise.
1661         (vand_u32): Likewise.
1662         (vand_s64): Likewise.
1663         (vand_u64): Likewise.
1664         (vandq_s8): Likewise.
1665         (vandq_s16): Likewise.
1666         (vandq_s32): Likewise.
1667         (vandq_s64): Likewise.
1668         (vandq_u8): Likewise.
1669         (vandq_u16): Likewise.
1670         (vandq_u32): Likewise.
1671         (vandq_u64): Likewise.
1672         (vorr_s8): Likewise.
1673         (vorr_s16): Likewise.
1674         (vorr_s32): Likewise.
1675         (vorr_u8): Likewise.
1676         (vorr_u16): Likewise.
1677         (vorr_u32): Likewise.
1678         (vorr_s64): Likewise.
1679         (vorr_u64): Likewise.
1680         (vorrq_s8): Likewise.
1681         (vorrq_s16): Likewise.
1682         (vorrq_s32): Likewise.
1683         (vorrq_s64): Likewise.
1684         (vorrq_u8): Likewise.
1685         (vorrq_u16): Likewise.
1686         (vorrq_u32): Likewise.
1687         (vorrq_u64): Likewise.
1688         (veor_s8): Likewise.
1689         (veor_s16): Likewise.
1690         (veor_s32): Likewise.
1691         (veor_u8): Likewise.
1692         (veor_u16): Likewise.
1693         (veor_u32): Likewise.
1694         (veor_s64): Likewise.
1695         (veor_u64): Likewise.
1696         (veorq_s8): Likewise.
1697         (veorq_s16): Likewise.
1698         (veorq_s32): Likewise.
1699         (veorq_s64): Likewise.
1700         (veorq_u8): Likewise.
1701         (veorq_u16): Likewise.
1702         (veorq_u32): Likewise.
1703         (veorq_u64): Likewise.
1704         (vbic_s8): Likewise.
1705         (vbic_s16): Likewise.
1706         (vbic_s32): Likewise.
1707         (vbic_u8): Likewise.
1708         (vbic_u16): Likewise.
1709         (vbic_u32): Likewise.
1710         (vbic_s64): Likewise.
1711         (vbic_u64): Likewise.
1712         (vbicq_s8): Likewise.
1713         (vbicq_s16): Likewise.
1714         (vbicq_s32): Likewise.
1715         (vbicq_s64): Likewise.
1716         (vbicq_u8): Likewise.
1717         (vbicq_u16): Likewise.
1718         (vbicq_u32): Likewise.
1719         (vbicq_u64): Likewise.
1720         (vorn_s8): Likewise.
1721         (vorn_s16): Likewise.
1722         (vorn_s32): Likewise.
1723         (vorn_u8): Likewise.
1724         (vorn_u16): Likewise.
1725         (vorn_u32): Likewise.
1726         (vorn_s64): Likewise.
1727         (vorn_u64): Likewise.
1728         (vornq_s8): Likewise.
1729         (vornq_s16): Likewise.
1730         (vornq_s32): Likewise.
1731         (vornq_s64): Likewise.
1732         (vornq_u8): Likewise.
1733         (vornq_u16): Likewise.
1734         (vornq_u32): Likewise.
1735         (vornq_u64): Likewise.
1736
1737 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1738
1739         Backport from trunk r210151.
1740         2014-05-07  Alan Lawrence  <alan.lawrence@arm.com>
1741
1742         * config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8,
1743         vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32,
1744         vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32,
1745         vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32,
1746         vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8,
1747         vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
1748         vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16,
1749         vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle.
1750
1751 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1752
1753         Backport from trunk r209794.
1754         2014-04-25  Marek Polacek  <polacek@redhat.com>
1755
1756         PR c/60114
1757         * c-parser.c (c_parser_initelt): Pass input_location to
1758         process_init_element.
1759         (c_parser_initval): Pass loc to process_init_element.
1760         * c-tree.h (process_init_element): Adjust declaration.
1761         * c-typeck.c (push_init_level): Pass input_location to
1762         process_init_element.
1763         (pop_init_level): Likewise.
1764         (set_designator): Likewise.
1765         (output_init_element): Add location_t parameter.  Pass loc to
1766         digest_init.
1767         (output_pending_init_elements): Pass input_location to
1768         output_init_element.
1769         (process_init_element): Add location_t parameter.  Pass loc to
1770         output_init_element.
1771
1772 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1773
1774         Backport from trunk r211771.
1775         2014-06-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1776
1777         * genattrtab.c (n_bypassed): New variable.
1778         (process_bypasses): Initialise n_bypassed.
1779         Count number of bypassed reservations.
1780         (make_automaton_attrs): Allocate space for bypassed reservations
1781         rather than number of bypasses.
1782
1783 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1784
1785         Backport from trunk r210861.
1786         2014-05-23  Jiong Wang   <jiong.wang@arm.com>
1787
1788         * config/aarch64/predicates.md (aarch64_call_insn_operand): New
1789         predicate.
1790         * config/aarch64/constraints.md ("Ucs", "Usf"):  New constraints.
1791         * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
1792         Adjust for tailcalling through registers.
1793         * config/aarch64/aarch64.h (enum reg_class): New caller save
1794         register class.
1795         (REG_CLASS_NAMES): Likewise.
1796         (REG_CLASS_CONTENTS): Likewise.
1797         * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
1798         Allow tailcalling without decls.
1799
1800 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1801
1802         Backport from trunk r211314.
1803         2014-06-06  James Greenhalgh  <james.greenhalgh@arm.com>
1804
1805         * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
1806         * config/aarch64/aarch64.c (aarch64_move_pointer): New.
1807         (aarch64_progress_pointer): Likewise.
1808         (aarch64_copy_one_part_and_move_pointers): Likewise.
1809         (aarch64_expand_movmen): Likewise.
1810         * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
1811         * config/aarch64/aarch64.md (movmem<mode>): New.
1812
1813 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1814
1815         Backport from trunk r211185, 211186.
1816         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
1817
1818         * gcc/config/aarch64/aarch64-builtins.c
1819         (aarch64_types_binop_uus_qualifiers,
1820         aarch64_types_shift_to_unsigned_qualifiers,
1821         aarch64_types_unsigned_shiftacc_qualifiers): Define.
1822         * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
1823         uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
1824         sqshlu_n, uqshl_n): Update qualifiers.
1825         * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
1826         vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
1827         vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
1828         vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
1829         vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
1830         vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
1831         vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
1832         vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
1833         vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
1834         vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
1835         vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
1836         vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
1837         vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
1838         vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
1839         vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
1840         vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
1841         vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
1842         vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
1843         vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
1844         vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
1845         vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
1846         vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
1847         vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
1848         vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
1849         vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
1850         vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
1851         vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
1852
1853         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
1854
1855         * gcc/config/aarch64/aarch64-builtins.c
1856         (aarch64_types_binop_ssu_qualifiers): New static data.
1857         (TYPES_BINOP_SSU): Define.
1858         * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
1859         urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
1860         * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
1861         vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
1862         vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
1863         vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
1864         vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32,    52
1865         vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64,  53
1866         vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
1867         suffix to builtin function name, remove cast.   55
1868         (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
1869         vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8,  57
1870         vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
1871
1872 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1873
1874         Backport from trunk r211408, 211416.
1875         2014-06-10  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1876
1877         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
1878         REG_CFA_RESTORE mode.
1879
1880         2014-06-10  Jiong Wang  <jiong.wang@arm.com>
1881
1882         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
1883         (aarch64_save_or_restore_callee_save_registers): Fix layout.
1884
1885 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1886
1887         Backport from trunk r211418.
1888         2014-06-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1889
1890         * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
1891         Change second alternative type to f_mcr.
1892         * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
1893         and 12th alternatives' types to f_mcr and f_mrc.
1894         (*movdi_aarch64): Same for 12th and 13th alternatives.
1895         (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
1896         (aarch64_movtilow_tilow): Change type to fmov.
1897
1898 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1899
1900         Backport from trunk r211371.
1901         2014-06-09  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1902
1903         * config/arm/arm-modes.def: Remove XFmode.
1904
1905 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1906
1907         Backport from trunk r211268.
1908         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1909
1910         * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
1911         layout comment.
1912
1913 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1914
1915         Backport from trunk r211129.
1916         2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1917
1918         PR target/61154
1919         * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
1920         * config/arm/arm.md (mov64 splitter): Replace const_double_operand
1921         with immediate_operand.
1922
1923 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1924
1925         Backport from trunk r211073.
1926         2014-05-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1927
1928         * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
1929         to mov_imm.
1930         * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
1931
1932 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1933
1934         Backport from trunk r211050.
1935         2014-05-29  Richard Earnshaw <rearnsha@arm.com>
1936         Richard Sandiford  <rdsandiford@googlemail.com>
1937
1938         * arm/iterators.md (shiftable_ops): New code iterator.
1939         (t2_binop0, arith_shift_insn): New code attributes.
1940         * arm/predicates.md (shift_nomul_operator): New predicate.
1941         * arm/arm.md (insn_enabled): Delete.
1942         (enabled): Remove insn_enabled test.
1943         (*arith_shiftsi): Delete.  Replace with ...
1944         (*<arith_shift_insn>_multsi): ... new pattern.
1945         (*<arith_shift_insn>_shiftsi): ... new pattern.
1946         * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
1947
1948 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1949
1950         Backport from trunk r210996.
1951         2014-05-27  Andrew Pinski  <apinski@cavium.com>
1952
1953         * config/aarch64/aarch64.md (stack_protect_set_<mode>):
1954         Use <w> for the register in assembly template.
1955         (stack_protect_test): Use the mode of operands[0] for the
1956         result.
1957         (stack_protect_test_<mode>): Use <w> for the register
1958         in assembly template.
1959
1960 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1961
1962         Backport from trunk r210967.
1963         2014-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1964
1965         * config/arm/neon.md (neon_bswap<mode>): New pattern.
1966         * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
1967         (arm_init_neon_builtins): Handle NEON_BSWAP.
1968         Define required type nodes.
1969         (arm_expand_neon_builtin): Handle NEON_BSWAP.
1970         (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
1971         * config/arm/arm_neon_builtins.def (bswap): Define builtins.
1972         * config/arm/iterators.md (VDQHSD): New mode iterator.
1973
1974 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1975
1976         Backport from trunk r210471.
1977         2014-05-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1978
1979         * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
1980         enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
1981
1982 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1983
1984         Backport from trunk r210369.
1985         2014-05-13  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1986
1987         * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
1988         (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
1989         Remove associated type declarations and initialisations.
1990         (arm_expand_neon_builtin): Likewise.
1991         (neon_emit_pair_result_insn): Delete.
1992         * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
1993         * config/arm/neon.md (neon_vtrn<mode>): Delete.
1994         (neon_vzip<mode>): Likewise.
1995         (neon_vuzp<mode>): Likewise.
1996
1997 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1998
1999         Backport from trunk r211058, 211177.
2000         2014-05-29  Alan Lawrence  <alan.lawrence@arm.com>
2001
2002         * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
2003         TYPES_BINOPV): New static data.
2004         * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
2005         * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
2006         New patterns.
2007         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
2008         patterns for EXT.
2009         (aarch64_evpc_ext): New function.
2010
2011         * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
2012
2013         * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
2014         vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
2015         vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
2016         vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
2017         vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
2018
2019         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
2020
2021         * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
2022         location == 0.
2023
2024 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
2025
2026         Backport from trunk r209797.
2027         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2028
2029         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
2030         Use HOST_WIDE_INT_C for mask literal.
2031         (aarch_rev16_shleft_mask_imm_p): Likewise.
2032
2033 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
2034
2035         Backport from trunk r211148.
2036         2014-06-02  Andrew Pinski  <apinski@cavium.com>
2037
2038         * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
2039         /lib/ld-linux32-aarch64.so.1 is used for ILP32.
2040         (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
2041         file whose name depends on -mabi= and -mbig-endian.
2042         * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
2043         better and handle ilp32 too.
2044         (MULTILIB_OPTIONS): Delete.
2045         (MULTILIB_DIRNAMES): Delete.
2046
2047 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
2048
2049         Backport from trunk r210828, r211103.
2050         2014-05-31  Kugan Vivekanandarajah  <kuganv@linaro.org>
2051
2052         * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
2053         (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
2054         (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
2055         and __builtins_arm_get_fpscr.
2056         (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
2057         __builtins_arm_get_fpscr.
2058         (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
2059         __builtins_arm_ldfpscr.
2060         (arm_atomic_assign_expand_fenv): New function.
2061         * config/arm/vfp.md (set_fpscr): New pattern.
2062         (get_fpscr) : Likewise.
2063         * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
2064         VUNSPEC_SET_FPSCR.
2065         * doc/extend.texi (AARCH64 Built-in Functions) : Document
2066         __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
2067
2068         2014-05-23  Kugan Vivekanandarajah  <kuganv@linaro.org>
2069
2070         * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
2071         define.
2072         * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
2073         New function declaration.
2074         * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
2075         AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
2076         AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
2077         (aarch64_init_builtins) : Initialize builtins
2078         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
2079         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
2080         (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
2081         __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
2082         and __builtins_aarch64_set_fpsr.
2083         (aarch64_atomic_assign_expand_fenv): New function.
2084         * config/aarch64/aarch64.md (set_fpcr): New pattern.
2085         (get_fpcr) : Likewise.
2086         (set_fpsr) : Likewise.
2087         (get_fpsr) : Likewise.
2088         (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
2089          and UNSPECV_SET_FPSR.
2090         * doc/extend.texi (AARCH64 Built-in Functions) : Document
2091         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
2092         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
2093
2094 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
2095
2096         Backport from trunk r210355.
2097         2014-05-13  Ian Bolton  <ian.bolton@arm.com>
2098
2099         * config/aarch64/aarch64-protos.h
2100         (aarch64_hard_regno_caller_save_mode): New prototype.
2101         * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
2102         New function.
2103         * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
2104
2105 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
2106
2107         Backport from trunk r209943.
2108         2014-04-30  Alan Lawrence  <alan.lawrence@arm.com>
2109
2110         * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
2111         vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
2112         vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
2113         vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
2114         vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
2115         vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
2116         vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
2117         vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
2118
2119 2014-06-26  Yvan Roux  <yvan.roux@linaro.org>
2120
2121         * LINARO-VERSION: Bump version.
2122
2123 2014-06-25  Yvan Roux  <yvan.roux@linaro.org>
2124
2125         GCC Linaro 4.9-2014.06-1 released.
2126         * LINARO-VERSION: Update.
2127
2128 2014-06-24  Yvan Roux  <yvan.roux@linaro.org>
2129
2130         Revert:
2131         2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2132
2133         Backport from trunk r209643.
2134         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
2135
2136         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
2137
2138 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
2139
2140         Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
2141         210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
2142         210508, 210509, 210510, 210512, 211205, 211206.
2143         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2144
2145         * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
2146         (cpu_addrcost_table): Use it.
2147         * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
2148         (aarch64_address_cost): Rewrite using aarch64_classify_address,
2149         move it.
2150
2151         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2152
2153         * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
2154         (cortexa57_vector_cost): Likewise.
2155         (cortexa57_tunings): Use them.
2156
2157         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2158
2159         * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
2160         (TARGET_RTX_COSTS): Call it.
2161
2162         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2163                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2164
2165         * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
2166         emit instructions, return number of instructions which would
2167         be emitted.
2168         (aarch64_add_constant): Update call to aarch64_build_constant.
2169         (aarch64_output_mi_thunk): Likewise.
2170         (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
2171         a CONST_DOUBLE.
2172
2173         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2174                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2175
2176         * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
2177         to...
2178         (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
2179         well formed.
2180         (aarch64_rtx_mult_cost): New.
2181         (aarch64_rtx_costs): Use it, refactor as appropriate.
2182
2183         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2184
2185         * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
2186
2187         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2188                     Philip Tomsich  <philipp.tomsich@theobroma-systems.com>
2189
2190         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
2191         for SET RTX.
2192
2193         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2194                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2195
2196         * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
2197         costs when costing loads and stores to memory.
2198
2199         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2200                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2201
2202         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
2203         logical operations.
2204
2205         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2206                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2207
2208         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
2209         ZERO_EXTEND and SIGN_EXTEND better.
2210
2211         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2212                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2213
2214         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
2215         rotates and shifts.
2216
2217         2014-03-16  James Greenhalgh  <james.greenhalgh@arm.com>
2218                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2219
2220         * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
2221         (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
2222
2223         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2224                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2225
2226         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
2227         DIV/MOD.
2228
2229         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2230                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2231
2232         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
2233         operators.
2234
2235         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2236                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2237
2238         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
2239         FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
2240
2241         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2242                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
2243
2244         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
2245
2246         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2247
2248         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
2249         HIGH, LO_SUM.
2250
2251         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2252
2253         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
2254         where we were unable to cost an RTX.
2255
2256         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
2257
2258         * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
2259
2260         2014-06-03  Andrew Pinski  <apinski@cavium.com>
2261
2262         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
2263         (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
2264
2265         2014-06-03  Andrew Pinski  <apinski@cavium.com>
2266
2267         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
2268         comparisons for OP0.
2269
2270 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
2271
2272         * LINARO-VERSION: Bump version.
2273
2274 2014-06-12  Yvan Roux  <yvan.roux@linaro.org>
2275
2276         GCC Linaro 4.9-2014.06 released.
2277         * LINARO-VERSION: Update.
2278
2279 2014-06-04  Yvan Roux  <yvan.roux@linaro.org>
2280
2281         Backport from trunk r211211.
2282         2014-06-04  Bin Cheng  <bin.cheng@arm.com>
2283
2284         * config/aarch64/aarch64.c (aarch64_classify_address)
2285         (aarch64_legitimize_reload_address): Support full addressing modes
2286         for vector modes.
2287         * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
2288         (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
2289
2290 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
2291
2292         Backport from trunk r209906.
2293         2014-04-29  Alan Lawrence  <alan.lawrence@arm.com>
2294
2295         * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
2296         vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
2297         vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
2298         vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
2299         vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
2300         vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
2301         vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
2302         vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
2303
2304 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
2305
2306         Backport from trunk r209897.
2307         2014-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
2308
2309         * calls.c (initialize_argument_information): Always treat
2310         PUSH_ARGS_REVERSED as 1, simplify code accordingly.
2311         (expand_call): Likewise.
2312         (emit_library_call_calue_1): Likewise.
2313         * expr.c (PUSH_ARGS_REVERSED): Do not define.
2314         (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
2315         code accordingly.
2316
2317 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
2318
2319         Backport from trunk r209880.
2320         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
2321
2322         * config/aarch64/aarch64-builtins.c
2323         (aarch64_types_storestruct_lane_qualifiers): New.
2324         (TYPES_STORESTRUCT_LANE): Likewise.
2325         * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
2326         (st3_lane): Likewise.
2327         (st4_lane): Likewise.
2328         * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
2329         (vec_store_lanesci_lane<mode>): Likewise.
2330         (vec_store_lanesxi_lane<mode>): Likewise.
2331                 (aarch64_st2_lane<VQ:mode>): Likewise.
2332         (aarch64_st3_lane<VQ:mode>): Likewise.
2333         (aarch64_st4_lane<VQ:mode>): Likewise.
2334         * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
2335         * config/aarch64/arm_neon.h
2336                 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
2337         use new macro arguments.
2338         (__ST3_LANE_FUNC): Likewise.
2339         (__ST4_LANE_FUNC): Likewise.
2340         * config/aarch64/iterators.md (V_TWO_ELEM): New.
2341         (V_THREE_ELEM): Likewise.
2342         (V_FOUR_ELEM): Likewise.
2343
2344 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
2345
2346         Backport from trunk r209878.
2347         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
2348
2349         * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
2350         * config/aarch64/aarch64.c
2351         (aarch64_cannot_change_mode_class): Weaken conditions.
2352         (aarch64_modes_tieable_p): New.
2353         * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
2354
2355 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
2356
2357         Backport from trunk r209808.
2358         2014-04-25  Jiong Wang  <jiong.wang@arm.com>
2359
2360         * config/arm/predicates.md (call_insn_operand): Add long_call check.
2361         * config/arm/arm.md (sibcall, sibcall_value): Force the address to
2362         reg for long_call.
2363         * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
2364         restriction.
2365
2366 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
2367
2368         Backport from trunk r209806.
2369         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2370
2371         * config/arm/arm.c (arm_cortex_a8_tune): Initialise
2372         T16-related fields.
2373
2374 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
2375
2376         Backport from trunk r209742, 209749.
2377         2014-04-24  Alan Lawrence  <alan.lawrence@arm.com>
2378
2379         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
2380
2381         2014-04-24  Tejas Belagod  <tejas.belagod@arm.com>
2382
2383         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
2384         for big-endian.
2385
2386 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2387
2388         Backport from trunk r209736.
2389         2014-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2390
2391         * config/aarch64/aarch64-builtins.c
2392         (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
2393         BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
2394         * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
2395         * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
2396         builtins.
2397         * config/aarch64/iterator.md (VDQHSD): New mode iterator.
2398         (Vrevsuff): New mode attribute.
2399
2400 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2401
2402         Backport from trunk r209712.
2403         2014-04-23 Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
2404
2405         * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
2406         (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
2407         machine descriptions for Stack Smashing Protector.
2408
2409 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2410
2411         Backport from trunk r209711.
2412         2014-04-23  Richard Earnshaw  <rearnsha@arm.com>
2413
2414         * aarch64.md (<optab>_rol<mode>3): New pattern.
2415         (<optab>_rolsi3_uxtw): Likewise.
2416         * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
2417
2418 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2419
2420         Backport from trunk r209710.
2421         2014-04-23  James Greenhalgh  <james.greenhalgh@arm.com>
2422
2423         * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
2424         (arm_cortex_a12_tune): Likewise.
2425
2426 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2427
2428         Backport from trunk r209706.
2429         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2430
2431         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
2432
2433 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2434
2435         Backport from trunk r209701, 209702, 209703, 209704, 209705.
2436         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2437
2438         * config/arm/arm.md (arm_rev16si2): New pattern.
2439         (arm_rev16si2_alt): Likewise.
2440         * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
2441
2442         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2443         * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
2444         (rev16<mode>2_alt): Likewise.
2445         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
2446         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
2447         (aarch_rev16_shleft_mask_imm_p): Likewise.
2448         (aarch_rev16_p_1): Likewise.
2449         (aarch_rev16_p): Likewise.
2450         * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
2451         (aarch_rev16_shright_mask_imm_p): Likewise.
2452         (aarch_rev16_shleft_mask_imm_p): Likewise.
2453
2454         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2455
2456         * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
2457         * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
2458         rev cost.
2459         (cortex_a53_extra_costs): Likewise.
2460         (cortex_a57_extra_costs): Likewise.
2461         * config/arm/arm.c (cortexa9_extra_costs): Likewise.
2462         (cortexa7_extra_costs): Likewise.
2463         (cortexa8_extra_costs): Likewise.
2464         (cortexa12_extra_costs): Likewise.
2465         (cortexa15_extra_costs): Likewise.
2466         (v7m_extra_costs): Likewise.
2467         (arm_new_rtx_costs): Handle BSWAP.
2468
2469         2013-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2470
2471         * config/arm/arm.c (cortexa8_extra_costs): New table.
2472         (arm_cortex_a8_tune): New tuning struct.
2473         * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
2474
2475         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2476
2477         * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
2478
2479 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2480
2481         Backport from trunk r209659.
2482         2014-04-22  Richard Henderson  <rth@redhat.com>
2483
2484         * config/aarch64/aarch64 (addti3, subti3): New expanders.
2485         (add<GPI>3_compare0): Remove leading * from name.
2486         (add<GPI>3_carryin): Likewise.
2487         (sub<GPI>3_compare0): Likewise.
2488         (sub<GPI>3_carryin): Likewise.
2489         (<su_optab>mulditi3): New expander.
2490         (multi3): New expander.
2491         (madd<GPI>): Remove leading * from name.
2492
2493 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2494
2495         Backport from trunk r209645.
2496         2014-04-22  Andrew Pinski  <apinski@cavium.com>
2497
2498         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
2499         Handle TLS for ILP32.
2500         * config/aarch64/aarch64.md (tlsie_small): Rename to ...
2501         (tlsie_small_<mode>): this and handle PTR.
2502         (tlsie_small_sidi): New pattern.
2503         (tlsle_small): Change to an expand to handle ILP32.
2504         (tlsle_small_<mode>): New pattern.
2505         (tlsdesc_small): Rename to ...
2506         (tlsdesc_small_<mode>): this and handle PTR.
2507
2508 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2509
2510         Backport from trunk r209643.
2511         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
2512
2513         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
2514
2515 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2516
2517         Backport from trunk r209641, 209642.
2518         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
2519
2520         * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
2521         (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
2522         (aarch64_types_signed_poly_qualifiers): Likewise.
2523         (aarch64_types_unsigned_signed_qualifiers): Likewise.
2524         (aarch64_types_poly_signed_qualifiers): Likewise.
2525         (TYPES_REINTERP_SS): Type macro added.
2526         (TYPES_REINTERP_SU): Likewise.
2527         (TYPES_REINTERP_SP): Likewise.
2528         (TYPES_REINTERP_US): Likewise.
2529         (TYPES_REINTERP_PS): Likewise.
2530         (aarch64_fold_builtin): New expression folding added.
2531         * config/aarch64/aarch64-simd-builtins.def (REINTERP):
2532         Declarations removed.
2533         (REINTERP_SS): Declarations added.
2534         (REINTERP_US): Likewise.
2535         (REINTERP_PS): Likewise.
2536         (REINTERP_SU): Likewise.
2537         (REINTERP_SP): Likewise.
2538         * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
2539         (vreinterpretq_p8_f64): Likewise.
2540         (vreinterpret_p16_f64): Likewise.
2541         (vreinterpretq_p16_f64): Likewise.
2542         (vreinterpret_f32_f64): Likewise.
2543         (vreinterpretq_f32_f64): Likewise.
2544         (vreinterpret_f64_f32): Likewise.
2545         (vreinterpret_f64_p8): Likewise.
2546         (vreinterpret_f64_p16): Likewise.
2547         (vreinterpret_f64_s8): Likewise.
2548         (vreinterpret_f64_s16): Likewise.
2549         (vreinterpret_f64_s32): Likewise.
2550         (vreinterpret_f64_s64): Likewise.
2551         (vreinterpret_f64_u8): Likewise.
2552         (vreinterpret_f64_u16): Likewise.
2553         (vreinterpret_f64_u32): Likewise.
2554         (vreinterpret_f64_u64): Likewise.
2555         (vreinterpretq_f64_f32): Likewise.
2556         (vreinterpretq_f64_p8): Likewise.
2557         (vreinterpretq_f64_p16): Likewise.
2558         (vreinterpretq_f64_s8): Likewise.
2559         (vreinterpretq_f64_s16): Likewise.
2560         (vreinterpretq_f64_s32): Likewise.
2561         (vreinterpretq_f64_s64): Likewise.
2562         (vreinterpretq_f64_u8): Likewise.
2563         (vreinterpretq_f64_u16): Likewise.
2564         (vreinterpretq_f64_u32): Likewise.
2565         (vreinterpretq_f64_u64): Likewise.
2566         (vreinterpret_s64_f64): Likewise.
2567         (vreinterpretq_s64_f64): Likewise.
2568         (vreinterpret_u64_f64): Likewise.
2569         (vreinterpretq_u64_f64): Likewise.
2570         (vreinterpret_s8_f64): Likewise.
2571         (vreinterpretq_s8_f64): Likewise.
2572         (vreinterpret_s16_f64): Likewise.
2573         (vreinterpretq_s16_f64): Likewise.
2574         (vreinterpret_s32_f64): Likewise.
2575         (vreinterpretq_s32_f64): Likewise.
2576         (vreinterpret_u8_f64): Likewise.
2577         (vreinterpretq_u8_f64): Likewise.
2578         (vreinterpret_u16_f64): Likewise.
2579         (vreinterpretq_u16_f64): Likewise.
2580         (vreinterpret_u32_f64): Likewise.
2581         (vreinterpretq_u32_f64): Likewise.
2582
2583         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
2584
2585         * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
2586         * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
2587         (vreinterpret_p8_s8): Likewise.
2588         * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
2589         (vreinterpret_p8_s16): Likewise.
2590         (vreinterpret_p8_s32): Likewise.
2591         (vreinterpret_p8_s64): Likewise.
2592         (vreinterpret_p8_f32): Likewise.
2593         (vreinterpret_p8_u8): Likewise.
2594         (vreinterpret_p8_u16): Likewise.
2595         (vreinterpret_p8_u32): Likewise.
2596         (vreinterpret_p8_u64): Likewise.
2597         (vreinterpret_p8_p16): Likewise.
2598         (vreinterpretq_p8_s8): Likewise.
2599         (vreinterpretq_p8_s16): Likewise.
2600         (vreinterpretq_p8_s32): Likewise.
2601         (vreinterpretq_p8_s64): Likewise.
2602         (vreinterpretq_p8_f32): Likewise.
2603         (vreinterpretq_p8_u8): Likewise.
2604         (vreinterpretq_p8_u16): Likewise.
2605         (vreinterpretq_p8_u32): Likewise.
2606         (vreinterpretq_p8_u64): Likewise.
2607         (vreinterpretq_p8_p16): Likewise.
2608         (vreinterpret_p16_s8): Likewise.
2609         (vreinterpret_p16_s16): Likewise.
2610         (vreinterpret_p16_s32): Likewise.
2611         (vreinterpret_p16_s64): Likewise.
2612         (vreinterpret_p16_f32): Likewise.
2613         (vreinterpret_p16_u8): Likewise.
2614         (vreinterpret_p16_u16): Likewise.
2615         (vreinterpret_p16_u32): Likewise.
2616         (vreinterpret_p16_u64): Likewise.
2617         (vreinterpret_p16_p8): Likewise.
2618         (vreinterpretq_p16_s8): Likewise.
2619         (vreinterpretq_p16_s16): Likewise.
2620         (vreinterpretq_p16_s32): Likewise.
2621         (vreinterpretq_p16_s64): Likewise.
2622         (vreinterpretq_p16_f32): Likewise.
2623         (vreinterpretq_p16_u8): Likewise.
2624         (vreinterpretq_p16_u16): Likewise.
2625         (vreinterpretq_p16_u32): Likewise.
2626         (vreinterpretq_p16_u64): Likewise.
2627         (vreinterpretq_p16_p8): Likewise.
2628         (vreinterpret_f32_s8): Likewise.
2629         (vreinterpret_f32_s16): Likewise.
2630         (vreinterpret_f32_s32): Likewise.
2631         (vreinterpret_f32_s64): Likewise.
2632         (vreinterpret_f32_u8): Likewise.
2633         (vreinterpret_f32_u16): Likewise.
2634         (vreinterpret_f32_u32): Likewise.
2635         (vreinterpret_f32_u64): Likewise.
2636         (vreinterpret_f32_p8): Likewise.
2637         (vreinterpret_f32_p16): Likewise.
2638         (vreinterpretq_f32_s8): Likewise.
2639         (vreinterpretq_f32_s16): Likewise.
2640         (vreinterpretq_f32_s32): Likewise.
2641         (vreinterpretq_f32_s64): Likewise.
2642         (vreinterpretq_f32_u8): Likewise.
2643         (vreinterpretq_f32_u16): Likewise.
2644         (vreinterpretq_f32_u32): Likewise.
2645         (vreinterpretq_f32_u64): Likewise.
2646         (vreinterpretq_f32_p8): Likewise.
2647         (vreinterpretq_f32_p16): Likewise.
2648         (vreinterpret_s64_s8): Likewise.
2649         (vreinterpret_s64_s16): Likewise.
2650         (vreinterpret_s64_s32): Likewise.
2651         (vreinterpret_s64_f32): Likewise.
2652         (vreinterpret_s64_u8): Likewise.
2653         (vreinterpret_s64_u16): Likewise.
2654         (vreinterpret_s64_u32): Likewise.
2655         (vreinterpret_s64_u64): Likewise.
2656         (vreinterpret_s64_p8): Likewise.
2657         (vreinterpret_s64_p16): Likewise.
2658         (vreinterpretq_s64_s8): Likewise.
2659         (vreinterpretq_s64_s16): Likewise.
2660         (vreinterpretq_s64_s32): Likewise.
2661         (vreinterpretq_s64_f32): Likewise.
2662         (vreinterpretq_s64_u8): Likewise.
2663         (vreinterpretq_s64_u16): Likewise.
2664         (vreinterpretq_s64_u32): Likewise.
2665         (vreinterpretq_s64_u64): Likewise.
2666         (vreinterpretq_s64_p8): Likewise.
2667         (vreinterpretq_s64_p16): Likewise.
2668         (vreinterpret_u64_s8): Likewise.
2669         (vreinterpret_u64_s16): Likewise.
2670         (vreinterpret_u64_s32): Likewise.
2671         (vreinterpret_u64_s64): Likewise.
2672         (vreinterpret_u64_f32): Likewise.
2673         (vreinterpret_u64_u8): Likewise.
2674         (vreinterpret_u64_u16): Likewise.
2675         (vreinterpret_u64_u32): Likewise.
2676         (vreinterpret_u64_p8): Likewise.
2677         (vreinterpret_u64_p16): Likewise.
2678         (vreinterpretq_u64_s8): Likewise.
2679         (vreinterpretq_u64_s16): Likewise.
2680         (vreinterpretq_u64_s32): Likewise.
2681         (vreinterpretq_u64_s64): Likewise.
2682         (vreinterpretq_u64_f32): Likewise.
2683         (vreinterpretq_u64_u8): Likewise.
2684         (vreinterpretq_u64_u16): Likewise.
2685         (vreinterpretq_u64_u32): Likewise.
2686         (vreinterpretq_u64_p8): Likewise.
2687         (vreinterpretq_u64_p16): Likewise.
2688         (vreinterpret_s8_s16): Likewise.
2689         (vreinterpret_s8_s32): Likewise.
2690         (vreinterpret_s8_s64): Likewise.
2691         (vreinterpret_s8_f32): Likewise.
2692         (vreinterpret_s8_u8): Likewise.
2693         (vreinterpret_s8_u16): Likewise.
2694         (vreinterpret_s8_u32): Likewise.
2695         (vreinterpret_s8_u64): Likewise.
2696         (vreinterpret_s8_p8): Likewise.
2697         (vreinterpret_s8_p16): Likewise.
2698         (vreinterpretq_s8_s16): Likewise.
2699         (vreinterpretq_s8_s32): Likewise.
2700         (vreinterpretq_s8_s64): Likewise.
2701         (vreinterpretq_s8_f32): Likewise.
2702         (vreinterpretq_s8_u8): Likewise.
2703         (vreinterpretq_s8_u16): Likewise.
2704         (vreinterpretq_s8_u32): Likewise.
2705         (vreinterpretq_s8_u64): Likewise.
2706         (vreinterpretq_s8_p8): Likewise.
2707         (vreinterpretq_s8_p16): Likewise.
2708         (vreinterpret_s16_s8): Likewise.
2709         (vreinterpret_s16_s32): Likewise.
2710         (vreinterpret_s16_s64): Likewise.
2711         (vreinterpret_s16_f32): Likewise.
2712         (vreinterpret_s16_u8): Likewise.
2713         (vreinterpret_s16_u16): Likewise.
2714         (vreinterpret_s16_u32): Likewise.
2715         (vreinterpret_s16_u64): Likewise.
2716         (vreinterpret_s16_p8): Likewise.
2717         (vreinterpret_s16_p16): Likewise.
2718         (vreinterpretq_s16_s8): Likewise.
2719         (vreinterpretq_s16_s32): Likewise.
2720         (vreinterpretq_s16_s64): Likewise.
2721         (vreinterpretq_s16_f32): Likewise.
2722         (vreinterpretq_s16_u8): Likewise.
2723         (vreinterpretq_s16_u16): Likewise.
2724         (vreinterpretq_s16_u32): Likewise.
2725         (vreinterpretq_s16_u64): Likewise.
2726         (vreinterpretq_s16_p8): Likewise.
2727         (vreinterpretq_s16_p16): Likewise.
2728         (vreinterpret_s32_s8): Likewise.
2729         (vreinterpret_s32_s16): Likewise.
2730         (vreinterpret_s32_s64): Likewise.
2731         (vreinterpret_s32_f32): Likewise.
2732         (vreinterpret_s32_u8): Likewise.
2733         (vreinterpret_s32_u16): Likewise.
2734         (vreinterpret_s32_u32): Likewise.
2735         (vreinterpret_s32_u64): Likewise.
2736         (vreinterpret_s32_p8): Likewise.
2737         (vreinterpret_s32_p16): Likewise.
2738         (vreinterpretq_s32_s8): Likewise.
2739         (vreinterpretq_s32_s16): Likewise.
2740         (vreinterpretq_s32_s64): Likewise.
2741         (vreinterpretq_s32_f32): Likewise.
2742         (vreinterpretq_s32_u8): Likewise.
2743         (vreinterpretq_s32_u16): Likewise.
2744         (vreinterpretq_s32_u32): Likewise.
2745         (vreinterpretq_s32_u64): Likewise.
2746         (vreinterpretq_s32_p8): Likewise.
2747         (vreinterpretq_s32_p16): Likewise.
2748         (vreinterpret_u8_s8): Likewise.
2749         (vreinterpret_u8_s16): Likewise.
2750         (vreinterpret_u8_s32): Likewise.
2751         (vreinterpret_u8_s64): Likewise.
2752         (vreinterpret_u8_f32): Likewise.
2753         (vreinterpret_u8_u16): Likewise.
2754         (vreinterpret_u8_u32): Likewise.
2755         (vreinterpret_u8_u64): Likewise.
2756         (vreinterpret_u8_p8): Likewise.
2757         (vreinterpret_u8_p16): Likewise.
2758         (vreinterpretq_u8_s8): Likewise.
2759         (vreinterpretq_u8_s16): Likewise.
2760         (vreinterpretq_u8_s32): Likewise.
2761         (vreinterpretq_u8_s64): Likewise.
2762         (vreinterpretq_u8_f32): Likewise.
2763         (vreinterpretq_u8_u16): Likewise.
2764         (vreinterpretq_u8_u32): Likewise.
2765         (vreinterpretq_u8_u64): Likewise.
2766         (vreinterpretq_u8_p8): Likewise.
2767         (vreinterpretq_u8_p16): Likewise.
2768         (vreinterpret_u16_s8): Likewise.
2769         (vreinterpret_u16_s16): Likewise.
2770         (vreinterpret_u16_s32): Likewise.
2771         (vreinterpret_u16_s64): Likewise.
2772         (vreinterpret_u16_f32): Likewise.
2773         (vreinterpret_u16_u8): Likewise.
2774         (vreinterpret_u16_u32): Likewise.
2775         (vreinterpret_u16_u64): Likewise.
2776         (vreinterpret_u16_p8): Likewise.
2777         (vreinterpret_u16_p16): Likewise.
2778         (vreinterpretq_u16_s8): Likewise.
2779         (vreinterpretq_u16_s16): Likewise.
2780         (vreinterpretq_u16_s32): Likewise.
2781         (vreinterpretq_u16_s64): Likewise.
2782         (vreinterpretq_u16_f32): Likewise.
2783         (vreinterpretq_u16_u8): Likewise.
2784         (vreinterpretq_u16_u32): Likewise.
2785         (vreinterpretq_u16_u64): Likewise.
2786         (vreinterpretq_u16_p8): Likewise.
2787         (vreinterpretq_u16_p16): Likewise.
2788         (vreinterpret_u32_s8): Likewise.
2789         (vreinterpret_u32_s16): Likewise.
2790         (vreinterpret_u32_s32): Likewise.
2791         (vreinterpret_u32_s64): Likewise.
2792         (vreinterpret_u32_f32): Likewise.
2793         (vreinterpret_u32_u8): Likewise.
2794         (vreinterpret_u32_u16): Likewise.
2795         (vreinterpret_u32_u64): Likewise.
2796         (vreinterpret_u32_p8): Likewise.
2797         (vreinterpret_u32_p16): Likewise.
2798         (vreinterpretq_u32_s8): Likewise.
2799         (vreinterpretq_u32_s16): Likewise.
2800         (vreinterpretq_u32_s32): Likewise.
2801         (vreinterpretq_u32_s64): Likewise.
2802         (vreinterpretq_u32_f32): Likewise.
2803         (vreinterpretq_u32_u8): Likewise.
2804         (vreinterpretq_u32_u16): Likewise.
2805         (vreinterpretq_u32_u64): Likewise.
2806         (vreinterpretq_u32_p8): Likewise.
2807         (vreinterpretq_u32_p16): Likewise.
2808
2809 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2810
2811         Backport from trunk r209640.
2812         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
2813
2814         * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
2815         Pattern extended.
2816         * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
2817         extended.
2818         (sqabs): Likewise.
2819         * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
2820         (vqnegd_s64): Likewise.
2821         (vqabs_s64): Likewise.
2822         (vqabsd_s64): Likewise.
2823
2824 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2825
2826         Backport from trunk r209627, 209636.
2827         2014-04-22  Renlin  <renlin.li@arm.com>
2828                     Jiong Wang  <jiong.wang@arm.com>
2829
2830         * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
2831         * config/aarch64/aarch64.c (aarch64_layout_frame)
2832         (aarch64_initial_elimination_offset): Likewise.
2833
2834         2014-04-22  Marcus Shawcroft  <marcus.shawcroft@arm.com>
2835
2836         * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
2837         Fix indentation.
2838
2839 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2840
2841         Backport from trunk r209618.
2842         2014-04-22  Renlin Li  <Renlin.Li@arm.com>
2843
2844         * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
2845         the output asm format.
2846
2847 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2848
2849         Backport from trunk r209617.
2850         2014-04-22  James Greenhalgh  <james.greenhalgh@arm.com>
2851
2852         * config/aarch64/aarch64-simd.md
2853         (aarch64_cm<optab>di): Always split.
2854         (*aarch64_cm<optab>di): New.
2855         (aarch64_cmtstdi): Always split.
2856         (*aarch64_cmtstdi): New.
2857
2858 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2859
2860         Backport from trunk r209615.
2861         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
2862
2863         * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
2864         restrictions on core registers for DImode values in Thumb2.
2865
2866 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2867
2868         Backport from trunk r209613, r209614.
2869         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
2870
2871         * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
2872         * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
2873
2874         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
2875
2876         * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
2877         (*iordi_notzesidi_di): Likewise.
2878         (*iordi_notsesidi_di): Likewise.
2879
2880 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2881
2882         Backport from trunk r209561.
2883         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
2884
2885         * config/arm/arm-protos.h (tune_params): New struct members.
2886         * config/arm/arm.c: Initialise tune_params per processor.
2887         (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
2888         for speed, based on new tune_params.
2889
2890 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2891
2892         Backport from trunk r209559.
2893         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
2894
2895         * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
2896         added.
2897         * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
2898         macro.
2899         * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
2900         corrected.
2901         * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
2902         * config/aarch64/arm_neon.h (vrnd_f64): Added.
2903         (vrnda_f64): Likewise.
2904         (vrndi_f64): Likewise.
2905         (vrndm_f64): Likewise.
2906         (vrndn_f64): Likewise.
2907         (vrndp_f64): Likewise.
2908         (vrndx_f64): Likewise.
2909
2910 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2911
2912         Backport from trunk r209419.
2913         2014-04-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2914
2915         PR rtl-optimization/60663
2916         * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
2917         avoid 0 cost.
2918
2919 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2920
2921         Backport from trunk r209457.
2922         2014-04-16  Andrew  Pinski  <apinski@cavium.com>
2923
2924         * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
2925         definition.
2926
2927 2014-05-19  Yvan Roux  <yvan.roux@linaro.org>
2928
2929         * LINARO-VERSION: Bump version.
2930
2931 2014-05-14  Yvan Roux  <yvan.roux@linaro.org>
2932
2933         GCC Linaro 4.9-2014.05 released.
2934         * LINARO-VERSION: Update.
2935
2936 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
2937
2938         Backport from trunk r209889.
2939         2014-04-29  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
2940
2941         * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
2942
2943 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
2944
2945         Backport from trunk r209556.
2946         2014-04-22  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
2947
2948         * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
2949         GET_MODE_SIZE argument is enum machine_mode.
2950
2951 2014-04-28  Yvan Roux  <yvan.roux@linaro.org>
2952
2953         * LINARO-VERSION: Bump version.
2954
2955 2014-04-22  Yvan Roux  <yvan.roux@linaro.org>
2956
2957         GCC Linaro 4.9-2014.04 released.
2958         * LINARO-VERSION: New file.
2959         * configure.ac: Add Linaro version string.