RISC-V: Add --specs=nosys.specs support.
[platform/upstream/gcc.git] / gcc / ChangeLog
1 2018-01-26  Jim Wilson  <jimw@sifive.com>
2
3         * config/riscv/elf.h (LIB_SPEC): Don't include -lgloss when nosys.specs
4         specified.
5
6 2018-01-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
7
8         * config/aarch64/aarch64.md: Add peepholes for CMP + SUB -> SUBS
9         and CMP + SUB-immediate -> SUBS.
10
11 2018-01-26  Martin Sebor  <msebor@redhat.com>
12
13         PR tree-optimization/83896
14         * tree-ssa-strlen.c (get_string_len): Rename...
15         (get_string_cst_length): ...to this.  Return HOST_WIDE_INT.
16         Avoid assuming length is constant.
17         (handle_char_store): Use HOST_WIDE_INT for string length.
18
19 2018-01-26  Uros Bizjak  <ubizjak@gmail.com>
20
21         PR target/81763
22         * config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
23         to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
24
25 2018-01-26  Richard Biener  <rguenther@suse.de>
26
27         PR rtl-optimization/84003
28         * dse.c (record_store): Only record redundant stores when
29         the earlier store aliases at least all accesses the later one does.
30
31 2018-01-26  Jakub Jelinek  <jakub@redhat.com>
32
33         PR rtl-optimization/83985
34         * dce.c (deletable_insn_p): Return false for separate shrink wrapping
35         REG_CFA_RESTORE insns.
36         (delete_unmarked_insns): Don't ignore separate shrink wrapping
37         REG_CFA_RESTORE insns here.
38
39         PR c/83989
40         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Don't
41         use SSA_NAME_VAR as base for SSA_NAMEs with non-NULL SSA_NAME_VAR.
42
43 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
44
45         * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3.
46         * config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... .
47         (arc_init): Likewise.
48         (arc_override_options): Likewise.
49         (arc_file_start): Choose Tag_ARC_CPU_variation based on arc_tune
50         value.
51         (hwloop_fail): Use TARGET_DBNZ when we want to check for dbnz insn
52         support.
53         * config/arc/arc.h (TARGET_DBNZ): Define.
54         * config/arc/arc.md (attr tune): Add core_3, use ARC_TUNE_... to
55         properly set the tune attribute.
56         (dbnz): Use TARGET_DBNZ guard.
57         * config/arc/arc.opt (mtune): Add core3 option.
58
59 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
60
61         * config/arc/arc.c (arc_delegitimize_address_0): Refactored to
62         recognize new pic like addresses.
63         (arc_delegitimize_address): Clean up.
64
65 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
66
67         * config/arc/arc-arches.def: Option mrf16 valid for all
68         architectures.
69         * config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
70         * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
71         * config/arc/arc-options.def (FL_RF16): Add mrf16 option.
72         * config/arc/arc-tables.opt: Regenerate.
73         * config/arc/arc.c (arc_conditional_register_usage): Handle
74         reduced register file case.
75         (arc_file_start): Set must have build attributes.
76         * config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
77         mrf16 option value.
78         * config/arc/arc.opt (mrf16): Add new option.
79         * config/arc/elf.h (ATTRIBUTE_PCS): Define.
80         * config/arc/genmultilib.awk: Handle new mrf16 option.
81         * config/arc/linux.h (ATTRIBUTE_PCS): Define.
82         * config/arc/t-multilib: Regenerate.
83         * doc/invoke.texi (ARC Options): Document mrf16 option.
84
85 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
86
87         * config/arc/arc-protos.h: Add arc_is_secure_call_p proto.
88         * config/arc/arc.c (arc_handle_secure_attribute): New function.
89         (arc_attribute_table): Add 'secure_call' attribute.
90         (arc_print_operand): Print secure call operand.
91         (arc_function_ok_for_sibcall): Don't optimize tail calls when
92         secure.
93         (arc_is_secure_call_p): New function.  * config/arc/arc.md
94         (call_i): Add support for sjli instruction.
95         (call_value_i): Likewise.
96         * config/arc/constraints.md (Csc): New constraint.
97
98 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
99             John Eric Martin <John.Martin@emmicro-us.com>
100
101         * config/arc/arc-protos.h: Add arc_is_jli_call_p proto.
102         * config/arc/arc.c (_arc_jli_section): New struct.
103         (arc_jli_section): New type.
104         (rc_jli_sections): New static variable.
105         (arc_handle_jli_attribute): New function.
106         (arc_attribute_table): Add jli_always and jli_fixed attribute.
107         (arc_file_end): New function.
108         (TARGET_ASM_FILE_END): Define.
109         (arc_print_operand): Reuse 'S' letter for JLI output instruction.
110         (arc_add_jli_section): New function.
111         (jli_call_scan): Likewise.
112         (arc_reorg): Call jli_call_scan.
113         (arc_output_addsi): Remove 'S' from printing asm operand.
114         (arc_is_jli_call_p): New function.
115         * config/arc/arc.md (movqi_insn): Remove 'S' from printing asm
116         operand.
117         (movhi_insn): Likewise.
118         (movsi_insn): Likewise.
119         (movsi_set_cc_insn): Likewise.
120         (loadqi_update): Likewise.
121         (load_zeroextendqisi_update): Likewise.
122         (load_signextendqisi_update): Likewise.
123         (loadhi_update): Likewise.
124         (load_zeroextendhisi_update): Likewise.
125         (load_signextendhisi_update): Likewise.
126         (loadsi_update): Likewise.
127         (loadsf_update): Likewise.
128         (movsicc_insn): Likewise.
129         (bset_insn): Likewise.
130         (bxor_insn): Likewise.
131         (bclr_insn): Likewise.
132         (bmsk_insn): Likewise.
133         (bicsi3_insn): Likewise.
134         (cmpsi_cc_c_insn): Likewise.
135         (movsi_ne): Likewise.
136         (movsi_cond_exec): Likewise.
137         (clrsbsi2): Likewise.
138         (norm_f): Likewise.
139         (normw): Likewise.
140         (swap): Likewise.
141         (divaw): Likewise.
142         (flag): Likewise.
143         (sr): Likewise.
144         (kflag): Likewise.
145         (ffs): Likewise.
146         (ffs_f): Likewise.
147         (fls): Likewise.
148         (call_i): Remove 'S' asm letter, add jli instruction.
149         (call_value_i): Likewise.
150         * config/arc/arc.op (mjli-always): New option.
151         * config/arc/constraints.md (Cji): New constraint.
152         * config/arc/fpx.md (addsf3_fpx): Remove 'S' from printing asm
153         operand.
154         (subsf3_fpx): Likewise.
155         (mulsf3_fpx): Likewise.
156         * config/arc/simdext.md (vendrec_insn): Remove 'S' from printing
157         asm operand.
158         * doc/extend.texi (ARC): Document 'jli-always' and 'jli-fixed'
159         function attrbutes.
160         * doc/invoke.texi (ARC): Document mjli-always option.
161
162 2018-01-26  Sebastian Perta  <sebastian.perta@renesas.com>
163
164         * config/rl78/rl78.c: if operand 2 is const avoid addition with 0
165         and use incw and decw where possible
166         * testsuite/gcc.target/rl78/test_addsi3_internal.c: new file
167
168 2018-01-26  Richard Biener  <rguenther@suse.de>
169
170         PR tree-optimization/81082
171         * fold-const.c (fold_plusminus_mult_expr): Do not perform the
172         association if it requires casting to unsigned.
173         * match.pd ((A * C) +- (B * C) -> (A+-B)): New patterns derived
174         from fold_plusminus_mult_expr to catch important cases late when
175         range info is available.
176
177 2018-01-26  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
178
179         * config/i386/sol2.h (USE_HIDDEN_LINKONCE): Remove.
180         * configure.ac (hidden_linkonce): New test.
181         * configure: Regenerate.
182         * config.in: Regenerate.
183
184 2018-01-26  Julia Koval  <julia.koval@intel.com>
185
186         * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
187         _mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
188         _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
189         _mm_mask_bitshuffle_epi64_mask): Fix type.
190         * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
191         USI_FTYPE_V4DI_V4DI_USI): Remove.
192         * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
193         __builtin_ia32_vpshufbitqmb256_mask,
194         __builtin_ia32_vpshufbitqmb128_mask): Fix types.
195         * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
196         * config/i386/sse.md (VI1_AVX512VLBW): Change types.
197
198 2018-01-26  Alan Modra  <amodra@gmail.com>
199
200         PR target/84033
201         * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Exclude
202         UNSPEC_VBPERMQ.  Sort other unspecs.
203
204 2018-01-25  David Edelsohn  <dje.gcc@gmail.com>
205
206         * doc/invoke.texi (PowerPC Options): Document 'native' cpu type.
207
208 2018-01-25  Jan Hubicka  <hubicka@ucw.cz>
209
210         PR middle-end/83055
211         * predict.c (drop_profile): Do not push/pop cfun; update also
212         node->count.
213         (handle_missing_profiles): Fix logic looking for zero profiles.
214
215 2018-01-25  Jakub Jelinek  <jakub@redhat.com>
216
217         PR middle-end/83977
218         * ipa-fnsummary.c (compute_fn_summary): Clear can_change_signature
219         on functions with #pragma omp declare simd or functions with simd
220         attribute.
221         * omp-simd-clone.c (expand_simd_clones): Revert 2018-01-24 change.
222         * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
223         Remove trailing \n from warning_at calls.
224
225 2018-01-25  Tom de Vries  <tom@codesourcery.com>
226
227         PR target/84028
228         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
229         for neutered workers.
230
231 2018-01-24  Joseph Myers  <joseph@codesourcery.com>
232
233         PR target/68467
234         * config/m68k/m68k.c (m68k_promote_function_mode): New function.
235         (TARGET_PROMOTE_FUNCTION_MODE): New macro.
236
237 2017-01-08  Jeff Law  <law@redhat.com>
238
239         PR target/83994
240         * i386.c (get_probe_interval): Move to earlier point.
241         (ix86_compute_frame_layout): If -fstack-clash-protection and
242         the frame is larger than the probe interval, then use pushes
243         to save registers rather than reg->mem moves.
244         (ix86_expand_prologue): Remove conditional for int_registers_saved
245         assertion.
246
247 2018-01-24  Vladimir Makarov  <vmakarov@redhat.com>
248
249         PR target/84014
250         * ira-build.c (setup_min_max_allocno_live_range_point): Set up
251         min/max for never referenced object.
252
253 2018-01-24  Jakub Jelinek  <jakub@redhat.com>
254
255         PR middle-end/83977
256         * tree.c (free_lang_data_in_decl): Don't clear DECL_ABSTRACT_ORIGIN
257         here.
258         * omp-low.c (create_omp_child_function): Remove "omp declare simd"
259         attributes from DECL_ATTRIBUTES (decl) without affecting
260         DECL_ATTRIBUTES (current_function_decl).
261         * omp-simd-clone.c (expand_simd_clones): Ignore DECL_ARTIFICIAL
262         functions with non-NULL DECL_ABSTRACT_ORIGIN.
263
264 2018-01-24  Richard Sandiford  <richard.sandiford@linaro.org>
265
266         PR tree-optimization/83979
267         * fold-const.c (fold_comparison): Use constant_boolean_node
268         instead of boolean_{true,false}_node.
269
270 2018-01-24  Jan Hubicka  <hubicka@ucw.cz>
271
272         * ipa-profile.c (ipa_propagate_frequency_1): Fix logic skipping calls
273         with zero counts.
274
275 2018-01-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
276
277         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
278         Simplify the clause that sets the length attribute.
279         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
280         (*sibcall_nonlocal_sysv<mode>): Clean up code block; simplify the
281         clause that sets the length attribute.
282         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
283
284 2018-01-24  Tom de Vries  <tom@codesourcery.com>
285
286         PR target/83589
287         * config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_2): Define to 1.
288         (nvptx_pc_set, nvptx_condjump_label): New function. Copy from jump.c.
289         Add strict parameter.
290         (prevent_branch_around_nothing): Insert dummy insn between branch to
291         label and label with no ptx insn inbetween.
292         * config/nvptx/nvptx.md (define_insn "fake_nop"): New insn.
293
294 2018-01-24  Tom de Vries  <tom@codesourcery.com>
295
296         PR target/81352
297         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
298         for neutered threads in warp.
299         * config/nvptx/nvptx.md (define_insn "exit"): New insn.
300
301 2018-01-24  Richard Biener  <rguenther@suse.de>
302
303         PR tree-optimization/83176
304         * tree-chrec.c (chrec_fold_plus_1): Handle (signed T){(T) .. }
305         operands.
306
307 2018-01-24  Richard Biener  <rguenther@suse.de>
308
309         PR tree-optimization/82819
310         * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
311         code generating pluses that are no-ops in the target precision.
312
313 2018-01-24  Richard Biener  <rguenther@suse.de>
314
315         PR middle-end/84000
316         * tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind.
317
318 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
319
320         * cfgcleanup.c (try_crossjump_to_edge): Use combine_with_count
321         to merge probabilities.
322         * predict.c (probably_never_executed): Also mark as cold functions
323         with global 0 profile and guessed local profile.
324         * profile-count.c (profile_probability::combine_with_count): New
325         member function.
326         * profile-count.h (profile_probability::operator*,
327         profile_probability::operator*=, profile_probability::operator/,
328         profile_probability::operator/=): Reduce precision to adjusted
329         and set value to guessed on contradictory divisions.
330         (profile_probability::combine_with_freq): Remove.
331         (profile_probability::combine_wiht_count): Declare.
332         (profile_count::force_nonzero):: Set to adjusted.
333         (profile_count::probability_in):: Set quality to adjusted.
334         * tree-ssa-tail-merge.c (replace_block_by): Use
335         combine_with_count.
336
337 2018-01-23  Andrew Waterman  <andrew@sifive.com>
338             Jim Wilson  <jimw@sifive.com>
339
340         * config/riscv/riscv.c (riscv_stack_boundary): New.
341         (riscv_option_override): Set riscv_stack_boundary.  Handle
342         riscv_preferred_stack_boundary_arg.
343         * config/riscv/riscv.h (MIN_STACK_BOUNDARY, ABI_STACK_BOUNDARY): New.
344         (BIGGEST_ALIGNMENT): Set to STACK_BOUNDARY.
345         (STACK_BOUNDARY): Set to riscv_stack_boundary.
346         (RISCV_STACK_ALIGN): Use STACK_BOUNDARY.
347         * config/riscv/riscv.opt (mpreferred-stack-boundary): New.
348         * doc/invoke.tex (RISC-V Options): Add -mpreferred-stack-boundary.
349
350 2018-01-23  H.J. Lu  <hongjiu.lu@intel.com>
351
352         PR target/83905
353         * config/i386/i386.c (ix86_expand_prologue): Use cost reference
354         of struct ix86_frame.
355         (ix86_expand_epilogue): Likewise.  Add a local variable for
356         the reg_save_offset field in struct ix86_frame.
357
358 2018-01-23  Bin Cheng  <bin.cheng@arm.com>
359
360         PR tree-optimization/82604
361         * tree-loop-distribution.c (enum partition_kind): New enum item
362         PKIND_PARTIAL_MEMSET.
363         (partition_builtin_p): Support above new enum item.
364         (generate_code_for_partition): Ditto.
365         (compute_access_range): Differentiate cases that equality can be
366         proven at all loops, the innermost loops or no loops.
367         (classify_builtin_st, classify_builtin_ldst): Adjust call to above
368         function.  Set PKIND_PARTIAL_MEMSET for partition appropriately.
369         (finalize_partitions, distribute_loop): Don't fuse partition of
370         PKIND_PARTIAL_MEMSET kind when distributing 3-level loop nest.
371         (prepare_perfect_loop_nest): Distribute 3-level loop nest only if
372         parloop is enabled.
373
374 2018-01-23  Martin Liska  <mliska@suse.cz>
375
376         * predict.def (PRED_INDIR_CALL): Set probability to PROB_EVEN in
377         order to ignore the predictor.
378         (PRED_POLYMORPHIC_CALL): Likewise.
379         (PRED_RECURSIVE_CALL): Likewise.
380
381 2018-01-23  Martin Liska  <mliska@suse.cz>
382
383         * tree-profile.c (tree_profiling): Print function header to
384         aware reader which function we are working on.
385         * value-prof.c (gimple_find_values_to_profile): Do not print
386         not interesting value histograms.
387
388 2018-01-23  Martin Liska  <mliska@suse.cz>
389
390         * profile-count.h (enum profile_quality): Add
391         profile_uninitialized as the first value. Do not number values
392         as they are zero based.
393         (profile_count::verify): Update sanity check.
394         (profile_probability::verify): Likewise.
395
396 2018-01-23  Nathan Sidwell  <nathan@acm.org>
397
398         * doc/invoke.texi (ffor-scope): Deprecate.
399
400 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
401
402         PR tree-optimization/83510
403         * domwalk.c (set_all_edges_as_executable): New function.
404         (dom_walker::dom_walker): Convert bool param
405         "skip_unreachable_blocks" to enum reachability.  Move setup of
406         edge flags to set_all_edges_as_executable and only do it when
407         reachability is REACHABLE_BLOCKS.
408         * domwalk.h (enum dom_walker::reachability): New enum.
409         (dom_walker::dom_walker): Convert bool param
410         "skip_unreachable_blocks" to enum reachability.
411         (set_all_edges_as_executable): New decl.
412         * graphite-scop-detection.c  (gather_bbs::gather_bbs): Convert
413         from false for "skip_unreachable_blocks" to ALL_BLOCKS for
414         "reachability".
415         * tree-ssa-dom.c (dom_opt_dom_walker::dom_opt_dom_walker): Likewise,
416         but converting true to REACHABLE_BLOCKS.
417         * tree-ssa-sccvn.c (sccvn_dom_walker::sccvn_dom_walker): Likewise.
418         * tree-vrp.c
419         (check_array_bounds_dom_walker::check_array_bounds_dom_walker):
420         Likewise, but converting it to REACHABLE_BLOCKS_PRESERVING_FLAGS.
421         (vrp_dom_walker::vrp_dom_walker): Likewise, but converting it to
422         REACHABLE_BLOCKS.
423         (vrp_prop::vrp_finalize): Call set_all_edges_as_executable
424         if check_all_array_refs will be called.
425
426 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
427
428         * tree.c (selftest::test_location_wrappers): Add more test
429         coverage.
430
431 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
432
433         * sbitmap.c (selftest::test_set_range): Fix memory leaks.
434         (selftest::test_bit_in_range): Likewise.
435
436 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
437
438         PR testsuite/83888
439         * doc/sourcebuild.texi (vect_float): Say that the selector
440         only describes the situation when -funsafe-math-optimizations is on.
441         (vect_float_strict): Document.
442
443 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
444
445         PR tree-optimization/83965
446         * tree-vect-patterns.c (vect_reassociating_reduction_p): New function.
447         (vect_recog_dot_prod_pattern, vect_recog_sad_pattern): Use it
448         instead of checking only for a reduction.
449         (vect_recog_widen_sum_pattern): Likewise.
450
451 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
452
453         * predict.c (probably_never_executed): Only use precise profile info.
454         (compute_function_frequency): Skip after inlining hack since we now
455         have quality checking.
456
457 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
458
459         * profile-count.h (profile_probability::very_unlikely,
460         profile_probability::unlikely, profile_probability::even): Set
461         precision to guessed.
462
463 2018-01-23  Richard Biener  <rguenther@suse.de>
464
465         PR tree-optimization/83963
466         * graphite-scop-detection.c (scop_detection::harmful_loop_in_region):
467         Properly terminate dominator walk when crossing the exit edge not
468         when visiting its source block.
469
470 2018-01-23  Jakub Jelinek  <jakub@redhat.com>
471
472         PR c++/83918
473         * tree.c (maybe_wrap_with_location): Use NON_LVALUE_EXPR rather than
474         VIEW_CONVERT_EXPR to wrap CONST_DECLs.
475
476 2018-01-22  Jakub Jelinek  <jakub@redhat.com>
477
478         PR tree-optimization/83957
479         * omp-expand.c (expand_omp_for_generic): Ignore virtual PHIs.  Remove
480         semicolon after for body surrounded by braces.
481
482         PR tree-optimization/83081
483         * profile-count.h (profile_probability::split): New method.
484         * dojump.c (do_jump_1) <case TRUTH_ANDIF_EXPR, case TRUTH_ORIF_EXPR>:
485         Use profile_probability::split.
486         (do_compare_rtx_and_jump): Fix adjustment of probabilities
487         when splitting a single conditional jump into 2.
488
489 2018-01-22  David Malcolm  <dmalcolm@redhat.com>
490
491         PR tree-optimization/69452
492         * tree-ssa-loop-im.c (class move_computations_dom_walker): Remove
493         decl.
494
495 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
496
497         * config/rl78/rl78-expand.md: New define_expand "bswaphi2"
498         * config/rl78/rl78-virt.md: New define_insn "*bswaphi2_virt"
499         * config/rl78/rl78-real.md: New define_insn "*bswaphi2_real"
500
501 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
502
503         * config/rl78/rl78-protos.h: New function declaration rl78_split_movdi
504         * config/rl78/rl78.md: New define_expand "movdi"
505         * config/rl78/rl78.c: New function definition rl78_split_movdi
506
507 2018-01-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
508
509         PR target/83862
510         * config/rs6000/rs6000-protos.h (rs6000_split_signbit): Delete,
511         no longer used.
512         * config/rs6000/rs6000.c (rs6000_split_signbit): Likewise.
513         * config/rs6000/rs6000.md (signbit<mode>2): Change code for IEEE
514         128-bit to produce an UNSPEC move to get the double word with the
515         signbit and then a shift directly to do signbit.
516         (signbit<mode>2_dm): Replace old IEEE 128-bit signbit
517         implementation with a new version that just does either a direct
518         move or a regular move.  Move memory interface to separate insns.
519         Move insns so they are next to the expander.
520         (signbit<mode>2_dm_mem_be): New combiner insns to combine load
521         with signbit move.  Split big and little endian case.
522         (signbit<mode>2_dm_mem_le): Likewise.
523         (signbit<mode>2_dm_<su>ext): Delete, no longer used.
524         (signbit<mode>2_dm2): Likewise.
525
526 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
527
528         * config/rl78/rl78.md: New define_expand "anddi3".
529
530 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
531
532         * config/rl78/rl78.md: New define_expand "umindi3".
533
534 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
535
536         * config/rl78/rl78.md: New define_expand "smindi3".
537
538 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
539
540         * config/rl78/rl78.md: New define_expand "smaxdi3".
541
542 2018-01-22 Carl Love <cel@us.ibm.com>
543
544         * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
545         LVX_V1TI): Add macro expansion.
546         * config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
547         definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
548         VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
549         * config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
550         Change check to determine if the instruction is a byte reversing
551         entry.  Fix typo in comment.
552         * config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
553         for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
554         Add def_builtin calls for new builtins.
555         * config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
556         Add define_insn expansion.
557
558 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
559
560         * config/rl78/rl78.md: New define_expand "umaxdi3".
561
562 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
563
564         * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
565         for non-QImode registers
566
567 2018-01-22  Richard Biener  <rguenther@suse.de>
568
569         PR tree-optimization/83963
570         * graphite-scop-detection.c (scop_detection::get_sese): Delay
571         including the loop exit block.
572         (scop_detection::merge_sese): Likewise.
573         (scop_detection::add_scop): Do it here instead.
574
575 2018-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
576
577         * doc/sourcebuild.texi (arm_softfloat): Document.
578
579 2018-01-21  John David Anglin  <danglin@gcc.gnu.org>
580
581         PR gcc/77734
582         * config/pa/pa.c (pa_function_ok_for_sibcall): Use
583         targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
584         Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
585
586 2018-01-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
587             David Edelsohn <dje.gcc@gmail.com>
588
589         PR target/83946
590         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
591         Change "crset eq" to "crset 2".
592         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
593         (*call_indirect_aix<mode>_nospec): Likewise.
594         (*call_value_indirect_aix<mode>_nospec): Likewise.
595         (*call_indirect_elfv2<mode>_nospec): Likewise.
596         (*call_value_indirect_elfv2<mode>_nospec): Likewise.
597         (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
598         change assembly output from . to $.
599         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
600         (indirect_jump<mode>_nospec): Change assembly output from . to $.
601         (*tablejump<mode>_internal1_nospec): Likewise.
602
603 2018-01-21  Oleg Endo  <olegendo@gcc.gnu.org>
604
605         PR target/80870
606         * config/sh/sh_optimize_sett_clrt.cc:
607         Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
608
609 2018-01-20  Richard Sandiford  <richard.sandiford@linaro.org>
610
611         PR tree-optimization/83940
612         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
613         offset_dt to vect_constant_def rather than vect_unknown_def_type.
614         (vect_check_load_store_mask): Add a mask_dt_out parameter and
615         use it to pass back the definition type.
616         (vect_check_store_rhs): Likewise rhs_dt_out.
617         (vect_build_gather_load_calls): Add a mask_dt argument and use
618         it instead of a call to vect_is_simple_use.
619         (vectorizable_store): Update calls to vect_check_load_store_mask
620         and vect_check_store_rhs.  Use the dt returned by the latter instead
621         of scatter_src_dt.  Use the cached mask_dt and gs_info.offset_dt
622         instead of calls to vect_is_simple_use.  Pass the scalar rather
623         than the vector operand to vect_is_simple_use when handling
624         second and subsequent copies of an rhs value.
625         (vectorizable_load): Update calls to vect_check_load_store_mask
626         and vect_build_gather_load_calls.  Use the cached mask_dt and
627         gs_info.offset_dt instead of calls to vect_is_simple_use.
628
629 2018-01-20  Jakub Jelinek  <jakub@redhat.com>
630
631         PR middle-end/83945
632         * tree-emutls.c: Include gimplify.h.
633         (lower_emutls_2): New function.
634         (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
635         with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
636         it before further processing.
637
638         PR target/83930
639         * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
640         UINTVAL (trueop1) instead of INTVAL (op1).
641
642 2018-01-19  Jakub Jelinek  <jakub@redhat.com>
643
644         PR debug/81570
645         PR debug/83728
646         * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
647         INCOMING_FRAME_SP_OFFSET if not defined.
648         (scan_trace): Add ENTRY argument.  If true and
649         DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
650         emit a note to adjust the CFA offset.
651         (create_cfi_notes): Adjust scan_trace callers.
652         (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
653         INCOMING_FRAME_SP_OFFSET in the CIE.
654         * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
655         * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
656         Likewise.
657         * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
658         * doc/tm.texi: Regenerated.
659
660 2018-01-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
661
662         PR rtl-optimization/83147
663         * lra-constraints.c (remove_inheritance_pseudos): Use
664         lra_substitute_pseudo_within_insn.
665
666 2018-01-19  Tom de Vries  <tom@codesourcery.com>
667             Cesar Philippidis  <cesar@codesourcery.com>
668
669         PR target/83920
670         * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
671
672 2018-01-19  Cesar Philippidis  <cesar@codesourcery.com>
673
674         PR target/83790
675         * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
676         spaces for function labels.
677
678 2018-01-19  Martin Liska  <mliska@suse.cz>
679
680         * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
681         (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
682         (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
683         (PRED_OPCODE_POSITIVE): Change from 64 to 59.
684         (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
685         (PRED_CONST_RETURN): Change from 69 to 65.
686         (PRED_NULL_RETURN): Change from 91 to 71.
687         (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
688         (PRED_LOOP_GUARD): Change from 66 to 73.
689
690 2018-01-19  Martin Liska  <mliska@suse.cz>
691
692         * predict.c (predict_insn_def): Add new assert.
693         (struct branch_predictor): Change type to signed integer.
694         (test_prediction_value_range): Amend test to cover
695         PROB_UNINITIALIZED.
696         * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
697         (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
698         (PRED_LOOP_ITERATIONS_MAX): Likewise.
699         (PRED_LOOP_IV_COMPARE): Likewise.
700         * predict.h (PROB_UNINITIALIZED): Define new constant.
701
702 2018-01-19  Martin Liska  <mliska@suse.cz>
703
704         * predict.c (dump_prediction): Add new format for
705         analyze_brprob.py script which is enabled with -details
706         suboption.
707         * profile-count.h (precise_p): New function.
708
709 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
710
711         PR tree-optimization/83922
712         * tree-vect-loop.c (vect_verify_full_masking): Return false if
713         there are no statements that need masking.
714         (vect_active_double_reduction_p): New function.
715         (vect_analyze_loop_operations): Use it when handling phis that
716         are not in the loop header.
717
718 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
719
720         PR tree-optimization/83914
721         * tree-vect-loop.c (vectorizable_induction): Don't convert
722         init_expr or apply the peeling adjustment for inductions
723         that are nested within the vectorized loop.
724
725 2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
726
727         * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
728         instead of NEG.
729
730 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
731
732         PR sanitizer/81715
733         PR testsuite/83882
734         * function.h (gimplify_parameters): Add gimple_seq * argument.
735         * function.c: Include gimple.h and options.h.
736         (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
737         for the added local temporaries if needed.
738         * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
739         if there are any parameter cleanups, wrap whole body into a
740         try/finally with the cleanups.
741
742 2018-01-18  Wilco Dijkstra  <wdijkstr@arm.com>
743
744         PR target/82964
745         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
746         Use GET_MODE_CLASS for scalar floating point.
747
748 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
749
750         PR ipa/82256
751         patch by PaX Team
752         * cgraphclones.c (cgraph_node::create_version_clone_with_body):
753         Fix call of call_cgraph_insertion_hooks.
754
755 2018-01-18  Martin Sebor  <msebor@redhat.com>
756
757         * doc/invoke.texi (-Wclass-memaccess): Tweak text.
758
759 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
760
761         PR ipa/83619
762         * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
763         frequencies.
764
765 2018-01-18  Boris Kolpackov  <boris@codesynthesis.com>
766
767         PR other/70268
768         * common.opt: (-ffile-prefix-map): New option.
769         * opts.c (common_handle_option): Defer it.
770         * opts-global.c (handle_common_deferred_options): Handle it.
771         * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
772         * file-prefix-map.h: New file.
773         (remap_debug_filename, add_debug_prefix_map): ...here.
774         (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
775         * final.c (debug_prefix_map, add_debug_prefix_map
776         remap_debug_filename): Move to...
777         * file-prefix-map.c: New file.
778         (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
779         generalize, get rid of alloca(), use strrchr() instead of strchr().
780         (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
781         Implement in terms of add_prefix_map().
782         (remap_macro_filename, remap_debug_filename): Implement in term of
783         remap_filename().
784         * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
785         * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
786         * dbxout.c: Include file-prefix-map.h.
787         * varasm.c: Likewise.
788         * vmsdbgout.c: Likewise.
789         * xcoffout.c: Likewise.
790         * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
791         * doc/cppopts.texi (-fmacro-prefix-map): Document.
792         * doc/invoke.texi (-ffile-prefix-map): Document.
793         (-fdebug-prefix-map): Update description.
794
795 2018-01-18  Martin Liska  <mliska@suse.cz>
796
797         * config/i386/i386.c (indirect_thunk_name): Document that also
798         lfence is emitted.
799         (output_indirect_thunk): Document why both instructions
800         (pause and lfence) are generated.
801
802 2018-01-18  Richard Biener  <rguenther@suse.de>
803
804         PR tree-optimization/83887
805         * graphite-scop-detection.c
806         (scop_detection::get_nearest_dom_with_single_entry): Remove.
807         (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
808         (scop_detection::merge_sese): Re-implement with a flood-fill
809         algorithm that properly finds a SESE region if it exists.
810
811 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
812
813         PR c/61240
814         * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
815         pointer_diff optimizations use view_convert instead of convert.
816
817 2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
818
819         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
820         Generate different code for -mno-speculate-indirect-jumps.
821         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
822         (*call_indirect_aix<mode>): Disable for
823         -mno-speculate-indirect-jumps.
824         (*call_indirect_aix<mode>_nospec): New define_insn.
825         (*call_value_indirect_aix<mode>): Disable for
826         -mno-speculate-indirect-jumps.
827         (*call_value_indirect_aix<mode>_nospec): New define_insn.
828         (*sibcall_nonlocal_sysv<mode>): Generate different code for
829         -mno-speculate-indirect-jumps.
830         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
831
832 2018-01-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
833
834         * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
835         long double type, set the flags for noting the default long double
836         type, even if we don't pass or return a long double type.
837
838 2018-01-17  Jan Hubicka  <hubicka@ucw.cz>
839
840         PR ipa/83051
841         * ipa-inline.c (flatten_function): Do not overwrite final inlining
842         failure.
843
844 2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>
845
846         * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
847         support for merge[hl].
848         (fold_mergehl_helper): New helper function.
849         (tree-vector-builder.h): New #include for tree_vector_builder usage.
850         * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
851         (altivec_vmrglw_direct): Add xxmrglw insn.
852
853 2018-01-17  Andrew Waterman  <andrew@sifive.com>
854
855         * config/riscv/riscv.c (riscv_conditional_register_usage): If
856         UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
857
858 2018-01-17  David Malcolm  <dmalcolm@redhat.com>
859
860         PR lto/83121
861         * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
862         call the lto_location_cache before reading the
863         DECL_SOURCE_LOCATION of the types.
864
865 2018-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
866             Richard Sandiford  <richard.sandiford@linaro.org>
867
868         * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
869         * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
870         (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
871         SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
872         * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
873         Add declaration.
874         * config/aarch64/constraints.md (aarch64_movti_operand):
875         Limit immediates.
876         * config/aarch64/predicates.md (Uti): Add new constraint.
877
878 2018-01-17 Carl Love  <cel@us.ibm.com>
879         * config/rs6000/vsx.md (define_expand xl_len_r,
880         define_expand stxvl, define_expand *stxvl): Add match_dup argument.
881         (define_insn): Add, match_dup 1 argument to define_insn stxvll and
882         lxvll.
883         (define_expand, define_insn): Move the shift left from  the
884         define_insn to the define_expand for lxvl and stxvl instructions.
885         * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
886         and XL_LEN_R definitions to PURE.
887
888 2018-01-17  Uros Bizjak  <ubizjak@gmail.com>
889
890         * config/i386/i386.c (indirect_thunk_name): Declare regno
891         as unsigned int.  Compare regno with INVALID_REGNUM.
892         (output_indirect_thunk): Ditto.
893         (output_indirect_thunk_function): Ditto.
894         (ix86_code_end): Declare regno as unsigned int.  Use INVALID_REGNUM
895         in the call to output_indirect_thunk_function.
896
897 2018-01-17  Richard Sandiford  <richard.sandiford@linaro.org>
898
899         PR middle-end/83884
900         * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
901         rather than the size of inner_type to determine the stack slot size
902         when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
903
904 2018-01-16  Sebastian Peryt  <sebastian.peryt@intel.com>
905
906         PR target/83546
907         * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
908         to PTA_SILVERMONT.
909
910 2018-01-16  Michael Meissner  <meissner@linux.vnet.ibm.com>
911
912         * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
913         endian Linux systems to optionally enable multilibs for selecting
914         the long double type if the user configured an explicit type.
915         * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
916         have no long double multilibs if not defined.
917         * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
918         warn if the user used -mabi={ieee,ibm}longdouble and we built
919         multilibs for long double.
920         * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
921         appropriate multilib option.
922         (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
923         multilib options.
924         * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
925         for building long double multilibs.
926         * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
927
928 2018-01-16  John David Anglin  <danglin@gcc.gnu.org>
929
930         * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
931         copies.
932
933         * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
934         64 bits.
935         * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
936         128 bits.
937
938         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
939         variables.
940
941         * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
942         return value.
943
944 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
945
946         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
947         ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
948
949 2018-01-16  Kelvin Nilsen  <kelvin@gcc.gnu.org>
950
951         * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
952         different rtl trees depending on TARGET_64BIT.
953         (rs6000_gen_lvx): Likewise.
954
955 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
956
957         * config/visium/visium.md (nop): Tweak comment.
958         (hazard_nop): Likewise.
959
960 2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
961
962         * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
963         -mspeculate-indirect-jumps.
964         * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
965         for -mno-speculate-indirect-jumps.
966         (*call_indirect_elfv2<mode>_nospec): New define_insn.
967         (*call_value_indirect_elfv2<mode>): Disable for
968         -mno-speculate-indirect-jumps.
969         (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
970         (indirect_jump): Emit different RTL for
971         -mno-speculate-indirect-jumps.
972         (*indirect_jump<mode>): Disable for
973         -mno-speculate-indirect-jumps.
974         (*indirect_jump<mode>_nospec): New define_insn.
975         (tablejump): Emit different RTL for
976         -mno-speculate-indirect-jumps.
977         (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
978         (tablejumpsi_nospec): New define_expand.
979         (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
980         (tablejumpdi_nospec): New define_expand.
981         (*tablejump<mode>_internal1): Disable for
982         -mno-speculate-indirect-jumps.
983         (*tablejump<mode>_internal1_nospec): New define_insn.
984         * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
985         option.
986
987 2018-01-16  Artyom Skrobov tyomitch@gmail.com
988
989         * caller-save.c (insert_save): Drop unnecessary parameter.  All
990         callers updated.
991
992 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
993             Richard Biener  <rguenth@suse.de>
994
995         PR libgomp/83590
996         * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
997         return early, inline manually is_gimple_sizepos.  Make sure if we
998         call gimplify_expr we don't end up with a gimple constant.
999         * tree.c (variably_modified_type_p): Don't return true for
1000         is_gimple_constant (_t).  Inline manually is_gimple_sizepos.
1001         * gimplify.h (is_gimple_sizepos): Remove.
1002
1003 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1004
1005         PR tree-optimization/83857
1006         * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
1007         vectorizable_live_operation for pure SLP statements.
1008         (vectorizable_live_operation): Handle PHIs.
1009
1010 2018-01-16  Richard Biener  <rguenther@suse.de>
1011
1012         PR tree-optimization/83867
1013         * tree-vect-stmts.c (vect_transform_stmt): Precompute
1014         nested_in_vect_loop_p since the scalar stmt may get invalidated.
1015
1016 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1017
1018         PR c/83844
1019         * stor-layout.c (handle_warn_if_not_align): Use byte_position and
1020         multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
1021         If off is not INTEGER_CST, issue a may not be aligned warning
1022         rather than isn't aligned.  Use isn%'t rather than isn't.
1023         * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
1024         into MULT_EXPR.
1025         <case MULT_EXPR>: Improve the case when bottom and one of the
1026         MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
1027         operand, in that case check if the other operand is multiple of
1028         bottom divided by the INTEGER_CST operand.
1029
1030 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1031
1032         PR target/83858
1033         * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
1034         * config/pa/pa-protos.h (pa_function_arg_size): Declare.
1035         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
1036         pa_function_arg_size instead of FUNCTION_ARG_SIZE.
1037         * config/pa/pa.c (pa_function_arg_advance): Likewise.
1038         (pa_function_arg, pa_arg_partial_bytes): Likewise.
1039         (pa_function_arg_size): New function.
1040
1041 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1042
1043         * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
1044         in a separate statement.
1045
1046 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1047
1048         PR tree-optimization/83847
1049         * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
1050         group gathers and scatters.
1051
1052 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1053
1054         PR rtl-optimization/86620
1055         * params.def (max-sched-ready-insns): Bump minimum value to 1.
1056
1057         PR rtl-optimization/83213
1058         * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
1059         to last if both are JUMP_INSNs.
1060
1061         PR tree-optimization/83843
1062         * gimple-ssa-store-merging.c
1063         (imm_store_chain_info::output_merged_store): Handle bit_not_p on
1064         store_immediate_info for bswap/nop orig_stores.
1065
1066 2018-01-15  Andrew Waterman  <andrew@sifive.com>
1067
1068         * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
1069         !TARGET_MUL.
1070         <UDIV>: Increase cost if !TARGET_DIV.
1071
1072 2018-01-15  Segher Boessenkool  <segher@kernel.crashing.org>
1073
1074         * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
1075         (define_attr "cr_logical_3op"): New.
1076         (cceq_ior_compare): Adjust.
1077         (cceq_ior_compare_complement): Adjust.
1078         (*cceq_rev_compare): Adjust.
1079         * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
1080         (is_cracked_insn): Adjust.
1081         (insn_must_be_first_in_group): Adjust.
1082         * config/rs6000/40x.md: Adjust.
1083         * config/rs6000/440.md: Adjust.
1084         * config/rs6000/476.md: Adjust.
1085         * config/rs6000/601.md: Adjust.
1086         * config/rs6000/603.md: Adjust.
1087         * config/rs6000/6xx.md: Adjust.
1088         * config/rs6000/7450.md: Adjust.
1089         * config/rs6000/7xx.md: Adjust.
1090         * config/rs6000/8540.md: Adjust.
1091         * config/rs6000/cell.md: Adjust.
1092         * config/rs6000/e300c2c3.md: Adjust.
1093         * config/rs6000/e500mc.md: Adjust.
1094         * config/rs6000/e500mc64.md: Adjust.
1095         * config/rs6000/e5500.md: Adjust.
1096         * config/rs6000/e6500.md: Adjust.
1097         * config/rs6000/mpc.md: Adjust.
1098         * config/rs6000/power4.md: Adjust.
1099         * config/rs6000/power5.md: Adjust.
1100         * config/rs6000/power6.md: Adjust.
1101         * config/rs6000/power7.md: Adjust.
1102         * config/rs6000/power8.md: Adjust.
1103         * config/rs6000/power9.md: Adjust.
1104         * config/rs6000/rs64.md: Adjust.
1105         * config/rs6000/titan.md: Adjust.
1106
1107 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1108
1109         * config/i386/predicates.md (indirect_branch_operand): Rewrite
1110         ix86_indirect_branch_register logic.
1111
1112 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1113
1114         * config/i386/constraints.md (Bs): Update
1115         ix86_indirect_branch_register check.  Don't check
1116         ix86_indirect_branch_register with GOT_memory_operand.
1117         (Bw): Likewise.
1118         * config/i386/predicates.md (GOT_memory_operand): Don't check
1119         ix86_indirect_branch_register here.
1120         (GOT32_symbol_operand): Likewise.
1121
1122 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1123
1124         * config/i386/predicates.md (constant_call_address_operand):
1125         Rewrite ix86_indirect_branch_register logic.
1126         (sibcall_insn_operand): Likewise.
1127
1128 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1129
1130         * config/i386/constraints.md (Bs): Replace
1131         ix86_indirect_branch_thunk_register with
1132         ix86_indirect_branch_register.
1133         (Bw): Likewise.
1134         * config/i386/i386.md (indirect_jump): Likewise.
1135         (tablejump): Likewise.
1136         (*sibcall_memory): Likewise.
1137         (*sibcall_value_memory): Likewise.
1138         Peepholes of indirect call and jump via memory: Likewise.
1139         * config/i386/i386.opt: Likewise.
1140         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1141         (GOT_memory_operand): Likewise.
1142         (call_insn_operand): Likewise.
1143         (sibcall_insn_operand): Likewise.
1144         (GOT32_symbol_operand): Likewise.
1145
1146 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1147
1148         PR middle-end/83837
1149         * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
1150         type rather than type addr's type points to.
1151         (expand_omp_atomic_mutex): Likewise.
1152         (expand_omp_atomic): Likewise.
1153
1154 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1155
1156         PR target/83839
1157         * config/i386/i386.c (output_indirect_thunk_function): Use
1158         ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
1159         for  __x86_return_thunk.
1160
1161 2018-01-15  Richard Biener  <rguenther@suse.de>
1162
1163         PR middle-end/83850
1164         * expmed.c (extract_bit_field_1): Fix typo.
1165
1166 2018-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1167
1168         PR target/83687
1169         * config/arm/iterators.md (VF): New mode iterator.
1170         * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
1171         Remove integer-related logic from pattern.
1172         (neon_vabd<mode>_3): Likewise.
1173
1174 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1175
1176         PR middle-end/82694
1177         * common.opt (fstrict-overflow): No longer an alias.
1178         (fwrapv-pointer): New option.
1179         * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
1180         also for pointer types based on flag_wrapv_pointer.
1181         * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
1182         opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
1183         opts->x_flag_wrapv got set.
1184         * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
1185         changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
1186         POINTER_TYPE_OVERFLOW_UNDEFINED.
1187         * match.pd: Likewise in address comparison pattern.
1188         * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
1189
1190 2018-01-15  Richard Biener  <rguenther@suse.de>
1191
1192         PR lto/83804
1193         * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
1194         from TYPE_FIELDS.  Free TYPE_BINFO if not used by devirtualization.
1195         Reset type names to their identifier if their TYPE_DECL doesn't
1196         have linkage (and thus is used for ODR and devirt).
1197         (save_debug_info_for_decl): Remove.
1198         (save_debug_info_for_type): Likewise.
1199         (add_tree_to_fld_list): Adjust.
1200         * tree-pretty-print.c (dump_generic_node): Make dumping of
1201         type names more robust.
1202
1203 2018-01-15  Richard Biener  <rguenther@suse.de>
1204
1205         * BASE-VER: Bump to 8.0.1.
1206
1207 2018-01-14  Martin Sebor  <msebor@redhat.com>
1208
1209         PR other/83508
1210         * builtins.c (check_access): Avoid warning when the no-warning bit
1211         is set.
1212
1213 2018-01-14  Cory Fields  <cory-nospam-@coryfields.com>
1214
1215         * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
1216         * ira-color (allocno_hard_regs_compare): Likewise.
1217
1218 2018-01-14  Nathan Rossi  <nathan@nathanrossi.com>
1219
1220         PR target/83013
1221         * config/microblaze/microblaze.c (microblaze_asm_output_ident):
1222         Use .pushsection/.popsection.
1223
1224 2018-01-14  Martin Sebor  <msebor@redhat.com>
1225
1226         PR c++/81327
1227         * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
1228
1229 2018-01-14  Jakub Jelinek  <jakub@redhat.com>
1230
1231         * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
1232         entry from extra_headers.
1233         (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
1234         extra_headers, make the list bitwise identical to the i?86-*-* one.
1235
1236 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1237
1238         * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
1239         -mcmodel=large with -mindirect-branch=thunk,
1240         -mindirect-branch=thunk-extern, -mfunction-return=thunk and
1241         -mfunction-return=thunk-extern.
1242         * doc/invoke.texi: Document -mcmodel=large is incompatible with
1243         -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
1244         -mfunction-return=thunk and -mfunction-return=thunk-extern.
1245
1246 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1247
1248         * config/i386/i386.c (print_reg): Print the name of the full
1249         integer register without '%'.
1250         (ix86_print_operand): Handle 'V'.
1251          * doc/extend.texi: Document 'V' modifier.
1252
1253 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1254
1255         * config/i386/constraints.md (Bs): Disallow memory operand for
1256         -mindirect-branch-register.
1257         (Bw): Likewise.
1258         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1259         (GOT_memory_operand): Likewise.
1260         (call_insn_operand): Likewise.
1261         (sibcall_insn_operand): Likewise.
1262         (GOT32_symbol_operand): Likewise.
1263         * config/i386/i386.md (indirect_jump): Call convert_memory_address
1264         for -mindirect-branch-register.
1265         (tablejump): Likewise.
1266         (*sibcall_memory): Likewise.
1267         (*sibcall_value_memory): Likewise.
1268         Disallow peepholes of indirect call and jump via memory for
1269         -mindirect-branch-register.
1270         (*call_pop): Replace m with Bw.
1271         (*call_value_pop): Likewise.
1272         (*sibcall_pop_memory): Replace m with Bs.
1273         * config/i386/i386.opt (mindirect-branch-register): New option.
1274         * doc/invoke.texi: Document -mindirect-branch-register option.
1275
1276 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1277
1278         * config/i386/i386-protos.h (ix86_output_function_return): New.
1279         * config/i386/i386.c (ix86_set_indirect_branch_type): Also
1280         set function_return_type.
1281         (indirect_thunk_name): Add ret_p to indicate thunk for function
1282         return.
1283         (output_indirect_thunk_function): Pass false to
1284         indirect_thunk_name.
1285         (ix86_output_indirect_branch_via_reg): Likewise.
1286         (ix86_output_indirect_branch_via_push): Likewise.
1287         (output_indirect_thunk_function): Create alias for function
1288         return thunk if regno < 0.
1289         (ix86_output_function_return): New function.
1290         (ix86_handle_fndecl_attribute): Handle function_return.
1291         (ix86_attribute_table): Add function_return.
1292         * config/i386/i386.h (machine_function): Add
1293         function_return_type.
1294         * config/i386/i386.md (simple_return_internal): Use
1295         ix86_output_function_return.
1296         (simple_return_internal_long): Likewise.
1297         * config/i386/i386.opt (mfunction-return=): New option.
1298         (indirect_branch): Mention -mfunction-return=.
1299         * doc/extend.texi: Document function_return function attribute.
1300         * doc/invoke.texi: Document -mfunction-return= option.
1301
1302 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1303
1304         * config/i386/i386-opts.h (indirect_branch): New.
1305         * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
1306         * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
1307         with local indirect jump when converting indirect call and jump.
1308         (ix86_set_indirect_branch_type): New.
1309         (ix86_set_current_function): Call ix86_set_indirect_branch_type.
1310         (indirectlabelno): New.
1311         (indirect_thunk_needed): Likewise.
1312         (indirect_thunk_bnd_needed): Likewise.
1313         (indirect_thunks_used): Likewise.
1314         (indirect_thunks_bnd_used): Likewise.
1315         (INDIRECT_LABEL): Likewise.
1316         (indirect_thunk_name): Likewise.
1317         (output_indirect_thunk): Likewise.
1318         (output_indirect_thunk_function): Likewise.
1319         (ix86_output_indirect_branch_via_reg): Likewise.
1320         (ix86_output_indirect_branch_via_push): Likewise.
1321         (ix86_output_indirect_branch): Likewise.
1322         (ix86_output_indirect_jmp): Likewise.
1323         (ix86_code_end): Call output_indirect_thunk_function if needed.
1324         (ix86_output_call_insn): Call ix86_output_indirect_branch if
1325         needed.
1326         (ix86_handle_fndecl_attribute): Handle indirect_branch.
1327         (ix86_attribute_table): Add indirect_branch.
1328         * config/i386/i386.h (machine_function): Add indirect_branch_type
1329         and has_local_indirect_jump.
1330         * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
1331         to true.
1332         (tablejump): Likewise.
1333         (*indirect_jump): Use ix86_output_indirect_jmp.
1334         (*tablejump_1): Likewise.
1335         (simple_return_indirect_internal): Likewise.
1336         * config/i386/i386.opt (mindirect-branch=): New option.
1337         (indirect_branch): New.
1338         (keep): Likewise.
1339         (thunk): Likewise.
1340         (thunk-inline): Likewise.
1341         (thunk-extern): Likewise.
1342         * doc/extend.texi: Document indirect_branch function attribute.
1343         * doc/invoke.texi: Document -mindirect-branch= option.
1344
1345 2018-01-14  Jan Hubicka  <hubicka@ucw.cz>
1346
1347         PR ipa/83051
1348         * ipa-inline.c (edge_badness): Tolerate roundoff errors.
1349
1350 2018-01-14  Richard Sandiford  <richard.sandiford@linaro.org>
1351
1352         * ipa-inline.c (want_inline_small_function_p): Return false if
1353         inlining has already failed with CIF_FINAL_ERROR.
1354         (update_caller_keys): Call want_inline_small_function_p before
1355         can_inline_edge_p.
1356         (update_callee_keys): Likewise.
1357
1358 2018-01-10  Kelvin Nilsen  <kelvin@gcc.gnu.org>
1359
1360         * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
1361         New function.
1362         (rs6000_quadword_masked_address_p): Likewise.
1363         (quad_aligned_load_p): Likewise.
1364         (quad_aligned_store_p): Likewise.
1365         (const_load_sequence_p): Add comment to describe the outer-most loop.
1366         (mimic_memory_attributes_and_flags): New function.
1367         (rs6000_gen_stvx): Likewise.
1368         (replace_swapped_aligned_store): Likewise.
1369         (rs6000_gen_lvx): Likewise.
1370         (replace_swapped_aligned_load): Likewise.
1371         (replace_swapped_load_constant): Capitalize argument name in
1372         comment describing this function.
1373         (rs6000_analyze_swaps): Add a third pass to search for vector loads
1374         and stores that access quad-word aligned addresses and replace
1375         with stvx or lvx instructions when appropriate.
1376         * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
1377         New function prototype.
1378         (rs6000_quadword_masked_address_p): Likewise.
1379         (rs6000_gen_lvx): Likewise.
1380         (rs6000_gen_stvx): Likewise.
1381         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
1382         VSX_D (V2DF, V2DI), modify this split to select lvx instruction
1383         when memory address is aligned.
1384         (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
1385         this split to select lvx instruction when memory address is aligned.
1386         (*vsx_le_perm_load_v8hi): Modify this split to select lvx
1387         instruction when memory address is aligned.
1388         (*vsx_le_perm_load_v16qi): Likewise.
1389         (four unnamed splitters): Modify to select the stvx instruction
1390         when memory is aligned.
1391
1392 2018-01-13  Jan Hubicka  <hubicka@ucw.cz>
1393
1394         * predict.c (determine_unlikely_bbs): Handle correctly BBs
1395         which appears in the queue multiple times.
1396
1397 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1398             Alan Hayward  <alan.hayward@arm.com>
1399             David Sherwood  <david.sherwood@arm.com>
1400
1401         * tree-vectorizer.h (vec_lower_bound): New structure.
1402         (_loop_vec_info): Add check_nonzero and lower_bounds.
1403         (LOOP_VINFO_CHECK_NONZERO): New macro.
1404         (LOOP_VINFO_LOWER_BOUNDS): Likewise.
1405         (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
1406         * tree-data-ref.h (dr_with_seg_len): Add access_size and align
1407         fields.  Make seg_len the distance travelled, not including the
1408         access size.
1409         (dr_direction_indicator): Declare.
1410         (dr_zero_step_indicator): Likewise.
1411         (dr_known_forward_stride_p): Likewise.
1412         * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
1413         tree-ssanames.h.
1414         (runtime_alias_check_p): Allow runtime alias checks with
1415         variable strides.
1416         (operator ==): Compare access_size and align.
1417         (prune_runtime_alias_test_list): Rework for new distinction between
1418         the access_size and seg_len.
1419         (create_intersect_range_checks_index): Likewise.  Cope with polynomial
1420         segment lengths.
1421         (get_segment_min_max): New function.
1422         (create_intersect_range_checks): Use it.
1423         (dr_step_indicator): New function.
1424         (dr_direction_indicator): Likewise.
1425         (dr_zero_step_indicator): Likewise.
1426         (dr_known_forward_stride_p): Likewise.
1427         * tree-loop-distribution.c (data_ref_segment_size): Return
1428         DR_STEP * (niters - 1).
1429         (compute_alias_check_pairs): Update call to the dr_with_seg_len
1430         constructor.
1431         * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
1432         (vect_preserves_scalar_order_p): New function, split out from...
1433         (vect_analyze_data_ref_dependence): ...here.  Check for zero steps.
1434         (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
1435         (vect_vfa_access_size): New function.
1436         (vect_vfa_align): Likewise.
1437         (vect_compile_time_alias): Take access_size_a and access_b arguments.
1438         (dump_lower_bound): New function.
1439         (vect_check_lower_bound): Likewise.
1440         (vect_small_gap_p): Likewise.
1441         (vectorizable_with_step_bound_p): Likewise.
1442         (vect_prune_runtime_alias_test_list): Ignore cross-iteration
1443         depencies if the vectorization factor is 1.  Convert the checks
1444         for nonzero steps into checks on the bounds of DR_STEP.  Try using
1445         a bunds check for variable steps if the minimum required step is
1446         relatively small. Update calls to the dr_with_seg_len
1447         constructor and to vect_compile_time_alias.
1448         * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
1449         function.
1450         (vect_loop_versioning): Call it.
1451         * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
1452         when retrying.
1453         (vect_estimate_min_profitable_iters): Account for any bounds checks.
1454
1455 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1456             Alan Hayward  <alan.hayward@arm.com>
1457             David Sherwood  <david.sherwood@arm.com>
1458
1459         * doc/sourcebuild.texi (vect_scatter_store): Document.
1460         * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
1461         optabs.
1462         * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
1463         Document.
1464         * genopinit.c (main): Add supports_vec_scatter_store and
1465         supports_vec_scatter_store_cached to target_optabs.
1466         * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
1467         IFN_MASK_SCATTER_STORE.
1468         * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
1469         functions.
1470         * internal-fn.h (internal_store_fn_p): Declare.
1471         (internal_fn_stored_value_index): Likewise.
1472         * internal-fn.c (scatter_store_direct): New macro.
1473         (expand_scatter_store_optab_fn): New function.
1474         (direct_scatter_store_optab_supported_p): New macro.
1475         (internal_store_fn_p): New function.
1476         (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
1477         IFN_MASK_SCATTER_STORE.
1478         (internal_fn_mask_index): Likewise.
1479         (internal_fn_stored_value_index): New function.
1480         (internal_gather_scatter_fn_supported_p): Adjust operand numbers
1481         for scatter stores.
1482         * optabs-query.h (supports_vec_scatter_store_p): Declare.
1483         * optabs-query.c (supports_vec_scatter_store_p): New function.
1484         * tree-vectorizer.h (vect_get_store_rhs): Declare.
1485         * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
1486         true for scatter stores.
1487         (vect_gather_scatter_fn_p): Handle scatter stores too.
1488         (vect_check_gather_scatter): Consider using scatter stores if
1489         supports_vec_scatter_store_p.
1490         * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
1491         scatter stores too.
1492         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1493         internal_fn_stored_value_index.
1494         (check_load_store_masking): Handle scatter stores too.
1495         (vect_get_store_rhs): Make public.
1496         (vectorizable_call): Use internal_store_fn_p.
1497         (vectorizable_store): Handle scatter store internal functions.
1498         (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
1499         when deciding whether the end of the group has been reached.
1500         * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
1501         * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
1502         (mask_scatter_store<mode>): New insns.
1503
1504 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1505             Alan Hayward  <alan.hayward@arm.com>
1506             David Sherwood  <david.sherwood@arm.com>
1507
1508         * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
1509         * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
1510         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
1511         function.
1512         (vect_use_strided_gather_scatters_p): Take a masked_p argument.
1513         Use vect_truncate_gather_scatter_offset if we can't treat the
1514         operation as a normal gather load or scatter store.
1515         (get_group_load_store_type): Take the gather_scatter_info
1516         as argument.  Try using a gather load or scatter store for
1517         single-element groups.
1518         (get_load_store_type): Update calls to get_group_load_store_type
1519         and vect_use_strided_gather_scatters_p.
1520
1521 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1522             Alan Hayward  <alan.hayward@arm.com>
1523             David Sherwood  <david.sherwood@arm.com>
1524
1525         * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
1526         optional tree argument.
1527         * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
1528         null target hooks.
1529         (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
1530         but continue to use the current value as a fallback.
1531         (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
1532         to compare the updates.
1533         * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
1534         (get_load_store_type): Use it when handling a strided access.
1535         (vect_get_strided_load_store_ops): New function.
1536         (vect_get_data_ptr_increment): Likewise.
1537         (vectorizable_load): Handle strided gather loads.  Always pass
1538         a step to vect_create_data_ref_ptr and bump_vector_ptr.
1539
1540 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1541             Alan Hayward  <alan.hayward@arm.com>
1542             David Sherwood  <david.sherwood@arm.com>
1543
1544         * doc/md.texi (gather_load@var{m}): Document.
1545         (mask_gather_load@var{m}): Likewise.
1546         * genopinit.c (main): Add supports_vec_gather_load and
1547         supports_vec_gather_load_cached to target_optabs.
1548         * optabs-tree.c (init_tree_optimization_optabs): Use
1549         ggc_cleared_alloc to allocate target_optabs.
1550         * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
1551         * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
1552         functions.
1553         * internal-fn.h (internal_load_fn_p): Declare.
1554         (internal_gather_scatter_fn_p): Likewise.
1555         (internal_fn_mask_index): Likewise.
1556         (internal_gather_scatter_fn_supported_p): Likewise.
1557         * internal-fn.c (gather_load_direct): New macro.
1558         (expand_gather_load_optab_fn): New function.
1559         (direct_gather_load_optab_supported_p): New macro.
1560         (direct_internal_fn_optab): New function.
1561         (internal_load_fn_p): Likewise.
1562         (internal_gather_scatter_fn_p): Likewise.
1563         (internal_fn_mask_index): Likewise.
1564         (internal_gather_scatter_fn_supported_p): Likewise.
1565         * optabs-query.c (supports_at_least_one_mode_p): New function.
1566         (supports_vec_gather_load_p): Likewise.
1567         * optabs-query.h (supports_vec_gather_load_p): Declare.
1568         * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
1569         and memory_type field.
1570         (NUM_PATTERNS): Bump to 15.
1571         * tree-vect-data-refs.c: Include internal-fn.h.
1572         (vect_gather_scatter_fn_p): New function.
1573         (vect_describe_gather_scatter_call): Likewise.
1574         (vect_check_gather_scatter): Try using internal functions for
1575         gather loads.  Recognize existing calls to a gather load function.
1576         (vect_analyze_data_refs): Consider using gather loads if
1577         supports_vec_gather_load_p.
1578         * tree-vect-patterns.c (vect_get_load_store_mask): New function.
1579         (vect_get_gather_scatter_offset_type): Likewise.
1580         (vect_convert_mask_for_vectype): Likewise.
1581         (vect_add_conversion_to_patterm): Likewise.
1582         (vect_try_gather_scatter_pattern): Likewise.
1583         (vect_recog_gather_scatter_pattern): New pattern recognizer.
1584         (vect_vect_recog_func_ptrs): Add it.
1585         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1586         internal_fn_mask_index and internal_gather_scatter_fn_p.
1587         (check_load_store_masking): Take the gather_scatter_info as an
1588         argument and handle gather loads.
1589         (vect_get_gather_scatter_ops): New function.
1590         (vectorizable_call): Check internal_load_fn_p.
1591         (vectorizable_load): Likewise.  Handle gather load internal
1592         functions.
1593         (vectorizable_store): Update call to check_load_store_masking.
1594         * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
1595         * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
1596         * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
1597         (aarch64_gather_scale_operand_d): New predicates.
1598         * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
1599         (mask_gather_load<mode>): New insns.
1600
1601 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1602             Alan Hayward  <alan.hayward@arm.com>
1603             David Sherwood  <david.sherwood@arm.com>
1604
1605         * optabs.def (fold_left_plus_optab): New optab.
1606         * doc/md.texi (fold_left_plus_@var{m}): Document.
1607         * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
1608         * internal-fn.c (fold_left_direct): Define.
1609         (expand_fold_left_optab_fn): Likewise.
1610         (direct_fold_left_optab_supported_p): Likewise.
1611         * fold-const-call.c (fold_const_fold_left): New function.
1612         (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
1613         * tree-parloops.c (valid_reduction_p): New function.
1614         (gather_scalar_reductions): Use it.
1615         * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
1616         (vect_finish_replace_stmt): Declare.
1617         * tree-vect-loop.c (fold_left_reduction_fn): New function.
1618         (needs_fold_left_reduction_p): New function, split out from...
1619         (vect_is_simple_reduction): ...here.  Accept reductions that
1620         forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
1621         (vect_force_simple_reduction): Also store the reduction type in
1622         the assignment's STMT_VINFO_REDUC_TYPE.
1623         (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
1624         (merge_with_identity): New function.
1625         (vect_expand_fold_left): Likewise.
1626         (vectorize_fold_left_reduction): Likewise.
1627         (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION.  Leave the
1628         scalar phi in place for it.  Check for target support and reject
1629         cases that would reassociate the operation.  Defer the transform
1630         phase to vectorize_fold_left_reduction.
1631         * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
1632         * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
1633         (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
1634
1635 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1636
1637         * tree-if-conv.c (predicate_mem_writes): Remove redundant
1638         call to ifc_temp_var.
1639
1640 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1641             Alan Hayward  <alan.hayward@arm.com>
1642             David Sherwood  <david.sherwood@arm.com>
1643
1644         * target.def (legitimize_address_displacement): Take the original
1645         offset as a poly_int.
1646         * targhooks.h (default_legitimize_address_displacement): Update
1647         accordingly.
1648         * targhooks.c (default_legitimize_address_displacement): Likewise.
1649         * doc/tm.texi: Regenerate.
1650         * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
1651         as an argument, moving assert of ad->disp == ad->disp_term to...
1652         (process_address_1): ...here.  Update calls to base_plus_disp_to_reg.
1653         Try calling targetm.legitimize_address_displacement before expanding
1654         the address rather than afterwards, and adjust for the new interface.
1655         * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
1656         Match the new hook interface.  Handle SVE addresses.
1657         * config/sh/sh.c (sh_legitimize_address_displacement): Make the
1658         new hook interface.
1659
1660 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1661
1662         * Makefile.in (OBJS): Add early-remat.o.
1663         * target.def (select_early_remat_modes): New hook.
1664         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
1665         * doc/tm.texi: Regenerate.
1666         * targhooks.h (default_select_early_remat_modes): Declare.
1667         * targhooks.c (default_select_early_remat_modes): New function.
1668         * timevar.def (TV_EARLY_REMAT): New timevar.
1669         * passes.def (pass_early_remat): New pass.
1670         * tree-pass.h (make_pass_early_remat): Declare.
1671         * early-remat.c: New file.
1672         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
1673         function.
1674         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
1675
1676 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1677             Alan Hayward  <alan.hayward@arm.com>
1678             David Sherwood  <david.sherwood@arm.com>
1679
1680         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
1681         vfm1 with a bound_epilog parameter.
1682         (vect_do_peeling): Update calls accordingly, and move the prologue
1683         call earlier in the function.  Treat the base bound_epilog as 0 for
1684         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
1685         this base when peeling for gaps.
1686         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
1687         with fully-masked loops.
1688         (vect_estimate_min_profitable_iters): Handle the single peeled
1689         iteration in that case.
1690
1691 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1692             Alan Hayward  <alan.hayward@arm.com>
1693             David Sherwood  <david.sherwood@arm.com>
1694
1695         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
1696         single-element interleaving even if the size is not a power of 2.
1697         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
1698         accesses for single-element interleaving if the group size is
1699         not a power of 2.
1700
1701 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1702             Alan Hayward  <alan.hayward@arm.com>
1703             David Sherwood  <david.sherwood@arm.com>
1704
1705         * doc/md.texi (fold_extract_last_@var{m}): Document.
1706         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1707         * optabs.def (fold_extract_last_optab): New optab.
1708         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1709         * internal-fn.c (fold_extract_direct): New macro.
1710         (expand_fold_extract_optab_fn): Likewise.
1711         (direct_fold_extract_optab_supported_p): Likewise.
1712         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1713         * tree-vect-loop.c (vect_model_reduction_cost): Handle
1714         EXTRACT_LAST_REDUCTION.
1715         (get_initial_def_for_reduction): Do not create an initial vector
1716         for EXTRACT_LAST_REDUCTION reductions.
1717         (vectorizable_reduction): Leave the scalar phi in place for
1718         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
1719         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
1720         epilogue code for EXTRACT_LAST_REDUCTION and defer the
1721         transform phase to vectorizable_condition.
1722         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1723         split out from...
1724         (vect_finish_stmt_generation): ...here.
1725         (vect_finish_replace_stmt): New function.
1726         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1727         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1728         pattern.
1729         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1730
1731 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1732             Alan Hayward  <alan.hayward@arm.com>
1733             David Sherwood  <david.sherwood@arm.com>
1734
1735         * doc/md.texi (extract_last_@var{m}): Document.
1736         * optabs.def (extract_last_optab): New optab.
1737         * internal-fn.def (EXTRACT_LAST): New internal function.
1738         * internal-fn.c (cond_unary_direct): New macro.
1739         (expand_cond_unary_optab_fn): Likewise.
1740         (direct_cond_unary_optab_supported_p): Likewise.
1741         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1742         loops using EXTRACT_LAST.
1743         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1744         (extract_last_<mode>): ...this optab.
1745         (vec_extract<mode><Vel>): Update accordingly.
1746
1747 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1748             Alan Hayward  <alan.hayward@arm.com>
1749             David Sherwood  <david.sherwood@arm.com>
1750
1751         * target.def (empty_mask_is_expensive): New hook.
1752         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1753         * doc/tm.texi: Regenerate.
1754         * targhooks.h (default_empty_mask_is_expensive): Declare.
1755         * targhooks.c (default_empty_mask_is_expensive): New function.
1756         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1757         if the target says that empty masks are expensive.
1758         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1759         New function.
1760         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1761
1762 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1763             Alan Hayward  <alan.hayward@arm.com>
1764             David Sherwood  <david.sherwood@arm.com>
1765
1766         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1767         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1768         (vect_use_loop_mask_for_alignment_p): New function.
1769         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1770         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1771         niters_skip argument.  Make sure that the first niters_skip elements
1772         of the first iteration are inactive.
1773         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1774         Update call to vect_set_loop_masks_directly.
1775         (get_misalign_in_elems): New function, split out from...
1776         (vect_gen_prolog_loop_niters): ...here.
1777         (vect_update_init_of_dr): Take a code argument that specifies whether
1778         the adjustment should be added or subtracted.
1779         (vect_update_init_of_drs): Likewise.
1780         (vect_prepare_for_masked_peels): New function.
1781         (vect_do_peeling): Skip prologue peeling if we're using a mask
1782         instead.  Update call to vect_update_inits_of_drs.
1783         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1784         mask_skip_niters.
1785         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1786         alignment.  Do not include the number of peeled iterations in
1787         the minimum threshold in that case.
1788         (vectorizable_induction): Adjust the start value down by
1789         LOOP_VINFO_MASK_SKIP_NITERS iterations.
1790         (vect_transform_loop): Call vect_prepare_for_masked_peels.
1791         Take the number of skipped iterations into account when calculating
1792         the loop bounds.
1793         * tree-vect-stmts.c (vect_gen_while_not): New function.
1794
1795 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1796             Alan Hayward  <alan.hayward@arm.com>
1797             David Sherwood  <david.sherwood@arm.com>
1798
1799         * doc/sourcebuild.texi (vect_fully_masked): Document.
1800         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1801         default value to 0.
1802         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1803         split out from...
1804         (vect_analyze_loop_2): ...here. Don't check the vectorization
1805         factor against the number of loop iterations if the loop is
1806         fully-masked.
1807
1808 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1809             Alan Hayward  <alan.hayward@arm.com>
1810             David Sherwood  <david.sherwood@arm.com>
1811
1812         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1813         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1814         (dump_groups): Update accordingly.
1815         (iv_use::mem_type): New member variable.
1816         (address_p): New function.
1817         (record_use): Add a mem_type argument and initialize the new
1818         mem_type field.
1819         (record_group_use): Add a mem_type argument.  Use address_p.
1820         Remove obsolete null checks of base_object.  Update call to record_use.
1821         (find_interesting_uses_op): Update call to record_group_use.
1822         (find_interesting_uses_cond): Likewise.
1823         (find_interesting_uses_address): Likewise.
1824         (get_mem_type_for_internal_fn): New function.
1825         (find_address_like_use): Likewise.
1826         (find_interesting_uses_stmt): Try find_address_like_use before
1827         calling find_interesting_uses_op.
1828         (addr_offset_valid_p): Use the iv mem_type field as the type
1829         of the addressed memory.
1830         (add_autoinc_candidates): Likewise.
1831         (get_address_cost): Likewise.
1832         (split_small_address_groups_p): Use address_p.
1833         (split_address_groups): Likewise.
1834         (add_iv_candidate_for_use): Likewise.
1835         (autoinc_possible_for_pair): Likewise.
1836         (rewrite_groups): Likewise.
1837         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1838         (determine_group_iv_cost): Update after split of USE_ADDRESS.
1839         (get_alias_ptr_type_for_ptr_address): New function.
1840         (rewrite_use_address): Rewrite address uses in calls that were
1841         identified by find_address_like_use.
1842
1843 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1844             Alan Hayward  <alan.hayward@arm.com>
1845             David Sherwood  <david.sherwood@arm.com>
1846
1847         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1848         TARGET_MEM_REFs.
1849         * gimple-expr.h (is_gimple_addressable: Likewise.
1850         * gimple-expr.c (is_gimple_address): Likewise.
1851         * internal-fn.c (expand_call_mem_ref): New function.
1852         (expand_mask_load_optab_fn): Use it.
1853         (expand_mask_store_optab_fn): Likewise.
1854
1855 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1856             Alan Hayward  <alan.hayward@arm.com>
1857             David Sherwood  <david.sherwood@arm.com>
1858
1859         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1860         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1861         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1862         (cond_umax@var{mode}): Document.
1863         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1864         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1865         (cond_umin_optab, cond_umax_optab): New optabs.
1866         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1867         (COND_IOR, COND_XOR): New internal functions.
1868         * internal-fn.h (get_conditional_internal_fn): Declare.
1869         * internal-fn.c (cond_binary_direct): New macro.
1870         (expand_cond_binary_optab_fn): Likewise.
1871         (direct_cond_binary_optab_supported_p): Likewise.
1872         (get_conditional_internal_fn): New function.
1873         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1874         Cope with reduction statements that are vectorized as calls rather
1875         than assignments.
1876         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1877         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1878         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1879         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1880         (UNSPEC_COND_EOR): New unspecs.
1881         (optab): Add mappings for them.
1882         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1883         (sve_int_op, sve_fp_op): New int attributes.
1884
1885 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1886             Alan Hayward  <alan.hayward@arm.com>
1887             David Sherwood  <david.sherwood@arm.com>
1888
1889         * optabs.def (while_ult_optab): New optab.
1890         * doc/md.texi (while_ult@var{m}@var{n}): Document.
1891         * internal-fn.def (WHILE_ULT): New internal function.
1892         * internal-fn.h (direct_internal_fn_supported_p): New override
1893         that takes two types as argument.
1894         * internal-fn.c (while_direct): New macro.
1895         (expand_while_optab_fn): New function.
1896         (convert_optab_supported_p): Likewise.
1897         (direct_while_optab_supported_p): New macro.
1898         * wide-int.h (wi::udiv_ceil): New function.
1899         * tree-vectorizer.h (rgroup_masks): New structure.
1900         (vec_loop_masks): New typedef.
1901         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1902         and fully_masked_p.
1903         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1904         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1905         (vect_max_vf): New function.
1906         (slpeel_make_loop_iterate_ntimes): Delete.
1907         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1908         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1909         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1910         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1911         internal-fn.h, stor-layout.h and optabs-query.h.
1912         (vect_set_loop_mask): New function.
1913         (add_preheader_seq): Likewise.
1914         (add_header_seq): Likewise.
1915         (interleave_supported_p): Likewise.
1916         (vect_maybe_permute_loop_masks): Likewise.
1917         (vect_set_loop_masks_directly): Likewise.
1918         (vect_set_loop_condition_masked): Likewise.
1919         (vect_set_loop_condition_unmasked): New function, split out from
1920         slpeel_make_loop_iterate_ntimes.
1921         (slpeel_make_loop_iterate_ntimes): Rename to..
1922         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
1923         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1924         (vect_do_peeling): Update call accordingly.
1925         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1926         loops.
1927         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1928         mask_compare_type, can_fully_mask_p and fully_masked_p.
1929         (release_vec_loop_masks): New function.
1930         (_loop_vec_info): Use it to free the loop masks.
1931         (can_produce_all_loop_masks_p): New function.
1932         (vect_get_max_nscalars_per_iter): Likewise.
1933         (vect_verify_full_masking): Likewise.
1934         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1935         retries, and free the mask rgroups before retrying.  Check loop-wide
1936         reasons for disallowing fully-masked loops.  Make the final decision
1937         about whether use a fully-masked loop or not.
1938         (vect_estimate_min_profitable_iters): Do not assume that peeling
1939         for the number of iterations will be needed for fully-masked loops.
1940         (vectorizable_reduction): Disable fully-masked loops.
1941         (vectorizable_live_operation): Likewise.
1942         (vect_halve_mask_nunits): New function.
1943         (vect_double_mask_nunits): Likewise.
1944         (vect_record_loop_mask): Likewise.
1945         (vect_get_loop_mask): Likewise.
1946         (vect_transform_loop): Handle the case in which the final loop
1947         iteration might handle a partial vector.  Call vect_set_loop_condition
1948         instead of slpeel_make_loop_iterate_ntimes.
1949         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1950         (check_load_store_masking): New function.
1951         (prepare_load_store_mask): Likewise.
1952         (vectorizable_store): Handle fully-masked loops.
1953         (vectorizable_load): Likewise.
1954         (supportable_widening_operation): Use vect_halve_mask_nunits for
1955         booleans.
1956         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1957         (vect_gen_while): New function.
1958         * config/aarch64/aarch64.md (umax<mode>3): New expander.
1959         (aarch64_uqdec<mode>): New insn.
1960
1961 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1962             Alan Hayward  <alan.hayward@arm.com>
1963             David Sherwood  <david.sherwood@arm.com>
1964
1965         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1966         (reduc_xor_scal_optab): New optabs.
1967         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1968         (reduc_xor_scal_@var{m}): Document.
1969         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1970         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1971         internal functions.
1972         * fold-const-call.c (fold_const_call): Handle them.
1973         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1974         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1975         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1976         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1977         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1978         (UNSPEC_XORV): New unspecs.
1979         (optab): Add entries for them.
1980         (BITWISEV): New int iterator.
1981         (bit_reduc_op): New int attributes.
1982
1983 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1984             Alan Hayward  <alan.hayward@arm.com>
1985             David Sherwood  <david.sherwood@arm.com>
1986
1987         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1988         * internal-fn.def (VEC_SHL_INSERT): New internal function.
1989         * optabs.def (vec_shl_insert_optab): New optab.
1990         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1991         (duplicate_and_interleave): Likewise.
1992         * tree-vect-loop.c: Include internal-fn.h.
1993         (neutral_op_for_slp_reduction): New function, split out from
1994         get_initial_defs_for_reduction.
1995         (get_initial_def_for_reduction): Handle option 2 for variable-length
1996         vectors by loading the neutral value into a vector and then shifting
1997         the initial value into element 0.
1998         (get_initial_defs_for_reduction): Replace the code argument with
1999         the neutral value calculated by neutral_op_for_slp_reduction.
2000         Use gimple_build_vector for constant-length vectors.
2001         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
2002         but the first group_size elements have a neutral value.
2003         Use duplicate_and_interleave otherwise.
2004         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
2005         Update call to get_initial_defs_for_reduction.  Handle SLP
2006         reductions for variable-length vectors by creating one vector
2007         result for each scalar result, with the elements associated
2008         with other scalar results stubbed out with the neutral value.
2009         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
2010         Require IFN_VEC_SHL_INSERT for double reductions on
2011         variable-length vectors, or SLP reductions that have
2012         a neutral value.  Require can_duplicate_and_interleave_p
2013         support for variable-length unchained SLP reductions if there
2014         is no neutral value, such as for MIN/MAX reductions.  Also require
2015         the number of vector elements to be a multiple of the number of
2016         SLP statements when doing variable-length unchained SLP reductions.
2017         Update call to vect_create_epilog_for_reduction.
2018         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
2019         and remove initial values.
2020         (duplicate_and_interleave): Make public.
2021         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
2022         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
2023
2024 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2025             Alan Hayward  <alan.hayward@arm.com>
2026             David Sherwood  <david.sherwood@arm.com>
2027
2028         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
2029         (can_duplicate_and_interleave_p): New function.
2030         (vect_get_and_check_slp_defs): Take the vector of statements
2031         rather than just the current one.  Remove excess parentheses.
2032         Restriction rejectinon of vect_constant_def and vect_external_def
2033         for variable-length vectors to boolean types, or types for which
2034         can_duplicate_and_interleave_p is false.
2035         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
2036         (duplicate_and_interleave): New function.
2037         (vect_get_constant_vectors): Use gimple_build_vector for
2038         constant-length vectors and suitable variable-length constant
2039         vectors.  Use duplicate_and_interleave for other variable-length
2040         vectors.  Don't defer the update when inserting new statements.
2041
2042 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2043             Alan Hayward  <alan.hayward@arm.com>
2044             David Sherwood  <david.sherwood@arm.com>
2045
2046         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
2047         min_profitable_iters doesn't go negative.
2048
2049 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2050             Alan Hayward  <alan.hayward@arm.com>
2051             David Sherwood  <david.sherwood@arm.com>
2052
2053         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
2054         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
2055         * optabs.def (vec_mask_load_lanes_optab): New optab.
2056         (vec_mask_store_lanes_optab): Likewise.
2057         * internal-fn.def (MASK_LOAD_LANES): New internal function.
2058         (MASK_STORE_LANES): Likewise.
2059         * internal-fn.c (mask_load_lanes_direct): New macro.
2060         (mask_store_lanes_direct): Likewise.
2061         (expand_mask_load_optab_fn): Handle masked operations.
2062         (expand_mask_load_lanes_optab_fn): New macro.
2063         (expand_mask_store_optab_fn): Handle masked operations.
2064         (expand_mask_store_lanes_optab_fn): New macro.
2065         (direct_mask_load_lanes_optab_supported_p): Likewise.
2066         (direct_mask_store_lanes_optab_supported_p): Likewise.
2067         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
2068         parameter.
2069         (vect_load_lanes_supported): Likewise.
2070         * tree-vect-data-refs.c (strip_conversion): New function.
2071         (can_group_stmts_p): Likewise.
2072         (vect_analyze_data_ref_accesses): Use it instead of checking
2073         for a pair of assignments.
2074         (vect_store_lanes_supported): Take a masked_p parameter.
2075         (vect_load_lanes_supported): Likewise.
2076         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
2077         vect_store_lanes_supported and vect_load_lanes_supported.
2078         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
2079         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
2080         parameter.  Don't allow gaps for masked accesses.
2081         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
2082         and vect_load_lanes_supported.
2083         (get_load_store_type): Take a masked_p parameter and update
2084         call to get_group_load_store_type.
2085         (vectorizable_store): Update call to get_load_store_type.
2086         Handle IFN_MASK_STORE_LANES.
2087         (vectorizable_load): Update call to get_load_store_type.
2088         Handle IFN_MASK_LOAD_LANES.
2089
2090 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2091             Alan Hayward  <alan.hayward@arm.com>
2092             David Sherwood  <david.sherwood@arm.com>
2093
2094         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
2095         modes for SVE.
2096         * config/aarch64/aarch64-protos.h
2097         (aarch64_sve_struct_memory_operand_p): Declare.
2098         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
2099         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
2100         (VPRED, vpred): Handle SVE structure modes.
2101         * config/aarch64/constraints.md (Utx): New constraint.
2102         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
2103         (aarch64_sve_struct_nonimmediate_operand): New predicates.
2104         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
2105         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
2106         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
2107         structure modes.  Split into pieces after RA.
2108         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
2109         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
2110         New patterns.
2111         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
2112         SVE structure modes.
2113         (aarch64_classify_address): Likewise.
2114         (sizetochar): Move earlier in file.
2115         (aarch64_print_operand): Handle SVE register lists.
2116         (aarch64_array_mode): New function.
2117         (aarch64_sve_struct_memory_operand_p): Likewise.
2118         (TARGET_ARRAY_MODE): Redefine.
2119
2120 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2121             Alan Hayward  <alan.hayward@arm.com>
2122             David Sherwood  <david.sherwood@arm.com>
2123
2124         * target.def (array_mode): New target hook.
2125         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
2126         * doc/tm.texi: Regenerate.
2127         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
2128         * hooks.c (hook_optmode_mode_uhwi_none): New function.
2129         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
2130         targetm.array_mode.
2131         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
2132         type sizes.
2133
2134 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2135             Alan Hayward  <alan.hayward@arm.com>
2136             David Sherwood  <david.sherwood@arm.com>
2137
2138         * fold-const.c (fold_binary_loc): Check the argument types
2139         rather than the result type when testing for a vector operation.
2140
2141 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2142
2143         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
2144         * doc/tm.texi: Regenerate.
2145
2146 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2147             Alan Hayward  <alan.hayward@arm.com>
2148             David Sherwood  <david.sherwood@arm.com>
2149
2150         * doc/invoke.texi (-msve-vector-bits=): Document new option.
2151         (sve): Document new AArch64 extension.
2152         * doc/md.texi (w): Extend the description of the AArch64
2153         constraint to include SVE vectors.
2154         (Upl, Upa): Document new AArch64 predicate constraints.
2155         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
2156         enum.
2157         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
2158         (msve-vector-bits=): New option.
2159         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
2160         SVE when these are disabled.
2161         (sve): New extension.
2162         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
2163         modes.  Adjust their number of units based on aarch64_sve_vg.
2164         (MAX_BITSIZE_MODE_ANY_MODE): Define.
2165         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
2166         aarch64_addr_query_type.
2167         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
2168         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
2169         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
2170         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
2171         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
2172         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
2173         (aarch64_simd_imm_zero_p): Delete.
2174         (aarch64_check_zero_based_sve_index_immediate): Declare.
2175         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2176         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2177         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2178         (aarch64_sve_float_mul_immediate_p): Likewise.
2179         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2180         rather than an rtx.
2181         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
2182         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
2183         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
2184         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
2185         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
2186         (aarch64_regmode_natural_size): Likewise.
2187         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
2188         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
2189         left one place.
2190         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
2191         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
2192         for VG and the SVE predicate registers.
2193         (V_ALIASES): Add a "z"-prefixed alias.
2194         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
2195         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
2196         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
2197         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
2198         (REG_CLASS_NAMES): Add entries for them.
2199         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
2200         and the predicate registers.
2201         (aarch64_sve_vg): Declare.
2202         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
2203         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
2204         (REGMODE_NATURAL_SIZE): Define.
2205         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
2206         SVE macros.
2207         * config/aarch64/aarch64.c: Include cfgrtl.h.
2208         (simd_immediate_info): Add a constructor for series vectors,
2209         and an associated step field.
2210         (aarch64_sve_vg): New variable.
2211         (aarch64_dbx_register_number): Handle VG and the predicate registers.
2212         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
2213         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
2214         (VEC_ANY_DATA, VEC_STRUCT): New constants.
2215         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
2216         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
2217         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
2218         (aarch64_get_mask_mode): New functions.
2219         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
2220         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
2221         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
2222         predicate modes and predicate registers.  Explicitly restrict
2223         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
2224         to store a vector mode if it is recognized by
2225         aarch64_classify_vector_mode.
2226         (aarch64_regmode_natural_size): New function.
2227         (aarch64_hard_regno_caller_save_mode): Return the original mode
2228         for predicates.
2229         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
2230         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
2231         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
2232         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
2233         functions.
2234         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
2235         does not overlap dest if the function is frame-related.  Handle
2236         SVE constants.
2237         (aarch64_split_add_offset): New function.
2238         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
2239         them aarch64_add_offset.
2240         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
2241         and update call to aarch64_sub_sp.
2242         (aarch64_add_cfa_expression): New function.
2243         (aarch64_expand_prologue): Pass extra temporary registers to the
2244         functions above.  Handle the case in which we need to emit new
2245         DW_CFA_expressions for registers that were originally saved
2246         relative to the stack pointer, but now have to be expressed
2247         relative to the frame pointer.
2248         (aarch64_output_mi_thunk): Pass extra temporary registers to the
2249         functions above.
2250         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
2251         IP0 and IP1 values for SVE frames.
2252         (aarch64_expand_vec_series): New function.
2253         (aarch64_expand_sve_widened_duplicate): Likewise.
2254         (aarch64_expand_sve_const_vector): Likewise.
2255         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
2256         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
2257         into the register, rather than emitting a SET directly.
2258         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
2259         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
2260         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
2261         (offset_9bit_signed_scaled_p): New functions.
2262         (aarch64_replicate_bitmask_imm): New function.
2263         (aarch64_bitmask_imm): Use it.
2264         (aarch64_cannot_force_const_mem): Reject expressions involving
2265         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
2266         (aarch64_classify_index): Handle SVE indices, by requiring
2267         a plain register index with a scale that matches the element size.
2268         (aarch64_classify_address): Handle SVE addresses.  Assert that
2269         the mode of the address is VOIDmode or an integer mode.
2270         Update call to aarch64_classify_symbol.
2271         (aarch64_classify_symbolic_expression): Update call to
2272         aarch64_classify_symbol.
2273         (aarch64_const_vec_all_in_range_p): New function.
2274         (aarch64_print_vector_float_operand): Likewise.
2275         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
2276         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
2277         and the FP immediates 1.0 and 0.5.
2278         (aarch64_print_address_internal): Handle SVE addresses.
2279         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
2280         (aarch64_regno_regclass): Handle predicate registers.
2281         (aarch64_secondary_reload): Handle big-endian reloads of SVE
2282         data modes.
2283         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
2284         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
2285         (aarch64_convert_sve_vector_bits): New function.
2286         (aarch64_override_options): Use it to handle -msve-vector-bits=.
2287         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2288         rather than an rtx.
2289         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
2290         Handle SVE vector and predicate modes.  Accept VL-based constants
2291         that need only one temporary register, and VL offsets that require
2292         no temporary registers.
2293         (aarch64_conditional_register_usage): Mark the predicate registers
2294         as fixed if SVE isn't available.
2295         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
2296         Return true for SVE vector and predicate modes.
2297         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
2298         rather than an unsigned int.  Handle SVE modes.
2299         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
2300         SVE modes.
2301         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
2302         if SVE is enabled.
2303         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2304         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2305         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2306         (aarch64_sve_float_mul_immediate_p): New functions.
2307         (aarch64_sve_valid_immediate): New function.
2308         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
2309         Explicitly reject structure modes.  Check for INDEX constants.
2310         Handle PTRUE and PFALSE constants.
2311         (aarch64_check_zero_based_sve_index_immediate): New function.
2312         (aarch64_simd_imm_zero_p): Delete.
2313         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
2314         vector modes.  Accept constants in the range of CNT[BHWD].
2315         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
2316         ask for an Advanced SIMD mode.
2317         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
2318         (aarch64_simd_vector_alignment): Handle SVE predicates.
2319         (aarch64_vectorize_preferred_vector_alignment): New function.
2320         (aarch64_simd_vector_alignment_reachable): Use it instead of
2321         the vector size.
2322         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
2323         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
2324         functions.
2325         (MAX_VECT_LEN): Delete.
2326         (expand_vec_perm_d): Add a vec_flags field.
2327         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
2328         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
2329         (aarch64_evpc_ext): Don't apply a big-endian lane correction
2330         for SVE modes.
2331         (aarch64_evpc_rev): Rename to...
2332         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
2333         (aarch64_evpc_rev_global): New function.
2334         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
2335         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
2336         MAX_VECT_LEN.
2337         (aarch64_evpc_sve_tbl): New function.
2338         (aarch64_expand_vec_perm_const_1): Update after rename of
2339         aarch64_evpc_rev.  Handle SVE permutes too, trying
2340         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
2341         than aarch64_evpc_tbl.
2342         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
2343         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
2344         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
2345         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
2346         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
2347         (aarch64_expand_sve_vcond): New functions.
2348         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
2349         of aarch64_vector_mode_p.
2350         (aarch64_dwarf_poly_indeterminate_value): New function.
2351         (aarch64_compute_pressure_classes): Likewise.
2352         (aarch64_can_change_mode_class): Likewise.
2353         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
2354         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
2355         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
2356         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
2357         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
2358         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
2359         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
2360         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
2361         constraints.
2362         (Dn, Dl, Dr): Accept const as well as const_vector.
2363         (Dz): Likewise.  Compare against CONST0_RTX.
2364         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
2365         of "vector" where appropriate.
2366         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
2367         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
2368         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
2369         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
2370         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
2371         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
2372         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
2373         (v_int_equiv): Extend to SVE modes.
2374         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
2375         mode attributes.
2376         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
2377         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
2378         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
2379         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
2380         (SVE_COND_FP_CMP): New int iterators.
2381         (perm_hilo): Handle the new unpack unspecs.
2382         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
2383         attributes.
2384         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
2385         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
2386         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
2387         (aarch64_equality_operator, aarch64_constant_vector_operand)
2388         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
2389         (aarch64_sve_nonimmediate_operand): Likewise.
2390         (aarch64_sve_general_operand): Likewise.
2391         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
2392         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
2393         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
2394         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
2395         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
2396         (aarch64_sve_float_arith_immediate): Likewise.
2397         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
2398         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
2399         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
2400         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
2401         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
2402         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
2403         (aarch64_sve_float_arith_operand): Likewise.
2404         (aarch64_sve_float_arith_with_sub_operand): Likewise.
2405         (aarch64_sve_float_mul_operand): Likewise.
2406         (aarch64_sve_vec_perm_operand): Likewise.
2407         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
2408         (aarch64_mov_operand): Accept const_poly_int and const_vector.
2409         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
2410         as well as const_vector.
2411         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
2412         in file.  Use CONST0_RTX and CONSTM1_RTX.
2413         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
2414         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
2415         Use aarch64_simd_imm_zero.
2416         * config/aarch64/aarch64-sve.md: New file.
2417         * config/aarch64/aarch64.md: Include it.
2418         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
2419         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
2420         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
2421         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
2422         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
2423         (sve): New attribute.
2424         (enabled): Disable instructions with the sve attribute unless
2425         TARGET_SVE.
2426         (movqi, movhi): Pass CONST_POLY_INT operaneds through
2427         aarch64_expand_mov_immediate.
2428         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
2429         CNT[BHSD] immediates.
2430         (movti): Split CONST_POLY_INT moves into two halves.
2431         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
2432         Split additions that need a temporary here if the destination
2433         is the stack pointer.
2434         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
2435         (*add<mode>3_poly_1): New instruction.
2436         (set_clobber_cc): New expander.
2437
2438 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2439
2440         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
2441         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
2442         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
2443         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
2444         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
2445         Change innermode from fixed_mode_size to machine_mode.
2446         (simplify_subreg): Update call accordingly.  Handle a constant-sized
2447         subreg of a variable-length CONST_VECTOR.
2448
2449 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2450             Alan Hayward  <alan.hayward@arm.com>
2451             David Sherwood  <david.sherwood@arm.com>
2452
2453         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
2454         (add_offset_to_base): New function, split out from...
2455         (create_mem_ref): ...here.  When handling a scale other than 1,
2456         check first whether the address is valid without the offset.
2457         Add it into the base if so, leaving the index and scale as-is.
2458
2459 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
2460
2461         PR c++/83778
2462         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
2463         fold_for_warn before checking if arg2 is INTEGER_CST.
2464
2465 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
2466
2467         * config/rs6000/predicates.md (load_multiple_operation): Delete.
2468         (store_multiple_operation): Delete.
2469         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
2470         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
2471         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
2472         guarded by TARGET_STRING.
2473         (rs6000_output_load_multiple): Delete.
2474         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
2475         OPTION_MASK_STRING / TARGET_STRING handling.
2476         (print_operand) <'N', 'O'>: Add comment that these are unused now.
2477         (const rs6000_opt_masks) <"string">: Change mask to 0.
2478         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
2479         (MASK_STRING): Delete.
2480         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
2481         parts.  Simplify.
2482         (load_multiple): Delete.
2483         (*ldmsi8): Delete.
2484         (*ldmsi7): Delete.
2485         (*ldmsi6): Delete.
2486         (*ldmsi5): Delete.
2487         (*ldmsi4): Delete.
2488         (*ldmsi3): Delete.
2489         (store_multiple): Delete.
2490         (*stmsi8): Delete.
2491         (*stmsi7): Delete.
2492         (*stmsi6): Delete.
2493         (*stmsi5): Delete.
2494         (*stmsi4): Delete.
2495         (*stmsi3): Delete.
2496         (movmemsi_8reg): Delete.
2497         (corresponding unnamed define_insn): Delete.
2498         (movmemsi_6reg): Delete.
2499         (corresponding unnamed define_insn): Delete.
2500         (movmemsi_4reg): Delete.
2501         (corresponding unnamed define_insn): Delete.
2502         (movmemsi_2reg): Delete.
2503         (corresponding unnamed define_insn): Delete.
2504         (movmemsi_1reg): Delete.
2505         (corresponding unnamed define_insn): Delete.
2506         * config/rs6000/rs6000.opt (mno-string): New.
2507         (mstring): Replace by deprecation warning stub.
2508         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
2509
2510 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
2511
2512         * regrename.c (regrename_do_replace): If replacing the same
2513         reg multiple times, try to reuse last created gen_raw_REG.
2514
2515         PR debug/81155
2516         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
2517         main to workaround a bug in GDB.
2518
2519 2018-01-12  Tom de Vries  <tom@codesourcery.com>
2520
2521         PR target/83737
2522         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
2523
2524 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
2525
2526         PR rtl-optimization/80481
2527         * ira-color.c (get_cap_member): New function.
2528         (allocnos_conflict_by_live_ranges_p): Use it.
2529         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
2530         (setup_slot_coalesced_allocno_live_ranges): Ditto.
2531
2532 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
2533
2534         PR target/83628
2535         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
2536         (*saddl_se_1): Ditto.
2537         (*ssubsi_1): Ditto.
2538         (*ssubl_se_1): Ditto.
2539
2540 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2541
2542         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
2543         rather than wi::to_widest for DR_INITs.
2544         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
2545         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
2546         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
2547         INTEGER_CSTs.
2548         (vect_analyze_group_access_1): Note that here.
2549
2550 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2551
2552         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
2553         polynomial type sizes.
2554
2555 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2556
2557         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
2558         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
2559         (gimple_add_tmp_var): Likewise.
2560
2561 2018-01-12  Martin Liska  <mliska@suse.cz>
2562
2563         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
2564         (gimple_alloc_sizes): Likewise.
2565         (dump_gimple_statistics): Use PRIu64 in printf format.
2566         * gimple.h: Change uint64_t to int.
2567
2568 2018-01-12  Martin Liska  <mliska@suse.cz>
2569
2570         * tree-core.h: Use uint64_t instead of int.
2571         * tree.c (tree_node_counts): Likewise.
2572         (tree_node_sizes): Likewise.
2573         (dump_tree_statistics): Use PRIu64 in printf format.
2574
2575 2018-01-12  Martin Liska  <mliska@suse.cz>
2576
2577         * Makefile.in: As qsort_chk is implemented in vec.c, add
2578         vec.o to linkage of gencfn-macros.
2579         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
2580         passing the info to record_node_allocation_statistics.
2581         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
2582         and pass the info.
2583         * ggc-common.c (struct ggc_usage): Add operator== and use
2584         it in operator< and compare function.
2585         * mem-stats.h (struct mem_usage): Likewise.
2586         * vec.c (struct vec_usage): Remove operator< and compare
2587         function. Can be simply inherited.
2588
2589 2018-01-12  Martin Jambor  <mjambor@suse.cz>
2590
2591         PR target/81616
2592         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
2593         * tree-ssa-math-opts.c: Include domwalk.h.
2594         (convert_mult_to_fma_1): New function.
2595         (fma_transformation_info): New type.
2596         (fma_deferring_state): Likewise.
2597         (cancel_fma_deferring): New function.
2598         (result_of_phi): Likewise.
2599         (last_fma_candidate_feeds_initial_phi): Likewise.
2600         (convert_mult_to_fma): Added deferring logic, split actual
2601         transformation to convert_mult_to_fma_1.
2602         (math_opts_dom_walker): New type.
2603         (math_opts_dom_walker::after_dom_children): New method, body moved
2604         here from pass_optimize_widening_mul::execute, added deferring logic
2605         bits.
2606         (pass_optimize_widening_mul::execute): Moved most of code to
2607         math_opts_dom_walker::after_dom_children.
2608         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
2609         * config/i386/i386.c (ix86_option_override_internal): Added
2610         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
2611
2612 2018-01-12  Richard Biener  <rguenther@suse.de>
2613
2614         PR debug/83157
2615         * dwarf2out.c (gen_variable_die): Do not reset old_die for
2616         inline instance vars.
2617
2618 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
2619
2620         PR target/81819
2621         * config/rx/rx.c (rx_is_restricted_memory_address):
2622         Handle SUBREG case.
2623
2624 2018-01-12  Richard Biener  <rguenther@suse.de>
2625
2626         PR tree-optimization/80846
2627         * target.def (split_reduction): New target hook.
2628         * targhooks.c (default_split_reduction): New function.
2629         * targhooks.h (default_split_reduction): Declare.
2630         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
2631         target requests first reduce vectors by combining low and high
2632         parts.
2633         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
2634         (get_vectype_for_scalar_type_and_size): Export.
2635         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
2636         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
2637         * doc/tm.texi: Regenerate.
2638         * config/i386/i386.c (ix86_split_reduction): Implement
2639         TARGET_VECTORIZE_SPLIT_REDUCTION.
2640
2641 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
2642
2643         PR target/83368
2644         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
2645         in PIC mode except for TARGET_VXWORKS_RTP.
2646         * config/sparc/sparc.c: Include cfgrtl.h.
2647         (TARGET_INIT_PIC_REG): Define.
2648         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
2649         (sparc_pic_register_p): New predicate.
2650         (sparc_legitimate_address_p): Use it.
2651         (sparc_legitimize_pic_address): Likewise.
2652         (sparc_delegitimize_address): Likewise.
2653         (sparc_mode_dependent_address_p): Likewise.
2654         (gen_load_pcrel_sym): Remove 4th parameter.
2655         (load_got_register): Adjust call to above.  Remove obsolete stuff.
2656         (sparc_expand_prologue): Do not call load_got_register here.
2657         (sparc_flat_expand_prologue): Likewise.
2658         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
2659         (sparc_use_pseudo_pic_reg): New function.
2660         (sparc_init_pic_reg): Likewise.
2661         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
2662         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
2663
2664 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
2665
2666         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
2667         Add item for branch_cost.
2668
2669 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
2670
2671         PR rtl-optimization/83565
2672         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
2673         not extend the result to a larger mode for rotate operations.
2674         (num_sign_bit_copies1): Likewise.
2675
2676 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
2677
2678         PR target/40411
2679         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
2680         -symbolic.
2681         Use values-Xc.o for -pedantic.
2682         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
2683
2684 2018-01-12  Martin Liska  <mliska@suse.cz>
2685
2686         PR ipa/83054
2687         * ipa-devirt.c (final_warning_record::grow_type_warnings):
2688         New function.
2689         (possible_polymorphic_call_targets): Use it.
2690         (ipa_devirt): Likewise.
2691
2692 2018-01-12  Martin Liska  <mliska@suse.cz>
2693
2694         * profile-count.h (enum profile_quality): Use 0 as invalid
2695         enum value of profile_quality.
2696
2697 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
2698
2699         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
2700         -mext-string options.
2701
2702 2018-01-12  Richard Biener  <rguenther@suse.de>
2703
2704         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2705         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2706         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2707         Likewise.
2708         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2709
2710 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
2711
2712         * configure.ac (--with-long-double-format): Add support for the
2713         configuration option to change the default long double format on
2714         PowerPC systems.
2715         * config.gcc (powerpc*-linux*-*): Likewise.
2716         * configure: Regenerate.
2717         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2718         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2719         used without modification.
2720
2721 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
2722
2723         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2724         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2725         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2726         MISC_BUILTIN_SPEC_BARRIER.
2727         (rs6000_init_builtins): Likewise.
2728         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2729         enum value.
2730         (speculation_barrier): New define_insn.
2731         * doc/extend.texi: Document __builtin_speculation_barrier.
2732
2733 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
2734
2735         PR target/83203
2736         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2737         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2738         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2739         iterators.
2740         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
2741         integral modes instead of "ss" and "sd".
2742         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2743         vectors with 32-bit and 64-bit elements.
2744         (vecdupssescalarmodesuffix): New mode attribute.
2745         (vec_dup<mode>): Use it.
2746
2747 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
2748
2749         PR target/83330
2750         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2751         frame if argument is passed on stack.
2752
2753 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
2754
2755         PR target/82682
2756         * ree.c (combine_reaching_defs): Optimize also
2757         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2758         reg2=any_extend(exp); reg1=reg2;, formatting fix.
2759
2760 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
2761
2762         PR middle-end/83189
2763         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2764
2765 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
2766
2767         PR middle-end/83718
2768         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2769         after they are computed.
2770
2771 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
2772
2773         PR tree-optimization/83695
2774         * gimple-loop-linterchange.cc
2775         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2776         reset cached scev information after interchange.
2777         (pass_linterchange::execute): Remove call to scev_reset_htab.
2778
2779 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2780
2781         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2782         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2783         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2784         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2785         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2786         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2787         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2788         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2789         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2790         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2791         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2792         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2793         (V_lane_reg): Likewise.
2794         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2795         New define_expand.
2796         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2797         (vfmal_lane_low<mode>_intrinsic,
2798         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2799         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2800         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2801         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2802         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2803         vfmsl_lane_high<mode>_intrinsic): New define_insns.
2804
2805 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2806
2807         * config/arm/arm-cpus.in (fp16fml): New feature.
2808         (ALL_SIMD): Add fp16fml.
2809         (armv8.2-a): Add fp16fml as an option.
2810         (armv8.3-a): Likewise.
2811         (armv8.4-a): Add fp16fml as part of fp16.
2812         * config/arm/arm.h (TARGET_FP16FML): Define.
2813         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2814         when appropriate.
2815         * config/arm/arm-modes.def (V2HF): Define.
2816         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2817         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2818         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2819         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2820         vfmsl_low, vfmsl_high): New set of builtins.
2821         * config/arm/iterators.md (PLUSMINUS): New code iterator.
2822         (vfml_op): New code attribute.
2823         (VFMLHALVES): New int iterator.
2824         (VFML, VFMLSEL): New mode attributes.
2825         (V_reg): Define mapping for V2HF.
2826         (V_hi, V_lo): New mode attributes.
2827         (VF_constraint): Likewise.
2828         (vfml_half, vfml_half_selector): New int attributes.
2829         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2830         define_expand.
2831         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2832         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2833         New define_insn.
2834         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2835         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2836         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2837         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
2838         documentation.
2839         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2840         Document new effective target and option set.
2841
2842 2017-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2843
2844         * config/arm/arm-cpus.in (armv8_4): New feature.
2845         (ARMv8_4a): New fgroup.
2846         (armv8.4-a): New arch.
2847         * config/arm/arm-tables.opt: Regenerate.
2848         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2849         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2850         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2851         Add matching rules for -march=armv8.4-a and extensions.
2852         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2853
2854 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
2855
2856         PR target/81821
2857         * config/rx/rx.md (BW): New mode attribute.
2858         (sync_lock_test_and_setsi): Add mode suffix to insn output.
2859
2860 2018-01-11  Richard Biener  <rguenther@suse.de>
2861
2862         PR tree-optimization/83435
2863         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2864         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2865         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2866
2867 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2868             Alan Hayward  <alan.hayward@arm.com>
2869             David Sherwood  <david.sherwood@arm.com>
2870
2871         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2872         field.
2873         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
2874         (aarch64_print_address_internal): Use it to check for a zero offset.
2875
2876 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2877             Alan Hayward  <alan.hayward@arm.com>
2878             David Sherwood  <david.sherwood@arm.com>
2879
2880         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2881         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2882         Return a poly_int64 rather than a HOST_WIDE_INT.
2883         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2884         rather than a HOST_WIDE_INT.
2885         * config/aarch64/aarch64.h (aarch64_frame): Protect with
2886         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
2887         hard_fp_offset, frame_size, initial_adjust, callee_offset and
2888         final_offset from HOST_WIDE_INT to poly_int64.
2889         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2890         to_constant when getting the number of units in an Advanced SIMD
2891         mode.
2892         (aarch64_builtin_vectorized_function): Check for a constant number
2893         of units.
2894         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2895         GET_MODE_SIZE.
2896         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2897         attribute instead of GET_MODE_NUNITS.
2898         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2899         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2900         GET_MODE_SIZE for fixed-size registers.
2901         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2902         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2903         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2904         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2905         (aarch64_print_operand, aarch64_print_address_internal)
2906         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2907         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2908         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2909         Handle polynomial GET_MODE_SIZE.
2910         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
2911         wider than SImode without modification.
2912         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2913         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2914         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2915         passing and returning SVE modes.
2916         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2917         rather than GEN_INT.
2918         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2919         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2920         (aarch64_allocate_and_probe_stack_space): Likewise.
2921         (aarch64_layout_frame): Cope with polynomial offsets.
2922         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2923         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
2924         polynomial offsets.
2925         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2926         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2927         poly_int64 rather than a HOST_WIDE_INT.
2928         (aarch64_get_separate_components, aarch64_process_components)
2929         (aarch64_expand_prologue, aarch64_expand_epilogue)
2930         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2931         (aarch64_anchor_offset): New function, split out from...
2932         (aarch64_legitimize_address): ...here.
2933         (aarch64_builtin_vectorization_cost): Handle polynomial
2934         TYPE_VECTOR_SUBPARTS.
2935         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2936         GET_MODE_NUNITS.
2937         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2938         number of elements from the PARALLEL rather than the mode.
2939         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2940         rather than GET_MODE_BITSIZE.
2941         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2942         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2943         (aarch64_expand_vec_perm_const_1): Handle polynomial
2944         d->perm.length () and d->perm elements.
2945         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
2946         Apply to_constant to d->perm elements.
2947         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2948         polynomial CONST_VECTOR_NUNITS.
2949         (aarch64_move_pointer): Take amount as a poly_int64 rather
2950         than an int.
2951         (aarch64_progress_pointer): Avoid temporary variable.
2952         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2953         the mode attribute instead of GET_MODE.
2954
2955 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2956             Alan Hayward  <alan.hayward@arm.com>
2957             David Sherwood  <david.sherwood@arm.com>
2958
2959         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2960         x exists before using it.
2961         (aarch64_add_constant_internal): Rename to...
2962         (aarch64_add_offset_1): ...this.  Replace regnum with separate
2963         src and dest rtxes.  Handle the case in which they're different,
2964         including when the offset is zero.  Replace scratchreg with an rtx.
2965         Use 2 additions if there is no spare register into which we can
2966         move a 16-bit constant.
2967         (aarch64_add_constant): Delete.
2968         (aarch64_add_offset): Replace reg with separate src and dest
2969         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
2970         Use aarch64_add_offset_1.
2971         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2972         an rtx rather than an int.  Take the delta as a poly_int64
2973         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
2974         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2975         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2976         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2977         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2978         and aarch64_add_sp.
2979         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2980         aarch64_add_constant.
2981
2982 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2983
2984         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2985         Use scalar_float_mode.
2986
2987 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2988
2989         * config/aarch64/aarch64-simd.md
2990         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2991         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2992         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2993         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2994         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2995         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2996         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2997         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2998         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2999         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
3000
3001 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3002
3003         PR target/83514
3004         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
3005         targ_options->x_arm_arch_string is non NULL.
3006
3007 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
3008
3009         * config/aarch64/aarch64.h
3010         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
3011
3012 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
3013
3014         PR target/82096
3015         * expmed.c (emit_store_flag_force): Swap if const op0
3016         and change VOIDmode to mode of op0.
3017
3018 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3019
3020         PR rtl-optimization/83761
3021         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
3022         than bytes to mode_for_size.
3023
3024 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3025
3026         PR middle-end/83189
3027         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
3028         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
3029         profile.
3030
3031 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3032
3033         PR middle-end/83575
3034         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
3035         when in layout mode.
3036         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
3037         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
3038         partition fixup.
3039
3040 2018-01-10  Michael Collison  <michael.collison@arm.com>
3041
3042         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
3043         * config/aarch64/aarch64-option-extension.def: Add
3044         AARCH64_OPT_EXTENSION of 'fp16fml'.
3045         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3046         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
3047         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
3048         * config/aarch64/constraints.md (Ui7): New constraint.
3049         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
3050         (VFMLA_SEL_W): Ditto.
3051         (f16quad): Ditto.
3052         (f16mac1): Ditto.
3053         (VFMLA16_LOW): New int iterator.
3054         (VFMLA16_HIGH): Ditto.
3055         (UNSPEC_FMLAL): New unspec.
3056         (UNSPEC_FMLSL): Ditto.
3057         (UNSPEC_FMLAL2): Ditto.
3058         (UNSPEC_FMLSL2): Ditto.
3059         (f16mac): New code attribute.
3060         * config/aarch64/aarch64-simd-builtins.def
3061         (aarch64_fmlal_lowv2sf): Ditto.
3062         (aarch64_fmlsl_lowv2sf): Ditto.
3063         (aarch64_fmlalq_lowv4sf): Ditto.
3064         (aarch64_fmlslq_lowv4sf): Ditto.
3065         (aarch64_fmlal_highv2sf): Ditto.
3066         (aarch64_fmlsl_highv2sf): Ditto.
3067         (aarch64_fmlalq_highv4sf): Ditto.
3068         (aarch64_fmlslq_highv4sf): Ditto.
3069         (aarch64_fmlal_lane_lowv2sf): Ditto.
3070         (aarch64_fmlsl_lane_lowv2sf): Ditto.
3071         (aarch64_fmlal_laneq_lowv2sf): Ditto.
3072         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
3073         (aarch64_fmlalq_lane_lowv4sf): Ditto.
3074         (aarch64_fmlsl_lane_lowv4sf): Ditto.
3075         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
3076         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
3077         (aarch64_fmlal_lane_highv2sf): Ditto.
3078         (aarch64_fmlsl_lane_highv2sf): Ditto.
3079         (aarch64_fmlal_laneq_highv2sf): Ditto.
3080         (aarch64_fmlsl_laneq_highv2sf): Ditto.
3081         (aarch64_fmlalq_lane_highv4sf): Ditto.
3082         (aarch64_fmlsl_lane_highv4sf): Ditto.
3083         (aarch64_fmlalq_laneq_highv4sf): Ditto.
3084         (aarch64_fmlsl_laneq_highv4sf): Ditto.
3085         * config/aarch64/aarch64-simd.md:
3086         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
3087         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3088         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
3089         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3090         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
3091         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
3092         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
3093         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
3094         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
3095         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
3096         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
3097         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
3098         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
3099         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
3100         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
3101         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
3102         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
3103         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
3104         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
3105         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
3106         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
3107         (vfmlsl_low_u32): Ditto.
3108         (vfmlalq_low_u32): Ditto.
3109         (vfmlslq_low_u32): Ditto.
3110         (vfmlal_high_u32): Ditto.
3111         (vfmlsl_high_u32): Ditto.
3112         (vfmlalq_high_u32): Ditto.
3113         (vfmlslq_high_u32): Ditto.
3114         (vfmlal_lane_low_u32): Ditto.
3115         (vfmlsl_lane_low_u32): Ditto.
3116         (vfmlal_laneq_low_u32): Ditto.
3117         (vfmlsl_laneq_low_u32): Ditto.
3118         (vfmlalq_lane_low_u32): Ditto.
3119         (vfmlslq_lane_low_u32): Ditto.
3120         (vfmlalq_laneq_low_u32): Ditto.
3121         (vfmlslq_laneq_low_u32): Ditto.
3122         (vfmlal_lane_high_u32): Ditto.
3123         (vfmlsl_lane_high_u32): Ditto.
3124         (vfmlal_laneq_high_u32): Ditto.
3125         (vfmlsl_laneq_high_u32): Ditto.
3126         (vfmlalq_lane_high_u32): Ditto.
3127         (vfmlslq_lane_high_u32): Ditto.
3128         (vfmlalq_laneq_high_u32): Ditto.
3129         (vfmlslq_laneq_high_u32): Ditto.
3130         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
3131         (AARCH64_FL_FOR_ARCH8_4): New.
3132         (AARCH64_ISA_F16FML): New ISA flag.
3133         (TARGET_F16FML): New feature flag for fp16fml.
3134         (doc/invoke.texi): Document new fp16fml option.
3135
3136 2018-01-10  Michael Collison  <michael.collison@arm.com>
3137
3138         * config/aarch64/aarch64-builtins.c:
3139         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
3140         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3141         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
3142         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
3143         (AARCH64_ISA_SHA3): New ISA flag.
3144         (TARGET_SHA3): New feature flag for sha3.
3145         * config/aarch64/iterators.md (sha512_op): New int attribute.
3146         (CRYPTO_SHA512): New int iterator.
3147         (UNSPEC_SHA512H): New unspec.
3148         (UNSPEC_SHA512H2): Ditto.
3149         (UNSPEC_SHA512SU0): Ditto.
3150         (UNSPEC_SHA512SU1): Ditto.
3151         * config/aarch64/aarch64-simd-builtins.def
3152         (aarch64_crypto_sha512hqv2di): New builtin.
3153         (aarch64_crypto_sha512h2qv2di): Ditto.
3154         (aarch64_crypto_sha512su0qv2di): Ditto.
3155         (aarch64_crypto_sha512su1qv2di): Ditto.
3156         (aarch64_eor3qv8hi): Ditto.
3157         (aarch64_rax1qv2di): Ditto.
3158         (aarch64_xarqv2di): Ditto.
3159         (aarch64_bcaxqv8hi): Ditto.
3160         * config/aarch64/aarch64-simd.md:
3161         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
3162         (aarch64_crypto_sha512su0qv2di): Ditto.
3163         (aarch64_crypto_sha512su1qv2di): Ditto.
3164         (aarch64_eor3qv8hi): Ditto.
3165         (aarch64_rax1qv2di): Ditto.
3166         (aarch64_xarqv2di): Ditto.
3167         (aarch64_bcaxqv8hi): Ditto.
3168         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
3169         (vsha512h2q_u64): Ditto.
3170         (vsha512su0q_u64): Ditto.
3171         (vsha512su1q_u64): Ditto.
3172         (veor3q_u16): Ditto.
3173         (vrax1q_u64): Ditto.
3174         (vxarq_u64): Ditto.
3175         (vbcaxq_u16): Ditto.
3176         * config/arm/types.md (crypto_sha512): New type attribute.
3177         (crypto_sha3): Ditto.
3178         (doc/invoke.texi): Document new sha3 option.
3179
3180 2018-01-10  Michael Collison  <michael.collison@arm.com>
3181
3182         * config/aarch64/aarch64-builtins.c:
3183         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
3184         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3185         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
3186         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
3187         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
3188         (AARCH64_ISA_SM4): New ISA flag.
3189         (TARGET_SM4): New feature flag for sm4.
3190         * config/aarch64/aarch64-simd-builtins.def
3191         (aarch64_sm3ss1qv4si): Ditto.
3192         (aarch64_sm3tt1aq4si): Ditto.
3193         (aarch64_sm3tt1bq4si): Ditto.
3194         (aarch64_sm3tt2aq4si): Ditto.
3195         (aarch64_sm3tt2bq4si): Ditto.
3196         (aarch64_sm3partw1qv4si): Ditto.
3197         (aarch64_sm3partw2qv4si): Ditto.
3198         (aarch64_sm4eqv4si): Ditto.
3199         (aarch64_sm4ekeyqv4si): Ditto.
3200         * config/aarch64/aarch64-simd.md:
3201         (aarch64_sm3ss1qv4si): Ditto.
3202         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
3203         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
3204         (aarch64_sm4eqv4si): Ditto.
3205         (aarch64_sm4ekeyqv4si): Ditto.
3206         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
3207         (sm3part_op): Ditto.
3208         (CRYPTO_SM3TT): Ditto.
3209         (CRYPTO_SM3PART): Ditto.
3210         (UNSPEC_SM3SS1): New unspec.
3211         (UNSPEC_SM3TT1A): Ditto.
3212         (UNSPEC_SM3TT1B): Ditto.
3213         (UNSPEC_SM3TT2A): Ditto.
3214         (UNSPEC_SM3TT2B): Ditto.
3215         (UNSPEC_SM3PARTW1): Ditto.
3216         (UNSPEC_SM3PARTW2): Ditto.
3217         (UNSPEC_SM4E): Ditto.
3218         (UNSPEC_SM4EKEY): Ditto.
3219         * config/aarch64/constraints.md (Ui2): New constraint.
3220         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
3221         * config/arm/types.md (crypto_sm3): New type attribute.
3222         (crypto_sm4): Ditto.
3223         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
3224         (vsm3tt1aq_u32): Ditto.
3225         (vsm3tt1bq_u32): Ditto.
3226         (vsm3tt2aq_u32): Ditto.
3227         (vsm3tt2bq_u32): Ditto.
3228         (vsm3partw1q_u32): Ditto.
3229         (vsm3partw2q_u32): Ditto.
3230         (vsm4eq_u32): Ditto.
3231         (vsm4ekeyq_u32): Ditto.
3232         (doc/invoke.texi): Document new sm4 option.
3233
3234 2018-01-10  Michael Collison  <michael.collison@arm.com>
3235
3236         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
3237         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
3238         (AARCH64_FL_FOR_ARCH8_4): New.
3239         (AARCH64_FL_V8_4): New flag.
3240         (doc/invoke.texi): Document new armv8.4-a option.
3241
3242 2018-01-10  Michael Collison  <michael.collison@arm.com>
3243
3244         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3245         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
3246         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
3247         * config/aarch64/aarch64-option-extension.def: Add
3248         AARCH64_OPT_EXTENSION of 'sha2'.
3249         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
3250         (crypto): Disable sha2 and aes if crypto disabled.
3251         (crypto): Enable aes and sha2 if enabled.
3252         (simd): Disable sha2 and aes if simd disabled.
3253         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
3254         New flags.
3255         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
3256         (TARGET_SHA2): New feature flag for sha2.
3257         (TARGET_AES): New feature flag for aes.
3258         * config/aarch64/aarch64-simd.md:
3259         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
3260         conditional on TARGET_AES.
3261         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
3262         (aarch64_crypto_sha1hsi): Make pattern conditional
3263         on TARGET_SHA2.
3264         (aarch64_crypto_sha1hv4si): Ditto.
3265         (aarch64_be_crypto_sha1hv4si): Ditto.
3266         (aarch64_crypto_sha1su1v4si): Ditto.
3267         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
3268         (aarch64_crypto_sha1su0v4si): Ditto.
3269         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
3270         (aarch64_crypto_sha256su0v4si): Ditto.
3271         (aarch64_crypto_sha256su1v4si): Ditto.
3272         (doc/invoke.texi): Document new aes and sha2 options.
3273
3274 2018-01-10  Martin Sebor  <msebor@redhat.com>
3275
3276         PR tree-optimization/83781
3277         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
3278         as string arrays.
3279
3280 2018-01-11  Martin Sebor  <msebor@gmail.com>
3281             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3282
3283         PR tree-optimization/83501
3284         PR tree-optimization/81703
3285
3286         * tree-ssa-strlen.c (get_string_cst): Rename...
3287         (get_string_len): ...to this.  Handle global constants.
3288         (handle_char_store): Adjust.
3289
3290 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
3291             Jim Wilson  <jimw@sifive.com>
3292
3293         * config/riscv/riscv-protos.h (riscv_output_return): New.
3294         * config/riscv/riscv.c (struct machine_function): New naked_p field.
3295         (riscv_attribute_table, riscv_output_return),
3296         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
3297         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
3298         (riscv_compute_frame_info): Only compute frame->mask if not a naked
3299         function.
3300         (riscv_expand_prologue): Add early return for naked function.
3301         (riscv_expand_epilogue): Likewise.
3302         (riscv_function_ok_for_sibcall): Return false for naked function.
3303         (riscv_set_current_function): New.
3304         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
3305         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
3306         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
3307         * doc/extend.texi (RISC-V Function Attributes): New.
3308
3309 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
3310
3311         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
3312         check for 128-bit long double before checking TCmode.
3313         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
3314         128-bit long doubles before checking TFmode or TCmode.
3315         (FLOAT128_IBM_P): Likewise.
3316
3317 2018-01-10  Martin Sebor  <msebor@redhat.com>
3318
3319         PR tree-optimization/83671
3320         * builtins.c (c_strlen): Unconditionally return zero for the empty
3321         string.
3322         Use -Warray-bounds for warnings.
3323         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
3324         for non-constant array indices with COMPONENT_REF, arrays of
3325         arrays, and pointers to arrays.
3326         (gimple_fold_builtin_strlen): Determine and set length range for
3327         non-constant character arrays.
3328
3329 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
3330
3331         PR middle-end/81897
3332         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
3333         empty blocks.
3334
3335 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
3336
3337         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
3338
3339 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3340
3341         PR target/83399
3342         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
3343         VECTOR_MEM_ALTIVEC_OR_VSX_P.
3344         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
3345         indexed_or_indirect_operand predicate.
3346         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
3347         (*vsx_le_perm_load_v8hi): Likewise.
3348         (*vsx_le_perm_load_v16qi): Likewise.
3349         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
3350         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
3351         (*vsx_le_perm_store_v8hi): Likewise.
3352         (*vsx_le_perm_store_v16qi): Likewise.
3353         (eight unnamed splitters): Likewise.
3354
3355 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3356
3357         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
3358         * config/rs6000/emmintrin.h: Likewise.
3359         * config/rs6000/mmintrin.h: Likewise.
3360         * config/rs6000/xmmintrin.h: Likewise.
3361
3362 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
3363
3364         PR c++/43486
3365         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
3366         "public_flag".
3367         * tree.c (tree_nop_conversion): Return true for location wrapper
3368         nodes.
3369         (maybe_wrap_with_location): New function.
3370         (selftest::check_strip_nops): New function.
3371         (selftest::test_location_wrappers): New function.
3372         (selftest::tree_c_tests): Call it.
3373         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
3374         (maybe_wrap_with_location): New decl.
3375         (EXPR_LOCATION_WRAPPER_P): New macro.
3376         (location_wrapper_p): New inline function.
3377         (tree_strip_any_location_wrapper): New inline function.
3378
3379 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
3380
3381         PR target/83735
3382         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
3383         stack_realign_offset for the largest alignment of stack slot
3384         actually used.
3385         (ix86_find_max_used_stack_alignment): New function.
3386         (ix86_finalize_stack_frame_flags): Use it.  Set
3387         max_used_stack_alignment if we don't realign stack.
3388         * config/i386/i386.h (machine_function): Add
3389         max_used_stack_alignment.
3390
3391 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
3392
3393         * config/arm/arm.opt (-mbranch-cost): New option.
3394         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
3395         account.
3396
3397 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
3398
3399         PR target/83629
3400         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
3401         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
3402
3403 2018-01-10  Richard Biener  <rguenther@suse.de>
3404
3405         PR debug/83765
3406         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
3407         early out so it also covers the case where we have a non-NULL
3408         origin.
3409
3410 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
3411
3412         PR tree-optimization/83753
3413         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
3414         for non-strided grouped accesses if the number of elements is 1.
3415
3416 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3417
3418         PR target/81616
3419         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
3420         * i386.h (TARGET_USE_GATHER): Define.
3421         * x86-tune.def (X86_TUNE_USE_GATHER): New.
3422
3423 2018-01-10  Martin Liska  <mliska@suse.cz>
3424
3425         PR bootstrap/82831
3426         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
3427         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
3428         partitioning.
3429         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
3430         CLEANUP_NO_PARTITIONING is not set.
3431
3432 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
3433
3434         * doc/rtl.texi: Remove documentation of (const ...) wrappers
3435         for vectors, as a partial revert of r254296.
3436         * rtl.h (const_vec_p): Delete.
3437         (const_vec_duplicate_p): Don't test for vector CONSTs.
3438         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
3439         * expmed.c (make_tree): Likewise.
3440
3441         Revert:
3442         * common.md (E, F): Use CONSTANT_P instead of checking for
3443         CONST_VECTOR.
3444         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
3445         checking for CONST_VECTOR.
3446
3447 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3448
3449         PR middle-end/83575
3450         * predict.c (force_edge_cold): Handle in more sane way edges
3451         with no prediction.
3452
3453 2018-01-09  Carl Love  <cel@us.ibm.com>
3454
3455         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
3456         V4SI, V4SF types.
3457         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
3458         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
3459         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
3460         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
3461         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
3462         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
3463         * config/rs6000/rs6000-protos.h: Add extern defition for
3464         rs6000_generate_float2_double_code.
3465         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
3466         function.
3467         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
3468         (float2_v2df): Add define_expand.
3469
3470 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
3471
3472         PR target/83628
3473         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
3474         op_mode in the force_to_mode call.
3475
3476 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3477
3478         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
3479         instead of checking each element individually.
3480         (aarch64_evpc_uzp): Likewise.
3481         (aarch64_evpc_zip): Likewise.
3482         (aarch64_evpc_ext): Likewise.
3483         (aarch64_evpc_rev): Likewise.
3484         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
3485         instead of checking each element individually.  Return true without
3486         generating rtl if
3487         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
3488         whether all selected elements come from the same input, instead of
3489         checking each element individually.  Remove calls to gen_rtx_REG,
3490         start_sequence and end_sequence and instead assert that no rtl is
3491         generated.
3492
3493 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3494
3495         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
3496         order of HIGH and CONST checks.
3497
3498 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3499
3500         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
3501         if the destination isn't an SSA_NAME.
3502
3503 2018-01-09  Richard Biener  <rguenther@suse.de>
3504
3505         PR tree-optimization/83668
3506         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
3507         move prologue...
3508         (canonicalize_loop_form): ... here, renamed from ...
3509         (canonicalize_loop_closed_ssa_form): ... this and amended to
3510         swap successor edges for loop exit blocks to make us use
3511         the RPO order we need for initial schedule generation.
3512
3513 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
3514
3515         PR tree-optimization/64811
3516         * match.pd: When optimizing comparisons with Inf, avoid
3517         introducing or losing exceptions from comparisons with NaN.
3518
3519 2018-01-09  Martin Liska  <mliska@suse.cz>
3520
3521         PR sanitizer/82517
3522         * asan.c (shadow_mem_size): Add gcc_assert.
3523
3524 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
3525
3526         Don't save registers in main().
3527
3528         PR target/83738
3529         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
3530         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
3531         * config/avr/avr.c (avr_set_current_function): Don't error if
3532         naked, OS_task or OS_main are specified at the same time.
3533         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
3534         OS_main.
3535         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
3536         attribute.
3537         * common/config/avr/avr-common.c (avr_option_optimization_table):
3538         Switch on -mmain-is-OS_task for optimizing compilations.
3539
3540 2018-01-09  Richard Biener  <rguenther@suse.de>
3541
3542         PR tree-optimization/83572
3543         * graphite.c: Include cfganal.h.
3544         (graphite_transform_loops): Connect infinite loops to exit
3545         and remove fake edges at the end.
3546
3547 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3548
3549         * ipa-inline.c (edge_badness): Revert accidental checkin.
3550
3551 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3552
3553         PR ipa/80763
3554         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
3555         symbols; not inline clones.
3556
3557 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
3558
3559         PR target/83507
3560         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
3561         hard registers.  Formatting fixes.
3562
3563         PR preprocessor/83722
3564         * gcc.c (try_generate_repro): Pass
3565         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
3566         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
3567         do_report_bug.
3568
3569 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
3570             Kito Cheng  <kito.cheng@gmail.com>
3571
3572         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
3573         (riscv_leaf_function_p): Delete.
3574         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
3575
3576 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3577
3578         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
3579         function.
3580         (do_ifelse): New function.
3581         (do_isel): New function.
3582         (do_sub3): New function.
3583         (do_add3): New function.
3584         (do_load_mask_compare): New function.
3585         (do_overlap_load_compare): New function.
3586         (expand_compare_loop): New function.
3587         (expand_block_compare): Call expand_compare_loop() when appropriate.
3588         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
3589         option description.
3590         (-mblock-compare-inline-loop-limit): New option.
3591
3592 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3593
3594         PR target/83677
3595         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
3596         Reverse order of second and third operands in first alternative.
3597         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
3598         of first and second elements in UNSPEC_VPERMR vector.
3599         (altivec_expand_vec_perm_le): Likewise.
3600
3601 2017-01-08  Jeff Law  <law@redhat.com>
3602
3603         PR rtl-optimizatin/81308
3604         * tree-switch-conversion.c (cfg_altered): New file scoped static.
3605         (process_switch): If group_case_labels makes a change, then set
3606         cfg_altered.
3607         (pass_convert_switch::execute): If a switch is converted, then
3608         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
3609
3610         PR rtl-optimization/81308
3611         * recog.c (split_all_insns): Conditionally cleanup the CFG after
3612         splitting insns.
3613
3614 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
3615
3616         PR target/83663 - Revert r255946
3617         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
3618         generation for cases where splatting a value is not useful.
3619         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
3620         across a vec_duplicate and a paradoxical subreg forming a vector
3621         mode to a vec_concat.
3622
3623 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3624
3625         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
3626         -march=armv8.3-a variants.
3627         * config/arm/t-multilib: Likewise.
3628         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
3629
3630 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3631
3632         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
3633         to generate rtl.
3634         (cceq_ior_compare_complement): Give it a name so I can use it, and
3635         change boolean_or_operator predicate to boolean_operator so it can
3636         be used to generate a crand.
3637         (eqne): New code iterator.
3638         (bd/bd_neg): New code_attrs.
3639         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
3640         a single define_insn.
3641         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
3642         decrement (bdnzt/bdnzf/bdzt/bdzf).
3643         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
3644         with the new names of the branch decrement patterns, and added the
3645         names of the branch decrement conditional patterns.
3646
3647 2018-01-08  Richard Biener  <rguenther@suse.de>
3648
3649         PR tree-optimization/83563
3650         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
3651         cache.
3652
3653 2018-01-08  Richard Biener  <rguenther@suse.de>
3654
3655         PR middle-end/83713
3656         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
3657
3658 2018-01-08  Richard Biener  <rguenther@suse.de>
3659
3660         PR tree-optimization/83685
3661         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
3662         references to abnormals.
3663
3664 2018-01-08  Richard Biener  <rguenther@suse.de>
3665
3666         PR lto/83719
3667         * dwarf2out.c (output_indirect_strings): Handle empty
3668         skeleton_debug_str_hash.
3669         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
3670
3671 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
3672
3673         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
3674         (emit_store_direct): Likewise.
3675         (arc_trampoline_adjust_address): Likewise.
3676         (arc_asm_trampoline_template): New function.
3677         (arc_initialize_trampoline): Use asm_trampoline_template.
3678         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
3679         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
3680         * config/arc/arc.md (flush_icache): Delete pattern.
3681
3682 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
3683
3684         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
3685         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
3686         munaligned-access.
3687
3688 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3689
3690         PR target/83681
3691         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
3692         by not USED_FOR_TARGET.
3693         (make_pass_resolve_sw_modes): Likewise.
3694
3695 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3696
3697         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
3698         USED_FOR_TARGET.
3699
3700 2018-01-08  Richard Biener  <rguenther@suse.de>
3701
3702         PR middle-end/83580
3703         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3704
3705 2018-01-08  Richard Biener  <rguenther@suse.de>
3706
3707         PR middle-end/83517
3708         * match.pd ((t * 2) / 2) -> t): Add missing :c.
3709
3710 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
3711
3712         PR middle-end/81897
3713         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3714         basic blocks with a small number of successors.
3715         (convert_control_dep_chain_into_preds): Improve handling of
3716         forwarder blocks.
3717         (dump_predicates): Split apart into...
3718         (dump_pred_chain): ...here...
3719         (dump_pred_info): ...and here.
3720         (can_one_predicate_be_invalidated_p): Add debugging printfs.
3721         (can_chain_union_be_invalidated_p): Improve check for invalidation
3722         of paths.
3723         (uninit_uses_cannot_happen): Avoid unnecessary if
3724         convert_control_dep_chain_into_preds yielded nothing.
3725
3726 2018-01-06  Martin Sebor  <msebor@redhat.com>
3727
3728         PR tree-optimization/83640
3729         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3730         subtracting negative offset from size.
3731         (builtin_access::overlap): Adjust offset bounds of the access to fall
3732         within the size of the object if possible.
3733
3734 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
3735
3736         PR rtl-optimization/83699
3737         * expmed.c (extract_bit_field_1): Restrict the vector usage of
3738         extract_bit_field_as_subreg to cases in which the extracted
3739         value is also a vector.
3740
3741         * lra-constraints.c (process_alt_operands): Test for the equivalence
3742         substitutions when detecting a possible reload cycle.
3743
3744 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
3745
3746         PR debug/83480
3747         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3748         by default if flag_selective_schedling{,2}.  Formatting fixes.
3749
3750         PR rtl-optimization/83682
3751         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3752         if it has non-VECTOR_MODE element mode.
3753         (vec_duplicate_p): Likewise.
3754
3755         PR middle-end/83694
3756         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3757         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3758
3759 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
3760
3761         PR target/83604
3762         * config/i386/i386-builtin.def
3763         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3764         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3765         Require also OPTION_MASK_ISA_AVX512F in addition to
3766         OPTION_MASK_ISA_GFNI.
3767         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3768         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3769         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3770         to OPTION_MASK_ISA_GFNI.
3771         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3772         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3773         OPTION_MASK_ISA_AVX512BW.
3774         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3775         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3776         addition to OPTION_MASK_ISA_GFNI.
3777         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3778         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3779         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3780         to OPTION_MASK_ISA_GFNI.
3781         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3782         a requirement for all ISAs rather than any of them with a few
3783         exceptions.
3784         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3785         processing.
3786         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3787         bitmasks to be enabled with 3 exceptions, instead of requiring any
3788         enabled ISA with lots of exceptions.
3789         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3790         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3791         Change avx512bw in isa attribute to avx512f.
3792         * config/i386/sgxintrin.h: Add license boilerplate.
3793         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
3794         to __AVX512F__ and __AVX512VL to __AVX512VL__.
3795         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3796         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3797         defined.
3798         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3799         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3800         temporarily sse2 rather than sse if not enabled already.
3801
3802         PR target/83604
3803         * config/i386/sse.md (VI248_VLBW): Rename to ...
3804         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
3805         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3806         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3807         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3808         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3809         mode iterator instead of VI248_VLBW.
3810
3811 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
3812
3813         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3814         (record_modified): Skip clobbers; add debug output.
3815         (param_change_prob): Use sreal frequencies.
3816
3817 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
3818
3819         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3820         punt for user-aligned variables.
3821
3822 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
3823
3824         * tree-chrec.c (chrec_contains_symbols): Return true for
3825         POLY_INT_CST.
3826
3827 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
3828
3829         PR target/82439
3830         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3831         of (x|y) == x for BICS pattern.
3832
3833 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
3834
3835         PR tree-optimization/83605
3836         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3837         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3838         can throw.
3839
3840 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3841
3842         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3843         * config/epiphany/rtems.h: New file.
3844
3845 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3846             Uros Bizjak  <ubizjak@gmail.com>
3847
3848         PR target/83554
3849         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3850         QIreg_operand instead of register_operand predicate.
3851         * config/i386/i386.c (ix86_rop_should_change_byte_p,
3852         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3853         comments instead of -fmitigate[-_]rop.
3854
3855 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
3856
3857         PR bootstrap/81926
3858         * cgraphunit.c (symbol_table::compile): Switch to text_section
3859         before calling assembly_start debug hook.
3860         * run-rtl-passes.c (run_rtl_passes): Likewise.
3861         Include output.h.
3862
3863 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3864
3865         * tree-vrp.c (extract_range_from_binary_expr_1): Check
3866         range_int_cst_p rather than !symbolic_range_p before calling
3867         extract_range_from_multiplicative_op_1.
3868
3869 2017-01-04  Jeff Law  <law@redhat.com>
3870
3871         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3872         redundant test in assertion.
3873
3874 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3875
3876         * doc/rtl.texi: Document machine_mode wrapper classes.
3877
3878 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3879
3880         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3881         using tree_to_uhwi.
3882
3883 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3884
3885         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3886         the VEC_PERM_EXPR fold to fail.
3887
3888 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3889
3890         PR debug/83585
3891         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3892         to switched_sections.
3893
3894 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3895
3896         PR target/83680
3897         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3898         test for d.testing.
3899
3900 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
3901
3902         PR target/83387
3903         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3904         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3905
3906 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3907
3908         PR debug/83666
3909         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3910         is BLKmode and bitpos not zero or mode change is needed.
3911
3912 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3913
3914         PR target/83675
3915         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3916         TARGET_VIS2.
3917
3918 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
3919
3920         PR target/83628
3921         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3922         instead of MULT rtx.  Update all corresponding splitters.
3923         (*saddl_se): Ditto.
3924         (*ssub<modesuffix>): Ditto.
3925         (*ssubl_se): Ditto.
3926         (*cmp_sadd_di): Update split patterns.
3927         (*cmp_sadd_si): Ditto.
3928         (*cmp_sadd_sidi): Ditto.
3929         (*cmp_ssub_di): Ditto.
3930         (*cmp_ssub_si): Ditto.
3931         (*cmp_ssub_sidi): Ditto.
3932         * config/alpha/predicates.md (const23_operand): New predicate.
3933         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3934         Look for ASHIFT, not MULT inner operand.
3935         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3936
3937 2018-01-04  Martin Liska  <mliska@suse.cz>
3938
3939         PR gcov-profile/83669
3940         * gcov.c (output_intermediate_file): Add version to intermediate
3941         gcov file.
3942         * doc/gcov.texi: Document new field 'version' in intermediate
3943         file format. Fix location of '-k' option of gcov command.
3944
3945 2018-01-04  Martin Liska  <mliska@suse.cz>
3946
3947         PR ipa/82352
3948         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3949
3950 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3951
3952         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3953
3954 2018-01-03  Martin Sebor  <msebor@redhat.com>
3955
3956         PR tree-optimization/83655
3957         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3958         checking calls with invalid arguments.
3959
3960 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3961
3962         * tree-vect-stmts.c (vect_get_store_rhs): New function.
3963         (vectorizable_mask_load_store): Delete.
3964         (vectorizable_call): Return false for masked loads and stores.
3965         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
3966         instead of gimple_assign_rhs1.
3967         (vectorizable_load): Handle IFN_MASK_LOAD.
3968         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3969
3970 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3971
3972         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3973         split out from..,
3974         (vectorizable_mask_load_store): ...here.
3975         (vectorizable_load): ...and here.
3976
3977 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3978
3979         * tree-vect-stmts.c (vect_build_all_ones_mask)
3980         (vect_build_zero_merge_argument): New functions, split out from...
3981         (vectorizable_load): ...here.
3982
3983 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3984
3985         * tree-vect-stmts.c (vect_check_store_rhs): New function,
3986         split out from...
3987         (vectorizable_mask_load_store): ...here.
3988         (vectorizable_store): ...and here.
3989
3990 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3991
3992         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3993         split out from...
3994         (vectorizable_mask_load_store): ...here.
3995
3996 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3997
3998         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3999         (vect_model_store_cost): Take a vec_load_store_type instead of a
4000         vect_def_type.
4001         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
4002         (vect_model_store_cost): Take a vec_load_store_type instead of a
4003         vect_def_type.
4004         (vectorizable_mask_load_store): Update accordingly.
4005         (vectorizable_store): Likewise.
4006         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
4007
4008 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4009
4010         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
4011         IFN_MASK_LOAD calls here rather than...
4012         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
4013
4014 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4015             Alan Hayward  <alan.hayward@arm.com>
4016             David Sherwood  <david.sherwood@arm.com>
4017
4018         * expmed.c (extract_bit_field_1): For vector extracts,
4019         fall back to extract_bit_field_as_subreg if vec_extract
4020         isn't available.
4021
4022 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4023             Alan Hayward  <alan.hayward@arm.com>
4024             David Sherwood  <david.sherwood@arm.com>
4025
4026         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
4027         they are variable or constant sized.
4028         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
4029         slots for constant-sized data.
4030
4031 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4032             Alan Hayward  <alan.hayward@arm.com>
4033             David Sherwood  <david.sherwood@arm.com>
4034
4035         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
4036         handling COND_EXPRs with boolean comparisons, try to find a better
4037         basis for the mask type than the boolean itself.
4038
4039 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4040
4041         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
4042         is calculated and how it can be overridden.
4043         * genmodes.c (max_bitsize_mode_any_mode): New variable.
4044         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
4045         if defined.
4046         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
4047         if nonzero.
4048
4049 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4050             Alan Hayward  <alan.hayward@arm.com>
4051             David Sherwood  <david.sherwood@arm.com>
4052
4053         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
4054         Remove the mode argument.
4055         (aarch64_simd_valid_immediate): Remove the mode and inverse
4056         arguments.
4057         * config/aarch64/iterators.md (bitsize): New iterator.
4058         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
4059         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
4060         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
4061         aarch64_simd_valid_immediate.
4062         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
4063         (aarch64_reg_or_bic_imm): Likewise.
4064         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
4065         with an insn_type enum and msl with a modifier_type enum.
4066         Replace element_width with a scalar_mode.  Change the shift
4067         to unsigned int.  Add constructors for scalar_float_mode and
4068         scalar_int_mode elements.
4069         (aarch64_vect_float_const_representable_p): Delete.
4070         (aarch64_can_const_movi_rtx_p)
4071         (aarch64_simd_scalar_immediate_valid_for_move)
4072         (aarch64_simd_make_constant): Update call to
4073         aarch64_simd_valid_immediate.
4074         (aarch64_advsimd_valid_immediate_hs): New function.
4075         (aarch64_advsimd_valid_immediate): Likewise.
4076         (aarch64_simd_valid_immediate): Remove mode and inverse
4077         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
4078         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
4079         and aarch64_float_const_representable_p on the result.
4080         (aarch64_output_simd_mov_immediate): Remove mode argument.
4081         Update call to aarch64_simd_valid_immediate and use of
4082         simd_immediate_info.
4083         (aarch64_output_scalar_simd_mov_immediate): Update call
4084         accordingly.
4085
4086 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4087             Alan Hayward  <alan.hayward@arm.com>
4088             David Sherwood  <david.sherwood@arm.com>
4089
4090         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
4091         (mode_nunits): Likewise CONST_MODE_NUNITS.
4092         * machmode.def (ADJUST_NUNITS): Document.
4093         * genmodes.c (mode_data::need_nunits_adj): New field.
4094         (blank_mode): Update accordingly.
4095         (adj_nunits): New variable.
4096         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
4097         parameter.
4098         (emit_mode_size_inline): Set need_bytesize_adj for all modes
4099         listed in adj_nunits.
4100         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
4101         listed in adj_nunits.  Don't emit case statements for such modes.
4102         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
4103         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
4104         nothing if adj_nunits is nonnull.
4105         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
4106         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
4107         (emit_mode_fbit): Update use of print_maybe_const_decl.
4108         (emit_move_size): Likewise.  Treat the array as non-const
4109         if adj_nunits.
4110         (emit_mode_adjustments): Handle adj_nunits.
4111
4112 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4113
4114         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
4115         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
4116         (VECTOR_MODES): Use it.
4117         (make_vector_modes): Take the prefix as an argument.
4118
4119 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4120             Alan Hayward  <alan.hayward@arm.com>
4121             David Sherwood  <david.sherwood@arm.com>
4122
4123         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
4124         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
4125         for MODE_VECTOR_BOOL.
4126         * machmode.def (VECTOR_BOOL_MODE): Document.
4127         * genmodes.c (VECTOR_BOOL_MODE): New macro.
4128         (make_vector_bool_mode): New function.
4129         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
4130         MODE_VECTOR_BOOL.
4131         * lto-streamer-in.c (lto_input_mode_table): Likewise.
4132         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
4133         Likewise.
4134         * stor-layout.c (int_mode_for_mode): Likewise.
4135         * tree.c (build_vector_type_for_mode): Likewise.
4136         * varasm.c (output_constant_pool_2): Likewise.
4137         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
4138         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
4139         for MODE_VECTOR_BOOL.
4140         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
4141         of mode class checks.
4142         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
4143         instead of a list of mode class checks.
4144         (expand_vector_scalar_condition): Likewise.
4145         (type_for_widest_vector_mode): Handle BImode as an inner mode.
4146
4147 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4148             Alan Hayward  <alan.hayward@arm.com>
4149             David Sherwood  <david.sherwood@arm.com>
4150
4151         * machmode.h (mode_size): Change from unsigned short to
4152         poly_uint16_pod.
4153         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
4154         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4155         or if measurement_type is not polynomial.
4156         (fixed_size_mode::includes_p): Check for constant-sized modes.
4157         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
4158         return a poly_uint16 rather than an unsigned short.
4159         (emit_mode_size): Change the type of mode_size from unsigned short
4160         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
4161         (emit_mode_adjustments): Cope with polynomial vector sizes.
4162         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4163         for GET_MODE_SIZE.
4164         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4165         for GET_MODE_SIZE.
4166         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
4167         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
4168         * caller-save.c (setup_save_areas): Likewise.
4169         (replace_reg_with_saved_mem): Likewise.
4170         * calls.c (emit_library_call_value_1): Likewise.
4171         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
4172         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
4173         (gen_lowpart_for_combine): Likewise.
4174         * convert.c (convert_to_integer_1): Likewise.
4175         * cse.c (equiv_constant, cse_insn): Likewise.
4176         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
4177         (cselib_subst_to_values): Likewise.
4178         * dce.c (word_dce_process_block): Likewise.
4179         * df-problems.c (df_word_lr_mark_ref): Likewise.
4180         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
4181         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
4182         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
4183         (rtl_for_decl_location): Likewise.
4184         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
4185         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
4186         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
4187         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
4188         (expand_expr_real_1): Likewise.
4189         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
4190         (pad_below): Likewise.
4191         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4192         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
4193         * ira.c (get_subreg_tracking_sizes): Likewise.
4194         * ira-build.c (ira_create_allocno_objects): Likewise.
4195         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
4196         (ira_sort_regnos_for_alter_reg): Likewise.
4197         * ira-costs.c (record_operand_costs): Likewise.
4198         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
4199         (resolve_simple_move): Likewise.
4200         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
4201         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
4202         (lra_constraints): Likewise.
4203         (CONST_POOL_OK_P): Reject variable-sized modes.
4204         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
4205         (add_pseudo_to_slot, lra_spill): Likewise.
4206         * omp-low.c (omp_clause_aligned_alignment): Likewise.
4207         * optabs-query.c (get_best_extraction_insn): Likewise.
4208         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4209         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
4210         (expand_mult_highpart, valid_multiword_target_p): Likewise.
4211         * recog.c (offsettable_address_addr_space_p): Likewise.
4212         * regcprop.c (maybe_mode_change): Likewise.
4213         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
4214         * regrename.c (build_def_use): Likewise.
4215         * regstat.c (dump_reg_info): Likewise.
4216         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
4217         (find_reloads, find_reloads_subreg_address): Likewise.
4218         * reload1.c (eliminate_regs_1): Likewise.
4219         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
4220         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
4221         (simplify_binary_operation_1, simplify_subreg): Likewise.
4222         * targhooks.c (default_function_arg_padding): Likewise.
4223         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
4224         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
4225         (verify_gimple_assign_ternary): Likewise.
4226         * tree-inline.c (estimate_move_cost): Likewise.
4227         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4228         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
4229         (get_address_cost_ainc): Likewise.
4230         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
4231         (vect_supportable_dr_alignment): Likewise.
4232         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4233         (vectorizable_reduction): Likewise.
4234         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
4235         (vectorizable_operation, vectorizable_load): Likewise.
4236         * tree.c (build_same_sized_truth_vector_type): Likewise.
4237         * valtrack.c (cleanup_auto_inc_dec): Likewise.
4238         * var-tracking.c (emit_note_insn_var_location): Likewise.
4239         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
4240         (ADDR_VEC_ALIGN): Likewise.
4241
4242 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4243             Alan Hayward  <alan.hayward@arm.com>
4244             David Sherwood  <david.sherwood@arm.com>
4245
4246         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
4247         unsigned short.
4248         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4249         or if measurement_type is polynomial.
4250         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
4251         * combine.c (make_extraction): Likewise.
4252         * dse.c (find_shift_sequence): Likewise.
4253         * dwarf2out.c (mem_loc_descriptor): Likewise.
4254         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
4255         (extract_bit_field, extract_low_bits): Likewise.
4256         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
4257         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
4258         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
4259         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
4260         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4261         * reload.c (find_reloads): Likewise.
4262         * reload1.c (alter_reg): Likewise.
4263         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
4264         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
4265         * tree-if-conv.c (predicate_mem_writes): Likewise.
4266         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
4267         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
4268         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
4269         * valtrack.c (dead_debug_insert_temp): Likewise.
4270         * varasm.c (mergeable_constant_section): Likewise.
4271         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
4272
4273 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4274             Alan Hayward  <alan.hayward@arm.com>
4275             David Sherwood  <david.sherwood@arm.com>
4276
4277         * expr.c (expand_assignment): Cope with polynomial mode sizes
4278         when assigning to a CONCAT.
4279
4280 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4281             Alan Hayward  <alan.hayward@arm.com>
4282             David Sherwood  <david.sherwood@arm.com>
4283
4284         * machmode.h (mode_precision): Change from unsigned short to
4285         poly_uint16_pod.
4286         (mode_to_precision): Return a poly_uint16 rather than an unsigned
4287         short.
4288         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
4289         or if measurement_type is not polynomial.
4290         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
4291         in which the mode is already known to be a scalar_int_mode.
4292         * genmodes.c (emit_mode_precision): Change the type of mode_precision
4293         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
4294         initializer.
4295         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4296         for GET_MODE_PRECISION.
4297         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4298         for GET_MODE_PRECISION.
4299         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
4300         as polynomial.
4301         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
4302         (expand_field_assignment, make_extraction): Likewise.
4303         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
4304         (get_last_value): Likewise.
4305         * convert.c (convert_to_integer_1): Likewise.
4306         * cse.c (cse_insn): Likewise.
4307         * expr.c (expand_expr_real_1): Likewise.
4308         * lra-constraints.c (simplify_operand_subreg): Likewise.
4309         * optabs-query.c (can_atomic_load_p): Likewise.
4310         * optabs.c (expand_atomic_load): Likewise.
4311         (expand_atomic_store): Likewise.
4312         * ree.c (combine_reaching_defs): Likewise.
4313         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
4314         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
4315         * tree.h (type_has_mode_precision_p): Likewise.
4316         * ubsan.c (instrument_si_overflow): Likewise.
4317
4318 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4319             Alan Hayward  <alan.hayward@arm.com>
4320             David Sherwood  <david.sherwood@arm.com>
4321
4322         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
4323         polynomial numbers of units.
4324         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
4325         (valid_vector_subparts_p): New function.
4326         (build_vector_type): Remove temporary shim and take the number
4327         of units as a poly_uint64 rather than an int.
4328         (build_opaque_vector_type): Take the number of units as a
4329         poly_uint64 rather than an int.
4330         * tree.c (build_vector_from_ctor): Handle polynomial
4331         TYPE_VECTOR_SUBPARTS.
4332         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
4333         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
4334         (build_vector_from_val): If the number of units is variable,
4335         use build_vec_duplicate_cst for constant operands and
4336         VEC_DUPLICATE_EXPR otherwise.
4337         (make_vector_type): Remove temporary is_constant ().
4338         (build_vector_type, build_opaque_vector_type): Take the number of
4339         units as a poly_uint64 rather than an int.
4340         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
4341         VECTOR_CST_NELTS.
4342         * cfgexpand.c (expand_debug_expr): Likewise.
4343         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
4344         (store_constructor, expand_expr_real_1): Likewise.
4345         (const_scalar_mask_from_tree): Likewise.
4346         * fold-const-call.c (fold_const_reduction): Likewise.
4347         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
4348         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
4349         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
4350         (fold_relational_const): Likewise.
4351         (native_interpret_vector): Likewise.  Change the size from an
4352         int to an unsigned int.
4353         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
4354         TYPE_VECTOR_SUBPARTS.
4355         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
4356         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
4357         duplicating a non-constant operand into a variable-length vector.
4358         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
4359         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
4360         * ipa-icf.c (sem_variable::equals): Likewise.
4361         * match.pd: Likewise.
4362         * omp-simd-clone.c (simd_clone_subparts): Likewise.
4363         * print-tree.c (print_node): Likewise.
4364         * stor-layout.c (layout_type): Likewise.
4365         * targhooks.c (default_builtin_vectorization_cost): Likewise.
4366         * tree-cfg.c (verify_gimple_comparison): Likewise.
4367         (verify_gimple_assign_binary): Likewise.
4368         (verify_gimple_assign_ternary): Likewise.
4369         (verify_gimple_assign_single): Likewise.
4370         * tree-pretty-print.c (dump_generic_node): Likewise.
4371         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4372         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
4373         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
4374         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
4375         (vect_shift_permute_load_chain): Likewise.
4376         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
4377         (expand_vector_condition, optimize_vector_constructor): Likewise.
4378         (lower_vec_perm, get_compute_type): Likewise.
4379         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4380         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
4381         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
4382         (vect_recog_mask_conversion_pattern): Likewise.
4383         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
4384         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
4385         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4386         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
4387         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
4388         (vectorizable_shift, vectorizable_operation, vectorizable_store)
4389         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
4390         (supportable_widening_operation): Likewise.
4391         (supportable_narrowing_operation): Likewise.
4392         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
4393         Likewise.
4394         * varasm.c (output_constant): Likewise.
4395
4396 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4397             Alan Hayward  <alan.hayward@arm.com>
4398             David Sherwood  <david.sherwood@arm.com>
4399
4400         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
4401         so that both the length == 3 and length != 3 cases set up their
4402         own permute vectors.  Add comments explaining why we know the
4403         number of elements is constant.
4404         (vect_permute_load_chain): Likewise.
4405
4406 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4407             Alan Hayward  <alan.hayward@arm.com>
4408             David Sherwood  <david.sherwood@arm.com>
4409
4410         * machmode.h (mode_nunits): Change from unsigned char to
4411         poly_uint16_pod.
4412         (ONLY_FIXED_SIZE_MODES): New macro.
4413         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
4414         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
4415         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
4416         New typedefs.
4417         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
4418         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
4419         or if measurement_type is not polynomial.
4420         * genmodes.c (ZERO_COEFFS): New macro.
4421         (emit_mode_nunits_inline): Make mode_nunits_inline return a
4422         poly_uint16.
4423         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
4424         Use ZERO_COEFFS when emitting initializers.
4425         * data-streamer.h (bp_pack_poly_value): New function.
4426         (bp_unpack_poly_value): Likewise.
4427         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4428         for GET_MODE_NUNITS.
4429         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4430         for GET_MODE_NUNITS.
4431         * tree.c (make_vector_type): Remove temporary shim and make
4432         the real function take the number of units as a poly_uint64
4433         rather than an int.
4434         (build_vector_type_for_mode): Handle polynomial nunits.
4435         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
4436         * emit-rtl.c (const_vec_series_p_1): Likewise.
4437         (gen_rtx_CONST_VECTOR): Likewise.
4438         * fold-const.c (test_vec_duplicate_folding): Likewise.
4439         * genrecog.c (validate_pattern): Likewise.
4440         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
4441         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4442         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
4443         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
4444         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
4445         * rtlanal.c (subreg_get_info): Likewise.
4446         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4447         (vect_grouped_load_supported): Likewise.
4448         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
4449         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
4450         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
4451         (simplify_const_unary_operation, simplify_binary_operation_1)
4452         (simplify_const_binary_operation, simplify_ternary_operation)
4453         (test_vector_ops_duplicate, test_vector_ops): Likewise.
4454         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
4455         instead of CONST_VECTOR_NUNITS.
4456         * varasm.c (output_constant_pool_2): Likewise.
4457         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
4458         explicit-encoded elements in the XVEC for variable-length vectors.
4459
4460 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4461
4462         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
4463
4464 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4465             Alan Hayward  <alan.hayward@arm.com>
4466             David Sherwood  <david.sherwood@arm.com>
4467
4468         * coretypes.h (fixed_size_mode): Declare.
4469         (fixed_size_mode_pod): New typedef.
4470         * builtins.h (target_builtins::x_apply_args_mode)
4471         (target_builtins::x_apply_result_mode): Change type to
4472         fixed_size_mode_pod.
4473         * builtins.c (apply_args_size, apply_result_size, result_vector)
4474         (expand_builtin_apply_args_1, expand_builtin_apply)
4475         (expand_builtin_return): Update accordingly.
4476
4477 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4478
4479         * cse.c (hash_rtx_cb): Hash only the encoded elements.
4480         * cselib.c (cselib_hash_rtx): Likewise.
4481         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
4482         CONST_VECTOR encoding.
4483
4484 2017-01-03  Jakub Jelinek  <jakub@redhat.com>
4485             Jeff Law  <law@redhat.com>
4486
4487         PR target/83641
4488         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
4489         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
4490         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
4491         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
4492
4493         PR target/83641
4494         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
4495         explicitly probe *sp in a noreturn function if there were any callee
4496         register saves or frame pointer is needed.
4497
4498 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4499
4500         PR debug/83621
4501         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
4502         BLKmode for ternary, binary or unary expressions.
4503
4504         PR debug/83645
4505         * var-tracking.c (delete_vta_debug_insn): New inline function.
4506         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
4507         insns from get_insns () to NULL instead of each bb separately.
4508         Use delete_vta_debug_insn.  No longer static.
4509         (vt_debug_insns_local, variable_tracking_main_1): Adjust
4510         delete_vta_debug_insns callers.
4511         * rtl.h (delete_vta_debug_insns): Declare.
4512         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
4513         instead of variable_tracking_main.
4514
4515 2018-01-03  Martin Sebor  <msebor@redhat.com>
4516
4517         PR tree-optimization/83603
4518         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
4519         arguments past the endof the argument list in functions declared
4520         without a prototype.
4521         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
4522         Avoid checking when arguments are null.
4523
4524 2018-01-03  Martin Sebor  <msebor@redhat.com>
4525
4526         PR c/83559
4527         * doc/extend.texi (attribute const): Fix a typo.
4528         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
4529         issuing -Wsuggest-attribute for void functions.
4530
4531 2018-01-03  Martin Sebor  <msebor@redhat.com>
4532
4533         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
4534         offset_int::from instead of wide_int::to_shwi.
4535         (maybe_diag_overlap): Remove assertion.
4536         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
4537         * gimple-ssa-sprintf.c (format_directive): Same.
4538         (parse_directive): Same.
4539         (sprintf_dom_walker::compute_format_length): Same.
4540         (try_substitute_return_value): Same.
4541
4542 2017-01-03  Jeff Law  <law@redhat.com>
4543
4544         PR middle-end/83654
4545         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
4546         non-constant residual for zero at runtime and avoid probing in
4547         that case.  Reorganize code for trailing problem to mirror handling
4548         of the residual.
4549
4550 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
4551
4552         PR tree-optimization/83501
4553         * tree-ssa-strlen.c (get_string_cst): New.
4554         (handle_char_store): Call get_string_cst.
4555
4556 2018-01-03  Martin Liska  <mliska@suse.cz>
4557
4558         PR tree-optimization/83593
4559         * tree-ssa-strlen.c: Include tree-cfg.h.
4560         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
4561         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
4562         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
4563         to false.
4564         (strlen_dom_walker::before_dom_children): Call
4565         gimple_purge_dead_eh_edges. Dump tranformation with details
4566         dump flags.
4567         (strlen_dom_walker::before_dom_children): Update call by adding
4568         new argument cleanup_eh.
4569         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
4570
4571 2018-01-03  Martin Liska  <mliska@suse.cz>
4572
4573         PR ipa/83549
4574         * cif-code.def (VARIADIC_THUNK): New enum value.
4575         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
4576         thunks.
4577
4578 2018-01-03  Jan Beulich  <jbeulich@suse.com>
4579
4580         * sse.md (mov<mode>_internal): Tighten condition for when to use
4581         vmovdqu<ssescalarsize> for TI and OI modes.
4582
4583 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4584
4585         Update copyright years.
4586
4587 2018-01-03  Martin Liska  <mliska@suse.cz>
4588
4589         PR ipa/83594
4590         * ipa-visibility.c (function_and_variable_visibility): Skip
4591         functions with noipa attribure.
4592
4593 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4594
4595         * gcc.c (process_command): Update copyright notice dates.
4596         * gcov-dump.c (print_version): Ditto.
4597         * gcov.c (print_version): Ditto.
4598         * gcov-tool.c (print_version): Ditto.
4599         * gengtype.c (create_file): Ditto.
4600         * doc/cpp.texi: Bump @copying's copyright year.
4601         * doc/cppinternals.texi: Ditto.
4602         * doc/gcc.texi: Ditto.
4603         * doc/gccint.texi: Ditto.
4604         * doc/gcov.texi: Ditto.
4605         * doc/install.texi: Ditto.
4606         * doc/invoke.texi: Ditto.
4607
4608 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4609
4610         * vector-builder.h (vector_builder::m_full_nelts): Change from
4611         unsigned int to poly_uint64.
4612         (vector_builder::full_nelts): Update prototype accordingly.
4613         (vector_builder::new_vector): Likewise.
4614         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
4615         (vector_builder::operator ==): Likewise.
4616         (vector_builder::finalize): Likewise.
4617         * int-vector-builder.h (int_vector_builder::int_vector_builder):
4618         Take the number of elements as a poly_uint64 rather than an
4619         unsigned int.
4620         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
4621         from unsigned int to poly_uint64.
4622         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
4623         (vec_perm_indices::new_vector): Likewise.
4624         (vec_perm_indices::length): Likewise.
4625         (vec_perm_indices::nelts_per_input): Likewise.
4626         (vec_perm_indices::input_nelts): Likewise.
4627         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
4628         number of elements per input as a poly_uint64 rather than an
4629         unsigned int.  Use the original encoding for variable-length
4630         vectors, rather than clamping each individual element.
4631         For the second and subsequent elements in each pattern,
4632         clamp the step and base before clamping their sum.
4633         (vec_perm_indices::series_p): Handle polynomial element counts.
4634         (vec_perm_indices::all_in_range_p): Likewise.
4635         (vec_perm_indices_to_tree): Likewise.
4636         (vec_perm_indices_to_rtx): Likewise.
4637         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
4638         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
4639         (tree_vector_builder::new_binary_operation): Handle polynomial
4640         element counts.  Return false if we need to know the number
4641         of elements at compile time.
4642         * fold-const.c (fold_vec_perm): Punt if the number of elements
4643         isn't known at compile time.
4644
4645 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4646
4647         * vec-perm-indices.h (vec_perm_builder): Change element type
4648         from HOST_WIDE_INT to poly_int64.
4649         (vec_perm_indices::element_type): Update accordingly.
4650         (vec_perm_indices::clamp): Handle polynomial element_types.
4651         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4652         (vec_perm_indices::all_in_range_p): Likewise.
4653         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
4654         than shwi trees.
4655         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
4656         polynomial vec_perm_indices element types.
4657         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
4658         * fold-const.c (fold_vec_perm): Likewise.
4659         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
4660         * tree-vect-generic.c (lower_vec_perm): Likewise.
4661         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4662         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
4663         element type to HOST_WIDE_INT.
4664
4665 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4666             Alan Hayward  <alan.hayward@arm.com>
4667             David Sherwood  <david.sherwood@arm.com>
4668
4669         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
4670         rather than an int.  Use plus_constant.
4671         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
4672         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
4673
4674 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4675             Alan Hayward  <alan.hayward@arm.com>
4676             David Sherwood  <david.sherwood@arm.com>
4677
4678         * calls.c (emit_call_1, expand_call): Change struct_value_size from
4679         a HOST_WIDE_INT to a poly_int64.
4680
4681 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4682             Alan Hayward  <alan.hayward@arm.com>
4683             David Sherwood  <david.sherwood@arm.com>
4684
4685         * calls.c (load_register_parameters): Cope with polynomial
4686         mode sizes.  Require a constant size for BLKmode parameters
4687         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
4688         forces a parameter to be padded at the lsb end in order to
4689         fill a complete number of words, require the parameter size
4690         to be ordered wrt UNITS_PER_WORD.
4691
4692 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4693             Alan Hayward  <alan.hayward@arm.com>
4694             David Sherwood  <david.sherwood@arm.com>
4695
4696         * reload1.c (spill_stack_slot_width): Change element type
4697         from unsigned int to poly_uint64_pod.
4698         (alter_reg): Treat mode sizes as polynomial.
4699
4700 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4701             Alan Hayward  <alan.hayward@arm.com>
4702             David Sherwood  <david.sherwood@arm.com>
4703
4704         * reload.c (complex_word_subreg_p): New function.
4705         (reload_inner_reg_of_subreg, push_reload): Use it.
4706
4707 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4708             Alan Hayward  <alan.hayward@arm.com>
4709             David Sherwood  <david.sherwood@arm.com>
4710
4711         * lra-constraints.c (process_alt_operands): Reject matched
4712         operands whose sizes aren't ordered.
4713         (match_reload): Refer to this check here.
4714
4715 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4716             Alan Hayward  <alan.hayward@arm.com>
4717             David Sherwood  <david.sherwood@arm.com>
4718
4719         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4720         that the mode size is in the set {1, 2, 4, 8, 16}.
4721
4722 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4723             Alan Hayward  <alan.hayward@arm.com>
4724             David Sherwood  <david.sherwood@arm.com>
4725
4726         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4727         Use plus_constant instead of gen_rtx_PLUS.
4728
4729 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4730             Alan Hayward  <alan.hayward@arm.com>
4731             David Sherwood  <david.sherwood@arm.com>
4732
4733         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4734         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4735         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4736         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4737         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4738         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4739         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4740         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4741         * config/i386/i386.c (ix86_push_rounding): ...this new function.
4742         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4743         a poly_int64.
4744         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4745         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4746         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4747         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4748         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4749         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4750         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4751         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4752         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4753         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4754         function.
4755         * expr.c (emit_move_resolve_push): Treat the input and result
4756         of PUSH_ROUNDING as a poly_int64.
4757         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4758         (emit_push_insn): Likewise.
4759         * lra-eliminations.c (mark_not_eliminable): Likewise.
4760         * recog.c (push_operand): Likewise.
4761         * reload1.c (elimination_effects): Likewise.
4762         * rtlanal.c (nonzero_bits1): Likewise.
4763         * calls.c (store_one_arg): Likewise.  Require the padding to be
4764         known at compile time.
4765
4766 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4767             Alan Hayward  <alan.hayward@arm.com>
4768             David Sherwood  <david.sherwood@arm.com>
4769
4770         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4771         Use plus_constant instead of gen_rtx_PLUS.
4772
4773 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4774             Alan Hayward  <alan.hayward@arm.com>
4775             David Sherwood  <david.sherwood@arm.com>
4776
4777         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4778         rather than an int.
4779
4780 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4781             Alan Hayward  <alan.hayward@arm.com>
4782             David Sherwood  <david.sherwood@arm.com>
4783
4784         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4785         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4786         via stack temporaries.  Treat the mode size as polynomial too.
4787
4788 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4789             Alan Hayward  <alan.hayward@arm.com>
4790             David Sherwood  <david.sherwood@arm.com>
4791
4792         * expr.c (expand_expr_real_2): When handling conversions involving
4793         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4794         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
4795         as a poly_uint64 too.
4796
4797 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4798             Alan Hayward  <alan.hayward@arm.com>
4799             David Sherwood  <david.sherwood@arm.com>
4800
4801         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4802
4803 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4804             Alan Hayward  <alan.hayward@arm.com>
4805             David Sherwood  <david.sherwood@arm.com>
4806
4807         * combine.c (can_change_dest_mode): Handle polynomial
4808         REGMODE_NATURAL_SIZE.
4809         * expmed.c (store_bit_field_1): Likewise.
4810         * expr.c (store_constructor): Likewise.
4811         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4812         and polynomial REGMODE_NATURAL_SIZE.
4813         (gen_lowpart_common): Likewise.
4814         * reginfo.c (record_subregs_of_mode): Likewise.
4815         * rtlanal.c (read_modify_subreg_p): Likewise.
4816
4817 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4818             Alan Hayward  <alan.hayward@arm.com>
4819             David Sherwood  <david.sherwood@arm.com>
4820
4821         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4822         numbers of elements.
4823
4824 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4825             Alan Hayward  <alan.hayward@arm.com>
4826             David Sherwood  <david.sherwood@arm.com>
4827
4828         * match.pd: Cope with polynomial numbers of vector elements.
4829
4830 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4831             Alan Hayward  <alan.hayward@arm.com>
4832             David Sherwood  <david.sherwood@arm.com>
4833
4834         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4835         in a POINTER_PLUS_EXPR.
4836
4837 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4838             Alan Hayward  <alan.hayward@arm.com>
4839             David Sherwood  <david.sherwood@arm.com>
4840
4841         * omp-simd-clone.c (simd_clone_subparts): New function.
4842         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4843         (ipa_simd_modify_function_body): Likewise.
4844
4845 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4846             Alan Hayward  <alan.hayward@arm.com>
4847             David Sherwood  <david.sherwood@arm.com>
4848
4849         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4850         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4851         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4852         (expand_vector_condition, vector_element): Likewise.
4853         (subparts_gt): New function.
4854         (get_compute_type): Use subparts_gt.
4855         (count_type_subparts): Delete.
4856         (expand_vector_operations_1): Use subparts_gt instead of
4857         count_type_subparts.
4858
4859 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4860             Alan Hayward  <alan.hayward@arm.com>
4861             David Sherwood  <david.sherwood@arm.com>
4862
4863         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4864         (vect_compile_time_alias): ...this new function.  Do the calculation
4865         on poly_ints rather than trees.
4866         (vect_prune_runtime_alias_test_list): Update call accordingly.
4867
4868 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4869             Alan Hayward  <alan.hayward@arm.com>
4870             David Sherwood  <david.sherwood@arm.com>
4871
4872         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4873         numbers of units.
4874         (vect_schedule_slp_instance): Likewise.
4875
4876 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4877             Alan Hayward  <alan.hayward@arm.com>
4878             David Sherwood  <david.sherwood@arm.com>
4879
4880         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4881         constant and extern definitions for variable-length vectors.
4882         (vect_get_constant_vectors): Note that the number of units
4883         is known to be constant.
4884
4885 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4886             Alan Hayward  <alan.hayward@arm.com>
4887             David Sherwood  <david.sherwood@arm.com>
4888
4889         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4890         of units as polynomial.  Choose between WIDE and NARROW based
4891         on multiple_p.
4892
4893 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4894             Alan Hayward  <alan.hayward@arm.com>
4895             David Sherwood  <david.sherwood@arm.com>
4896
4897         * tree-vect-stmts.c (simd_clone_subparts): New function.
4898         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4899
4900 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4901             Alan Hayward  <alan.hayward@arm.com>
4902             David Sherwood  <david.sherwood@arm.com>
4903
4904         * tree-vect-stmts.c (vectorizable_call): Treat the number of
4905         vectors as polynomial.  Use build_index_vector for
4906         IFN_GOMP_SIMD_LANE.
4907
4908 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4909             Alan Hayward  <alan.hayward@arm.com>
4910             David Sherwood  <david.sherwood@arm.com>
4911
4912         * tree-vect-stmts.c (get_load_store_type): Treat the number of
4913         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4914         for variable-length vectors.
4915         (vectorizable_mask_load_store): Treat the number of units as
4916         polynomial, asserting that it is constant if the condition has
4917         already been enforced.
4918         (vectorizable_store, vectorizable_load): Likewise.
4919
4920 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4921             Alan Hayward  <alan.hayward@arm.com>
4922             David Sherwood  <david.sherwood@arm.com>
4923
4924         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4925         of units as polynomial.  Punt if we can't tell at compile time
4926         which vector contains the final result.
4927
4928 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4929             Alan Hayward  <alan.hayward@arm.com>
4930             David Sherwood  <david.sherwood@arm.com>
4931
4932         * tree-vect-loop.c (vectorizable_induction): Treat the number
4933         of units as polynomial.  Punt on SLP inductions.  Use an integer
4934         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
4935         cast of such a series for variable-length floating-point
4936         reductions.
4937
4938 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4939             Alan Hayward  <alan.hayward@arm.com>
4940             David Sherwood  <david.sherwood@arm.com>
4941
4942         * tree.h (build_index_vector): Declare.
4943         * tree.c (build_index_vector): New function.
4944         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4945         of units as polynomial, forcibly converting it to a constant if
4946         vectorizable_reduction has already enforced the condition.
4947         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
4948         to create a {1,2,3,...} vector.
4949         (vectorizable_reduction): Treat the number of units as polynomial.
4950         Choose vectype_in based on the largest scalar element size rather
4951         than the smallest number of units.  Enforce the restrictions
4952         relied on above.
4953
4954 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4955             Alan Hayward  <alan.hayward@arm.com>
4956             David Sherwood  <david.sherwood@arm.com>
4957
4958         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4959         number of units as polynomial.
4960
4961 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4962             Alan Hayward  <alan.hayward@arm.com>
4963             David Sherwood  <david.sherwood@arm.com>
4964
4965         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4966         * target.def (autovectorize_vector_sizes): Return the vector sizes
4967         by pointer, using vector_sizes rather than a bitmask.
4968         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4969         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4970         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4971         Likewise.
4972         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4973         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4974         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4975         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4976         * omp-general.c (omp_max_vf): Likewise.
4977         * omp-low.c (omp_clause_aligned_alignment): Likewise.
4978         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4979         * tree-vect-loop.c (vect_analyze_loop): Likewise.
4980         * tree-vect-slp.c (vect_slp_bb): Likewise.
4981         * doc/tm.texi: Regenerate.
4982         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4983         to a poly_uint64.
4984         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4985         the vector size as a poly_uint64 rather than an unsigned int.
4986         (current_vector_size): Change from an unsigned int to a poly_uint64.
4987         (get_vectype_for_scalar_type): Update accordingly.
4988         * tree.h (build_truth_vector_type): Take the size and number of
4989         units as a poly_uint64 rather than an unsigned int.
4990         (build_vector_type): Add a temporary overload that takes
4991         the number of units as a poly_uint64 rather than an unsigned int.
4992         * tree.c (make_vector_type): Likewise.
4993         (build_truth_vector_type): Take the number of units as a poly_uint64
4994         rather than an unsigned int.
4995
4996 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4997             Alan Hayward  <alan.hayward@arm.com>
4998             David Sherwood  <david.sherwood@arm.com>
4999
5000         * target.def (get_mask_mode): Take the number of units and length
5001         as poly_uint64s rather than unsigned ints.
5002         * targhooks.h (default_get_mask_mode): Update accordingly.
5003         * targhooks.c (default_get_mask_mode): Likewise.
5004         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
5005         * doc/tm.texi: Regenerate.
5006
5007 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5008             Alan Hayward  <alan.hayward@arm.com>
5009             David Sherwood  <david.sherwood@arm.com>
5010
5011         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
5012         * omp-general.c (omp_max_vf): Likewise.
5013         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
5014         (expand_omp_simd): Handle polynomial safelen.
5015         * omp-low.c (omplow_simd_context): Add a default constructor.
5016         (omplow_simd_context::max_vf): Change from int to poly_uint64.
5017         (lower_rec_simd_input_clauses): Update accordingly.
5018         (lower_rec_input_clauses): Likewise.
5019
5020 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5021             Alan Hayward  <alan.hayward@arm.com>
5022             David Sherwood  <david.sherwood@arm.com>
5023
5024         * tree-vectorizer.h (vect_nunits_for_cost): New function.
5025         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
5026         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
5027         (vect_analyze_slp_cost): Likewise.
5028         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
5029         (vect_model_load_cost): Likewise.
5030
5031 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5032             Alan Hayward  <alan.hayward@arm.com>
5033             David Sherwood  <david.sherwood@arm.com>
5034
5035         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
5036         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
5037         from an unsigned int * to a poly_uint64_pod *.
5038         (calculate_unrolling_factor): New function.
5039         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
5040
5041 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5042             Alan Hayward  <alan.hayward@arm.com>
5043             David Sherwood  <david.sherwood@arm.com>
5044
5045         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
5046         from an unsigned int to a poly_uint64.
5047         (_loop_vec_info::slp_unrolling_factor): Likewise.
5048         (_loop_vec_info::vectorization_factor): Change from an int
5049         to a poly_uint64.
5050         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
5051         (vect_get_num_vectors): New function.
5052         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
5053         (vect_get_num_copies): Use vect_get_num_vectors.
5054         (vect_analyze_data_ref_dependences): Change max_vf from an int *
5055         to an unsigned int *.
5056         (vect_analyze_data_refs): Change min_vf from an int * to a
5057         poly_uint64 *.
5058         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5059         than an unsigned HOST_WIDE_INT.
5060         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
5061         (vect_analyze_data_ref_dependence): Change max_vf from an int *
5062         to an unsigned int *.
5063         (vect_analyze_data_ref_dependences): Likewise.
5064         (vect_compute_data_ref_alignment): Handle polynomial vf.
5065         (vect_enhance_data_refs_alignment): Likewise.
5066         (vect_prune_runtime_alias_test_list): Likewise.
5067         (vect_shift_permute_load_chain): Likewise.
5068         (vect_supportable_dr_alignment): Likewise.
5069         (dependence_distance_ge_vf): Take the vectorization factor as a
5070         poly_uint64 rather than an unsigned HOST_WIDE_INT.
5071         (vect_analyze_data_refs): Change min_vf from an int * to a
5072         poly_uint64 *.
5073         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
5074         vfm1 as a poly_uint64 rather than an int.  Make the same change
5075         for the returned bound_scalar.
5076         (vect_gen_vector_loop_niters): Handle polynomial vf.
5077         (vect_do_peeling): Likewise.  Update call to
5078         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
5079         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
5080         be constant.
5081         * tree-vect-loop.c (vect_determine_vectorization_factor)
5082         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
5083         (vect_get_known_peeling_cost): Likewise.
5084         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
5085         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
5086         (vect_transform_loop): Likewise.  Use the lowest possible VF when
5087         updating the upper bounds of the loop.
5088         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
5089         rather than an int.
5090         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
5091         polynomial unroll factors.
5092         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
5093         (vect_make_slp_decision): Likewise.
5094         (vect_supported_load_permutation_p): Likewise, and polynomial
5095         vf too.
5096         (vect_analyze_slp_cost): Handle polynomial vf.
5097         (vect_slp_analyze_node_operations): Likewise.
5098         (vect_slp_analyze_bb_1): Likewise.
5099         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5100         than an unsigned HOST_WIDE_INT.
5101         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
5102         (vectorizable_load): Handle polynomial vf.
5103         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
5104         a poly_uint64.
5105         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
5106
5107 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5108             Alan Hayward  <alan.hayward@arm.com>
5109             David Sherwood  <david.sherwood@arm.com>
5110
5111         * match.pd: Handle bit operations involving three constants
5112         and try to fold one pair.
5113
5114 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5115
5116         * tree-vect-loop-manip.c: Include gimple-fold.h.
5117         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
5118         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
5119         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
5120         Add a path that uses a step of VF instead of 1, but disable it
5121         for now.
5122         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
5123         and niters_no_overflow parameters.  Update calls to
5124         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
5125         Create a new SSA name if the latter choses to use a ste other
5126         than zero, and return it via niters_vector_mult_vf_var.
5127         * tree-vect-loop.c (vect_transform_loop): Update calls to
5128         vect_do_peeling, vect_gen_vector_loop_niters and
5129         slpeel_make_loop_iterate_ntimes.
5130         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
5131         (vect_gen_vector_loop_niters): Update declarations after above changes.
5132
5133 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
5134
5135         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
5136         128-bit round to integer instructions.
5137         (ceil<mode>2): Likewise.
5138         (btrunc<mode>2): Likewise.
5139         (round<mode>2): Likewise.
5140
5141 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5142
5143         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
5144         unaligned VSX load/store on P8/P9.
5145         (expand_block_clear): Allow the use of unaligned VSX
5146         load/store on P8/P9.
5147
5148 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
5149
5150         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
5151         New function.
5152         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
5153         swap associated with both a load and a store.
5154
5155 2018-01-02  Andrew Waterman  <andrew@sifive.com>
5156
5157         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
5158         * config/riscv/riscv.md (clear_cache): Use it.
5159
5160 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
5161
5162         * web.c: Remove out-of-date comment.
5163
5164 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5165
5166         * expr.c (fixup_args_size_notes): Check that any existing
5167         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
5168         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
5169         (emit_single_push_insn): ...here.
5170
5171 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5172
5173         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
5174         (const_vector_encoded_nelts): New function.
5175         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
5176         (const_vector_int_elt, const_vector_elt): Declare.
5177         * emit-rtl.c (const_vector_int_elt_1): New function.
5178         (const_vector_elt): Likewise.
5179         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
5180         of CONST_VECTOR_ELT.
5181
5182 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5183
5184         * expr.c: Include rtx-vector-builder.h.
5185         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
5186         directly on the tree encoding.
5187         (const_vector_from_tree): Likewise.
5188         * optabs.c: Include rtx-vector-builder.h.
5189         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
5190         sequence of "u" values.
5191         * vec-perm-indices.c: Include rtx-vector-builder.h.
5192         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
5193         directly on the vec_perm_indices encoding.
5194
5195 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5196
5197         * doc/rtl.texi (const_vector): Describe new encoding scheme.
5198         * Makefile.in (OBJS): Add rtx-vector-builder.o.
5199         * rtx-vector-builder.h: New file.
5200         * rtx-vector-builder.c: Likewise.
5201         * rtl.h (rtx_def::u2): Add a const_vector field.
5202         (CONST_VECTOR_NPATTERNS): New macro.
5203         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
5204         (CONST_VECTOR_DUPLICATE_P): Likewise.
5205         (CONST_VECTOR_STEPPED_P): Likewise.
5206         (CONST_VECTOR_ENCODED_ELT): Likewise.
5207         (const_vec_duplicate_p): Check for a duplicated vector encoding.
5208         (unwrap_const_vec_duplicate): Likewise.
5209         (const_vec_series_p): Check for a non-duplicated vector encoding.
5210         Say that the function only returns true for integer vectors.
5211         * emit-rtl.c: Include rtx-vector-builder.h.
5212         (gen_const_vec_duplicate_1): Delete.
5213         (gen_const_vector): Call gen_const_vec_duplicate instead of
5214         gen_const_vec_duplicate_1.
5215         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
5216         (gen_const_vec_duplicate): Use rtx_vector_builder.
5217         (gen_const_vec_series): Likewise.
5218         (gen_rtx_CONST_VECTOR): Likewise.
5219         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
5220         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5221         Build a new vector rather than modifying a CONST_VECTOR in-place.
5222         (handle_special_swappables): Update call accordingly.
5223         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
5224         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5225         Build a new vector rather than modifying a CONST_VECTOR in-place.
5226         (handle_special_swappables): Update call accordingly.
5227
5228 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5229
5230         * simplify-rtx.c (simplify_const_binary_operation): Use
5231         CONST_VECTOR_ELT instead of XVECEXP.
5232
5233 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5234
5235         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
5236         the selector elements to be different from the data elements
5237         if the selector is a VECTOR_CST.
5238         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
5239         ssizetype for the selector.
5240
5241 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5242
5243         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
5244         before testing each element individually.
5245         * tree-vect-generic.c (lower_vec_perm): Likewise.
5246
5247 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5248
5249         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
5250         * selftest-run-tests.c (selftest::run_tests): Call it.
5251         * vector-builder.h (vector_builder::operator ==): New function.
5252         (vector_builder::operator !=): Likewise.
5253         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
5254         (vec_perm_indices::all_from_input_p): New function.
5255         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5256         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
5257         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
5258         instead of reading the VECTOR_CST directly.  Detect whether both
5259         vector inputs are the same before constructing the vec_perm_indices,
5260         and update the number of inputs argument accordingly.  Use the
5261         utility functions added above.  Only construct sel2 if we need to.
5262
5263 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5264
5265         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
5266         the broadcast of the low byte.
5267         (expand_mult_highpart): Use an explicit encoding for the permutes.
5268         * optabs-query.c (can_mult_highpart_p): Likewise.
5269         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
5270         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5271         (vectorizable_bswap): Likewise.
5272         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
5273         explicit encoding for the power-of-2 permutes.
5274         (vect_permute_store_chain): Likewise.
5275         (vect_grouped_load_supported): Likewise.
5276         (vect_permute_load_chain): Likewise.
5277
5278 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5279
5280         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
5281         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
5282         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
5283         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5284         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
5285         (vect_gen_perm_mask_any): Likewise.
5286
5287 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5288
5289         * int-vector-builder.h: New file.
5290         * vec-perm-indices.h: Include int-vector-builder.h.
5291         (vec_perm_indices): Redefine as an int_vector_builder.
5292         (auto_vec_perm_indices): Delete.
5293         (vec_perm_builder): Redefine as a stand-alone class.
5294         (vec_perm_indices::vec_perm_indices): New function.
5295         (vec_perm_indices::clamp): Likewise.
5296         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
5297         (vec_perm_indices::new_vector): New function.
5298         (vec_perm_indices::new_expanded_vector): Update for new
5299         vec_perm_indices class.
5300         (vec_perm_indices::rotate_inputs): New function.
5301         (vec_perm_indices::all_in_range_p): Operate directly on the
5302         encoded form, without computing elided elements.
5303         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
5304         encoding.  Update for new vec_perm_indices class.
5305         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
5306         the given vec_perm_builder.
5307         (expand_vec_perm_var): Update vec_perm_builder constructor.
5308         (expand_mult_highpart): Use vec_perm_builder instead of
5309         auto_vec_perm_indices.
5310         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
5311         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
5312         or double series encoding as appropriate.
5313         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
5314         vec_perm_indices instead of auto_vec_perm_indices.
5315         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5316         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5317         (vect_permute_store_chain): Likewise.
5318         (vect_grouped_load_supported): Likewise.
5319         (vect_permute_load_chain): Likewise.
5320         (vect_shift_permute_load_chain): Likewise.
5321         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5322         (vect_transform_slp_perm_load): Likewise.
5323         (vect_schedule_slp_instance): Likewise.
5324         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5325         (vectorizable_mask_load_store): Likewise.
5326         (vectorizable_bswap): Likewise.
5327         (vectorizable_store): Likewise.
5328         (vectorizable_load): Likewise.
5329         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
5330         vec_perm_indices instead of auto_vec_perm_indices.  Use
5331         tree_to_vec_perm_builder to read the vector from a tree.
5332         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
5333         vec_perm_builder instead of a vec_perm_indices.
5334         (have_whole_vector_shift): Use vec_perm_builder and
5335         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
5336         truncation to calc_vec_perm_mask_for_shift.
5337         (vect_create_epilog_for_reduction): Likewise.
5338         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
5339         from auto_vec_perm_indices to vec_perm_indices.
5340         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5341         instead of changing individual elements.
5342         (aarch64_vectorize_vec_perm_const): Use new_vector to install
5343         the vector in d.perm.
5344         * config/arm/arm.c (expand_vec_perm_d::perm): Change
5345         from auto_vec_perm_indices to vec_perm_indices.
5346         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5347         instead of changing individual elements.
5348         (arm_vectorize_vec_perm_const): Use new_vector to install
5349         the vector in d.perm.
5350         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
5351         Update vec_perm_builder constructor.
5352         (rs6000_expand_interleave): Likewise.
5353         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
5354         (rs6000_expand_interleave): Likewise.
5355
5356 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5357
5358         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
5359         to qimode could truncate the indices.
5360         * optabs.c (expand_vec_perm_var): Likewise.
5361
5362 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5363
5364         * Makefile.in (OBJS): Add vec-perm-indices.o.
5365         * vec-perm-indices.h: New file.
5366         * vec-perm-indices.c: Likewise.
5367         * target.h (vec_perm_indices): Replace with a forward class
5368         declaration.
5369         (auto_vec_perm_indices): Move to vec-perm-indices.h.
5370         * optabs.h: Include vec-perm-indices.h.
5371         (expand_vec_perm): Delete.
5372         (selector_fits_mode_p, expand_vec_perm_var): Declare.
5373         (expand_vec_perm_const): Declare.
5374         * target.def (vec_perm_const_ok): Replace with...
5375         (vec_perm_const): ...this new hook.
5376         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
5377         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
5378         * doc/tm.texi: Regenerate.
5379         * optabs.def (vec_perm_const): Delete.
5380         * doc/md.texi (vec_perm_const): Likewise.
5381         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
5382         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
5383         expand_vec_perm for constant permutation vectors.  Assert that
5384         the mode of variable permutation vectors is the integer equivalent
5385         of the mode that is being permuted.
5386         * optabs-query.h (selector_fits_mode_p): Declare.
5387         * optabs-query.c: Include vec-perm-indices.h.
5388         (selector_fits_mode_p): New function.
5389         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
5390         is defined, instead of checking whether the vec_perm_const_optab
5391         exists.  Use targetm.vectorize.vec_perm_const instead of
5392         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
5393         fit in the vector mode before using a variable permute.
5394         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
5395         vec_perm_indices instead of an rtx.
5396         (expand_vec_perm): Replace with...
5397         (expand_vec_perm_const): ...this new function.  Take the selector
5398         as a vec_perm_indices rather than an rtx.  Also take the mode of
5399         the selector.  Update call to shift_amt_for_vec_perm_mask.
5400         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
5401         Use vec_perm_indices::new_expanded_vector to expand the original
5402         selector into bytes.  Check whether the indices fit in the vector
5403         mode before using a variable permute.
5404         (expand_vec_perm_var): Make global.
5405         (expand_mult_highpart): Use expand_vec_perm_const.
5406         * fold-const.c: Includes vec-perm-indices.h.
5407         * tree-ssa-forwprop.c: Likewise.
5408         * tree-vect-data-refs.c: Likewise.
5409         * tree-vect-generic.c: Likewise.
5410         * tree-vect-loop.c: Likewise.
5411         * tree-vect-slp.c: Likewise.
5412         * tree-vect-stmts.c: Likewise.
5413         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
5414         Delete.
5415         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
5416         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
5417         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
5418         (aarch64_vectorize_vec_perm_const): ...this new function.
5419         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5420         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5421         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
5422         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
5423         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5424         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5425         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
5426         into...
5427         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
5428         check for NEON modes.
5429         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
5430         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
5431         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
5432         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
5433         into...
5434         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
5435         the old VEC_PERM_CONST conditions.
5436         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
5437         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
5438         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
5439         (ia64_vectorize_vec_perm_const_ok): Merge into...
5440         (ia64_vectorize_vec_perm_const): ...this new function.
5441         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
5442         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
5443         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
5444         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
5445         * config/mips/mips.c (mips_expand_vec_perm_const)
5446         (mips_vectorize_vec_perm_const_ok): Merge into...
5447         (mips_vectorize_vec_perm_const): ...this new function.
5448         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
5449         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
5450         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
5451         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
5452         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
5453         (rs6000_expand_vec_perm_const): Delete.
5454         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
5455         Delete.
5456         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5457         (altivec_expand_vec_perm_const_le): Take each operand individually.
5458         Operate on constant selectors rather than rtxes.
5459         (altivec_expand_vec_perm_const): Likewise.  Update call to
5460         altivec_expand_vec_perm_const_le.
5461         (rs6000_expand_vec_perm_const): Delete.
5462         (rs6000_vectorize_vec_perm_const_ok): Delete.
5463         (rs6000_vectorize_vec_perm_const): New function.
5464         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5465         an element count and rtx array.
5466         (rs6000_expand_extract_even): Update call accordingly.
5467         (rs6000_expand_interleave): Likewise.
5468         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
5469         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
5470         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
5471         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
5472         (rs6000_expand_vec_perm_const): Delete.
5473         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5474         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5475         (altivec_expand_vec_perm_const_le): Take each operand individually.
5476         Operate on constant selectors rather than rtxes.
5477         (altivec_expand_vec_perm_const): Likewise.  Update call to
5478         altivec_expand_vec_perm_const_le.
5479         (rs6000_expand_vec_perm_const): Delete.
5480         (rs6000_vectorize_vec_perm_const_ok): Delete.
5481         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
5482         reference to the SPE evmerge intructions.
5483         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5484         an element count and rtx array.
5485         (rs6000_expand_extract_even): Update call accordingly.
5486         (rs6000_expand_interleave): Likewise.
5487         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
5488         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
5489         new function.
5490         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5491
5492 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5493
5494         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
5495         vector mode and that that mode matches the mode of the data
5496         being permuted.
5497         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
5498         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
5499         directly using expand_vec_perm_1 when forcing selectors into
5500         registers.
5501         (expand_vec_perm_var): New function, split out from expand_vec_perm.
5502
5503 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5504
5505         * optabs-query.h (can_vec_perm_p): Delete.
5506         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
5507         * optabs-query.c (can_vec_perm_p): Split into...
5508         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
5509         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
5510         particular selector is valid.
5511         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5512         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5513         (vect_grouped_load_supported): Likewise.
5514         (vect_shift_permute_load_chain): Likewise.
5515         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5516         (vect_transform_slp_perm_load): Likewise.
5517         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5518         (vectorizable_bswap): Likewise.
5519         (vect_gen_perm_mask_checked): Likewise.
5520         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
5521         implementations of variable permutation vectors into account
5522         when deciding which selector to use.
5523         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
5524         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
5525         with a false third argument.
5526         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
5527         to test whether the constant selector is valid and can_vec_perm_var_p
5528         to test whether a variable selector is valid.
5529
5530 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5531
5532         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
5533         * optabs-query.c (can_vec_perm_p): Likewise.
5534         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
5535         instead of vec_perm_indices.
5536         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
5537         (vect_gen_perm_mask_checked): Likewise,
5538         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
5539         (vect_gen_perm_mask_checked): Likewise,
5540
5541 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5542
5543         * optabs-query.h (qimode_for_vec_perm): Declare.
5544         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
5545         (qimode_for_vec_perm): ...this new function.
5546         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
5547
5548 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5549
5550         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
5551         does not have a conditional at the top.
5552
5553 2018-01-02  Richard Biener  <rguenther@suse.de>
5554
5555         * ipa-inline.c (big_speedup_p): Fix expression.
5556
5557 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
5558
5559         PR target/81616
5560         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
5561         for generic 4->6.
5562
5563 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
5564
5565         PR target/81616
5566         Generic tuning.
5567         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
5568         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
5569         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
5570         cond_taken_branch_cost 3->4.
5571
5572 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
5573
5574         PR tree-optimization/83581
5575         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
5576         TODO_cleanup_cfg if any changes have been made.
5577
5578         PR middle-end/83608
5579         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
5580         convert_modes if target mode has the right side, but different mode
5581         class.
5582
5583         PR middle-end/83609
5584         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
5585         last argument when extracting from CONCAT.  If either from_real or
5586         from_imag is NULL, use expansion through memory.  If result is not
5587         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
5588         the parts directly to inner mode, if even that fails, use expansion
5589         through memory.
5590
5591         PR middle-end/83623
5592         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
5593         check for bswap in mode rather than HImode and use that in expand_unop
5594         too.
5595 \f
5596 Copyright (C) 2018 Free Software Foundation, Inc.
5597
5598 Copying and distribution of this file, with or without modification,
5599 are permitted in any medium without royalty provided the copyright
5600 notice and this notice are preserved.