re PR rtl-optimization/84123 (internal compiler error: in gen_rtx_SUBREG, at emit...
[platform/upstream/gcc.git] / gcc / ChangeLog
1 2018-01-31  Uros Bizjak  <ubizjak@gmail.com>
2
3         PR rtl-optimization/84123
4         * combine.c (change_zero_ext): Check if hard register satisfies
5         can_change_dest_mode before calling gen_lowpart_SUBREG.
6
7 2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>
8
9         PR target/82444
10         * ira.c (ira_init_register_move_cost): Remove assert.
11
12 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
13
14         PR rtl-optimization/84071
15         * doc/tm.texi.in (WORD_REGISTER_OPERATIONS): Add explicit case.
16         * doc/tm.texi: Regenerate.
17
18 2018-01-31  Richard Biener  <rguenther@suse.de>
19
20         PR tree-optimization/84132
21         * tree-data-ref.c (analyze_miv_subscript): Properly
22         check whether evolution_function_is_affine_multivariate_p
23         before calling gcd_of_steps_may_divide_p.
24
25 2018-01-31  Julia Koval  <julia.koval@intel.com>
26
27         PR target/83618
28         * config/i386/i386.c (ix86_expand_builtin): Handle IX86_BUILTIN_RDPID.
29         * config/i386/i386.md (rdpid_rex64) New.
30         (rdpid): Make 32bit only.
31
32 2018-01-29  Aldy Hernandez  <aldyh@redhat.com>
33
34         PR lto/84105
35         * tree-pretty-print.c (dump_generic_node): Handle a TYPE_NAME with
36         an IDENTIFIER_NODE for FUNCTION_TYPE's.
37
38 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
39
40         Revert
41         2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
42
43         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
44
45 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
46
47         PR rtl-optimization/84071
48         * combine.c (record_dead_and_set_regs_1): Record the source unmodified
49         for a paradoxical SUBREG on a WORD_REGISTER_OPERATIONS target.
50
51 2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>
52
53         * config/arc/arc.c (arc_handle_aux_attribute): New function.
54         (arc_attribute_table): Add 'aux' attribute.
55         (arc_in_small_data_p): Consider aux like variables.
56         (arc_is_aux_reg_p): New function.
57         (arc_asm_output_aligned_decl_local): Ignore 'aux' like variables.
58         (arc_get_aux_arg): New function.
59         (prepare_move_operands): Handle aux-register access.
60         (arc_handle_aux_attribute): New function.
61         * doc/extend.texi (ARC Variable attributes): Add subsection.
62
63 2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>
64
65         * config/arc/arc-protos.h (arc_is_uncached_mem_p): Function proto.
66         * config/arc/arc.c (arc_handle_uncached_attribute): New function.
67         (arc_attribute_table): Add 'uncached' attribute.
68         (arc_print_operand): Print '.di' flag for uncached memory
69         accesses.
70         (arc_in_small_data_p): Do not consider for small data the uncached
71         types.
72         (arc_is_uncached_mem_p): New function.
73         * config/arc/predicates.md (compact_store_memory_operand): Check
74         for uncached memory accesses.
75         (nonvol_nonimm_operand): Likewise.
76         * gcc/doc/extend.texi (ARC Type Attribute): New subsection.
77
78 2018-01-31  Jakub Jelinek  <jakub@redhat.com>
79
80         PR c/84100
81         * common.opt (falign-functions=, falign-jumps=, falign-labels=,
82         falign-loops=): Add Optimization flag.
83
84 2017-01-30  Jeff Law  <law@redhat.com>
85
86         PR target/84064
87         * i386.c (ix86_adjust_stack_and_probe_stack_clash): New argument
88         INT_REGISTERS_SAVED.  Check it prior to calling
89         get_scratch_register_on_entry.
90         (ix86_adjust_stack_and_probe): Similarly.
91         (ix86_emit_probe_stack_range): Similarly.
92         (ix86_expand_prologue): Corresponding changes.
93
94 2018-01-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
95
96         PR target/40411
97         * config/sol2.h (STARTFILE_ARCH_SPEC): Use -std=c*,
98         -std=iso9899:199409 instead of -pedantic to select values-Xc.o.
99
100 2018-01-30  Vladimir Makarov  <vmakarov@redhat.com>
101
102         PR target/84112
103         * lra-constraints.c (curr_insn_transform): Process AND in the
104         address.
105
106 2018-01-30  Jakub Jelinek  <jakub@redhat.com>
107
108         PR rtl-optimization/83986
109         * sched-deps.c (sched_analyze_insn): For frame related insns, add anti
110         dependence against last_pending_memory_flush in addition to
111         pending_jump_insns.
112
113 2018-01-30  Alexandre Oliva <aoliva@redhat.com>
114
115         PR tree-optimization/81611
116         * tree-ssa-dom.c (simple_iv_increment_p): Skip intervening
117         copies.
118
119 2018-01-30  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
120
121         * config/rs6000/rs6000.c (rs6000_internal_arg_pointer): Only return
122         a reg rtx.
123
124 2018-01-30  Richard Biener  <rguenther@suse.de>
125             Jakub Jelinek  <jakub@redhat.com>
126
127         PR tree-optimization/84111
128         * tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1): Skip
129         inner loops added during recursion, as they don't have up-to-date
130         SSA form.
131
132 2018-01-30  Jan Hubicka  <hubicka@ucw.cz>
133
134         PR ipa/81360
135         * ipa-inline.c (can_inline_edge_p): Break out late tests to...
136         (can_inline_edge_by_limits_p): ... here.
137         (can_early_inline_edge_p, check_callers,
138         update_caller_keys, update_callee_keys, recursive_inlining,
139         add_new_edges_to_heap, speculation_useful_p,
140         inline_small_functions,
141         inline_small_functions, flatten_function,
142         inline_to_all_callers_1): Update.
143
144 2018-01-30  Jan Hubicka  <hubicka@ucw.cz>
145
146         * profile-count.c (profile_count::combine_with_ipa_count): Handle
147         zeros correctly.
148
149 2018-01-30  Richard Biener  <rguenther@suse.de>
150
151         PR tree-optimization/83008
152         * tree-vect-slp.c (vect_analyze_slp_cost_1): Properly cost
153         invariant and constant vector uses in stmts when they need
154         more than one stmt.
155
156 2018-01-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
157
158         PR bootstrap/84017
159         * configure.ac (gcc_cv_as_shf_merge): Disable on Solaris 10/x86.
160         * configure: Regenerate.
161
162 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
163
164         * config/aarch64/aarch64-sve.md (*vec_extract<mode><Vel>_0): New
165         pattern.
166         (*vec_extract<mode><Vel>_v128): Require a nonzero lane number.
167         Use gen_rtx_REG rather than gen_lowpart.
168
169 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
170
171         * lra-constraints.c (match_reload): Use subreg_lowpart_offset
172         rather than 0 when creating partial subregs.
173
174 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
175
176         * vec-perm-indices.c (vec_perm_indices::series_p): Give examples
177         of usage.
178
179 2018-01-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
180
181         PR target/81550
182         * config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): If DFmode
183         and SFmode can go in Altivec registers (-mcpu=power7 for DFmode,
184         -mcpu=power8 for SFmode) don't set the PRE_INCDEC or PRE_MODIFY
185         flags.  This restores the settings used before the 2017-07-24.
186         Turning off pre increment/decrement/modify allows IVOPTS to
187         optimize DF/SF loops where the index is an int.
188
189 2018-01-29  Richard Biener <rguenther@suse.de>
190             Kelvin Nilsen  <kelvin@gcc.gnu.org>
191
192         PR bootstrap/80867
193         * tree-vect-stmts.c (vectorizable_call): Don't call
194         targetm.vectorize_builtin_md_vectorized_function if callee is
195         NULL.
196
197 2018-01-22 Carl Love <cel@us.ibm.com>
198
199         * doc/extend.tex: Fix typo in second arg in
200         __builtin_bcdadd_{lt|eq|gt|ov} and __builtin_bcdsub_{lt|eq|gt|ov}.
201
202 2018-01-29  Richard Biener  <rguenther@suse.de>
203
204         PR tree-optimization/84086
205         * tree-ssanames.c: Include cfgloop.h and tree-scalar-evolution.h.
206         (flush_ssaname_freelist): When SSA names were released reset
207         the SCEV hash table.
208
209 2018-01-29  Richard Biener  <rguenther@suse.de>
210
211         PR tree-optimization/84057
212         * tree-ssa-loop-ivcanon.c (unloop_loops): Deal with already
213         removed paths when removing edges.
214
215 2018-01-27  H.J. Lu  <hongjiu.lu@intel.com>
216
217         * doc/invoke.texi: Replace -mfunction-return==@var{choice} with
218         -mfunction-return=@var{choice}.
219
220 2018-01-27  Bernd Edlinger  <bernd.edlinger@hotmail.de>
221
222         PR diagnostic/84034
223         * diagnostic-show-locus.c (get_line_width_without_trailing_whitespace):
224         Handle CR like TAB.
225         (layout::print_source_line): Likewise.
226         (test_get_line_width_without_trailing_whitespace): Add test cases.
227
228 2018-01-27  Jakub Jelinek  <jakub@redhat.com>
229
230         PR middle-end/84040
231         * sched-deps.c (sched_macro_fuse_insns): Return immediately for
232         debug insns.
233
234 2018-01-26  Jim Wilson  <jimw@sifive.com>
235
236         * config/riscv/riscv.h (MAX_FIXED_MODE_SIZE): New.
237
238         * config/riscv/elf.h (LIB_SPEC): Don't include -lgloss when nosys.specs
239         specified.
240
241 2018-01-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
242
243         * config/aarch64/aarch64.md: Add peepholes for CMP + SUB -> SUBS
244         and CMP + SUB-immediate -> SUBS.
245
246 2018-01-26  Martin Sebor  <msebor@redhat.com>
247
248         PR tree-optimization/83896
249         * tree-ssa-strlen.c (get_string_len): Rename...
250         (get_string_cst_length): ...to this.  Return HOST_WIDE_INT.
251         Avoid assuming length is constant.
252         (handle_char_store): Use HOST_WIDE_INT for string length.
253
254 2018-01-26  Uros Bizjak  <ubizjak@gmail.com>
255
256         PR target/81763
257         * config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
258         to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
259
260 2018-01-26  Richard Biener  <rguenther@suse.de>
261
262         PR rtl-optimization/84003
263         * dse.c (record_store): Only record redundant stores when
264         the earlier store aliases at least all accesses the later one does.
265
266 2018-01-26  Jakub Jelinek  <jakub@redhat.com>
267
268         PR rtl-optimization/83985
269         * dce.c (deletable_insn_p): Return false for separate shrink wrapping
270         REG_CFA_RESTORE insns.
271         (delete_unmarked_insns): Don't ignore separate shrink wrapping
272         REG_CFA_RESTORE insns here.
273
274         PR c/83989
275         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Don't
276         use SSA_NAME_VAR as base for SSA_NAMEs with non-NULL SSA_NAME_VAR.
277
278 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
279
280         * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3.
281         * config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... .
282         (arc_init): Likewise.
283         (arc_override_options): Likewise.
284         (arc_file_start): Choose Tag_ARC_CPU_variation based on arc_tune
285         value.
286         (hwloop_fail): Use TARGET_DBNZ when we want to check for dbnz insn
287         support.
288         * config/arc/arc.h (TARGET_DBNZ): Define.
289         * config/arc/arc.md (attr tune): Add core_3, use ARC_TUNE_... to
290         properly set the tune attribute.
291         (dbnz): Use TARGET_DBNZ guard.
292         * config/arc/arc.opt (mtune): Add core3 option.
293
294 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
295
296         * config/arc/arc.c (arc_delegitimize_address_0): Refactored to
297         recognize new pic like addresses.
298         (arc_delegitimize_address): Clean up.
299
300 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
301
302         * config/arc/arc-arches.def: Option mrf16 valid for all
303         architectures.
304         * config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
305         * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
306         * config/arc/arc-options.def (FL_RF16): Add mrf16 option.
307         * config/arc/arc-tables.opt: Regenerate.
308         * config/arc/arc.c (arc_conditional_register_usage): Handle
309         reduced register file case.
310         (arc_file_start): Set must have build attributes.
311         * config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
312         mrf16 option value.
313         * config/arc/arc.opt (mrf16): Add new option.
314         * config/arc/elf.h (ATTRIBUTE_PCS): Define.
315         * config/arc/genmultilib.awk: Handle new mrf16 option.
316         * config/arc/linux.h (ATTRIBUTE_PCS): Define.
317         * config/arc/t-multilib: Regenerate.
318         * doc/invoke.texi (ARC Options): Document mrf16 option.
319
320 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
321
322         * config/arc/arc-protos.h: Add arc_is_secure_call_p proto.
323         * config/arc/arc.c (arc_handle_secure_attribute): New function.
324         (arc_attribute_table): Add 'secure_call' attribute.
325         (arc_print_operand): Print secure call operand.
326         (arc_function_ok_for_sibcall): Don't optimize tail calls when
327         secure.
328         (arc_is_secure_call_p): New function.  * config/arc/arc.md
329         (call_i): Add support for sjli instruction.
330         (call_value_i): Likewise.
331         * config/arc/constraints.md (Csc): New constraint.
332
333 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
334             John Eric Martin <John.Martin@emmicro-us.com>
335
336         * config/arc/arc-protos.h: Add arc_is_jli_call_p proto.
337         * config/arc/arc.c (_arc_jli_section): New struct.
338         (arc_jli_section): New type.
339         (rc_jli_sections): New static variable.
340         (arc_handle_jli_attribute): New function.
341         (arc_attribute_table): Add jli_always and jli_fixed attribute.
342         (arc_file_end): New function.
343         (TARGET_ASM_FILE_END): Define.
344         (arc_print_operand): Reuse 'S' letter for JLI output instruction.
345         (arc_add_jli_section): New function.
346         (jli_call_scan): Likewise.
347         (arc_reorg): Call jli_call_scan.
348         (arc_output_addsi): Remove 'S' from printing asm operand.
349         (arc_is_jli_call_p): New function.
350         * config/arc/arc.md (movqi_insn): Remove 'S' from printing asm
351         operand.
352         (movhi_insn): Likewise.
353         (movsi_insn): Likewise.
354         (movsi_set_cc_insn): Likewise.
355         (loadqi_update): Likewise.
356         (load_zeroextendqisi_update): Likewise.
357         (load_signextendqisi_update): Likewise.
358         (loadhi_update): Likewise.
359         (load_zeroextendhisi_update): Likewise.
360         (load_signextendhisi_update): Likewise.
361         (loadsi_update): Likewise.
362         (loadsf_update): Likewise.
363         (movsicc_insn): Likewise.
364         (bset_insn): Likewise.
365         (bxor_insn): Likewise.
366         (bclr_insn): Likewise.
367         (bmsk_insn): Likewise.
368         (bicsi3_insn): Likewise.
369         (cmpsi_cc_c_insn): Likewise.
370         (movsi_ne): Likewise.
371         (movsi_cond_exec): Likewise.
372         (clrsbsi2): Likewise.
373         (norm_f): Likewise.
374         (normw): Likewise.
375         (swap): Likewise.
376         (divaw): Likewise.
377         (flag): Likewise.
378         (sr): Likewise.
379         (kflag): Likewise.
380         (ffs): Likewise.
381         (ffs_f): Likewise.
382         (fls): Likewise.
383         (call_i): Remove 'S' asm letter, add jli instruction.
384         (call_value_i): Likewise.
385         * config/arc/arc.op (mjli-always): New option.
386         * config/arc/constraints.md (Cji): New constraint.
387         * config/arc/fpx.md (addsf3_fpx): Remove 'S' from printing asm
388         operand.
389         (subsf3_fpx): Likewise.
390         (mulsf3_fpx): Likewise.
391         * config/arc/simdext.md (vendrec_insn): Remove 'S' from printing
392         asm operand.
393         * doc/extend.texi (ARC): Document 'jli-always' and 'jli-fixed'
394         function attrbutes.
395         * doc/invoke.texi (ARC): Document mjli-always option.
396
397 2018-01-26  Sebastian Perta  <sebastian.perta@renesas.com>
398
399         * config/rl78/rl78.c: if operand 2 is const avoid addition with 0
400         and use incw and decw where possible
401         * testsuite/gcc.target/rl78/test_addsi3_internal.c: new file
402
403 2018-01-26  Richard Biener  <rguenther@suse.de>
404
405         PR tree-optimization/81082
406         * fold-const.c (fold_plusminus_mult_expr): Do not perform the
407         association if it requires casting to unsigned.
408         * match.pd ((A * C) +- (B * C) -> (A+-B)): New patterns derived
409         from fold_plusminus_mult_expr to catch important cases late when
410         range info is available.
411
412 2018-01-26  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
413
414         * config/i386/sol2.h (USE_HIDDEN_LINKONCE): Remove.
415         * configure.ac (hidden_linkonce): New test.
416         * configure: Regenerate.
417         * config.in: Regenerate.
418
419 2018-01-26  Julia Koval  <julia.koval@intel.com>
420
421         * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
422         _mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
423         _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
424         _mm_mask_bitshuffle_epi64_mask): Fix type.
425         * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
426         USI_FTYPE_V4DI_V4DI_USI): Remove.
427         * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
428         __builtin_ia32_vpshufbitqmb256_mask,
429         __builtin_ia32_vpshufbitqmb128_mask): Fix types.
430         * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
431         * config/i386/sse.md (VI1_AVX512VLBW): Change types.
432
433 2018-01-26  Alan Modra  <amodra@gmail.com>
434
435         PR target/84033
436         * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Exclude
437         UNSPEC_VBPERMQ.  Sort other unspecs.
438
439 2018-01-25  David Edelsohn  <dje.gcc@gmail.com>
440
441         * doc/invoke.texi (PowerPC Options): Document 'native' cpu type.
442
443 2018-01-25  Jan Hubicka  <hubicka@ucw.cz>
444
445         PR middle-end/83055
446         * predict.c (drop_profile): Do not push/pop cfun; update also
447         node->count.
448         (handle_missing_profiles): Fix logic looking for zero profiles.
449
450 2018-01-25  Jakub Jelinek  <jakub@redhat.com>
451
452         PR middle-end/83977
453         * ipa-fnsummary.c (compute_fn_summary): Clear can_change_signature
454         on functions with #pragma omp declare simd or functions with simd
455         attribute.
456         * omp-simd-clone.c (expand_simd_clones): Revert 2018-01-24 change.
457         * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
458         Remove trailing \n from warning_at calls.
459
460 2018-01-25  Tom de Vries  <tom@codesourcery.com>
461
462         PR target/84028
463         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
464         for neutered workers.
465
466 2018-01-24  Joseph Myers  <joseph@codesourcery.com>
467
468         PR target/68467
469         * config/m68k/m68k.c (m68k_promote_function_mode): New function.
470         (TARGET_PROMOTE_FUNCTION_MODE): New macro.
471
472 2017-01-24  Jeff Law  <law@redhat.com>
473
474         PR target/83994
475         * i386.c (get_probe_interval): Move to earlier point.
476         (ix86_compute_frame_layout): If -fstack-clash-protection and
477         the frame is larger than the probe interval, then use pushes
478         to save registers rather than reg->mem moves.
479         (ix86_expand_prologue): Remove conditional for int_registers_saved
480         assertion.
481
482 2018-01-24  Vladimir Makarov  <vmakarov@redhat.com>
483
484         PR target/84014
485         * ira-build.c (setup_min_max_allocno_live_range_point): Set up
486         min/max for never referenced object.
487
488 2018-01-24  Jakub Jelinek  <jakub@redhat.com>
489
490         PR middle-end/83977
491         * tree.c (free_lang_data_in_decl): Don't clear DECL_ABSTRACT_ORIGIN
492         here.
493         * omp-low.c (create_omp_child_function): Remove "omp declare simd"
494         attributes from DECL_ATTRIBUTES (decl) without affecting
495         DECL_ATTRIBUTES (current_function_decl).
496         * omp-simd-clone.c (expand_simd_clones): Ignore DECL_ARTIFICIAL
497         functions with non-NULL DECL_ABSTRACT_ORIGIN.
498
499 2018-01-24  Richard Sandiford  <richard.sandiford@linaro.org>
500
501         PR tree-optimization/83979
502         * fold-const.c (fold_comparison): Use constant_boolean_node
503         instead of boolean_{true,false}_node.
504
505 2018-01-24  Jan Hubicka  <hubicka@ucw.cz>
506
507         * ipa-profile.c (ipa_propagate_frequency_1): Fix logic skipping calls
508         with zero counts.
509
510 2018-01-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
511
512         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
513         Simplify the clause that sets the length attribute.
514         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
515         (*sibcall_nonlocal_sysv<mode>): Clean up code block; simplify the
516         clause that sets the length attribute.
517         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
518
519 2018-01-24  Tom de Vries  <tom@codesourcery.com>
520
521         PR target/83589
522         * config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_2): Define to 1.
523         (nvptx_pc_set, nvptx_condjump_label): New function. Copy from jump.c.
524         Add strict parameter.
525         (prevent_branch_around_nothing): Insert dummy insn between branch to
526         label and label with no ptx insn inbetween.
527         * config/nvptx/nvptx.md (define_insn "fake_nop"): New insn.
528
529 2018-01-24  Tom de Vries  <tom@codesourcery.com>
530
531         PR target/81352
532         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
533         for neutered threads in warp.
534         * config/nvptx/nvptx.md (define_insn "exit"): New insn.
535
536 2018-01-24  Richard Biener  <rguenther@suse.de>
537
538         PR tree-optimization/83176
539         * tree-chrec.c (chrec_fold_plus_1): Handle (signed T){(T) .. }
540         operands.
541
542 2018-01-24  Richard Biener  <rguenther@suse.de>
543
544         PR tree-optimization/82819
545         * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
546         code generating pluses that are no-ops in the target precision.
547
548 2018-01-24  Richard Biener  <rguenther@suse.de>
549
550         PR middle-end/84000
551         * tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind.
552
553 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
554
555         * cfgcleanup.c (try_crossjump_to_edge): Use combine_with_count
556         to merge probabilities.
557         * predict.c (probably_never_executed): Also mark as cold functions
558         with global 0 profile and guessed local profile.
559         * profile-count.c (profile_probability::combine_with_count): New
560         member function.
561         * profile-count.h (profile_probability::operator*,
562         profile_probability::operator*=, profile_probability::operator/,
563         profile_probability::operator/=): Reduce precision to adjusted
564         and set value to guessed on contradictory divisions.
565         (profile_probability::combine_with_freq): Remove.
566         (profile_probability::combine_wiht_count): Declare.
567         (profile_count::force_nonzero):: Set to adjusted.
568         (profile_count::probability_in):: Set quality to adjusted.
569         * tree-ssa-tail-merge.c (replace_block_by): Use
570         combine_with_count.
571
572 2018-01-23  Andrew Waterman  <andrew@sifive.com>
573             Jim Wilson  <jimw@sifive.com>
574
575         * config/riscv/riscv.c (riscv_stack_boundary): New.
576         (riscv_option_override): Set riscv_stack_boundary.  Handle
577         riscv_preferred_stack_boundary_arg.
578         * config/riscv/riscv.h (MIN_STACK_BOUNDARY, ABI_STACK_BOUNDARY): New.
579         (BIGGEST_ALIGNMENT): Set to STACK_BOUNDARY.
580         (STACK_BOUNDARY): Set to riscv_stack_boundary.
581         (RISCV_STACK_ALIGN): Use STACK_BOUNDARY.
582         * config/riscv/riscv.opt (mpreferred-stack-boundary): New.
583         * doc/invoke.tex (RISC-V Options): Add -mpreferred-stack-boundary.
584
585 2018-01-23  H.J. Lu  <hongjiu.lu@intel.com>
586
587         PR target/83905
588         * config/i386/i386.c (ix86_expand_prologue): Use cost reference
589         of struct ix86_frame.
590         (ix86_expand_epilogue): Likewise.  Add a local variable for
591         the reg_save_offset field in struct ix86_frame.
592
593 2018-01-23  Bin Cheng  <bin.cheng@arm.com>
594
595         PR tree-optimization/82604
596         * tree-loop-distribution.c (enum partition_kind): New enum item
597         PKIND_PARTIAL_MEMSET.
598         (partition_builtin_p): Support above new enum item.
599         (generate_code_for_partition): Ditto.
600         (compute_access_range): Differentiate cases that equality can be
601         proven at all loops, the innermost loops or no loops.
602         (classify_builtin_st, classify_builtin_ldst): Adjust call to above
603         function.  Set PKIND_PARTIAL_MEMSET for partition appropriately.
604         (finalize_partitions, distribute_loop): Don't fuse partition of
605         PKIND_PARTIAL_MEMSET kind when distributing 3-level loop nest.
606         (prepare_perfect_loop_nest): Distribute 3-level loop nest only if
607         parloop is enabled.
608
609 2018-01-23  Martin Liska  <mliska@suse.cz>
610
611         * predict.def (PRED_INDIR_CALL): Set probability to PROB_EVEN in
612         order to ignore the predictor.
613         (PRED_POLYMORPHIC_CALL): Likewise.
614         (PRED_RECURSIVE_CALL): Likewise.
615
616 2018-01-23  Martin Liska  <mliska@suse.cz>
617
618         * tree-profile.c (tree_profiling): Print function header to
619         aware reader which function we are working on.
620         * value-prof.c (gimple_find_values_to_profile): Do not print
621         not interesting value histograms.
622
623 2018-01-23  Martin Liska  <mliska@suse.cz>
624
625         * profile-count.h (enum profile_quality): Add
626         profile_uninitialized as the first value. Do not number values
627         as they are zero based.
628         (profile_count::verify): Update sanity check.
629         (profile_probability::verify): Likewise.
630
631 2018-01-23  Nathan Sidwell  <nathan@acm.org>
632
633         * doc/invoke.texi (ffor-scope): Deprecate.
634
635 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
636
637         PR tree-optimization/83510
638         * domwalk.c (set_all_edges_as_executable): New function.
639         (dom_walker::dom_walker): Convert bool param
640         "skip_unreachable_blocks" to enum reachability.  Move setup of
641         edge flags to set_all_edges_as_executable and only do it when
642         reachability is REACHABLE_BLOCKS.
643         * domwalk.h (enum dom_walker::reachability): New enum.
644         (dom_walker::dom_walker): Convert bool param
645         "skip_unreachable_blocks" to enum reachability.
646         (set_all_edges_as_executable): New decl.
647         * graphite-scop-detection.c  (gather_bbs::gather_bbs): Convert
648         from false for "skip_unreachable_blocks" to ALL_BLOCKS for
649         "reachability".
650         * tree-ssa-dom.c (dom_opt_dom_walker::dom_opt_dom_walker): Likewise,
651         but converting true to REACHABLE_BLOCKS.
652         * tree-ssa-sccvn.c (sccvn_dom_walker::sccvn_dom_walker): Likewise.
653         * tree-vrp.c
654         (check_array_bounds_dom_walker::check_array_bounds_dom_walker):
655         Likewise, but converting it to REACHABLE_BLOCKS_PRESERVING_FLAGS.
656         (vrp_dom_walker::vrp_dom_walker): Likewise, but converting it to
657         REACHABLE_BLOCKS.
658         (vrp_prop::vrp_finalize): Call set_all_edges_as_executable
659         if check_all_array_refs will be called.
660
661 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
662
663         * tree.c (selftest::test_location_wrappers): Add more test
664         coverage.
665
666 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
667
668         * sbitmap.c (selftest::test_set_range): Fix memory leaks.
669         (selftest::test_bit_in_range): Likewise.
670
671 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
672
673         PR testsuite/83888
674         * doc/sourcebuild.texi (vect_float): Say that the selector
675         only describes the situation when -funsafe-math-optimizations is on.
676         (vect_float_strict): Document.
677
678 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
679
680         PR tree-optimization/83965
681         * tree-vect-patterns.c (vect_reassociating_reduction_p): New function.
682         (vect_recog_dot_prod_pattern, vect_recog_sad_pattern): Use it
683         instead of checking only for a reduction.
684         (vect_recog_widen_sum_pattern): Likewise.
685
686 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
687
688         * predict.c (probably_never_executed): Only use precise profile info.
689         (compute_function_frequency): Skip after inlining hack since we now
690         have quality checking.
691
692 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
693
694         * profile-count.h (profile_probability::very_unlikely,
695         profile_probability::unlikely, profile_probability::even): Set
696         precision to guessed.
697
698 2018-01-23  Richard Biener  <rguenther@suse.de>
699
700         PR tree-optimization/83963
701         * graphite-scop-detection.c (scop_detection::harmful_loop_in_region):
702         Properly terminate dominator walk when crossing the exit edge not
703         when visiting its source block.
704
705 2018-01-23  Jakub Jelinek  <jakub@redhat.com>
706
707         PR c++/83918
708         * tree.c (maybe_wrap_with_location): Use NON_LVALUE_EXPR rather than
709         VIEW_CONVERT_EXPR to wrap CONST_DECLs.
710
711 2018-01-22  Jakub Jelinek  <jakub@redhat.com>
712
713         PR tree-optimization/83957
714         * omp-expand.c (expand_omp_for_generic): Ignore virtual PHIs.  Remove
715         semicolon after for body surrounded by braces.
716
717         PR tree-optimization/83081
718         * profile-count.h (profile_probability::split): New method.
719         * dojump.c (do_jump_1) <case TRUTH_ANDIF_EXPR, case TRUTH_ORIF_EXPR>:
720         Use profile_probability::split.
721         (do_compare_rtx_and_jump): Fix adjustment of probabilities
722         when splitting a single conditional jump into 2.
723
724 2018-01-22  David Malcolm  <dmalcolm@redhat.com>
725
726         PR tree-optimization/69452
727         * tree-ssa-loop-im.c (class move_computations_dom_walker): Remove
728         decl.
729
730 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
731
732         * config/rl78/rl78-expand.md: New define_expand "bswaphi2"
733         * config/rl78/rl78-virt.md: New define_insn "*bswaphi2_virt"
734         * config/rl78/rl78-real.md: New define_insn "*bswaphi2_real"
735
736 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
737
738         * config/rl78/rl78-protos.h: New function declaration rl78_split_movdi
739         * config/rl78/rl78.md: New define_expand "movdi"
740         * config/rl78/rl78.c: New function definition rl78_split_movdi
741
742 2018-01-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
743
744         PR target/83862
745         * config/rs6000/rs6000-protos.h (rs6000_split_signbit): Delete,
746         no longer used.
747         * config/rs6000/rs6000.c (rs6000_split_signbit): Likewise.
748         * config/rs6000/rs6000.md (signbit<mode>2): Change code for IEEE
749         128-bit to produce an UNSPEC move to get the double word with the
750         signbit and then a shift directly to do signbit.
751         (signbit<mode>2_dm): Replace old IEEE 128-bit signbit
752         implementation with a new version that just does either a direct
753         move or a regular move.  Move memory interface to separate insns.
754         Move insns so they are next to the expander.
755         (signbit<mode>2_dm_mem_be): New combiner insns to combine load
756         with signbit move.  Split big and little endian case.
757         (signbit<mode>2_dm_mem_le): Likewise.
758         (signbit<mode>2_dm_<su>ext): Delete, no longer used.
759         (signbit<mode>2_dm2): Likewise.
760
761 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
762
763         * config/rl78/rl78.md: New define_expand "anddi3".
764
765 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
766
767         * config/rl78/rl78.md: New define_expand "umindi3".
768
769 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
770
771         * config/rl78/rl78.md: New define_expand "smindi3".
772
773 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
774
775         * config/rl78/rl78.md: New define_expand "smaxdi3".
776
777 2018-01-22 Carl Love <cel@us.ibm.com>
778
779         * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
780         LVX_V1TI): Add macro expansion.
781         * config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
782         definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
783         VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
784         * config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
785         Change check to determine if the instruction is a byte reversing
786         entry.  Fix typo in comment.
787         * config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
788         for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
789         Add def_builtin calls for new builtins.
790         * config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
791         Add define_insn expansion.
792
793 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
794
795         * config/rl78/rl78.md: New define_expand "umaxdi3".
796
797 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
798
799         * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
800         for non-QImode registers
801
802 2018-01-22  Richard Biener  <rguenther@suse.de>
803
804         PR tree-optimization/83963
805         * graphite-scop-detection.c (scop_detection::get_sese): Delay
806         including the loop exit block.
807         (scop_detection::merge_sese): Likewise.
808         (scop_detection::add_scop): Do it here instead.
809
810 2018-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
811
812         * doc/sourcebuild.texi (arm_softfloat): Document.
813
814 2018-01-21  John David Anglin  <danglin@gcc.gnu.org>
815
816         PR gcc/77734
817         * config/pa/pa.c (pa_function_ok_for_sibcall): Use
818         targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
819         Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
820
821 2018-01-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
822             David Edelsohn <dje.gcc@gmail.com>
823
824         PR target/83946
825         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
826         Change "crset eq" to "crset 2".
827         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
828         (*call_indirect_aix<mode>_nospec): Likewise.
829         (*call_value_indirect_aix<mode>_nospec): Likewise.
830         (*call_indirect_elfv2<mode>_nospec): Likewise.
831         (*call_value_indirect_elfv2<mode>_nospec): Likewise.
832         (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
833         change assembly output from . to $.
834         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
835         (indirect_jump<mode>_nospec): Change assembly output from . to $.
836         (*tablejump<mode>_internal1_nospec): Likewise.
837
838 2018-01-21  Oleg Endo  <olegendo@gcc.gnu.org>
839
840         PR target/80870
841         * config/sh/sh_optimize_sett_clrt.cc:
842         Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
843
844 2018-01-20  Richard Sandiford  <richard.sandiford@linaro.org>
845
846         PR tree-optimization/83940
847         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
848         offset_dt to vect_constant_def rather than vect_unknown_def_type.
849         (vect_check_load_store_mask): Add a mask_dt_out parameter and
850         use it to pass back the definition type.
851         (vect_check_store_rhs): Likewise rhs_dt_out.
852         (vect_build_gather_load_calls): Add a mask_dt argument and use
853         it instead of a call to vect_is_simple_use.
854         (vectorizable_store): Update calls to vect_check_load_store_mask
855         and vect_check_store_rhs.  Use the dt returned by the latter instead
856         of scatter_src_dt.  Use the cached mask_dt and gs_info.offset_dt
857         instead of calls to vect_is_simple_use.  Pass the scalar rather
858         than the vector operand to vect_is_simple_use when handling
859         second and subsequent copies of an rhs value.
860         (vectorizable_load): Update calls to vect_check_load_store_mask
861         and vect_build_gather_load_calls.  Use the cached mask_dt and
862         gs_info.offset_dt instead of calls to vect_is_simple_use.
863
864 2018-01-20  Jakub Jelinek  <jakub@redhat.com>
865
866         PR middle-end/83945
867         * tree-emutls.c: Include gimplify.h.
868         (lower_emutls_2): New function.
869         (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
870         with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
871         it before further processing.
872
873         PR target/83930
874         * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
875         UINTVAL (trueop1) instead of INTVAL (op1).
876
877 2018-01-19  Jakub Jelinek  <jakub@redhat.com>
878
879         PR debug/81570
880         PR debug/83728
881         * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
882         INCOMING_FRAME_SP_OFFSET if not defined.
883         (scan_trace): Add ENTRY argument.  If true and
884         DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
885         emit a note to adjust the CFA offset.
886         (create_cfi_notes): Adjust scan_trace callers.
887         (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
888         INCOMING_FRAME_SP_OFFSET in the CIE.
889         * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
890         * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
891         Likewise.
892         * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
893         * doc/tm.texi: Regenerated.
894
895 2018-01-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
896
897         PR rtl-optimization/83147
898         * lra-constraints.c (remove_inheritance_pseudos): Use
899         lra_substitute_pseudo_within_insn.
900
901 2018-01-19  Tom de Vries  <tom@codesourcery.com>
902             Cesar Philippidis  <cesar@codesourcery.com>
903
904         PR target/83920
905         * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
906
907 2018-01-19  Cesar Philippidis  <cesar@codesourcery.com>
908
909         PR target/83790
910         * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
911         spaces for function labels.
912
913 2018-01-19  Martin Liska  <mliska@suse.cz>
914
915         * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
916         (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
917         (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
918         (PRED_OPCODE_POSITIVE): Change from 64 to 59.
919         (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
920         (PRED_CONST_RETURN): Change from 69 to 65.
921         (PRED_NULL_RETURN): Change from 91 to 71.
922         (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
923         (PRED_LOOP_GUARD): Change from 66 to 73.
924
925 2018-01-19  Martin Liska  <mliska@suse.cz>
926
927         * predict.c (predict_insn_def): Add new assert.
928         (struct branch_predictor): Change type to signed integer.
929         (test_prediction_value_range): Amend test to cover
930         PROB_UNINITIALIZED.
931         * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
932         (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
933         (PRED_LOOP_ITERATIONS_MAX): Likewise.
934         (PRED_LOOP_IV_COMPARE): Likewise.
935         * predict.h (PROB_UNINITIALIZED): Define new constant.
936
937 2018-01-19  Martin Liska  <mliska@suse.cz>
938
939         * predict.c (dump_prediction): Add new format for
940         analyze_brprob.py script which is enabled with -details
941         suboption.
942         * profile-count.h (precise_p): New function.
943
944 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
945
946         PR tree-optimization/83922
947         * tree-vect-loop.c (vect_verify_full_masking): Return false if
948         there are no statements that need masking.
949         (vect_active_double_reduction_p): New function.
950         (vect_analyze_loop_operations): Use it when handling phis that
951         are not in the loop header.
952
953 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
954
955         PR tree-optimization/83914
956         * tree-vect-loop.c (vectorizable_induction): Don't convert
957         init_expr or apply the peeling adjustment for inductions
958         that are nested within the vectorized loop.
959
960 2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
961
962         * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
963         instead of NEG.
964
965 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
966
967         PR sanitizer/81715
968         PR testsuite/83882
969         * function.h (gimplify_parameters): Add gimple_seq * argument.
970         * function.c: Include gimple.h and options.h.
971         (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
972         for the added local temporaries if needed.
973         * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
974         if there are any parameter cleanups, wrap whole body into a
975         try/finally with the cleanups.
976
977 2018-01-18  Wilco Dijkstra  <wdijkstr@arm.com>
978
979         PR target/82964
980         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
981         Use GET_MODE_CLASS for scalar floating point.
982
983 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
984
985         PR ipa/82256
986         patch by PaX Team
987         * cgraphclones.c (cgraph_node::create_version_clone_with_body):
988         Fix call of call_cgraph_insertion_hooks.
989
990 2018-01-18  Martin Sebor  <msebor@redhat.com>
991
992         * doc/invoke.texi (-Wclass-memaccess): Tweak text.
993
994 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
995
996         PR ipa/83619
997         * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
998         frequencies.
999
1000 2018-01-18  Boris Kolpackov  <boris@codesynthesis.com>
1001
1002         PR other/70268
1003         * common.opt: (-ffile-prefix-map): New option.
1004         * opts.c (common_handle_option): Defer it.
1005         * opts-global.c (handle_common_deferred_options): Handle it.
1006         * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
1007         * file-prefix-map.h: New file.
1008         (remap_debug_filename, add_debug_prefix_map): ...here.
1009         (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
1010         * final.c (debug_prefix_map, add_debug_prefix_map
1011         remap_debug_filename): Move to...
1012         * file-prefix-map.c: New file.
1013         (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
1014         generalize, get rid of alloca(), use strrchr() instead of strchr().
1015         (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
1016         Implement in terms of add_prefix_map().
1017         (remap_macro_filename, remap_debug_filename): Implement in term of
1018         remap_filename().
1019         * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
1020         * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
1021         * dbxout.c: Include file-prefix-map.h.
1022         * varasm.c: Likewise.
1023         * vmsdbgout.c: Likewise.
1024         * xcoffout.c: Likewise.
1025         * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
1026         * doc/cppopts.texi (-fmacro-prefix-map): Document.
1027         * doc/invoke.texi (-ffile-prefix-map): Document.
1028         (-fdebug-prefix-map): Update description.
1029
1030 2018-01-18  Martin Liska  <mliska@suse.cz>
1031
1032         * config/i386/i386.c (indirect_thunk_name): Document that also
1033         lfence is emitted.
1034         (output_indirect_thunk): Document why both instructions
1035         (pause and lfence) are generated.
1036
1037 2018-01-18  Richard Biener  <rguenther@suse.de>
1038
1039         PR tree-optimization/83887
1040         * graphite-scop-detection.c
1041         (scop_detection::get_nearest_dom_with_single_entry): Remove.
1042         (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
1043         (scop_detection::merge_sese): Re-implement with a flood-fill
1044         algorithm that properly finds a SESE region if it exists.
1045
1046 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
1047
1048         PR c/61240
1049         * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
1050         pointer_diff optimizations use view_convert instead of convert.
1051
1052 2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1053
1054         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
1055         Generate different code for -mno-speculate-indirect-jumps.
1056         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
1057         (*call_indirect_aix<mode>): Disable for
1058         -mno-speculate-indirect-jumps.
1059         (*call_indirect_aix<mode>_nospec): New define_insn.
1060         (*call_value_indirect_aix<mode>): Disable for
1061         -mno-speculate-indirect-jumps.
1062         (*call_value_indirect_aix<mode>_nospec): New define_insn.
1063         (*sibcall_nonlocal_sysv<mode>): Generate different code for
1064         -mno-speculate-indirect-jumps.
1065         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
1066
1067 2018-01-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
1068
1069         * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
1070         long double type, set the flags for noting the default long double
1071         type, even if we don't pass or return a long double type.
1072
1073 2018-01-17  Jan Hubicka  <hubicka@ucw.cz>
1074
1075         PR ipa/83051
1076         * ipa-inline.c (flatten_function): Do not overwrite final inlining
1077         failure.
1078
1079 2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>
1080
1081         * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
1082         support for merge[hl].
1083         (fold_mergehl_helper): New helper function.
1084         (tree-vector-builder.h): New #include for tree_vector_builder usage.
1085         * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
1086         (altivec_vmrglw_direct): Add xxmrglw insn.
1087
1088 2018-01-17  Andrew Waterman  <andrew@sifive.com>
1089
1090         * config/riscv/riscv.c (riscv_conditional_register_usage): If
1091         UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
1092
1093 2018-01-17  David Malcolm  <dmalcolm@redhat.com>
1094
1095         PR lto/83121
1096         * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
1097         call the lto_location_cache before reading the
1098         DECL_SOURCE_LOCATION of the types.
1099
1100 2018-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
1101             Richard Sandiford  <richard.sandiford@linaro.org>
1102
1103         * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
1104         * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
1105         (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
1106         SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
1107         * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
1108         Add declaration.
1109         * config/aarch64/constraints.md (aarch64_movti_operand):
1110         Limit immediates.
1111         * config/aarch64/predicates.md (Uti): Add new constraint.
1112
1113 2018-01-17 Carl Love  <cel@us.ibm.com>
1114         * config/rs6000/vsx.md (define_expand xl_len_r,
1115         define_expand stxvl, define_expand *stxvl): Add match_dup argument.
1116         (define_insn): Add, match_dup 1 argument to define_insn stxvll and
1117         lxvll.
1118         (define_expand, define_insn): Move the shift left from  the
1119         define_insn to the define_expand for lxvl and stxvl instructions.
1120         * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
1121         and XL_LEN_R definitions to PURE.
1122
1123 2018-01-17  Uros Bizjak  <ubizjak@gmail.com>
1124
1125         * config/i386/i386.c (indirect_thunk_name): Declare regno
1126         as unsigned int.  Compare regno with INVALID_REGNUM.
1127         (output_indirect_thunk): Ditto.
1128         (output_indirect_thunk_function): Ditto.
1129         (ix86_code_end): Declare regno as unsigned int.  Use INVALID_REGNUM
1130         in the call to output_indirect_thunk_function.
1131
1132 2018-01-17  Richard Sandiford  <richard.sandiford@linaro.org>
1133
1134         PR middle-end/83884
1135         * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
1136         rather than the size of inner_type to determine the stack slot size
1137         when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
1138
1139 2018-01-16  Sebastian Peryt  <sebastian.peryt@intel.com>
1140
1141         PR target/83546
1142         * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
1143         to PTA_SILVERMONT.
1144
1145 2018-01-16  Michael Meissner  <meissner@linux.vnet.ibm.com>
1146
1147         * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
1148         endian Linux systems to optionally enable multilibs for selecting
1149         the long double type if the user configured an explicit type.
1150         * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
1151         have no long double multilibs if not defined.
1152         * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
1153         warn if the user used -mabi={ieee,ibm}longdouble and we built
1154         multilibs for long double.
1155         * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
1156         appropriate multilib option.
1157         (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
1158         multilib options.
1159         * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
1160         for building long double multilibs.
1161         * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
1162
1163 2018-01-16  John David Anglin  <danglin@gcc.gnu.org>
1164
1165         * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
1166         copies.
1167
1168         * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
1169         64 bits.
1170         * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
1171         128 bits.
1172
1173         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
1174         variables.
1175
1176         * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
1177         return value.
1178
1179 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
1180
1181         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
1182         ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
1183
1184 2018-01-16  Kelvin Nilsen  <kelvin@gcc.gnu.org>
1185
1186         * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
1187         different rtl trees depending on TARGET_64BIT.
1188         (rs6000_gen_lvx): Likewise.
1189
1190 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
1191
1192         * config/visium/visium.md (nop): Tweak comment.
1193         (hazard_nop): Likewise.
1194
1195 2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1196
1197         * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
1198         -mspeculate-indirect-jumps.
1199         * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
1200         for -mno-speculate-indirect-jumps.
1201         (*call_indirect_elfv2<mode>_nospec): New define_insn.
1202         (*call_value_indirect_elfv2<mode>): Disable for
1203         -mno-speculate-indirect-jumps.
1204         (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
1205         (indirect_jump): Emit different RTL for
1206         -mno-speculate-indirect-jumps.
1207         (*indirect_jump<mode>): Disable for
1208         -mno-speculate-indirect-jumps.
1209         (*indirect_jump<mode>_nospec): New define_insn.
1210         (tablejump): Emit different RTL for
1211         -mno-speculate-indirect-jumps.
1212         (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
1213         (tablejumpsi_nospec): New define_expand.
1214         (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
1215         (tablejumpdi_nospec): New define_expand.
1216         (*tablejump<mode>_internal1): Disable for
1217         -mno-speculate-indirect-jumps.
1218         (*tablejump<mode>_internal1_nospec): New define_insn.
1219         * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
1220         option.
1221
1222 2018-01-16  Artyom Skrobov tyomitch@gmail.com
1223
1224         * caller-save.c (insert_save): Drop unnecessary parameter.  All
1225         callers updated.
1226
1227 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1228             Richard Biener  <rguenth@suse.de>
1229
1230         PR libgomp/83590
1231         * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
1232         return early, inline manually is_gimple_sizepos.  Make sure if we
1233         call gimplify_expr we don't end up with a gimple constant.
1234         * tree.c (variably_modified_type_p): Don't return true for
1235         is_gimple_constant (_t).  Inline manually is_gimple_sizepos.
1236         * gimplify.h (is_gimple_sizepos): Remove.
1237
1238 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1239
1240         PR tree-optimization/83857
1241         * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
1242         vectorizable_live_operation for pure SLP statements.
1243         (vectorizable_live_operation): Handle PHIs.
1244
1245 2018-01-16  Richard Biener  <rguenther@suse.de>
1246
1247         PR tree-optimization/83867
1248         * tree-vect-stmts.c (vect_transform_stmt): Precompute
1249         nested_in_vect_loop_p since the scalar stmt may get invalidated.
1250
1251 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1252
1253         PR c/83844
1254         * stor-layout.c (handle_warn_if_not_align): Use byte_position and
1255         multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
1256         If off is not INTEGER_CST, issue a may not be aligned warning
1257         rather than isn't aligned.  Use isn%'t rather than isn't.
1258         * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
1259         into MULT_EXPR.
1260         <case MULT_EXPR>: Improve the case when bottom and one of the
1261         MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
1262         operand, in that case check if the other operand is multiple of
1263         bottom divided by the INTEGER_CST operand.
1264
1265 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1266
1267         PR target/83858
1268         * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
1269         * config/pa/pa-protos.h (pa_function_arg_size): Declare.
1270         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
1271         pa_function_arg_size instead of FUNCTION_ARG_SIZE.
1272         * config/pa/pa.c (pa_function_arg_advance): Likewise.
1273         (pa_function_arg, pa_arg_partial_bytes): Likewise.
1274         (pa_function_arg_size): New function.
1275
1276 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1277
1278         * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
1279         in a separate statement.
1280
1281 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1282
1283         PR tree-optimization/83847
1284         * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
1285         group gathers and scatters.
1286
1287 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1288
1289         PR rtl-optimization/86620
1290         * params.def (max-sched-ready-insns): Bump minimum value to 1.
1291
1292         PR rtl-optimization/83213
1293         * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
1294         to last if both are JUMP_INSNs.
1295
1296         PR tree-optimization/83843
1297         * gimple-ssa-store-merging.c
1298         (imm_store_chain_info::output_merged_store): Handle bit_not_p on
1299         store_immediate_info for bswap/nop orig_stores.
1300
1301 2018-01-15  Andrew Waterman  <andrew@sifive.com>
1302
1303         * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
1304         !TARGET_MUL.
1305         <UDIV>: Increase cost if !TARGET_DIV.
1306
1307 2018-01-15  Segher Boessenkool  <segher@kernel.crashing.org>
1308
1309         * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
1310         (define_attr "cr_logical_3op"): New.
1311         (cceq_ior_compare): Adjust.
1312         (cceq_ior_compare_complement): Adjust.
1313         (*cceq_rev_compare): Adjust.
1314         * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
1315         (is_cracked_insn): Adjust.
1316         (insn_must_be_first_in_group): Adjust.
1317         * config/rs6000/40x.md: Adjust.
1318         * config/rs6000/440.md: Adjust.
1319         * config/rs6000/476.md: Adjust.
1320         * config/rs6000/601.md: Adjust.
1321         * config/rs6000/603.md: Adjust.
1322         * config/rs6000/6xx.md: Adjust.
1323         * config/rs6000/7450.md: Adjust.
1324         * config/rs6000/7xx.md: Adjust.
1325         * config/rs6000/8540.md: Adjust.
1326         * config/rs6000/cell.md: Adjust.
1327         * config/rs6000/e300c2c3.md: Adjust.
1328         * config/rs6000/e500mc.md: Adjust.
1329         * config/rs6000/e500mc64.md: Adjust.
1330         * config/rs6000/e5500.md: Adjust.
1331         * config/rs6000/e6500.md: Adjust.
1332         * config/rs6000/mpc.md: Adjust.
1333         * config/rs6000/power4.md: Adjust.
1334         * config/rs6000/power5.md: Adjust.
1335         * config/rs6000/power6.md: Adjust.
1336         * config/rs6000/power7.md: Adjust.
1337         * config/rs6000/power8.md: Adjust.
1338         * config/rs6000/power9.md: Adjust.
1339         * config/rs6000/rs64.md: Adjust.
1340         * config/rs6000/titan.md: Adjust.
1341
1342 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1343
1344         * config/i386/predicates.md (indirect_branch_operand): Rewrite
1345         ix86_indirect_branch_register logic.
1346
1347 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1348
1349         * config/i386/constraints.md (Bs): Update
1350         ix86_indirect_branch_register check.  Don't check
1351         ix86_indirect_branch_register with GOT_memory_operand.
1352         (Bw): Likewise.
1353         * config/i386/predicates.md (GOT_memory_operand): Don't check
1354         ix86_indirect_branch_register here.
1355         (GOT32_symbol_operand): Likewise.
1356
1357 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1358
1359         * config/i386/predicates.md (constant_call_address_operand):
1360         Rewrite ix86_indirect_branch_register logic.
1361         (sibcall_insn_operand): Likewise.
1362
1363 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1364
1365         * config/i386/constraints.md (Bs): Replace
1366         ix86_indirect_branch_thunk_register with
1367         ix86_indirect_branch_register.
1368         (Bw): Likewise.
1369         * config/i386/i386.md (indirect_jump): Likewise.
1370         (tablejump): Likewise.
1371         (*sibcall_memory): Likewise.
1372         (*sibcall_value_memory): Likewise.
1373         Peepholes of indirect call and jump via memory: Likewise.
1374         * config/i386/i386.opt: Likewise.
1375         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1376         (GOT_memory_operand): Likewise.
1377         (call_insn_operand): Likewise.
1378         (sibcall_insn_operand): Likewise.
1379         (GOT32_symbol_operand): Likewise.
1380
1381 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1382
1383         PR middle-end/83837
1384         * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
1385         type rather than type addr's type points to.
1386         (expand_omp_atomic_mutex): Likewise.
1387         (expand_omp_atomic): Likewise.
1388
1389 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1390
1391         PR target/83839
1392         * config/i386/i386.c (output_indirect_thunk_function): Use
1393         ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
1394         for  __x86_return_thunk.
1395
1396 2018-01-15  Richard Biener  <rguenther@suse.de>
1397
1398         PR middle-end/83850
1399         * expmed.c (extract_bit_field_1): Fix typo.
1400
1401 2018-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1402
1403         PR target/83687
1404         * config/arm/iterators.md (VF): New mode iterator.
1405         * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
1406         Remove integer-related logic from pattern.
1407         (neon_vabd<mode>_3): Likewise.
1408
1409 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1410
1411         PR middle-end/82694
1412         * common.opt (fstrict-overflow): No longer an alias.
1413         (fwrapv-pointer): New option.
1414         * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
1415         also for pointer types based on flag_wrapv_pointer.
1416         * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
1417         opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
1418         opts->x_flag_wrapv got set.
1419         * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
1420         changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
1421         POINTER_TYPE_OVERFLOW_UNDEFINED.
1422         * match.pd: Likewise in address comparison pattern.
1423         * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
1424
1425 2018-01-15  Richard Biener  <rguenther@suse.de>
1426
1427         PR lto/83804
1428         * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
1429         from TYPE_FIELDS.  Free TYPE_BINFO if not used by devirtualization.
1430         Reset type names to their identifier if their TYPE_DECL doesn't
1431         have linkage (and thus is used for ODR and devirt).
1432         (save_debug_info_for_decl): Remove.
1433         (save_debug_info_for_type): Likewise.
1434         (add_tree_to_fld_list): Adjust.
1435         * tree-pretty-print.c (dump_generic_node): Make dumping of
1436         type names more robust.
1437
1438 2018-01-15  Richard Biener  <rguenther@suse.de>
1439
1440         * BASE-VER: Bump to 8.0.1.
1441
1442 2018-01-14  Martin Sebor  <msebor@redhat.com>
1443
1444         PR other/83508
1445         * builtins.c (check_access): Avoid warning when the no-warning bit
1446         is set.
1447
1448 2018-01-14  Cory Fields  <cory-nospam-@coryfields.com>
1449
1450         * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
1451         * ira-color (allocno_hard_regs_compare): Likewise.
1452
1453 2018-01-14  Nathan Rossi  <nathan@nathanrossi.com>
1454
1455         PR target/83013
1456         * config/microblaze/microblaze.c (microblaze_asm_output_ident):
1457         Use .pushsection/.popsection.
1458
1459 2018-01-14  Martin Sebor  <msebor@redhat.com>
1460
1461         PR c++/81327
1462         * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
1463
1464 2018-01-14  Jakub Jelinek  <jakub@redhat.com>
1465
1466         * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
1467         entry from extra_headers.
1468         (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
1469         extra_headers, make the list bitwise identical to the i?86-*-* one.
1470
1471 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1472
1473         * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
1474         -mcmodel=large with -mindirect-branch=thunk,
1475         -mindirect-branch=thunk-extern, -mfunction-return=thunk and
1476         -mfunction-return=thunk-extern.
1477         * doc/invoke.texi: Document -mcmodel=large is incompatible with
1478         -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
1479         -mfunction-return=thunk and -mfunction-return=thunk-extern.
1480
1481 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1482
1483         * config/i386/i386.c (print_reg): Print the name of the full
1484         integer register without '%'.
1485         (ix86_print_operand): Handle 'V'.
1486          * doc/extend.texi: Document 'V' modifier.
1487
1488 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1489
1490         * config/i386/constraints.md (Bs): Disallow memory operand for
1491         -mindirect-branch-register.
1492         (Bw): Likewise.
1493         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1494         (GOT_memory_operand): Likewise.
1495         (call_insn_operand): Likewise.
1496         (sibcall_insn_operand): Likewise.
1497         (GOT32_symbol_operand): Likewise.
1498         * config/i386/i386.md (indirect_jump): Call convert_memory_address
1499         for -mindirect-branch-register.
1500         (tablejump): Likewise.
1501         (*sibcall_memory): Likewise.
1502         (*sibcall_value_memory): Likewise.
1503         Disallow peepholes of indirect call and jump via memory for
1504         -mindirect-branch-register.
1505         (*call_pop): Replace m with Bw.
1506         (*call_value_pop): Likewise.
1507         (*sibcall_pop_memory): Replace m with Bs.
1508         * config/i386/i386.opt (mindirect-branch-register): New option.
1509         * doc/invoke.texi: Document -mindirect-branch-register option.
1510
1511 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1512
1513         * config/i386/i386-protos.h (ix86_output_function_return): New.
1514         * config/i386/i386.c (ix86_set_indirect_branch_type): Also
1515         set function_return_type.
1516         (indirect_thunk_name): Add ret_p to indicate thunk for function
1517         return.
1518         (output_indirect_thunk_function): Pass false to
1519         indirect_thunk_name.
1520         (ix86_output_indirect_branch_via_reg): Likewise.
1521         (ix86_output_indirect_branch_via_push): Likewise.
1522         (output_indirect_thunk_function): Create alias for function
1523         return thunk if regno < 0.
1524         (ix86_output_function_return): New function.
1525         (ix86_handle_fndecl_attribute): Handle function_return.
1526         (ix86_attribute_table): Add function_return.
1527         * config/i386/i386.h (machine_function): Add
1528         function_return_type.
1529         * config/i386/i386.md (simple_return_internal): Use
1530         ix86_output_function_return.
1531         (simple_return_internal_long): Likewise.
1532         * config/i386/i386.opt (mfunction-return=): New option.
1533         (indirect_branch): Mention -mfunction-return=.
1534         * doc/extend.texi: Document function_return function attribute.
1535         * doc/invoke.texi: Document -mfunction-return= option.
1536
1537 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1538
1539         * config/i386/i386-opts.h (indirect_branch): New.
1540         * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
1541         * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
1542         with local indirect jump when converting indirect call and jump.
1543         (ix86_set_indirect_branch_type): New.
1544         (ix86_set_current_function): Call ix86_set_indirect_branch_type.
1545         (indirectlabelno): New.
1546         (indirect_thunk_needed): Likewise.
1547         (indirect_thunk_bnd_needed): Likewise.
1548         (indirect_thunks_used): Likewise.
1549         (indirect_thunks_bnd_used): Likewise.
1550         (INDIRECT_LABEL): Likewise.
1551         (indirect_thunk_name): Likewise.
1552         (output_indirect_thunk): Likewise.
1553         (output_indirect_thunk_function): Likewise.
1554         (ix86_output_indirect_branch_via_reg): Likewise.
1555         (ix86_output_indirect_branch_via_push): Likewise.
1556         (ix86_output_indirect_branch): Likewise.
1557         (ix86_output_indirect_jmp): Likewise.
1558         (ix86_code_end): Call output_indirect_thunk_function if needed.
1559         (ix86_output_call_insn): Call ix86_output_indirect_branch if
1560         needed.
1561         (ix86_handle_fndecl_attribute): Handle indirect_branch.
1562         (ix86_attribute_table): Add indirect_branch.
1563         * config/i386/i386.h (machine_function): Add indirect_branch_type
1564         and has_local_indirect_jump.
1565         * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
1566         to true.
1567         (tablejump): Likewise.
1568         (*indirect_jump): Use ix86_output_indirect_jmp.
1569         (*tablejump_1): Likewise.
1570         (simple_return_indirect_internal): Likewise.
1571         * config/i386/i386.opt (mindirect-branch=): New option.
1572         (indirect_branch): New.
1573         (keep): Likewise.
1574         (thunk): Likewise.
1575         (thunk-inline): Likewise.
1576         (thunk-extern): Likewise.
1577         * doc/extend.texi: Document indirect_branch function attribute.
1578         * doc/invoke.texi: Document -mindirect-branch= option.
1579
1580 2018-01-14  Jan Hubicka  <hubicka@ucw.cz>
1581
1582         PR ipa/83051
1583         * ipa-inline.c (edge_badness): Tolerate roundoff errors.
1584
1585 2018-01-14  Richard Sandiford  <richard.sandiford@linaro.org>
1586
1587         * ipa-inline.c (want_inline_small_function_p): Return false if
1588         inlining has already failed with CIF_FINAL_ERROR.
1589         (update_caller_keys): Call want_inline_small_function_p before
1590         can_inline_edge_p.
1591         (update_callee_keys): Likewise.
1592
1593 2018-01-10  Kelvin Nilsen  <kelvin@gcc.gnu.org>
1594
1595         * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
1596         New function.
1597         (rs6000_quadword_masked_address_p): Likewise.
1598         (quad_aligned_load_p): Likewise.
1599         (quad_aligned_store_p): Likewise.
1600         (const_load_sequence_p): Add comment to describe the outer-most loop.
1601         (mimic_memory_attributes_and_flags): New function.
1602         (rs6000_gen_stvx): Likewise.
1603         (replace_swapped_aligned_store): Likewise.
1604         (rs6000_gen_lvx): Likewise.
1605         (replace_swapped_aligned_load): Likewise.
1606         (replace_swapped_load_constant): Capitalize argument name in
1607         comment describing this function.
1608         (rs6000_analyze_swaps): Add a third pass to search for vector loads
1609         and stores that access quad-word aligned addresses and replace
1610         with stvx or lvx instructions when appropriate.
1611         * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
1612         New function prototype.
1613         (rs6000_quadword_masked_address_p): Likewise.
1614         (rs6000_gen_lvx): Likewise.
1615         (rs6000_gen_stvx): Likewise.
1616         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
1617         VSX_D (V2DF, V2DI), modify this split to select lvx instruction
1618         when memory address is aligned.
1619         (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
1620         this split to select lvx instruction when memory address is aligned.
1621         (*vsx_le_perm_load_v8hi): Modify this split to select lvx
1622         instruction when memory address is aligned.
1623         (*vsx_le_perm_load_v16qi): Likewise.
1624         (four unnamed splitters): Modify to select the stvx instruction
1625         when memory is aligned.
1626
1627 2018-01-13  Jan Hubicka  <hubicka@ucw.cz>
1628
1629         * predict.c (determine_unlikely_bbs): Handle correctly BBs
1630         which appears in the queue multiple times.
1631
1632 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1633             Alan Hayward  <alan.hayward@arm.com>
1634             David Sherwood  <david.sherwood@arm.com>
1635
1636         * tree-vectorizer.h (vec_lower_bound): New structure.
1637         (_loop_vec_info): Add check_nonzero and lower_bounds.
1638         (LOOP_VINFO_CHECK_NONZERO): New macro.
1639         (LOOP_VINFO_LOWER_BOUNDS): Likewise.
1640         (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
1641         * tree-data-ref.h (dr_with_seg_len): Add access_size and align
1642         fields.  Make seg_len the distance travelled, not including the
1643         access size.
1644         (dr_direction_indicator): Declare.
1645         (dr_zero_step_indicator): Likewise.
1646         (dr_known_forward_stride_p): Likewise.
1647         * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
1648         tree-ssanames.h.
1649         (runtime_alias_check_p): Allow runtime alias checks with
1650         variable strides.
1651         (operator ==): Compare access_size and align.
1652         (prune_runtime_alias_test_list): Rework for new distinction between
1653         the access_size and seg_len.
1654         (create_intersect_range_checks_index): Likewise.  Cope with polynomial
1655         segment lengths.
1656         (get_segment_min_max): New function.
1657         (create_intersect_range_checks): Use it.
1658         (dr_step_indicator): New function.
1659         (dr_direction_indicator): Likewise.
1660         (dr_zero_step_indicator): Likewise.
1661         (dr_known_forward_stride_p): Likewise.
1662         * tree-loop-distribution.c (data_ref_segment_size): Return
1663         DR_STEP * (niters - 1).
1664         (compute_alias_check_pairs): Update call to the dr_with_seg_len
1665         constructor.
1666         * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
1667         (vect_preserves_scalar_order_p): New function, split out from...
1668         (vect_analyze_data_ref_dependence): ...here.  Check for zero steps.
1669         (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
1670         (vect_vfa_access_size): New function.
1671         (vect_vfa_align): Likewise.
1672         (vect_compile_time_alias): Take access_size_a and access_b arguments.
1673         (dump_lower_bound): New function.
1674         (vect_check_lower_bound): Likewise.
1675         (vect_small_gap_p): Likewise.
1676         (vectorizable_with_step_bound_p): Likewise.
1677         (vect_prune_runtime_alias_test_list): Ignore cross-iteration
1678         depencies if the vectorization factor is 1.  Convert the checks
1679         for nonzero steps into checks on the bounds of DR_STEP.  Try using
1680         a bunds check for variable steps if the minimum required step is
1681         relatively small. Update calls to the dr_with_seg_len
1682         constructor and to vect_compile_time_alias.
1683         * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
1684         function.
1685         (vect_loop_versioning): Call it.
1686         * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
1687         when retrying.
1688         (vect_estimate_min_profitable_iters): Account for any bounds checks.
1689
1690 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1691             Alan Hayward  <alan.hayward@arm.com>
1692             David Sherwood  <david.sherwood@arm.com>
1693
1694         * doc/sourcebuild.texi (vect_scatter_store): Document.
1695         * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
1696         optabs.
1697         * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
1698         Document.
1699         * genopinit.c (main): Add supports_vec_scatter_store and
1700         supports_vec_scatter_store_cached to target_optabs.
1701         * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
1702         IFN_MASK_SCATTER_STORE.
1703         * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
1704         functions.
1705         * internal-fn.h (internal_store_fn_p): Declare.
1706         (internal_fn_stored_value_index): Likewise.
1707         * internal-fn.c (scatter_store_direct): New macro.
1708         (expand_scatter_store_optab_fn): New function.
1709         (direct_scatter_store_optab_supported_p): New macro.
1710         (internal_store_fn_p): New function.
1711         (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
1712         IFN_MASK_SCATTER_STORE.
1713         (internal_fn_mask_index): Likewise.
1714         (internal_fn_stored_value_index): New function.
1715         (internal_gather_scatter_fn_supported_p): Adjust operand numbers
1716         for scatter stores.
1717         * optabs-query.h (supports_vec_scatter_store_p): Declare.
1718         * optabs-query.c (supports_vec_scatter_store_p): New function.
1719         * tree-vectorizer.h (vect_get_store_rhs): Declare.
1720         * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
1721         true for scatter stores.
1722         (vect_gather_scatter_fn_p): Handle scatter stores too.
1723         (vect_check_gather_scatter): Consider using scatter stores if
1724         supports_vec_scatter_store_p.
1725         * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
1726         scatter stores too.
1727         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1728         internal_fn_stored_value_index.
1729         (check_load_store_masking): Handle scatter stores too.
1730         (vect_get_store_rhs): Make public.
1731         (vectorizable_call): Use internal_store_fn_p.
1732         (vectorizable_store): Handle scatter store internal functions.
1733         (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
1734         when deciding whether the end of the group has been reached.
1735         * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
1736         * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
1737         (mask_scatter_store<mode>): New insns.
1738
1739 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1740             Alan Hayward  <alan.hayward@arm.com>
1741             David Sherwood  <david.sherwood@arm.com>
1742
1743         * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
1744         * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
1745         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
1746         function.
1747         (vect_use_strided_gather_scatters_p): Take a masked_p argument.
1748         Use vect_truncate_gather_scatter_offset if we can't treat the
1749         operation as a normal gather load or scatter store.
1750         (get_group_load_store_type): Take the gather_scatter_info
1751         as argument.  Try using a gather load or scatter store for
1752         single-element groups.
1753         (get_load_store_type): Update calls to get_group_load_store_type
1754         and vect_use_strided_gather_scatters_p.
1755
1756 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1757             Alan Hayward  <alan.hayward@arm.com>
1758             David Sherwood  <david.sherwood@arm.com>
1759
1760         * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
1761         optional tree argument.
1762         * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
1763         null target hooks.
1764         (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
1765         but continue to use the current value as a fallback.
1766         (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
1767         to compare the updates.
1768         * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
1769         (get_load_store_type): Use it when handling a strided access.
1770         (vect_get_strided_load_store_ops): New function.
1771         (vect_get_data_ptr_increment): Likewise.
1772         (vectorizable_load): Handle strided gather loads.  Always pass
1773         a step to vect_create_data_ref_ptr and bump_vector_ptr.
1774
1775 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1776             Alan Hayward  <alan.hayward@arm.com>
1777             David Sherwood  <david.sherwood@arm.com>
1778
1779         * doc/md.texi (gather_load@var{m}): Document.
1780         (mask_gather_load@var{m}): Likewise.
1781         * genopinit.c (main): Add supports_vec_gather_load and
1782         supports_vec_gather_load_cached to target_optabs.
1783         * optabs-tree.c (init_tree_optimization_optabs): Use
1784         ggc_cleared_alloc to allocate target_optabs.
1785         * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
1786         * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
1787         functions.
1788         * internal-fn.h (internal_load_fn_p): Declare.
1789         (internal_gather_scatter_fn_p): Likewise.
1790         (internal_fn_mask_index): Likewise.
1791         (internal_gather_scatter_fn_supported_p): Likewise.
1792         * internal-fn.c (gather_load_direct): New macro.
1793         (expand_gather_load_optab_fn): New function.
1794         (direct_gather_load_optab_supported_p): New macro.
1795         (direct_internal_fn_optab): New function.
1796         (internal_load_fn_p): Likewise.
1797         (internal_gather_scatter_fn_p): Likewise.
1798         (internal_fn_mask_index): Likewise.
1799         (internal_gather_scatter_fn_supported_p): Likewise.
1800         * optabs-query.c (supports_at_least_one_mode_p): New function.
1801         (supports_vec_gather_load_p): Likewise.
1802         * optabs-query.h (supports_vec_gather_load_p): Declare.
1803         * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
1804         and memory_type field.
1805         (NUM_PATTERNS): Bump to 15.
1806         * tree-vect-data-refs.c: Include internal-fn.h.
1807         (vect_gather_scatter_fn_p): New function.
1808         (vect_describe_gather_scatter_call): Likewise.
1809         (vect_check_gather_scatter): Try using internal functions for
1810         gather loads.  Recognize existing calls to a gather load function.
1811         (vect_analyze_data_refs): Consider using gather loads if
1812         supports_vec_gather_load_p.
1813         * tree-vect-patterns.c (vect_get_load_store_mask): New function.
1814         (vect_get_gather_scatter_offset_type): Likewise.
1815         (vect_convert_mask_for_vectype): Likewise.
1816         (vect_add_conversion_to_patterm): Likewise.
1817         (vect_try_gather_scatter_pattern): Likewise.
1818         (vect_recog_gather_scatter_pattern): New pattern recognizer.
1819         (vect_vect_recog_func_ptrs): Add it.
1820         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1821         internal_fn_mask_index and internal_gather_scatter_fn_p.
1822         (check_load_store_masking): Take the gather_scatter_info as an
1823         argument and handle gather loads.
1824         (vect_get_gather_scatter_ops): New function.
1825         (vectorizable_call): Check internal_load_fn_p.
1826         (vectorizable_load): Likewise.  Handle gather load internal
1827         functions.
1828         (vectorizable_store): Update call to check_load_store_masking.
1829         * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
1830         * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
1831         * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
1832         (aarch64_gather_scale_operand_d): New predicates.
1833         * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
1834         (mask_gather_load<mode>): New insns.
1835
1836 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1837             Alan Hayward  <alan.hayward@arm.com>
1838             David Sherwood  <david.sherwood@arm.com>
1839
1840         * optabs.def (fold_left_plus_optab): New optab.
1841         * doc/md.texi (fold_left_plus_@var{m}): Document.
1842         * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
1843         * internal-fn.c (fold_left_direct): Define.
1844         (expand_fold_left_optab_fn): Likewise.
1845         (direct_fold_left_optab_supported_p): Likewise.
1846         * fold-const-call.c (fold_const_fold_left): New function.
1847         (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
1848         * tree-parloops.c (valid_reduction_p): New function.
1849         (gather_scalar_reductions): Use it.
1850         * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
1851         (vect_finish_replace_stmt): Declare.
1852         * tree-vect-loop.c (fold_left_reduction_fn): New function.
1853         (needs_fold_left_reduction_p): New function, split out from...
1854         (vect_is_simple_reduction): ...here.  Accept reductions that
1855         forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
1856         (vect_force_simple_reduction): Also store the reduction type in
1857         the assignment's STMT_VINFO_REDUC_TYPE.
1858         (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
1859         (merge_with_identity): New function.
1860         (vect_expand_fold_left): Likewise.
1861         (vectorize_fold_left_reduction): Likewise.
1862         (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION.  Leave the
1863         scalar phi in place for it.  Check for target support and reject
1864         cases that would reassociate the operation.  Defer the transform
1865         phase to vectorize_fold_left_reduction.
1866         * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
1867         * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
1868         (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
1869
1870 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1871
1872         * tree-if-conv.c (predicate_mem_writes): Remove redundant
1873         call to ifc_temp_var.
1874
1875 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1876             Alan Hayward  <alan.hayward@arm.com>
1877             David Sherwood  <david.sherwood@arm.com>
1878
1879         * target.def (legitimize_address_displacement): Take the original
1880         offset as a poly_int.
1881         * targhooks.h (default_legitimize_address_displacement): Update
1882         accordingly.
1883         * targhooks.c (default_legitimize_address_displacement): Likewise.
1884         * doc/tm.texi: Regenerate.
1885         * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
1886         as an argument, moving assert of ad->disp == ad->disp_term to...
1887         (process_address_1): ...here.  Update calls to base_plus_disp_to_reg.
1888         Try calling targetm.legitimize_address_displacement before expanding
1889         the address rather than afterwards, and adjust for the new interface.
1890         * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
1891         Match the new hook interface.  Handle SVE addresses.
1892         * config/sh/sh.c (sh_legitimize_address_displacement): Make the
1893         new hook interface.
1894
1895 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1896
1897         * Makefile.in (OBJS): Add early-remat.o.
1898         * target.def (select_early_remat_modes): New hook.
1899         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
1900         * doc/tm.texi: Regenerate.
1901         * targhooks.h (default_select_early_remat_modes): Declare.
1902         * targhooks.c (default_select_early_remat_modes): New function.
1903         * timevar.def (TV_EARLY_REMAT): New timevar.
1904         * passes.def (pass_early_remat): New pass.
1905         * tree-pass.h (make_pass_early_remat): Declare.
1906         * early-remat.c: New file.
1907         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
1908         function.
1909         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
1910
1911 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1912             Alan Hayward  <alan.hayward@arm.com>
1913             David Sherwood  <david.sherwood@arm.com>
1914
1915         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
1916         vfm1 with a bound_epilog parameter.
1917         (vect_do_peeling): Update calls accordingly, and move the prologue
1918         call earlier in the function.  Treat the base bound_epilog as 0 for
1919         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
1920         this base when peeling for gaps.
1921         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
1922         with fully-masked loops.
1923         (vect_estimate_min_profitable_iters): Handle the single peeled
1924         iteration in that case.
1925
1926 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1927             Alan Hayward  <alan.hayward@arm.com>
1928             David Sherwood  <david.sherwood@arm.com>
1929
1930         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
1931         single-element interleaving even if the size is not a power of 2.
1932         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
1933         accesses for single-element interleaving if the group size is
1934         not a power of 2.
1935
1936 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1937             Alan Hayward  <alan.hayward@arm.com>
1938             David Sherwood  <david.sherwood@arm.com>
1939
1940         * doc/md.texi (fold_extract_last_@var{m}): Document.
1941         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1942         * optabs.def (fold_extract_last_optab): New optab.
1943         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1944         * internal-fn.c (fold_extract_direct): New macro.
1945         (expand_fold_extract_optab_fn): Likewise.
1946         (direct_fold_extract_optab_supported_p): Likewise.
1947         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1948         * tree-vect-loop.c (vect_model_reduction_cost): Handle
1949         EXTRACT_LAST_REDUCTION.
1950         (get_initial_def_for_reduction): Do not create an initial vector
1951         for EXTRACT_LAST_REDUCTION reductions.
1952         (vectorizable_reduction): Leave the scalar phi in place for
1953         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
1954         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
1955         epilogue code for EXTRACT_LAST_REDUCTION and defer the
1956         transform phase to vectorizable_condition.
1957         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1958         split out from...
1959         (vect_finish_stmt_generation): ...here.
1960         (vect_finish_replace_stmt): New function.
1961         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1962         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1963         pattern.
1964         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1965
1966 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1967             Alan Hayward  <alan.hayward@arm.com>
1968             David Sherwood  <david.sherwood@arm.com>
1969
1970         * doc/md.texi (extract_last_@var{m}): Document.
1971         * optabs.def (extract_last_optab): New optab.
1972         * internal-fn.def (EXTRACT_LAST): New internal function.
1973         * internal-fn.c (cond_unary_direct): New macro.
1974         (expand_cond_unary_optab_fn): Likewise.
1975         (direct_cond_unary_optab_supported_p): Likewise.
1976         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1977         loops using EXTRACT_LAST.
1978         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1979         (extract_last_<mode>): ...this optab.
1980         (vec_extract<mode><Vel>): Update accordingly.
1981
1982 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1983             Alan Hayward  <alan.hayward@arm.com>
1984             David Sherwood  <david.sherwood@arm.com>
1985
1986         * target.def (empty_mask_is_expensive): New hook.
1987         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1988         * doc/tm.texi: Regenerate.
1989         * targhooks.h (default_empty_mask_is_expensive): Declare.
1990         * targhooks.c (default_empty_mask_is_expensive): New function.
1991         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1992         if the target says that empty masks are expensive.
1993         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1994         New function.
1995         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1996
1997 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1998             Alan Hayward  <alan.hayward@arm.com>
1999             David Sherwood  <david.sherwood@arm.com>
2000
2001         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
2002         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
2003         (vect_use_loop_mask_for_alignment_p): New function.
2004         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
2005         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
2006         niters_skip argument.  Make sure that the first niters_skip elements
2007         of the first iteration are inactive.
2008         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
2009         Update call to vect_set_loop_masks_directly.
2010         (get_misalign_in_elems): New function, split out from...
2011         (vect_gen_prolog_loop_niters): ...here.
2012         (vect_update_init_of_dr): Take a code argument that specifies whether
2013         the adjustment should be added or subtracted.
2014         (vect_update_init_of_drs): Likewise.
2015         (vect_prepare_for_masked_peels): New function.
2016         (vect_do_peeling): Skip prologue peeling if we're using a mask
2017         instead.  Update call to vect_update_inits_of_drs.
2018         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
2019         mask_skip_niters.
2020         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
2021         alignment.  Do not include the number of peeled iterations in
2022         the minimum threshold in that case.
2023         (vectorizable_induction): Adjust the start value down by
2024         LOOP_VINFO_MASK_SKIP_NITERS iterations.
2025         (vect_transform_loop): Call vect_prepare_for_masked_peels.
2026         Take the number of skipped iterations into account when calculating
2027         the loop bounds.
2028         * tree-vect-stmts.c (vect_gen_while_not): New function.
2029
2030 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2031             Alan Hayward  <alan.hayward@arm.com>
2032             David Sherwood  <david.sherwood@arm.com>
2033
2034         * doc/sourcebuild.texi (vect_fully_masked): Document.
2035         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
2036         default value to 0.
2037         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
2038         split out from...
2039         (vect_analyze_loop_2): ...here. Don't check the vectorization
2040         factor against the number of loop iterations if the loop is
2041         fully-masked.
2042
2043 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2044             Alan Hayward  <alan.hayward@arm.com>
2045             David Sherwood  <david.sherwood@arm.com>
2046
2047         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
2048         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
2049         (dump_groups): Update accordingly.
2050         (iv_use::mem_type): New member variable.
2051         (address_p): New function.
2052         (record_use): Add a mem_type argument and initialize the new
2053         mem_type field.
2054         (record_group_use): Add a mem_type argument.  Use address_p.
2055         Remove obsolete null checks of base_object.  Update call to record_use.
2056         (find_interesting_uses_op): Update call to record_group_use.
2057         (find_interesting_uses_cond): Likewise.
2058         (find_interesting_uses_address): Likewise.
2059         (get_mem_type_for_internal_fn): New function.
2060         (find_address_like_use): Likewise.
2061         (find_interesting_uses_stmt): Try find_address_like_use before
2062         calling find_interesting_uses_op.
2063         (addr_offset_valid_p): Use the iv mem_type field as the type
2064         of the addressed memory.
2065         (add_autoinc_candidates): Likewise.
2066         (get_address_cost): Likewise.
2067         (split_small_address_groups_p): Use address_p.
2068         (split_address_groups): Likewise.
2069         (add_iv_candidate_for_use): Likewise.
2070         (autoinc_possible_for_pair): Likewise.
2071         (rewrite_groups): Likewise.
2072         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
2073         (determine_group_iv_cost): Update after split of USE_ADDRESS.
2074         (get_alias_ptr_type_for_ptr_address): New function.
2075         (rewrite_use_address): Rewrite address uses in calls that were
2076         identified by find_address_like_use.
2077
2078 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2079             Alan Hayward  <alan.hayward@arm.com>
2080             David Sherwood  <david.sherwood@arm.com>
2081
2082         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
2083         TARGET_MEM_REFs.
2084         * gimple-expr.h (is_gimple_addressable: Likewise.
2085         * gimple-expr.c (is_gimple_address): Likewise.
2086         * internal-fn.c (expand_call_mem_ref): New function.
2087         (expand_mask_load_optab_fn): Use it.
2088         (expand_mask_store_optab_fn): Likewise.
2089
2090 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2091             Alan Hayward  <alan.hayward@arm.com>
2092             David Sherwood  <david.sherwood@arm.com>
2093
2094         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
2095         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
2096         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
2097         (cond_umax@var{mode}): Document.
2098         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
2099         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
2100         (cond_umin_optab, cond_umax_optab): New optabs.
2101         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
2102         (COND_IOR, COND_XOR): New internal functions.
2103         * internal-fn.h (get_conditional_internal_fn): Declare.
2104         * internal-fn.c (cond_binary_direct): New macro.
2105         (expand_cond_binary_optab_fn): Likewise.
2106         (direct_cond_binary_optab_supported_p): Likewise.
2107         (get_conditional_internal_fn): New function.
2108         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
2109         Cope with reduction statements that are vectorized as calls rather
2110         than assignments.
2111         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
2112         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
2113         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
2114         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
2115         (UNSPEC_COND_EOR): New unspecs.
2116         (optab): Add mappings for them.
2117         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
2118         (sve_int_op, sve_fp_op): New int attributes.
2119
2120 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2121             Alan Hayward  <alan.hayward@arm.com>
2122             David Sherwood  <david.sherwood@arm.com>
2123
2124         * optabs.def (while_ult_optab): New optab.
2125         * doc/md.texi (while_ult@var{m}@var{n}): Document.
2126         * internal-fn.def (WHILE_ULT): New internal function.
2127         * internal-fn.h (direct_internal_fn_supported_p): New override
2128         that takes two types as argument.
2129         * internal-fn.c (while_direct): New macro.
2130         (expand_while_optab_fn): New function.
2131         (convert_optab_supported_p): Likewise.
2132         (direct_while_optab_supported_p): New macro.
2133         * wide-int.h (wi::udiv_ceil): New function.
2134         * tree-vectorizer.h (rgroup_masks): New structure.
2135         (vec_loop_masks): New typedef.
2136         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
2137         and fully_masked_p.
2138         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
2139         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
2140         (vect_max_vf): New function.
2141         (slpeel_make_loop_iterate_ntimes): Delete.
2142         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
2143         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
2144         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
2145         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
2146         internal-fn.h, stor-layout.h and optabs-query.h.
2147         (vect_set_loop_mask): New function.
2148         (add_preheader_seq): Likewise.
2149         (add_header_seq): Likewise.
2150         (interleave_supported_p): Likewise.
2151         (vect_maybe_permute_loop_masks): Likewise.
2152         (vect_set_loop_masks_directly): Likewise.
2153         (vect_set_loop_condition_masked): Likewise.
2154         (vect_set_loop_condition_unmasked): New function, split out from
2155         slpeel_make_loop_iterate_ntimes.
2156         (slpeel_make_loop_iterate_ntimes): Rename to..
2157         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
2158         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
2159         (vect_do_peeling): Update call accordingly.
2160         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
2161         loops.
2162         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
2163         mask_compare_type, can_fully_mask_p and fully_masked_p.
2164         (release_vec_loop_masks): New function.
2165         (_loop_vec_info): Use it to free the loop masks.
2166         (can_produce_all_loop_masks_p): New function.
2167         (vect_get_max_nscalars_per_iter): Likewise.
2168         (vect_verify_full_masking): Likewise.
2169         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
2170         retries, and free the mask rgroups before retrying.  Check loop-wide
2171         reasons for disallowing fully-masked loops.  Make the final decision
2172         about whether use a fully-masked loop or not.
2173         (vect_estimate_min_profitable_iters): Do not assume that peeling
2174         for the number of iterations will be needed for fully-masked loops.
2175         (vectorizable_reduction): Disable fully-masked loops.
2176         (vectorizable_live_operation): Likewise.
2177         (vect_halve_mask_nunits): New function.
2178         (vect_double_mask_nunits): Likewise.
2179         (vect_record_loop_mask): Likewise.
2180         (vect_get_loop_mask): Likewise.
2181         (vect_transform_loop): Handle the case in which the final loop
2182         iteration might handle a partial vector.  Call vect_set_loop_condition
2183         instead of slpeel_make_loop_iterate_ntimes.
2184         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
2185         (check_load_store_masking): New function.
2186         (prepare_load_store_mask): Likewise.
2187         (vectorizable_store): Handle fully-masked loops.
2188         (vectorizable_load): Likewise.
2189         (supportable_widening_operation): Use vect_halve_mask_nunits for
2190         booleans.
2191         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
2192         (vect_gen_while): New function.
2193         * config/aarch64/aarch64.md (umax<mode>3): New expander.
2194         (aarch64_uqdec<mode>): New insn.
2195
2196 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2197             Alan Hayward  <alan.hayward@arm.com>
2198             David Sherwood  <david.sherwood@arm.com>
2199
2200         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
2201         (reduc_xor_scal_optab): New optabs.
2202         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
2203         (reduc_xor_scal_@var{m}): Document.
2204         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
2205         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
2206         internal functions.
2207         * fold-const-call.c (fold_const_call): Handle them.
2208         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
2209         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
2210         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
2211         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
2212         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
2213         (UNSPEC_XORV): New unspecs.
2214         (optab): Add entries for them.
2215         (BITWISEV): New int iterator.
2216         (bit_reduc_op): New int attributes.
2217
2218 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2219             Alan Hayward  <alan.hayward@arm.com>
2220             David Sherwood  <david.sherwood@arm.com>
2221
2222         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
2223         * internal-fn.def (VEC_SHL_INSERT): New internal function.
2224         * optabs.def (vec_shl_insert_optab): New optab.
2225         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
2226         (duplicate_and_interleave): Likewise.
2227         * tree-vect-loop.c: Include internal-fn.h.
2228         (neutral_op_for_slp_reduction): New function, split out from
2229         get_initial_defs_for_reduction.
2230         (get_initial_def_for_reduction): Handle option 2 for variable-length
2231         vectors by loading the neutral value into a vector and then shifting
2232         the initial value into element 0.
2233         (get_initial_defs_for_reduction): Replace the code argument with
2234         the neutral value calculated by neutral_op_for_slp_reduction.
2235         Use gimple_build_vector for constant-length vectors.
2236         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
2237         but the first group_size elements have a neutral value.
2238         Use duplicate_and_interleave otherwise.
2239         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
2240         Update call to get_initial_defs_for_reduction.  Handle SLP
2241         reductions for variable-length vectors by creating one vector
2242         result for each scalar result, with the elements associated
2243         with other scalar results stubbed out with the neutral value.
2244         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
2245         Require IFN_VEC_SHL_INSERT for double reductions on
2246         variable-length vectors, or SLP reductions that have
2247         a neutral value.  Require can_duplicate_and_interleave_p
2248         support for variable-length unchained SLP reductions if there
2249         is no neutral value, such as for MIN/MAX reductions.  Also require
2250         the number of vector elements to be a multiple of the number of
2251         SLP statements when doing variable-length unchained SLP reductions.
2252         Update call to vect_create_epilog_for_reduction.
2253         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
2254         and remove initial values.
2255         (duplicate_and_interleave): Make public.
2256         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
2257         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
2258
2259 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2260             Alan Hayward  <alan.hayward@arm.com>
2261             David Sherwood  <david.sherwood@arm.com>
2262
2263         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
2264         (can_duplicate_and_interleave_p): New function.
2265         (vect_get_and_check_slp_defs): Take the vector of statements
2266         rather than just the current one.  Remove excess parentheses.
2267         Restriction rejectinon of vect_constant_def and vect_external_def
2268         for variable-length vectors to boolean types, or types for which
2269         can_duplicate_and_interleave_p is false.
2270         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
2271         (duplicate_and_interleave): New function.
2272         (vect_get_constant_vectors): Use gimple_build_vector for
2273         constant-length vectors and suitable variable-length constant
2274         vectors.  Use duplicate_and_interleave for other variable-length
2275         vectors.  Don't defer the update when inserting new statements.
2276
2277 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2278             Alan Hayward  <alan.hayward@arm.com>
2279             David Sherwood  <david.sherwood@arm.com>
2280
2281         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
2282         min_profitable_iters doesn't go negative.
2283
2284 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2285             Alan Hayward  <alan.hayward@arm.com>
2286             David Sherwood  <david.sherwood@arm.com>
2287
2288         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
2289         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
2290         * optabs.def (vec_mask_load_lanes_optab): New optab.
2291         (vec_mask_store_lanes_optab): Likewise.
2292         * internal-fn.def (MASK_LOAD_LANES): New internal function.
2293         (MASK_STORE_LANES): Likewise.
2294         * internal-fn.c (mask_load_lanes_direct): New macro.
2295         (mask_store_lanes_direct): Likewise.
2296         (expand_mask_load_optab_fn): Handle masked operations.
2297         (expand_mask_load_lanes_optab_fn): New macro.
2298         (expand_mask_store_optab_fn): Handle masked operations.
2299         (expand_mask_store_lanes_optab_fn): New macro.
2300         (direct_mask_load_lanes_optab_supported_p): Likewise.
2301         (direct_mask_store_lanes_optab_supported_p): Likewise.
2302         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
2303         parameter.
2304         (vect_load_lanes_supported): Likewise.
2305         * tree-vect-data-refs.c (strip_conversion): New function.
2306         (can_group_stmts_p): Likewise.
2307         (vect_analyze_data_ref_accesses): Use it instead of checking
2308         for a pair of assignments.
2309         (vect_store_lanes_supported): Take a masked_p parameter.
2310         (vect_load_lanes_supported): Likewise.
2311         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
2312         vect_store_lanes_supported and vect_load_lanes_supported.
2313         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
2314         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
2315         parameter.  Don't allow gaps for masked accesses.
2316         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
2317         and vect_load_lanes_supported.
2318         (get_load_store_type): Take a masked_p parameter and update
2319         call to get_group_load_store_type.
2320         (vectorizable_store): Update call to get_load_store_type.
2321         Handle IFN_MASK_STORE_LANES.
2322         (vectorizable_load): Update call to get_load_store_type.
2323         Handle IFN_MASK_LOAD_LANES.
2324
2325 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2326             Alan Hayward  <alan.hayward@arm.com>
2327             David Sherwood  <david.sherwood@arm.com>
2328
2329         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
2330         modes for SVE.
2331         * config/aarch64/aarch64-protos.h
2332         (aarch64_sve_struct_memory_operand_p): Declare.
2333         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
2334         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
2335         (VPRED, vpred): Handle SVE structure modes.
2336         * config/aarch64/constraints.md (Utx): New constraint.
2337         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
2338         (aarch64_sve_struct_nonimmediate_operand): New predicates.
2339         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
2340         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
2341         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
2342         structure modes.  Split into pieces after RA.
2343         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
2344         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
2345         New patterns.
2346         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
2347         SVE structure modes.
2348         (aarch64_classify_address): Likewise.
2349         (sizetochar): Move earlier in file.
2350         (aarch64_print_operand): Handle SVE register lists.
2351         (aarch64_array_mode): New function.
2352         (aarch64_sve_struct_memory_operand_p): Likewise.
2353         (TARGET_ARRAY_MODE): Redefine.
2354
2355 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2356             Alan Hayward  <alan.hayward@arm.com>
2357             David Sherwood  <david.sherwood@arm.com>
2358
2359         * target.def (array_mode): New target hook.
2360         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
2361         * doc/tm.texi: Regenerate.
2362         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
2363         * hooks.c (hook_optmode_mode_uhwi_none): New function.
2364         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
2365         targetm.array_mode.
2366         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
2367         type sizes.
2368
2369 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2370             Alan Hayward  <alan.hayward@arm.com>
2371             David Sherwood  <david.sherwood@arm.com>
2372
2373         * fold-const.c (fold_binary_loc): Check the argument types
2374         rather than the result type when testing for a vector operation.
2375
2376 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2377
2378         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
2379         * doc/tm.texi: Regenerate.
2380
2381 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2382             Alan Hayward  <alan.hayward@arm.com>
2383             David Sherwood  <david.sherwood@arm.com>
2384
2385         * doc/invoke.texi (-msve-vector-bits=): Document new option.
2386         (sve): Document new AArch64 extension.
2387         * doc/md.texi (w): Extend the description of the AArch64
2388         constraint to include SVE vectors.
2389         (Upl, Upa): Document new AArch64 predicate constraints.
2390         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
2391         enum.
2392         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
2393         (msve-vector-bits=): New option.
2394         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
2395         SVE when these are disabled.
2396         (sve): New extension.
2397         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
2398         modes.  Adjust their number of units based on aarch64_sve_vg.
2399         (MAX_BITSIZE_MODE_ANY_MODE): Define.
2400         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
2401         aarch64_addr_query_type.
2402         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
2403         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
2404         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
2405         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
2406         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
2407         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
2408         (aarch64_simd_imm_zero_p): Delete.
2409         (aarch64_check_zero_based_sve_index_immediate): Declare.
2410         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2411         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2412         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2413         (aarch64_sve_float_mul_immediate_p): Likewise.
2414         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2415         rather than an rtx.
2416         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
2417         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
2418         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
2419         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
2420         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
2421         (aarch64_regmode_natural_size): Likewise.
2422         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
2423         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
2424         left one place.
2425         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
2426         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
2427         for VG and the SVE predicate registers.
2428         (V_ALIASES): Add a "z"-prefixed alias.
2429         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
2430         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
2431         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
2432         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
2433         (REG_CLASS_NAMES): Add entries for them.
2434         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
2435         and the predicate registers.
2436         (aarch64_sve_vg): Declare.
2437         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
2438         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
2439         (REGMODE_NATURAL_SIZE): Define.
2440         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
2441         SVE macros.
2442         * config/aarch64/aarch64.c: Include cfgrtl.h.
2443         (simd_immediate_info): Add a constructor for series vectors,
2444         and an associated step field.
2445         (aarch64_sve_vg): New variable.
2446         (aarch64_dbx_register_number): Handle VG and the predicate registers.
2447         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
2448         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
2449         (VEC_ANY_DATA, VEC_STRUCT): New constants.
2450         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
2451         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
2452         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
2453         (aarch64_get_mask_mode): New functions.
2454         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
2455         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
2456         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
2457         predicate modes and predicate registers.  Explicitly restrict
2458         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
2459         to store a vector mode if it is recognized by
2460         aarch64_classify_vector_mode.
2461         (aarch64_regmode_natural_size): New function.
2462         (aarch64_hard_regno_caller_save_mode): Return the original mode
2463         for predicates.
2464         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
2465         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
2466         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
2467         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
2468         functions.
2469         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
2470         does not overlap dest if the function is frame-related.  Handle
2471         SVE constants.
2472         (aarch64_split_add_offset): New function.
2473         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
2474         them aarch64_add_offset.
2475         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
2476         and update call to aarch64_sub_sp.
2477         (aarch64_add_cfa_expression): New function.
2478         (aarch64_expand_prologue): Pass extra temporary registers to the
2479         functions above.  Handle the case in which we need to emit new
2480         DW_CFA_expressions for registers that were originally saved
2481         relative to the stack pointer, but now have to be expressed
2482         relative to the frame pointer.
2483         (aarch64_output_mi_thunk): Pass extra temporary registers to the
2484         functions above.
2485         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
2486         IP0 and IP1 values for SVE frames.
2487         (aarch64_expand_vec_series): New function.
2488         (aarch64_expand_sve_widened_duplicate): Likewise.
2489         (aarch64_expand_sve_const_vector): Likewise.
2490         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
2491         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
2492         into the register, rather than emitting a SET directly.
2493         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
2494         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
2495         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
2496         (offset_9bit_signed_scaled_p): New functions.
2497         (aarch64_replicate_bitmask_imm): New function.
2498         (aarch64_bitmask_imm): Use it.
2499         (aarch64_cannot_force_const_mem): Reject expressions involving
2500         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
2501         (aarch64_classify_index): Handle SVE indices, by requiring
2502         a plain register index with a scale that matches the element size.
2503         (aarch64_classify_address): Handle SVE addresses.  Assert that
2504         the mode of the address is VOIDmode or an integer mode.
2505         Update call to aarch64_classify_symbol.
2506         (aarch64_classify_symbolic_expression): Update call to
2507         aarch64_classify_symbol.
2508         (aarch64_const_vec_all_in_range_p): New function.
2509         (aarch64_print_vector_float_operand): Likewise.
2510         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
2511         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
2512         and the FP immediates 1.0 and 0.5.
2513         (aarch64_print_address_internal): Handle SVE addresses.
2514         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
2515         (aarch64_regno_regclass): Handle predicate registers.
2516         (aarch64_secondary_reload): Handle big-endian reloads of SVE
2517         data modes.
2518         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
2519         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
2520         (aarch64_convert_sve_vector_bits): New function.
2521         (aarch64_override_options): Use it to handle -msve-vector-bits=.
2522         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2523         rather than an rtx.
2524         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
2525         Handle SVE vector and predicate modes.  Accept VL-based constants
2526         that need only one temporary register, and VL offsets that require
2527         no temporary registers.
2528         (aarch64_conditional_register_usage): Mark the predicate registers
2529         as fixed if SVE isn't available.
2530         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
2531         Return true for SVE vector and predicate modes.
2532         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
2533         rather than an unsigned int.  Handle SVE modes.
2534         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
2535         SVE modes.
2536         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
2537         if SVE is enabled.
2538         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2539         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2540         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2541         (aarch64_sve_float_mul_immediate_p): New functions.
2542         (aarch64_sve_valid_immediate): New function.
2543         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
2544         Explicitly reject structure modes.  Check for INDEX constants.
2545         Handle PTRUE and PFALSE constants.
2546         (aarch64_check_zero_based_sve_index_immediate): New function.
2547         (aarch64_simd_imm_zero_p): Delete.
2548         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
2549         vector modes.  Accept constants in the range of CNT[BHWD].
2550         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
2551         ask for an Advanced SIMD mode.
2552         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
2553         (aarch64_simd_vector_alignment): Handle SVE predicates.
2554         (aarch64_vectorize_preferred_vector_alignment): New function.
2555         (aarch64_simd_vector_alignment_reachable): Use it instead of
2556         the vector size.
2557         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
2558         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
2559         functions.
2560         (MAX_VECT_LEN): Delete.
2561         (expand_vec_perm_d): Add a vec_flags field.
2562         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
2563         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
2564         (aarch64_evpc_ext): Don't apply a big-endian lane correction
2565         for SVE modes.
2566         (aarch64_evpc_rev): Rename to...
2567         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
2568         (aarch64_evpc_rev_global): New function.
2569         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
2570         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
2571         MAX_VECT_LEN.
2572         (aarch64_evpc_sve_tbl): New function.
2573         (aarch64_expand_vec_perm_const_1): Update after rename of
2574         aarch64_evpc_rev.  Handle SVE permutes too, trying
2575         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
2576         than aarch64_evpc_tbl.
2577         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
2578         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
2579         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
2580         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
2581         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
2582         (aarch64_expand_sve_vcond): New functions.
2583         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
2584         of aarch64_vector_mode_p.
2585         (aarch64_dwarf_poly_indeterminate_value): New function.
2586         (aarch64_compute_pressure_classes): Likewise.
2587         (aarch64_can_change_mode_class): Likewise.
2588         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
2589         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
2590         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
2591         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
2592         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
2593         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
2594         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
2595         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
2596         constraints.
2597         (Dn, Dl, Dr): Accept const as well as const_vector.
2598         (Dz): Likewise.  Compare against CONST0_RTX.
2599         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
2600         of "vector" where appropriate.
2601         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
2602         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
2603         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
2604         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
2605         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
2606         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
2607         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
2608         (v_int_equiv): Extend to SVE modes.
2609         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
2610         mode attributes.
2611         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
2612         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
2613         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
2614         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
2615         (SVE_COND_FP_CMP): New int iterators.
2616         (perm_hilo): Handle the new unpack unspecs.
2617         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
2618         attributes.
2619         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
2620         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
2621         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
2622         (aarch64_equality_operator, aarch64_constant_vector_operand)
2623         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
2624         (aarch64_sve_nonimmediate_operand): Likewise.
2625         (aarch64_sve_general_operand): Likewise.
2626         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
2627         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
2628         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
2629         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
2630         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
2631         (aarch64_sve_float_arith_immediate): Likewise.
2632         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
2633         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
2634         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
2635         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
2636         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
2637         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
2638         (aarch64_sve_float_arith_operand): Likewise.
2639         (aarch64_sve_float_arith_with_sub_operand): Likewise.
2640         (aarch64_sve_float_mul_operand): Likewise.
2641         (aarch64_sve_vec_perm_operand): Likewise.
2642         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
2643         (aarch64_mov_operand): Accept const_poly_int and const_vector.
2644         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
2645         as well as const_vector.
2646         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
2647         in file.  Use CONST0_RTX and CONSTM1_RTX.
2648         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
2649         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
2650         Use aarch64_simd_imm_zero.
2651         * config/aarch64/aarch64-sve.md: New file.
2652         * config/aarch64/aarch64.md: Include it.
2653         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
2654         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
2655         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
2656         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
2657         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
2658         (sve): New attribute.
2659         (enabled): Disable instructions with the sve attribute unless
2660         TARGET_SVE.
2661         (movqi, movhi): Pass CONST_POLY_INT operaneds through
2662         aarch64_expand_mov_immediate.
2663         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
2664         CNT[BHSD] immediates.
2665         (movti): Split CONST_POLY_INT moves into two halves.
2666         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
2667         Split additions that need a temporary here if the destination
2668         is the stack pointer.
2669         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
2670         (*add<mode>3_poly_1): New instruction.
2671         (set_clobber_cc): New expander.
2672
2673 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2674
2675         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
2676         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
2677         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
2678         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
2679         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
2680         Change innermode from fixed_mode_size to machine_mode.
2681         (simplify_subreg): Update call accordingly.  Handle a constant-sized
2682         subreg of a variable-length CONST_VECTOR.
2683
2684 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2685             Alan Hayward  <alan.hayward@arm.com>
2686             David Sherwood  <david.sherwood@arm.com>
2687
2688         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
2689         (add_offset_to_base): New function, split out from...
2690         (create_mem_ref): ...here.  When handling a scale other than 1,
2691         check first whether the address is valid without the offset.
2692         Add it into the base if so, leaving the index and scale as-is.
2693
2694 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
2695
2696         PR c++/83778
2697         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
2698         fold_for_warn before checking if arg2 is INTEGER_CST.
2699
2700 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
2701
2702         * config/rs6000/predicates.md (load_multiple_operation): Delete.
2703         (store_multiple_operation): Delete.
2704         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
2705         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
2706         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
2707         guarded by TARGET_STRING.
2708         (rs6000_output_load_multiple): Delete.
2709         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
2710         OPTION_MASK_STRING / TARGET_STRING handling.
2711         (print_operand) <'N', 'O'>: Add comment that these are unused now.
2712         (const rs6000_opt_masks) <"string">: Change mask to 0.
2713         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
2714         (MASK_STRING): Delete.
2715         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
2716         parts.  Simplify.
2717         (load_multiple): Delete.
2718         (*ldmsi8): Delete.
2719         (*ldmsi7): Delete.
2720         (*ldmsi6): Delete.
2721         (*ldmsi5): Delete.
2722         (*ldmsi4): Delete.
2723         (*ldmsi3): Delete.
2724         (store_multiple): Delete.
2725         (*stmsi8): Delete.
2726         (*stmsi7): Delete.
2727         (*stmsi6): Delete.
2728         (*stmsi5): Delete.
2729         (*stmsi4): Delete.
2730         (*stmsi3): Delete.
2731         (movmemsi_8reg): Delete.
2732         (corresponding unnamed define_insn): Delete.
2733         (movmemsi_6reg): Delete.
2734         (corresponding unnamed define_insn): Delete.
2735         (movmemsi_4reg): Delete.
2736         (corresponding unnamed define_insn): Delete.
2737         (movmemsi_2reg): Delete.
2738         (corresponding unnamed define_insn): Delete.
2739         (movmemsi_1reg): Delete.
2740         (corresponding unnamed define_insn): Delete.
2741         * config/rs6000/rs6000.opt (mno-string): New.
2742         (mstring): Replace by deprecation warning stub.
2743         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
2744
2745 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
2746
2747         * regrename.c (regrename_do_replace): If replacing the same
2748         reg multiple times, try to reuse last created gen_raw_REG.
2749
2750         PR debug/81155
2751         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
2752         main to workaround a bug in GDB.
2753
2754 2018-01-12  Tom de Vries  <tom@codesourcery.com>
2755
2756         PR target/83737
2757         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
2758
2759 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
2760
2761         PR rtl-optimization/80481
2762         * ira-color.c (get_cap_member): New function.
2763         (allocnos_conflict_by_live_ranges_p): Use it.
2764         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
2765         (setup_slot_coalesced_allocno_live_ranges): Ditto.
2766
2767 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
2768
2769         PR target/83628
2770         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
2771         (*saddl_se_1): Ditto.
2772         (*ssubsi_1): Ditto.
2773         (*ssubl_se_1): Ditto.
2774
2775 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2776
2777         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
2778         rather than wi::to_widest for DR_INITs.
2779         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
2780         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
2781         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
2782         INTEGER_CSTs.
2783         (vect_analyze_group_access_1): Note that here.
2784
2785 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2786
2787         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
2788         polynomial type sizes.
2789
2790 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2791
2792         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
2793         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
2794         (gimple_add_tmp_var): Likewise.
2795
2796 2018-01-12  Martin Liska  <mliska@suse.cz>
2797
2798         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
2799         (gimple_alloc_sizes): Likewise.
2800         (dump_gimple_statistics): Use PRIu64 in printf format.
2801         * gimple.h: Change uint64_t to int.
2802
2803 2018-01-12  Martin Liska  <mliska@suse.cz>
2804
2805         * tree-core.h: Use uint64_t instead of int.
2806         * tree.c (tree_node_counts): Likewise.
2807         (tree_node_sizes): Likewise.
2808         (dump_tree_statistics): Use PRIu64 in printf format.
2809
2810 2018-01-12  Martin Liska  <mliska@suse.cz>
2811
2812         * Makefile.in: As qsort_chk is implemented in vec.c, add
2813         vec.o to linkage of gencfn-macros.
2814         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
2815         passing the info to record_node_allocation_statistics.
2816         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
2817         and pass the info.
2818         * ggc-common.c (struct ggc_usage): Add operator== and use
2819         it in operator< and compare function.
2820         * mem-stats.h (struct mem_usage): Likewise.
2821         * vec.c (struct vec_usage): Remove operator< and compare
2822         function. Can be simply inherited.
2823
2824 2018-01-12  Martin Jambor  <mjambor@suse.cz>
2825
2826         PR target/81616
2827         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
2828         * tree-ssa-math-opts.c: Include domwalk.h.
2829         (convert_mult_to_fma_1): New function.
2830         (fma_transformation_info): New type.
2831         (fma_deferring_state): Likewise.
2832         (cancel_fma_deferring): New function.
2833         (result_of_phi): Likewise.
2834         (last_fma_candidate_feeds_initial_phi): Likewise.
2835         (convert_mult_to_fma): Added deferring logic, split actual
2836         transformation to convert_mult_to_fma_1.
2837         (math_opts_dom_walker): New type.
2838         (math_opts_dom_walker::after_dom_children): New method, body moved
2839         here from pass_optimize_widening_mul::execute, added deferring logic
2840         bits.
2841         (pass_optimize_widening_mul::execute): Moved most of code to
2842         math_opts_dom_walker::after_dom_children.
2843         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
2844         * config/i386/i386.c (ix86_option_override_internal): Added
2845         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
2846
2847 2018-01-12  Richard Biener  <rguenther@suse.de>
2848
2849         PR debug/83157
2850         * dwarf2out.c (gen_variable_die): Do not reset old_die for
2851         inline instance vars.
2852
2853 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
2854
2855         PR target/81819
2856         * config/rx/rx.c (rx_is_restricted_memory_address):
2857         Handle SUBREG case.
2858
2859 2018-01-12  Richard Biener  <rguenther@suse.de>
2860
2861         PR tree-optimization/80846
2862         * target.def (split_reduction): New target hook.
2863         * targhooks.c (default_split_reduction): New function.
2864         * targhooks.h (default_split_reduction): Declare.
2865         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
2866         target requests first reduce vectors by combining low and high
2867         parts.
2868         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
2869         (get_vectype_for_scalar_type_and_size): Export.
2870         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
2871         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
2872         * doc/tm.texi: Regenerate.
2873         * config/i386/i386.c (ix86_split_reduction): Implement
2874         TARGET_VECTORIZE_SPLIT_REDUCTION.
2875
2876 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
2877
2878         PR target/83368
2879         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
2880         in PIC mode except for TARGET_VXWORKS_RTP.
2881         * config/sparc/sparc.c: Include cfgrtl.h.
2882         (TARGET_INIT_PIC_REG): Define.
2883         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
2884         (sparc_pic_register_p): New predicate.
2885         (sparc_legitimate_address_p): Use it.
2886         (sparc_legitimize_pic_address): Likewise.
2887         (sparc_delegitimize_address): Likewise.
2888         (sparc_mode_dependent_address_p): Likewise.
2889         (gen_load_pcrel_sym): Remove 4th parameter.
2890         (load_got_register): Adjust call to above.  Remove obsolete stuff.
2891         (sparc_expand_prologue): Do not call load_got_register here.
2892         (sparc_flat_expand_prologue): Likewise.
2893         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
2894         (sparc_use_pseudo_pic_reg): New function.
2895         (sparc_init_pic_reg): Likewise.
2896         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
2897         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
2898
2899 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
2900
2901         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
2902         Add item for branch_cost.
2903
2904 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
2905
2906         PR rtl-optimization/83565
2907         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
2908         not extend the result to a larger mode for rotate operations.
2909         (num_sign_bit_copies1): Likewise.
2910
2911 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
2912
2913         PR target/40411
2914         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
2915         -symbolic.
2916         Use values-Xc.o for -pedantic.
2917         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
2918
2919 2018-01-12  Martin Liska  <mliska@suse.cz>
2920
2921         PR ipa/83054
2922         * ipa-devirt.c (final_warning_record::grow_type_warnings):
2923         New function.
2924         (possible_polymorphic_call_targets): Use it.
2925         (ipa_devirt): Likewise.
2926
2927 2018-01-12  Martin Liska  <mliska@suse.cz>
2928
2929         * profile-count.h (enum profile_quality): Use 0 as invalid
2930         enum value of profile_quality.
2931
2932 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
2933
2934         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
2935         -mext-string options.
2936
2937 2018-01-12  Richard Biener  <rguenther@suse.de>
2938
2939         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2940         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2941         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2942         Likewise.
2943         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2944
2945 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
2946
2947         * configure.ac (--with-long-double-format): Add support for the
2948         configuration option to change the default long double format on
2949         PowerPC systems.
2950         * config.gcc (powerpc*-linux*-*): Likewise.
2951         * configure: Regenerate.
2952         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2953         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2954         used without modification.
2955
2956 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
2957
2958         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2959         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2960         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2961         MISC_BUILTIN_SPEC_BARRIER.
2962         (rs6000_init_builtins): Likewise.
2963         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2964         enum value.
2965         (speculation_barrier): New define_insn.
2966         * doc/extend.texi: Document __builtin_speculation_barrier.
2967
2968 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
2969
2970         PR target/83203
2971         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2972         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2973         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2974         iterators.
2975         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
2976         integral modes instead of "ss" and "sd".
2977         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2978         vectors with 32-bit and 64-bit elements.
2979         (vecdupssescalarmodesuffix): New mode attribute.
2980         (vec_dup<mode>): Use it.
2981
2982 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
2983
2984         PR target/83330
2985         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2986         frame if argument is passed on stack.
2987
2988 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
2989
2990         PR target/82682
2991         * ree.c (combine_reaching_defs): Optimize also
2992         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2993         reg2=any_extend(exp); reg1=reg2;, formatting fix.
2994
2995 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
2996
2997         PR middle-end/83189
2998         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2999
3000 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
3001
3002         PR middle-end/83718
3003         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
3004         after they are computed.
3005
3006 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
3007
3008         PR tree-optimization/83695
3009         * gimple-loop-linterchange.cc
3010         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
3011         reset cached scev information after interchange.
3012         (pass_linterchange::execute): Remove call to scev_reset_htab.
3013
3014 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3015
3016         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
3017         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
3018         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
3019         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
3020         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
3021         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
3022         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
3023         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
3024         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
3025         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
3026         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
3027         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
3028         (V_lane_reg): Likewise.
3029         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
3030         New define_expand.
3031         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
3032         (vfmal_lane_low<mode>_intrinsic,
3033         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
3034         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
3035         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
3036         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
3037         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
3038         vfmsl_lane_high<mode>_intrinsic): New define_insns.
3039
3040 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3041
3042         * config/arm/arm-cpus.in (fp16fml): New feature.
3043         (ALL_SIMD): Add fp16fml.
3044         (armv8.2-a): Add fp16fml as an option.
3045         (armv8.3-a): Likewise.
3046         (armv8.4-a): Add fp16fml as part of fp16.
3047         * config/arm/arm.h (TARGET_FP16FML): Define.
3048         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
3049         when appropriate.
3050         * config/arm/arm-modes.def (V2HF): Define.
3051         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
3052         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
3053         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
3054         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
3055         vfmsl_low, vfmsl_high): New set of builtins.
3056         * config/arm/iterators.md (PLUSMINUS): New code iterator.
3057         (vfml_op): New code attribute.
3058         (VFMLHALVES): New int iterator.
3059         (VFML, VFMLSEL): New mode attributes.
3060         (V_reg): Define mapping for V2HF.
3061         (V_hi, V_lo): New mode attributes.
3062         (VF_constraint): Likewise.
3063         (vfml_half, vfml_half_selector): New int attributes.
3064         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
3065         define_expand.
3066         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
3067         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
3068         New define_insn.
3069         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
3070         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
3071         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
3072         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
3073         documentation.
3074         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
3075         Document new effective target and option set.
3076
3077 2017-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3078
3079         * config/arm/arm-cpus.in (armv8_4): New feature.
3080         (ARMv8_4a): New fgroup.
3081         (armv8.4-a): New arch.
3082         * config/arm/arm-tables.opt: Regenerate.
3083         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
3084         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
3085         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
3086         Add matching rules for -march=armv8.4-a and extensions.
3087         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
3088
3089 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
3090
3091         PR target/81821
3092         * config/rx/rx.md (BW): New mode attribute.
3093         (sync_lock_test_and_setsi): Add mode suffix to insn output.
3094
3095 2018-01-11  Richard Biener  <rguenther@suse.de>
3096
3097         PR tree-optimization/83435
3098         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
3099         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
3100         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
3101
3102 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3103             Alan Hayward  <alan.hayward@arm.com>
3104             David Sherwood  <david.sherwood@arm.com>
3105
3106         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
3107         field.
3108         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
3109         (aarch64_print_address_internal): Use it to check for a zero offset.
3110
3111 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3112             Alan Hayward  <alan.hayward@arm.com>
3113             David Sherwood  <david.sherwood@arm.com>
3114
3115         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
3116         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
3117         Return a poly_int64 rather than a HOST_WIDE_INT.
3118         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
3119         rather than a HOST_WIDE_INT.
3120         * config/aarch64/aarch64.h (aarch64_frame): Protect with
3121         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
3122         hard_fp_offset, frame_size, initial_adjust, callee_offset and
3123         final_offset from HOST_WIDE_INT to poly_int64.
3124         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
3125         to_constant when getting the number of units in an Advanced SIMD
3126         mode.
3127         (aarch64_builtin_vectorized_function): Check for a constant number
3128         of units.
3129         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
3130         GET_MODE_SIZE.
3131         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
3132         attribute instead of GET_MODE_NUNITS.
3133         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
3134         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
3135         GET_MODE_SIZE for fixed-size registers.
3136         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
3137         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
3138         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
3139         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
3140         (aarch64_print_operand, aarch64_print_address_internal)
3141         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
3142         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
3143         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
3144         Handle polynomial GET_MODE_SIZE.
3145         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
3146         wider than SImode without modification.
3147         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
3148         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
3149         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
3150         passing and returning SVE modes.
3151         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
3152         rather than GEN_INT.
3153         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
3154         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
3155         (aarch64_allocate_and_probe_stack_space): Likewise.
3156         (aarch64_layout_frame): Cope with polynomial offsets.
3157         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
3158         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
3159         polynomial offsets.
3160         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
3161         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
3162         poly_int64 rather than a HOST_WIDE_INT.
3163         (aarch64_get_separate_components, aarch64_process_components)
3164         (aarch64_expand_prologue, aarch64_expand_epilogue)
3165         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
3166         (aarch64_anchor_offset): New function, split out from...
3167         (aarch64_legitimize_address): ...here.
3168         (aarch64_builtin_vectorization_cost): Handle polynomial
3169         TYPE_VECTOR_SUBPARTS.
3170         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
3171         GET_MODE_NUNITS.
3172         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
3173         number of elements from the PARALLEL rather than the mode.
3174         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
3175         rather than GET_MODE_BITSIZE.
3176         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
3177         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
3178         (aarch64_expand_vec_perm_const_1): Handle polynomial
3179         d->perm.length () and d->perm elements.
3180         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
3181         Apply to_constant to d->perm elements.
3182         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
3183         polynomial CONST_VECTOR_NUNITS.
3184         (aarch64_move_pointer): Take amount as a poly_int64 rather
3185         than an int.
3186         (aarch64_progress_pointer): Avoid temporary variable.
3187         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
3188         the mode attribute instead of GET_MODE.
3189
3190 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3191             Alan Hayward  <alan.hayward@arm.com>
3192             David Sherwood  <david.sherwood@arm.com>
3193
3194         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
3195         x exists before using it.
3196         (aarch64_add_constant_internal): Rename to...
3197         (aarch64_add_offset_1): ...this.  Replace regnum with separate
3198         src and dest rtxes.  Handle the case in which they're different,
3199         including when the offset is zero.  Replace scratchreg with an rtx.
3200         Use 2 additions if there is no spare register into which we can
3201         move a 16-bit constant.
3202         (aarch64_add_constant): Delete.
3203         (aarch64_add_offset): Replace reg with separate src and dest
3204         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
3205         Use aarch64_add_offset_1.
3206         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
3207         an rtx rather than an int.  Take the delta as a poly_int64
3208         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
3209         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
3210         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
3211         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
3212         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
3213         and aarch64_add_sp.
3214         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
3215         aarch64_add_constant.
3216
3217 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3218
3219         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
3220         Use scalar_float_mode.
3221
3222 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3223
3224         * config/aarch64/aarch64-simd.md
3225         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
3226         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
3227         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
3228         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
3229         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
3230         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
3231         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
3232         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
3233         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
3234         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
3235
3236 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3237
3238         PR target/83514
3239         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
3240         targ_options->x_arm_arch_string is non NULL.
3241
3242 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
3243
3244         * config/aarch64/aarch64.h
3245         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
3246
3247 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
3248
3249         PR target/82096
3250         * expmed.c (emit_store_flag_force): Swap if const op0
3251         and change VOIDmode to mode of op0.
3252
3253 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3254
3255         PR rtl-optimization/83761
3256         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
3257         than bytes to mode_for_size.
3258
3259 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3260
3261         PR middle-end/83189
3262         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
3263         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
3264         profile.
3265
3266 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3267
3268         PR middle-end/83575
3269         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
3270         when in layout mode.
3271         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
3272         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
3273         partition fixup.
3274
3275 2018-01-10  Michael Collison  <michael.collison@arm.com>
3276
3277         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
3278         * config/aarch64/aarch64-option-extension.def: Add
3279         AARCH64_OPT_EXTENSION of 'fp16fml'.
3280         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3281         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
3282         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
3283         * config/aarch64/constraints.md (Ui7): New constraint.
3284         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
3285         (VFMLA_SEL_W): Ditto.
3286         (f16quad): Ditto.
3287         (f16mac1): Ditto.
3288         (VFMLA16_LOW): New int iterator.
3289         (VFMLA16_HIGH): Ditto.
3290         (UNSPEC_FMLAL): New unspec.
3291         (UNSPEC_FMLSL): Ditto.
3292         (UNSPEC_FMLAL2): Ditto.
3293         (UNSPEC_FMLSL2): Ditto.
3294         (f16mac): New code attribute.
3295         * config/aarch64/aarch64-simd-builtins.def
3296         (aarch64_fmlal_lowv2sf): Ditto.
3297         (aarch64_fmlsl_lowv2sf): Ditto.
3298         (aarch64_fmlalq_lowv4sf): Ditto.
3299         (aarch64_fmlslq_lowv4sf): Ditto.
3300         (aarch64_fmlal_highv2sf): Ditto.
3301         (aarch64_fmlsl_highv2sf): Ditto.
3302         (aarch64_fmlalq_highv4sf): Ditto.
3303         (aarch64_fmlslq_highv4sf): Ditto.
3304         (aarch64_fmlal_lane_lowv2sf): Ditto.
3305         (aarch64_fmlsl_lane_lowv2sf): Ditto.
3306         (aarch64_fmlal_laneq_lowv2sf): Ditto.
3307         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
3308         (aarch64_fmlalq_lane_lowv4sf): Ditto.
3309         (aarch64_fmlsl_lane_lowv4sf): Ditto.
3310         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
3311         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
3312         (aarch64_fmlal_lane_highv2sf): Ditto.
3313         (aarch64_fmlsl_lane_highv2sf): Ditto.
3314         (aarch64_fmlal_laneq_highv2sf): Ditto.
3315         (aarch64_fmlsl_laneq_highv2sf): Ditto.
3316         (aarch64_fmlalq_lane_highv4sf): Ditto.
3317         (aarch64_fmlsl_lane_highv4sf): Ditto.
3318         (aarch64_fmlalq_laneq_highv4sf): Ditto.
3319         (aarch64_fmlsl_laneq_highv4sf): Ditto.
3320         * config/aarch64/aarch64-simd.md:
3321         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
3322         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3323         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
3324         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3325         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
3326         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
3327         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
3328         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
3329         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
3330         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
3331         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
3332         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
3333         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
3334         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
3335         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
3336         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
3337         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
3338         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
3339         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
3340         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
3341         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
3342         (vfmlsl_low_u32): Ditto.
3343         (vfmlalq_low_u32): Ditto.
3344         (vfmlslq_low_u32): Ditto.
3345         (vfmlal_high_u32): Ditto.
3346         (vfmlsl_high_u32): Ditto.
3347         (vfmlalq_high_u32): Ditto.
3348         (vfmlslq_high_u32): Ditto.
3349         (vfmlal_lane_low_u32): Ditto.
3350         (vfmlsl_lane_low_u32): Ditto.
3351         (vfmlal_laneq_low_u32): Ditto.
3352         (vfmlsl_laneq_low_u32): Ditto.
3353         (vfmlalq_lane_low_u32): Ditto.
3354         (vfmlslq_lane_low_u32): Ditto.
3355         (vfmlalq_laneq_low_u32): Ditto.
3356         (vfmlslq_laneq_low_u32): Ditto.
3357         (vfmlal_lane_high_u32): Ditto.
3358         (vfmlsl_lane_high_u32): Ditto.
3359         (vfmlal_laneq_high_u32): Ditto.
3360         (vfmlsl_laneq_high_u32): Ditto.
3361         (vfmlalq_lane_high_u32): Ditto.
3362         (vfmlslq_lane_high_u32): Ditto.
3363         (vfmlalq_laneq_high_u32): Ditto.
3364         (vfmlslq_laneq_high_u32): Ditto.
3365         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
3366         (AARCH64_FL_FOR_ARCH8_4): New.
3367         (AARCH64_ISA_F16FML): New ISA flag.
3368         (TARGET_F16FML): New feature flag for fp16fml.
3369         (doc/invoke.texi): Document new fp16fml option.
3370
3371 2018-01-10  Michael Collison  <michael.collison@arm.com>
3372
3373         * config/aarch64/aarch64-builtins.c:
3374         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
3375         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3376         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
3377         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
3378         (AARCH64_ISA_SHA3): New ISA flag.
3379         (TARGET_SHA3): New feature flag for sha3.
3380         * config/aarch64/iterators.md (sha512_op): New int attribute.
3381         (CRYPTO_SHA512): New int iterator.
3382         (UNSPEC_SHA512H): New unspec.
3383         (UNSPEC_SHA512H2): Ditto.
3384         (UNSPEC_SHA512SU0): Ditto.
3385         (UNSPEC_SHA512SU1): Ditto.
3386         * config/aarch64/aarch64-simd-builtins.def
3387         (aarch64_crypto_sha512hqv2di): New builtin.
3388         (aarch64_crypto_sha512h2qv2di): Ditto.
3389         (aarch64_crypto_sha512su0qv2di): Ditto.
3390         (aarch64_crypto_sha512su1qv2di): Ditto.
3391         (aarch64_eor3qv8hi): Ditto.
3392         (aarch64_rax1qv2di): Ditto.
3393         (aarch64_xarqv2di): Ditto.
3394         (aarch64_bcaxqv8hi): Ditto.
3395         * config/aarch64/aarch64-simd.md:
3396         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
3397         (aarch64_crypto_sha512su0qv2di): Ditto.
3398         (aarch64_crypto_sha512su1qv2di): Ditto.
3399         (aarch64_eor3qv8hi): Ditto.
3400         (aarch64_rax1qv2di): Ditto.
3401         (aarch64_xarqv2di): Ditto.
3402         (aarch64_bcaxqv8hi): Ditto.
3403         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
3404         (vsha512h2q_u64): Ditto.
3405         (vsha512su0q_u64): Ditto.
3406         (vsha512su1q_u64): Ditto.
3407         (veor3q_u16): Ditto.
3408         (vrax1q_u64): Ditto.
3409         (vxarq_u64): Ditto.
3410         (vbcaxq_u16): Ditto.
3411         * config/arm/types.md (crypto_sha512): New type attribute.
3412         (crypto_sha3): Ditto.
3413         (doc/invoke.texi): Document new sha3 option.
3414
3415 2018-01-10  Michael Collison  <michael.collison@arm.com>
3416
3417         * config/aarch64/aarch64-builtins.c:
3418         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
3419         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3420         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
3421         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
3422         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
3423         (AARCH64_ISA_SM4): New ISA flag.
3424         (TARGET_SM4): New feature flag for sm4.
3425         * config/aarch64/aarch64-simd-builtins.def
3426         (aarch64_sm3ss1qv4si): Ditto.
3427         (aarch64_sm3tt1aq4si): Ditto.
3428         (aarch64_sm3tt1bq4si): Ditto.
3429         (aarch64_sm3tt2aq4si): Ditto.
3430         (aarch64_sm3tt2bq4si): Ditto.
3431         (aarch64_sm3partw1qv4si): Ditto.
3432         (aarch64_sm3partw2qv4si): Ditto.
3433         (aarch64_sm4eqv4si): Ditto.
3434         (aarch64_sm4ekeyqv4si): Ditto.
3435         * config/aarch64/aarch64-simd.md:
3436         (aarch64_sm3ss1qv4si): Ditto.
3437         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
3438         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
3439         (aarch64_sm4eqv4si): Ditto.
3440         (aarch64_sm4ekeyqv4si): Ditto.
3441         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
3442         (sm3part_op): Ditto.
3443         (CRYPTO_SM3TT): Ditto.
3444         (CRYPTO_SM3PART): Ditto.
3445         (UNSPEC_SM3SS1): New unspec.
3446         (UNSPEC_SM3TT1A): Ditto.
3447         (UNSPEC_SM3TT1B): Ditto.
3448         (UNSPEC_SM3TT2A): Ditto.
3449         (UNSPEC_SM3TT2B): Ditto.
3450         (UNSPEC_SM3PARTW1): Ditto.
3451         (UNSPEC_SM3PARTW2): Ditto.
3452         (UNSPEC_SM4E): Ditto.
3453         (UNSPEC_SM4EKEY): Ditto.
3454         * config/aarch64/constraints.md (Ui2): New constraint.
3455         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
3456         * config/arm/types.md (crypto_sm3): New type attribute.
3457         (crypto_sm4): Ditto.
3458         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
3459         (vsm3tt1aq_u32): Ditto.
3460         (vsm3tt1bq_u32): Ditto.
3461         (vsm3tt2aq_u32): Ditto.
3462         (vsm3tt2bq_u32): Ditto.
3463         (vsm3partw1q_u32): Ditto.
3464         (vsm3partw2q_u32): Ditto.
3465         (vsm4eq_u32): Ditto.
3466         (vsm4ekeyq_u32): Ditto.
3467         (doc/invoke.texi): Document new sm4 option.
3468
3469 2018-01-10  Michael Collison  <michael.collison@arm.com>
3470
3471         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
3472         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
3473         (AARCH64_FL_FOR_ARCH8_4): New.
3474         (AARCH64_FL_V8_4): New flag.
3475         (doc/invoke.texi): Document new armv8.4-a option.
3476
3477 2018-01-10  Michael Collison  <michael.collison@arm.com>
3478
3479         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3480         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
3481         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
3482         * config/aarch64/aarch64-option-extension.def: Add
3483         AARCH64_OPT_EXTENSION of 'sha2'.
3484         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
3485         (crypto): Disable sha2 and aes if crypto disabled.
3486         (crypto): Enable aes and sha2 if enabled.
3487         (simd): Disable sha2 and aes if simd disabled.
3488         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
3489         New flags.
3490         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
3491         (TARGET_SHA2): New feature flag for sha2.
3492         (TARGET_AES): New feature flag for aes.
3493         * config/aarch64/aarch64-simd.md:
3494         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
3495         conditional on TARGET_AES.
3496         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
3497         (aarch64_crypto_sha1hsi): Make pattern conditional
3498         on TARGET_SHA2.
3499         (aarch64_crypto_sha1hv4si): Ditto.
3500         (aarch64_be_crypto_sha1hv4si): Ditto.
3501         (aarch64_crypto_sha1su1v4si): Ditto.
3502         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
3503         (aarch64_crypto_sha1su0v4si): Ditto.
3504         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
3505         (aarch64_crypto_sha256su0v4si): Ditto.
3506         (aarch64_crypto_sha256su1v4si): Ditto.
3507         (doc/invoke.texi): Document new aes and sha2 options.
3508
3509 2018-01-10  Martin Sebor  <msebor@redhat.com>
3510
3511         PR tree-optimization/83781
3512         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
3513         as string arrays.
3514
3515 2018-01-11  Martin Sebor  <msebor@gmail.com>
3516             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3517
3518         PR tree-optimization/83501
3519         PR tree-optimization/81703
3520
3521         * tree-ssa-strlen.c (get_string_cst): Rename...
3522         (get_string_len): ...to this.  Handle global constants.
3523         (handle_char_store): Adjust.
3524
3525 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
3526             Jim Wilson  <jimw@sifive.com>
3527
3528         * config/riscv/riscv-protos.h (riscv_output_return): New.
3529         * config/riscv/riscv.c (struct machine_function): New naked_p field.
3530         (riscv_attribute_table, riscv_output_return),
3531         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
3532         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
3533         (riscv_compute_frame_info): Only compute frame->mask if not a naked
3534         function.
3535         (riscv_expand_prologue): Add early return for naked function.
3536         (riscv_expand_epilogue): Likewise.
3537         (riscv_function_ok_for_sibcall): Return false for naked function.
3538         (riscv_set_current_function): New.
3539         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
3540         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
3541         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
3542         * doc/extend.texi (RISC-V Function Attributes): New.
3543
3544 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
3545
3546         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
3547         check for 128-bit long double before checking TCmode.
3548         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
3549         128-bit long doubles before checking TFmode or TCmode.
3550         (FLOAT128_IBM_P): Likewise.
3551
3552 2018-01-10  Martin Sebor  <msebor@redhat.com>
3553
3554         PR tree-optimization/83671
3555         * builtins.c (c_strlen): Unconditionally return zero for the empty
3556         string.
3557         Use -Warray-bounds for warnings.
3558         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
3559         for non-constant array indices with COMPONENT_REF, arrays of
3560         arrays, and pointers to arrays.
3561         (gimple_fold_builtin_strlen): Determine and set length range for
3562         non-constant character arrays.
3563
3564 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
3565
3566         PR middle-end/81897
3567         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
3568         empty blocks.
3569
3570 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
3571
3572         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
3573
3574 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3575
3576         PR target/83399
3577         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
3578         VECTOR_MEM_ALTIVEC_OR_VSX_P.
3579         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
3580         indexed_or_indirect_operand predicate.
3581         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
3582         (*vsx_le_perm_load_v8hi): Likewise.
3583         (*vsx_le_perm_load_v16qi): Likewise.
3584         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
3585         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
3586         (*vsx_le_perm_store_v8hi): Likewise.
3587         (*vsx_le_perm_store_v16qi): Likewise.
3588         (eight unnamed splitters): Likewise.
3589
3590 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3591
3592         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
3593         * config/rs6000/emmintrin.h: Likewise.
3594         * config/rs6000/mmintrin.h: Likewise.
3595         * config/rs6000/xmmintrin.h: Likewise.
3596
3597 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
3598
3599         PR c++/43486
3600         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
3601         "public_flag".
3602         * tree.c (tree_nop_conversion): Return true for location wrapper
3603         nodes.
3604         (maybe_wrap_with_location): New function.
3605         (selftest::check_strip_nops): New function.
3606         (selftest::test_location_wrappers): New function.
3607         (selftest::tree_c_tests): Call it.
3608         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
3609         (maybe_wrap_with_location): New decl.
3610         (EXPR_LOCATION_WRAPPER_P): New macro.
3611         (location_wrapper_p): New inline function.
3612         (tree_strip_any_location_wrapper): New inline function.
3613
3614 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
3615
3616         PR target/83735
3617         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
3618         stack_realign_offset for the largest alignment of stack slot
3619         actually used.
3620         (ix86_find_max_used_stack_alignment): New function.
3621         (ix86_finalize_stack_frame_flags): Use it.  Set
3622         max_used_stack_alignment if we don't realign stack.
3623         * config/i386/i386.h (machine_function): Add
3624         max_used_stack_alignment.
3625
3626 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
3627
3628         * config/arm/arm.opt (-mbranch-cost): New option.
3629         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
3630         account.
3631
3632 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
3633
3634         PR target/83629
3635         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
3636         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
3637
3638 2018-01-10  Richard Biener  <rguenther@suse.de>
3639
3640         PR debug/83765
3641         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
3642         early out so it also covers the case where we have a non-NULL
3643         origin.
3644
3645 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
3646
3647         PR tree-optimization/83753
3648         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
3649         for non-strided grouped accesses if the number of elements is 1.
3650
3651 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3652
3653         PR target/81616
3654         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
3655         * i386.h (TARGET_USE_GATHER): Define.
3656         * x86-tune.def (X86_TUNE_USE_GATHER): New.
3657
3658 2018-01-10  Martin Liska  <mliska@suse.cz>
3659
3660         PR bootstrap/82831
3661         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
3662         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
3663         partitioning.
3664         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
3665         CLEANUP_NO_PARTITIONING is not set.
3666
3667 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
3668
3669         * doc/rtl.texi: Remove documentation of (const ...) wrappers
3670         for vectors, as a partial revert of r254296.
3671         * rtl.h (const_vec_p): Delete.
3672         (const_vec_duplicate_p): Don't test for vector CONSTs.
3673         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
3674         * expmed.c (make_tree): Likewise.
3675
3676         Revert:
3677         * common.md (E, F): Use CONSTANT_P instead of checking for
3678         CONST_VECTOR.
3679         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
3680         checking for CONST_VECTOR.
3681
3682 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3683
3684         PR middle-end/83575
3685         * predict.c (force_edge_cold): Handle in more sane way edges
3686         with no prediction.
3687
3688 2018-01-09  Carl Love  <cel@us.ibm.com>
3689
3690         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
3691         V4SI, V4SF types.
3692         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
3693         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
3694         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
3695         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
3696         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
3697         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
3698         * config/rs6000/rs6000-protos.h: Add extern defition for
3699         rs6000_generate_float2_double_code.
3700         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
3701         function.
3702         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
3703         (float2_v2df): Add define_expand.
3704
3705 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
3706
3707         PR target/83628
3708         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
3709         op_mode in the force_to_mode call.
3710
3711 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3712
3713         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
3714         instead of checking each element individually.
3715         (aarch64_evpc_uzp): Likewise.
3716         (aarch64_evpc_zip): Likewise.
3717         (aarch64_evpc_ext): Likewise.
3718         (aarch64_evpc_rev): Likewise.
3719         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
3720         instead of checking each element individually.  Return true without
3721         generating rtl if
3722         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
3723         whether all selected elements come from the same input, instead of
3724         checking each element individually.  Remove calls to gen_rtx_REG,
3725         start_sequence and end_sequence and instead assert that no rtl is
3726         generated.
3727
3728 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3729
3730         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
3731         order of HIGH and CONST checks.
3732
3733 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3734
3735         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
3736         if the destination isn't an SSA_NAME.
3737
3738 2018-01-09  Richard Biener  <rguenther@suse.de>
3739
3740         PR tree-optimization/83668
3741         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
3742         move prologue...
3743         (canonicalize_loop_form): ... here, renamed from ...
3744         (canonicalize_loop_closed_ssa_form): ... this and amended to
3745         swap successor edges for loop exit blocks to make us use
3746         the RPO order we need for initial schedule generation.
3747
3748 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
3749
3750         PR tree-optimization/64811
3751         * match.pd: When optimizing comparisons with Inf, avoid
3752         introducing or losing exceptions from comparisons with NaN.
3753
3754 2018-01-09  Martin Liska  <mliska@suse.cz>
3755
3756         PR sanitizer/82517
3757         * asan.c (shadow_mem_size): Add gcc_assert.
3758
3759 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
3760
3761         Don't save registers in main().
3762
3763         PR target/83738
3764         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
3765         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
3766         * config/avr/avr.c (avr_set_current_function): Don't error if
3767         naked, OS_task or OS_main are specified at the same time.
3768         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
3769         OS_main.
3770         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
3771         attribute.
3772         * common/config/avr/avr-common.c (avr_option_optimization_table):
3773         Switch on -mmain-is-OS_task for optimizing compilations.
3774
3775 2018-01-09  Richard Biener  <rguenther@suse.de>
3776
3777         PR tree-optimization/83572
3778         * graphite.c: Include cfganal.h.
3779         (graphite_transform_loops): Connect infinite loops to exit
3780         and remove fake edges at the end.
3781
3782 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3783
3784         * ipa-inline.c (edge_badness): Revert accidental checkin.
3785
3786 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3787
3788         PR ipa/80763
3789         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
3790         symbols; not inline clones.
3791
3792 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
3793
3794         PR target/83507
3795         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
3796         hard registers.  Formatting fixes.
3797
3798         PR preprocessor/83722
3799         * gcc.c (try_generate_repro): Pass
3800         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
3801         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
3802         do_report_bug.
3803
3804 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
3805             Kito Cheng  <kito.cheng@gmail.com>
3806
3807         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
3808         (riscv_leaf_function_p): Delete.
3809         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
3810
3811 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3812
3813         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
3814         function.
3815         (do_ifelse): New function.
3816         (do_isel): New function.
3817         (do_sub3): New function.
3818         (do_add3): New function.
3819         (do_load_mask_compare): New function.
3820         (do_overlap_load_compare): New function.
3821         (expand_compare_loop): New function.
3822         (expand_block_compare): Call expand_compare_loop() when appropriate.
3823         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
3824         option description.
3825         (-mblock-compare-inline-loop-limit): New option.
3826
3827 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3828
3829         PR target/83677
3830         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
3831         Reverse order of second and third operands in first alternative.
3832         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
3833         of first and second elements in UNSPEC_VPERMR vector.
3834         (altivec_expand_vec_perm_le): Likewise.
3835
3836 2017-01-08  Jeff Law  <law@redhat.com>
3837
3838         PR rtl-optimizatin/81308
3839         * tree-switch-conversion.c (cfg_altered): New file scoped static.
3840         (process_switch): If group_case_labels makes a change, then set
3841         cfg_altered.
3842         (pass_convert_switch::execute): If a switch is converted, then
3843         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
3844
3845         PR rtl-optimization/81308
3846         * recog.c (split_all_insns): Conditionally cleanup the CFG after
3847         splitting insns.
3848
3849 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
3850
3851         PR target/83663 - Revert r255946
3852         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
3853         generation for cases where splatting a value is not useful.
3854         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
3855         across a vec_duplicate and a paradoxical subreg forming a vector
3856         mode to a vec_concat.
3857
3858 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3859
3860         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
3861         -march=armv8.3-a variants.
3862         * config/arm/t-multilib: Likewise.
3863         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
3864
3865 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3866
3867         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
3868         to generate rtl.
3869         (cceq_ior_compare_complement): Give it a name so I can use it, and
3870         change boolean_or_operator predicate to boolean_operator so it can
3871         be used to generate a crand.
3872         (eqne): New code iterator.
3873         (bd/bd_neg): New code_attrs.
3874         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
3875         a single define_insn.
3876         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
3877         decrement (bdnzt/bdnzf/bdzt/bdzf).
3878         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
3879         with the new names of the branch decrement patterns, and added the
3880         names of the branch decrement conditional patterns.
3881
3882 2018-01-08  Richard Biener  <rguenther@suse.de>
3883
3884         PR tree-optimization/83563
3885         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
3886         cache.
3887
3888 2018-01-08  Richard Biener  <rguenther@suse.de>
3889
3890         PR middle-end/83713
3891         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
3892
3893 2018-01-08  Richard Biener  <rguenther@suse.de>
3894
3895         PR tree-optimization/83685
3896         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
3897         references to abnormals.
3898
3899 2018-01-08  Richard Biener  <rguenther@suse.de>
3900
3901         PR lto/83719
3902         * dwarf2out.c (output_indirect_strings): Handle empty
3903         skeleton_debug_str_hash.
3904         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
3905
3906 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
3907
3908         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
3909         (emit_store_direct): Likewise.
3910         (arc_trampoline_adjust_address): Likewise.
3911         (arc_asm_trampoline_template): New function.
3912         (arc_initialize_trampoline): Use asm_trampoline_template.
3913         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
3914         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
3915         * config/arc/arc.md (flush_icache): Delete pattern.
3916
3917 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
3918
3919         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
3920         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
3921         munaligned-access.
3922
3923 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3924
3925         PR target/83681
3926         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
3927         by not USED_FOR_TARGET.
3928         (make_pass_resolve_sw_modes): Likewise.
3929
3930 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3931
3932         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
3933         USED_FOR_TARGET.
3934
3935 2018-01-08  Richard Biener  <rguenther@suse.de>
3936
3937         PR middle-end/83580
3938         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3939
3940 2018-01-08  Richard Biener  <rguenther@suse.de>
3941
3942         PR middle-end/83517
3943         * match.pd ((t * 2) / 2) -> t): Add missing :c.
3944
3945 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
3946
3947         PR middle-end/81897
3948         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3949         basic blocks with a small number of successors.
3950         (convert_control_dep_chain_into_preds): Improve handling of
3951         forwarder blocks.
3952         (dump_predicates): Split apart into...
3953         (dump_pred_chain): ...here...
3954         (dump_pred_info): ...and here.
3955         (can_one_predicate_be_invalidated_p): Add debugging printfs.
3956         (can_chain_union_be_invalidated_p): Improve check for invalidation
3957         of paths.
3958         (uninit_uses_cannot_happen): Avoid unnecessary if
3959         convert_control_dep_chain_into_preds yielded nothing.
3960
3961 2018-01-06  Martin Sebor  <msebor@redhat.com>
3962
3963         PR tree-optimization/83640
3964         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3965         subtracting negative offset from size.
3966         (builtin_access::overlap): Adjust offset bounds of the access to fall
3967         within the size of the object if possible.
3968
3969 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
3970
3971         PR rtl-optimization/83699
3972         * expmed.c (extract_bit_field_1): Restrict the vector usage of
3973         extract_bit_field_as_subreg to cases in which the extracted
3974         value is also a vector.
3975
3976         * lra-constraints.c (process_alt_operands): Test for the equivalence
3977         substitutions when detecting a possible reload cycle.
3978
3979 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
3980
3981         PR debug/83480
3982         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3983         by default if flag_selective_schedling{,2}.  Formatting fixes.
3984
3985         PR rtl-optimization/83682
3986         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3987         if it has non-VECTOR_MODE element mode.
3988         (vec_duplicate_p): Likewise.
3989
3990         PR middle-end/83694
3991         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3992         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3993
3994 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
3995
3996         PR target/83604
3997         * config/i386/i386-builtin.def
3998         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3999         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
4000         Require also OPTION_MASK_ISA_AVX512F in addition to
4001         OPTION_MASK_ISA_GFNI.
4002         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
4003         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
4004         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
4005         to OPTION_MASK_ISA_GFNI.
4006         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
4007         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
4008         OPTION_MASK_ISA_AVX512BW.
4009         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
4010         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
4011         addition to OPTION_MASK_ISA_GFNI.
4012         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
4013         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
4014         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
4015         to OPTION_MASK_ISA_GFNI.
4016         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
4017         a requirement for all ISAs rather than any of them with a few
4018         exceptions.
4019         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
4020         processing.
4021         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
4022         bitmasks to be enabled with 3 exceptions, instead of requiring any
4023         enabled ISA with lots of exceptions.
4024         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
4025         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
4026         Change avx512bw in isa attribute to avx512f.
4027         * config/i386/sgxintrin.h: Add license boilerplate.
4028         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
4029         to __AVX512F__ and __AVX512VL to __AVX512VL__.
4030         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
4031         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
4032         defined.
4033         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
4034         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
4035         temporarily sse2 rather than sse if not enabled already.
4036
4037         PR target/83604
4038         * config/i386/sse.md (VI248_VLBW): Rename to ...
4039         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
4040         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
4041         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
4042         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
4043         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
4044         mode iterator instead of VI248_VLBW.
4045
4046 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
4047
4048         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
4049         (record_modified): Skip clobbers; add debug output.
4050         (param_change_prob): Use sreal frequencies.
4051
4052 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
4053
4054         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
4055         punt for user-aligned variables.
4056
4057 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
4058
4059         * tree-chrec.c (chrec_contains_symbols): Return true for
4060         POLY_INT_CST.
4061
4062 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
4063
4064         PR target/82439
4065         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
4066         of (x|y) == x for BICS pattern.
4067
4068 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
4069
4070         PR tree-optimization/83605
4071         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
4072         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
4073         can throw.
4074
4075 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4076
4077         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
4078         * config/epiphany/rtems.h: New file.
4079
4080 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4081             Uros Bizjak  <ubizjak@gmail.com>
4082
4083         PR target/83554
4084         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
4085         QIreg_operand instead of register_operand predicate.
4086         * config/i386/i386.c (ix86_rop_should_change_byte_p,
4087         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
4088         comments instead of -fmitigate[-_]rop.
4089
4090 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
4091
4092         PR bootstrap/81926
4093         * cgraphunit.c (symbol_table::compile): Switch to text_section
4094         before calling assembly_start debug hook.
4095         * run-rtl-passes.c (run_rtl_passes): Likewise.
4096         Include output.h.
4097
4098 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4099
4100         * tree-vrp.c (extract_range_from_binary_expr_1): Check
4101         range_int_cst_p rather than !symbolic_range_p before calling
4102         extract_range_from_multiplicative_op_1.
4103
4104 2017-01-04  Jeff Law  <law@redhat.com>
4105
4106         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
4107         redundant test in assertion.
4108
4109 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4110
4111         * doc/rtl.texi: Document machine_mode wrapper classes.
4112
4113 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4114
4115         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
4116         using tree_to_uhwi.
4117
4118 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4119
4120         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
4121         the VEC_PERM_EXPR fold to fail.
4122
4123 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4124
4125         PR debug/83585
4126         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
4127         to switched_sections.
4128
4129 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4130
4131         PR target/83680
4132         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
4133         test for d.testing.
4134
4135 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
4136
4137         PR target/83387
4138         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
4139         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
4140
4141 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4142
4143         PR debug/83666
4144         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
4145         is BLKmode and bitpos not zero or mode change is needed.
4146
4147 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4148
4149         PR target/83675
4150         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
4151         TARGET_VIS2.
4152
4153 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
4154
4155         PR target/83628
4156         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
4157         instead of MULT rtx.  Update all corresponding splitters.
4158         (*saddl_se): Ditto.
4159         (*ssub<modesuffix>): Ditto.
4160         (*ssubl_se): Ditto.
4161         (*cmp_sadd_di): Update split patterns.
4162         (*cmp_sadd_si): Ditto.
4163         (*cmp_sadd_sidi): Ditto.
4164         (*cmp_ssub_di): Ditto.
4165         (*cmp_ssub_si): Ditto.
4166         (*cmp_ssub_sidi): Ditto.
4167         * config/alpha/predicates.md (const23_operand): New predicate.
4168         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
4169         Look for ASHIFT, not MULT inner operand.
4170         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
4171
4172 2018-01-04  Martin Liska  <mliska@suse.cz>
4173
4174         PR gcov-profile/83669
4175         * gcov.c (output_intermediate_file): Add version to intermediate
4176         gcov file.
4177         * doc/gcov.texi: Document new field 'version' in intermediate
4178         file format. Fix location of '-k' option of gcov command.
4179
4180 2018-01-04  Martin Liska  <mliska@suse.cz>
4181
4182         PR ipa/82352
4183         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
4184
4185 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4186
4187         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
4188
4189 2018-01-03  Martin Sebor  <msebor@redhat.com>
4190
4191         PR tree-optimization/83655
4192         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
4193         checking calls with invalid arguments.
4194
4195 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4196
4197         * tree-vect-stmts.c (vect_get_store_rhs): New function.
4198         (vectorizable_mask_load_store): Delete.
4199         (vectorizable_call): Return false for masked loads and stores.
4200         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
4201         instead of gimple_assign_rhs1.
4202         (vectorizable_load): Handle IFN_MASK_LOAD.
4203         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
4204
4205 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4206
4207         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
4208         split out from..,
4209         (vectorizable_mask_load_store): ...here.
4210         (vectorizable_load): ...and here.
4211
4212 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4213
4214         * tree-vect-stmts.c (vect_build_all_ones_mask)
4215         (vect_build_zero_merge_argument): New functions, split out from...
4216         (vectorizable_load): ...here.
4217
4218 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4219
4220         * tree-vect-stmts.c (vect_check_store_rhs): New function,
4221         split out from...
4222         (vectorizable_mask_load_store): ...here.
4223         (vectorizable_store): ...and here.
4224
4225 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4226
4227         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
4228         split out from...
4229         (vectorizable_mask_load_store): ...here.
4230
4231 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4232
4233         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
4234         (vect_model_store_cost): Take a vec_load_store_type instead of a
4235         vect_def_type.
4236         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
4237         (vect_model_store_cost): Take a vec_load_store_type instead of a
4238         vect_def_type.
4239         (vectorizable_mask_load_store): Update accordingly.
4240         (vectorizable_store): Likewise.
4241         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
4242
4243 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4244
4245         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
4246         IFN_MASK_LOAD calls here rather than...
4247         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
4248
4249 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4250             Alan Hayward  <alan.hayward@arm.com>
4251             David Sherwood  <david.sherwood@arm.com>
4252
4253         * expmed.c (extract_bit_field_1): For vector extracts,
4254         fall back to extract_bit_field_as_subreg if vec_extract
4255         isn't available.
4256
4257 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4258             Alan Hayward  <alan.hayward@arm.com>
4259             David Sherwood  <david.sherwood@arm.com>
4260
4261         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
4262         they are variable or constant sized.
4263         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
4264         slots for constant-sized data.
4265
4266 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4267             Alan Hayward  <alan.hayward@arm.com>
4268             David Sherwood  <david.sherwood@arm.com>
4269
4270         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
4271         handling COND_EXPRs with boolean comparisons, try to find a better
4272         basis for the mask type than the boolean itself.
4273
4274 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4275
4276         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
4277         is calculated and how it can be overridden.
4278         * genmodes.c (max_bitsize_mode_any_mode): New variable.
4279         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
4280         if defined.
4281         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
4282         if nonzero.
4283
4284 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4285             Alan Hayward  <alan.hayward@arm.com>
4286             David Sherwood  <david.sherwood@arm.com>
4287
4288         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
4289         Remove the mode argument.
4290         (aarch64_simd_valid_immediate): Remove the mode and inverse
4291         arguments.
4292         * config/aarch64/iterators.md (bitsize): New iterator.
4293         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
4294         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
4295         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
4296         aarch64_simd_valid_immediate.
4297         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
4298         (aarch64_reg_or_bic_imm): Likewise.
4299         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
4300         with an insn_type enum and msl with a modifier_type enum.
4301         Replace element_width with a scalar_mode.  Change the shift
4302         to unsigned int.  Add constructors for scalar_float_mode and
4303         scalar_int_mode elements.
4304         (aarch64_vect_float_const_representable_p): Delete.
4305         (aarch64_can_const_movi_rtx_p)
4306         (aarch64_simd_scalar_immediate_valid_for_move)
4307         (aarch64_simd_make_constant): Update call to
4308         aarch64_simd_valid_immediate.
4309         (aarch64_advsimd_valid_immediate_hs): New function.
4310         (aarch64_advsimd_valid_immediate): Likewise.
4311         (aarch64_simd_valid_immediate): Remove mode and inverse
4312         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
4313         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
4314         and aarch64_float_const_representable_p on the result.
4315         (aarch64_output_simd_mov_immediate): Remove mode argument.
4316         Update call to aarch64_simd_valid_immediate and use of
4317         simd_immediate_info.
4318         (aarch64_output_scalar_simd_mov_immediate): Update call
4319         accordingly.
4320
4321 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4322             Alan Hayward  <alan.hayward@arm.com>
4323             David Sherwood  <david.sherwood@arm.com>
4324
4325         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
4326         (mode_nunits): Likewise CONST_MODE_NUNITS.
4327         * machmode.def (ADJUST_NUNITS): Document.
4328         * genmodes.c (mode_data::need_nunits_adj): New field.
4329         (blank_mode): Update accordingly.
4330         (adj_nunits): New variable.
4331         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
4332         parameter.
4333         (emit_mode_size_inline): Set need_bytesize_adj for all modes
4334         listed in adj_nunits.
4335         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
4336         listed in adj_nunits.  Don't emit case statements for such modes.
4337         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
4338         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
4339         nothing if adj_nunits is nonnull.
4340         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
4341         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
4342         (emit_mode_fbit): Update use of print_maybe_const_decl.
4343         (emit_move_size): Likewise.  Treat the array as non-const
4344         if adj_nunits.
4345         (emit_mode_adjustments): Handle adj_nunits.
4346
4347 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4348
4349         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
4350         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
4351         (VECTOR_MODES): Use it.
4352         (make_vector_modes): Take the prefix as an argument.
4353
4354 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4355             Alan Hayward  <alan.hayward@arm.com>
4356             David Sherwood  <david.sherwood@arm.com>
4357
4358         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
4359         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
4360         for MODE_VECTOR_BOOL.
4361         * machmode.def (VECTOR_BOOL_MODE): Document.
4362         * genmodes.c (VECTOR_BOOL_MODE): New macro.
4363         (make_vector_bool_mode): New function.
4364         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
4365         MODE_VECTOR_BOOL.
4366         * lto-streamer-in.c (lto_input_mode_table): Likewise.
4367         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
4368         Likewise.
4369         * stor-layout.c (int_mode_for_mode): Likewise.
4370         * tree.c (build_vector_type_for_mode): Likewise.
4371         * varasm.c (output_constant_pool_2): Likewise.
4372         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
4373         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
4374         for MODE_VECTOR_BOOL.
4375         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
4376         of mode class checks.
4377         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
4378         instead of a list of mode class checks.
4379         (expand_vector_scalar_condition): Likewise.
4380         (type_for_widest_vector_mode): Handle BImode as an inner mode.
4381
4382 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4383             Alan Hayward  <alan.hayward@arm.com>
4384             David Sherwood  <david.sherwood@arm.com>
4385
4386         * machmode.h (mode_size): Change from unsigned short to
4387         poly_uint16_pod.
4388         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
4389         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4390         or if measurement_type is not polynomial.
4391         (fixed_size_mode::includes_p): Check for constant-sized modes.
4392         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
4393         return a poly_uint16 rather than an unsigned short.
4394         (emit_mode_size): Change the type of mode_size from unsigned short
4395         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
4396         (emit_mode_adjustments): Cope with polynomial vector sizes.
4397         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4398         for GET_MODE_SIZE.
4399         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4400         for GET_MODE_SIZE.
4401         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
4402         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
4403         * caller-save.c (setup_save_areas): Likewise.
4404         (replace_reg_with_saved_mem): Likewise.
4405         * calls.c (emit_library_call_value_1): Likewise.
4406         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
4407         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
4408         (gen_lowpart_for_combine): Likewise.
4409         * convert.c (convert_to_integer_1): Likewise.
4410         * cse.c (equiv_constant, cse_insn): Likewise.
4411         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
4412         (cselib_subst_to_values): Likewise.
4413         * dce.c (word_dce_process_block): Likewise.
4414         * df-problems.c (df_word_lr_mark_ref): Likewise.
4415         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
4416         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
4417         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
4418         (rtl_for_decl_location): Likewise.
4419         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
4420         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
4421         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
4422         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
4423         (expand_expr_real_1): Likewise.
4424         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
4425         (pad_below): Likewise.
4426         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4427         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
4428         * ira.c (get_subreg_tracking_sizes): Likewise.
4429         * ira-build.c (ira_create_allocno_objects): Likewise.
4430         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
4431         (ira_sort_regnos_for_alter_reg): Likewise.
4432         * ira-costs.c (record_operand_costs): Likewise.
4433         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
4434         (resolve_simple_move): Likewise.
4435         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
4436         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
4437         (lra_constraints): Likewise.
4438         (CONST_POOL_OK_P): Reject variable-sized modes.
4439         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
4440         (add_pseudo_to_slot, lra_spill): Likewise.
4441         * omp-low.c (omp_clause_aligned_alignment): Likewise.
4442         * optabs-query.c (get_best_extraction_insn): Likewise.
4443         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4444         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
4445         (expand_mult_highpart, valid_multiword_target_p): Likewise.
4446         * recog.c (offsettable_address_addr_space_p): Likewise.
4447         * regcprop.c (maybe_mode_change): Likewise.
4448         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
4449         * regrename.c (build_def_use): Likewise.
4450         * regstat.c (dump_reg_info): Likewise.
4451         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
4452         (find_reloads, find_reloads_subreg_address): Likewise.
4453         * reload1.c (eliminate_regs_1): Likewise.
4454         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
4455         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
4456         (simplify_binary_operation_1, simplify_subreg): Likewise.
4457         * targhooks.c (default_function_arg_padding): Likewise.
4458         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
4459         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
4460         (verify_gimple_assign_ternary): Likewise.
4461         * tree-inline.c (estimate_move_cost): Likewise.
4462         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4463         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
4464         (get_address_cost_ainc): Likewise.
4465         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
4466         (vect_supportable_dr_alignment): Likewise.
4467         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4468         (vectorizable_reduction): Likewise.
4469         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
4470         (vectorizable_operation, vectorizable_load): Likewise.
4471         * tree.c (build_same_sized_truth_vector_type): Likewise.
4472         * valtrack.c (cleanup_auto_inc_dec): Likewise.
4473         * var-tracking.c (emit_note_insn_var_location): Likewise.
4474         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
4475         (ADDR_VEC_ALIGN): Likewise.
4476
4477 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4478             Alan Hayward  <alan.hayward@arm.com>
4479             David Sherwood  <david.sherwood@arm.com>
4480
4481         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
4482         unsigned short.
4483         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4484         or if measurement_type is polynomial.
4485         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
4486         * combine.c (make_extraction): Likewise.
4487         * dse.c (find_shift_sequence): Likewise.
4488         * dwarf2out.c (mem_loc_descriptor): Likewise.
4489         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
4490         (extract_bit_field, extract_low_bits): Likewise.
4491         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
4492         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
4493         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
4494         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
4495         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4496         * reload.c (find_reloads): Likewise.
4497         * reload1.c (alter_reg): Likewise.
4498         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
4499         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
4500         * tree-if-conv.c (predicate_mem_writes): Likewise.
4501         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
4502         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
4503         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
4504         * valtrack.c (dead_debug_insert_temp): Likewise.
4505         * varasm.c (mergeable_constant_section): Likewise.
4506         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
4507
4508 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4509             Alan Hayward  <alan.hayward@arm.com>
4510             David Sherwood  <david.sherwood@arm.com>
4511
4512         * expr.c (expand_assignment): Cope with polynomial mode sizes
4513         when assigning to a CONCAT.
4514
4515 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4516             Alan Hayward  <alan.hayward@arm.com>
4517             David Sherwood  <david.sherwood@arm.com>
4518
4519         * machmode.h (mode_precision): Change from unsigned short to
4520         poly_uint16_pod.
4521         (mode_to_precision): Return a poly_uint16 rather than an unsigned
4522         short.
4523         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
4524         or if measurement_type is not polynomial.
4525         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
4526         in which the mode is already known to be a scalar_int_mode.
4527         * genmodes.c (emit_mode_precision): Change the type of mode_precision
4528         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
4529         initializer.
4530         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4531         for GET_MODE_PRECISION.
4532         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4533         for GET_MODE_PRECISION.
4534         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
4535         as polynomial.
4536         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
4537         (expand_field_assignment, make_extraction): Likewise.
4538         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
4539         (get_last_value): Likewise.
4540         * convert.c (convert_to_integer_1): Likewise.
4541         * cse.c (cse_insn): Likewise.
4542         * expr.c (expand_expr_real_1): Likewise.
4543         * lra-constraints.c (simplify_operand_subreg): Likewise.
4544         * optabs-query.c (can_atomic_load_p): Likewise.
4545         * optabs.c (expand_atomic_load): Likewise.
4546         (expand_atomic_store): Likewise.
4547         * ree.c (combine_reaching_defs): Likewise.
4548         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
4549         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
4550         * tree.h (type_has_mode_precision_p): Likewise.
4551         * ubsan.c (instrument_si_overflow): Likewise.
4552
4553 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4554             Alan Hayward  <alan.hayward@arm.com>
4555             David Sherwood  <david.sherwood@arm.com>
4556
4557         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
4558         polynomial numbers of units.
4559         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
4560         (valid_vector_subparts_p): New function.
4561         (build_vector_type): Remove temporary shim and take the number
4562         of units as a poly_uint64 rather than an int.
4563         (build_opaque_vector_type): Take the number of units as a
4564         poly_uint64 rather than an int.
4565         * tree.c (build_vector_from_ctor): Handle polynomial
4566         TYPE_VECTOR_SUBPARTS.
4567         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
4568         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
4569         (build_vector_from_val): If the number of units is variable,
4570         use build_vec_duplicate_cst for constant operands and
4571         VEC_DUPLICATE_EXPR otherwise.
4572         (make_vector_type): Remove temporary is_constant ().
4573         (build_vector_type, build_opaque_vector_type): Take the number of
4574         units as a poly_uint64 rather than an int.
4575         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
4576         VECTOR_CST_NELTS.
4577         * cfgexpand.c (expand_debug_expr): Likewise.
4578         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
4579         (store_constructor, expand_expr_real_1): Likewise.
4580         (const_scalar_mask_from_tree): Likewise.
4581         * fold-const-call.c (fold_const_reduction): Likewise.
4582         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
4583         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
4584         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
4585         (fold_relational_const): Likewise.
4586         (native_interpret_vector): Likewise.  Change the size from an
4587         int to an unsigned int.
4588         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
4589         TYPE_VECTOR_SUBPARTS.
4590         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
4591         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
4592         duplicating a non-constant operand into a variable-length vector.
4593         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
4594         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
4595         * ipa-icf.c (sem_variable::equals): Likewise.
4596         * match.pd: Likewise.
4597         * omp-simd-clone.c (simd_clone_subparts): Likewise.
4598         * print-tree.c (print_node): Likewise.
4599         * stor-layout.c (layout_type): Likewise.
4600         * targhooks.c (default_builtin_vectorization_cost): Likewise.
4601         * tree-cfg.c (verify_gimple_comparison): Likewise.
4602         (verify_gimple_assign_binary): Likewise.
4603         (verify_gimple_assign_ternary): Likewise.
4604         (verify_gimple_assign_single): Likewise.
4605         * tree-pretty-print.c (dump_generic_node): Likewise.
4606         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4607         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
4608         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
4609         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
4610         (vect_shift_permute_load_chain): Likewise.
4611         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
4612         (expand_vector_condition, optimize_vector_constructor): Likewise.
4613         (lower_vec_perm, get_compute_type): Likewise.
4614         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4615         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
4616         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
4617         (vect_recog_mask_conversion_pattern): Likewise.
4618         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
4619         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
4620         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4621         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
4622         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
4623         (vectorizable_shift, vectorizable_operation, vectorizable_store)
4624         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
4625         (supportable_widening_operation): Likewise.
4626         (supportable_narrowing_operation): Likewise.
4627         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
4628         Likewise.
4629         * varasm.c (output_constant): Likewise.
4630
4631 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4632             Alan Hayward  <alan.hayward@arm.com>
4633             David Sherwood  <david.sherwood@arm.com>
4634
4635         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
4636         so that both the length == 3 and length != 3 cases set up their
4637         own permute vectors.  Add comments explaining why we know the
4638         number of elements is constant.
4639         (vect_permute_load_chain): Likewise.
4640
4641 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4642             Alan Hayward  <alan.hayward@arm.com>
4643             David Sherwood  <david.sherwood@arm.com>
4644
4645         * machmode.h (mode_nunits): Change from unsigned char to
4646         poly_uint16_pod.
4647         (ONLY_FIXED_SIZE_MODES): New macro.
4648         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
4649         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
4650         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
4651         New typedefs.
4652         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
4653         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
4654         or if measurement_type is not polynomial.
4655         * genmodes.c (ZERO_COEFFS): New macro.
4656         (emit_mode_nunits_inline): Make mode_nunits_inline return a
4657         poly_uint16.
4658         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
4659         Use ZERO_COEFFS when emitting initializers.
4660         * data-streamer.h (bp_pack_poly_value): New function.
4661         (bp_unpack_poly_value): Likewise.
4662         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4663         for GET_MODE_NUNITS.
4664         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4665         for GET_MODE_NUNITS.
4666         * tree.c (make_vector_type): Remove temporary shim and make
4667         the real function take the number of units as a poly_uint64
4668         rather than an int.
4669         (build_vector_type_for_mode): Handle polynomial nunits.
4670         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
4671         * emit-rtl.c (const_vec_series_p_1): Likewise.
4672         (gen_rtx_CONST_VECTOR): Likewise.
4673         * fold-const.c (test_vec_duplicate_folding): Likewise.
4674         * genrecog.c (validate_pattern): Likewise.
4675         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
4676         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4677         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
4678         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
4679         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
4680         * rtlanal.c (subreg_get_info): Likewise.
4681         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4682         (vect_grouped_load_supported): Likewise.
4683         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
4684         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
4685         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
4686         (simplify_const_unary_operation, simplify_binary_operation_1)
4687         (simplify_const_binary_operation, simplify_ternary_operation)
4688         (test_vector_ops_duplicate, test_vector_ops): Likewise.
4689         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
4690         instead of CONST_VECTOR_NUNITS.
4691         * varasm.c (output_constant_pool_2): Likewise.
4692         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
4693         explicit-encoded elements in the XVEC for variable-length vectors.
4694
4695 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4696
4697         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
4698
4699 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4700             Alan Hayward  <alan.hayward@arm.com>
4701             David Sherwood  <david.sherwood@arm.com>
4702
4703         * coretypes.h (fixed_size_mode): Declare.
4704         (fixed_size_mode_pod): New typedef.
4705         * builtins.h (target_builtins::x_apply_args_mode)
4706         (target_builtins::x_apply_result_mode): Change type to
4707         fixed_size_mode_pod.
4708         * builtins.c (apply_args_size, apply_result_size, result_vector)
4709         (expand_builtin_apply_args_1, expand_builtin_apply)
4710         (expand_builtin_return): Update accordingly.
4711
4712 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4713
4714         * cse.c (hash_rtx_cb): Hash only the encoded elements.
4715         * cselib.c (cselib_hash_rtx): Likewise.
4716         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
4717         CONST_VECTOR encoding.
4718
4719 2017-01-03  Jakub Jelinek  <jakub@redhat.com>
4720             Jeff Law  <law@redhat.com>
4721
4722         PR target/83641
4723         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
4724         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
4725         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
4726         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
4727
4728         PR target/83641
4729         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
4730         explicitly probe *sp in a noreturn function if there were any callee
4731         register saves or frame pointer is needed.
4732
4733 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4734
4735         PR debug/83621
4736         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
4737         BLKmode for ternary, binary or unary expressions.
4738
4739         PR debug/83645
4740         * var-tracking.c (delete_vta_debug_insn): New inline function.
4741         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
4742         insns from get_insns () to NULL instead of each bb separately.
4743         Use delete_vta_debug_insn.  No longer static.
4744         (vt_debug_insns_local, variable_tracking_main_1): Adjust
4745         delete_vta_debug_insns callers.
4746         * rtl.h (delete_vta_debug_insns): Declare.
4747         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
4748         instead of variable_tracking_main.
4749
4750 2018-01-03  Martin Sebor  <msebor@redhat.com>
4751
4752         PR tree-optimization/83603
4753         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
4754         arguments past the endof the argument list in functions declared
4755         without a prototype.
4756         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
4757         Avoid checking when arguments are null.
4758
4759 2018-01-03  Martin Sebor  <msebor@redhat.com>
4760
4761         PR c/83559
4762         * doc/extend.texi (attribute const): Fix a typo.
4763         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
4764         issuing -Wsuggest-attribute for void functions.
4765
4766 2018-01-03  Martin Sebor  <msebor@redhat.com>
4767
4768         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
4769         offset_int::from instead of wide_int::to_shwi.
4770         (maybe_diag_overlap): Remove assertion.
4771         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
4772         * gimple-ssa-sprintf.c (format_directive): Same.
4773         (parse_directive): Same.
4774         (sprintf_dom_walker::compute_format_length): Same.
4775         (try_substitute_return_value): Same.
4776
4777 2017-01-03  Jeff Law  <law@redhat.com>
4778
4779         PR middle-end/83654
4780         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
4781         non-constant residual for zero at runtime and avoid probing in
4782         that case.  Reorganize code for trailing problem to mirror handling
4783         of the residual.
4784
4785 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
4786
4787         PR tree-optimization/83501
4788         * tree-ssa-strlen.c (get_string_cst): New.
4789         (handle_char_store): Call get_string_cst.
4790
4791 2018-01-03  Martin Liska  <mliska@suse.cz>
4792
4793         PR tree-optimization/83593
4794         * tree-ssa-strlen.c: Include tree-cfg.h.
4795         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
4796         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
4797         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
4798         to false.
4799         (strlen_dom_walker::before_dom_children): Call
4800         gimple_purge_dead_eh_edges. Dump tranformation with details
4801         dump flags.
4802         (strlen_dom_walker::before_dom_children): Update call by adding
4803         new argument cleanup_eh.
4804         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
4805
4806 2018-01-03  Martin Liska  <mliska@suse.cz>
4807
4808         PR ipa/83549
4809         * cif-code.def (VARIADIC_THUNK): New enum value.
4810         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
4811         thunks.
4812
4813 2018-01-03  Jan Beulich  <jbeulich@suse.com>
4814
4815         * sse.md (mov<mode>_internal): Tighten condition for when to use
4816         vmovdqu<ssescalarsize> for TI and OI modes.
4817
4818 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4819
4820         Update copyright years.
4821
4822 2018-01-03  Martin Liska  <mliska@suse.cz>
4823
4824         PR ipa/83594
4825         * ipa-visibility.c (function_and_variable_visibility): Skip
4826         functions with noipa attribure.
4827
4828 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4829
4830         * gcc.c (process_command): Update copyright notice dates.
4831         * gcov-dump.c (print_version): Ditto.
4832         * gcov.c (print_version): Ditto.
4833         * gcov-tool.c (print_version): Ditto.
4834         * gengtype.c (create_file): Ditto.
4835         * doc/cpp.texi: Bump @copying's copyright year.
4836         * doc/cppinternals.texi: Ditto.
4837         * doc/gcc.texi: Ditto.
4838         * doc/gccint.texi: Ditto.
4839         * doc/gcov.texi: Ditto.
4840         * doc/install.texi: Ditto.
4841         * doc/invoke.texi: Ditto.
4842
4843 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4844
4845         * vector-builder.h (vector_builder::m_full_nelts): Change from
4846         unsigned int to poly_uint64.
4847         (vector_builder::full_nelts): Update prototype accordingly.
4848         (vector_builder::new_vector): Likewise.
4849         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
4850         (vector_builder::operator ==): Likewise.
4851         (vector_builder::finalize): Likewise.
4852         * int-vector-builder.h (int_vector_builder::int_vector_builder):
4853         Take the number of elements as a poly_uint64 rather than an
4854         unsigned int.
4855         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
4856         from unsigned int to poly_uint64.
4857         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
4858         (vec_perm_indices::new_vector): Likewise.
4859         (vec_perm_indices::length): Likewise.
4860         (vec_perm_indices::nelts_per_input): Likewise.
4861         (vec_perm_indices::input_nelts): Likewise.
4862         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
4863         number of elements per input as a poly_uint64 rather than an
4864         unsigned int.  Use the original encoding for variable-length
4865         vectors, rather than clamping each individual element.
4866         For the second and subsequent elements in each pattern,
4867         clamp the step and base before clamping their sum.
4868         (vec_perm_indices::series_p): Handle polynomial element counts.
4869         (vec_perm_indices::all_in_range_p): Likewise.
4870         (vec_perm_indices_to_tree): Likewise.
4871         (vec_perm_indices_to_rtx): Likewise.
4872         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
4873         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
4874         (tree_vector_builder::new_binary_operation): Handle polynomial
4875         element counts.  Return false if we need to know the number
4876         of elements at compile time.
4877         * fold-const.c (fold_vec_perm): Punt if the number of elements
4878         isn't known at compile time.
4879
4880 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4881
4882         * vec-perm-indices.h (vec_perm_builder): Change element type
4883         from HOST_WIDE_INT to poly_int64.
4884         (vec_perm_indices::element_type): Update accordingly.
4885         (vec_perm_indices::clamp): Handle polynomial element_types.
4886         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4887         (vec_perm_indices::all_in_range_p): Likewise.
4888         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
4889         than shwi trees.
4890         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
4891         polynomial vec_perm_indices element types.
4892         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
4893         * fold-const.c (fold_vec_perm): Likewise.
4894         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
4895         * tree-vect-generic.c (lower_vec_perm): Likewise.
4896         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4897         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
4898         element type to HOST_WIDE_INT.
4899
4900 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4901             Alan Hayward  <alan.hayward@arm.com>
4902             David Sherwood  <david.sherwood@arm.com>
4903
4904         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
4905         rather than an int.  Use plus_constant.
4906         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
4907         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
4908
4909 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4910             Alan Hayward  <alan.hayward@arm.com>
4911             David Sherwood  <david.sherwood@arm.com>
4912
4913         * calls.c (emit_call_1, expand_call): Change struct_value_size from
4914         a HOST_WIDE_INT to a poly_int64.
4915
4916 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4917             Alan Hayward  <alan.hayward@arm.com>
4918             David Sherwood  <david.sherwood@arm.com>
4919
4920         * calls.c (load_register_parameters): Cope with polynomial
4921         mode sizes.  Require a constant size for BLKmode parameters
4922         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
4923         forces a parameter to be padded at the lsb end in order to
4924         fill a complete number of words, require the parameter size
4925         to be ordered wrt UNITS_PER_WORD.
4926
4927 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4928             Alan Hayward  <alan.hayward@arm.com>
4929             David Sherwood  <david.sherwood@arm.com>
4930
4931         * reload1.c (spill_stack_slot_width): Change element type
4932         from unsigned int to poly_uint64_pod.
4933         (alter_reg): Treat mode sizes as polynomial.
4934
4935 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4936             Alan Hayward  <alan.hayward@arm.com>
4937             David Sherwood  <david.sherwood@arm.com>
4938
4939         * reload.c (complex_word_subreg_p): New function.
4940         (reload_inner_reg_of_subreg, push_reload): Use it.
4941
4942 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4943             Alan Hayward  <alan.hayward@arm.com>
4944             David Sherwood  <david.sherwood@arm.com>
4945
4946         * lra-constraints.c (process_alt_operands): Reject matched
4947         operands whose sizes aren't ordered.
4948         (match_reload): Refer to this check here.
4949
4950 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4951             Alan Hayward  <alan.hayward@arm.com>
4952             David Sherwood  <david.sherwood@arm.com>
4953
4954         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4955         that the mode size is in the set {1, 2, 4, 8, 16}.
4956
4957 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4958             Alan Hayward  <alan.hayward@arm.com>
4959             David Sherwood  <david.sherwood@arm.com>
4960
4961         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4962         Use plus_constant instead of gen_rtx_PLUS.
4963
4964 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4965             Alan Hayward  <alan.hayward@arm.com>
4966             David Sherwood  <david.sherwood@arm.com>
4967
4968         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4969         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4970         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4971         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4972         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4973         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4974         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4975         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4976         * config/i386/i386.c (ix86_push_rounding): ...this new function.
4977         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4978         a poly_int64.
4979         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4980         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4981         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4982         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4983         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4984         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4985         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4986         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4987         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4988         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4989         function.
4990         * expr.c (emit_move_resolve_push): Treat the input and result
4991         of PUSH_ROUNDING as a poly_int64.
4992         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4993         (emit_push_insn): Likewise.
4994         * lra-eliminations.c (mark_not_eliminable): Likewise.
4995         * recog.c (push_operand): Likewise.
4996         * reload1.c (elimination_effects): Likewise.
4997         * rtlanal.c (nonzero_bits1): Likewise.
4998         * calls.c (store_one_arg): Likewise.  Require the padding to be
4999         known at compile time.
5000
5001 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5002             Alan Hayward  <alan.hayward@arm.com>
5003             David Sherwood  <david.sherwood@arm.com>
5004
5005         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
5006         Use plus_constant instead of gen_rtx_PLUS.
5007
5008 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5009             Alan Hayward  <alan.hayward@arm.com>
5010             David Sherwood  <david.sherwood@arm.com>
5011
5012         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
5013         rather than an int.
5014
5015 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5016             Alan Hayward  <alan.hayward@arm.com>
5017             David Sherwood  <david.sherwood@arm.com>
5018
5019         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
5020         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
5021         via stack temporaries.  Treat the mode size as polynomial too.
5022
5023 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5024             Alan Hayward  <alan.hayward@arm.com>
5025             David Sherwood  <david.sherwood@arm.com>
5026
5027         * expr.c (expand_expr_real_2): When handling conversions involving
5028         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
5029         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
5030         as a poly_uint64 too.
5031
5032 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5033             Alan Hayward  <alan.hayward@arm.com>
5034             David Sherwood  <david.sherwood@arm.com>
5035
5036         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
5037
5038 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5039             Alan Hayward  <alan.hayward@arm.com>
5040             David Sherwood  <david.sherwood@arm.com>
5041
5042         * combine.c (can_change_dest_mode): Handle polynomial
5043         REGMODE_NATURAL_SIZE.
5044         * expmed.c (store_bit_field_1): Likewise.
5045         * expr.c (store_constructor): Likewise.
5046         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
5047         and polynomial REGMODE_NATURAL_SIZE.
5048         (gen_lowpart_common): Likewise.
5049         * reginfo.c (record_subregs_of_mode): Likewise.
5050         * rtlanal.c (read_modify_subreg_p): Likewise.
5051
5052 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5053             Alan Hayward  <alan.hayward@arm.com>
5054             David Sherwood  <david.sherwood@arm.com>
5055
5056         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
5057         numbers of elements.
5058
5059 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5060             Alan Hayward  <alan.hayward@arm.com>
5061             David Sherwood  <david.sherwood@arm.com>
5062
5063         * match.pd: Cope with polynomial numbers of vector elements.
5064
5065 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5066             Alan Hayward  <alan.hayward@arm.com>
5067             David Sherwood  <david.sherwood@arm.com>
5068
5069         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
5070         in a POINTER_PLUS_EXPR.
5071
5072 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5073             Alan Hayward  <alan.hayward@arm.com>
5074             David Sherwood  <david.sherwood@arm.com>
5075
5076         * omp-simd-clone.c (simd_clone_subparts): New function.
5077         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
5078         (ipa_simd_modify_function_body): Likewise.
5079
5080 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5081             Alan Hayward  <alan.hayward@arm.com>
5082             David Sherwood  <david.sherwood@arm.com>
5083
5084         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
5085         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
5086         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
5087         (expand_vector_condition, vector_element): Likewise.
5088         (subparts_gt): New function.
5089         (get_compute_type): Use subparts_gt.
5090         (count_type_subparts): Delete.
5091         (expand_vector_operations_1): Use subparts_gt instead of
5092         count_type_subparts.
5093
5094 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5095             Alan Hayward  <alan.hayward@arm.com>
5096             David Sherwood  <david.sherwood@arm.com>
5097
5098         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
5099         (vect_compile_time_alias): ...this new function.  Do the calculation
5100         on poly_ints rather than trees.
5101         (vect_prune_runtime_alias_test_list): Update call accordingly.
5102
5103 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5104             Alan Hayward  <alan.hayward@arm.com>
5105             David Sherwood  <david.sherwood@arm.com>
5106
5107         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
5108         numbers of units.
5109         (vect_schedule_slp_instance): Likewise.
5110
5111 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5112             Alan Hayward  <alan.hayward@arm.com>
5113             David Sherwood  <david.sherwood@arm.com>
5114
5115         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
5116         constant and extern definitions for variable-length vectors.
5117         (vect_get_constant_vectors): Note that the number of units
5118         is known to be constant.
5119
5120 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5121             Alan Hayward  <alan.hayward@arm.com>
5122             David Sherwood  <david.sherwood@arm.com>
5123
5124         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
5125         of units as polynomial.  Choose between WIDE and NARROW based
5126         on multiple_p.
5127
5128 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5129             Alan Hayward  <alan.hayward@arm.com>
5130             David Sherwood  <david.sherwood@arm.com>
5131
5132         * tree-vect-stmts.c (simd_clone_subparts): New function.
5133         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
5134
5135 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5136             Alan Hayward  <alan.hayward@arm.com>
5137             David Sherwood  <david.sherwood@arm.com>
5138
5139         * tree-vect-stmts.c (vectorizable_call): Treat the number of
5140         vectors as polynomial.  Use build_index_vector for
5141         IFN_GOMP_SIMD_LANE.
5142
5143 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5144             Alan Hayward  <alan.hayward@arm.com>
5145             David Sherwood  <david.sherwood@arm.com>
5146
5147         * tree-vect-stmts.c (get_load_store_type): Treat the number of
5148         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
5149         for variable-length vectors.
5150         (vectorizable_mask_load_store): Treat the number of units as
5151         polynomial, asserting that it is constant if the condition has
5152         already been enforced.
5153         (vectorizable_store, vectorizable_load): Likewise.
5154
5155 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5156             Alan Hayward  <alan.hayward@arm.com>
5157             David Sherwood  <david.sherwood@arm.com>
5158
5159         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
5160         of units as polynomial.  Punt if we can't tell at compile time
5161         which vector contains the final result.
5162
5163 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5164             Alan Hayward  <alan.hayward@arm.com>
5165             David Sherwood  <david.sherwood@arm.com>
5166
5167         * tree-vect-loop.c (vectorizable_induction): Treat the number
5168         of units as polynomial.  Punt on SLP inductions.  Use an integer
5169         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
5170         cast of such a series for variable-length floating-point
5171         reductions.
5172
5173 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5174             Alan Hayward  <alan.hayward@arm.com>
5175             David Sherwood  <david.sherwood@arm.com>
5176
5177         * tree.h (build_index_vector): Declare.
5178         * tree.c (build_index_vector): New function.
5179         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
5180         of units as polynomial, forcibly converting it to a constant if
5181         vectorizable_reduction has already enforced the condition.
5182         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
5183         to create a {1,2,3,...} vector.
5184         (vectorizable_reduction): Treat the number of units as polynomial.
5185         Choose vectype_in based on the largest scalar element size rather
5186         than the smallest number of units.  Enforce the restrictions
5187         relied on above.
5188
5189 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5190             Alan Hayward  <alan.hayward@arm.com>
5191             David Sherwood  <david.sherwood@arm.com>
5192
5193         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
5194         number of units as polynomial.
5195
5196 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5197             Alan Hayward  <alan.hayward@arm.com>
5198             David Sherwood  <david.sherwood@arm.com>
5199
5200         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
5201         * target.def (autovectorize_vector_sizes): Return the vector sizes
5202         by pointer, using vector_sizes rather than a bitmask.
5203         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
5204         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
5205         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
5206         Likewise.
5207         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
5208         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
5209         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
5210         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
5211         * omp-general.c (omp_max_vf): Likewise.
5212         * omp-low.c (omp_clause_aligned_alignment): Likewise.
5213         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
5214         * tree-vect-loop.c (vect_analyze_loop): Likewise.
5215         * tree-vect-slp.c (vect_slp_bb): Likewise.
5216         * doc/tm.texi: Regenerate.
5217         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
5218         to a poly_uint64.
5219         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
5220         the vector size as a poly_uint64 rather than an unsigned int.
5221         (current_vector_size): Change from an unsigned int to a poly_uint64.
5222         (get_vectype_for_scalar_type): Update accordingly.
5223         * tree.h (build_truth_vector_type): Take the size and number of
5224         units as a poly_uint64 rather than an unsigned int.
5225         (build_vector_type): Add a temporary overload that takes
5226         the number of units as a poly_uint64 rather than an unsigned int.
5227         * tree.c (make_vector_type): Likewise.
5228         (build_truth_vector_type): Take the number of units as a poly_uint64
5229         rather than an unsigned int.
5230
5231 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5232             Alan Hayward  <alan.hayward@arm.com>
5233             David Sherwood  <david.sherwood@arm.com>
5234
5235         * target.def (get_mask_mode): Take the number of units and length
5236         as poly_uint64s rather than unsigned ints.
5237         * targhooks.h (default_get_mask_mode): Update accordingly.
5238         * targhooks.c (default_get_mask_mode): Likewise.
5239         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
5240         * doc/tm.texi: Regenerate.
5241
5242 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5243             Alan Hayward  <alan.hayward@arm.com>
5244             David Sherwood  <david.sherwood@arm.com>
5245
5246         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
5247         * omp-general.c (omp_max_vf): Likewise.
5248         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
5249         (expand_omp_simd): Handle polynomial safelen.
5250         * omp-low.c (omplow_simd_context): Add a default constructor.
5251         (omplow_simd_context::max_vf): Change from int to poly_uint64.
5252         (lower_rec_simd_input_clauses): Update accordingly.
5253         (lower_rec_input_clauses): Likewise.
5254
5255 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5256             Alan Hayward  <alan.hayward@arm.com>
5257             David Sherwood  <david.sherwood@arm.com>
5258
5259         * tree-vectorizer.h (vect_nunits_for_cost): New function.
5260         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
5261         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
5262         (vect_analyze_slp_cost): Likewise.
5263         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
5264         (vect_model_load_cost): Likewise.
5265
5266 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5267             Alan Hayward  <alan.hayward@arm.com>
5268             David Sherwood  <david.sherwood@arm.com>
5269
5270         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
5271         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
5272         from an unsigned int * to a poly_uint64_pod *.
5273         (calculate_unrolling_factor): New function.
5274         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
5275
5276 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5277             Alan Hayward  <alan.hayward@arm.com>
5278             David Sherwood  <david.sherwood@arm.com>
5279
5280         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
5281         from an unsigned int to a poly_uint64.
5282         (_loop_vec_info::slp_unrolling_factor): Likewise.
5283         (_loop_vec_info::vectorization_factor): Change from an int
5284         to a poly_uint64.
5285         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
5286         (vect_get_num_vectors): New function.
5287         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
5288         (vect_get_num_copies): Use vect_get_num_vectors.
5289         (vect_analyze_data_ref_dependences): Change max_vf from an int *
5290         to an unsigned int *.
5291         (vect_analyze_data_refs): Change min_vf from an int * to a
5292         poly_uint64 *.
5293         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5294         than an unsigned HOST_WIDE_INT.
5295         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
5296         (vect_analyze_data_ref_dependence): Change max_vf from an int *
5297         to an unsigned int *.
5298         (vect_analyze_data_ref_dependences): Likewise.
5299         (vect_compute_data_ref_alignment): Handle polynomial vf.
5300         (vect_enhance_data_refs_alignment): Likewise.
5301         (vect_prune_runtime_alias_test_list): Likewise.
5302         (vect_shift_permute_load_chain): Likewise.
5303         (vect_supportable_dr_alignment): Likewise.
5304         (dependence_distance_ge_vf): Take the vectorization factor as a
5305         poly_uint64 rather than an unsigned HOST_WIDE_INT.
5306         (vect_analyze_data_refs): Change min_vf from an int * to a
5307         poly_uint64 *.
5308         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
5309         vfm1 as a poly_uint64 rather than an int.  Make the same change
5310         for the returned bound_scalar.
5311         (vect_gen_vector_loop_niters): Handle polynomial vf.
5312         (vect_do_peeling): Likewise.  Update call to
5313         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
5314         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
5315         be constant.
5316         * tree-vect-loop.c (vect_determine_vectorization_factor)
5317         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
5318         (vect_get_known_peeling_cost): Likewise.
5319         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
5320         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
5321         (vect_transform_loop): Likewise.  Use the lowest possible VF when
5322         updating the upper bounds of the loop.
5323         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
5324         rather than an int.
5325         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
5326         polynomial unroll factors.
5327         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
5328         (vect_make_slp_decision): Likewise.
5329         (vect_supported_load_permutation_p): Likewise, and polynomial
5330         vf too.
5331         (vect_analyze_slp_cost): Handle polynomial vf.
5332         (vect_slp_analyze_node_operations): Likewise.
5333         (vect_slp_analyze_bb_1): Likewise.
5334         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5335         than an unsigned HOST_WIDE_INT.
5336         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
5337         (vectorizable_load): Handle polynomial vf.
5338         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
5339         a poly_uint64.
5340         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
5341
5342 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5343             Alan Hayward  <alan.hayward@arm.com>
5344             David Sherwood  <david.sherwood@arm.com>
5345
5346         * match.pd: Handle bit operations involving three constants
5347         and try to fold one pair.
5348
5349 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5350
5351         * tree-vect-loop-manip.c: Include gimple-fold.h.
5352         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
5353         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
5354         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
5355         Add a path that uses a step of VF instead of 1, but disable it
5356         for now.
5357         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
5358         and niters_no_overflow parameters.  Update calls to
5359         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
5360         Create a new SSA name if the latter choses to use a ste other
5361         than zero, and return it via niters_vector_mult_vf_var.
5362         * tree-vect-loop.c (vect_transform_loop): Update calls to
5363         vect_do_peeling, vect_gen_vector_loop_niters and
5364         slpeel_make_loop_iterate_ntimes.
5365         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
5366         (vect_gen_vector_loop_niters): Update declarations after above changes.
5367
5368 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
5369
5370         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
5371         128-bit round to integer instructions.
5372         (ceil<mode>2): Likewise.
5373         (btrunc<mode>2): Likewise.
5374         (round<mode>2): Likewise.
5375
5376 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5377
5378         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
5379         unaligned VSX load/store on P8/P9.
5380         (expand_block_clear): Allow the use of unaligned VSX
5381         load/store on P8/P9.
5382
5383 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
5384
5385         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
5386         New function.
5387         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
5388         swap associated with both a load and a store.
5389
5390 2018-01-02  Andrew Waterman  <andrew@sifive.com>
5391
5392         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
5393         * config/riscv/riscv.md (clear_cache): Use it.
5394
5395 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
5396
5397         * web.c: Remove out-of-date comment.
5398
5399 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5400
5401         * expr.c (fixup_args_size_notes): Check that any existing
5402         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
5403         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
5404         (emit_single_push_insn): ...here.
5405
5406 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5407
5408         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
5409         (const_vector_encoded_nelts): New function.
5410         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
5411         (const_vector_int_elt, const_vector_elt): Declare.
5412         * emit-rtl.c (const_vector_int_elt_1): New function.
5413         (const_vector_elt): Likewise.
5414         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
5415         of CONST_VECTOR_ELT.
5416
5417 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5418
5419         * expr.c: Include rtx-vector-builder.h.
5420         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
5421         directly on the tree encoding.
5422         (const_vector_from_tree): Likewise.
5423         * optabs.c: Include rtx-vector-builder.h.
5424         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
5425         sequence of "u" values.
5426         * vec-perm-indices.c: Include rtx-vector-builder.h.
5427         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
5428         directly on the vec_perm_indices encoding.
5429
5430 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5431
5432         * doc/rtl.texi (const_vector): Describe new encoding scheme.
5433         * Makefile.in (OBJS): Add rtx-vector-builder.o.
5434         * rtx-vector-builder.h: New file.
5435         * rtx-vector-builder.c: Likewise.
5436         * rtl.h (rtx_def::u2): Add a const_vector field.
5437         (CONST_VECTOR_NPATTERNS): New macro.
5438         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
5439         (CONST_VECTOR_DUPLICATE_P): Likewise.
5440         (CONST_VECTOR_STEPPED_P): Likewise.
5441         (CONST_VECTOR_ENCODED_ELT): Likewise.
5442         (const_vec_duplicate_p): Check for a duplicated vector encoding.
5443         (unwrap_const_vec_duplicate): Likewise.
5444         (const_vec_series_p): Check for a non-duplicated vector encoding.
5445         Say that the function only returns true for integer vectors.
5446         * emit-rtl.c: Include rtx-vector-builder.h.
5447         (gen_const_vec_duplicate_1): Delete.
5448         (gen_const_vector): Call gen_const_vec_duplicate instead of
5449         gen_const_vec_duplicate_1.
5450         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
5451         (gen_const_vec_duplicate): Use rtx_vector_builder.
5452         (gen_const_vec_series): Likewise.
5453         (gen_rtx_CONST_VECTOR): Likewise.
5454         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
5455         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5456         Build a new vector rather than modifying a CONST_VECTOR in-place.
5457         (handle_special_swappables): Update call accordingly.
5458         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
5459         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5460         Build a new vector rather than modifying a CONST_VECTOR in-place.
5461         (handle_special_swappables): Update call accordingly.
5462
5463 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5464
5465         * simplify-rtx.c (simplify_const_binary_operation): Use
5466         CONST_VECTOR_ELT instead of XVECEXP.
5467
5468 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5469
5470         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
5471         the selector elements to be different from the data elements
5472         if the selector is a VECTOR_CST.
5473         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
5474         ssizetype for the selector.
5475
5476 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5477
5478         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
5479         before testing each element individually.
5480         * tree-vect-generic.c (lower_vec_perm): Likewise.
5481
5482 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5483
5484         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
5485         * selftest-run-tests.c (selftest::run_tests): Call it.
5486         * vector-builder.h (vector_builder::operator ==): New function.
5487         (vector_builder::operator !=): Likewise.
5488         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
5489         (vec_perm_indices::all_from_input_p): New function.
5490         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5491         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
5492         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
5493         instead of reading the VECTOR_CST directly.  Detect whether both
5494         vector inputs are the same before constructing the vec_perm_indices,
5495         and update the number of inputs argument accordingly.  Use the
5496         utility functions added above.  Only construct sel2 if we need to.
5497
5498 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5499
5500         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
5501         the broadcast of the low byte.
5502         (expand_mult_highpart): Use an explicit encoding for the permutes.
5503         * optabs-query.c (can_mult_highpart_p): Likewise.
5504         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
5505         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5506         (vectorizable_bswap): Likewise.
5507         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
5508         explicit encoding for the power-of-2 permutes.
5509         (vect_permute_store_chain): Likewise.
5510         (vect_grouped_load_supported): Likewise.
5511         (vect_permute_load_chain): Likewise.
5512
5513 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5514
5515         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
5516         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
5517         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
5518         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5519         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
5520         (vect_gen_perm_mask_any): Likewise.
5521
5522 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5523
5524         * int-vector-builder.h: New file.
5525         * vec-perm-indices.h: Include int-vector-builder.h.
5526         (vec_perm_indices): Redefine as an int_vector_builder.
5527         (auto_vec_perm_indices): Delete.
5528         (vec_perm_builder): Redefine as a stand-alone class.
5529         (vec_perm_indices::vec_perm_indices): New function.
5530         (vec_perm_indices::clamp): Likewise.
5531         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
5532         (vec_perm_indices::new_vector): New function.
5533         (vec_perm_indices::new_expanded_vector): Update for new
5534         vec_perm_indices class.
5535         (vec_perm_indices::rotate_inputs): New function.
5536         (vec_perm_indices::all_in_range_p): Operate directly on the
5537         encoded form, without computing elided elements.
5538         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
5539         encoding.  Update for new vec_perm_indices class.
5540         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
5541         the given vec_perm_builder.
5542         (expand_vec_perm_var): Update vec_perm_builder constructor.
5543         (expand_mult_highpart): Use vec_perm_builder instead of
5544         auto_vec_perm_indices.
5545         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
5546         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
5547         or double series encoding as appropriate.
5548         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
5549         vec_perm_indices instead of auto_vec_perm_indices.
5550         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5551         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5552         (vect_permute_store_chain): Likewise.
5553         (vect_grouped_load_supported): Likewise.
5554         (vect_permute_load_chain): Likewise.
5555         (vect_shift_permute_load_chain): Likewise.
5556         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5557         (vect_transform_slp_perm_load): Likewise.
5558         (vect_schedule_slp_instance): Likewise.
5559         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5560         (vectorizable_mask_load_store): Likewise.
5561         (vectorizable_bswap): Likewise.
5562         (vectorizable_store): Likewise.
5563         (vectorizable_load): Likewise.
5564         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
5565         vec_perm_indices instead of auto_vec_perm_indices.  Use
5566         tree_to_vec_perm_builder to read the vector from a tree.
5567         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
5568         vec_perm_builder instead of a vec_perm_indices.
5569         (have_whole_vector_shift): Use vec_perm_builder and
5570         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
5571         truncation to calc_vec_perm_mask_for_shift.
5572         (vect_create_epilog_for_reduction): Likewise.
5573         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
5574         from auto_vec_perm_indices to vec_perm_indices.
5575         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5576         instead of changing individual elements.
5577         (aarch64_vectorize_vec_perm_const): Use new_vector to install
5578         the vector in d.perm.
5579         * config/arm/arm.c (expand_vec_perm_d::perm): Change
5580         from auto_vec_perm_indices to vec_perm_indices.
5581         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5582         instead of changing individual elements.
5583         (arm_vectorize_vec_perm_const): Use new_vector to install
5584         the vector in d.perm.
5585         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
5586         Update vec_perm_builder constructor.
5587         (rs6000_expand_interleave): Likewise.
5588         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
5589         (rs6000_expand_interleave): Likewise.
5590
5591 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5592
5593         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
5594         to qimode could truncate the indices.
5595         * optabs.c (expand_vec_perm_var): Likewise.
5596
5597 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5598
5599         * Makefile.in (OBJS): Add vec-perm-indices.o.
5600         * vec-perm-indices.h: New file.
5601         * vec-perm-indices.c: Likewise.
5602         * target.h (vec_perm_indices): Replace with a forward class
5603         declaration.
5604         (auto_vec_perm_indices): Move to vec-perm-indices.h.
5605         * optabs.h: Include vec-perm-indices.h.
5606         (expand_vec_perm): Delete.
5607         (selector_fits_mode_p, expand_vec_perm_var): Declare.
5608         (expand_vec_perm_const): Declare.
5609         * target.def (vec_perm_const_ok): Replace with...
5610         (vec_perm_const): ...this new hook.
5611         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
5612         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
5613         * doc/tm.texi: Regenerate.
5614         * optabs.def (vec_perm_const): Delete.
5615         * doc/md.texi (vec_perm_const): Likewise.
5616         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
5617         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
5618         expand_vec_perm for constant permutation vectors.  Assert that
5619         the mode of variable permutation vectors is the integer equivalent
5620         of the mode that is being permuted.
5621         * optabs-query.h (selector_fits_mode_p): Declare.
5622         * optabs-query.c: Include vec-perm-indices.h.
5623         (selector_fits_mode_p): New function.
5624         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
5625         is defined, instead of checking whether the vec_perm_const_optab
5626         exists.  Use targetm.vectorize.vec_perm_const instead of
5627         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
5628         fit in the vector mode before using a variable permute.
5629         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
5630         vec_perm_indices instead of an rtx.
5631         (expand_vec_perm): Replace with...
5632         (expand_vec_perm_const): ...this new function.  Take the selector
5633         as a vec_perm_indices rather than an rtx.  Also take the mode of
5634         the selector.  Update call to shift_amt_for_vec_perm_mask.
5635         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
5636         Use vec_perm_indices::new_expanded_vector to expand the original
5637         selector into bytes.  Check whether the indices fit in the vector
5638         mode before using a variable permute.
5639         (expand_vec_perm_var): Make global.
5640         (expand_mult_highpart): Use expand_vec_perm_const.
5641         * fold-const.c: Includes vec-perm-indices.h.
5642         * tree-ssa-forwprop.c: Likewise.
5643         * tree-vect-data-refs.c: Likewise.
5644         * tree-vect-generic.c: Likewise.
5645         * tree-vect-loop.c: Likewise.
5646         * tree-vect-slp.c: Likewise.
5647         * tree-vect-stmts.c: Likewise.
5648         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
5649         Delete.
5650         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
5651         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
5652         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
5653         (aarch64_vectorize_vec_perm_const): ...this new function.
5654         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5655         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5656         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
5657         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
5658         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5659         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5660         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
5661         into...
5662         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
5663         check for NEON modes.
5664         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
5665         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
5666         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
5667         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
5668         into...
5669         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
5670         the old VEC_PERM_CONST conditions.
5671         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
5672         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
5673         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
5674         (ia64_vectorize_vec_perm_const_ok): Merge into...
5675         (ia64_vectorize_vec_perm_const): ...this new function.
5676         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
5677         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
5678         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
5679         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
5680         * config/mips/mips.c (mips_expand_vec_perm_const)
5681         (mips_vectorize_vec_perm_const_ok): Merge into...
5682         (mips_vectorize_vec_perm_const): ...this new function.
5683         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
5684         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
5685         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
5686         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
5687         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
5688         (rs6000_expand_vec_perm_const): Delete.
5689         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
5690         Delete.
5691         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5692         (altivec_expand_vec_perm_const_le): Take each operand individually.
5693         Operate on constant selectors rather than rtxes.
5694         (altivec_expand_vec_perm_const): Likewise.  Update call to
5695         altivec_expand_vec_perm_const_le.
5696         (rs6000_expand_vec_perm_const): Delete.
5697         (rs6000_vectorize_vec_perm_const_ok): Delete.
5698         (rs6000_vectorize_vec_perm_const): New function.
5699         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5700         an element count and rtx array.
5701         (rs6000_expand_extract_even): Update call accordingly.
5702         (rs6000_expand_interleave): Likewise.
5703         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
5704         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
5705         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
5706         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
5707         (rs6000_expand_vec_perm_const): Delete.
5708         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5709         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5710         (altivec_expand_vec_perm_const_le): Take each operand individually.
5711         Operate on constant selectors rather than rtxes.
5712         (altivec_expand_vec_perm_const): Likewise.  Update call to
5713         altivec_expand_vec_perm_const_le.
5714         (rs6000_expand_vec_perm_const): Delete.
5715         (rs6000_vectorize_vec_perm_const_ok): Delete.
5716         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
5717         reference to the SPE evmerge intructions.
5718         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5719         an element count and rtx array.
5720         (rs6000_expand_extract_even): Update call accordingly.
5721         (rs6000_expand_interleave): Likewise.
5722         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
5723         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
5724         new function.
5725         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5726
5727 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5728
5729         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
5730         vector mode and that that mode matches the mode of the data
5731         being permuted.
5732         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
5733         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
5734         directly using expand_vec_perm_1 when forcing selectors into
5735         registers.
5736         (expand_vec_perm_var): New function, split out from expand_vec_perm.
5737
5738 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5739
5740         * optabs-query.h (can_vec_perm_p): Delete.
5741         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
5742         * optabs-query.c (can_vec_perm_p): Split into...
5743         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
5744         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
5745         particular selector is valid.
5746         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5747         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5748         (vect_grouped_load_supported): Likewise.
5749         (vect_shift_permute_load_chain): Likewise.
5750         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5751         (vect_transform_slp_perm_load): Likewise.
5752         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5753         (vectorizable_bswap): Likewise.
5754         (vect_gen_perm_mask_checked): Likewise.
5755         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
5756         implementations of variable permutation vectors into account
5757         when deciding which selector to use.
5758         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
5759         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
5760         with a false third argument.
5761         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
5762         to test whether the constant selector is valid and can_vec_perm_var_p
5763         to test whether a variable selector is valid.
5764
5765 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5766
5767         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
5768         * optabs-query.c (can_vec_perm_p): Likewise.
5769         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
5770         instead of vec_perm_indices.
5771         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
5772         (vect_gen_perm_mask_checked): Likewise,
5773         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
5774         (vect_gen_perm_mask_checked): Likewise,
5775
5776 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5777
5778         * optabs-query.h (qimode_for_vec_perm): Declare.
5779         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
5780         (qimode_for_vec_perm): ...this new function.
5781         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
5782
5783 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5784
5785         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
5786         does not have a conditional at the top.
5787
5788 2018-01-02  Richard Biener  <rguenther@suse.de>
5789
5790         * ipa-inline.c (big_speedup_p): Fix expression.
5791
5792 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
5793
5794         PR target/81616
5795         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
5796         for generic 4->6.
5797
5798 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
5799
5800         PR target/81616
5801         Generic tuning.
5802         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
5803         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
5804         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
5805         cond_taken_branch_cost 3->4.
5806
5807 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
5808
5809         PR tree-optimization/83581
5810         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
5811         TODO_cleanup_cfg if any changes have been made.
5812
5813         PR middle-end/83608
5814         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
5815         convert_modes if target mode has the right side, but different mode
5816         class.
5817
5818         PR middle-end/83609
5819         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
5820         last argument when extracting from CONCAT.  If either from_real or
5821         from_imag is NULL, use expansion through memory.  If result is not
5822         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
5823         the parts directly to inner mode, if even that fails, use expansion
5824         through memory.
5825
5826         PR middle-end/83623
5827         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
5828         check for bswap in mode rather than HImode and use that in expand_unop
5829         too.
5830 \f
5831 Copyright (C) 2018 Free Software Foundation, Inc.
5832
5833 Copying and distribution of this file, with or without modification,
5834 are permitted in any medium without royalty provided the copyright
5835 notice and this notice are preserved.