gcc/ChangeLog

   1 2018-02-02  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * config/i386/i386.c (ix86_output_function_return): Pass
   4         INVALID_REGNUM, instead of -1, as invalid register number to
   5         indirect_thunk_name and output_indirect_thunk.
   6
   7 2018-02-02  Julia Koval  <julia.koval@intel.com>
   8
   9         * config.gcc: Add -march=icelake.
  10         * config/i386/driver-i386.c (host_detect_local_cpu): Detect icelake.
  11         * config/i386/i386-c.c (ix86_target_macros_internal): Handle icelake.
  12         * config/i386/i386.c (processor_costs): Add m_ICELAKE.
  13         (PTA_ICELAKE, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES, PTA_AVX512VBMI2,
  14         PTA_VPCLMULQDQ, PTA_RDPID, PTA_AVX512BITALG): New.
  15         (processor_target_table): Add icelake.
  16         (ix86_option_override_internal): Handle new PTAs.
  17         (get_builtin_code_for_version): Handle icelake.
  18         (M_INTEL_COREI7_ICELAKE): New.
  19         (fold_builtin_cpu): Handle icelake.
  20         * config/i386/i386.h (TARGET_ICELAKE, PROCESSOR_ICELAKE): New.
  21         * doc/invoke.texi: Add -march=icelake.
  22
  23 2018-02-02  Julia Koval  <julia.koval@intel.com>
  24
  25         * config/i386/i386.c (ix86_option_override_internal): Change flags type
  26         to wide_int_bitmask.
  27         * wide-int-bitmask.h: New.
  28
  29 2018-02-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
  30
  31         PR target/84066
  32         * config/i386/i386.md: Replace Pmode with word_mode in
  33         builtin_setjmp_setup and builtin_longjmp to support x32.
  34
  35 2018-02-01  Peter Bergner  <bergner@vnet.ibm.com>
  36
  37         PR target/56010
  38         PR target/83743
  39         * config/rs6000/driver-rs6000.c: #include "diagnostic.h".
  40         #include "opts.h".
  41         (rs6000_supported_cpu_names): New static variable.
  42         (linux_cpu_translation_table): Likewise.
  43         (elf_platform) <cpu>: Define new static variable and use it.
  44         Translate kernel AT_PLATFORM name to canonical name if needed.
  45         Error if platform name is unknown.
  46
  47 2018-02-01  Aldy Hernandez  <aldyh@redhat.com>
  48
  49         PR target/84089
  50         * config/pa/predicates.md (base14_operand): Handle E_VOIDmode.
  51
  52 2018-02-01  Jeff Law  <law@redhat.com>
  53
  54         PR target/84128
  55         * config/i386/i386.c (release_scratch_register_on_entry): Add new
  56         OFFSET and RELEASE_VIA_POP arguments.  Use SP+OFFSET to restore
  57         the scratch if RELEASE_VIA_POP is false.
  58         (ix86_adjust_stack_and_probe_stack_clash): Un-constify SIZE.
  59         If we have to save a temporary register, decrement SIZE appropriately.
  60         Pass new arguments to release_scratch_register_on_entry.
  61         (ix86_adjust_stack_and_probe): Likewise.
  62         (ix86_emit_probe_stack_range): Pass new arguments to
  63         release_scratch_register_on_entry.
  64
  65 2018-02-01  Uros Bizjak  <ubizjak@gmail.com>
  66
  67         PR rtl-optimization/84157
  68         * combine.c (change_zero_ext): Use REG_P predicate in
  69         front of HARD_REGISTER_P predicate.
  70
  71 2018-02-01  Georg-Johann Lay  <avr@gjlay.de>
  72
  73         * config/avr/avr.c (avr_option_override): Move disabling of
  74         -fdelete-null-pointer-checks to...
  75         * common/config/avr/avr-common.c (avr_option_optimization_table):
  76         ...here.
  77
  78 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
  79
  80         PR tree-optimization/81635
  81         * tree-data-ref.c (split_constant_offset_1): For types that
  82         wrap on overflow, try to use range info to prove that wrapping
  83         cannot occur.
  84
  85 2018-02-01  Renlin Li  <renlin.li@arm.com>
  86
  87         PR target/83370
  88         * config/aarch64/aarch64.c (aarch64_class_max_nregs): Handle
  89         TAILCALL_ADDR_REGS.
  90         (aarch64_register_move_cost): Likewise.
  91         * config/aarch64/aarch64.h (reg_class): Rename CALLER_SAVE_REGS to
  92         TAILCALL_ADDR_REGS.
  93         (REG_CLASS_NAMES): Likewise.
  94         (REG_CLASS_CONTENTS): Rename CALLER_SAVE_REGS to
  95         TAILCALL_ADDR_REGS. Remove IP registers.
  96         * config/aarch64/aarch64.md (Ucs): Update register constraint.
  97
  98 2018-02-01  Richard Biener  <rguenther@suse.de>
  99
 100         * domwalk.h (dom_walker::dom_walker): Add additional constructor
 101         for specifying RPO order and allow NULL for that.
 102         * domwalk.c (dom_walker::dom_walker): Likewise.
 103         (dom_walker::walk): Handle NULL RPO order.
 104         * tree-into-ssa.c (rewrite_dom_walker): Do not walk dom children
 105         in RPO order.
 106         (rewrite_update_dom_walker): Likewise.
 107         (mark_def_dom_walker): Likewise.
 108
 109 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 110
 111         * config/aarch64/aarch64-protos.h (aarch64_split_sve_subreg_move)
 112         (aarch64_maybe_expand_sve_subreg_move): Declare.
 113         * config/aarch64/aarch64.md (UNSPEC_REV_SUBREG): New unspec.
 114         * config/aarch64/predicates.md (aarch64_any_register_operand): New
 115         predicate.
 116         * config/aarch64/aarch64-sve.md (mov<mode>): Optimize subreg moves
 117         that are semantically a reverse operation.
 118         (*aarch64_sve_mov<mode>_subreg_be): New pattern.
 119         * config/aarch64/aarch64.c (aarch64_maybe_expand_sve_subreg_move):
 120         (aarch64_replace_reg_mode, aarch64_split_sve_subreg_move): New
 121         functions.
 122         (aarch64_can_change_mode_class): For big-endian, forbid changes
 123         between two SVE modes if they have different element sizes.
 124
 125 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 126
 127         * config/aarch64/aarch64.c (aarch64_expand_sve_const_vector): Prefer
 128         the TImode handling for big-endian targets.
 129
 130 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 131
 132         * config/aarch64/aarch64-sve.md (sve_ld1rq): Replace with...
 133         (*sve_ld1rq<Vesize>): ... this new pattern.  Handle all element sizes,
 134         not just bytes.
 135         * config/aarch64/aarch64.c (aarch64_expand_sve_widened_duplicate):
 136         Remove BSWAP handing for big-endian targets and use the form of
 137         LD1RQ appropariate for the mode.
 138
 139 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 140
 141         * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Handle
 142         all CONST_VECTOR_DUPLICATE_P vectors, not just those with a single
 143         duplicated element.
 144
 145 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 146
 147         PR tearget/83845
 148         * config/aarch64/aarch64.c (aarch64_secondary_reload): Tighten
 149         check for operands that need to go through aarch64_sve_reload_be.
 150
 151 2018-02-01  Jakub Jelinek  <jakub@redhat.com>
 152
 153         PR tree-optimization/81661
 154         PR tree-optimization/84117
 155         * tree-eh.h (rewrite_to_non_trapping_overflow): Declare.
 156         * tree-eh.c: Include gimplify.h.
 157         (find_trapping_overflow, replace_trapping_overflow,
 158         rewrite_to_non_trapping_overflow): New functions.
 159         * tree-vect-loop.c: Include tree-eh.h.
 160         (vect_get_loop_niters): Use rewrite_to_non_trapping_overflow.
 161         * tree-data-ref.c: Include tree-eh.h.
 162         (get_segment_min_max): Use rewrite_to_non_trapping_overflow.
 163
 164 2018-01-31  Uros Bizjak  <ubizjak@gmail.com>
 165
 166         PR rtl-optimization/84123
 167         * combine.c (change_zero_ext): Check if hard register satisfies
 168         can_change_dest_mode before calling gen_lowpart_SUBREG.
 169
 170 2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>
 171
 172         PR target/82444
 173         * ira.c (ira_init_register_move_cost): Remove assert.
 174
 175 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 176
 177         PR rtl-optimization/84071
 178         * doc/tm.texi.in (WORD_REGISTER_OPERATIONS): Add explicit case.
 179         * doc/tm.texi: Regenerate.
 180
 181 2018-01-31  Richard Biener  <rguenther@suse.de>
 182
 183         PR tree-optimization/84132
 184         * tree-data-ref.c (analyze_miv_subscript): Properly
 185         check whether evolution_function_is_affine_multivariate_p
 186         before calling gcd_of_steps_may_divide_p.
 187
 188 2018-01-31  Julia Koval  <julia.koval@intel.com>
 189
 190         PR target/83618
 191         * config/i386/i386.c (ix86_expand_builtin): Handle IX86_BUILTIN_RDPID.
 192         * config/i386/i386.md (rdpid_rex64) New.
 193         (rdpid): Make 32bit only.
 194
 195 2018-01-29  Aldy Hernandez  <aldyh@redhat.com>
 196
 197         PR lto/84105
 198         * tree-pretty-print.c (dump_generic_node): Handle a TYPE_NAME with
 199         an IDENTIFIER_NODE for FUNCTION_TYPE's.
 200
 201 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 202
 203         Revert
 204         2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
 205
 206         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
 207
 208 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 209
 210         PR rtl-optimization/84071
 211         * combine.c (record_dead_and_set_regs_1): Record the source unmodified
 212         for a paradoxical SUBREG on a WORD_REGISTER_OPERATIONS target.
 213
 214 2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>
 215
 216         * config/arc/arc.c (arc_handle_aux_attribute): New function.
 217         (arc_attribute_table): Add 'aux' attribute.
 218         (arc_in_small_data_p): Consider aux like variables.
 219         (arc_is_aux_reg_p): New function.
 220         (arc_asm_output_aligned_decl_local): Ignore 'aux' like variables.
 221         (arc_get_aux_arg): New function.
 222         (prepare_move_operands): Handle aux-register access.
 223         (arc_handle_aux_attribute): New function.
 224         * doc/extend.texi (ARC Variable attributes): Add subsection.
 225
 226 2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>
 227
 228         * config/arc/arc-protos.h (arc_is_uncached_mem_p): Function proto.
 229         * config/arc/arc.c (arc_handle_uncached_attribute): New function.
 230         (arc_attribute_table): Add 'uncached' attribute.
 231         (arc_print_operand): Print '.di' flag for uncached memory
 232         accesses.
 233         (arc_in_small_data_p): Do not consider for small data the uncached
 234         types.
 235         (arc_is_uncached_mem_p): New function.
 236         * config/arc/predicates.md (compact_store_memory_operand): Check
 237         for uncached memory accesses.
 238         (nonvol_nonimm_operand): Likewise.
 239         * gcc/doc/extend.texi (ARC Type Attribute): New subsection.
 240
 241 2018-01-31  Jakub Jelinek  <jakub@redhat.com>
 242
 243         PR c/84100
 244         * common.opt (falign-functions=, falign-jumps=, falign-labels=,
 245         falign-loops=): Add Optimization flag.
 246
 247 2018-01-30  Jeff Law  <law@redhat.com>
 248
 249         PR target/84064
 250         * i386.c (ix86_adjust_stack_and_probe_stack_clash): New argument
 251         INT_REGISTERS_SAVED.  Check it prior to calling
 252         get_scratch_register_on_entry.
 253         (ix86_adjust_stack_and_probe): Similarly.
 254         (ix86_emit_probe_stack_range): Similarly.
 255         (ix86_expand_prologue): Corresponding changes.
 256
 257 2018-01-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 258
 259         PR target/40411
 260         * config/sol2.h (STARTFILE_ARCH_SPEC): Use -std=c*,
 261         -std=iso9899:199409 instead of -pedantic to select values-Xc.o.
 262
 263 2018-01-30  Vladimir Makarov  <vmakarov@redhat.com>
 264
 265         PR target/84112
 266         * lra-constraints.c (curr_insn_transform): Process AND in the
 267         address.
 268
 269 2018-01-30  Jakub Jelinek  <jakub@redhat.com>
 270
 271         PR rtl-optimization/83986
 272         * sched-deps.c (sched_analyze_insn): For frame related insns, add anti
 273         dependence against last_pending_memory_flush in addition to
 274         pending_jump_insns.
 275
 276 2018-01-30  Alexandre Oliva <aoliva@redhat.com>
 277
 278         PR tree-optimization/81611
 279         * tree-ssa-dom.c (simple_iv_increment_p): Skip intervening
 280         copies.
 281
 282 2018-01-30  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
 283
 284         * config/rs6000/rs6000.c (rs6000_internal_arg_pointer): Only return
 285         a reg rtx.
 286
 287 2018-01-30  Richard Biener  <rguenther@suse.de>
 288             Jakub Jelinek  <jakub@redhat.com>
 289
 290         PR tree-optimization/84111
 291         * tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1): Skip
 292         inner loops added during recursion, as they don't have up-to-date
 293         SSA form.
 294
 295 2018-01-30  Jan Hubicka  <hubicka@ucw.cz>
 296
 297         PR ipa/81360
 298         * ipa-inline.c (can_inline_edge_p): Break out late tests to...
 299         (can_inline_edge_by_limits_p): ... here.
 300         (can_early_inline_edge_p, check_callers,
 301         update_caller_keys, update_callee_keys, recursive_inlining,
 302         add_new_edges_to_heap, speculation_useful_p,
 303         inline_small_functions,
 304         inline_small_functions, flatten_function,
 305         inline_to_all_callers_1): Update.
 306
 307 2018-01-30  Jan Hubicka  <hubicka@ucw.cz>
 308
 309         * profile-count.c (profile_count::combine_with_ipa_count): Handle
 310         zeros correctly.
 311
 312 2018-01-30  Richard Biener  <rguenther@suse.de>
 313
 314         PR tree-optimization/83008
 315         * tree-vect-slp.c (vect_analyze_slp_cost_1): Properly cost
 316         invariant and constant vector uses in stmts when they need
 317         more than one stmt.
 318
 319 2018-01-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 320
 321         PR bootstrap/84017
 322         * configure.ac (gcc_cv_as_shf_merge): Disable on Solaris 10/x86.
 323         * configure: Regenerate.
 324
 325 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
 326
 327         * config/aarch64/aarch64-sve.md (*vec_extract<mode><Vel>_0): New
 328         pattern.
 329         (*vec_extract<mode><Vel>_v128): Require a nonzero lane number.
 330         Use gen_rtx_REG rather than gen_lowpart.
 331
 332 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
 333
 334         * lra-constraints.c (match_reload): Use subreg_lowpart_offset
 335         rather than 0 when creating partial subregs.
 336
 337 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
 338
 339         * vec-perm-indices.c (vec_perm_indices::series_p): Give examples
 340         of usage.
 341
 342 2018-01-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
 343
 344         PR target/81550
 345         * config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): If DFmode
 346         and SFmode can go in Altivec registers (-mcpu=power7 for DFmode,
 347         -mcpu=power8 for SFmode) don't set the PRE_INCDEC or PRE_MODIFY
 348         flags.  This restores the settings used before the 2017-07-24.
 349         Turning off pre increment/decrement/modify allows IVOPTS to
 350         optimize DF/SF loops where the index is an int.
 351
 352 2018-01-29  Richard Biener <rguenther@suse.de>
 353             Kelvin Nilsen  <kelvin@gcc.gnu.org>
 354
 355         PR bootstrap/80867
 356         * tree-vect-stmts.c (vectorizable_call): Don't call
 357         targetm.vectorize_builtin_md_vectorized_function if callee is
 358         NULL.
 359
 360 2018-01-22 Carl Love <cel@us.ibm.com>
 361
 362         * doc/extend.tex: Fix typo in second arg in
 363         __builtin_bcdadd_{lt|eq|gt|ov} and __builtin_bcdsub_{lt|eq|gt|ov}.
 364
 365 2018-01-29  Richard Biener  <rguenther@suse.de>
 366
 367         PR tree-optimization/84086
 368         * tree-ssanames.c: Include cfgloop.h and tree-scalar-evolution.h.
 369         (flush_ssaname_freelist): When SSA names were released reset
 370         the SCEV hash table.
 371
 372 2018-01-29  Richard Biener  <rguenther@suse.de>
 373
 374         PR tree-optimization/84057
 375         * tree-ssa-loop-ivcanon.c (unloop_loops): Deal with already
 376         removed paths when removing edges.
 377
 378 2018-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 379
 380         * doc/invoke.texi: Replace -mfunction-return==@var{choice} with
 381         -mfunction-return=@var{choice}.
 382
 383 2018-01-27  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 384
 385         PR diagnostic/84034
 386         * diagnostic-show-locus.c (get_line_width_without_trailing_whitespace):
 387         Handle CR like TAB.
 388         (layout::print_source_line): Likewise.
 389         (test_get_line_width_without_trailing_whitespace): Add test cases.
 390
 391 2018-01-27  Jakub Jelinek  <jakub@redhat.com>
 392
 393         PR middle-end/84040
 394         * sched-deps.c (sched_macro_fuse_insns): Return immediately for
 395         debug insns.
 396
 397 2018-01-26  Jim Wilson  <jimw@sifive.com>
 398
 399         * config/riscv/riscv.h (MAX_FIXED_MODE_SIZE): New.
 400
 401         * config/riscv/elf.h (LIB_SPEC): Don't include -lgloss when nosys.specs
 402         specified.
 403
 404 2018-01-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 405
 406         * config/aarch64/aarch64.md: Add peepholes for CMP + SUB -> SUBS
 407         and CMP + SUB-immediate -> SUBS.
 408
 409 2018-01-26  Martin Sebor  <msebor@redhat.com>
 410
 411         PR tree-optimization/83896
 412         * tree-ssa-strlen.c (get_string_len): Rename...
 413         (get_string_cst_length): ...to this.  Return HOST_WIDE_INT.
 414         Avoid assuming length is constant.
 415         (handle_char_store): Use HOST_WIDE_INT for string length.
 416
 417 2018-01-26  Uros Bizjak  <ubizjak@gmail.com>
 418
 419         PR target/81763
 420         * config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
 421         to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
 422
 423 2018-01-26  Richard Biener  <rguenther@suse.de>
 424
 425         PR rtl-optimization/84003
 426         * dse.c (record_store): Only record redundant stores when
 427         the earlier store aliases at least all accesses the later one does.
 428
 429 2018-01-26  Jakub Jelinek  <jakub@redhat.com>
 430
 431         PR rtl-optimization/83985
 432         * dce.c (deletable_insn_p): Return false for separate shrink wrapping
 433         REG_CFA_RESTORE insns.
 434         (delete_unmarked_insns): Don't ignore separate shrink wrapping
 435         REG_CFA_RESTORE insns here.
 436
 437         PR c/83989
 438         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Don't
 439         use SSA_NAME_VAR as base for SSA_NAMEs with non-NULL SSA_NAME_VAR.
 440
 441 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 442
 443         * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3.
 444         * config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... .
 445         (arc_init): Likewise.
 446         (arc_override_options): Likewise.
 447         (arc_file_start): Choose Tag_ARC_CPU_variation based on arc_tune
 448         value.
 449         (hwloop_fail): Use TARGET_DBNZ when we want to check for dbnz insn
 450         support.
 451         * config/arc/arc.h (TARGET_DBNZ): Define.
 452         * config/arc/arc.md (attr tune): Add core_3, use ARC_TUNE_... to
 453         properly set the tune attribute.
 454         (dbnz): Use TARGET_DBNZ guard.
 455         * config/arc/arc.opt (mtune): Add core3 option.
 456
 457 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 458
 459         * config/arc/arc.c (arc_delegitimize_address_0): Refactored to
 460         recognize new pic like addresses.
 461         (arc_delegitimize_address): Clean up.
 462
 463 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 464
 465         * config/arc/arc-arches.def: Option mrf16 valid for all
 466         architectures.
 467         * config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
 468         * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
 469         * config/arc/arc-options.def (FL_RF16): Add mrf16 option.
 470         * config/arc/arc-tables.opt: Regenerate.
 471         * config/arc/arc.c (arc_conditional_register_usage): Handle
 472         reduced register file case.
 473         (arc_file_start): Set must have build attributes.
 474         * config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
 475         mrf16 option value.
 476         * config/arc/arc.opt (mrf16): Add new option.
 477         * config/arc/elf.h (ATTRIBUTE_PCS): Define.
 478         * config/arc/genmultilib.awk: Handle new mrf16 option.
 479         * config/arc/linux.h (ATTRIBUTE_PCS): Define.
 480         * config/arc/t-multilib: Regenerate.
 481         * doc/invoke.texi (ARC Options): Document mrf16 option.
 482
 483 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 484
 485         * config/arc/arc-protos.h: Add arc_is_secure_call_p proto.
 486         * config/arc/arc.c (arc_handle_secure_attribute): New function.
 487         (arc_attribute_table): Add 'secure_call' attribute.
 488         (arc_print_operand): Print secure call operand.
 489         (arc_function_ok_for_sibcall): Don't optimize tail calls when
 490         secure.
 491         (arc_is_secure_call_p): New function.  * config/arc/arc.md
 492         (call_i): Add support for sjli instruction.
 493         (call_value_i): Likewise.
 494         * config/arc/constraints.md (Csc): New constraint.
 495
 496 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 497             John Eric Martin <John.Martin@emmicro-us.com>
 498
 499         * config/arc/arc-protos.h: Add arc_is_jli_call_p proto.
 500         * config/arc/arc.c (_arc_jli_section): New struct.
 501         (arc_jli_section): New type.
 502         (rc_jli_sections): New static variable.
 503         (arc_handle_jli_attribute): New function.
 504         (arc_attribute_table): Add jli_always and jli_fixed attribute.
 505         (arc_file_end): New function.
 506         (TARGET_ASM_FILE_END): Define.
 507         (arc_print_operand): Reuse 'S' letter for JLI output instruction.
 508         (arc_add_jli_section): New function.
 509         (jli_call_scan): Likewise.
 510         (arc_reorg): Call jli_call_scan.
 511         (arc_output_addsi): Remove 'S' from printing asm operand.
 512         (arc_is_jli_call_p): New function.
 513         * config/arc/arc.md (movqi_insn): Remove 'S' from printing asm
 514         operand.
 515         (movhi_insn): Likewise.
 516         (movsi_insn): Likewise.
 517         (movsi_set_cc_insn): Likewise.
 518         (loadqi_update): Likewise.
 519         (load_zeroextendqisi_update): Likewise.
 520         (load_signextendqisi_update): Likewise.
 521         (loadhi_update): Likewise.
 522         (load_zeroextendhisi_update): Likewise.
 523         (load_signextendhisi_update): Likewise.
 524         (loadsi_update): Likewise.
 525         (loadsf_update): Likewise.
 526         (movsicc_insn): Likewise.
 527         (bset_insn): Likewise.
 528         (bxor_insn): Likewise.
 529         (bclr_insn): Likewise.
 530         (bmsk_insn): Likewise.
 531         (bicsi3_insn): Likewise.
 532         (cmpsi_cc_c_insn): Likewise.
 533         (movsi_ne): Likewise.
 534         (movsi_cond_exec): Likewise.
 535         (clrsbsi2): Likewise.
 536         (norm_f): Likewise.
 537         (normw): Likewise.
 538         (swap): Likewise.
 539         (divaw): Likewise.
 540         (flag): Likewise.
 541         (sr): Likewise.
 542         (kflag): Likewise.
 543         (ffs): Likewise.
 544         (ffs_f): Likewise.
 545         (fls): Likewise.
 546         (call_i): Remove 'S' asm letter, add jli instruction.
 547         (call_value_i): Likewise.
 548         * config/arc/arc.op (mjli-always): New option.
 549         * config/arc/constraints.md (Cji): New constraint.
 550         * config/arc/fpx.md (addsf3_fpx): Remove 'S' from printing asm
 551         operand.
 552         (subsf3_fpx): Likewise.
 553         (mulsf3_fpx): Likewise.
 554         * config/arc/simdext.md (vendrec_insn): Remove 'S' from printing
 555         asm operand.
 556         * doc/extend.texi (ARC): Document 'jli-always' and 'jli-fixed'
 557         function attrbutes.
 558         * doc/invoke.texi (ARC): Document mjli-always option.
 559
 560 2018-01-26  Sebastian Perta  <sebastian.perta@renesas.com>
 561
 562         * config/rl78/rl78.c: if operand 2 is const avoid addition with 0
 563         and use incw and decw where possible
 564         * testsuite/gcc.target/rl78/test_addsi3_internal.c: new file
 565
 566 2018-01-26  Richard Biener  <rguenther@suse.de>
 567
 568         PR tree-optimization/81082
 569         * fold-const.c (fold_plusminus_mult_expr): Do not perform the
 570         association if it requires casting to unsigned.
 571         * match.pd ((A * C) +- (B * C) -> (A+-B)): New patterns derived
 572         from fold_plusminus_mult_expr to catch important cases late when
 573         range info is available.
 574
 575 2018-01-26  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 576
 577         * config/i386/sol2.h (USE_HIDDEN_LINKONCE): Remove.
 578         * configure.ac (hidden_linkonce): New test.
 579         * configure: Regenerate.
 580         * config.in: Regenerate.
 581
 582 2018-01-26  Julia Koval  <julia.koval@intel.com>
 583
 584         * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
 585         _mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
 586         _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
 587         _mm_mask_bitshuffle_epi64_mask): Fix type.
 588         * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
 589         USI_FTYPE_V4DI_V4DI_USI): Remove.
 590         * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
 591         __builtin_ia32_vpshufbitqmb256_mask,
 592         __builtin_ia32_vpshufbitqmb128_mask): Fix types.
 593         * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
 594         * config/i386/sse.md (VI1_AVX512VLBW): Change types.
 595
 596 2018-01-26  Alan Modra  <amodra@gmail.com>
 597
 598         PR target/84033
 599         * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Exclude
 600         UNSPEC_VBPERMQ.  Sort other unspecs.
 601
 602 2018-01-25  David Edelsohn  <dje.gcc@gmail.com>
 603
 604         * doc/invoke.texi (PowerPC Options): Document 'native' cpu type.
 605
 606 2018-01-25  Jan Hubicka  <hubicka@ucw.cz>
 607
 608         PR middle-end/83055
 609         * predict.c (drop_profile): Do not push/pop cfun; update also
 610         node->count.
 611         (handle_missing_profiles): Fix logic looking for zero profiles.
 612
 613 2018-01-25  Jakub Jelinek  <jakub@redhat.com>
 614
 615         PR middle-end/83977
 616         * ipa-fnsummary.c (compute_fn_summary): Clear can_change_signature
 617         on functions with #pragma omp declare simd or functions with simd
 618         attribute.
 619         * omp-simd-clone.c (expand_simd_clones): Revert 2018-01-24 change.
 620         * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
 621         Remove trailing \n from warning_at calls.
 622
 623 2018-01-25  Tom de Vries  <tom@codesourcery.com>
 624
 625         PR target/84028
 626         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
 627         for neutered workers.
 628
 629 2018-01-24  Joseph Myers  <joseph@codesourcery.com>
 630
 631         PR target/68467
 632         * config/m68k/m68k.c (m68k_promote_function_mode): New function.
 633         (TARGET_PROMOTE_FUNCTION_MODE): New macro.
 634
 635 2018-01-24  Jeff Law  <law@redhat.com>
 636
 637         PR target/83994
 638         * i386.c (get_probe_interval): Move to earlier point.
 639         (ix86_compute_frame_layout): If -fstack-clash-protection and
 640         the frame is larger than the probe interval, then use pushes
 641         to save registers rather than reg->mem moves.
 642         (ix86_expand_prologue): Remove conditional for int_registers_saved
 643         assertion.
 644
 645 2018-01-24  Vladimir Makarov  <vmakarov@redhat.com>
 646
 647         PR target/84014
 648         * ira-build.c (setup_min_max_allocno_live_range_point): Set up
 649         min/max for never referenced object.
 650
 651 2018-01-24  Jakub Jelinek  <jakub@redhat.com>
 652
 653         PR middle-end/83977
 654         * tree.c (free_lang_data_in_decl): Don't clear DECL_ABSTRACT_ORIGIN
 655         here.
 656         * omp-low.c (create_omp_child_function): Remove "omp declare simd"
 657         attributes from DECL_ATTRIBUTES (decl) without affecting
 658         DECL_ATTRIBUTES (current_function_decl).
 659         * omp-simd-clone.c (expand_simd_clones): Ignore DECL_ARTIFICIAL
 660         functions with non-NULL DECL_ABSTRACT_ORIGIN.
 661
 662 2018-01-24  Richard Sandiford  <richard.sandiford@linaro.org>
 663
 664         PR tree-optimization/83979
 665         * fold-const.c (fold_comparison): Use constant_boolean_node
 666         instead of boolean_{true,false}_node.
 667
 668 2018-01-24  Jan Hubicka  <hubicka@ucw.cz>
 669
 670         * ipa-profile.c (ipa_propagate_frequency_1): Fix logic skipping calls
 671         with zero counts.
 672
 673 2018-01-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 674
 675         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
 676         Simplify the clause that sets the length attribute.
 677         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
 678         (*sibcall_nonlocal_sysv<mode>): Clean up code block; simplify the
 679         clause that sets the length attribute.
 680         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
 681
 682 2018-01-24  Tom de Vries  <tom@codesourcery.com>
 683
 684         PR target/83589
 685         * config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_2): Define to 1.
 686         (nvptx_pc_set, nvptx_condjump_label): New function. Copy from jump.c.
 687         Add strict parameter.
 688         (prevent_branch_around_nothing): Insert dummy insn between branch to
 689         label and label with no ptx insn inbetween.
 690         * config/nvptx/nvptx.md (define_insn "fake_nop"): New insn.
 691
 692 2018-01-24  Tom de Vries  <tom@codesourcery.com>
 693
 694         PR target/81352
 695         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
 696         for neutered threads in warp.
 697         * config/nvptx/nvptx.md (define_insn "exit"): New insn.
 698
 699 2018-01-24  Richard Biener  <rguenther@suse.de>
 700
 701         PR tree-optimization/83176
 702         * tree-chrec.c (chrec_fold_plus_1): Handle (signed T){(T) .. }
 703         operands.
 704
 705 2018-01-24  Richard Biener  <rguenther@suse.de>
 706
 707         PR tree-optimization/82819
 708         * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
 709         code generating pluses that are no-ops in the target precision.
 710
 711 2018-01-24  Richard Biener  <rguenther@suse.de>
 712
 713         PR middle-end/84000
 714         * tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind.
 715
 716 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
 717
 718         * cfgcleanup.c (try_crossjump_to_edge): Use combine_with_count
 719         to merge probabilities.
 720         * predict.c (probably_never_executed): Also mark as cold functions
 721         with global 0 profile and guessed local profile.
 722         * profile-count.c (profile_probability::combine_with_count): New
 723         member function.
 724         * profile-count.h (profile_probability::operator*,
 725         profile_probability::operator*=, profile_probability::operator/,
 726         profile_probability::operator/=): Reduce precision to adjusted
 727         and set value to guessed on contradictory divisions.
 728         (profile_probability::combine_with_freq): Remove.
 729         (profile_probability::combine_wiht_count): Declare.
 730         (profile_count::force_nonzero):: Set to adjusted.
 731         (profile_count::probability_in):: Set quality to adjusted.
 732         * tree-ssa-tail-merge.c (replace_block_by): Use
 733         combine_with_count.
 734
 735 2018-01-23  Andrew Waterman  <andrew@sifive.com>
 736             Jim Wilson  <jimw@sifive.com>
 737
 738         * config/riscv/riscv.c (riscv_stack_boundary): New.
 739         (riscv_option_override): Set riscv_stack_boundary.  Handle
 740         riscv_preferred_stack_boundary_arg.
 741         * config/riscv/riscv.h (MIN_STACK_BOUNDARY, ABI_STACK_BOUNDARY): New.
 742         (BIGGEST_ALIGNMENT): Set to STACK_BOUNDARY.
 743         (STACK_BOUNDARY): Set to riscv_stack_boundary.
 744         (RISCV_STACK_ALIGN): Use STACK_BOUNDARY.
 745         * config/riscv/riscv.opt (mpreferred-stack-boundary): New.
 746         * doc/invoke.tex (RISC-V Options): Add -mpreferred-stack-boundary.
 747
 748 2018-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 749
 750         PR target/83905
 751         * config/i386/i386.c (ix86_expand_prologue): Use cost reference
 752         of struct ix86_frame.
 753         (ix86_expand_epilogue): Likewise.  Add a local variable for
 754         the reg_save_offset field in struct ix86_frame.
 755
 756 2018-01-23  Bin Cheng  <bin.cheng@arm.com>
 757
 758         PR tree-optimization/82604
 759         * tree-loop-distribution.c (enum partition_kind): New enum item
 760         PKIND_PARTIAL_MEMSET.
 761         (partition_builtin_p): Support above new enum item.
 762         (generate_code_for_partition): Ditto.
 763         (compute_access_range): Differentiate cases that equality can be
 764         proven at all loops, the innermost loops or no loops.
 765         (classify_builtin_st, classify_builtin_ldst): Adjust call to above
 766         function.  Set PKIND_PARTIAL_MEMSET for partition appropriately.
 767         (finalize_partitions, distribute_loop): Don't fuse partition of
 768         PKIND_PARTIAL_MEMSET kind when distributing 3-level loop nest.
 769         (prepare_perfect_loop_nest): Distribute 3-level loop nest only if
 770         parloop is enabled.
 771
 772 2018-01-23  Martin Liska  <mliska@suse.cz>
 773
 774         * predict.def (PRED_INDIR_CALL): Set probability to PROB_EVEN in
 775         order to ignore the predictor.
 776         (PRED_POLYMORPHIC_CALL): Likewise.
 777         (PRED_RECURSIVE_CALL): Likewise.
 778
 779 2018-01-23  Martin Liska  <mliska@suse.cz>
 780
 781         * tree-profile.c (tree_profiling): Print function header to
 782         aware reader which function we are working on.
 783         * value-prof.c (gimple_find_values_to_profile): Do not print
 784         not interesting value histograms.
 785
 786 2018-01-23  Martin Liska  <mliska@suse.cz>
 787
 788         * profile-count.h (enum profile_quality): Add
 789         profile_uninitialized as the first value. Do not number values
 790         as they are zero based.
 791         (profile_count::verify): Update sanity check.
 792         (profile_probability::verify): Likewise.
 793
 794 2018-01-23  Nathan Sidwell  <nathan@acm.org>
 795
 796         * doc/invoke.texi (ffor-scope): Deprecate.
 797
 798 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
 799
 800         PR tree-optimization/83510
 801         * domwalk.c (set_all_edges_as_executable): New function.
 802         (dom_walker::dom_walker): Convert bool param
 803         "skip_unreachable_blocks" to enum reachability.  Move setup of
 804         edge flags to set_all_edges_as_executable and only do it when
 805         reachability is REACHABLE_BLOCKS.
 806         * domwalk.h (enum dom_walker::reachability): New enum.
 807         (dom_walker::dom_walker): Convert bool param
 808         "skip_unreachable_blocks" to enum reachability.
 809         (set_all_edges_as_executable): New decl.
 810         * graphite-scop-detection.c  (gather_bbs::gather_bbs): Convert
 811         from false for "skip_unreachable_blocks" to ALL_BLOCKS for
 812         "reachability".
 813         * tree-ssa-dom.c (dom_opt_dom_walker::dom_opt_dom_walker): Likewise,
 814         but converting true to REACHABLE_BLOCKS.
 815         * tree-ssa-sccvn.c (sccvn_dom_walker::sccvn_dom_walker): Likewise.
 816         * tree-vrp.c
 817         (check_array_bounds_dom_walker::check_array_bounds_dom_walker):
 818         Likewise, but converting it to REACHABLE_BLOCKS_PRESERVING_FLAGS.
 819         (vrp_dom_walker::vrp_dom_walker): Likewise, but converting it to
 820         REACHABLE_BLOCKS.
 821         (vrp_prop::vrp_finalize): Call set_all_edges_as_executable
 822         if check_all_array_refs will be called.
 823
 824 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
 825
 826         * tree.c (selftest::test_location_wrappers): Add more test
 827         coverage.
 828
 829 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
 830
 831         * sbitmap.c (selftest::test_set_range): Fix memory leaks.
 832         (selftest::test_bit_in_range): Likewise.
 833
 834 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
 835
 836         PR testsuite/83888
 837         * doc/sourcebuild.texi (vect_float): Say that the selector
 838         only describes the situation when -funsafe-math-optimizations is on.
 839         (vect_float_strict): Document.
 840
 841 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
 842
 843         PR tree-optimization/83965
 844         * tree-vect-patterns.c (vect_reassociating_reduction_p): New function.
 845         (vect_recog_dot_prod_pattern, vect_recog_sad_pattern): Use it
 846         instead of checking only for a reduction.
 847         (vect_recog_widen_sum_pattern): Likewise.
 848
 849 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
 850
 851         * predict.c (probably_never_executed): Only use precise profile info.
 852         (compute_function_frequency): Skip after inlining hack since we now
 853         have quality checking.
 854
 855 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
 856
 857         * profile-count.h (profile_probability::very_unlikely,
 858         profile_probability::unlikely, profile_probability::even): Set
 859         precision to guessed.
 860
 861 2018-01-23  Richard Biener  <rguenther@suse.de>
 862
 863         PR tree-optimization/83963
 864         * graphite-scop-detection.c (scop_detection::harmful_loop_in_region):
 865         Properly terminate dominator walk when crossing the exit edge not
 866         when visiting its source block.
 867
 868 2018-01-23  Jakub Jelinek  <jakub@redhat.com>
 869
 870         PR c++/83918
 871         * tree.c (maybe_wrap_with_location): Use NON_LVALUE_EXPR rather than
 872         VIEW_CONVERT_EXPR to wrap CONST_DECLs.
 873
 874 2018-01-22  Jakub Jelinek  <jakub@redhat.com>
 875
 876         PR tree-optimization/83957
 877         * omp-expand.c (expand_omp_for_generic): Ignore virtual PHIs.  Remove
 878         semicolon after for body surrounded by braces.
 879
 880         PR tree-optimization/83081
 881         * profile-count.h (profile_probability::split): New method.
 882         * dojump.c (do_jump_1) <case TRUTH_ANDIF_EXPR, case TRUTH_ORIF_EXPR>:
 883         Use profile_probability::split.
 884         (do_compare_rtx_and_jump): Fix adjustment of probabilities
 885         when splitting a single conditional jump into 2.
 886
 887 2018-01-22  David Malcolm  <dmalcolm@redhat.com>
 888
 889         PR tree-optimization/69452
 890         * tree-ssa-loop-im.c (class move_computations_dom_walker): Remove
 891         decl.
 892
 893 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 894
 895         * config/rl78/rl78-expand.md: New define_expand "bswaphi2"
 896         * config/rl78/rl78-virt.md: New define_insn "*bswaphi2_virt"
 897         * config/rl78/rl78-real.md: New define_insn "*bswaphi2_real"
 898
 899 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 900
 901         * config/rl78/rl78-protos.h: New function declaration rl78_split_movdi
 902         * config/rl78/rl78.md: New define_expand "movdi"
 903         * config/rl78/rl78.c: New function definition rl78_split_movdi
 904
 905 2018-01-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
 906
 907         PR target/83862
 908         * config/rs6000/rs6000-protos.h (rs6000_split_signbit): Delete,
 909         no longer used.
 910         * config/rs6000/rs6000.c (rs6000_split_signbit): Likewise.
 911         * config/rs6000/rs6000.md (signbit<mode>2): Change code for IEEE
 912         128-bit to produce an UNSPEC move to get the double word with the
 913         signbit and then a shift directly to do signbit.
 914         (signbit<mode>2_dm): Replace old IEEE 128-bit signbit
 915         implementation with a new version that just does either a direct
 916         move or a regular move.  Move memory interface to separate insns.
 917         Move insns so they are next to the expander.
 918         (signbit<mode>2_dm_mem_be): New combiner insns to combine load
 919         with signbit move.  Split big and little endian case.
 920         (signbit<mode>2_dm_mem_le): Likewise.
 921         (signbit<mode>2_dm_<su>ext): Delete, no longer used.
 922         (signbit<mode>2_dm2): Likewise.
 923
 924 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 925
 926         * config/rl78/rl78.md: New define_expand "anddi3".
 927
 928 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 929
 930         * config/rl78/rl78.md: New define_expand "umindi3".
 931
 932 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 933
 934         * config/rl78/rl78.md: New define_expand "smindi3".
 935
 936 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 937
 938         * config/rl78/rl78.md: New define_expand "smaxdi3".
 939
 940 2018-01-22 Carl Love <cel@us.ibm.com>
 941
 942         * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
 943         LVX_V1TI): Add macro expansion.
 944         * config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
 945         definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
 946         VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
 947         * config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
 948         Change check to determine if the instruction is a byte reversing
 949         entry.  Fix typo in comment.
 950         * config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
 951         for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
 952         Add def_builtin calls for new builtins.
 953         * config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
 954         Add define_insn expansion.
 955
 956 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 957
 958         * config/rl78/rl78.md: New define_expand "umaxdi3".
 959
 960 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 961
 962         * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
 963         for non-QImode registers
 964
 965 2018-01-22  Richard Biener  <rguenther@suse.de>
 966
 967         PR tree-optimization/83963
 968         * graphite-scop-detection.c (scop_detection::get_sese): Delay
 969         including the loop exit block.
 970         (scop_detection::merge_sese): Likewise.
 971         (scop_detection::add_scop): Do it here instead.
 972
 973 2018-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 974
 975         * doc/sourcebuild.texi (arm_softfloat): Document.
 976
 977 2018-01-21  John David Anglin  <danglin@gcc.gnu.org>
 978
 979         PR gcc/77734
 980         * config/pa/pa.c (pa_function_ok_for_sibcall): Use
 981         targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
 982         Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
 983
 984 2018-01-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 985             David Edelsohn <dje.gcc@gmail.com>
 986
 987         PR target/83946
 988         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
 989         Change "crset eq" to "crset 2".
 990         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
 991         (*call_indirect_aix<mode>_nospec): Likewise.
 992         (*call_value_indirect_aix<mode>_nospec): Likewise.
 993         (*call_indirect_elfv2<mode>_nospec): Likewise.
 994         (*call_value_indirect_elfv2<mode>_nospec): Likewise.
 995         (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
 996         change assembly output from . to $.
 997         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
 998         (indirect_jump<mode>_nospec): Change assembly output from . to $.
 999         (*tablejump<mode>_internal1_nospec): Likewise.
1000
1001 2018-01-21  Oleg Endo  <olegendo@gcc.gnu.org>
1002
1003         PR target/80870
1004         * config/sh/sh_optimize_sett_clrt.cc:
1005         Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
1006
1007 2018-01-20  Richard Sandiford  <richard.sandiford@linaro.org>
1008
1009         PR tree-optimization/83940
1010         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
1011         offset_dt to vect_constant_def rather than vect_unknown_def_type.
1012         (vect_check_load_store_mask): Add a mask_dt_out parameter and
1013         use it to pass back the definition type.
1014         (vect_check_store_rhs): Likewise rhs_dt_out.
1015         (vect_build_gather_load_calls): Add a mask_dt argument and use
1016         it instead of a call to vect_is_simple_use.
1017         (vectorizable_store): Update calls to vect_check_load_store_mask
1018         and vect_check_store_rhs.  Use the dt returned by the latter instead
1019         of scatter_src_dt.  Use the cached mask_dt and gs_info.offset_dt
1020         instead of calls to vect_is_simple_use.  Pass the scalar rather
1021         than the vector operand to vect_is_simple_use when handling
1022         second and subsequent copies of an rhs value.
1023         (vectorizable_load): Update calls to vect_check_load_store_mask
1024         and vect_build_gather_load_calls.  Use the cached mask_dt and
1025         gs_info.offset_dt instead of calls to vect_is_simple_use.
1026
1027 2018-01-20  Jakub Jelinek  <jakub@redhat.com>
1028
1029         PR middle-end/83945
1030         * tree-emutls.c: Include gimplify.h.
1031         (lower_emutls_2): New function.
1032         (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
1033         with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
1034         it before further processing.
1035
1036         PR target/83930
1037         * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
1038         UINTVAL (trueop1) instead of INTVAL (op1).
1039
1040 2018-01-19  Jakub Jelinek  <jakub@redhat.com>
1041
1042         PR debug/81570
1043         PR debug/83728
1044         * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
1045         INCOMING_FRAME_SP_OFFSET if not defined.
1046         (scan_trace): Add ENTRY argument.  If true and
1047         DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
1048         emit a note to adjust the CFA offset.
1049         (create_cfi_notes): Adjust scan_trace callers.
1050         (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
1051         INCOMING_FRAME_SP_OFFSET in the CIE.
1052         * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
1053         * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
1054         Likewise.
1055         * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
1056         * doc/tm.texi: Regenerated.
1057
1058 2018-01-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
1059
1060         PR rtl-optimization/83147
1061         * lra-constraints.c (remove_inheritance_pseudos): Use
1062         lra_substitute_pseudo_within_insn.
1063
1064 2018-01-19  Tom de Vries  <tom@codesourcery.com>
1065             Cesar Philippidis  <cesar@codesourcery.com>
1066
1067         PR target/83920
1068         * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
1069
1070 2018-01-19  Cesar Philippidis  <cesar@codesourcery.com>
1071
1072         PR target/83790
1073         * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
1074         spaces for function labels.
1075
1076 2018-01-19  Martin Liska  <mliska@suse.cz>
1077
1078         * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
1079         (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
1080         (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
1081         (PRED_OPCODE_POSITIVE): Change from 64 to 59.
1082         (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
1083         (PRED_CONST_RETURN): Change from 69 to 65.
1084         (PRED_NULL_RETURN): Change from 91 to 71.
1085         (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
1086         (PRED_LOOP_GUARD): Change from 66 to 73.
1087
1088 2018-01-19  Martin Liska  <mliska@suse.cz>
1089
1090         * predict.c (predict_insn_def): Add new assert.
1091         (struct branch_predictor): Change type to signed integer.
1092         (test_prediction_value_range): Amend test to cover
1093         PROB_UNINITIALIZED.
1094         * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
1095         (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
1096         (PRED_LOOP_ITERATIONS_MAX): Likewise.
1097         (PRED_LOOP_IV_COMPARE): Likewise.
1098         * predict.h (PROB_UNINITIALIZED): Define new constant.
1099
1100 2018-01-19  Martin Liska  <mliska@suse.cz>
1101
1102         * predict.c (dump_prediction): Add new format for
1103         analyze_brprob.py script which is enabled with -details
1104         suboption.
1105         * profile-count.h (precise_p): New function.
1106
1107 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
1108
1109         PR tree-optimization/83922
1110         * tree-vect-loop.c (vect_verify_full_masking): Return false if
1111         there are no statements that need masking.
1112         (vect_active_double_reduction_p): New function.
1113         (vect_analyze_loop_operations): Use it when handling phis that
1114         are not in the loop header.
1115
1116 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
1117
1118         PR tree-optimization/83914
1119         * tree-vect-loop.c (vectorizable_induction): Don't convert
1120         init_expr or apply the peeling adjustment for inductions
1121         that are nested within the vectorized loop.
1122
1123 2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1124
1125         * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
1126         instead of NEG.
1127
1128 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
1129
1130         PR sanitizer/81715
1131         PR testsuite/83882
1132         * function.h (gimplify_parameters): Add gimple_seq * argument.
1133         * function.c: Include gimple.h and options.h.
1134         (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
1135         for the added local temporaries if needed.
1136         * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
1137         if there are any parameter cleanups, wrap whole body into a
1138         try/finally with the cleanups.
1139
1140 2018-01-18  Wilco Dijkstra  <wdijkstr@arm.com>
1141
1142         PR target/82964
1143         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
1144         Use GET_MODE_CLASS for scalar floating point.
1145
1146 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
1147
1148         PR ipa/82256
1149         patch by PaX Team
1150         * cgraphclones.c (cgraph_node::create_version_clone_with_body):
1151         Fix call of call_cgraph_insertion_hooks.
1152
1153 2018-01-18  Martin Sebor  <msebor@redhat.com>
1154
1155         * doc/invoke.texi (-Wclass-memaccess): Tweak text.
1156
1157 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
1158
1159         PR ipa/83619
1160         * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
1161         frequencies.
1162
1163 2018-01-18  Boris Kolpackov  <boris@codesynthesis.com>
1164
1165         PR other/70268
1166         * common.opt: (-ffile-prefix-map): New option.
1167         * opts.c (common_handle_option): Defer it.
1168         * opts-global.c (handle_common_deferred_options): Handle it.
1169         * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
1170         * file-prefix-map.h: New file.
1171         (remap_debug_filename, add_debug_prefix_map): ...here.
1172         (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
1173         * final.c (debug_prefix_map, add_debug_prefix_map
1174         remap_debug_filename): Move to...
1175         * file-prefix-map.c: New file.
1176         (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
1177         generalize, get rid of alloca(), use strrchr() instead of strchr().
1178         (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
1179         Implement in terms of add_prefix_map().
1180         (remap_macro_filename, remap_debug_filename): Implement in term of
1181         remap_filename().
1182         * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
1183         * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
1184         * dbxout.c: Include file-prefix-map.h.
1185         * varasm.c: Likewise.
1186         * vmsdbgout.c: Likewise.
1187         * xcoffout.c: Likewise.
1188         * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
1189         * doc/cppopts.texi (-fmacro-prefix-map): Document.
1190         * doc/invoke.texi (-ffile-prefix-map): Document.
1191         (-fdebug-prefix-map): Update description.
1192
1193 2018-01-18  Martin Liska  <mliska@suse.cz>
1194
1195         * config/i386/i386.c (indirect_thunk_name): Document that also
1196         lfence is emitted.
1197         (output_indirect_thunk): Document why both instructions
1198         (pause and lfence) are generated.
1199
1200 2018-01-18  Richard Biener  <rguenther@suse.de>
1201
1202         PR tree-optimization/83887
1203         * graphite-scop-detection.c
1204         (scop_detection::get_nearest_dom_with_single_entry): Remove.
1205         (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
1206         (scop_detection::merge_sese): Re-implement with a flood-fill
1207         algorithm that properly finds a SESE region if it exists.
1208
1209 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
1210
1211         PR c/61240
1212         * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
1213         pointer_diff optimizations use view_convert instead of convert.
1214
1215 2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1216
1217         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
1218         Generate different code for -mno-speculate-indirect-jumps.
1219         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
1220         (*call_indirect_aix<mode>): Disable for
1221         -mno-speculate-indirect-jumps.
1222         (*call_indirect_aix<mode>_nospec): New define_insn.
1223         (*call_value_indirect_aix<mode>): Disable for
1224         -mno-speculate-indirect-jumps.
1225         (*call_value_indirect_aix<mode>_nospec): New define_insn.
1226         (*sibcall_nonlocal_sysv<mode>): Generate different code for
1227         -mno-speculate-indirect-jumps.
1228         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
1229
1230 2018-01-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
1231
1232         * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
1233         long double type, set the flags for noting the default long double
1234         type, even if we don't pass or return a long double type.
1235
1236 2018-01-17  Jan Hubicka  <hubicka@ucw.cz>
1237
1238         PR ipa/83051
1239         * ipa-inline.c (flatten_function): Do not overwrite final inlining
1240         failure.
1241
1242 2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>
1243
1244         * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
1245         support for merge[hl].
1246         (fold_mergehl_helper): New helper function.
1247         (tree-vector-builder.h): New #include for tree_vector_builder usage.
1248         * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
1249         (altivec_vmrglw_direct): Add xxmrglw insn.
1250
1251 2018-01-17  Andrew Waterman  <andrew@sifive.com>
1252
1253         * config/riscv/riscv.c (riscv_conditional_register_usage): If
1254         UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
1255
1256 2018-01-17  David Malcolm  <dmalcolm@redhat.com>
1257
1258         PR lto/83121
1259         * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
1260         call the lto_location_cache before reading the
1261         DECL_SOURCE_LOCATION of the types.
1262
1263 2018-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
1264             Richard Sandiford  <richard.sandiford@linaro.org>
1265
1266         * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
1267         * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
1268         (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
1269         SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
1270         * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
1271         Add declaration.
1272         * config/aarch64/constraints.md (aarch64_movti_operand):
1273         Limit immediates.
1274         * config/aarch64/predicates.md (Uti): Add new constraint.
1275
1276 2018-01-17 Carl Love  <cel@us.ibm.com>
1277         * config/rs6000/vsx.md (define_expand xl_len_r,
1278         define_expand stxvl, define_expand *stxvl): Add match_dup argument.
1279         (define_insn): Add, match_dup 1 argument to define_insn stxvll and
1280         lxvll.
1281         (define_expand, define_insn): Move the shift left from  the
1282         define_insn to the define_expand for lxvl and stxvl instructions.
1283         * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
1284         and XL_LEN_R definitions to PURE.
1285
1286 2018-01-17  Uros Bizjak  <ubizjak@gmail.com>
1287
1288         * config/i386/i386.c (indirect_thunk_name): Declare regno
1289         as unsigned int.  Compare regno with INVALID_REGNUM.
1290         (output_indirect_thunk): Ditto.
1291         (output_indirect_thunk_function): Ditto.
1292         (ix86_code_end): Declare regno as unsigned int.  Use INVALID_REGNUM
1293         in the call to output_indirect_thunk_function.
1294
1295 2018-01-17  Richard Sandiford  <richard.sandiford@linaro.org>
1296
1297         PR middle-end/83884
1298         * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
1299         rather than the size of inner_type to determine the stack slot size
1300         when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
1301
1302 2018-01-16  Sebastian Peryt  <sebastian.peryt@intel.com>
1303
1304         PR target/83546
1305         * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
1306         to PTA_SILVERMONT.
1307
1308 2018-01-16  Michael Meissner  <meissner@linux.vnet.ibm.com>
1309
1310         * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
1311         endian Linux systems to optionally enable multilibs for selecting
1312         the long double type if the user configured an explicit type.
1313         * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
1314         have no long double multilibs if not defined.
1315         * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
1316         warn if the user used -mabi={ieee,ibm}longdouble and we built
1317         multilibs for long double.
1318         * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
1319         appropriate multilib option.
1320         (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
1321         multilib options.
1322         * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
1323         for building long double multilibs.
1324         * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
1325
1326 2018-01-16  John David Anglin  <danglin@gcc.gnu.org>
1327
1328         * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
1329         copies.
1330
1331         * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
1332         64 bits.
1333         * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
1334         128 bits.
1335
1336         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
1337         variables.
1338
1339         * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
1340         return value.
1341
1342 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
1343
1344         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
1345         ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
1346
1347 2018-01-16  Kelvin Nilsen  <kelvin@gcc.gnu.org>
1348
1349         * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
1350         different rtl trees depending on TARGET_64BIT.
1351         (rs6000_gen_lvx): Likewise.
1352
1353 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
1354
1355         * config/visium/visium.md (nop): Tweak comment.
1356         (hazard_nop): Likewise.
1357
1358 2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1359
1360         * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
1361         -mspeculate-indirect-jumps.
1362         * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
1363         for -mno-speculate-indirect-jumps.
1364         (*call_indirect_elfv2<mode>_nospec): New define_insn.
1365         (*call_value_indirect_elfv2<mode>): Disable for
1366         -mno-speculate-indirect-jumps.
1367         (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
1368         (indirect_jump): Emit different RTL for
1369         -mno-speculate-indirect-jumps.
1370         (*indirect_jump<mode>): Disable for
1371         -mno-speculate-indirect-jumps.
1372         (*indirect_jump<mode>_nospec): New define_insn.
1373         (tablejump): Emit different RTL for
1374         -mno-speculate-indirect-jumps.
1375         (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
1376         (tablejumpsi_nospec): New define_expand.
1377         (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
1378         (tablejumpdi_nospec): New define_expand.
1379         (*tablejump<mode>_internal1): Disable for
1380         -mno-speculate-indirect-jumps.
1381         (*tablejump<mode>_internal1_nospec): New define_insn.
1382         * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
1383         option.
1384
1385 2018-01-16  Artyom Skrobov tyomitch@gmail.com
1386
1387         * caller-save.c (insert_save): Drop unnecessary parameter.  All
1388         callers updated.
1389
1390 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1391             Richard Biener  <rguenth@suse.de>
1392
1393         PR libgomp/83590
1394         * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
1395         return early, inline manually is_gimple_sizepos.  Make sure if we
1396         call gimplify_expr we don't end up with a gimple constant.
1397         * tree.c (variably_modified_type_p): Don't return true for
1398         is_gimple_constant (_t).  Inline manually is_gimple_sizepos.
1399         * gimplify.h (is_gimple_sizepos): Remove.
1400
1401 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1402
1403         PR tree-optimization/83857
1404         * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
1405         vectorizable_live_operation for pure SLP statements.
1406         (vectorizable_live_operation): Handle PHIs.
1407
1408 2018-01-16  Richard Biener  <rguenther@suse.de>
1409
1410         PR tree-optimization/83867
1411         * tree-vect-stmts.c (vect_transform_stmt): Precompute
1412         nested_in_vect_loop_p since the scalar stmt may get invalidated.
1413
1414 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1415
1416         PR c/83844
1417         * stor-layout.c (handle_warn_if_not_align): Use byte_position and
1418         multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
1419         If off is not INTEGER_CST, issue a may not be aligned warning
1420         rather than isn't aligned.  Use isn%'t rather than isn't.
1421         * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
1422         into MULT_EXPR.
1423         <case MULT_EXPR>: Improve the case when bottom and one of the
1424         MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
1425         operand, in that case check if the other operand is multiple of
1426         bottom divided by the INTEGER_CST operand.
1427
1428 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1429
1430         PR target/83858
1431         * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
1432         * config/pa/pa-protos.h (pa_function_arg_size): Declare.
1433         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
1434         pa_function_arg_size instead of FUNCTION_ARG_SIZE.
1435         * config/pa/pa.c (pa_function_arg_advance): Likewise.
1436         (pa_function_arg, pa_arg_partial_bytes): Likewise.
1437         (pa_function_arg_size): New function.
1438
1439 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1440
1441         * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
1442         in a separate statement.
1443
1444 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1445
1446         PR tree-optimization/83847
1447         * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
1448         group gathers and scatters.
1449
1450 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1451
1452         PR rtl-optimization/86620
1453         * params.def (max-sched-ready-insns): Bump minimum value to 1.
1454
1455         PR rtl-optimization/83213
1456         * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
1457         to last if both are JUMP_INSNs.
1458
1459         PR tree-optimization/83843
1460         * gimple-ssa-store-merging.c
1461         (imm_store_chain_info::output_merged_store): Handle bit_not_p on
1462         store_immediate_info for bswap/nop orig_stores.
1463
1464 2018-01-15  Andrew Waterman  <andrew@sifive.com>
1465
1466         * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
1467         !TARGET_MUL.
1468         <UDIV>: Increase cost if !TARGET_DIV.
1469
1470 2018-01-15  Segher Boessenkool  <segher@kernel.crashing.org>
1471
1472         * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
1473         (define_attr "cr_logical_3op"): New.
1474         (cceq_ior_compare): Adjust.
1475         (cceq_ior_compare_complement): Adjust.
1476         (*cceq_rev_compare): Adjust.
1477         * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
1478         (is_cracked_insn): Adjust.
1479         (insn_must_be_first_in_group): Adjust.
1480         * config/rs6000/40x.md: Adjust.
1481         * config/rs6000/440.md: Adjust.
1482         * config/rs6000/476.md: Adjust.
1483         * config/rs6000/601.md: Adjust.
1484         * config/rs6000/603.md: Adjust.
1485         * config/rs6000/6xx.md: Adjust.
1486         * config/rs6000/7450.md: Adjust.
1487         * config/rs6000/7xx.md: Adjust.
1488         * config/rs6000/8540.md: Adjust.
1489         * config/rs6000/cell.md: Adjust.
1490         * config/rs6000/e300c2c3.md: Adjust.
1491         * config/rs6000/e500mc.md: Adjust.
1492         * config/rs6000/e500mc64.md: Adjust.
1493         * config/rs6000/e5500.md: Adjust.
1494         * config/rs6000/e6500.md: Adjust.
1495         * config/rs6000/mpc.md: Adjust.
1496         * config/rs6000/power4.md: Adjust.
1497         * config/rs6000/power5.md: Adjust.
1498         * config/rs6000/power6.md: Adjust.
1499         * config/rs6000/power7.md: Adjust.
1500         * config/rs6000/power8.md: Adjust.
1501         * config/rs6000/power9.md: Adjust.
1502         * config/rs6000/rs64.md: Adjust.
1503         * config/rs6000/titan.md: Adjust.
1504
1505 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1506
1507         * config/i386/predicates.md (indirect_branch_operand): Rewrite
1508         ix86_indirect_branch_register logic.
1509
1510 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1511
1512         * config/i386/constraints.md (Bs): Update
1513         ix86_indirect_branch_register check.  Don't check
1514         ix86_indirect_branch_register with GOT_memory_operand.
1515         (Bw): Likewise.
1516         * config/i386/predicates.md (GOT_memory_operand): Don't check
1517         ix86_indirect_branch_register here.
1518         (GOT32_symbol_operand): Likewise.
1519
1520 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1521
1522         * config/i386/predicates.md (constant_call_address_operand):
1523         Rewrite ix86_indirect_branch_register logic.
1524         (sibcall_insn_operand): Likewise.
1525
1526 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1527
1528         * config/i386/constraints.md (Bs): Replace
1529         ix86_indirect_branch_thunk_register with
1530         ix86_indirect_branch_register.
1531         (Bw): Likewise.
1532         * config/i386/i386.md (indirect_jump): Likewise.
1533         (tablejump): Likewise.
1534         (*sibcall_memory): Likewise.
1535         (*sibcall_value_memory): Likewise.
1536         Peepholes of indirect call and jump via memory: Likewise.
1537         * config/i386/i386.opt: Likewise.
1538         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1539         (GOT_memory_operand): Likewise.
1540         (call_insn_operand): Likewise.
1541         (sibcall_insn_operand): Likewise.
1542         (GOT32_symbol_operand): Likewise.
1543
1544 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1545
1546         PR middle-end/83837
1547         * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
1548         type rather than type addr's type points to.
1549         (expand_omp_atomic_mutex): Likewise.
1550         (expand_omp_atomic): Likewise.
1551
1552 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1553
1554         PR target/83839
1555         * config/i386/i386.c (output_indirect_thunk_function): Use
1556         ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
1557         for  __x86_return_thunk.
1558
1559 2018-01-15  Richard Biener  <rguenther@suse.de>
1560
1561         PR middle-end/83850
1562         * expmed.c (extract_bit_field_1): Fix typo.
1563
1564 2018-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1565
1566         PR target/83687
1567         * config/arm/iterators.md (VF): New mode iterator.
1568         * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
1569         Remove integer-related logic from pattern.
1570         (neon_vabd<mode>_3): Likewise.
1571
1572 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1573
1574         PR middle-end/82694
1575         * common.opt (fstrict-overflow): No longer an alias.
1576         (fwrapv-pointer): New option.
1577         * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
1578         also for pointer types based on flag_wrapv_pointer.
1579         * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
1580         opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
1581         opts->x_flag_wrapv got set.
1582         * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
1583         changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
1584         POINTER_TYPE_OVERFLOW_UNDEFINED.
1585         * match.pd: Likewise in address comparison pattern.
1586         * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
1587
1588 2018-01-15  Richard Biener  <rguenther@suse.de>
1589
1590         PR lto/83804
1591         * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
1592         from TYPE_FIELDS.  Free TYPE_BINFO if not used by devirtualization.
1593         Reset type names to their identifier if their TYPE_DECL doesn't
1594         have linkage (and thus is used for ODR and devirt).
1595         (save_debug_info_for_decl): Remove.
1596         (save_debug_info_for_type): Likewise.
1597         (add_tree_to_fld_list): Adjust.
1598         * tree-pretty-print.c (dump_generic_node): Make dumping of
1599         type names more robust.
1600
1601 2018-01-15  Richard Biener  <rguenther@suse.de>
1602
1603         * BASE-VER: Bump to 8.0.1.
1604
1605 2018-01-14  Martin Sebor  <msebor@redhat.com>
1606
1607         PR other/83508
1608         * builtins.c (check_access): Avoid warning when the no-warning bit
1609         is set.
1610
1611 2018-01-14  Cory Fields  <cory-nospam-@coryfields.com>
1612
1613         * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
1614         * ira-color (allocno_hard_regs_compare): Likewise.
1615
1616 2018-01-14  Nathan Rossi  <nathan@nathanrossi.com>
1617
1618         PR target/83013
1619         * config/microblaze/microblaze.c (microblaze_asm_output_ident):
1620         Use .pushsection/.popsection.
1621
1622 2018-01-14  Martin Sebor  <msebor@redhat.com>
1623
1624         PR c++/81327
1625         * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
1626
1627 2018-01-14  Jakub Jelinek  <jakub@redhat.com>
1628
1629         * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
1630         entry from extra_headers.
1631         (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
1632         extra_headers, make the list bitwise identical to the i?86-*-* one.
1633
1634 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1635
1636         * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
1637         -mcmodel=large with -mindirect-branch=thunk,
1638         -mindirect-branch=thunk-extern, -mfunction-return=thunk and
1639         -mfunction-return=thunk-extern.
1640         * doc/invoke.texi: Document -mcmodel=large is incompatible with
1641         -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
1642         -mfunction-return=thunk and -mfunction-return=thunk-extern.
1643
1644 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1645
1646         * config/i386/i386.c (print_reg): Print the name of the full
1647         integer register without '%'.
1648         (ix86_print_operand): Handle 'V'.
1649          * doc/extend.texi: Document 'V' modifier.
1650
1651 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1652
1653         * config/i386/constraints.md (Bs): Disallow memory operand for
1654         -mindirect-branch-register.
1655         (Bw): Likewise.
1656         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1657         (GOT_memory_operand): Likewise.
1658         (call_insn_operand): Likewise.
1659         (sibcall_insn_operand): Likewise.
1660         (GOT32_symbol_operand): Likewise.
1661         * config/i386/i386.md (indirect_jump): Call convert_memory_address
1662         for -mindirect-branch-register.
1663         (tablejump): Likewise.
1664         (*sibcall_memory): Likewise.
1665         (*sibcall_value_memory): Likewise.
1666         Disallow peepholes of indirect call and jump via memory for
1667         -mindirect-branch-register.
1668         (*call_pop): Replace m with Bw.
1669         (*call_value_pop): Likewise.
1670         (*sibcall_pop_memory): Replace m with Bs.
1671         * config/i386/i386.opt (mindirect-branch-register): New option.
1672         * doc/invoke.texi: Document -mindirect-branch-register option.
1673
1674 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1675
1676         * config/i386/i386-protos.h (ix86_output_function_return): New.
1677         * config/i386/i386.c (ix86_set_indirect_branch_type): Also
1678         set function_return_type.
1679         (indirect_thunk_name): Add ret_p to indicate thunk for function
1680         return.
1681         (output_indirect_thunk_function): Pass false to
1682         indirect_thunk_name.
1683         (ix86_output_indirect_branch_via_reg): Likewise.
1684         (ix86_output_indirect_branch_via_push): Likewise.
1685         (output_indirect_thunk_function): Create alias for function
1686         return thunk if regno < 0.
1687         (ix86_output_function_return): New function.
1688         (ix86_handle_fndecl_attribute): Handle function_return.
1689         (ix86_attribute_table): Add function_return.
1690         * config/i386/i386.h (machine_function): Add
1691         function_return_type.
1692         * config/i386/i386.md (simple_return_internal): Use
1693         ix86_output_function_return.
1694         (simple_return_internal_long): Likewise.
1695         * config/i386/i386.opt (mfunction-return=): New option.
1696         (indirect_branch): Mention -mfunction-return=.
1697         * doc/extend.texi: Document function_return function attribute.
1698         * doc/invoke.texi: Document -mfunction-return= option.
1699
1700 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1701
1702         * config/i386/i386-opts.h (indirect_branch): New.
1703         * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
1704         * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
1705         with local indirect jump when converting indirect call and jump.
1706         (ix86_set_indirect_branch_type): New.
1707         (ix86_set_current_function): Call ix86_set_indirect_branch_type.
1708         (indirectlabelno): New.
1709         (indirect_thunk_needed): Likewise.
1710         (indirect_thunk_bnd_needed): Likewise.
1711         (indirect_thunks_used): Likewise.
1712         (indirect_thunks_bnd_used): Likewise.
1713         (INDIRECT_LABEL): Likewise.
1714         (indirect_thunk_name): Likewise.
1715         (output_indirect_thunk): Likewise.
1716         (output_indirect_thunk_function): Likewise.
1717         (ix86_output_indirect_branch_via_reg): Likewise.
1718         (ix86_output_indirect_branch_via_push): Likewise.
1719         (ix86_output_indirect_branch): Likewise.
1720         (ix86_output_indirect_jmp): Likewise.
1721         (ix86_code_end): Call output_indirect_thunk_function if needed.
1722         (ix86_output_call_insn): Call ix86_output_indirect_branch if
1723         needed.
1724         (ix86_handle_fndecl_attribute): Handle indirect_branch.
1725         (ix86_attribute_table): Add indirect_branch.
1726         * config/i386/i386.h (machine_function): Add indirect_branch_type
1727         and has_local_indirect_jump.
1728         * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
1729         to true.
1730         (tablejump): Likewise.
1731         (*indirect_jump): Use ix86_output_indirect_jmp.
1732         (*tablejump_1): Likewise.
1733         (simple_return_indirect_internal): Likewise.
1734         * config/i386/i386.opt (mindirect-branch=): New option.
1735         (indirect_branch): New.
1736         (keep): Likewise.
1737         (thunk): Likewise.
1738         (thunk-inline): Likewise.
1739         (thunk-extern): Likewise.
1740         * doc/extend.texi: Document indirect_branch function attribute.
1741         * doc/invoke.texi: Document -mindirect-branch= option.
1742
1743 2018-01-14  Jan Hubicka  <hubicka@ucw.cz>
1744
1745         PR ipa/83051
1746         * ipa-inline.c (edge_badness): Tolerate roundoff errors.
1747
1748 2018-01-14  Richard Sandiford  <richard.sandiford@linaro.org>
1749
1750         * ipa-inline.c (want_inline_small_function_p): Return false if
1751         inlining has already failed with CIF_FINAL_ERROR.
1752         (update_caller_keys): Call want_inline_small_function_p before
1753         can_inline_edge_p.
1754         (update_callee_keys): Likewise.
1755
1756 2018-01-10  Kelvin Nilsen  <kelvin@gcc.gnu.org>
1757
1758         * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
1759         New function.
1760         (rs6000_quadword_masked_address_p): Likewise.
1761         (quad_aligned_load_p): Likewise.
1762         (quad_aligned_store_p): Likewise.
1763         (const_load_sequence_p): Add comment to describe the outer-most loop.
1764         (mimic_memory_attributes_and_flags): New function.
1765         (rs6000_gen_stvx): Likewise.
1766         (replace_swapped_aligned_store): Likewise.
1767         (rs6000_gen_lvx): Likewise.
1768         (replace_swapped_aligned_load): Likewise.
1769         (replace_swapped_load_constant): Capitalize argument name in
1770         comment describing this function.
1771         (rs6000_analyze_swaps): Add a third pass to search for vector loads
1772         and stores that access quad-word aligned addresses and replace
1773         with stvx or lvx instructions when appropriate.
1774         * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
1775         New function prototype.
1776         (rs6000_quadword_masked_address_p): Likewise.
1777         (rs6000_gen_lvx): Likewise.
1778         (rs6000_gen_stvx): Likewise.
1779         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
1780         VSX_D (V2DF, V2DI), modify this split to select lvx instruction
1781         when memory address is aligned.
1782         (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
1783         this split to select lvx instruction when memory address is aligned.
1784         (*vsx_le_perm_load_v8hi): Modify this split to select lvx
1785         instruction when memory address is aligned.
1786         (*vsx_le_perm_load_v16qi): Likewise.
1787         (four unnamed splitters): Modify to select the stvx instruction
1788         when memory is aligned.
1789
1790 2018-01-13  Jan Hubicka  <hubicka@ucw.cz>
1791
1792         * predict.c (determine_unlikely_bbs): Handle correctly BBs
1793         which appears in the queue multiple times.
1794
1795 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1796             Alan Hayward  <alan.hayward@arm.com>
1797             David Sherwood  <david.sherwood@arm.com>
1798
1799         * tree-vectorizer.h (vec_lower_bound): New structure.
1800         (_loop_vec_info): Add check_nonzero and lower_bounds.
1801         (LOOP_VINFO_CHECK_NONZERO): New macro.
1802         (LOOP_VINFO_LOWER_BOUNDS): Likewise.
1803         (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
1804         * tree-data-ref.h (dr_with_seg_len): Add access_size and align
1805         fields.  Make seg_len the distance travelled, not including the
1806         access size.
1807         (dr_direction_indicator): Declare.
1808         (dr_zero_step_indicator): Likewise.
1809         (dr_known_forward_stride_p): Likewise.
1810         * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
1811         tree-ssanames.h.
1812         (runtime_alias_check_p): Allow runtime alias checks with
1813         variable strides.
1814         (operator ==): Compare access_size and align.
1815         (prune_runtime_alias_test_list): Rework for new distinction between
1816         the access_size and seg_len.
1817         (create_intersect_range_checks_index): Likewise.  Cope with polynomial
1818         segment lengths.
1819         (get_segment_min_max): New function.
1820         (create_intersect_range_checks): Use it.
1821         (dr_step_indicator): New function.
1822         (dr_direction_indicator): Likewise.
1823         (dr_zero_step_indicator): Likewise.
1824         (dr_known_forward_stride_p): Likewise.
1825         * tree-loop-distribution.c (data_ref_segment_size): Return
1826         DR_STEP * (niters - 1).
1827         (compute_alias_check_pairs): Update call to the dr_with_seg_len
1828         constructor.
1829         * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
1830         (vect_preserves_scalar_order_p): New function, split out from...
1831         (vect_analyze_data_ref_dependence): ...here.  Check for zero steps.
1832         (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
1833         (vect_vfa_access_size): New function.
1834         (vect_vfa_align): Likewise.
1835         (vect_compile_time_alias): Take access_size_a and access_b arguments.
1836         (dump_lower_bound): New function.
1837         (vect_check_lower_bound): Likewise.
1838         (vect_small_gap_p): Likewise.
1839         (vectorizable_with_step_bound_p): Likewise.
1840         (vect_prune_runtime_alias_test_list): Ignore cross-iteration
1841         depencies if the vectorization factor is 1.  Convert the checks
1842         for nonzero steps into checks on the bounds of DR_STEP.  Try using
1843         a bunds check for variable steps if the minimum required step is
1844         relatively small. Update calls to the dr_with_seg_len
1845         constructor and to vect_compile_time_alias.
1846         * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
1847         function.
1848         (vect_loop_versioning): Call it.
1849         * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
1850         when retrying.
1851         (vect_estimate_min_profitable_iters): Account for any bounds checks.
1852
1853 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1854             Alan Hayward  <alan.hayward@arm.com>
1855             David Sherwood  <david.sherwood@arm.com>
1856
1857         * doc/sourcebuild.texi (vect_scatter_store): Document.
1858         * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
1859         optabs.
1860         * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
1861         Document.
1862         * genopinit.c (main): Add supports_vec_scatter_store and
1863         supports_vec_scatter_store_cached to target_optabs.
1864         * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
1865         IFN_MASK_SCATTER_STORE.
1866         * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
1867         functions.
1868         * internal-fn.h (internal_store_fn_p): Declare.
1869         (internal_fn_stored_value_index): Likewise.
1870         * internal-fn.c (scatter_store_direct): New macro.
1871         (expand_scatter_store_optab_fn): New function.
1872         (direct_scatter_store_optab_supported_p): New macro.
1873         (internal_store_fn_p): New function.
1874         (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
1875         IFN_MASK_SCATTER_STORE.
1876         (internal_fn_mask_index): Likewise.
1877         (internal_fn_stored_value_index): New function.
1878         (internal_gather_scatter_fn_supported_p): Adjust operand numbers
1879         for scatter stores.
1880         * optabs-query.h (supports_vec_scatter_store_p): Declare.
1881         * optabs-query.c (supports_vec_scatter_store_p): New function.
1882         * tree-vectorizer.h (vect_get_store_rhs): Declare.
1883         * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
1884         true for scatter stores.
1885         (vect_gather_scatter_fn_p): Handle scatter stores too.
1886         (vect_check_gather_scatter): Consider using scatter stores if
1887         supports_vec_scatter_store_p.
1888         * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
1889         scatter stores too.
1890         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1891         internal_fn_stored_value_index.
1892         (check_load_store_masking): Handle scatter stores too.
1893         (vect_get_store_rhs): Make public.
1894         (vectorizable_call): Use internal_store_fn_p.
1895         (vectorizable_store): Handle scatter store internal functions.
1896         (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
1897         when deciding whether the end of the group has been reached.
1898         * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
1899         * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
1900         (mask_scatter_store<mode>): New insns.
1901
1902 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1903             Alan Hayward  <alan.hayward@arm.com>
1904             David Sherwood  <david.sherwood@arm.com>
1905
1906         * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
1907         * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
1908         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
1909         function.
1910         (vect_use_strided_gather_scatters_p): Take a masked_p argument.
1911         Use vect_truncate_gather_scatter_offset if we can't treat the
1912         operation as a normal gather load or scatter store.
1913         (get_group_load_store_type): Take the gather_scatter_info
1914         as argument.  Try using a gather load or scatter store for
1915         single-element groups.
1916         (get_load_store_type): Update calls to get_group_load_store_type
1917         and vect_use_strided_gather_scatters_p.
1918
1919 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1920             Alan Hayward  <alan.hayward@arm.com>
1921             David Sherwood  <david.sherwood@arm.com>
1922
1923         * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
1924         optional tree argument.
1925         * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
1926         null target hooks.
1927         (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
1928         but continue to use the current value as a fallback.
1929         (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
1930         to compare the updates.
1931         * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
1932         (get_load_store_type): Use it when handling a strided access.
1933         (vect_get_strided_load_store_ops): New function.
1934         (vect_get_data_ptr_increment): Likewise.
1935         (vectorizable_load): Handle strided gather loads.  Always pass
1936         a step to vect_create_data_ref_ptr and bump_vector_ptr.
1937
1938 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1939             Alan Hayward  <alan.hayward@arm.com>
1940             David Sherwood  <david.sherwood@arm.com>
1941
1942         * doc/md.texi (gather_load@var{m}): Document.
1943         (mask_gather_load@var{m}): Likewise.
1944         * genopinit.c (main): Add supports_vec_gather_load and
1945         supports_vec_gather_load_cached to target_optabs.
1946         * optabs-tree.c (init_tree_optimization_optabs): Use
1947         ggc_cleared_alloc to allocate target_optabs.
1948         * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
1949         * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
1950         functions.
1951         * internal-fn.h (internal_load_fn_p): Declare.
1952         (internal_gather_scatter_fn_p): Likewise.
1953         (internal_fn_mask_index): Likewise.
1954         (internal_gather_scatter_fn_supported_p): Likewise.
1955         * internal-fn.c (gather_load_direct): New macro.
1956         (expand_gather_load_optab_fn): New function.
1957         (direct_gather_load_optab_supported_p): New macro.
1958         (direct_internal_fn_optab): New function.
1959         (internal_load_fn_p): Likewise.
1960         (internal_gather_scatter_fn_p): Likewise.
1961         (internal_fn_mask_index): Likewise.
1962         (internal_gather_scatter_fn_supported_p): Likewise.
1963         * optabs-query.c (supports_at_least_one_mode_p): New function.
1964         (supports_vec_gather_load_p): Likewise.
1965         * optabs-query.h (supports_vec_gather_load_p): Declare.
1966         * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
1967         and memory_type field.
1968         (NUM_PATTERNS): Bump to 15.
1969         * tree-vect-data-refs.c: Include internal-fn.h.
1970         (vect_gather_scatter_fn_p): New function.
1971         (vect_describe_gather_scatter_call): Likewise.
1972         (vect_check_gather_scatter): Try using internal functions for
1973         gather loads.  Recognize existing calls to a gather load function.
1974         (vect_analyze_data_refs): Consider using gather loads if
1975         supports_vec_gather_load_p.
1976         * tree-vect-patterns.c (vect_get_load_store_mask): New function.
1977         (vect_get_gather_scatter_offset_type): Likewise.
1978         (vect_convert_mask_for_vectype): Likewise.
1979         (vect_add_conversion_to_patterm): Likewise.
1980         (vect_try_gather_scatter_pattern): Likewise.
1981         (vect_recog_gather_scatter_pattern): New pattern recognizer.
1982         (vect_vect_recog_func_ptrs): Add it.
1983         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1984         internal_fn_mask_index and internal_gather_scatter_fn_p.
1985         (check_load_store_masking): Take the gather_scatter_info as an
1986         argument and handle gather loads.
1987         (vect_get_gather_scatter_ops): New function.
1988         (vectorizable_call): Check internal_load_fn_p.
1989         (vectorizable_load): Likewise.  Handle gather load internal
1990         functions.
1991         (vectorizable_store): Update call to check_load_store_masking.
1992         * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
1993         * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
1994         * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
1995         (aarch64_gather_scale_operand_d): New predicates.
1996         * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
1997         (mask_gather_load<mode>): New insns.
1998
1999 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2000             Alan Hayward  <alan.hayward@arm.com>
2001             David Sherwood  <david.sherwood@arm.com>
2002
2003         * optabs.def (fold_left_plus_optab): New optab.
2004         * doc/md.texi (fold_left_plus_@var{m}): Document.
2005         * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
2006         * internal-fn.c (fold_left_direct): Define.
2007         (expand_fold_left_optab_fn): Likewise.
2008         (direct_fold_left_optab_supported_p): Likewise.
2009         * fold-const-call.c (fold_const_fold_left): New function.
2010         (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
2011         * tree-parloops.c (valid_reduction_p): New function.
2012         (gather_scalar_reductions): Use it.
2013         * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
2014         (vect_finish_replace_stmt): Declare.
2015         * tree-vect-loop.c (fold_left_reduction_fn): New function.
2016         (needs_fold_left_reduction_p): New function, split out from...
2017         (vect_is_simple_reduction): ...here.  Accept reductions that
2018         forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
2019         (vect_force_simple_reduction): Also store the reduction type in
2020         the assignment's STMT_VINFO_REDUC_TYPE.
2021         (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
2022         (merge_with_identity): New function.
2023         (vect_expand_fold_left): Likewise.
2024         (vectorize_fold_left_reduction): Likewise.
2025         (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION.  Leave the
2026         scalar phi in place for it.  Check for target support and reject
2027         cases that would reassociate the operation.  Defer the transform
2028         phase to vectorize_fold_left_reduction.
2029         * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
2030         * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
2031         (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
2032
2033 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2034
2035         * tree-if-conv.c (predicate_mem_writes): Remove redundant
2036         call to ifc_temp_var.
2037
2038 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2039             Alan Hayward  <alan.hayward@arm.com>
2040             David Sherwood  <david.sherwood@arm.com>
2041
2042         * target.def (legitimize_address_displacement): Take the original
2043         offset as a poly_int.
2044         * targhooks.h (default_legitimize_address_displacement): Update
2045         accordingly.
2046         * targhooks.c (default_legitimize_address_displacement): Likewise.
2047         * doc/tm.texi: Regenerate.
2048         * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
2049         as an argument, moving assert of ad->disp == ad->disp_term to...
2050         (process_address_1): ...here.  Update calls to base_plus_disp_to_reg.
2051         Try calling targetm.legitimize_address_displacement before expanding
2052         the address rather than afterwards, and adjust for the new interface.
2053         * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
2054         Match the new hook interface.  Handle SVE addresses.
2055         * config/sh/sh.c (sh_legitimize_address_displacement): Make the
2056         new hook interface.
2057
2058 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2059
2060         * Makefile.in (OBJS): Add early-remat.o.
2061         * target.def (select_early_remat_modes): New hook.
2062         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
2063         * doc/tm.texi: Regenerate.
2064         * targhooks.h (default_select_early_remat_modes): Declare.
2065         * targhooks.c (default_select_early_remat_modes): New function.
2066         * timevar.def (TV_EARLY_REMAT): New timevar.
2067         * passes.def (pass_early_remat): New pass.
2068         * tree-pass.h (make_pass_early_remat): Declare.
2069         * early-remat.c: New file.
2070         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
2071         function.
2072         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
2073
2074 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2075             Alan Hayward  <alan.hayward@arm.com>
2076             David Sherwood  <david.sherwood@arm.com>
2077
2078         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
2079         vfm1 with a bound_epilog parameter.
2080         (vect_do_peeling): Update calls accordingly, and move the prologue
2081         call earlier in the function.  Treat the base bound_epilog as 0 for
2082         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
2083         this base when peeling for gaps.
2084         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
2085         with fully-masked loops.
2086         (vect_estimate_min_profitable_iters): Handle the single peeled
2087         iteration in that case.
2088
2089 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2090             Alan Hayward  <alan.hayward@arm.com>
2091             David Sherwood  <david.sherwood@arm.com>
2092
2093         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
2094         single-element interleaving even if the size is not a power of 2.
2095         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
2096         accesses for single-element interleaving if the group size is
2097         not a power of 2.
2098
2099 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2100             Alan Hayward  <alan.hayward@arm.com>
2101             David Sherwood  <david.sherwood@arm.com>
2102
2103         * doc/md.texi (fold_extract_last_@var{m}): Document.
2104         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
2105         * optabs.def (fold_extract_last_optab): New optab.
2106         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
2107         * internal-fn.c (fold_extract_direct): New macro.
2108         (expand_fold_extract_optab_fn): Likewise.
2109         (direct_fold_extract_optab_supported_p): Likewise.
2110         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
2111         * tree-vect-loop.c (vect_model_reduction_cost): Handle
2112         EXTRACT_LAST_REDUCTION.
2113         (get_initial_def_for_reduction): Do not create an initial vector
2114         for EXTRACT_LAST_REDUCTION reductions.
2115         (vectorizable_reduction): Leave the scalar phi in place for
2116         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
2117         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
2118         epilogue code for EXTRACT_LAST_REDUCTION and defer the
2119         transform phase to vectorizable_condition.
2120         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
2121         split out from...
2122         (vect_finish_stmt_generation): ...here.
2123         (vect_finish_replace_stmt): New function.
2124         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
2125         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
2126         pattern.
2127         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
2128
2129 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2130             Alan Hayward  <alan.hayward@arm.com>
2131             David Sherwood  <david.sherwood@arm.com>
2132
2133         * doc/md.texi (extract_last_@var{m}): Document.
2134         * optabs.def (extract_last_optab): New optab.
2135         * internal-fn.def (EXTRACT_LAST): New internal function.
2136         * internal-fn.c (cond_unary_direct): New macro.
2137         (expand_cond_unary_optab_fn): Likewise.
2138         (direct_cond_unary_optab_supported_p): Likewise.
2139         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
2140         loops using EXTRACT_LAST.
2141         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
2142         (extract_last_<mode>): ...this optab.
2143         (vec_extract<mode><Vel>): Update accordingly.
2144
2145 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2146             Alan Hayward  <alan.hayward@arm.com>
2147             David Sherwood  <david.sherwood@arm.com>
2148
2149         * target.def (empty_mask_is_expensive): New hook.
2150         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
2151         * doc/tm.texi: Regenerate.
2152         * targhooks.h (default_empty_mask_is_expensive): Declare.
2153         * targhooks.c (default_empty_mask_is_expensive): New function.
2154         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
2155         if the target says that empty masks are expensive.
2156         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
2157         New function.
2158         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
2159
2160 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2161             Alan Hayward  <alan.hayward@arm.com>
2162             David Sherwood  <david.sherwood@arm.com>
2163
2164         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
2165         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
2166         (vect_use_loop_mask_for_alignment_p): New function.
2167         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
2168         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
2169         niters_skip argument.  Make sure that the first niters_skip elements
2170         of the first iteration are inactive.
2171         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
2172         Update call to vect_set_loop_masks_directly.
2173         (get_misalign_in_elems): New function, split out from...
2174         (vect_gen_prolog_loop_niters): ...here.
2175         (vect_update_init_of_dr): Take a code argument that specifies whether
2176         the adjustment should be added or subtracted.
2177         (vect_update_init_of_drs): Likewise.
2178         (vect_prepare_for_masked_peels): New function.
2179         (vect_do_peeling): Skip prologue peeling if we're using a mask
2180         instead.  Update call to vect_update_inits_of_drs.
2181         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
2182         mask_skip_niters.
2183         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
2184         alignment.  Do not include the number of peeled iterations in
2185         the minimum threshold in that case.
2186         (vectorizable_induction): Adjust the start value down by
2187         LOOP_VINFO_MASK_SKIP_NITERS iterations.
2188         (vect_transform_loop): Call vect_prepare_for_masked_peels.
2189         Take the number of skipped iterations into account when calculating
2190         the loop bounds.
2191         * tree-vect-stmts.c (vect_gen_while_not): New function.
2192
2193 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2194             Alan Hayward  <alan.hayward@arm.com>
2195             David Sherwood  <david.sherwood@arm.com>
2196
2197         * doc/sourcebuild.texi (vect_fully_masked): Document.
2198         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
2199         default value to 0.
2200         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
2201         split out from...
2202         (vect_analyze_loop_2): ...here. Don't check the vectorization
2203         factor against the number of loop iterations if the loop is
2204         fully-masked.
2205
2206 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2207             Alan Hayward  <alan.hayward@arm.com>
2208             David Sherwood  <david.sherwood@arm.com>
2209
2210         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
2211         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
2212         (dump_groups): Update accordingly.
2213         (iv_use::mem_type): New member variable.
2214         (address_p): New function.
2215         (record_use): Add a mem_type argument and initialize the new
2216         mem_type field.
2217         (record_group_use): Add a mem_type argument.  Use address_p.
2218         Remove obsolete null checks of base_object.  Update call to record_use.
2219         (find_interesting_uses_op): Update call to record_group_use.
2220         (find_interesting_uses_cond): Likewise.
2221         (find_interesting_uses_address): Likewise.
2222         (get_mem_type_for_internal_fn): New function.
2223         (find_address_like_use): Likewise.
2224         (find_interesting_uses_stmt): Try find_address_like_use before
2225         calling find_interesting_uses_op.
2226         (addr_offset_valid_p): Use the iv mem_type field as the type
2227         of the addressed memory.
2228         (add_autoinc_candidates): Likewise.
2229         (get_address_cost): Likewise.
2230         (split_small_address_groups_p): Use address_p.
2231         (split_address_groups): Likewise.
2232         (add_iv_candidate_for_use): Likewise.
2233         (autoinc_possible_for_pair): Likewise.
2234         (rewrite_groups): Likewise.
2235         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
2236         (determine_group_iv_cost): Update after split of USE_ADDRESS.
2237         (get_alias_ptr_type_for_ptr_address): New function.
2238         (rewrite_use_address): Rewrite address uses in calls that were
2239         identified by find_address_like_use.
2240
2241 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2242             Alan Hayward  <alan.hayward@arm.com>
2243             David Sherwood  <david.sherwood@arm.com>
2244
2245         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
2246         TARGET_MEM_REFs.
2247         * gimple-expr.h (is_gimple_addressable: Likewise.
2248         * gimple-expr.c (is_gimple_address): Likewise.
2249         * internal-fn.c (expand_call_mem_ref): New function.
2250         (expand_mask_load_optab_fn): Use it.
2251         (expand_mask_store_optab_fn): Likewise.
2252
2253 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2254             Alan Hayward  <alan.hayward@arm.com>
2255             David Sherwood  <david.sherwood@arm.com>
2256
2257         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
2258         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
2259         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
2260         (cond_umax@var{mode}): Document.
2261         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
2262         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
2263         (cond_umin_optab, cond_umax_optab): New optabs.
2264         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
2265         (COND_IOR, COND_XOR): New internal functions.
2266         * internal-fn.h (get_conditional_internal_fn): Declare.
2267         * internal-fn.c (cond_binary_direct): New macro.
2268         (expand_cond_binary_optab_fn): Likewise.
2269         (direct_cond_binary_optab_supported_p): Likewise.
2270         (get_conditional_internal_fn): New function.
2271         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
2272         Cope with reduction statements that are vectorized as calls rather
2273         than assignments.
2274         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
2275         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
2276         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
2277         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
2278         (UNSPEC_COND_EOR): New unspecs.
2279         (optab): Add mappings for them.
2280         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
2281         (sve_int_op, sve_fp_op): New int attributes.
2282
2283 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2284             Alan Hayward  <alan.hayward@arm.com>
2285             David Sherwood  <david.sherwood@arm.com>
2286
2287         * optabs.def (while_ult_optab): New optab.
2288         * doc/md.texi (while_ult@var{m}@var{n}): Document.
2289         * internal-fn.def (WHILE_ULT): New internal function.
2290         * internal-fn.h (direct_internal_fn_supported_p): New override
2291         that takes two types as argument.
2292         * internal-fn.c (while_direct): New macro.
2293         (expand_while_optab_fn): New function.
2294         (convert_optab_supported_p): Likewise.
2295         (direct_while_optab_supported_p): New macro.
2296         * wide-int.h (wi::udiv_ceil): New function.
2297         * tree-vectorizer.h (rgroup_masks): New structure.
2298         (vec_loop_masks): New typedef.
2299         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
2300         and fully_masked_p.
2301         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
2302         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
2303         (vect_max_vf): New function.
2304         (slpeel_make_loop_iterate_ntimes): Delete.
2305         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
2306         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
2307         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
2308         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
2309         internal-fn.h, stor-layout.h and optabs-query.h.
2310         (vect_set_loop_mask): New function.
2311         (add_preheader_seq): Likewise.
2312         (add_header_seq): Likewise.
2313         (interleave_supported_p): Likewise.
2314         (vect_maybe_permute_loop_masks): Likewise.
2315         (vect_set_loop_masks_directly): Likewise.
2316         (vect_set_loop_condition_masked): Likewise.
2317         (vect_set_loop_condition_unmasked): New function, split out from
2318         slpeel_make_loop_iterate_ntimes.
2319         (slpeel_make_loop_iterate_ntimes): Rename to..
2320         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
2321         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
2322         (vect_do_peeling): Update call accordingly.
2323         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
2324         loops.
2325         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
2326         mask_compare_type, can_fully_mask_p and fully_masked_p.
2327         (release_vec_loop_masks): New function.
2328         (_loop_vec_info): Use it to free the loop masks.
2329         (can_produce_all_loop_masks_p): New function.
2330         (vect_get_max_nscalars_per_iter): Likewise.
2331         (vect_verify_full_masking): Likewise.
2332         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
2333         retries, and free the mask rgroups before retrying.  Check loop-wide
2334         reasons for disallowing fully-masked loops.  Make the final decision
2335         about whether use a fully-masked loop or not.
2336         (vect_estimate_min_profitable_iters): Do not assume that peeling
2337         for the number of iterations will be needed for fully-masked loops.
2338         (vectorizable_reduction): Disable fully-masked loops.
2339         (vectorizable_live_operation): Likewise.
2340         (vect_halve_mask_nunits): New function.
2341         (vect_double_mask_nunits): Likewise.
2342         (vect_record_loop_mask): Likewise.
2343         (vect_get_loop_mask): Likewise.
2344         (vect_transform_loop): Handle the case in which the final loop
2345         iteration might handle a partial vector.  Call vect_set_loop_condition
2346         instead of slpeel_make_loop_iterate_ntimes.
2347         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
2348         (check_load_store_masking): New function.
2349         (prepare_load_store_mask): Likewise.
2350         (vectorizable_store): Handle fully-masked loops.
2351         (vectorizable_load): Likewise.
2352         (supportable_widening_operation): Use vect_halve_mask_nunits for
2353         booleans.
2354         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
2355         (vect_gen_while): New function.
2356         * config/aarch64/aarch64.md (umax<mode>3): New expander.
2357         (aarch64_uqdec<mode>): New insn.
2358
2359 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2360             Alan Hayward  <alan.hayward@arm.com>
2361             David Sherwood  <david.sherwood@arm.com>
2362
2363         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
2364         (reduc_xor_scal_optab): New optabs.
2365         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
2366         (reduc_xor_scal_@var{m}): Document.
2367         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
2368         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
2369         internal functions.
2370         * fold-const-call.c (fold_const_call): Handle them.
2371         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
2372         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
2373         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
2374         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
2375         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
2376         (UNSPEC_XORV): New unspecs.
2377         (optab): Add entries for them.
2378         (BITWISEV): New int iterator.
2379         (bit_reduc_op): New int attributes.
2380
2381 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2382             Alan Hayward  <alan.hayward@arm.com>
2383             David Sherwood  <david.sherwood@arm.com>
2384
2385         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
2386         * internal-fn.def (VEC_SHL_INSERT): New internal function.
2387         * optabs.def (vec_shl_insert_optab): New optab.
2388         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
2389         (duplicate_and_interleave): Likewise.
2390         * tree-vect-loop.c: Include internal-fn.h.
2391         (neutral_op_for_slp_reduction): New function, split out from
2392         get_initial_defs_for_reduction.
2393         (get_initial_def_for_reduction): Handle option 2 for variable-length
2394         vectors by loading the neutral value into a vector and then shifting
2395         the initial value into element 0.
2396         (get_initial_defs_for_reduction): Replace the code argument with
2397         the neutral value calculated by neutral_op_for_slp_reduction.
2398         Use gimple_build_vector for constant-length vectors.
2399         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
2400         but the first group_size elements have a neutral value.
2401         Use duplicate_and_interleave otherwise.
2402         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
2403         Update call to get_initial_defs_for_reduction.  Handle SLP
2404         reductions for variable-length vectors by creating one vector
2405         result for each scalar result, with the elements associated
2406         with other scalar results stubbed out with the neutral value.
2407         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
2408         Require IFN_VEC_SHL_INSERT for double reductions on
2409         variable-length vectors, or SLP reductions that have
2410         a neutral value.  Require can_duplicate_and_interleave_p
2411         support for variable-length unchained SLP reductions if there
2412         is no neutral value, such as for MIN/MAX reductions.  Also require
2413         the number of vector elements to be a multiple of the number of
2414         SLP statements when doing variable-length unchained SLP reductions.
2415         Update call to vect_create_epilog_for_reduction.
2416         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
2417         and remove initial values.
2418         (duplicate_and_interleave): Make public.
2419         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
2420         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
2421
2422 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2423             Alan Hayward  <alan.hayward@arm.com>
2424             David Sherwood  <david.sherwood@arm.com>
2425
2426         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
2427         (can_duplicate_and_interleave_p): New function.
2428         (vect_get_and_check_slp_defs): Take the vector of statements
2429         rather than just the current one.  Remove excess parentheses.
2430         Restriction rejectinon of vect_constant_def and vect_external_def
2431         for variable-length vectors to boolean types, or types for which
2432         can_duplicate_and_interleave_p is false.
2433         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
2434         (duplicate_and_interleave): New function.
2435         (vect_get_constant_vectors): Use gimple_build_vector for
2436         constant-length vectors and suitable variable-length constant
2437         vectors.  Use duplicate_and_interleave for other variable-length
2438         vectors.  Don't defer the update when inserting new statements.
2439
2440 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2441             Alan Hayward  <alan.hayward@arm.com>
2442             David Sherwood  <david.sherwood@arm.com>
2443
2444         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
2445         min_profitable_iters doesn't go negative.
2446
2447 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2448             Alan Hayward  <alan.hayward@arm.com>
2449             David Sherwood  <david.sherwood@arm.com>
2450
2451         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
2452         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
2453         * optabs.def (vec_mask_load_lanes_optab): New optab.
2454         (vec_mask_store_lanes_optab): Likewise.
2455         * internal-fn.def (MASK_LOAD_LANES): New internal function.
2456         (MASK_STORE_LANES): Likewise.
2457         * internal-fn.c (mask_load_lanes_direct): New macro.
2458         (mask_store_lanes_direct): Likewise.
2459         (expand_mask_load_optab_fn): Handle masked operations.
2460         (expand_mask_load_lanes_optab_fn): New macro.
2461         (expand_mask_store_optab_fn): Handle masked operations.
2462         (expand_mask_store_lanes_optab_fn): New macro.
2463         (direct_mask_load_lanes_optab_supported_p): Likewise.
2464         (direct_mask_store_lanes_optab_supported_p): Likewise.
2465         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
2466         parameter.
2467         (vect_load_lanes_supported): Likewise.
2468         * tree-vect-data-refs.c (strip_conversion): New function.
2469         (can_group_stmts_p): Likewise.
2470         (vect_analyze_data_ref_accesses): Use it instead of checking
2471         for a pair of assignments.
2472         (vect_store_lanes_supported): Take a masked_p parameter.
2473         (vect_load_lanes_supported): Likewise.
2474         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
2475         vect_store_lanes_supported and vect_load_lanes_supported.
2476         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
2477         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
2478         parameter.  Don't allow gaps for masked accesses.
2479         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
2480         and vect_load_lanes_supported.
2481         (get_load_store_type): Take a masked_p parameter and update
2482         call to get_group_load_store_type.
2483         (vectorizable_store): Update call to get_load_store_type.
2484         Handle IFN_MASK_STORE_LANES.
2485         (vectorizable_load): Update call to get_load_store_type.
2486         Handle IFN_MASK_LOAD_LANES.
2487
2488 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2489             Alan Hayward  <alan.hayward@arm.com>
2490             David Sherwood  <david.sherwood@arm.com>
2491
2492         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
2493         modes for SVE.
2494         * config/aarch64/aarch64-protos.h
2495         (aarch64_sve_struct_memory_operand_p): Declare.
2496         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
2497         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
2498         (VPRED, vpred): Handle SVE structure modes.
2499         * config/aarch64/constraints.md (Utx): New constraint.
2500         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
2501         (aarch64_sve_struct_nonimmediate_operand): New predicates.
2502         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
2503         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
2504         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
2505         structure modes.  Split into pieces after RA.
2506         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
2507         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
2508         New patterns.
2509         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
2510         SVE structure modes.
2511         (aarch64_classify_address): Likewise.
2512         (sizetochar): Move earlier in file.
2513         (aarch64_print_operand): Handle SVE register lists.
2514         (aarch64_array_mode): New function.
2515         (aarch64_sve_struct_memory_operand_p): Likewise.
2516         (TARGET_ARRAY_MODE): Redefine.
2517
2518 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2519             Alan Hayward  <alan.hayward@arm.com>
2520             David Sherwood  <david.sherwood@arm.com>
2521
2522         * target.def (array_mode): New target hook.
2523         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
2524         * doc/tm.texi: Regenerate.
2525         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
2526         * hooks.c (hook_optmode_mode_uhwi_none): New function.
2527         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
2528         targetm.array_mode.
2529         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
2530         type sizes.
2531
2532 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2533             Alan Hayward  <alan.hayward@arm.com>
2534             David Sherwood  <david.sherwood@arm.com>
2535
2536         * fold-const.c (fold_binary_loc): Check the argument types
2537         rather than the result type when testing for a vector operation.
2538
2539 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2540
2541         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
2542         * doc/tm.texi: Regenerate.
2543
2544 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2545             Alan Hayward  <alan.hayward@arm.com>
2546             David Sherwood  <david.sherwood@arm.com>
2547
2548         * doc/invoke.texi (-msve-vector-bits=): Document new option.
2549         (sve): Document new AArch64 extension.
2550         * doc/md.texi (w): Extend the description of the AArch64
2551         constraint to include SVE vectors.
2552         (Upl, Upa): Document new AArch64 predicate constraints.
2553         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
2554         enum.
2555         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
2556         (msve-vector-bits=): New option.
2557         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
2558         SVE when these are disabled.
2559         (sve): New extension.
2560         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
2561         modes.  Adjust their number of units based on aarch64_sve_vg.
2562         (MAX_BITSIZE_MODE_ANY_MODE): Define.
2563         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
2564         aarch64_addr_query_type.
2565         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
2566         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
2567         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
2568         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
2569         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
2570         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
2571         (aarch64_simd_imm_zero_p): Delete.
2572         (aarch64_check_zero_based_sve_index_immediate): Declare.
2573         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2574         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2575         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2576         (aarch64_sve_float_mul_immediate_p): Likewise.
2577         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2578         rather than an rtx.
2579         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
2580         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
2581         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
2582         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
2583         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
2584         (aarch64_regmode_natural_size): Likewise.
2585         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
2586         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
2587         left one place.
2588         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
2589         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
2590         for VG and the SVE predicate registers.
2591         (V_ALIASES): Add a "z"-prefixed alias.
2592         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
2593         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
2594         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
2595         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
2596         (REG_CLASS_NAMES): Add entries for them.
2597         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
2598         and the predicate registers.
2599         (aarch64_sve_vg): Declare.
2600         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
2601         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
2602         (REGMODE_NATURAL_SIZE): Define.
2603         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
2604         SVE macros.
2605         * config/aarch64/aarch64.c: Include cfgrtl.h.
2606         (simd_immediate_info): Add a constructor for series vectors,
2607         and an associated step field.
2608         (aarch64_sve_vg): New variable.
2609         (aarch64_dbx_register_number): Handle VG and the predicate registers.
2610         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
2611         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
2612         (VEC_ANY_DATA, VEC_STRUCT): New constants.
2613         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
2614         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
2615         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
2616         (aarch64_get_mask_mode): New functions.
2617         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
2618         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
2619         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
2620         predicate modes and predicate registers.  Explicitly restrict
2621         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
2622         to store a vector mode if it is recognized by
2623         aarch64_classify_vector_mode.
2624         (aarch64_regmode_natural_size): New function.
2625         (aarch64_hard_regno_caller_save_mode): Return the original mode
2626         for predicates.
2627         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
2628         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
2629         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
2630         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
2631         functions.
2632         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
2633         does not overlap dest if the function is frame-related.  Handle
2634         SVE constants.
2635         (aarch64_split_add_offset): New function.
2636         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
2637         them aarch64_add_offset.
2638         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
2639         and update call to aarch64_sub_sp.
2640         (aarch64_add_cfa_expression): New function.
2641         (aarch64_expand_prologue): Pass extra temporary registers to the
2642         functions above.  Handle the case in which we need to emit new
2643         DW_CFA_expressions for registers that were originally saved
2644         relative to the stack pointer, but now have to be expressed
2645         relative to the frame pointer.
2646         (aarch64_output_mi_thunk): Pass extra temporary registers to the
2647         functions above.
2648         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
2649         IP0 and IP1 values for SVE frames.
2650         (aarch64_expand_vec_series): New function.
2651         (aarch64_expand_sve_widened_duplicate): Likewise.
2652         (aarch64_expand_sve_const_vector): Likewise.
2653         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
2654         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
2655         into the register, rather than emitting a SET directly.
2656         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
2657         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
2658         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
2659         (offset_9bit_signed_scaled_p): New functions.
2660         (aarch64_replicate_bitmask_imm): New function.
2661         (aarch64_bitmask_imm): Use it.
2662         (aarch64_cannot_force_const_mem): Reject expressions involving
2663         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
2664         (aarch64_classify_index): Handle SVE indices, by requiring
2665         a plain register index with a scale that matches the element size.
2666         (aarch64_classify_address): Handle SVE addresses.  Assert that
2667         the mode of the address is VOIDmode or an integer mode.
2668         Update call to aarch64_classify_symbol.
2669         (aarch64_classify_symbolic_expression): Update call to
2670         aarch64_classify_symbol.
2671         (aarch64_const_vec_all_in_range_p): New function.
2672         (aarch64_print_vector_float_operand): Likewise.
2673         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
2674         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
2675         and the FP immediates 1.0 and 0.5.
2676         (aarch64_print_address_internal): Handle SVE addresses.
2677         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
2678         (aarch64_regno_regclass): Handle predicate registers.
2679         (aarch64_secondary_reload): Handle big-endian reloads of SVE
2680         data modes.
2681         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
2682         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
2683         (aarch64_convert_sve_vector_bits): New function.
2684         (aarch64_override_options): Use it to handle -msve-vector-bits=.
2685         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2686         rather than an rtx.
2687         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
2688         Handle SVE vector and predicate modes.  Accept VL-based constants
2689         that need only one temporary register, and VL offsets that require
2690         no temporary registers.
2691         (aarch64_conditional_register_usage): Mark the predicate registers
2692         as fixed if SVE isn't available.
2693         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
2694         Return true for SVE vector and predicate modes.
2695         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
2696         rather than an unsigned int.  Handle SVE modes.
2697         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
2698         SVE modes.
2699         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
2700         if SVE is enabled.
2701         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2702         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2703         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2704         (aarch64_sve_float_mul_immediate_p): New functions.
2705         (aarch64_sve_valid_immediate): New function.
2706         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
2707         Explicitly reject structure modes.  Check for INDEX constants.
2708         Handle PTRUE and PFALSE constants.
2709         (aarch64_check_zero_based_sve_index_immediate): New function.
2710         (aarch64_simd_imm_zero_p): Delete.
2711         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
2712         vector modes.  Accept constants in the range of CNT[BHWD].
2713         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
2714         ask for an Advanced SIMD mode.
2715         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
2716         (aarch64_simd_vector_alignment): Handle SVE predicates.
2717         (aarch64_vectorize_preferred_vector_alignment): New function.
2718         (aarch64_simd_vector_alignment_reachable): Use it instead of
2719         the vector size.
2720         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
2721         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
2722         functions.
2723         (MAX_VECT_LEN): Delete.
2724         (expand_vec_perm_d): Add a vec_flags field.
2725         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
2726         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
2727         (aarch64_evpc_ext): Don't apply a big-endian lane correction
2728         for SVE modes.
2729         (aarch64_evpc_rev): Rename to...
2730         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
2731         (aarch64_evpc_rev_global): New function.
2732         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
2733         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
2734         MAX_VECT_LEN.
2735         (aarch64_evpc_sve_tbl): New function.
2736         (aarch64_expand_vec_perm_const_1): Update after rename of
2737         aarch64_evpc_rev.  Handle SVE permutes too, trying
2738         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
2739         than aarch64_evpc_tbl.
2740         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
2741         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
2742         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
2743         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
2744         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
2745         (aarch64_expand_sve_vcond): New functions.
2746         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
2747         of aarch64_vector_mode_p.
2748         (aarch64_dwarf_poly_indeterminate_value): New function.
2749         (aarch64_compute_pressure_classes): Likewise.
2750         (aarch64_can_change_mode_class): Likewise.
2751         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
2752         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
2753         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
2754         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
2755         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
2756         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
2757         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
2758         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
2759         constraints.
2760         (Dn, Dl, Dr): Accept const as well as const_vector.
2761         (Dz): Likewise.  Compare against CONST0_RTX.
2762         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
2763         of "vector" where appropriate.
2764         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
2765         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
2766         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
2767         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
2768         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
2769         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
2770         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
2771         (v_int_equiv): Extend to SVE modes.
2772         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
2773         mode attributes.
2774         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
2775         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
2776         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
2777         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
2778         (SVE_COND_FP_CMP): New int iterators.
2779         (perm_hilo): Handle the new unpack unspecs.
2780         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
2781         attributes.
2782         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
2783         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
2784         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
2785         (aarch64_equality_operator, aarch64_constant_vector_operand)
2786         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
2787         (aarch64_sve_nonimmediate_operand): Likewise.
2788         (aarch64_sve_general_operand): Likewise.
2789         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
2790         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
2791         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
2792         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
2793         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
2794         (aarch64_sve_float_arith_immediate): Likewise.
2795         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
2796         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
2797         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
2798         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
2799         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
2800         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
2801         (aarch64_sve_float_arith_operand): Likewise.
2802         (aarch64_sve_float_arith_with_sub_operand): Likewise.
2803         (aarch64_sve_float_mul_operand): Likewise.
2804         (aarch64_sve_vec_perm_operand): Likewise.
2805         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
2806         (aarch64_mov_operand): Accept const_poly_int and const_vector.
2807         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
2808         as well as const_vector.
2809         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
2810         in file.  Use CONST0_RTX and CONSTM1_RTX.
2811         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
2812         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
2813         Use aarch64_simd_imm_zero.
2814         * config/aarch64/aarch64-sve.md: New file.
2815         * config/aarch64/aarch64.md: Include it.
2816         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
2817         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
2818         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
2819         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
2820         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
2821         (sve): New attribute.
2822         (enabled): Disable instructions with the sve attribute unless
2823         TARGET_SVE.
2824         (movqi, movhi): Pass CONST_POLY_INT operaneds through
2825         aarch64_expand_mov_immediate.
2826         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
2827         CNT[BHSD] immediates.
2828         (movti): Split CONST_POLY_INT moves into two halves.
2829         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
2830         Split additions that need a temporary here if the destination
2831         is the stack pointer.
2832         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
2833         (*add<mode>3_poly_1): New instruction.
2834         (set_clobber_cc): New expander.
2835
2836 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2837
2838         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
2839         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
2840         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
2841         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
2842         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
2843         Change innermode from fixed_mode_size to machine_mode.
2844         (simplify_subreg): Update call accordingly.  Handle a constant-sized
2845         subreg of a variable-length CONST_VECTOR.
2846
2847 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2848             Alan Hayward  <alan.hayward@arm.com>
2849             David Sherwood  <david.sherwood@arm.com>
2850
2851         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
2852         (add_offset_to_base): New function, split out from...
2853         (create_mem_ref): ...here.  When handling a scale other than 1,
2854         check first whether the address is valid without the offset.
2855         Add it into the base if so, leaving the index and scale as-is.
2856
2857 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
2858
2859         PR c++/83778
2860         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
2861         fold_for_warn before checking if arg2 is INTEGER_CST.
2862
2863 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
2864
2865         * config/rs6000/predicates.md (load_multiple_operation): Delete.
2866         (store_multiple_operation): Delete.
2867         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
2868         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
2869         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
2870         guarded by TARGET_STRING.
2871         (rs6000_output_load_multiple): Delete.
2872         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
2873         OPTION_MASK_STRING / TARGET_STRING handling.
2874         (print_operand) <'N', 'O'>: Add comment that these are unused now.
2875         (const rs6000_opt_masks) <"string">: Change mask to 0.
2876         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
2877         (MASK_STRING): Delete.
2878         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
2879         parts.  Simplify.
2880         (load_multiple): Delete.
2881         (*ldmsi8): Delete.
2882         (*ldmsi7): Delete.
2883         (*ldmsi6): Delete.
2884         (*ldmsi5): Delete.
2885         (*ldmsi4): Delete.
2886         (*ldmsi3): Delete.
2887         (store_multiple): Delete.
2888         (*stmsi8): Delete.
2889         (*stmsi7): Delete.
2890         (*stmsi6): Delete.
2891         (*stmsi5): Delete.
2892         (*stmsi4): Delete.
2893         (*stmsi3): Delete.
2894         (movmemsi_8reg): Delete.
2895         (corresponding unnamed define_insn): Delete.
2896         (movmemsi_6reg): Delete.
2897         (corresponding unnamed define_insn): Delete.
2898         (movmemsi_4reg): Delete.
2899         (corresponding unnamed define_insn): Delete.
2900         (movmemsi_2reg): Delete.
2901         (corresponding unnamed define_insn): Delete.
2902         (movmemsi_1reg): Delete.
2903         (corresponding unnamed define_insn): Delete.
2904         * config/rs6000/rs6000.opt (mno-string): New.
2905         (mstring): Replace by deprecation warning stub.
2906         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
2907
2908 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
2909
2910         * regrename.c (regrename_do_replace): If replacing the same
2911         reg multiple times, try to reuse last created gen_raw_REG.
2912
2913         PR debug/81155
2914         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
2915         main to workaround a bug in GDB.
2916
2917 2018-01-12  Tom de Vries  <tom@codesourcery.com>
2918
2919         PR target/83737
2920         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
2921
2922 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
2923
2924         PR rtl-optimization/80481
2925         * ira-color.c (get_cap_member): New function.
2926         (allocnos_conflict_by_live_ranges_p): Use it.
2927         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
2928         (setup_slot_coalesced_allocno_live_ranges): Ditto.
2929
2930 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
2931
2932         PR target/83628
2933         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
2934         (*saddl_se_1): Ditto.
2935         (*ssubsi_1): Ditto.
2936         (*ssubl_se_1): Ditto.
2937
2938 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2939
2940         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
2941         rather than wi::to_widest for DR_INITs.
2942         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
2943         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
2944         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
2945         INTEGER_CSTs.
2946         (vect_analyze_group_access_1): Note that here.
2947
2948 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2949
2950         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
2951         polynomial type sizes.
2952
2953 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2954
2955         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
2956         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
2957         (gimple_add_tmp_var): Likewise.
2958
2959 2018-01-12  Martin Liska  <mliska@suse.cz>
2960
2961         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
2962         (gimple_alloc_sizes): Likewise.
2963         (dump_gimple_statistics): Use PRIu64 in printf format.
2964         * gimple.h: Change uint64_t to int.
2965
2966 2018-01-12  Martin Liska  <mliska@suse.cz>
2967
2968         * tree-core.h: Use uint64_t instead of int.
2969         * tree.c (tree_node_counts): Likewise.
2970         (tree_node_sizes): Likewise.
2971         (dump_tree_statistics): Use PRIu64 in printf format.
2972
2973 2018-01-12  Martin Liska  <mliska@suse.cz>
2974
2975         * Makefile.in: As qsort_chk is implemented in vec.c, add
2976         vec.o to linkage of gencfn-macros.
2977         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
2978         passing the info to record_node_allocation_statistics.
2979         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
2980         and pass the info.
2981         * ggc-common.c (struct ggc_usage): Add operator== and use
2982         it in operator< and compare function.
2983         * mem-stats.h (struct mem_usage): Likewise.
2984         * vec.c (struct vec_usage): Remove operator< and compare
2985         function. Can be simply inherited.
2986
2987 2018-01-12  Martin Jambor  <mjambor@suse.cz>
2988
2989         PR target/81616
2990         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
2991         * tree-ssa-math-opts.c: Include domwalk.h.
2992         (convert_mult_to_fma_1): New function.
2993         (fma_transformation_info): New type.
2994         (fma_deferring_state): Likewise.
2995         (cancel_fma_deferring): New function.
2996         (result_of_phi): Likewise.
2997         (last_fma_candidate_feeds_initial_phi): Likewise.
2998         (convert_mult_to_fma): Added deferring logic, split actual
2999         transformation to convert_mult_to_fma_1.
3000         (math_opts_dom_walker): New type.
3001         (math_opts_dom_walker::after_dom_children): New method, body moved
3002         here from pass_optimize_widening_mul::execute, added deferring logic
3003         bits.
3004         (pass_optimize_widening_mul::execute): Moved most of code to
3005         math_opts_dom_walker::after_dom_children.
3006         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
3007         * config/i386/i386.c (ix86_option_override_internal): Added
3008         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
3009
3010 2018-01-12  Richard Biener  <rguenther@suse.de>
3011
3012         PR debug/83157
3013         * dwarf2out.c (gen_variable_die): Do not reset old_die for
3014         inline instance vars.
3015
3016 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
3017
3018         PR target/81819
3019         * config/rx/rx.c (rx_is_restricted_memory_address):
3020         Handle SUBREG case.
3021
3022 2018-01-12  Richard Biener  <rguenther@suse.de>
3023
3024         PR tree-optimization/80846
3025         * target.def (split_reduction): New target hook.
3026         * targhooks.c (default_split_reduction): New function.
3027         * targhooks.h (default_split_reduction): Declare.
3028         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
3029         target requests first reduce vectors by combining low and high
3030         parts.
3031         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
3032         (get_vectype_for_scalar_type_and_size): Export.
3033         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
3034         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
3035         * doc/tm.texi: Regenerate.
3036         * config/i386/i386.c (ix86_split_reduction): Implement
3037         TARGET_VECTORIZE_SPLIT_REDUCTION.
3038
3039 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
3040
3041         PR target/83368
3042         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
3043         in PIC mode except for TARGET_VXWORKS_RTP.
3044         * config/sparc/sparc.c: Include cfgrtl.h.
3045         (TARGET_INIT_PIC_REG): Define.
3046         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
3047         (sparc_pic_register_p): New predicate.
3048         (sparc_legitimate_address_p): Use it.
3049         (sparc_legitimize_pic_address): Likewise.
3050         (sparc_delegitimize_address): Likewise.
3051         (sparc_mode_dependent_address_p): Likewise.
3052         (gen_load_pcrel_sym): Remove 4th parameter.
3053         (load_got_register): Adjust call to above.  Remove obsolete stuff.
3054         (sparc_expand_prologue): Do not call load_got_register here.
3055         (sparc_flat_expand_prologue): Likewise.
3056         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
3057         (sparc_use_pseudo_pic_reg): New function.
3058         (sparc_init_pic_reg): Likewise.
3059         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
3060         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
3061
3062 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
3063
3064         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
3065         Add item for branch_cost.
3066
3067 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
3068
3069         PR rtl-optimization/83565
3070         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
3071         not extend the result to a larger mode for rotate operations.
3072         (num_sign_bit_copies1): Likewise.
3073
3074 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
3075
3076         PR target/40411
3077         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
3078         -symbolic.
3079         Use values-Xc.o for -pedantic.
3080         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
3081
3082 2018-01-12  Martin Liska  <mliska@suse.cz>
3083
3084         PR ipa/83054
3085         * ipa-devirt.c (final_warning_record::grow_type_warnings):
3086         New function.
3087         (possible_polymorphic_call_targets): Use it.
3088         (ipa_devirt): Likewise.
3089
3090 2018-01-12  Martin Liska  <mliska@suse.cz>
3091
3092         * profile-count.h (enum profile_quality): Use 0 as invalid
3093         enum value of profile_quality.
3094
3095 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
3096
3097         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
3098         -mext-string options.
3099
3100 2018-01-12  Richard Biener  <rguenther@suse.de>
3101
3102         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
3103         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
3104         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
3105         Likewise.
3106         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
3107
3108 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
3109
3110         * configure.ac (--with-long-double-format): Add support for the
3111         configuration option to change the default long double format on
3112         PowerPC systems.
3113         * config.gcc (powerpc*-linux*-*): Likewise.
3114         * configure: Regenerate.
3115         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
3116         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
3117         used without modification.
3118
3119 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3120
3121         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
3122         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
3123         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
3124         MISC_BUILTIN_SPEC_BARRIER.
3125         (rs6000_init_builtins): Likewise.
3126         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
3127         enum value.
3128         (speculation_barrier): New define_insn.
3129         * doc/extend.texi: Document __builtin_speculation_barrier.
3130
3131 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
3132
3133         PR target/83203
3134         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
3135         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
3136         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
3137         iterators.
3138         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
3139         integral modes instead of "ss" and "sd".
3140         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
3141         vectors with 32-bit and 64-bit elements.
3142         (vecdupssescalarmodesuffix): New mode attribute.
3143         (vec_dup<mode>): Use it.
3144
3145 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
3146
3147         PR target/83330
3148         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
3149         frame if argument is passed on stack.
3150
3151 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
3152
3153         PR target/82682
3154         * ree.c (combine_reaching_defs): Optimize also
3155         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
3156         reg2=any_extend(exp); reg1=reg2;, formatting fix.
3157
3158 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
3159
3160         PR middle-end/83189
3161         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
3162
3163 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
3164
3165         PR middle-end/83718
3166         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
3167         after they are computed.
3168
3169 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
3170
3171         PR tree-optimization/83695
3172         * gimple-loop-linterchange.cc
3173         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
3174         reset cached scev information after interchange.
3175         (pass_linterchange::execute): Remove call to scev_reset_htab.
3176
3177 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3178
3179         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
3180         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
3181         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
3182         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
3183         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
3184         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
3185         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
3186         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
3187         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
3188         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
3189         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
3190         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
3191         (V_lane_reg): Likewise.
3192         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
3193         New define_expand.
3194         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
3195         (vfmal_lane_low<mode>_intrinsic,
3196         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
3197         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
3198         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
3199         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
3200         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
3201         vfmsl_lane_high<mode>_intrinsic): New define_insns.
3202
3203 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3204
3205         * config/arm/arm-cpus.in (fp16fml): New feature.
3206         (ALL_SIMD): Add fp16fml.
3207         (armv8.2-a): Add fp16fml as an option.
3208         (armv8.3-a): Likewise.
3209         (armv8.4-a): Add fp16fml as part of fp16.
3210         * config/arm/arm.h (TARGET_FP16FML): Define.
3211         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
3212         when appropriate.
3213         * config/arm/arm-modes.def (V2HF): Define.
3214         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
3215         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
3216         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
3217         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
3218         vfmsl_low, vfmsl_high): New set of builtins.
3219         * config/arm/iterators.md (PLUSMINUS): New code iterator.
3220         (vfml_op): New code attribute.
3221         (VFMLHALVES): New int iterator.
3222         (VFML, VFMLSEL): New mode attributes.
3223         (V_reg): Define mapping for V2HF.
3224         (V_hi, V_lo): New mode attributes.
3225         (VF_constraint): Likewise.
3226         (vfml_half, vfml_half_selector): New int attributes.
3227         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
3228         define_expand.
3229         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
3230         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
3231         New define_insn.
3232         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
3233         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
3234         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
3235         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
3236         documentation.
3237         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
3238         Document new effective target and option set.
3239
3240 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3241
3242         * config/arm/arm-cpus.in (armv8_4): New feature.
3243         (ARMv8_4a): New fgroup.
3244         (armv8.4-a): New arch.
3245         * config/arm/arm-tables.opt: Regenerate.
3246         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
3247         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
3248         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
3249         Add matching rules for -march=armv8.4-a and extensions.
3250         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
3251
3252 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
3253
3254         PR target/81821
3255         * config/rx/rx.md (BW): New mode attribute.
3256         (sync_lock_test_and_setsi): Add mode suffix to insn output.
3257
3258 2018-01-11  Richard Biener  <rguenther@suse.de>
3259
3260         PR tree-optimization/83435
3261         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
3262         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
3263         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
3264
3265 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3266             Alan Hayward  <alan.hayward@arm.com>
3267             David Sherwood  <david.sherwood@arm.com>
3268
3269         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
3270         field.
3271         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
3272         (aarch64_print_address_internal): Use it to check for a zero offset.
3273
3274 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3275             Alan Hayward  <alan.hayward@arm.com>
3276             David Sherwood  <david.sherwood@arm.com>
3277
3278         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
3279         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
3280         Return a poly_int64 rather than a HOST_WIDE_INT.
3281         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
3282         rather than a HOST_WIDE_INT.
3283         * config/aarch64/aarch64.h (aarch64_frame): Protect with
3284         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
3285         hard_fp_offset, frame_size, initial_adjust, callee_offset and
3286         final_offset from HOST_WIDE_INT to poly_int64.
3287         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
3288         to_constant when getting the number of units in an Advanced SIMD
3289         mode.
3290         (aarch64_builtin_vectorized_function): Check for a constant number
3291         of units.
3292         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
3293         GET_MODE_SIZE.
3294         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
3295         attribute instead of GET_MODE_NUNITS.
3296         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
3297         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
3298         GET_MODE_SIZE for fixed-size registers.
3299         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
3300         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
3301         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
3302         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
3303         (aarch64_print_operand, aarch64_print_address_internal)
3304         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
3305         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
3306         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
3307         Handle polynomial GET_MODE_SIZE.
3308         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
3309         wider than SImode without modification.
3310         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
3311         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
3312         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
3313         passing and returning SVE modes.
3314         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
3315         rather than GEN_INT.
3316         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
3317         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
3318         (aarch64_allocate_and_probe_stack_space): Likewise.
3319         (aarch64_layout_frame): Cope with polynomial offsets.
3320         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
3321         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
3322         polynomial offsets.
3323         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
3324         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
3325         poly_int64 rather than a HOST_WIDE_INT.
3326         (aarch64_get_separate_components, aarch64_process_components)
3327         (aarch64_expand_prologue, aarch64_expand_epilogue)
3328         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
3329         (aarch64_anchor_offset): New function, split out from...
3330         (aarch64_legitimize_address): ...here.
3331         (aarch64_builtin_vectorization_cost): Handle polynomial
3332         TYPE_VECTOR_SUBPARTS.
3333         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
3334         GET_MODE_NUNITS.
3335         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
3336         number of elements from the PARALLEL rather than the mode.
3337         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
3338         rather than GET_MODE_BITSIZE.
3339         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
3340         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
3341         (aarch64_expand_vec_perm_const_1): Handle polynomial
3342         d->perm.length () and d->perm elements.
3343         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
3344         Apply to_constant to d->perm elements.
3345         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
3346         polynomial CONST_VECTOR_NUNITS.
3347         (aarch64_move_pointer): Take amount as a poly_int64 rather
3348         than an int.
3349         (aarch64_progress_pointer): Avoid temporary variable.
3350         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
3351         the mode attribute instead of GET_MODE.
3352
3353 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3354             Alan Hayward  <alan.hayward@arm.com>
3355             David Sherwood  <david.sherwood@arm.com>
3356
3357         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
3358         x exists before using it.
3359         (aarch64_add_constant_internal): Rename to...
3360         (aarch64_add_offset_1): ...this.  Replace regnum with separate
3361         src and dest rtxes.  Handle the case in which they're different,
3362         including when the offset is zero.  Replace scratchreg with an rtx.
3363         Use 2 additions if there is no spare register into which we can
3364         move a 16-bit constant.
3365         (aarch64_add_constant): Delete.
3366         (aarch64_add_offset): Replace reg with separate src and dest
3367         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
3368         Use aarch64_add_offset_1.
3369         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
3370         an rtx rather than an int.  Take the delta as a poly_int64
3371         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
3372         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
3373         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
3374         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
3375         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
3376         and aarch64_add_sp.
3377         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
3378         aarch64_add_constant.
3379
3380 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3381
3382         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
3383         Use scalar_float_mode.
3384
3385 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3386
3387         * config/aarch64/aarch64-simd.md
3388         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
3389         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
3390         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
3391         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
3392         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
3393         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
3394         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
3395         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
3396         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
3397         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
3398
3399 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3400
3401         PR target/83514
3402         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
3403         targ_options->x_arm_arch_string is non NULL.
3404
3405 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
3406
3407         * config/aarch64/aarch64.h
3408         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
3409
3410 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
3411
3412         PR target/82096
3413         * expmed.c (emit_store_flag_force): Swap if const op0
3414         and change VOIDmode to mode of op0.
3415
3416 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3417
3418         PR rtl-optimization/83761
3419         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
3420         than bytes to mode_for_size.
3421
3422 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3423
3424         PR middle-end/83189
3425         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
3426         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
3427         profile.
3428
3429 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3430
3431         PR middle-end/83575
3432         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
3433         when in layout mode.
3434         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
3435         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
3436         partition fixup.
3437
3438 2018-01-10  Michael Collison  <michael.collison@arm.com>
3439
3440         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
3441         * config/aarch64/aarch64-option-extension.def: Add
3442         AARCH64_OPT_EXTENSION of 'fp16fml'.
3443         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3444         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
3445         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
3446         * config/aarch64/constraints.md (Ui7): New constraint.
3447         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
3448         (VFMLA_SEL_W): Ditto.
3449         (f16quad): Ditto.
3450         (f16mac1): Ditto.
3451         (VFMLA16_LOW): New int iterator.
3452         (VFMLA16_HIGH): Ditto.
3453         (UNSPEC_FMLAL): New unspec.
3454         (UNSPEC_FMLSL): Ditto.
3455         (UNSPEC_FMLAL2): Ditto.
3456         (UNSPEC_FMLSL2): Ditto.
3457         (f16mac): New code attribute.
3458         * config/aarch64/aarch64-simd-builtins.def
3459         (aarch64_fmlal_lowv2sf): Ditto.
3460         (aarch64_fmlsl_lowv2sf): Ditto.
3461         (aarch64_fmlalq_lowv4sf): Ditto.
3462         (aarch64_fmlslq_lowv4sf): Ditto.
3463         (aarch64_fmlal_highv2sf): Ditto.
3464         (aarch64_fmlsl_highv2sf): Ditto.
3465         (aarch64_fmlalq_highv4sf): Ditto.
3466         (aarch64_fmlslq_highv4sf): Ditto.
3467         (aarch64_fmlal_lane_lowv2sf): Ditto.
3468         (aarch64_fmlsl_lane_lowv2sf): Ditto.
3469         (aarch64_fmlal_laneq_lowv2sf): Ditto.
3470         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
3471         (aarch64_fmlalq_lane_lowv4sf): Ditto.
3472         (aarch64_fmlsl_lane_lowv4sf): Ditto.
3473         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
3474         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
3475         (aarch64_fmlal_lane_highv2sf): Ditto.
3476         (aarch64_fmlsl_lane_highv2sf): Ditto.
3477         (aarch64_fmlal_laneq_highv2sf): Ditto.
3478         (aarch64_fmlsl_laneq_highv2sf): Ditto.
3479         (aarch64_fmlalq_lane_highv4sf): Ditto.
3480         (aarch64_fmlsl_lane_highv4sf): Ditto.
3481         (aarch64_fmlalq_laneq_highv4sf): Ditto.
3482         (aarch64_fmlsl_laneq_highv4sf): Ditto.
3483         * config/aarch64/aarch64-simd.md:
3484         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
3485         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3486         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
3487         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3488         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
3489         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
3490         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
3491         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
3492         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
3493         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
3494         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
3495         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
3496         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
3497         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
3498         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
3499         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
3500         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
3501         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
3502         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
3503         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
3504         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
3505         (vfmlsl_low_u32): Ditto.
3506         (vfmlalq_low_u32): Ditto.
3507         (vfmlslq_low_u32): Ditto.
3508         (vfmlal_high_u32): Ditto.
3509         (vfmlsl_high_u32): Ditto.
3510         (vfmlalq_high_u32): Ditto.
3511         (vfmlslq_high_u32): Ditto.
3512         (vfmlal_lane_low_u32): Ditto.
3513         (vfmlsl_lane_low_u32): Ditto.
3514         (vfmlal_laneq_low_u32): Ditto.
3515         (vfmlsl_laneq_low_u32): Ditto.
3516         (vfmlalq_lane_low_u32): Ditto.
3517         (vfmlslq_lane_low_u32): Ditto.
3518         (vfmlalq_laneq_low_u32): Ditto.
3519         (vfmlslq_laneq_low_u32): Ditto.
3520         (vfmlal_lane_high_u32): Ditto.
3521         (vfmlsl_lane_high_u32): Ditto.
3522         (vfmlal_laneq_high_u32): Ditto.
3523         (vfmlsl_laneq_high_u32): Ditto.
3524         (vfmlalq_lane_high_u32): Ditto.
3525         (vfmlslq_lane_high_u32): Ditto.
3526         (vfmlalq_laneq_high_u32): Ditto.
3527         (vfmlslq_laneq_high_u32): Ditto.
3528         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
3529         (AARCH64_FL_FOR_ARCH8_4): New.
3530         (AARCH64_ISA_F16FML): New ISA flag.
3531         (TARGET_F16FML): New feature flag for fp16fml.
3532         (doc/invoke.texi): Document new fp16fml option.
3533
3534 2018-01-10  Michael Collison  <michael.collison@arm.com>
3535
3536         * config/aarch64/aarch64-builtins.c:
3537         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
3538         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3539         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
3540         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
3541         (AARCH64_ISA_SHA3): New ISA flag.
3542         (TARGET_SHA3): New feature flag for sha3.
3543         * config/aarch64/iterators.md (sha512_op): New int attribute.
3544         (CRYPTO_SHA512): New int iterator.
3545         (UNSPEC_SHA512H): New unspec.
3546         (UNSPEC_SHA512H2): Ditto.
3547         (UNSPEC_SHA512SU0): Ditto.
3548         (UNSPEC_SHA512SU1): Ditto.
3549         * config/aarch64/aarch64-simd-builtins.def
3550         (aarch64_crypto_sha512hqv2di): New builtin.
3551         (aarch64_crypto_sha512h2qv2di): Ditto.
3552         (aarch64_crypto_sha512su0qv2di): Ditto.
3553         (aarch64_crypto_sha512su1qv2di): Ditto.
3554         (aarch64_eor3qv8hi): Ditto.
3555         (aarch64_rax1qv2di): Ditto.
3556         (aarch64_xarqv2di): Ditto.
3557         (aarch64_bcaxqv8hi): Ditto.
3558         * config/aarch64/aarch64-simd.md:
3559         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
3560         (aarch64_crypto_sha512su0qv2di): Ditto.
3561         (aarch64_crypto_sha512su1qv2di): Ditto.
3562         (aarch64_eor3qv8hi): Ditto.
3563         (aarch64_rax1qv2di): Ditto.
3564         (aarch64_xarqv2di): Ditto.
3565         (aarch64_bcaxqv8hi): Ditto.
3566         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
3567         (vsha512h2q_u64): Ditto.
3568         (vsha512su0q_u64): Ditto.
3569         (vsha512su1q_u64): Ditto.
3570         (veor3q_u16): Ditto.
3571         (vrax1q_u64): Ditto.
3572         (vxarq_u64): Ditto.
3573         (vbcaxq_u16): Ditto.
3574         * config/arm/types.md (crypto_sha512): New type attribute.
3575         (crypto_sha3): Ditto.
3576         (doc/invoke.texi): Document new sha3 option.
3577
3578 2018-01-10  Michael Collison  <michael.collison@arm.com>
3579
3580         * config/aarch64/aarch64-builtins.c:
3581         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
3582         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3583         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
3584         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
3585         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
3586         (AARCH64_ISA_SM4): New ISA flag.
3587         (TARGET_SM4): New feature flag for sm4.
3588         * config/aarch64/aarch64-simd-builtins.def
3589         (aarch64_sm3ss1qv4si): Ditto.
3590         (aarch64_sm3tt1aq4si): Ditto.
3591         (aarch64_sm3tt1bq4si): Ditto.
3592         (aarch64_sm3tt2aq4si): Ditto.
3593         (aarch64_sm3tt2bq4si): Ditto.
3594         (aarch64_sm3partw1qv4si): Ditto.
3595         (aarch64_sm3partw2qv4si): Ditto.
3596         (aarch64_sm4eqv4si): Ditto.
3597         (aarch64_sm4ekeyqv4si): Ditto.
3598         * config/aarch64/aarch64-simd.md:
3599         (aarch64_sm3ss1qv4si): Ditto.
3600         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
3601         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
3602         (aarch64_sm4eqv4si): Ditto.
3603         (aarch64_sm4ekeyqv4si): Ditto.
3604         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
3605         (sm3part_op): Ditto.
3606         (CRYPTO_SM3TT): Ditto.
3607         (CRYPTO_SM3PART): Ditto.
3608         (UNSPEC_SM3SS1): New unspec.
3609         (UNSPEC_SM3TT1A): Ditto.
3610         (UNSPEC_SM3TT1B): Ditto.
3611         (UNSPEC_SM3TT2A): Ditto.
3612         (UNSPEC_SM3TT2B): Ditto.
3613         (UNSPEC_SM3PARTW1): Ditto.
3614         (UNSPEC_SM3PARTW2): Ditto.
3615         (UNSPEC_SM4E): Ditto.
3616         (UNSPEC_SM4EKEY): Ditto.
3617         * config/aarch64/constraints.md (Ui2): New constraint.
3618         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
3619         * config/arm/types.md (crypto_sm3): New type attribute.
3620         (crypto_sm4): Ditto.
3621         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
3622         (vsm3tt1aq_u32): Ditto.
3623         (vsm3tt1bq_u32): Ditto.
3624         (vsm3tt2aq_u32): Ditto.
3625         (vsm3tt2bq_u32): Ditto.
3626         (vsm3partw1q_u32): Ditto.
3627         (vsm3partw2q_u32): Ditto.
3628         (vsm4eq_u32): Ditto.
3629         (vsm4ekeyq_u32): Ditto.
3630         (doc/invoke.texi): Document new sm4 option.
3631
3632 2018-01-10  Michael Collison  <michael.collison@arm.com>
3633
3634         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
3635         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
3636         (AARCH64_FL_FOR_ARCH8_4): New.
3637         (AARCH64_FL_V8_4): New flag.
3638         (doc/invoke.texi): Document new armv8.4-a option.
3639
3640 2018-01-10  Michael Collison  <michael.collison@arm.com>
3641
3642         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3643         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
3644         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
3645         * config/aarch64/aarch64-option-extension.def: Add
3646         AARCH64_OPT_EXTENSION of 'sha2'.
3647         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
3648         (crypto): Disable sha2 and aes if crypto disabled.
3649         (crypto): Enable aes and sha2 if enabled.
3650         (simd): Disable sha2 and aes if simd disabled.
3651         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
3652         New flags.
3653         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
3654         (TARGET_SHA2): New feature flag for sha2.
3655         (TARGET_AES): New feature flag for aes.
3656         * config/aarch64/aarch64-simd.md:
3657         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
3658         conditional on TARGET_AES.
3659         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
3660         (aarch64_crypto_sha1hsi): Make pattern conditional
3661         on TARGET_SHA2.
3662         (aarch64_crypto_sha1hv4si): Ditto.
3663         (aarch64_be_crypto_sha1hv4si): Ditto.
3664         (aarch64_crypto_sha1su1v4si): Ditto.
3665         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
3666         (aarch64_crypto_sha1su0v4si): Ditto.
3667         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
3668         (aarch64_crypto_sha256su0v4si): Ditto.
3669         (aarch64_crypto_sha256su1v4si): Ditto.
3670         (doc/invoke.texi): Document new aes and sha2 options.
3671
3672 2018-01-10  Martin Sebor  <msebor@redhat.com>
3673
3674         PR tree-optimization/83781
3675         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
3676         as string arrays.
3677
3678 2018-01-11  Martin Sebor  <msebor@gmail.com>
3679             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3680
3681         PR tree-optimization/83501
3682         PR tree-optimization/81703
3683
3684         * tree-ssa-strlen.c (get_string_cst): Rename...
3685         (get_string_len): ...to this.  Handle global constants.
3686         (handle_char_store): Adjust.
3687
3688 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
3689             Jim Wilson  <jimw@sifive.com>
3690
3691         * config/riscv/riscv-protos.h (riscv_output_return): New.
3692         * config/riscv/riscv.c (struct machine_function): New naked_p field.
3693         (riscv_attribute_table, riscv_output_return),
3694         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
3695         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
3696         (riscv_compute_frame_info): Only compute frame->mask if not a naked
3697         function.
3698         (riscv_expand_prologue): Add early return for naked function.
3699         (riscv_expand_epilogue): Likewise.
3700         (riscv_function_ok_for_sibcall): Return false for naked function.
3701         (riscv_set_current_function): New.
3702         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
3703         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
3704         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
3705         * doc/extend.texi (RISC-V Function Attributes): New.
3706
3707 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
3708
3709         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
3710         check for 128-bit long double before checking TCmode.
3711         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
3712         128-bit long doubles before checking TFmode or TCmode.
3713         (FLOAT128_IBM_P): Likewise.
3714
3715 2018-01-10  Martin Sebor  <msebor@redhat.com>
3716
3717         PR tree-optimization/83671
3718         * builtins.c (c_strlen): Unconditionally return zero for the empty
3719         string.
3720         Use -Warray-bounds for warnings.
3721         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
3722         for non-constant array indices with COMPONENT_REF, arrays of
3723         arrays, and pointers to arrays.
3724         (gimple_fold_builtin_strlen): Determine and set length range for
3725         non-constant character arrays.
3726
3727 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
3728
3729         PR middle-end/81897
3730         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
3731         empty blocks.
3732
3733 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
3734
3735         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
3736
3737 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3738
3739         PR target/83399
3740         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
3741         VECTOR_MEM_ALTIVEC_OR_VSX_P.
3742         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
3743         indexed_or_indirect_operand predicate.
3744         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
3745         (*vsx_le_perm_load_v8hi): Likewise.
3746         (*vsx_le_perm_load_v16qi): Likewise.
3747         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
3748         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
3749         (*vsx_le_perm_store_v8hi): Likewise.
3750         (*vsx_le_perm_store_v16qi): Likewise.
3751         (eight unnamed splitters): Likewise.
3752
3753 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3754
3755         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
3756         * config/rs6000/emmintrin.h: Likewise.
3757         * config/rs6000/mmintrin.h: Likewise.
3758         * config/rs6000/xmmintrin.h: Likewise.
3759
3760 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
3761
3762         PR c++/43486
3763         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
3764         "public_flag".
3765         * tree.c (tree_nop_conversion): Return true for location wrapper
3766         nodes.
3767         (maybe_wrap_with_location): New function.
3768         (selftest::check_strip_nops): New function.
3769         (selftest::test_location_wrappers): New function.
3770         (selftest::tree_c_tests): Call it.
3771         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
3772         (maybe_wrap_with_location): New decl.
3773         (EXPR_LOCATION_WRAPPER_P): New macro.
3774         (location_wrapper_p): New inline function.
3775         (tree_strip_any_location_wrapper): New inline function.
3776
3777 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
3778
3779         PR target/83735
3780         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
3781         stack_realign_offset for the largest alignment of stack slot
3782         actually used.
3783         (ix86_find_max_used_stack_alignment): New function.
3784         (ix86_finalize_stack_frame_flags): Use it.  Set
3785         max_used_stack_alignment if we don't realign stack.
3786         * config/i386/i386.h (machine_function): Add
3787         max_used_stack_alignment.
3788
3789 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
3790
3791         * config/arm/arm.opt (-mbranch-cost): New option.
3792         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
3793         account.
3794
3795 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
3796
3797         PR target/83629
3798         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
3799         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
3800
3801 2018-01-10  Richard Biener  <rguenther@suse.de>
3802
3803         PR debug/83765
3804         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
3805         early out so it also covers the case where we have a non-NULL
3806         origin.
3807
3808 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
3809
3810         PR tree-optimization/83753
3811         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
3812         for non-strided grouped accesses if the number of elements is 1.
3813
3814 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3815
3816         PR target/81616
3817         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
3818         * i386.h (TARGET_USE_GATHER): Define.
3819         * x86-tune.def (X86_TUNE_USE_GATHER): New.
3820
3821 2018-01-10  Martin Liska  <mliska@suse.cz>
3822
3823         PR bootstrap/82831
3824         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
3825         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
3826         partitioning.
3827         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
3828         CLEANUP_NO_PARTITIONING is not set.
3829
3830 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
3831
3832         * doc/rtl.texi: Remove documentation of (const ...) wrappers
3833         for vectors, as a partial revert of r254296.
3834         * rtl.h (const_vec_p): Delete.
3835         (const_vec_duplicate_p): Don't test for vector CONSTs.
3836         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
3837         * expmed.c (make_tree): Likewise.
3838
3839         Revert:
3840         * common.md (E, F): Use CONSTANT_P instead of checking for
3841         CONST_VECTOR.
3842         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
3843         checking for CONST_VECTOR.
3844
3845 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3846
3847         PR middle-end/83575
3848         * predict.c (force_edge_cold): Handle in more sane way edges
3849         with no prediction.
3850
3851 2018-01-09  Carl Love  <cel@us.ibm.com>
3852
3853         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
3854         V4SI, V4SF types.
3855         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
3856         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
3857         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
3858         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
3859         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
3860         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
3861         * config/rs6000/rs6000-protos.h: Add extern defition for
3862         rs6000_generate_float2_double_code.
3863         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
3864         function.
3865         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
3866         (float2_v2df): Add define_expand.
3867
3868 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
3869
3870         PR target/83628
3871         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
3872         op_mode in the force_to_mode call.
3873
3874 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3875
3876         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
3877         instead of checking each element individually.
3878         (aarch64_evpc_uzp): Likewise.
3879         (aarch64_evpc_zip): Likewise.
3880         (aarch64_evpc_ext): Likewise.
3881         (aarch64_evpc_rev): Likewise.
3882         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
3883         instead of checking each element individually.  Return true without
3884         generating rtl if
3885         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
3886         whether all selected elements come from the same input, instead of
3887         checking each element individually.  Remove calls to gen_rtx_REG,
3888         start_sequence and end_sequence and instead assert that no rtl is
3889         generated.
3890
3891 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3892
3893         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
3894         order of HIGH and CONST checks.
3895
3896 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3897
3898         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
3899         if the destination isn't an SSA_NAME.
3900
3901 2018-01-09  Richard Biener  <rguenther@suse.de>
3902
3903         PR tree-optimization/83668
3904         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
3905         move prologue...
3906         (canonicalize_loop_form): ... here, renamed from ...
3907         (canonicalize_loop_closed_ssa_form): ... this and amended to
3908         swap successor edges for loop exit blocks to make us use
3909         the RPO order we need for initial schedule generation.
3910
3911 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
3912
3913         PR tree-optimization/64811
3914         * match.pd: When optimizing comparisons with Inf, avoid
3915         introducing or losing exceptions from comparisons with NaN.
3916
3917 2018-01-09  Martin Liska  <mliska@suse.cz>
3918
3919         PR sanitizer/82517
3920         * asan.c (shadow_mem_size): Add gcc_assert.
3921
3922 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
3923
3924         Don't save registers in main().
3925
3926         PR target/83738
3927         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
3928         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
3929         * config/avr/avr.c (avr_set_current_function): Don't error if
3930         naked, OS_task or OS_main are specified at the same time.
3931         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
3932         OS_main.
3933         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
3934         attribute.
3935         * common/config/avr/avr-common.c (avr_option_optimization_table):
3936         Switch on -mmain-is-OS_task for optimizing compilations.
3937
3938 2018-01-09  Richard Biener  <rguenther@suse.de>
3939
3940         PR tree-optimization/83572
3941         * graphite.c: Include cfganal.h.
3942         (graphite_transform_loops): Connect infinite loops to exit
3943         and remove fake edges at the end.
3944
3945 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3946
3947         * ipa-inline.c (edge_badness): Revert accidental checkin.
3948
3949 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3950
3951         PR ipa/80763
3952         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
3953         symbols; not inline clones.
3954
3955 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
3956
3957         PR target/83507
3958         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
3959         hard registers.  Formatting fixes.
3960
3961         PR preprocessor/83722
3962         * gcc.c (try_generate_repro): Pass
3963         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
3964         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
3965         do_report_bug.
3966
3967 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
3968             Kito Cheng  <kito.cheng@gmail.com>
3969
3970         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
3971         (riscv_leaf_function_p): Delete.
3972         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
3973
3974 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3975
3976         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
3977         function.
3978         (do_ifelse): New function.
3979         (do_isel): New function.
3980         (do_sub3): New function.
3981         (do_add3): New function.
3982         (do_load_mask_compare): New function.
3983         (do_overlap_load_compare): New function.
3984         (expand_compare_loop): New function.
3985         (expand_block_compare): Call expand_compare_loop() when appropriate.
3986         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
3987         option description.
3988         (-mblock-compare-inline-loop-limit): New option.
3989
3990 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3991
3992         PR target/83677
3993         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
3994         Reverse order of second and third operands in first alternative.
3995         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
3996         of first and second elements in UNSPEC_VPERMR vector.
3997         (altivec_expand_vec_perm_le): Likewise.
3998
3999 2018-01-08  Jeff Law  <law@redhat.com>
4000
4001         PR rtl-optimizatin/81308
4002         * tree-switch-conversion.c (cfg_altered): New file scoped static.
4003         (process_switch): If group_case_labels makes a change, then set
4004         cfg_altered.
4005         (pass_convert_switch::execute): If a switch is converted, then
4006         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
4007
4008         PR rtl-optimization/81308
4009         * recog.c (split_all_insns): Conditionally cleanup the CFG after
4010         splitting insns.
4011
4012 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
4013
4014         PR target/83663 - Revert r255946
4015         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
4016         generation for cases where splatting a value is not useful.
4017         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
4018         across a vec_duplicate and a paradoxical subreg forming a vector
4019         mode to a vec_concat.
4020
4021 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
4022
4023         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
4024         -march=armv8.3-a variants.
4025         * config/arm/t-multilib: Likewise.
4026         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
4027
4028 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
4029
4030         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
4031         to generate rtl.
4032         (cceq_ior_compare_complement): Give it a name so I can use it, and
4033         change boolean_or_operator predicate to boolean_operator so it can
4034         be used to generate a crand.
4035         (eqne): New code iterator.
4036         (bd/bd_neg): New code_attrs.
4037         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
4038         a single define_insn.
4039         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
4040         decrement (bdnzt/bdnzf/bdzt/bdzf).
4041         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
4042         with the new names of the branch decrement patterns, and added the
4043         names of the branch decrement conditional patterns.
4044
4045 2018-01-08  Richard Biener  <rguenther@suse.de>
4046
4047         PR tree-optimization/83563
4048         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
4049         cache.
4050
4051 2018-01-08  Richard Biener  <rguenther@suse.de>
4052
4053         PR middle-end/83713
4054         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
4055
4056 2018-01-08  Richard Biener  <rguenther@suse.de>
4057
4058         PR tree-optimization/83685
4059         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
4060         references to abnormals.
4061
4062 2018-01-08  Richard Biener  <rguenther@suse.de>
4063
4064         PR lto/83719
4065         * dwarf2out.c (output_indirect_strings): Handle empty
4066         skeleton_debug_str_hash.
4067         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
4068
4069 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
4070
4071         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
4072         (emit_store_direct): Likewise.
4073         (arc_trampoline_adjust_address): Likewise.
4074         (arc_asm_trampoline_template): New function.
4075         (arc_initialize_trampoline): Use asm_trampoline_template.
4076         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
4077         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
4078         * config/arc/arc.md (flush_icache): Delete pattern.
4079
4080 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
4081
4082         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
4083         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
4084         munaligned-access.
4085
4086 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4087
4088         PR target/83681
4089         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
4090         by not USED_FOR_TARGET.
4091         (make_pass_resolve_sw_modes): Likewise.
4092
4093 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4094
4095         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
4096         USED_FOR_TARGET.
4097
4098 2018-01-08  Richard Biener  <rguenther@suse.de>
4099
4100         PR middle-end/83580
4101         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
4102
4103 2018-01-08  Richard Biener  <rguenther@suse.de>
4104
4105         PR middle-end/83517
4106         * match.pd ((t * 2) / 2) -> t): Add missing :c.
4107
4108 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
4109
4110         PR middle-end/81897
4111         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
4112         basic blocks with a small number of successors.
4113         (convert_control_dep_chain_into_preds): Improve handling of
4114         forwarder blocks.
4115         (dump_predicates): Split apart into...
4116         (dump_pred_chain): ...here...
4117         (dump_pred_info): ...and here.
4118         (can_one_predicate_be_invalidated_p): Add debugging printfs.
4119         (can_chain_union_be_invalidated_p): Improve check for invalidation
4120         of paths.
4121         (uninit_uses_cannot_happen): Avoid unnecessary if
4122         convert_control_dep_chain_into_preds yielded nothing.
4123
4124 2018-01-06  Martin Sebor  <msebor@redhat.com>
4125
4126         PR tree-optimization/83640
4127         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
4128         subtracting negative offset from size.
4129         (builtin_access::overlap): Adjust offset bounds of the access to fall
4130         within the size of the object if possible.
4131
4132 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
4133
4134         PR rtl-optimization/83699
4135         * expmed.c (extract_bit_field_1): Restrict the vector usage of
4136         extract_bit_field_as_subreg to cases in which the extracted
4137         value is also a vector.
4138
4139         * lra-constraints.c (process_alt_operands): Test for the equivalence
4140         substitutions when detecting a possible reload cycle.
4141
4142 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
4143
4144         PR debug/83480
4145         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
4146         by default if flag_selective_schedling{,2}.  Formatting fixes.
4147
4148         PR rtl-optimization/83682
4149         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
4150         if it has non-VECTOR_MODE element mode.
4151         (vec_duplicate_p): Likewise.
4152
4153         PR middle-end/83694
4154         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
4155         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
4156
4157 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
4158
4159         PR target/83604
4160         * config/i386/i386-builtin.def
4161         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
4162         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
4163         Require also OPTION_MASK_ISA_AVX512F in addition to
4164         OPTION_MASK_ISA_GFNI.
4165         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
4166         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
4167         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
4168         to OPTION_MASK_ISA_GFNI.
4169         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
4170         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
4171         OPTION_MASK_ISA_AVX512BW.
4172         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
4173         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
4174         addition to OPTION_MASK_ISA_GFNI.
4175         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
4176         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
4177         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
4178         to OPTION_MASK_ISA_GFNI.
4179         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
4180         a requirement for all ISAs rather than any of them with a few
4181         exceptions.
4182         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
4183         processing.
4184         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
4185         bitmasks to be enabled with 3 exceptions, instead of requiring any
4186         enabled ISA with lots of exceptions.
4187         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
4188         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
4189         Change avx512bw in isa attribute to avx512f.
4190         * config/i386/sgxintrin.h: Add license boilerplate.
4191         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
4192         to __AVX512F__ and __AVX512VL to __AVX512VL__.
4193         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
4194         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
4195         defined.
4196         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
4197         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
4198         temporarily sse2 rather than sse if not enabled already.
4199
4200         PR target/83604
4201         * config/i386/sse.md (VI248_VLBW): Rename to ...
4202         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
4203         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
4204         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
4205         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
4206         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
4207         mode iterator instead of VI248_VLBW.
4208
4209 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
4210
4211         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
4212         (record_modified): Skip clobbers; add debug output.
4213         (param_change_prob): Use sreal frequencies.
4214
4215 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
4216
4217         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
4218         punt for user-aligned variables.
4219
4220 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
4221
4222         * tree-chrec.c (chrec_contains_symbols): Return true for
4223         POLY_INT_CST.
4224
4225 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
4226
4227         PR target/82439
4228         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
4229         of (x|y) == x for BICS pattern.
4230
4231 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
4232
4233         PR tree-optimization/83605
4234         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
4235         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
4236         can throw.
4237
4238 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4239
4240         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
4241         * config/epiphany/rtems.h: New file.
4242
4243 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4244             Uros Bizjak  <ubizjak@gmail.com>
4245
4246         PR target/83554
4247         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
4248         QIreg_operand instead of register_operand predicate.
4249         * config/i386/i386.c (ix86_rop_should_change_byte_p,
4250         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
4251         comments instead of -fmitigate[-_]rop.
4252
4253 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
4254
4255         PR bootstrap/81926
4256         * cgraphunit.c (symbol_table::compile): Switch to text_section
4257         before calling assembly_start debug hook.
4258         * run-rtl-passes.c (run_rtl_passes): Likewise.
4259         Include output.h.
4260
4261 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4262
4263         * tree-vrp.c (extract_range_from_binary_expr_1): Check
4264         range_int_cst_p rather than !symbolic_range_p before calling
4265         extract_range_from_multiplicative_op_1.
4266
4267 2018-01-04  Jeff Law  <law@redhat.com>
4268
4269         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
4270         redundant test in assertion.
4271
4272 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4273
4274         * doc/rtl.texi: Document machine_mode wrapper classes.
4275
4276 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4277
4278         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
4279         using tree_to_uhwi.
4280
4281 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4282
4283         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
4284         the VEC_PERM_EXPR fold to fail.
4285
4286 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4287
4288         PR debug/83585
4289         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
4290         to switched_sections.
4291
4292 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4293
4294         PR target/83680
4295         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
4296         test for d.testing.
4297
4298 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
4299
4300         PR target/83387
4301         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
4302         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
4303
4304 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4305
4306         PR debug/83666
4307         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
4308         is BLKmode and bitpos not zero or mode change is needed.
4309
4310 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4311
4312         PR target/83675
4313         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
4314         TARGET_VIS2.
4315
4316 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
4317
4318         PR target/83628
4319         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
4320         instead of MULT rtx.  Update all corresponding splitters.
4321         (*saddl_se): Ditto.
4322         (*ssub<modesuffix>): Ditto.
4323         (*ssubl_se): Ditto.
4324         (*cmp_sadd_di): Update split patterns.
4325         (*cmp_sadd_si): Ditto.
4326         (*cmp_sadd_sidi): Ditto.
4327         (*cmp_ssub_di): Ditto.
4328         (*cmp_ssub_si): Ditto.
4329         (*cmp_ssub_sidi): Ditto.
4330         * config/alpha/predicates.md (const23_operand): New predicate.
4331         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
4332         Look for ASHIFT, not MULT inner operand.
4333         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
4334
4335 2018-01-04  Martin Liska  <mliska@suse.cz>
4336
4337         PR gcov-profile/83669
4338         * gcov.c (output_intermediate_file): Add version to intermediate
4339         gcov file.
4340         * doc/gcov.texi: Document new field 'version' in intermediate
4341         file format. Fix location of '-k' option of gcov command.
4342
4343 2018-01-04  Martin Liska  <mliska@suse.cz>
4344
4345         PR ipa/82352
4346         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
4347
4348 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4349
4350         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
4351
4352 2018-01-03  Martin Sebor  <msebor@redhat.com>
4353
4354         PR tree-optimization/83655
4355         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
4356         checking calls with invalid arguments.
4357
4358 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4359
4360         * tree-vect-stmts.c (vect_get_store_rhs): New function.
4361         (vectorizable_mask_load_store): Delete.
4362         (vectorizable_call): Return false for masked loads and stores.
4363         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
4364         instead of gimple_assign_rhs1.
4365         (vectorizable_load): Handle IFN_MASK_LOAD.
4366         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
4367
4368 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4369
4370         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
4371         split out from..,
4372         (vectorizable_mask_load_store): ...here.
4373         (vectorizable_load): ...and here.
4374
4375 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4376
4377         * tree-vect-stmts.c (vect_build_all_ones_mask)
4378         (vect_build_zero_merge_argument): New functions, split out from...
4379         (vectorizable_load): ...here.
4380
4381 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4382
4383         * tree-vect-stmts.c (vect_check_store_rhs): New function,
4384         split out from...
4385         (vectorizable_mask_load_store): ...here.
4386         (vectorizable_store): ...and here.
4387
4388 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4389
4390         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
4391         split out from...
4392         (vectorizable_mask_load_store): ...here.
4393
4394 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4395
4396         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
4397         (vect_model_store_cost): Take a vec_load_store_type instead of a
4398         vect_def_type.
4399         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
4400         (vect_model_store_cost): Take a vec_load_store_type instead of a
4401         vect_def_type.
4402         (vectorizable_mask_load_store): Update accordingly.
4403         (vectorizable_store): Likewise.
4404         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
4405
4406 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4407
4408         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
4409         IFN_MASK_LOAD calls here rather than...
4410         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
4411
4412 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4413             Alan Hayward  <alan.hayward@arm.com>
4414             David Sherwood  <david.sherwood@arm.com>
4415
4416         * expmed.c (extract_bit_field_1): For vector extracts,
4417         fall back to extract_bit_field_as_subreg if vec_extract
4418         isn't available.
4419
4420 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4421             Alan Hayward  <alan.hayward@arm.com>
4422             David Sherwood  <david.sherwood@arm.com>
4423
4424         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
4425         they are variable or constant sized.
4426         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
4427         slots for constant-sized data.
4428
4429 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4430             Alan Hayward  <alan.hayward@arm.com>
4431             David Sherwood  <david.sherwood@arm.com>
4432
4433         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
4434         handling COND_EXPRs with boolean comparisons, try to find a better
4435         basis for the mask type than the boolean itself.
4436
4437 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4438
4439         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
4440         is calculated and how it can be overridden.
4441         * genmodes.c (max_bitsize_mode_any_mode): New variable.
4442         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
4443         if defined.
4444         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
4445         if nonzero.
4446
4447 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4448             Alan Hayward  <alan.hayward@arm.com>
4449             David Sherwood  <david.sherwood@arm.com>
4450
4451         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
4452         Remove the mode argument.
4453         (aarch64_simd_valid_immediate): Remove the mode and inverse
4454         arguments.
4455         * config/aarch64/iterators.md (bitsize): New iterator.
4456         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
4457         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
4458         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
4459         aarch64_simd_valid_immediate.
4460         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
4461         (aarch64_reg_or_bic_imm): Likewise.
4462         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
4463         with an insn_type enum and msl with a modifier_type enum.
4464         Replace element_width with a scalar_mode.  Change the shift
4465         to unsigned int.  Add constructors for scalar_float_mode and
4466         scalar_int_mode elements.
4467         (aarch64_vect_float_const_representable_p): Delete.
4468         (aarch64_can_const_movi_rtx_p)
4469         (aarch64_simd_scalar_immediate_valid_for_move)
4470         (aarch64_simd_make_constant): Update call to
4471         aarch64_simd_valid_immediate.
4472         (aarch64_advsimd_valid_immediate_hs): New function.
4473         (aarch64_advsimd_valid_immediate): Likewise.
4474         (aarch64_simd_valid_immediate): Remove mode and inverse
4475         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
4476         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
4477         and aarch64_float_const_representable_p on the result.
4478         (aarch64_output_simd_mov_immediate): Remove mode argument.
4479         Update call to aarch64_simd_valid_immediate and use of
4480         simd_immediate_info.
4481         (aarch64_output_scalar_simd_mov_immediate): Update call
4482         accordingly.
4483
4484 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4485             Alan Hayward  <alan.hayward@arm.com>
4486             David Sherwood  <david.sherwood@arm.com>
4487
4488         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
4489         (mode_nunits): Likewise CONST_MODE_NUNITS.
4490         * machmode.def (ADJUST_NUNITS): Document.
4491         * genmodes.c (mode_data::need_nunits_adj): New field.
4492         (blank_mode): Update accordingly.
4493         (adj_nunits): New variable.
4494         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
4495         parameter.
4496         (emit_mode_size_inline): Set need_bytesize_adj for all modes
4497         listed in adj_nunits.
4498         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
4499         listed in adj_nunits.  Don't emit case statements for such modes.
4500         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
4501         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
4502         nothing if adj_nunits is nonnull.
4503         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
4504         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
4505         (emit_mode_fbit): Update use of print_maybe_const_decl.
4506         (emit_move_size): Likewise.  Treat the array as non-const
4507         if adj_nunits.
4508         (emit_mode_adjustments): Handle adj_nunits.
4509
4510 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4511
4512         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
4513         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
4514         (VECTOR_MODES): Use it.
4515         (make_vector_modes): Take the prefix as an argument.
4516
4517 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4518             Alan Hayward  <alan.hayward@arm.com>
4519             David Sherwood  <david.sherwood@arm.com>
4520
4521         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
4522         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
4523         for MODE_VECTOR_BOOL.
4524         * machmode.def (VECTOR_BOOL_MODE): Document.
4525         * genmodes.c (VECTOR_BOOL_MODE): New macro.
4526         (make_vector_bool_mode): New function.
4527         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
4528         MODE_VECTOR_BOOL.
4529         * lto-streamer-in.c (lto_input_mode_table): Likewise.
4530         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
4531         Likewise.
4532         * stor-layout.c (int_mode_for_mode): Likewise.
4533         * tree.c (build_vector_type_for_mode): Likewise.
4534         * varasm.c (output_constant_pool_2): Likewise.
4535         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
4536         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
4537         for MODE_VECTOR_BOOL.
4538         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
4539         of mode class checks.
4540         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
4541         instead of a list of mode class checks.
4542         (expand_vector_scalar_condition): Likewise.
4543         (type_for_widest_vector_mode): Handle BImode as an inner mode.
4544
4545 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4546             Alan Hayward  <alan.hayward@arm.com>
4547             David Sherwood  <david.sherwood@arm.com>
4548
4549         * machmode.h (mode_size): Change from unsigned short to
4550         poly_uint16_pod.
4551         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
4552         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4553         or if measurement_type is not polynomial.
4554         (fixed_size_mode::includes_p): Check for constant-sized modes.
4555         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
4556         return a poly_uint16 rather than an unsigned short.
4557         (emit_mode_size): Change the type of mode_size from unsigned short
4558         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
4559         (emit_mode_adjustments): Cope with polynomial vector sizes.
4560         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4561         for GET_MODE_SIZE.
4562         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4563         for GET_MODE_SIZE.
4564         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
4565         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
4566         * caller-save.c (setup_save_areas): Likewise.
4567         (replace_reg_with_saved_mem): Likewise.
4568         * calls.c (emit_library_call_value_1): Likewise.
4569         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
4570         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
4571         (gen_lowpart_for_combine): Likewise.
4572         * convert.c (convert_to_integer_1): Likewise.
4573         * cse.c (equiv_constant, cse_insn): Likewise.
4574         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
4575         (cselib_subst_to_values): Likewise.
4576         * dce.c (word_dce_process_block): Likewise.
4577         * df-problems.c (df_word_lr_mark_ref): Likewise.
4578         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
4579         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
4580         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
4581         (rtl_for_decl_location): Likewise.
4582         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
4583         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
4584         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
4585         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
4586         (expand_expr_real_1): Likewise.
4587         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
4588         (pad_below): Likewise.
4589         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4590         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
4591         * ira.c (get_subreg_tracking_sizes): Likewise.
4592         * ira-build.c (ira_create_allocno_objects): Likewise.
4593         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
4594         (ira_sort_regnos_for_alter_reg): Likewise.
4595         * ira-costs.c (record_operand_costs): Likewise.
4596         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
4597         (resolve_simple_move): Likewise.
4598         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
4599         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
4600         (lra_constraints): Likewise.
4601         (CONST_POOL_OK_P): Reject variable-sized modes.
4602         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
4603         (add_pseudo_to_slot, lra_spill): Likewise.
4604         * omp-low.c (omp_clause_aligned_alignment): Likewise.
4605         * optabs-query.c (get_best_extraction_insn): Likewise.
4606         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4607         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
4608         (expand_mult_highpart, valid_multiword_target_p): Likewise.
4609         * recog.c (offsettable_address_addr_space_p): Likewise.
4610         * regcprop.c (maybe_mode_change): Likewise.
4611         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
4612         * regrename.c (build_def_use): Likewise.
4613         * regstat.c (dump_reg_info): Likewise.
4614         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
4615         (find_reloads, find_reloads_subreg_address): Likewise.
4616         * reload1.c (eliminate_regs_1): Likewise.
4617         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
4618         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
4619         (simplify_binary_operation_1, simplify_subreg): Likewise.
4620         * targhooks.c (default_function_arg_padding): Likewise.
4621         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
4622         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
4623         (verify_gimple_assign_ternary): Likewise.
4624         * tree-inline.c (estimate_move_cost): Likewise.
4625         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4626         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
4627         (get_address_cost_ainc): Likewise.
4628         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
4629         (vect_supportable_dr_alignment): Likewise.
4630         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4631         (vectorizable_reduction): Likewise.
4632         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
4633         (vectorizable_operation, vectorizable_load): Likewise.
4634         * tree.c (build_same_sized_truth_vector_type): Likewise.
4635         * valtrack.c (cleanup_auto_inc_dec): Likewise.
4636         * var-tracking.c (emit_note_insn_var_location): Likewise.
4637         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
4638         (ADDR_VEC_ALIGN): Likewise.
4639
4640 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4641             Alan Hayward  <alan.hayward@arm.com>
4642             David Sherwood  <david.sherwood@arm.com>
4643
4644         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
4645         unsigned short.
4646         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4647         or if measurement_type is polynomial.
4648         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
4649         * combine.c (make_extraction): Likewise.
4650         * dse.c (find_shift_sequence): Likewise.
4651         * dwarf2out.c (mem_loc_descriptor): Likewise.
4652         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
4653         (extract_bit_field, extract_low_bits): Likewise.
4654         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
4655         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
4656         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
4657         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
4658         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4659         * reload.c (find_reloads): Likewise.
4660         * reload1.c (alter_reg): Likewise.
4661         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
4662         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
4663         * tree-if-conv.c (predicate_mem_writes): Likewise.
4664         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
4665         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
4666         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
4667         * valtrack.c (dead_debug_insert_temp): Likewise.
4668         * varasm.c (mergeable_constant_section): Likewise.
4669         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
4670
4671 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4672             Alan Hayward  <alan.hayward@arm.com>
4673             David Sherwood  <david.sherwood@arm.com>
4674
4675         * expr.c (expand_assignment): Cope with polynomial mode sizes
4676         when assigning to a CONCAT.
4677
4678 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4679             Alan Hayward  <alan.hayward@arm.com>
4680             David Sherwood  <david.sherwood@arm.com>
4681
4682         * machmode.h (mode_precision): Change from unsigned short to
4683         poly_uint16_pod.
4684         (mode_to_precision): Return a poly_uint16 rather than an unsigned
4685         short.
4686         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
4687         or if measurement_type is not polynomial.
4688         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
4689         in which the mode is already known to be a scalar_int_mode.
4690         * genmodes.c (emit_mode_precision): Change the type of mode_precision
4691         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
4692         initializer.
4693         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4694         for GET_MODE_PRECISION.
4695         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4696         for GET_MODE_PRECISION.
4697         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
4698         as polynomial.
4699         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
4700         (expand_field_assignment, make_extraction): Likewise.
4701         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
4702         (get_last_value): Likewise.
4703         * convert.c (convert_to_integer_1): Likewise.
4704         * cse.c (cse_insn): Likewise.
4705         * expr.c (expand_expr_real_1): Likewise.
4706         * lra-constraints.c (simplify_operand_subreg): Likewise.
4707         * optabs-query.c (can_atomic_load_p): Likewise.
4708         * optabs.c (expand_atomic_load): Likewise.
4709         (expand_atomic_store): Likewise.
4710         * ree.c (combine_reaching_defs): Likewise.
4711         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
4712         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
4713         * tree.h (type_has_mode_precision_p): Likewise.
4714         * ubsan.c (instrument_si_overflow): Likewise.
4715
4716 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4717             Alan Hayward  <alan.hayward@arm.com>
4718             David Sherwood  <david.sherwood@arm.com>
4719
4720         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
4721         polynomial numbers of units.
4722         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
4723         (valid_vector_subparts_p): New function.
4724         (build_vector_type): Remove temporary shim and take the number
4725         of units as a poly_uint64 rather than an int.
4726         (build_opaque_vector_type): Take the number of units as a
4727         poly_uint64 rather than an int.
4728         * tree.c (build_vector_from_ctor): Handle polynomial
4729         TYPE_VECTOR_SUBPARTS.
4730         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
4731         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
4732         (build_vector_from_val): If the number of units is variable,
4733         use build_vec_duplicate_cst for constant operands and
4734         VEC_DUPLICATE_EXPR otherwise.
4735         (make_vector_type): Remove temporary is_constant ().
4736         (build_vector_type, build_opaque_vector_type): Take the number of
4737         units as a poly_uint64 rather than an int.
4738         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
4739         VECTOR_CST_NELTS.
4740         * cfgexpand.c (expand_debug_expr): Likewise.
4741         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
4742         (store_constructor, expand_expr_real_1): Likewise.
4743         (const_scalar_mask_from_tree): Likewise.
4744         * fold-const-call.c (fold_const_reduction): Likewise.
4745         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
4746         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
4747         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
4748         (fold_relational_const): Likewise.
4749         (native_interpret_vector): Likewise.  Change the size from an
4750         int to an unsigned int.
4751         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
4752         TYPE_VECTOR_SUBPARTS.
4753         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
4754         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
4755         duplicating a non-constant operand into a variable-length vector.
4756         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
4757         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
4758         * ipa-icf.c (sem_variable::equals): Likewise.
4759         * match.pd: Likewise.
4760         * omp-simd-clone.c (simd_clone_subparts): Likewise.
4761         * print-tree.c (print_node): Likewise.
4762         * stor-layout.c (layout_type): Likewise.
4763         * targhooks.c (default_builtin_vectorization_cost): Likewise.
4764         * tree-cfg.c (verify_gimple_comparison): Likewise.
4765         (verify_gimple_assign_binary): Likewise.
4766         (verify_gimple_assign_ternary): Likewise.
4767         (verify_gimple_assign_single): Likewise.
4768         * tree-pretty-print.c (dump_generic_node): Likewise.
4769         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4770         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
4771         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
4772         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
4773         (vect_shift_permute_load_chain): Likewise.
4774         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
4775         (expand_vector_condition, optimize_vector_constructor): Likewise.
4776         (lower_vec_perm, get_compute_type): Likewise.
4777         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4778         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
4779         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
4780         (vect_recog_mask_conversion_pattern): Likewise.
4781         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
4782         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
4783         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4784         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
4785         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
4786         (vectorizable_shift, vectorizable_operation, vectorizable_store)
4787         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
4788         (supportable_widening_operation): Likewise.
4789         (supportable_narrowing_operation): Likewise.
4790         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
4791         Likewise.
4792         * varasm.c (output_constant): Likewise.
4793
4794 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4795             Alan Hayward  <alan.hayward@arm.com>
4796             David Sherwood  <david.sherwood@arm.com>
4797
4798         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
4799         so that both the length == 3 and length != 3 cases set up their
4800         own permute vectors.  Add comments explaining why we know the
4801         number of elements is constant.
4802         (vect_permute_load_chain): Likewise.
4803
4804 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4805             Alan Hayward  <alan.hayward@arm.com>
4806             David Sherwood  <david.sherwood@arm.com>
4807
4808         * machmode.h (mode_nunits): Change from unsigned char to
4809         poly_uint16_pod.
4810         (ONLY_FIXED_SIZE_MODES): New macro.
4811         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
4812         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
4813         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
4814         New typedefs.
4815         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
4816         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
4817         or if measurement_type is not polynomial.
4818         * genmodes.c (ZERO_COEFFS): New macro.
4819         (emit_mode_nunits_inline): Make mode_nunits_inline return a
4820         poly_uint16.
4821         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
4822         Use ZERO_COEFFS when emitting initializers.
4823         * data-streamer.h (bp_pack_poly_value): New function.
4824         (bp_unpack_poly_value): Likewise.
4825         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4826         for GET_MODE_NUNITS.
4827         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4828         for GET_MODE_NUNITS.
4829         * tree.c (make_vector_type): Remove temporary shim and make
4830         the real function take the number of units as a poly_uint64
4831         rather than an int.
4832         (build_vector_type_for_mode): Handle polynomial nunits.
4833         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
4834         * emit-rtl.c (const_vec_series_p_1): Likewise.
4835         (gen_rtx_CONST_VECTOR): Likewise.
4836         * fold-const.c (test_vec_duplicate_folding): Likewise.
4837         * genrecog.c (validate_pattern): Likewise.
4838         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
4839         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4840         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
4841         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
4842         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
4843         * rtlanal.c (subreg_get_info): Likewise.
4844         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4845         (vect_grouped_load_supported): Likewise.
4846         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
4847         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
4848         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
4849         (simplify_const_unary_operation, simplify_binary_operation_1)
4850         (simplify_const_binary_operation, simplify_ternary_operation)
4851         (test_vector_ops_duplicate, test_vector_ops): Likewise.
4852         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
4853         instead of CONST_VECTOR_NUNITS.
4854         * varasm.c (output_constant_pool_2): Likewise.
4855         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
4856         explicit-encoded elements in the XVEC for variable-length vectors.
4857
4858 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4859
4860         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
4861
4862 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4863             Alan Hayward  <alan.hayward@arm.com>
4864             David Sherwood  <david.sherwood@arm.com>
4865
4866         * coretypes.h (fixed_size_mode): Declare.
4867         (fixed_size_mode_pod): New typedef.
4868         * builtins.h (target_builtins::x_apply_args_mode)
4869         (target_builtins::x_apply_result_mode): Change type to
4870         fixed_size_mode_pod.
4871         * builtins.c (apply_args_size, apply_result_size, result_vector)
4872         (expand_builtin_apply_args_1, expand_builtin_apply)
4873         (expand_builtin_return): Update accordingly.
4874
4875 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4876
4877         * cse.c (hash_rtx_cb): Hash only the encoded elements.
4878         * cselib.c (cselib_hash_rtx): Likewise.
4879         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
4880         CONST_VECTOR encoding.
4881
4882 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4883             Jeff Law  <law@redhat.com>
4884
4885         PR target/83641
4886         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
4887         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
4888         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
4889         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
4890
4891         PR target/83641
4892         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
4893         explicitly probe *sp in a noreturn function if there were any callee
4894         register saves or frame pointer is needed.
4895
4896 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4897
4898         PR debug/83621
4899         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
4900         BLKmode for ternary, binary or unary expressions.
4901
4902         PR debug/83645
4903         * var-tracking.c (delete_vta_debug_insn): New inline function.
4904         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
4905         insns from get_insns () to NULL instead of each bb separately.
4906         Use delete_vta_debug_insn.  No longer static.
4907         (vt_debug_insns_local, variable_tracking_main_1): Adjust
4908         delete_vta_debug_insns callers.
4909         * rtl.h (delete_vta_debug_insns): Declare.
4910         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
4911         instead of variable_tracking_main.
4912
4913 2018-01-03  Martin Sebor  <msebor@redhat.com>
4914
4915         PR tree-optimization/83603
4916         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
4917         arguments past the endof the argument list in functions declared
4918         without a prototype.
4919         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
4920         Avoid checking when arguments are null.
4921
4922 2018-01-03  Martin Sebor  <msebor@redhat.com>
4923
4924         PR c/83559
4925         * doc/extend.texi (attribute const): Fix a typo.
4926         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
4927         issuing -Wsuggest-attribute for void functions.
4928
4929 2018-01-03  Martin Sebor  <msebor@redhat.com>
4930
4931         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
4932         offset_int::from instead of wide_int::to_shwi.
4933         (maybe_diag_overlap): Remove assertion.
4934         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
4935         * gimple-ssa-sprintf.c (format_directive): Same.
4936         (parse_directive): Same.
4937         (sprintf_dom_walker::compute_format_length): Same.
4938         (try_substitute_return_value): Same.
4939
4940 2018-01-03  Jeff Law  <law@redhat.com>
4941
4942         PR middle-end/83654
4943         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
4944         non-constant residual for zero at runtime and avoid probing in
4945         that case.  Reorganize code for trailing problem to mirror handling
4946         of the residual.
4947
4948 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
4949
4950         PR tree-optimization/83501
4951         * tree-ssa-strlen.c (get_string_cst): New.
4952         (handle_char_store): Call get_string_cst.
4953
4954 2018-01-03  Martin Liska  <mliska@suse.cz>
4955
4956         PR tree-optimization/83593
4957         * tree-ssa-strlen.c: Include tree-cfg.h.
4958         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
4959         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
4960         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
4961         to false.
4962         (strlen_dom_walker::before_dom_children): Call
4963         gimple_purge_dead_eh_edges. Dump tranformation with details
4964         dump flags.
4965         (strlen_dom_walker::before_dom_children): Update call by adding
4966         new argument cleanup_eh.
4967         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
4968
4969 2018-01-03  Martin Liska  <mliska@suse.cz>
4970
4971         PR ipa/83549
4972         * cif-code.def (VARIADIC_THUNK): New enum value.
4973         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
4974         thunks.
4975
4976 2018-01-03  Jan Beulich  <jbeulich@suse.com>
4977
4978         * sse.md (mov<mode>_internal): Tighten condition for when to use
4979         vmovdqu<ssescalarsize> for TI and OI modes.
4980
4981 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4982
4983         Update copyright years.
4984
4985 2018-01-03  Martin Liska  <mliska@suse.cz>
4986
4987         PR ipa/83594
4988         * ipa-visibility.c (function_and_variable_visibility): Skip
4989         functions with noipa attribure.
4990
4991 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4992
4993         * gcc.c (process_command): Update copyright notice dates.
4994         * gcov-dump.c (print_version): Ditto.
4995         * gcov.c (print_version): Ditto.
4996         * gcov-tool.c (print_version): Ditto.
4997         * gengtype.c (create_file): Ditto.
4998         * doc/cpp.texi: Bump @copying's copyright year.
4999         * doc/cppinternals.texi: Ditto.
5000         * doc/gcc.texi: Ditto.
5001         * doc/gccint.texi: Ditto.
5002         * doc/gcov.texi: Ditto.
5003         * doc/install.texi: Ditto.
5004         * doc/invoke.texi: Ditto.
5005
5006 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5007
5008         * vector-builder.h (vector_builder::m_full_nelts): Change from
5009         unsigned int to poly_uint64.
5010         (vector_builder::full_nelts): Update prototype accordingly.
5011         (vector_builder::new_vector): Likewise.
5012         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
5013         (vector_builder::operator ==): Likewise.
5014         (vector_builder::finalize): Likewise.
5015         * int-vector-builder.h (int_vector_builder::int_vector_builder):
5016         Take the number of elements as a poly_uint64 rather than an
5017         unsigned int.
5018         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
5019         from unsigned int to poly_uint64.
5020         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
5021         (vec_perm_indices::new_vector): Likewise.
5022         (vec_perm_indices::length): Likewise.
5023         (vec_perm_indices::nelts_per_input): Likewise.
5024         (vec_perm_indices::input_nelts): Likewise.
5025         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
5026         number of elements per input as a poly_uint64 rather than an
5027         unsigned int.  Use the original encoding for variable-length
5028         vectors, rather than clamping each individual element.
5029         For the second and subsequent elements in each pattern,
5030         clamp the step and base before clamping their sum.
5031         (vec_perm_indices::series_p): Handle polynomial element counts.
5032         (vec_perm_indices::all_in_range_p): Likewise.
5033         (vec_perm_indices_to_tree): Likewise.
5034         (vec_perm_indices_to_rtx): Likewise.
5035         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
5036         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
5037         (tree_vector_builder::new_binary_operation): Handle polynomial
5038         element counts.  Return false if we need to know the number
5039         of elements at compile time.
5040         * fold-const.c (fold_vec_perm): Punt if the number of elements
5041         isn't known at compile time.
5042
5043 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5044
5045         * vec-perm-indices.h (vec_perm_builder): Change element type
5046         from HOST_WIDE_INT to poly_int64.
5047         (vec_perm_indices::element_type): Update accordingly.
5048         (vec_perm_indices::clamp): Handle polynomial element_types.
5049         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5050         (vec_perm_indices::all_in_range_p): Likewise.
5051         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
5052         than shwi trees.
5053         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
5054         polynomial vec_perm_indices element types.
5055         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
5056         * fold-const.c (fold_vec_perm): Likewise.
5057         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
5058         * tree-vect-generic.c (lower_vec_perm): Likewise.
5059         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5060         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
5061         element type to HOST_WIDE_INT.
5062
5063 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5064             Alan Hayward  <alan.hayward@arm.com>
5065             David Sherwood  <david.sherwood@arm.com>
5066
5067         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
5068         rather than an int.  Use plus_constant.
5069         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
5070         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
5071
5072 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5073             Alan Hayward  <alan.hayward@arm.com>
5074             David Sherwood  <david.sherwood@arm.com>
5075
5076         * calls.c (emit_call_1, expand_call): Change struct_value_size from
5077         a HOST_WIDE_INT to a poly_int64.
5078
5079 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5080             Alan Hayward  <alan.hayward@arm.com>
5081             David Sherwood  <david.sherwood@arm.com>
5082
5083         * calls.c (load_register_parameters): Cope with polynomial
5084         mode sizes.  Require a constant size for BLKmode parameters
5085         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
5086         forces a parameter to be padded at the lsb end in order to
5087         fill a complete number of words, require the parameter size
5088         to be ordered wrt UNITS_PER_WORD.
5089
5090 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5091             Alan Hayward  <alan.hayward@arm.com>
5092             David Sherwood  <david.sherwood@arm.com>
5093
5094         * reload1.c (spill_stack_slot_width): Change element type
5095         from unsigned int to poly_uint64_pod.
5096         (alter_reg): Treat mode sizes as polynomial.
5097
5098 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5099             Alan Hayward  <alan.hayward@arm.com>
5100             David Sherwood  <david.sherwood@arm.com>
5101
5102         * reload.c (complex_word_subreg_p): New function.
5103         (reload_inner_reg_of_subreg, push_reload): Use it.
5104
5105 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5106             Alan Hayward  <alan.hayward@arm.com>
5107             David Sherwood  <david.sherwood@arm.com>
5108
5109         * lra-constraints.c (process_alt_operands): Reject matched
5110         operands whose sizes aren't ordered.
5111         (match_reload): Refer to this check here.
5112
5113 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5114             Alan Hayward  <alan.hayward@arm.com>
5115             David Sherwood  <david.sherwood@arm.com>
5116
5117         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
5118         that the mode size is in the set {1, 2, 4, 8, 16}.
5119
5120 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5121             Alan Hayward  <alan.hayward@arm.com>
5122             David Sherwood  <david.sherwood@arm.com>
5123
5124         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
5125         Use plus_constant instead of gen_rtx_PLUS.
5126
5127 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5128             Alan Hayward  <alan.hayward@arm.com>
5129             David Sherwood  <david.sherwood@arm.com>
5130
5131         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
5132         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
5133         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
5134         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
5135         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
5136         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
5137         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
5138         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
5139         * config/i386/i386.c (ix86_push_rounding): ...this new function.
5140         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
5141         a poly_int64.
5142         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
5143         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
5144         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
5145         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
5146         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
5147         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
5148         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
5149         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
5150         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
5151         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
5152         function.
5153         * expr.c (emit_move_resolve_push): Treat the input and result
5154         of PUSH_ROUNDING as a poly_int64.
5155         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
5156         (emit_push_insn): Likewise.
5157         * lra-eliminations.c (mark_not_eliminable): Likewise.
5158         * recog.c (push_operand): Likewise.
5159         * reload1.c (elimination_effects): Likewise.
5160         * rtlanal.c (nonzero_bits1): Likewise.
5161         * calls.c (store_one_arg): Likewise.  Require the padding to be
5162         known at compile time.
5163
5164 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5165             Alan Hayward  <alan.hayward@arm.com>
5166             David Sherwood  <david.sherwood@arm.com>
5167
5168         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
5169         Use plus_constant instead of gen_rtx_PLUS.
5170
5171 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5172             Alan Hayward  <alan.hayward@arm.com>
5173             David Sherwood  <david.sherwood@arm.com>
5174
5175         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
5176         rather than an int.
5177
5178 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5179             Alan Hayward  <alan.hayward@arm.com>
5180             David Sherwood  <david.sherwood@arm.com>
5181
5182         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
5183         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
5184         via stack temporaries.  Treat the mode size as polynomial too.
5185
5186 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5187             Alan Hayward  <alan.hayward@arm.com>
5188             David Sherwood  <david.sherwood@arm.com>
5189
5190         * expr.c (expand_expr_real_2): When handling conversions involving
5191         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
5192         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
5193         as a poly_uint64 too.
5194
5195 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5196             Alan Hayward  <alan.hayward@arm.com>
5197             David Sherwood  <david.sherwood@arm.com>
5198
5199         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
5200
5201 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5202             Alan Hayward  <alan.hayward@arm.com>
5203             David Sherwood  <david.sherwood@arm.com>
5204
5205         * combine.c (can_change_dest_mode): Handle polynomial
5206         REGMODE_NATURAL_SIZE.
5207         * expmed.c (store_bit_field_1): Likewise.
5208         * expr.c (store_constructor): Likewise.
5209         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
5210         and polynomial REGMODE_NATURAL_SIZE.
5211         (gen_lowpart_common): Likewise.
5212         * reginfo.c (record_subregs_of_mode): Likewise.
5213         * rtlanal.c (read_modify_subreg_p): Likewise.
5214
5215 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5216             Alan Hayward  <alan.hayward@arm.com>
5217             David Sherwood  <david.sherwood@arm.com>
5218
5219         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
5220         numbers of elements.
5221
5222 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5223             Alan Hayward  <alan.hayward@arm.com>
5224             David Sherwood  <david.sherwood@arm.com>
5225
5226         * match.pd: Cope with polynomial numbers of vector elements.
5227
5228 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5229             Alan Hayward  <alan.hayward@arm.com>
5230             David Sherwood  <david.sherwood@arm.com>
5231
5232         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
5233         in a POINTER_PLUS_EXPR.
5234
5235 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5236             Alan Hayward  <alan.hayward@arm.com>
5237             David Sherwood  <david.sherwood@arm.com>
5238
5239         * omp-simd-clone.c (simd_clone_subparts): New function.
5240         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
5241         (ipa_simd_modify_function_body): Likewise.
5242
5243 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5244             Alan Hayward  <alan.hayward@arm.com>
5245             David Sherwood  <david.sherwood@arm.com>
5246
5247         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
5248         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
5249         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
5250         (expand_vector_condition, vector_element): Likewise.
5251         (subparts_gt): New function.
5252         (get_compute_type): Use subparts_gt.
5253         (count_type_subparts): Delete.
5254         (expand_vector_operations_1): Use subparts_gt instead of
5255         count_type_subparts.
5256
5257 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5258             Alan Hayward  <alan.hayward@arm.com>
5259             David Sherwood  <david.sherwood@arm.com>
5260
5261         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
5262         (vect_compile_time_alias): ...this new function.  Do the calculation
5263         on poly_ints rather than trees.
5264         (vect_prune_runtime_alias_test_list): Update call accordingly.
5265
5266 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5267             Alan Hayward  <alan.hayward@arm.com>
5268             David Sherwood  <david.sherwood@arm.com>
5269
5270         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
5271         numbers of units.
5272         (vect_schedule_slp_instance): Likewise.
5273
5274 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5275             Alan Hayward  <alan.hayward@arm.com>
5276             David Sherwood  <david.sherwood@arm.com>
5277
5278         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
5279         constant and extern definitions for variable-length vectors.
5280         (vect_get_constant_vectors): Note that the number of units
5281         is known to be constant.
5282
5283 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5284             Alan Hayward  <alan.hayward@arm.com>
5285             David Sherwood  <david.sherwood@arm.com>
5286
5287         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
5288         of units as polynomial.  Choose between WIDE and NARROW based
5289         on multiple_p.
5290
5291 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5292             Alan Hayward  <alan.hayward@arm.com>
5293             David Sherwood  <david.sherwood@arm.com>
5294
5295         * tree-vect-stmts.c (simd_clone_subparts): New function.
5296         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
5297
5298 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5299             Alan Hayward  <alan.hayward@arm.com>
5300             David Sherwood  <david.sherwood@arm.com>
5301
5302         * tree-vect-stmts.c (vectorizable_call): Treat the number of
5303         vectors as polynomial.  Use build_index_vector for
5304         IFN_GOMP_SIMD_LANE.
5305
5306 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5307             Alan Hayward  <alan.hayward@arm.com>
5308             David Sherwood  <david.sherwood@arm.com>
5309
5310         * tree-vect-stmts.c (get_load_store_type): Treat the number of
5311         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
5312         for variable-length vectors.
5313         (vectorizable_mask_load_store): Treat the number of units as
5314         polynomial, asserting that it is constant if the condition has
5315         already been enforced.
5316         (vectorizable_store, vectorizable_load): Likewise.
5317
5318 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5319             Alan Hayward  <alan.hayward@arm.com>
5320             David Sherwood  <david.sherwood@arm.com>
5321
5322         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
5323         of units as polynomial.  Punt if we can't tell at compile time
5324         which vector contains the final result.
5325
5326 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5327             Alan Hayward  <alan.hayward@arm.com>
5328             David Sherwood  <david.sherwood@arm.com>
5329
5330         * tree-vect-loop.c (vectorizable_induction): Treat the number
5331         of units as polynomial.  Punt on SLP inductions.  Use an integer
5332         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
5333         cast of such a series for variable-length floating-point
5334         reductions.
5335
5336 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5337             Alan Hayward  <alan.hayward@arm.com>
5338             David Sherwood  <david.sherwood@arm.com>
5339
5340         * tree.h (build_index_vector): Declare.
5341         * tree.c (build_index_vector): New function.
5342         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
5343         of units as polynomial, forcibly converting it to a constant if
5344         vectorizable_reduction has already enforced the condition.
5345         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
5346         to create a {1,2,3,...} vector.
5347         (vectorizable_reduction): Treat the number of units as polynomial.
5348         Choose vectype_in based on the largest scalar element size rather
5349         than the smallest number of units.  Enforce the restrictions
5350         relied on above.
5351
5352 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5353             Alan Hayward  <alan.hayward@arm.com>
5354             David Sherwood  <david.sherwood@arm.com>
5355
5356         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
5357         number of units as polynomial.
5358
5359 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5360             Alan Hayward  <alan.hayward@arm.com>
5361             David Sherwood  <david.sherwood@arm.com>
5362
5363         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
5364         * target.def (autovectorize_vector_sizes): Return the vector sizes
5365         by pointer, using vector_sizes rather than a bitmask.
5366         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
5367         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
5368         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
5369         Likewise.
5370         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
5371         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
5372         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
5373         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
5374         * omp-general.c (omp_max_vf): Likewise.
5375         * omp-low.c (omp_clause_aligned_alignment): Likewise.
5376         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
5377         * tree-vect-loop.c (vect_analyze_loop): Likewise.
5378         * tree-vect-slp.c (vect_slp_bb): Likewise.
5379         * doc/tm.texi: Regenerate.
5380         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
5381         to a poly_uint64.
5382         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
5383         the vector size as a poly_uint64 rather than an unsigned int.
5384         (current_vector_size): Change from an unsigned int to a poly_uint64.
5385         (get_vectype_for_scalar_type): Update accordingly.
5386         * tree.h (build_truth_vector_type): Take the size and number of
5387         units as a poly_uint64 rather than an unsigned int.
5388         (build_vector_type): Add a temporary overload that takes
5389         the number of units as a poly_uint64 rather than an unsigned int.
5390         * tree.c (make_vector_type): Likewise.
5391         (build_truth_vector_type): Take the number of units as a poly_uint64
5392         rather than an unsigned int.
5393
5394 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5395             Alan Hayward  <alan.hayward@arm.com>
5396             David Sherwood  <david.sherwood@arm.com>
5397
5398         * target.def (get_mask_mode): Take the number of units and length
5399         as poly_uint64s rather than unsigned ints.
5400         * targhooks.h (default_get_mask_mode): Update accordingly.
5401         * targhooks.c (default_get_mask_mode): Likewise.
5402         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
5403         * doc/tm.texi: Regenerate.
5404
5405 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5406             Alan Hayward  <alan.hayward@arm.com>
5407             David Sherwood  <david.sherwood@arm.com>
5408
5409         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
5410         * omp-general.c (omp_max_vf): Likewise.
5411         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
5412         (expand_omp_simd): Handle polynomial safelen.
5413         * omp-low.c (omplow_simd_context): Add a default constructor.
5414         (omplow_simd_context::max_vf): Change from int to poly_uint64.
5415         (lower_rec_simd_input_clauses): Update accordingly.
5416         (lower_rec_input_clauses): Likewise.
5417
5418 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5419             Alan Hayward  <alan.hayward@arm.com>
5420             David Sherwood  <david.sherwood@arm.com>
5421
5422         * tree-vectorizer.h (vect_nunits_for_cost): New function.
5423         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
5424         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
5425         (vect_analyze_slp_cost): Likewise.
5426         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
5427         (vect_model_load_cost): Likewise.
5428
5429 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5430             Alan Hayward  <alan.hayward@arm.com>
5431             David Sherwood  <david.sherwood@arm.com>
5432
5433         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
5434         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
5435         from an unsigned int * to a poly_uint64_pod *.
5436         (calculate_unrolling_factor): New function.
5437         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
5438
5439 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5440             Alan Hayward  <alan.hayward@arm.com>
5441             David Sherwood  <david.sherwood@arm.com>
5442
5443         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
5444         from an unsigned int to a poly_uint64.
5445         (_loop_vec_info::slp_unrolling_factor): Likewise.
5446         (_loop_vec_info::vectorization_factor): Change from an int
5447         to a poly_uint64.
5448         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
5449         (vect_get_num_vectors): New function.
5450         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
5451         (vect_get_num_copies): Use vect_get_num_vectors.
5452         (vect_analyze_data_ref_dependences): Change max_vf from an int *
5453         to an unsigned int *.
5454         (vect_analyze_data_refs): Change min_vf from an int * to a
5455         poly_uint64 *.
5456         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5457         than an unsigned HOST_WIDE_INT.
5458         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
5459         (vect_analyze_data_ref_dependence): Change max_vf from an int *
5460         to an unsigned int *.
5461         (vect_analyze_data_ref_dependences): Likewise.
5462         (vect_compute_data_ref_alignment): Handle polynomial vf.
5463         (vect_enhance_data_refs_alignment): Likewise.
5464         (vect_prune_runtime_alias_test_list): Likewise.
5465         (vect_shift_permute_load_chain): Likewise.
5466         (vect_supportable_dr_alignment): Likewise.
5467         (dependence_distance_ge_vf): Take the vectorization factor as a
5468         poly_uint64 rather than an unsigned HOST_WIDE_INT.
5469         (vect_analyze_data_refs): Change min_vf from an int * to a
5470         poly_uint64 *.
5471         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
5472         vfm1 as a poly_uint64 rather than an int.  Make the same change
5473         for the returned bound_scalar.
5474         (vect_gen_vector_loop_niters): Handle polynomial vf.
5475         (vect_do_peeling): Likewise.  Update call to
5476         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
5477         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
5478         be constant.
5479         * tree-vect-loop.c (vect_determine_vectorization_factor)
5480         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
5481         (vect_get_known_peeling_cost): Likewise.
5482         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
5483         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
5484         (vect_transform_loop): Likewise.  Use the lowest possible VF when
5485         updating the upper bounds of the loop.
5486         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
5487         rather than an int.
5488         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
5489         polynomial unroll factors.
5490         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
5491         (vect_make_slp_decision): Likewise.
5492         (vect_supported_load_permutation_p): Likewise, and polynomial
5493         vf too.
5494         (vect_analyze_slp_cost): Handle polynomial vf.
5495         (vect_slp_analyze_node_operations): Likewise.
5496         (vect_slp_analyze_bb_1): Likewise.
5497         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5498         than an unsigned HOST_WIDE_INT.
5499         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
5500         (vectorizable_load): Handle polynomial vf.
5501         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
5502         a poly_uint64.
5503         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
5504
5505 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5506             Alan Hayward  <alan.hayward@arm.com>
5507             David Sherwood  <david.sherwood@arm.com>
5508
5509         * match.pd: Handle bit operations involving three constants
5510         and try to fold one pair.
5511
5512 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5513
5514         * tree-vect-loop-manip.c: Include gimple-fold.h.
5515         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
5516         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
5517         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
5518         Add a path that uses a step of VF instead of 1, but disable it
5519         for now.
5520         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
5521         and niters_no_overflow parameters.  Update calls to
5522         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
5523         Create a new SSA name if the latter choses to use a ste other
5524         than zero, and return it via niters_vector_mult_vf_var.
5525         * tree-vect-loop.c (vect_transform_loop): Update calls to
5526         vect_do_peeling, vect_gen_vector_loop_niters and
5527         slpeel_make_loop_iterate_ntimes.
5528         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
5529         (vect_gen_vector_loop_niters): Update declarations after above changes.
5530
5531 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
5532
5533         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
5534         128-bit round to integer instructions.
5535         (ceil<mode>2): Likewise.
5536         (btrunc<mode>2): Likewise.
5537         (round<mode>2): Likewise.
5538
5539 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5540
5541         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
5542         unaligned VSX load/store on P8/P9.
5543         (expand_block_clear): Allow the use of unaligned VSX
5544         load/store on P8/P9.
5545
5546 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
5547
5548         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
5549         New function.
5550         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
5551         swap associated with both a load and a store.
5552
5553 2018-01-02  Andrew Waterman  <andrew@sifive.com>
5554
5555         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
5556         * config/riscv/riscv.md (clear_cache): Use it.
5557
5558 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
5559
5560         * web.c: Remove out-of-date comment.
5561
5562 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5563
5564         * expr.c (fixup_args_size_notes): Check that any existing
5565         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
5566         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
5567         (emit_single_push_insn): ...here.
5568
5569 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5570
5571         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
5572         (const_vector_encoded_nelts): New function.
5573         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
5574         (const_vector_int_elt, const_vector_elt): Declare.
5575         * emit-rtl.c (const_vector_int_elt_1): New function.
5576         (const_vector_elt): Likewise.
5577         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
5578         of CONST_VECTOR_ELT.
5579
5580 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5581
5582         * expr.c: Include rtx-vector-builder.h.
5583         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
5584         directly on the tree encoding.
5585         (const_vector_from_tree): Likewise.
5586         * optabs.c: Include rtx-vector-builder.h.
5587         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
5588         sequence of "u" values.
5589         * vec-perm-indices.c: Include rtx-vector-builder.h.
5590         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
5591         directly on the vec_perm_indices encoding.
5592
5593 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5594
5595         * doc/rtl.texi (const_vector): Describe new encoding scheme.
5596         * Makefile.in (OBJS): Add rtx-vector-builder.o.
5597         * rtx-vector-builder.h: New file.
5598         * rtx-vector-builder.c: Likewise.
5599         * rtl.h (rtx_def::u2): Add a const_vector field.
5600         (CONST_VECTOR_NPATTERNS): New macro.
5601         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
5602         (CONST_VECTOR_DUPLICATE_P): Likewise.
5603         (CONST_VECTOR_STEPPED_P): Likewise.
5604         (CONST_VECTOR_ENCODED_ELT): Likewise.
5605         (const_vec_duplicate_p): Check for a duplicated vector encoding.
5606         (unwrap_const_vec_duplicate): Likewise.
5607         (const_vec_series_p): Check for a non-duplicated vector encoding.
5608         Say that the function only returns true for integer vectors.
5609         * emit-rtl.c: Include rtx-vector-builder.h.
5610         (gen_const_vec_duplicate_1): Delete.
5611         (gen_const_vector): Call gen_const_vec_duplicate instead of
5612         gen_const_vec_duplicate_1.
5613         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
5614         (gen_const_vec_duplicate): Use rtx_vector_builder.
5615         (gen_const_vec_series): Likewise.
5616         (gen_rtx_CONST_VECTOR): Likewise.
5617         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
5618         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5619         Build a new vector rather than modifying a CONST_VECTOR in-place.
5620         (handle_special_swappables): Update call accordingly.
5621         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
5622         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5623         Build a new vector rather than modifying a CONST_VECTOR in-place.
5624         (handle_special_swappables): Update call accordingly.
5625
5626 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5627
5628         * simplify-rtx.c (simplify_const_binary_operation): Use
5629         CONST_VECTOR_ELT instead of XVECEXP.
5630
5631 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5632
5633         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
5634         the selector elements to be different from the data elements
5635         if the selector is a VECTOR_CST.
5636         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
5637         ssizetype for the selector.
5638
5639 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5640
5641         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
5642         before testing each element individually.
5643         * tree-vect-generic.c (lower_vec_perm): Likewise.
5644
5645 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5646
5647         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
5648         * selftest-run-tests.c (selftest::run_tests): Call it.
5649         * vector-builder.h (vector_builder::operator ==): New function.
5650         (vector_builder::operator !=): Likewise.
5651         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
5652         (vec_perm_indices::all_from_input_p): New function.
5653         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5654         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
5655         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
5656         instead of reading the VECTOR_CST directly.  Detect whether both
5657         vector inputs are the same before constructing the vec_perm_indices,
5658         and update the number of inputs argument accordingly.  Use the
5659         utility functions added above.  Only construct sel2 if we need to.
5660
5661 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5662
5663         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
5664         the broadcast of the low byte.
5665         (expand_mult_highpart): Use an explicit encoding for the permutes.
5666         * optabs-query.c (can_mult_highpart_p): Likewise.
5667         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
5668         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5669         (vectorizable_bswap): Likewise.
5670         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
5671         explicit encoding for the power-of-2 permutes.
5672         (vect_permute_store_chain): Likewise.
5673         (vect_grouped_load_supported): Likewise.
5674         (vect_permute_load_chain): Likewise.
5675
5676 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5677
5678         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
5679         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
5680         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
5681         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5682         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
5683         (vect_gen_perm_mask_any): Likewise.
5684
5685 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5686
5687         * int-vector-builder.h: New file.
5688         * vec-perm-indices.h: Include int-vector-builder.h.
5689         (vec_perm_indices): Redefine as an int_vector_builder.
5690         (auto_vec_perm_indices): Delete.
5691         (vec_perm_builder): Redefine as a stand-alone class.
5692         (vec_perm_indices::vec_perm_indices): New function.
5693         (vec_perm_indices::clamp): Likewise.
5694         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
5695         (vec_perm_indices::new_vector): New function.
5696         (vec_perm_indices::new_expanded_vector): Update for new
5697         vec_perm_indices class.
5698         (vec_perm_indices::rotate_inputs): New function.
5699         (vec_perm_indices::all_in_range_p): Operate directly on the
5700         encoded form, without computing elided elements.
5701         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
5702         encoding.  Update for new vec_perm_indices class.
5703         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
5704         the given vec_perm_builder.
5705         (expand_vec_perm_var): Update vec_perm_builder constructor.
5706         (expand_mult_highpart): Use vec_perm_builder instead of
5707         auto_vec_perm_indices.
5708         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
5709         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
5710         or double series encoding as appropriate.
5711         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
5712         vec_perm_indices instead of auto_vec_perm_indices.
5713         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5714         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5715         (vect_permute_store_chain): Likewise.
5716         (vect_grouped_load_supported): Likewise.
5717         (vect_permute_load_chain): Likewise.
5718         (vect_shift_permute_load_chain): Likewise.
5719         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5720         (vect_transform_slp_perm_load): Likewise.
5721         (vect_schedule_slp_instance): Likewise.
5722         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5723         (vectorizable_mask_load_store): Likewise.
5724         (vectorizable_bswap): Likewise.
5725         (vectorizable_store): Likewise.
5726         (vectorizable_load): Likewise.
5727         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
5728         vec_perm_indices instead of auto_vec_perm_indices.  Use
5729         tree_to_vec_perm_builder to read the vector from a tree.
5730         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
5731         vec_perm_builder instead of a vec_perm_indices.
5732         (have_whole_vector_shift): Use vec_perm_builder and
5733         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
5734         truncation to calc_vec_perm_mask_for_shift.
5735         (vect_create_epilog_for_reduction): Likewise.
5736         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
5737         from auto_vec_perm_indices to vec_perm_indices.
5738         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5739         instead of changing individual elements.
5740         (aarch64_vectorize_vec_perm_const): Use new_vector to install
5741         the vector in d.perm.
5742         * config/arm/arm.c (expand_vec_perm_d::perm): Change
5743         from auto_vec_perm_indices to vec_perm_indices.
5744         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5745         instead of changing individual elements.
5746         (arm_vectorize_vec_perm_const): Use new_vector to install
5747         the vector in d.perm.
5748         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
5749         Update vec_perm_builder constructor.
5750         (rs6000_expand_interleave): Likewise.
5751         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
5752         (rs6000_expand_interleave): Likewise.
5753
5754 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5755
5756         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
5757         to qimode could truncate the indices.
5758         * optabs.c (expand_vec_perm_var): Likewise.
5759
5760 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5761
5762         * Makefile.in (OBJS): Add vec-perm-indices.o.
5763         * vec-perm-indices.h: New file.
5764         * vec-perm-indices.c: Likewise.
5765         * target.h (vec_perm_indices): Replace with a forward class
5766         declaration.
5767         (auto_vec_perm_indices): Move to vec-perm-indices.h.
5768         * optabs.h: Include vec-perm-indices.h.
5769         (expand_vec_perm): Delete.
5770         (selector_fits_mode_p, expand_vec_perm_var): Declare.
5771         (expand_vec_perm_const): Declare.
5772         * target.def (vec_perm_const_ok): Replace with...
5773         (vec_perm_const): ...this new hook.
5774         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
5775         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
5776         * doc/tm.texi: Regenerate.
5777         * optabs.def (vec_perm_const): Delete.
5778         * doc/md.texi (vec_perm_const): Likewise.
5779         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
5780         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
5781         expand_vec_perm for constant permutation vectors.  Assert that
5782         the mode of variable permutation vectors is the integer equivalent
5783         of the mode that is being permuted.
5784         * optabs-query.h (selector_fits_mode_p): Declare.
5785         * optabs-query.c: Include vec-perm-indices.h.
5786         (selector_fits_mode_p): New function.
5787         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
5788         is defined, instead of checking whether the vec_perm_const_optab
5789         exists.  Use targetm.vectorize.vec_perm_const instead of
5790         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
5791         fit in the vector mode before using a variable permute.
5792         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
5793         vec_perm_indices instead of an rtx.
5794         (expand_vec_perm): Replace with...
5795         (expand_vec_perm_const): ...this new function.  Take the selector
5796         as a vec_perm_indices rather than an rtx.  Also take the mode of
5797         the selector.  Update call to shift_amt_for_vec_perm_mask.
5798         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
5799         Use vec_perm_indices::new_expanded_vector to expand the original
5800         selector into bytes.  Check whether the indices fit in the vector
5801         mode before using a variable permute.
5802         (expand_vec_perm_var): Make global.
5803         (expand_mult_highpart): Use expand_vec_perm_const.
5804         * fold-const.c: Includes vec-perm-indices.h.
5805         * tree-ssa-forwprop.c: Likewise.
5806         * tree-vect-data-refs.c: Likewise.
5807         * tree-vect-generic.c: Likewise.
5808         * tree-vect-loop.c: Likewise.
5809         * tree-vect-slp.c: Likewise.
5810         * tree-vect-stmts.c: Likewise.
5811         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
5812         Delete.
5813         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
5814         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
5815         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
5816         (aarch64_vectorize_vec_perm_const): ...this new function.
5817         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5818         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5819         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
5820         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
5821         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5822         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5823         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
5824         into...
5825         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
5826         check for NEON modes.
5827         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
5828         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
5829         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
5830         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
5831         into...
5832         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
5833         the old VEC_PERM_CONST conditions.
5834         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
5835         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
5836         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
5837         (ia64_vectorize_vec_perm_const_ok): Merge into...
5838         (ia64_vectorize_vec_perm_const): ...this new function.
5839         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
5840         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
5841         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
5842         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
5843         * config/mips/mips.c (mips_expand_vec_perm_const)
5844         (mips_vectorize_vec_perm_const_ok): Merge into...
5845         (mips_vectorize_vec_perm_const): ...this new function.
5846         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
5847         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
5848         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
5849         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
5850         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
5851         (rs6000_expand_vec_perm_const): Delete.
5852         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
5853         Delete.
5854         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5855         (altivec_expand_vec_perm_const_le): Take each operand individually.
5856         Operate on constant selectors rather than rtxes.
5857         (altivec_expand_vec_perm_const): Likewise.  Update call to
5858         altivec_expand_vec_perm_const_le.
5859         (rs6000_expand_vec_perm_const): Delete.
5860         (rs6000_vectorize_vec_perm_const_ok): Delete.
5861         (rs6000_vectorize_vec_perm_const): New function.
5862         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5863         an element count and rtx array.
5864         (rs6000_expand_extract_even): Update call accordingly.
5865         (rs6000_expand_interleave): Likewise.
5866         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
5867         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
5868         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
5869         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
5870         (rs6000_expand_vec_perm_const): Delete.
5871         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5872         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5873         (altivec_expand_vec_perm_const_le): Take each operand individually.
5874         Operate on constant selectors rather than rtxes.
5875         (altivec_expand_vec_perm_const): Likewise.  Update call to
5876         altivec_expand_vec_perm_const_le.
5877         (rs6000_expand_vec_perm_const): Delete.
5878         (rs6000_vectorize_vec_perm_const_ok): Delete.
5879         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
5880         reference to the SPE evmerge intructions.
5881         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5882         an element count and rtx array.
5883         (rs6000_expand_extract_even): Update call accordingly.
5884         (rs6000_expand_interleave): Likewise.
5885         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
5886         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
5887         new function.
5888         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5889
5890 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5891
5892         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
5893         vector mode and that that mode matches the mode of the data
5894         being permuted.
5895         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
5896         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
5897         directly using expand_vec_perm_1 when forcing selectors into
5898         registers.
5899         (expand_vec_perm_var): New function, split out from expand_vec_perm.
5900
5901 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5902
5903         * optabs-query.h (can_vec_perm_p): Delete.
5904         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
5905         * optabs-query.c (can_vec_perm_p): Split into...
5906         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
5907         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
5908         particular selector is valid.
5909         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5910         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5911         (vect_grouped_load_supported): Likewise.
5912         (vect_shift_permute_load_chain): Likewise.
5913         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5914         (vect_transform_slp_perm_load): Likewise.
5915         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5916         (vectorizable_bswap): Likewise.
5917         (vect_gen_perm_mask_checked): Likewise.
5918         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
5919         implementations of variable permutation vectors into account
5920         when deciding which selector to use.
5921         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
5922         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
5923         with a false third argument.
5924         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
5925         to test whether the constant selector is valid and can_vec_perm_var_p
5926         to test whether a variable selector is valid.
5927
5928 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5929
5930         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
5931         * optabs-query.c (can_vec_perm_p): Likewise.
5932         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
5933         instead of vec_perm_indices.
5934         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
5935         (vect_gen_perm_mask_checked): Likewise,
5936         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
5937         (vect_gen_perm_mask_checked): Likewise,
5938
5939 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5940
5941         * optabs-query.h (qimode_for_vec_perm): Declare.
5942         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
5943         (qimode_for_vec_perm): ...this new function.
5944         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
5945
5946 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5947
5948         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
5949         does not have a conditional at the top.
5950
5951 2018-01-02  Richard Biener  <rguenther@suse.de>
5952
5953         * ipa-inline.c (big_speedup_p): Fix expression.
5954
5955 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
5956
5957         PR target/81616
5958         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
5959         for generic 4->6.
5960
5961 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
5962
5963         PR target/81616
5964         Generic tuning.
5965         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
5966         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
5967         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
5968         cond_taken_branch_cost 3->4.
5969
5970 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
5971
5972         PR tree-optimization/83581
5973         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
5974         TODO_cleanup_cfg if any changes have been made.
5975
5976         PR middle-end/83608
5977         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
5978         convert_modes if target mode has the right side, but different mode
5979         class.
5980
5981         PR middle-end/83609
5982         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
5983         last argument when extracting from CONCAT.  If either from_real or
5984         from_imag is NULL, use expansion through memory.  If result is not
5985         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
5986         the parts directly to inner mode, if even that fails, use expansion
5987         through memory.
5988
5989         PR middle-end/83623
5990         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
5991         check for bswap in mode rather than HImode and use that in expand_unop
5992         too.
5993 \f
5994 Copyright (C) 2018 Free Software Foundation, Inc.
5995
5996 Copying and distribution of this file, with or without modification,
5997 are permitted in any medium without royalty provided the copyright
5998 notice and this notice are preserved.