re PR bootstrap/80867 (gnat bootstrap broken on powerpc64le-linux-gnu with -O3)
[platform/upstream/gcc.git] / gcc / ChangeLog
1 2018-01-29  Richard Biener <rguenther@suse.de>
2             Kelvin Nilsen  <kelvin@gcc.gnu.org>
3
4         PR bootstrap/80867
5         * tree-vect-stmts.c (vectorizable_call): Don't call
6         targetm.vectorize_builtin_md_vectorized_function if callee is
7         NULL.
8
9 2018-01-22 Carl Love <cel@us.ibm.com>
10
11         * doc/extend.tex: Fix typo in second arg in
12         __builtin_bcdadd_{lt|eq|gt|ov} and __builtin_bcdsub_{lt|eq|gt|ov}.
13
14 2018-01-29  Richard Biener  <rguenther@suse.de>
15
16         PR tree-optimization/84086
17         * tree-ssanames.c: Include cfgloop.h and tree-scalar-evolution.h.
18         (flush_ssaname_freelist): When SSA names were released reset
19         the SCEV hash table.
20
21 2018-01-29  Richard Biener  <rguenther@suse.de>
22
23         PR tree-optimization/84057
24         * tree-ssa-loop-ivcanon.c (unloop_loops): Deal with already
25         removed paths when removing edges.
26
27 2018-01-27  H.J. Lu  <hongjiu.lu@intel.com>
28
29         * doc/invoke.texi: Replace -mfunction-return==@var{choice} with
30         -mfunction-return=@var{choice}.
31
32 2018-01-27  Bernd Edlinger  <bernd.edlinger@hotmail.de>
33
34         PR diagnostic/84034
35         * diagnostic-show-locus.c (get_line_width_without_trailing_whitespace):
36         Handle CR like TAB.
37         (layout::print_source_line): Likewise.
38         (test_get_line_width_without_trailing_whitespace): Add test cases.
39
40 2018-01-27  Jakub Jelinek  <jakub@redhat.com>
41
42         PR middle-end/84040
43         * sched-deps.c (sched_macro_fuse_insns): Return immediately for
44         debug insns.
45
46 2018-01-26  Jim Wilson  <jimw@sifive.com>
47
48         * config/riscv/riscv.h (MAX_FIXED_MODE_SIZE): New.
49
50         * config/riscv/elf.h (LIB_SPEC): Don't include -lgloss when nosys.specs
51         specified.
52
53 2018-01-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
54
55         * config/aarch64/aarch64.md: Add peepholes for CMP + SUB -> SUBS
56         and CMP + SUB-immediate -> SUBS.
57
58 2018-01-26  Martin Sebor  <msebor@redhat.com>
59
60         PR tree-optimization/83896
61         * tree-ssa-strlen.c (get_string_len): Rename...
62         (get_string_cst_length): ...to this.  Return HOST_WIDE_INT.
63         Avoid assuming length is constant.
64         (handle_char_store): Use HOST_WIDE_INT for string length.
65
66 2018-01-26  Uros Bizjak  <ubizjak@gmail.com>
67
68         PR target/81763
69         * config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
70         to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
71
72 2018-01-26  Richard Biener  <rguenther@suse.de>
73
74         PR rtl-optimization/84003
75         * dse.c (record_store): Only record redundant stores when
76         the earlier store aliases at least all accesses the later one does.
77
78 2018-01-26  Jakub Jelinek  <jakub@redhat.com>
79
80         PR rtl-optimization/83985
81         * dce.c (deletable_insn_p): Return false for separate shrink wrapping
82         REG_CFA_RESTORE insns.
83         (delete_unmarked_insns): Don't ignore separate shrink wrapping
84         REG_CFA_RESTORE insns here.
85
86         PR c/83989
87         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Don't
88         use SSA_NAME_VAR as base for SSA_NAMEs with non-NULL SSA_NAME_VAR.
89
90 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
91
92         * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3.
93         * config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... .
94         (arc_init): Likewise.
95         (arc_override_options): Likewise.
96         (arc_file_start): Choose Tag_ARC_CPU_variation based on arc_tune
97         value.
98         (hwloop_fail): Use TARGET_DBNZ when we want to check for dbnz insn
99         support.
100         * config/arc/arc.h (TARGET_DBNZ): Define.
101         * config/arc/arc.md (attr tune): Add core_3, use ARC_TUNE_... to
102         properly set the tune attribute.
103         (dbnz): Use TARGET_DBNZ guard.
104         * config/arc/arc.opt (mtune): Add core3 option.
105
106 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
107
108         * config/arc/arc.c (arc_delegitimize_address_0): Refactored to
109         recognize new pic like addresses.
110         (arc_delegitimize_address): Clean up.
111
112 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
113
114         * config/arc/arc-arches.def: Option mrf16 valid for all
115         architectures.
116         * config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
117         * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
118         * config/arc/arc-options.def (FL_RF16): Add mrf16 option.
119         * config/arc/arc-tables.opt: Regenerate.
120         * config/arc/arc.c (arc_conditional_register_usage): Handle
121         reduced register file case.
122         (arc_file_start): Set must have build attributes.
123         * config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
124         mrf16 option value.
125         * config/arc/arc.opt (mrf16): Add new option.
126         * config/arc/elf.h (ATTRIBUTE_PCS): Define.
127         * config/arc/genmultilib.awk: Handle new mrf16 option.
128         * config/arc/linux.h (ATTRIBUTE_PCS): Define.
129         * config/arc/t-multilib: Regenerate.
130         * doc/invoke.texi (ARC Options): Document mrf16 option.
131
132 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
133
134         * config/arc/arc-protos.h: Add arc_is_secure_call_p proto.
135         * config/arc/arc.c (arc_handle_secure_attribute): New function.
136         (arc_attribute_table): Add 'secure_call' attribute.
137         (arc_print_operand): Print secure call operand.
138         (arc_function_ok_for_sibcall): Don't optimize tail calls when
139         secure.
140         (arc_is_secure_call_p): New function.  * config/arc/arc.md
141         (call_i): Add support for sjli instruction.
142         (call_value_i): Likewise.
143         * config/arc/constraints.md (Csc): New constraint.
144
145 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
146             John Eric Martin <John.Martin@emmicro-us.com>
147
148         * config/arc/arc-protos.h: Add arc_is_jli_call_p proto.
149         * config/arc/arc.c (_arc_jli_section): New struct.
150         (arc_jli_section): New type.
151         (rc_jli_sections): New static variable.
152         (arc_handle_jli_attribute): New function.
153         (arc_attribute_table): Add jli_always and jli_fixed attribute.
154         (arc_file_end): New function.
155         (TARGET_ASM_FILE_END): Define.
156         (arc_print_operand): Reuse 'S' letter for JLI output instruction.
157         (arc_add_jli_section): New function.
158         (jli_call_scan): Likewise.
159         (arc_reorg): Call jli_call_scan.
160         (arc_output_addsi): Remove 'S' from printing asm operand.
161         (arc_is_jli_call_p): New function.
162         * config/arc/arc.md (movqi_insn): Remove 'S' from printing asm
163         operand.
164         (movhi_insn): Likewise.
165         (movsi_insn): Likewise.
166         (movsi_set_cc_insn): Likewise.
167         (loadqi_update): Likewise.
168         (load_zeroextendqisi_update): Likewise.
169         (load_signextendqisi_update): Likewise.
170         (loadhi_update): Likewise.
171         (load_zeroextendhisi_update): Likewise.
172         (load_signextendhisi_update): Likewise.
173         (loadsi_update): Likewise.
174         (loadsf_update): Likewise.
175         (movsicc_insn): Likewise.
176         (bset_insn): Likewise.
177         (bxor_insn): Likewise.
178         (bclr_insn): Likewise.
179         (bmsk_insn): Likewise.
180         (bicsi3_insn): Likewise.
181         (cmpsi_cc_c_insn): Likewise.
182         (movsi_ne): Likewise.
183         (movsi_cond_exec): Likewise.
184         (clrsbsi2): Likewise.
185         (norm_f): Likewise.
186         (normw): Likewise.
187         (swap): Likewise.
188         (divaw): Likewise.
189         (flag): Likewise.
190         (sr): Likewise.
191         (kflag): Likewise.
192         (ffs): Likewise.
193         (ffs_f): Likewise.
194         (fls): Likewise.
195         (call_i): Remove 'S' asm letter, add jli instruction.
196         (call_value_i): Likewise.
197         * config/arc/arc.op (mjli-always): New option.
198         * config/arc/constraints.md (Cji): New constraint.
199         * config/arc/fpx.md (addsf3_fpx): Remove 'S' from printing asm
200         operand.
201         (subsf3_fpx): Likewise.
202         (mulsf3_fpx): Likewise.
203         * config/arc/simdext.md (vendrec_insn): Remove 'S' from printing
204         asm operand.
205         * doc/extend.texi (ARC): Document 'jli-always' and 'jli-fixed'
206         function attrbutes.
207         * doc/invoke.texi (ARC): Document mjli-always option.
208
209 2018-01-26  Sebastian Perta  <sebastian.perta@renesas.com>
210
211         * config/rl78/rl78.c: if operand 2 is const avoid addition with 0
212         and use incw and decw where possible
213         * testsuite/gcc.target/rl78/test_addsi3_internal.c: new file
214
215 2018-01-26  Richard Biener  <rguenther@suse.de>
216
217         PR tree-optimization/81082
218         * fold-const.c (fold_plusminus_mult_expr): Do not perform the
219         association if it requires casting to unsigned.
220         * match.pd ((A * C) +- (B * C) -> (A+-B)): New patterns derived
221         from fold_plusminus_mult_expr to catch important cases late when
222         range info is available.
223
224 2018-01-26  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
225
226         * config/i386/sol2.h (USE_HIDDEN_LINKONCE): Remove.
227         * configure.ac (hidden_linkonce): New test.
228         * configure: Regenerate.
229         * config.in: Regenerate.
230
231 2018-01-26  Julia Koval  <julia.koval@intel.com>
232
233         * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
234         _mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
235         _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
236         _mm_mask_bitshuffle_epi64_mask): Fix type.
237         * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
238         USI_FTYPE_V4DI_V4DI_USI): Remove.
239         * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
240         __builtin_ia32_vpshufbitqmb256_mask,
241         __builtin_ia32_vpshufbitqmb128_mask): Fix types.
242         * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
243         * config/i386/sse.md (VI1_AVX512VLBW): Change types.
244
245 2018-01-26  Alan Modra  <amodra@gmail.com>
246
247         PR target/84033
248         * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Exclude
249         UNSPEC_VBPERMQ.  Sort other unspecs.
250
251 2018-01-25  David Edelsohn  <dje.gcc@gmail.com>
252
253         * doc/invoke.texi (PowerPC Options): Document 'native' cpu type.
254
255 2018-01-25  Jan Hubicka  <hubicka@ucw.cz>
256
257         PR middle-end/83055
258         * predict.c (drop_profile): Do not push/pop cfun; update also
259         node->count.
260         (handle_missing_profiles): Fix logic looking for zero profiles.
261
262 2018-01-25  Jakub Jelinek  <jakub@redhat.com>
263
264         PR middle-end/83977
265         * ipa-fnsummary.c (compute_fn_summary): Clear can_change_signature
266         on functions with #pragma omp declare simd or functions with simd
267         attribute.
268         * omp-simd-clone.c (expand_simd_clones): Revert 2018-01-24 change.
269         * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
270         Remove trailing \n from warning_at calls.
271
272 2018-01-25  Tom de Vries  <tom@codesourcery.com>
273
274         PR target/84028
275         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
276         for neutered workers.
277
278 2018-01-24  Joseph Myers  <joseph@codesourcery.com>
279
280         PR target/68467
281         * config/m68k/m68k.c (m68k_promote_function_mode): New function.
282         (TARGET_PROMOTE_FUNCTION_MODE): New macro.
283
284 2017-01-08  Jeff Law  <law@redhat.com>
285
286         PR target/83994
287         * i386.c (get_probe_interval): Move to earlier point.
288         (ix86_compute_frame_layout): If -fstack-clash-protection and
289         the frame is larger than the probe interval, then use pushes
290         to save registers rather than reg->mem moves.
291         (ix86_expand_prologue): Remove conditional for int_registers_saved
292         assertion.
293
294 2018-01-24  Vladimir Makarov  <vmakarov@redhat.com>
295
296         PR target/84014
297         * ira-build.c (setup_min_max_allocno_live_range_point): Set up
298         min/max for never referenced object.
299
300 2018-01-24  Jakub Jelinek  <jakub@redhat.com>
301
302         PR middle-end/83977
303         * tree.c (free_lang_data_in_decl): Don't clear DECL_ABSTRACT_ORIGIN
304         here.
305         * omp-low.c (create_omp_child_function): Remove "omp declare simd"
306         attributes from DECL_ATTRIBUTES (decl) without affecting
307         DECL_ATTRIBUTES (current_function_decl).
308         * omp-simd-clone.c (expand_simd_clones): Ignore DECL_ARTIFICIAL
309         functions with non-NULL DECL_ABSTRACT_ORIGIN.
310
311 2018-01-24  Richard Sandiford  <richard.sandiford@linaro.org>
312
313         PR tree-optimization/83979
314         * fold-const.c (fold_comparison): Use constant_boolean_node
315         instead of boolean_{true,false}_node.
316
317 2018-01-24  Jan Hubicka  <hubicka@ucw.cz>
318
319         * ipa-profile.c (ipa_propagate_frequency_1): Fix logic skipping calls
320         with zero counts.
321
322 2018-01-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
323
324         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
325         Simplify the clause that sets the length attribute.
326         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
327         (*sibcall_nonlocal_sysv<mode>): Clean up code block; simplify the
328         clause that sets the length attribute.
329         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
330
331 2018-01-24  Tom de Vries  <tom@codesourcery.com>
332
333         PR target/83589
334         * config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_2): Define to 1.
335         (nvptx_pc_set, nvptx_condjump_label): New function. Copy from jump.c.
336         Add strict parameter.
337         (prevent_branch_around_nothing): Insert dummy insn between branch to
338         label and label with no ptx insn inbetween.
339         * config/nvptx/nvptx.md (define_insn "fake_nop"): New insn.
340
341 2018-01-24  Tom de Vries  <tom@codesourcery.com>
342
343         PR target/81352
344         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
345         for neutered threads in warp.
346         * config/nvptx/nvptx.md (define_insn "exit"): New insn.
347
348 2018-01-24  Richard Biener  <rguenther@suse.de>
349
350         PR tree-optimization/83176
351         * tree-chrec.c (chrec_fold_plus_1): Handle (signed T){(T) .. }
352         operands.
353
354 2018-01-24  Richard Biener  <rguenther@suse.de>
355
356         PR tree-optimization/82819
357         * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
358         code generating pluses that are no-ops in the target precision.
359
360 2018-01-24  Richard Biener  <rguenther@suse.de>
361
362         PR middle-end/84000
363         * tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind.
364
365 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
366
367         * cfgcleanup.c (try_crossjump_to_edge): Use combine_with_count
368         to merge probabilities.
369         * predict.c (probably_never_executed): Also mark as cold functions
370         with global 0 profile and guessed local profile.
371         * profile-count.c (profile_probability::combine_with_count): New
372         member function.
373         * profile-count.h (profile_probability::operator*,
374         profile_probability::operator*=, profile_probability::operator/,
375         profile_probability::operator/=): Reduce precision to adjusted
376         and set value to guessed on contradictory divisions.
377         (profile_probability::combine_with_freq): Remove.
378         (profile_probability::combine_wiht_count): Declare.
379         (profile_count::force_nonzero):: Set to adjusted.
380         (profile_count::probability_in):: Set quality to adjusted.
381         * tree-ssa-tail-merge.c (replace_block_by): Use
382         combine_with_count.
383
384 2018-01-23  Andrew Waterman  <andrew@sifive.com>
385             Jim Wilson  <jimw@sifive.com>
386
387         * config/riscv/riscv.c (riscv_stack_boundary): New.
388         (riscv_option_override): Set riscv_stack_boundary.  Handle
389         riscv_preferred_stack_boundary_arg.
390         * config/riscv/riscv.h (MIN_STACK_BOUNDARY, ABI_STACK_BOUNDARY): New.
391         (BIGGEST_ALIGNMENT): Set to STACK_BOUNDARY.
392         (STACK_BOUNDARY): Set to riscv_stack_boundary.
393         (RISCV_STACK_ALIGN): Use STACK_BOUNDARY.
394         * config/riscv/riscv.opt (mpreferred-stack-boundary): New.
395         * doc/invoke.tex (RISC-V Options): Add -mpreferred-stack-boundary.
396
397 2018-01-23  H.J. Lu  <hongjiu.lu@intel.com>
398
399         PR target/83905
400         * config/i386/i386.c (ix86_expand_prologue): Use cost reference
401         of struct ix86_frame.
402         (ix86_expand_epilogue): Likewise.  Add a local variable for
403         the reg_save_offset field in struct ix86_frame.
404
405 2018-01-23  Bin Cheng  <bin.cheng@arm.com>
406
407         PR tree-optimization/82604
408         * tree-loop-distribution.c (enum partition_kind): New enum item
409         PKIND_PARTIAL_MEMSET.
410         (partition_builtin_p): Support above new enum item.
411         (generate_code_for_partition): Ditto.
412         (compute_access_range): Differentiate cases that equality can be
413         proven at all loops, the innermost loops or no loops.
414         (classify_builtin_st, classify_builtin_ldst): Adjust call to above
415         function.  Set PKIND_PARTIAL_MEMSET for partition appropriately.
416         (finalize_partitions, distribute_loop): Don't fuse partition of
417         PKIND_PARTIAL_MEMSET kind when distributing 3-level loop nest.
418         (prepare_perfect_loop_nest): Distribute 3-level loop nest only if
419         parloop is enabled.
420
421 2018-01-23  Martin Liska  <mliska@suse.cz>
422
423         * predict.def (PRED_INDIR_CALL): Set probability to PROB_EVEN in
424         order to ignore the predictor.
425         (PRED_POLYMORPHIC_CALL): Likewise.
426         (PRED_RECURSIVE_CALL): Likewise.
427
428 2018-01-23  Martin Liska  <mliska@suse.cz>
429
430         * tree-profile.c (tree_profiling): Print function header to
431         aware reader which function we are working on.
432         * value-prof.c (gimple_find_values_to_profile): Do not print
433         not interesting value histograms.
434
435 2018-01-23  Martin Liska  <mliska@suse.cz>
436
437         * profile-count.h (enum profile_quality): Add
438         profile_uninitialized as the first value. Do not number values
439         as they are zero based.
440         (profile_count::verify): Update sanity check.
441         (profile_probability::verify): Likewise.
442
443 2018-01-23  Nathan Sidwell  <nathan@acm.org>
444
445         * doc/invoke.texi (ffor-scope): Deprecate.
446
447 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
448
449         PR tree-optimization/83510
450         * domwalk.c (set_all_edges_as_executable): New function.
451         (dom_walker::dom_walker): Convert bool param
452         "skip_unreachable_blocks" to enum reachability.  Move setup of
453         edge flags to set_all_edges_as_executable and only do it when
454         reachability is REACHABLE_BLOCKS.
455         * domwalk.h (enum dom_walker::reachability): New enum.
456         (dom_walker::dom_walker): Convert bool param
457         "skip_unreachable_blocks" to enum reachability.
458         (set_all_edges_as_executable): New decl.
459         * graphite-scop-detection.c  (gather_bbs::gather_bbs): Convert
460         from false for "skip_unreachable_blocks" to ALL_BLOCKS for
461         "reachability".
462         * tree-ssa-dom.c (dom_opt_dom_walker::dom_opt_dom_walker): Likewise,
463         but converting true to REACHABLE_BLOCKS.
464         * tree-ssa-sccvn.c (sccvn_dom_walker::sccvn_dom_walker): Likewise.
465         * tree-vrp.c
466         (check_array_bounds_dom_walker::check_array_bounds_dom_walker):
467         Likewise, but converting it to REACHABLE_BLOCKS_PRESERVING_FLAGS.
468         (vrp_dom_walker::vrp_dom_walker): Likewise, but converting it to
469         REACHABLE_BLOCKS.
470         (vrp_prop::vrp_finalize): Call set_all_edges_as_executable
471         if check_all_array_refs will be called.
472
473 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
474
475         * tree.c (selftest::test_location_wrappers): Add more test
476         coverage.
477
478 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
479
480         * sbitmap.c (selftest::test_set_range): Fix memory leaks.
481         (selftest::test_bit_in_range): Likewise.
482
483 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
484
485         PR testsuite/83888
486         * doc/sourcebuild.texi (vect_float): Say that the selector
487         only describes the situation when -funsafe-math-optimizations is on.
488         (vect_float_strict): Document.
489
490 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
491
492         PR tree-optimization/83965
493         * tree-vect-patterns.c (vect_reassociating_reduction_p): New function.
494         (vect_recog_dot_prod_pattern, vect_recog_sad_pattern): Use it
495         instead of checking only for a reduction.
496         (vect_recog_widen_sum_pattern): Likewise.
497
498 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
499
500         * predict.c (probably_never_executed): Only use precise profile info.
501         (compute_function_frequency): Skip after inlining hack since we now
502         have quality checking.
503
504 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
505
506         * profile-count.h (profile_probability::very_unlikely,
507         profile_probability::unlikely, profile_probability::even): Set
508         precision to guessed.
509
510 2018-01-23  Richard Biener  <rguenther@suse.de>
511
512         PR tree-optimization/83963
513         * graphite-scop-detection.c (scop_detection::harmful_loop_in_region):
514         Properly terminate dominator walk when crossing the exit edge not
515         when visiting its source block.
516
517 2018-01-23  Jakub Jelinek  <jakub@redhat.com>
518
519         PR c++/83918
520         * tree.c (maybe_wrap_with_location): Use NON_LVALUE_EXPR rather than
521         VIEW_CONVERT_EXPR to wrap CONST_DECLs.
522
523 2018-01-22  Jakub Jelinek  <jakub@redhat.com>
524
525         PR tree-optimization/83957
526         * omp-expand.c (expand_omp_for_generic): Ignore virtual PHIs.  Remove
527         semicolon after for body surrounded by braces.
528
529         PR tree-optimization/83081
530         * profile-count.h (profile_probability::split): New method.
531         * dojump.c (do_jump_1) <case TRUTH_ANDIF_EXPR, case TRUTH_ORIF_EXPR>:
532         Use profile_probability::split.
533         (do_compare_rtx_and_jump): Fix adjustment of probabilities
534         when splitting a single conditional jump into 2.
535
536 2018-01-22  David Malcolm  <dmalcolm@redhat.com>
537
538         PR tree-optimization/69452
539         * tree-ssa-loop-im.c (class move_computations_dom_walker): Remove
540         decl.
541
542 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
543
544         * config/rl78/rl78-expand.md: New define_expand "bswaphi2"
545         * config/rl78/rl78-virt.md: New define_insn "*bswaphi2_virt"
546         * config/rl78/rl78-real.md: New define_insn "*bswaphi2_real"
547
548 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
549
550         * config/rl78/rl78-protos.h: New function declaration rl78_split_movdi
551         * config/rl78/rl78.md: New define_expand "movdi"
552         * config/rl78/rl78.c: New function definition rl78_split_movdi
553
554 2018-01-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
555
556         PR target/83862
557         * config/rs6000/rs6000-protos.h (rs6000_split_signbit): Delete,
558         no longer used.
559         * config/rs6000/rs6000.c (rs6000_split_signbit): Likewise.
560         * config/rs6000/rs6000.md (signbit<mode>2): Change code for IEEE
561         128-bit to produce an UNSPEC move to get the double word with the
562         signbit and then a shift directly to do signbit.
563         (signbit<mode>2_dm): Replace old IEEE 128-bit signbit
564         implementation with a new version that just does either a direct
565         move or a regular move.  Move memory interface to separate insns.
566         Move insns so they are next to the expander.
567         (signbit<mode>2_dm_mem_be): New combiner insns to combine load
568         with signbit move.  Split big and little endian case.
569         (signbit<mode>2_dm_mem_le): Likewise.
570         (signbit<mode>2_dm_<su>ext): Delete, no longer used.
571         (signbit<mode>2_dm2): Likewise.
572
573 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
574
575         * config/rl78/rl78.md: New define_expand "anddi3".
576
577 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
578
579         * config/rl78/rl78.md: New define_expand "umindi3".
580
581 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
582
583         * config/rl78/rl78.md: New define_expand "smindi3".
584
585 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
586
587         * config/rl78/rl78.md: New define_expand "smaxdi3".
588
589 2018-01-22 Carl Love <cel@us.ibm.com>
590
591         * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
592         LVX_V1TI): Add macro expansion.
593         * config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
594         definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
595         VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
596         * config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
597         Change check to determine if the instruction is a byte reversing
598         entry.  Fix typo in comment.
599         * config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
600         for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
601         Add def_builtin calls for new builtins.
602         * config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
603         Add define_insn expansion.
604
605 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
606
607         * config/rl78/rl78.md: New define_expand "umaxdi3".
608
609 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
610
611         * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
612         for non-QImode registers
613
614 2018-01-22  Richard Biener  <rguenther@suse.de>
615
616         PR tree-optimization/83963
617         * graphite-scop-detection.c (scop_detection::get_sese): Delay
618         including the loop exit block.
619         (scop_detection::merge_sese): Likewise.
620         (scop_detection::add_scop): Do it here instead.
621
622 2018-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
623
624         * doc/sourcebuild.texi (arm_softfloat): Document.
625
626 2018-01-21  John David Anglin  <danglin@gcc.gnu.org>
627
628         PR gcc/77734
629         * config/pa/pa.c (pa_function_ok_for_sibcall): Use
630         targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
631         Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
632
633 2018-01-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
634             David Edelsohn <dje.gcc@gmail.com>
635
636         PR target/83946
637         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
638         Change "crset eq" to "crset 2".
639         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
640         (*call_indirect_aix<mode>_nospec): Likewise.
641         (*call_value_indirect_aix<mode>_nospec): Likewise.
642         (*call_indirect_elfv2<mode>_nospec): Likewise.
643         (*call_value_indirect_elfv2<mode>_nospec): Likewise.
644         (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
645         change assembly output from . to $.
646         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
647         (indirect_jump<mode>_nospec): Change assembly output from . to $.
648         (*tablejump<mode>_internal1_nospec): Likewise.
649
650 2018-01-21  Oleg Endo  <olegendo@gcc.gnu.org>
651
652         PR target/80870
653         * config/sh/sh_optimize_sett_clrt.cc:
654         Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
655
656 2018-01-20  Richard Sandiford  <richard.sandiford@linaro.org>
657
658         PR tree-optimization/83940
659         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
660         offset_dt to vect_constant_def rather than vect_unknown_def_type.
661         (vect_check_load_store_mask): Add a mask_dt_out parameter and
662         use it to pass back the definition type.
663         (vect_check_store_rhs): Likewise rhs_dt_out.
664         (vect_build_gather_load_calls): Add a mask_dt argument and use
665         it instead of a call to vect_is_simple_use.
666         (vectorizable_store): Update calls to vect_check_load_store_mask
667         and vect_check_store_rhs.  Use the dt returned by the latter instead
668         of scatter_src_dt.  Use the cached mask_dt and gs_info.offset_dt
669         instead of calls to vect_is_simple_use.  Pass the scalar rather
670         than the vector operand to vect_is_simple_use when handling
671         second and subsequent copies of an rhs value.
672         (vectorizable_load): Update calls to vect_check_load_store_mask
673         and vect_build_gather_load_calls.  Use the cached mask_dt and
674         gs_info.offset_dt instead of calls to vect_is_simple_use.
675
676 2018-01-20  Jakub Jelinek  <jakub@redhat.com>
677
678         PR middle-end/83945
679         * tree-emutls.c: Include gimplify.h.
680         (lower_emutls_2): New function.
681         (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
682         with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
683         it before further processing.
684
685         PR target/83930
686         * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
687         UINTVAL (trueop1) instead of INTVAL (op1).
688
689 2018-01-19  Jakub Jelinek  <jakub@redhat.com>
690
691         PR debug/81570
692         PR debug/83728
693         * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
694         INCOMING_FRAME_SP_OFFSET if not defined.
695         (scan_trace): Add ENTRY argument.  If true and
696         DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
697         emit a note to adjust the CFA offset.
698         (create_cfi_notes): Adjust scan_trace callers.
699         (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
700         INCOMING_FRAME_SP_OFFSET in the CIE.
701         * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
702         * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
703         Likewise.
704         * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
705         * doc/tm.texi: Regenerated.
706
707 2018-01-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
708
709         PR rtl-optimization/83147
710         * lra-constraints.c (remove_inheritance_pseudos): Use
711         lra_substitute_pseudo_within_insn.
712
713 2018-01-19  Tom de Vries  <tom@codesourcery.com>
714             Cesar Philippidis  <cesar@codesourcery.com>
715
716         PR target/83920
717         * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
718
719 2018-01-19  Cesar Philippidis  <cesar@codesourcery.com>
720
721         PR target/83790
722         * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
723         spaces for function labels.
724
725 2018-01-19  Martin Liska  <mliska@suse.cz>
726
727         * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
728         (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
729         (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
730         (PRED_OPCODE_POSITIVE): Change from 64 to 59.
731         (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
732         (PRED_CONST_RETURN): Change from 69 to 65.
733         (PRED_NULL_RETURN): Change from 91 to 71.
734         (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
735         (PRED_LOOP_GUARD): Change from 66 to 73.
736
737 2018-01-19  Martin Liska  <mliska@suse.cz>
738
739         * predict.c (predict_insn_def): Add new assert.
740         (struct branch_predictor): Change type to signed integer.
741         (test_prediction_value_range): Amend test to cover
742         PROB_UNINITIALIZED.
743         * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
744         (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
745         (PRED_LOOP_ITERATIONS_MAX): Likewise.
746         (PRED_LOOP_IV_COMPARE): Likewise.
747         * predict.h (PROB_UNINITIALIZED): Define new constant.
748
749 2018-01-19  Martin Liska  <mliska@suse.cz>
750
751         * predict.c (dump_prediction): Add new format for
752         analyze_brprob.py script which is enabled with -details
753         suboption.
754         * profile-count.h (precise_p): New function.
755
756 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
757
758         PR tree-optimization/83922
759         * tree-vect-loop.c (vect_verify_full_masking): Return false if
760         there are no statements that need masking.
761         (vect_active_double_reduction_p): New function.
762         (vect_analyze_loop_operations): Use it when handling phis that
763         are not in the loop header.
764
765 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
766
767         PR tree-optimization/83914
768         * tree-vect-loop.c (vectorizable_induction): Don't convert
769         init_expr or apply the peeling adjustment for inductions
770         that are nested within the vectorized loop.
771
772 2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
773
774         * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
775         instead of NEG.
776
777 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
778
779         PR sanitizer/81715
780         PR testsuite/83882
781         * function.h (gimplify_parameters): Add gimple_seq * argument.
782         * function.c: Include gimple.h and options.h.
783         (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
784         for the added local temporaries if needed.
785         * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
786         if there are any parameter cleanups, wrap whole body into a
787         try/finally with the cleanups.
788
789 2018-01-18  Wilco Dijkstra  <wdijkstr@arm.com>
790
791         PR target/82964
792         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
793         Use GET_MODE_CLASS for scalar floating point.
794
795 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
796
797         PR ipa/82256
798         patch by PaX Team
799         * cgraphclones.c (cgraph_node::create_version_clone_with_body):
800         Fix call of call_cgraph_insertion_hooks.
801
802 2018-01-18  Martin Sebor  <msebor@redhat.com>
803
804         * doc/invoke.texi (-Wclass-memaccess): Tweak text.
805
806 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
807
808         PR ipa/83619
809         * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
810         frequencies.
811
812 2018-01-18  Boris Kolpackov  <boris@codesynthesis.com>
813
814         PR other/70268
815         * common.opt: (-ffile-prefix-map): New option.
816         * opts.c (common_handle_option): Defer it.
817         * opts-global.c (handle_common_deferred_options): Handle it.
818         * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
819         * file-prefix-map.h: New file.
820         (remap_debug_filename, add_debug_prefix_map): ...here.
821         (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
822         * final.c (debug_prefix_map, add_debug_prefix_map
823         remap_debug_filename): Move to...
824         * file-prefix-map.c: New file.
825         (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
826         generalize, get rid of alloca(), use strrchr() instead of strchr().
827         (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
828         Implement in terms of add_prefix_map().
829         (remap_macro_filename, remap_debug_filename): Implement in term of
830         remap_filename().
831         * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
832         * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
833         * dbxout.c: Include file-prefix-map.h.
834         * varasm.c: Likewise.
835         * vmsdbgout.c: Likewise.
836         * xcoffout.c: Likewise.
837         * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
838         * doc/cppopts.texi (-fmacro-prefix-map): Document.
839         * doc/invoke.texi (-ffile-prefix-map): Document.
840         (-fdebug-prefix-map): Update description.
841
842 2018-01-18  Martin Liska  <mliska@suse.cz>
843
844         * config/i386/i386.c (indirect_thunk_name): Document that also
845         lfence is emitted.
846         (output_indirect_thunk): Document why both instructions
847         (pause and lfence) are generated.
848
849 2018-01-18  Richard Biener  <rguenther@suse.de>
850
851         PR tree-optimization/83887
852         * graphite-scop-detection.c
853         (scop_detection::get_nearest_dom_with_single_entry): Remove.
854         (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
855         (scop_detection::merge_sese): Re-implement with a flood-fill
856         algorithm that properly finds a SESE region if it exists.
857
858 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
859
860         PR c/61240
861         * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
862         pointer_diff optimizations use view_convert instead of convert.
863
864 2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
865
866         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
867         Generate different code for -mno-speculate-indirect-jumps.
868         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
869         (*call_indirect_aix<mode>): Disable for
870         -mno-speculate-indirect-jumps.
871         (*call_indirect_aix<mode>_nospec): New define_insn.
872         (*call_value_indirect_aix<mode>): Disable for
873         -mno-speculate-indirect-jumps.
874         (*call_value_indirect_aix<mode>_nospec): New define_insn.
875         (*sibcall_nonlocal_sysv<mode>): Generate different code for
876         -mno-speculate-indirect-jumps.
877         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
878
879 2018-01-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
880
881         * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
882         long double type, set the flags for noting the default long double
883         type, even if we don't pass or return a long double type.
884
885 2018-01-17  Jan Hubicka  <hubicka@ucw.cz>
886
887         PR ipa/83051
888         * ipa-inline.c (flatten_function): Do not overwrite final inlining
889         failure.
890
891 2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>
892
893         * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
894         support for merge[hl].
895         (fold_mergehl_helper): New helper function.
896         (tree-vector-builder.h): New #include for tree_vector_builder usage.
897         * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
898         (altivec_vmrglw_direct): Add xxmrglw insn.
899
900 2018-01-17  Andrew Waterman  <andrew@sifive.com>
901
902         * config/riscv/riscv.c (riscv_conditional_register_usage): If
903         UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
904
905 2018-01-17  David Malcolm  <dmalcolm@redhat.com>
906
907         PR lto/83121
908         * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
909         call the lto_location_cache before reading the
910         DECL_SOURCE_LOCATION of the types.
911
912 2018-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
913             Richard Sandiford  <richard.sandiford@linaro.org>
914
915         * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
916         * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
917         (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
918         SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
919         * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
920         Add declaration.
921         * config/aarch64/constraints.md (aarch64_movti_operand):
922         Limit immediates.
923         * config/aarch64/predicates.md (Uti): Add new constraint.
924
925 2018-01-17 Carl Love  <cel@us.ibm.com>
926         * config/rs6000/vsx.md (define_expand xl_len_r,
927         define_expand stxvl, define_expand *stxvl): Add match_dup argument.
928         (define_insn): Add, match_dup 1 argument to define_insn stxvll and
929         lxvll.
930         (define_expand, define_insn): Move the shift left from  the
931         define_insn to the define_expand for lxvl and stxvl instructions.
932         * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
933         and XL_LEN_R definitions to PURE.
934
935 2018-01-17  Uros Bizjak  <ubizjak@gmail.com>
936
937         * config/i386/i386.c (indirect_thunk_name): Declare regno
938         as unsigned int.  Compare regno with INVALID_REGNUM.
939         (output_indirect_thunk): Ditto.
940         (output_indirect_thunk_function): Ditto.
941         (ix86_code_end): Declare regno as unsigned int.  Use INVALID_REGNUM
942         in the call to output_indirect_thunk_function.
943
944 2018-01-17  Richard Sandiford  <richard.sandiford@linaro.org>
945
946         PR middle-end/83884
947         * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
948         rather than the size of inner_type to determine the stack slot size
949         when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
950
951 2018-01-16  Sebastian Peryt  <sebastian.peryt@intel.com>
952
953         PR target/83546
954         * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
955         to PTA_SILVERMONT.
956
957 2018-01-16  Michael Meissner  <meissner@linux.vnet.ibm.com>
958
959         * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
960         endian Linux systems to optionally enable multilibs for selecting
961         the long double type if the user configured an explicit type.
962         * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
963         have no long double multilibs if not defined.
964         * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
965         warn if the user used -mabi={ieee,ibm}longdouble and we built
966         multilibs for long double.
967         * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
968         appropriate multilib option.
969         (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
970         multilib options.
971         * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
972         for building long double multilibs.
973         * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
974
975 2018-01-16  John David Anglin  <danglin@gcc.gnu.org>
976
977         * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
978         copies.
979
980         * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
981         64 bits.
982         * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
983         128 bits.
984
985         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
986         variables.
987
988         * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
989         return value.
990
991 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
992
993         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
994         ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
995
996 2018-01-16  Kelvin Nilsen  <kelvin@gcc.gnu.org>
997
998         * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
999         different rtl trees depending on TARGET_64BIT.
1000         (rs6000_gen_lvx): Likewise.
1001
1002 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
1003
1004         * config/visium/visium.md (nop): Tweak comment.
1005         (hazard_nop): Likewise.
1006
1007 2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1008
1009         * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
1010         -mspeculate-indirect-jumps.
1011         * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
1012         for -mno-speculate-indirect-jumps.
1013         (*call_indirect_elfv2<mode>_nospec): New define_insn.
1014         (*call_value_indirect_elfv2<mode>): Disable for
1015         -mno-speculate-indirect-jumps.
1016         (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
1017         (indirect_jump): Emit different RTL for
1018         -mno-speculate-indirect-jumps.
1019         (*indirect_jump<mode>): Disable for
1020         -mno-speculate-indirect-jumps.
1021         (*indirect_jump<mode>_nospec): New define_insn.
1022         (tablejump): Emit different RTL for
1023         -mno-speculate-indirect-jumps.
1024         (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
1025         (tablejumpsi_nospec): New define_expand.
1026         (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
1027         (tablejumpdi_nospec): New define_expand.
1028         (*tablejump<mode>_internal1): Disable for
1029         -mno-speculate-indirect-jumps.
1030         (*tablejump<mode>_internal1_nospec): New define_insn.
1031         * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
1032         option.
1033
1034 2018-01-16  Artyom Skrobov tyomitch@gmail.com
1035
1036         * caller-save.c (insert_save): Drop unnecessary parameter.  All
1037         callers updated.
1038
1039 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1040             Richard Biener  <rguenth@suse.de>
1041
1042         PR libgomp/83590
1043         * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
1044         return early, inline manually is_gimple_sizepos.  Make sure if we
1045         call gimplify_expr we don't end up with a gimple constant.
1046         * tree.c (variably_modified_type_p): Don't return true for
1047         is_gimple_constant (_t).  Inline manually is_gimple_sizepos.
1048         * gimplify.h (is_gimple_sizepos): Remove.
1049
1050 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1051
1052         PR tree-optimization/83857
1053         * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
1054         vectorizable_live_operation for pure SLP statements.
1055         (vectorizable_live_operation): Handle PHIs.
1056
1057 2018-01-16  Richard Biener  <rguenther@suse.de>
1058
1059         PR tree-optimization/83867
1060         * tree-vect-stmts.c (vect_transform_stmt): Precompute
1061         nested_in_vect_loop_p since the scalar stmt may get invalidated.
1062
1063 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1064
1065         PR c/83844
1066         * stor-layout.c (handle_warn_if_not_align): Use byte_position and
1067         multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
1068         If off is not INTEGER_CST, issue a may not be aligned warning
1069         rather than isn't aligned.  Use isn%'t rather than isn't.
1070         * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
1071         into MULT_EXPR.
1072         <case MULT_EXPR>: Improve the case when bottom and one of the
1073         MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
1074         operand, in that case check if the other operand is multiple of
1075         bottom divided by the INTEGER_CST operand.
1076
1077 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1078
1079         PR target/83858
1080         * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
1081         * config/pa/pa-protos.h (pa_function_arg_size): Declare.
1082         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
1083         pa_function_arg_size instead of FUNCTION_ARG_SIZE.
1084         * config/pa/pa.c (pa_function_arg_advance): Likewise.
1085         (pa_function_arg, pa_arg_partial_bytes): Likewise.
1086         (pa_function_arg_size): New function.
1087
1088 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1089
1090         * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
1091         in a separate statement.
1092
1093 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1094
1095         PR tree-optimization/83847
1096         * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
1097         group gathers and scatters.
1098
1099 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1100
1101         PR rtl-optimization/86620
1102         * params.def (max-sched-ready-insns): Bump minimum value to 1.
1103
1104         PR rtl-optimization/83213
1105         * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
1106         to last if both are JUMP_INSNs.
1107
1108         PR tree-optimization/83843
1109         * gimple-ssa-store-merging.c
1110         (imm_store_chain_info::output_merged_store): Handle bit_not_p on
1111         store_immediate_info for bswap/nop orig_stores.
1112
1113 2018-01-15  Andrew Waterman  <andrew@sifive.com>
1114
1115         * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
1116         !TARGET_MUL.
1117         <UDIV>: Increase cost if !TARGET_DIV.
1118
1119 2018-01-15  Segher Boessenkool  <segher@kernel.crashing.org>
1120
1121         * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
1122         (define_attr "cr_logical_3op"): New.
1123         (cceq_ior_compare): Adjust.
1124         (cceq_ior_compare_complement): Adjust.
1125         (*cceq_rev_compare): Adjust.
1126         * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
1127         (is_cracked_insn): Adjust.
1128         (insn_must_be_first_in_group): Adjust.
1129         * config/rs6000/40x.md: Adjust.
1130         * config/rs6000/440.md: Adjust.
1131         * config/rs6000/476.md: Adjust.
1132         * config/rs6000/601.md: Adjust.
1133         * config/rs6000/603.md: Adjust.
1134         * config/rs6000/6xx.md: Adjust.
1135         * config/rs6000/7450.md: Adjust.
1136         * config/rs6000/7xx.md: Adjust.
1137         * config/rs6000/8540.md: Adjust.
1138         * config/rs6000/cell.md: Adjust.
1139         * config/rs6000/e300c2c3.md: Adjust.
1140         * config/rs6000/e500mc.md: Adjust.
1141         * config/rs6000/e500mc64.md: Adjust.
1142         * config/rs6000/e5500.md: Adjust.
1143         * config/rs6000/e6500.md: Adjust.
1144         * config/rs6000/mpc.md: Adjust.
1145         * config/rs6000/power4.md: Adjust.
1146         * config/rs6000/power5.md: Adjust.
1147         * config/rs6000/power6.md: Adjust.
1148         * config/rs6000/power7.md: Adjust.
1149         * config/rs6000/power8.md: Adjust.
1150         * config/rs6000/power9.md: Adjust.
1151         * config/rs6000/rs64.md: Adjust.
1152         * config/rs6000/titan.md: Adjust.
1153
1154 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1155
1156         * config/i386/predicates.md (indirect_branch_operand): Rewrite
1157         ix86_indirect_branch_register logic.
1158
1159 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1160
1161         * config/i386/constraints.md (Bs): Update
1162         ix86_indirect_branch_register check.  Don't check
1163         ix86_indirect_branch_register with GOT_memory_operand.
1164         (Bw): Likewise.
1165         * config/i386/predicates.md (GOT_memory_operand): Don't check
1166         ix86_indirect_branch_register here.
1167         (GOT32_symbol_operand): Likewise.
1168
1169 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1170
1171         * config/i386/predicates.md (constant_call_address_operand):
1172         Rewrite ix86_indirect_branch_register logic.
1173         (sibcall_insn_operand): Likewise.
1174
1175 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1176
1177         * config/i386/constraints.md (Bs): Replace
1178         ix86_indirect_branch_thunk_register with
1179         ix86_indirect_branch_register.
1180         (Bw): Likewise.
1181         * config/i386/i386.md (indirect_jump): Likewise.
1182         (tablejump): Likewise.
1183         (*sibcall_memory): Likewise.
1184         (*sibcall_value_memory): Likewise.
1185         Peepholes of indirect call and jump via memory: Likewise.
1186         * config/i386/i386.opt: Likewise.
1187         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1188         (GOT_memory_operand): Likewise.
1189         (call_insn_operand): Likewise.
1190         (sibcall_insn_operand): Likewise.
1191         (GOT32_symbol_operand): Likewise.
1192
1193 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1194
1195         PR middle-end/83837
1196         * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
1197         type rather than type addr's type points to.
1198         (expand_omp_atomic_mutex): Likewise.
1199         (expand_omp_atomic): Likewise.
1200
1201 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1202
1203         PR target/83839
1204         * config/i386/i386.c (output_indirect_thunk_function): Use
1205         ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
1206         for  __x86_return_thunk.
1207
1208 2018-01-15  Richard Biener  <rguenther@suse.de>
1209
1210         PR middle-end/83850
1211         * expmed.c (extract_bit_field_1): Fix typo.
1212
1213 2018-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1214
1215         PR target/83687
1216         * config/arm/iterators.md (VF): New mode iterator.
1217         * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
1218         Remove integer-related logic from pattern.
1219         (neon_vabd<mode>_3): Likewise.
1220
1221 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1222
1223         PR middle-end/82694
1224         * common.opt (fstrict-overflow): No longer an alias.
1225         (fwrapv-pointer): New option.
1226         * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
1227         also for pointer types based on flag_wrapv_pointer.
1228         * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
1229         opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
1230         opts->x_flag_wrapv got set.
1231         * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
1232         changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
1233         POINTER_TYPE_OVERFLOW_UNDEFINED.
1234         * match.pd: Likewise in address comparison pattern.
1235         * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
1236
1237 2018-01-15  Richard Biener  <rguenther@suse.de>
1238
1239         PR lto/83804
1240         * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
1241         from TYPE_FIELDS.  Free TYPE_BINFO if not used by devirtualization.
1242         Reset type names to their identifier if their TYPE_DECL doesn't
1243         have linkage (and thus is used for ODR and devirt).
1244         (save_debug_info_for_decl): Remove.
1245         (save_debug_info_for_type): Likewise.
1246         (add_tree_to_fld_list): Adjust.
1247         * tree-pretty-print.c (dump_generic_node): Make dumping of
1248         type names more robust.
1249
1250 2018-01-15  Richard Biener  <rguenther@suse.de>
1251
1252         * BASE-VER: Bump to 8.0.1.
1253
1254 2018-01-14  Martin Sebor  <msebor@redhat.com>
1255
1256         PR other/83508
1257         * builtins.c (check_access): Avoid warning when the no-warning bit
1258         is set.
1259
1260 2018-01-14  Cory Fields  <cory-nospam-@coryfields.com>
1261
1262         * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
1263         * ira-color (allocno_hard_regs_compare): Likewise.
1264
1265 2018-01-14  Nathan Rossi  <nathan@nathanrossi.com>
1266
1267         PR target/83013
1268         * config/microblaze/microblaze.c (microblaze_asm_output_ident):
1269         Use .pushsection/.popsection.
1270
1271 2018-01-14  Martin Sebor  <msebor@redhat.com>
1272
1273         PR c++/81327
1274         * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
1275
1276 2018-01-14  Jakub Jelinek  <jakub@redhat.com>
1277
1278         * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
1279         entry from extra_headers.
1280         (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
1281         extra_headers, make the list bitwise identical to the i?86-*-* one.
1282
1283 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1284
1285         * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
1286         -mcmodel=large with -mindirect-branch=thunk,
1287         -mindirect-branch=thunk-extern, -mfunction-return=thunk and
1288         -mfunction-return=thunk-extern.
1289         * doc/invoke.texi: Document -mcmodel=large is incompatible with
1290         -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
1291         -mfunction-return=thunk and -mfunction-return=thunk-extern.
1292
1293 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1294
1295         * config/i386/i386.c (print_reg): Print the name of the full
1296         integer register without '%'.
1297         (ix86_print_operand): Handle 'V'.
1298          * doc/extend.texi: Document 'V' modifier.
1299
1300 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1301
1302         * config/i386/constraints.md (Bs): Disallow memory operand for
1303         -mindirect-branch-register.
1304         (Bw): Likewise.
1305         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1306         (GOT_memory_operand): Likewise.
1307         (call_insn_operand): Likewise.
1308         (sibcall_insn_operand): Likewise.
1309         (GOT32_symbol_operand): Likewise.
1310         * config/i386/i386.md (indirect_jump): Call convert_memory_address
1311         for -mindirect-branch-register.
1312         (tablejump): Likewise.
1313         (*sibcall_memory): Likewise.
1314         (*sibcall_value_memory): Likewise.
1315         Disallow peepholes of indirect call and jump via memory for
1316         -mindirect-branch-register.
1317         (*call_pop): Replace m with Bw.
1318         (*call_value_pop): Likewise.
1319         (*sibcall_pop_memory): Replace m with Bs.
1320         * config/i386/i386.opt (mindirect-branch-register): New option.
1321         * doc/invoke.texi: Document -mindirect-branch-register option.
1322
1323 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1324
1325         * config/i386/i386-protos.h (ix86_output_function_return): New.
1326         * config/i386/i386.c (ix86_set_indirect_branch_type): Also
1327         set function_return_type.
1328         (indirect_thunk_name): Add ret_p to indicate thunk for function
1329         return.
1330         (output_indirect_thunk_function): Pass false to
1331         indirect_thunk_name.
1332         (ix86_output_indirect_branch_via_reg): Likewise.
1333         (ix86_output_indirect_branch_via_push): Likewise.
1334         (output_indirect_thunk_function): Create alias for function
1335         return thunk if regno < 0.
1336         (ix86_output_function_return): New function.
1337         (ix86_handle_fndecl_attribute): Handle function_return.
1338         (ix86_attribute_table): Add function_return.
1339         * config/i386/i386.h (machine_function): Add
1340         function_return_type.
1341         * config/i386/i386.md (simple_return_internal): Use
1342         ix86_output_function_return.
1343         (simple_return_internal_long): Likewise.
1344         * config/i386/i386.opt (mfunction-return=): New option.
1345         (indirect_branch): Mention -mfunction-return=.
1346         * doc/extend.texi: Document function_return function attribute.
1347         * doc/invoke.texi: Document -mfunction-return= option.
1348
1349 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1350
1351         * config/i386/i386-opts.h (indirect_branch): New.
1352         * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
1353         * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
1354         with local indirect jump when converting indirect call and jump.
1355         (ix86_set_indirect_branch_type): New.
1356         (ix86_set_current_function): Call ix86_set_indirect_branch_type.
1357         (indirectlabelno): New.
1358         (indirect_thunk_needed): Likewise.
1359         (indirect_thunk_bnd_needed): Likewise.
1360         (indirect_thunks_used): Likewise.
1361         (indirect_thunks_bnd_used): Likewise.
1362         (INDIRECT_LABEL): Likewise.
1363         (indirect_thunk_name): Likewise.
1364         (output_indirect_thunk): Likewise.
1365         (output_indirect_thunk_function): Likewise.
1366         (ix86_output_indirect_branch_via_reg): Likewise.
1367         (ix86_output_indirect_branch_via_push): Likewise.
1368         (ix86_output_indirect_branch): Likewise.
1369         (ix86_output_indirect_jmp): Likewise.
1370         (ix86_code_end): Call output_indirect_thunk_function if needed.
1371         (ix86_output_call_insn): Call ix86_output_indirect_branch if
1372         needed.
1373         (ix86_handle_fndecl_attribute): Handle indirect_branch.
1374         (ix86_attribute_table): Add indirect_branch.
1375         * config/i386/i386.h (machine_function): Add indirect_branch_type
1376         and has_local_indirect_jump.
1377         * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
1378         to true.
1379         (tablejump): Likewise.
1380         (*indirect_jump): Use ix86_output_indirect_jmp.
1381         (*tablejump_1): Likewise.
1382         (simple_return_indirect_internal): Likewise.
1383         * config/i386/i386.opt (mindirect-branch=): New option.
1384         (indirect_branch): New.
1385         (keep): Likewise.
1386         (thunk): Likewise.
1387         (thunk-inline): Likewise.
1388         (thunk-extern): Likewise.
1389         * doc/extend.texi: Document indirect_branch function attribute.
1390         * doc/invoke.texi: Document -mindirect-branch= option.
1391
1392 2018-01-14  Jan Hubicka  <hubicka@ucw.cz>
1393
1394         PR ipa/83051
1395         * ipa-inline.c (edge_badness): Tolerate roundoff errors.
1396
1397 2018-01-14  Richard Sandiford  <richard.sandiford@linaro.org>
1398
1399         * ipa-inline.c (want_inline_small_function_p): Return false if
1400         inlining has already failed with CIF_FINAL_ERROR.
1401         (update_caller_keys): Call want_inline_small_function_p before
1402         can_inline_edge_p.
1403         (update_callee_keys): Likewise.
1404
1405 2018-01-10  Kelvin Nilsen  <kelvin@gcc.gnu.org>
1406
1407         * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
1408         New function.
1409         (rs6000_quadword_masked_address_p): Likewise.
1410         (quad_aligned_load_p): Likewise.
1411         (quad_aligned_store_p): Likewise.
1412         (const_load_sequence_p): Add comment to describe the outer-most loop.
1413         (mimic_memory_attributes_and_flags): New function.
1414         (rs6000_gen_stvx): Likewise.
1415         (replace_swapped_aligned_store): Likewise.
1416         (rs6000_gen_lvx): Likewise.
1417         (replace_swapped_aligned_load): Likewise.
1418         (replace_swapped_load_constant): Capitalize argument name in
1419         comment describing this function.
1420         (rs6000_analyze_swaps): Add a third pass to search for vector loads
1421         and stores that access quad-word aligned addresses and replace
1422         with stvx or lvx instructions when appropriate.
1423         * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
1424         New function prototype.
1425         (rs6000_quadword_masked_address_p): Likewise.
1426         (rs6000_gen_lvx): Likewise.
1427         (rs6000_gen_stvx): Likewise.
1428         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
1429         VSX_D (V2DF, V2DI), modify this split to select lvx instruction
1430         when memory address is aligned.
1431         (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
1432         this split to select lvx instruction when memory address is aligned.
1433         (*vsx_le_perm_load_v8hi): Modify this split to select lvx
1434         instruction when memory address is aligned.
1435         (*vsx_le_perm_load_v16qi): Likewise.
1436         (four unnamed splitters): Modify to select the stvx instruction
1437         when memory is aligned.
1438
1439 2018-01-13  Jan Hubicka  <hubicka@ucw.cz>
1440
1441         * predict.c (determine_unlikely_bbs): Handle correctly BBs
1442         which appears in the queue multiple times.
1443
1444 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1445             Alan Hayward  <alan.hayward@arm.com>
1446             David Sherwood  <david.sherwood@arm.com>
1447
1448         * tree-vectorizer.h (vec_lower_bound): New structure.
1449         (_loop_vec_info): Add check_nonzero and lower_bounds.
1450         (LOOP_VINFO_CHECK_NONZERO): New macro.
1451         (LOOP_VINFO_LOWER_BOUNDS): Likewise.
1452         (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
1453         * tree-data-ref.h (dr_with_seg_len): Add access_size and align
1454         fields.  Make seg_len the distance travelled, not including the
1455         access size.
1456         (dr_direction_indicator): Declare.
1457         (dr_zero_step_indicator): Likewise.
1458         (dr_known_forward_stride_p): Likewise.
1459         * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
1460         tree-ssanames.h.
1461         (runtime_alias_check_p): Allow runtime alias checks with
1462         variable strides.
1463         (operator ==): Compare access_size and align.
1464         (prune_runtime_alias_test_list): Rework for new distinction between
1465         the access_size and seg_len.
1466         (create_intersect_range_checks_index): Likewise.  Cope with polynomial
1467         segment lengths.
1468         (get_segment_min_max): New function.
1469         (create_intersect_range_checks): Use it.
1470         (dr_step_indicator): New function.
1471         (dr_direction_indicator): Likewise.
1472         (dr_zero_step_indicator): Likewise.
1473         (dr_known_forward_stride_p): Likewise.
1474         * tree-loop-distribution.c (data_ref_segment_size): Return
1475         DR_STEP * (niters - 1).
1476         (compute_alias_check_pairs): Update call to the dr_with_seg_len
1477         constructor.
1478         * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
1479         (vect_preserves_scalar_order_p): New function, split out from...
1480         (vect_analyze_data_ref_dependence): ...here.  Check for zero steps.
1481         (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
1482         (vect_vfa_access_size): New function.
1483         (vect_vfa_align): Likewise.
1484         (vect_compile_time_alias): Take access_size_a and access_b arguments.
1485         (dump_lower_bound): New function.
1486         (vect_check_lower_bound): Likewise.
1487         (vect_small_gap_p): Likewise.
1488         (vectorizable_with_step_bound_p): Likewise.
1489         (vect_prune_runtime_alias_test_list): Ignore cross-iteration
1490         depencies if the vectorization factor is 1.  Convert the checks
1491         for nonzero steps into checks on the bounds of DR_STEP.  Try using
1492         a bunds check for variable steps if the minimum required step is
1493         relatively small. Update calls to the dr_with_seg_len
1494         constructor and to vect_compile_time_alias.
1495         * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
1496         function.
1497         (vect_loop_versioning): Call it.
1498         * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
1499         when retrying.
1500         (vect_estimate_min_profitable_iters): Account for any bounds checks.
1501
1502 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1503             Alan Hayward  <alan.hayward@arm.com>
1504             David Sherwood  <david.sherwood@arm.com>
1505
1506         * doc/sourcebuild.texi (vect_scatter_store): Document.
1507         * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
1508         optabs.
1509         * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
1510         Document.
1511         * genopinit.c (main): Add supports_vec_scatter_store and
1512         supports_vec_scatter_store_cached to target_optabs.
1513         * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
1514         IFN_MASK_SCATTER_STORE.
1515         * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
1516         functions.
1517         * internal-fn.h (internal_store_fn_p): Declare.
1518         (internal_fn_stored_value_index): Likewise.
1519         * internal-fn.c (scatter_store_direct): New macro.
1520         (expand_scatter_store_optab_fn): New function.
1521         (direct_scatter_store_optab_supported_p): New macro.
1522         (internal_store_fn_p): New function.
1523         (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
1524         IFN_MASK_SCATTER_STORE.
1525         (internal_fn_mask_index): Likewise.
1526         (internal_fn_stored_value_index): New function.
1527         (internal_gather_scatter_fn_supported_p): Adjust operand numbers
1528         for scatter stores.
1529         * optabs-query.h (supports_vec_scatter_store_p): Declare.
1530         * optabs-query.c (supports_vec_scatter_store_p): New function.
1531         * tree-vectorizer.h (vect_get_store_rhs): Declare.
1532         * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
1533         true for scatter stores.
1534         (vect_gather_scatter_fn_p): Handle scatter stores too.
1535         (vect_check_gather_scatter): Consider using scatter stores if
1536         supports_vec_scatter_store_p.
1537         * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
1538         scatter stores too.
1539         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1540         internal_fn_stored_value_index.
1541         (check_load_store_masking): Handle scatter stores too.
1542         (vect_get_store_rhs): Make public.
1543         (vectorizable_call): Use internal_store_fn_p.
1544         (vectorizable_store): Handle scatter store internal functions.
1545         (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
1546         when deciding whether the end of the group has been reached.
1547         * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
1548         * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
1549         (mask_scatter_store<mode>): New insns.
1550
1551 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1552             Alan Hayward  <alan.hayward@arm.com>
1553             David Sherwood  <david.sherwood@arm.com>
1554
1555         * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
1556         * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
1557         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
1558         function.
1559         (vect_use_strided_gather_scatters_p): Take a masked_p argument.
1560         Use vect_truncate_gather_scatter_offset if we can't treat the
1561         operation as a normal gather load or scatter store.
1562         (get_group_load_store_type): Take the gather_scatter_info
1563         as argument.  Try using a gather load or scatter store for
1564         single-element groups.
1565         (get_load_store_type): Update calls to get_group_load_store_type
1566         and vect_use_strided_gather_scatters_p.
1567
1568 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1569             Alan Hayward  <alan.hayward@arm.com>
1570             David Sherwood  <david.sherwood@arm.com>
1571
1572         * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
1573         optional tree argument.
1574         * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
1575         null target hooks.
1576         (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
1577         but continue to use the current value as a fallback.
1578         (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
1579         to compare the updates.
1580         * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
1581         (get_load_store_type): Use it when handling a strided access.
1582         (vect_get_strided_load_store_ops): New function.
1583         (vect_get_data_ptr_increment): Likewise.
1584         (vectorizable_load): Handle strided gather loads.  Always pass
1585         a step to vect_create_data_ref_ptr and bump_vector_ptr.
1586
1587 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1588             Alan Hayward  <alan.hayward@arm.com>
1589             David Sherwood  <david.sherwood@arm.com>
1590
1591         * doc/md.texi (gather_load@var{m}): Document.
1592         (mask_gather_load@var{m}): Likewise.
1593         * genopinit.c (main): Add supports_vec_gather_load and
1594         supports_vec_gather_load_cached to target_optabs.
1595         * optabs-tree.c (init_tree_optimization_optabs): Use
1596         ggc_cleared_alloc to allocate target_optabs.
1597         * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
1598         * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
1599         functions.
1600         * internal-fn.h (internal_load_fn_p): Declare.
1601         (internal_gather_scatter_fn_p): Likewise.
1602         (internal_fn_mask_index): Likewise.
1603         (internal_gather_scatter_fn_supported_p): Likewise.
1604         * internal-fn.c (gather_load_direct): New macro.
1605         (expand_gather_load_optab_fn): New function.
1606         (direct_gather_load_optab_supported_p): New macro.
1607         (direct_internal_fn_optab): New function.
1608         (internal_load_fn_p): Likewise.
1609         (internal_gather_scatter_fn_p): Likewise.
1610         (internal_fn_mask_index): Likewise.
1611         (internal_gather_scatter_fn_supported_p): Likewise.
1612         * optabs-query.c (supports_at_least_one_mode_p): New function.
1613         (supports_vec_gather_load_p): Likewise.
1614         * optabs-query.h (supports_vec_gather_load_p): Declare.
1615         * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
1616         and memory_type field.
1617         (NUM_PATTERNS): Bump to 15.
1618         * tree-vect-data-refs.c: Include internal-fn.h.
1619         (vect_gather_scatter_fn_p): New function.
1620         (vect_describe_gather_scatter_call): Likewise.
1621         (vect_check_gather_scatter): Try using internal functions for
1622         gather loads.  Recognize existing calls to a gather load function.
1623         (vect_analyze_data_refs): Consider using gather loads if
1624         supports_vec_gather_load_p.
1625         * tree-vect-patterns.c (vect_get_load_store_mask): New function.
1626         (vect_get_gather_scatter_offset_type): Likewise.
1627         (vect_convert_mask_for_vectype): Likewise.
1628         (vect_add_conversion_to_patterm): Likewise.
1629         (vect_try_gather_scatter_pattern): Likewise.
1630         (vect_recog_gather_scatter_pattern): New pattern recognizer.
1631         (vect_vect_recog_func_ptrs): Add it.
1632         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1633         internal_fn_mask_index and internal_gather_scatter_fn_p.
1634         (check_load_store_masking): Take the gather_scatter_info as an
1635         argument and handle gather loads.
1636         (vect_get_gather_scatter_ops): New function.
1637         (vectorizable_call): Check internal_load_fn_p.
1638         (vectorizable_load): Likewise.  Handle gather load internal
1639         functions.
1640         (vectorizable_store): Update call to check_load_store_masking.
1641         * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
1642         * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
1643         * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
1644         (aarch64_gather_scale_operand_d): New predicates.
1645         * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
1646         (mask_gather_load<mode>): New insns.
1647
1648 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1649             Alan Hayward  <alan.hayward@arm.com>
1650             David Sherwood  <david.sherwood@arm.com>
1651
1652         * optabs.def (fold_left_plus_optab): New optab.
1653         * doc/md.texi (fold_left_plus_@var{m}): Document.
1654         * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
1655         * internal-fn.c (fold_left_direct): Define.
1656         (expand_fold_left_optab_fn): Likewise.
1657         (direct_fold_left_optab_supported_p): Likewise.
1658         * fold-const-call.c (fold_const_fold_left): New function.
1659         (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
1660         * tree-parloops.c (valid_reduction_p): New function.
1661         (gather_scalar_reductions): Use it.
1662         * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
1663         (vect_finish_replace_stmt): Declare.
1664         * tree-vect-loop.c (fold_left_reduction_fn): New function.
1665         (needs_fold_left_reduction_p): New function, split out from...
1666         (vect_is_simple_reduction): ...here.  Accept reductions that
1667         forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
1668         (vect_force_simple_reduction): Also store the reduction type in
1669         the assignment's STMT_VINFO_REDUC_TYPE.
1670         (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
1671         (merge_with_identity): New function.
1672         (vect_expand_fold_left): Likewise.
1673         (vectorize_fold_left_reduction): Likewise.
1674         (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION.  Leave the
1675         scalar phi in place for it.  Check for target support and reject
1676         cases that would reassociate the operation.  Defer the transform
1677         phase to vectorize_fold_left_reduction.
1678         * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
1679         * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
1680         (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
1681
1682 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1683
1684         * tree-if-conv.c (predicate_mem_writes): Remove redundant
1685         call to ifc_temp_var.
1686
1687 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1688             Alan Hayward  <alan.hayward@arm.com>
1689             David Sherwood  <david.sherwood@arm.com>
1690
1691         * target.def (legitimize_address_displacement): Take the original
1692         offset as a poly_int.
1693         * targhooks.h (default_legitimize_address_displacement): Update
1694         accordingly.
1695         * targhooks.c (default_legitimize_address_displacement): Likewise.
1696         * doc/tm.texi: Regenerate.
1697         * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
1698         as an argument, moving assert of ad->disp == ad->disp_term to...
1699         (process_address_1): ...here.  Update calls to base_plus_disp_to_reg.
1700         Try calling targetm.legitimize_address_displacement before expanding
1701         the address rather than afterwards, and adjust for the new interface.
1702         * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
1703         Match the new hook interface.  Handle SVE addresses.
1704         * config/sh/sh.c (sh_legitimize_address_displacement): Make the
1705         new hook interface.
1706
1707 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1708
1709         * Makefile.in (OBJS): Add early-remat.o.
1710         * target.def (select_early_remat_modes): New hook.
1711         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
1712         * doc/tm.texi: Regenerate.
1713         * targhooks.h (default_select_early_remat_modes): Declare.
1714         * targhooks.c (default_select_early_remat_modes): New function.
1715         * timevar.def (TV_EARLY_REMAT): New timevar.
1716         * passes.def (pass_early_remat): New pass.
1717         * tree-pass.h (make_pass_early_remat): Declare.
1718         * early-remat.c: New file.
1719         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
1720         function.
1721         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
1722
1723 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1724             Alan Hayward  <alan.hayward@arm.com>
1725             David Sherwood  <david.sherwood@arm.com>
1726
1727         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
1728         vfm1 with a bound_epilog parameter.
1729         (vect_do_peeling): Update calls accordingly, and move the prologue
1730         call earlier in the function.  Treat the base bound_epilog as 0 for
1731         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
1732         this base when peeling for gaps.
1733         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
1734         with fully-masked loops.
1735         (vect_estimate_min_profitable_iters): Handle the single peeled
1736         iteration in that case.
1737
1738 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1739             Alan Hayward  <alan.hayward@arm.com>
1740             David Sherwood  <david.sherwood@arm.com>
1741
1742         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
1743         single-element interleaving even if the size is not a power of 2.
1744         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
1745         accesses for single-element interleaving if the group size is
1746         not a power of 2.
1747
1748 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1749             Alan Hayward  <alan.hayward@arm.com>
1750             David Sherwood  <david.sherwood@arm.com>
1751
1752         * doc/md.texi (fold_extract_last_@var{m}): Document.
1753         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1754         * optabs.def (fold_extract_last_optab): New optab.
1755         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1756         * internal-fn.c (fold_extract_direct): New macro.
1757         (expand_fold_extract_optab_fn): Likewise.
1758         (direct_fold_extract_optab_supported_p): Likewise.
1759         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1760         * tree-vect-loop.c (vect_model_reduction_cost): Handle
1761         EXTRACT_LAST_REDUCTION.
1762         (get_initial_def_for_reduction): Do not create an initial vector
1763         for EXTRACT_LAST_REDUCTION reductions.
1764         (vectorizable_reduction): Leave the scalar phi in place for
1765         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
1766         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
1767         epilogue code for EXTRACT_LAST_REDUCTION and defer the
1768         transform phase to vectorizable_condition.
1769         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1770         split out from...
1771         (vect_finish_stmt_generation): ...here.
1772         (vect_finish_replace_stmt): New function.
1773         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1774         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1775         pattern.
1776         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1777
1778 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1779             Alan Hayward  <alan.hayward@arm.com>
1780             David Sherwood  <david.sherwood@arm.com>
1781
1782         * doc/md.texi (extract_last_@var{m}): Document.
1783         * optabs.def (extract_last_optab): New optab.
1784         * internal-fn.def (EXTRACT_LAST): New internal function.
1785         * internal-fn.c (cond_unary_direct): New macro.
1786         (expand_cond_unary_optab_fn): Likewise.
1787         (direct_cond_unary_optab_supported_p): Likewise.
1788         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1789         loops using EXTRACT_LAST.
1790         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1791         (extract_last_<mode>): ...this optab.
1792         (vec_extract<mode><Vel>): Update accordingly.
1793
1794 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1795             Alan Hayward  <alan.hayward@arm.com>
1796             David Sherwood  <david.sherwood@arm.com>
1797
1798         * target.def (empty_mask_is_expensive): New hook.
1799         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1800         * doc/tm.texi: Regenerate.
1801         * targhooks.h (default_empty_mask_is_expensive): Declare.
1802         * targhooks.c (default_empty_mask_is_expensive): New function.
1803         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1804         if the target says that empty masks are expensive.
1805         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1806         New function.
1807         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1808
1809 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1810             Alan Hayward  <alan.hayward@arm.com>
1811             David Sherwood  <david.sherwood@arm.com>
1812
1813         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1814         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1815         (vect_use_loop_mask_for_alignment_p): New function.
1816         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1817         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1818         niters_skip argument.  Make sure that the first niters_skip elements
1819         of the first iteration are inactive.
1820         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1821         Update call to vect_set_loop_masks_directly.
1822         (get_misalign_in_elems): New function, split out from...
1823         (vect_gen_prolog_loop_niters): ...here.
1824         (vect_update_init_of_dr): Take a code argument that specifies whether
1825         the adjustment should be added or subtracted.
1826         (vect_update_init_of_drs): Likewise.
1827         (vect_prepare_for_masked_peels): New function.
1828         (vect_do_peeling): Skip prologue peeling if we're using a mask
1829         instead.  Update call to vect_update_inits_of_drs.
1830         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1831         mask_skip_niters.
1832         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1833         alignment.  Do not include the number of peeled iterations in
1834         the minimum threshold in that case.
1835         (vectorizable_induction): Adjust the start value down by
1836         LOOP_VINFO_MASK_SKIP_NITERS iterations.
1837         (vect_transform_loop): Call vect_prepare_for_masked_peels.
1838         Take the number of skipped iterations into account when calculating
1839         the loop bounds.
1840         * tree-vect-stmts.c (vect_gen_while_not): New function.
1841
1842 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1843             Alan Hayward  <alan.hayward@arm.com>
1844             David Sherwood  <david.sherwood@arm.com>
1845
1846         * doc/sourcebuild.texi (vect_fully_masked): Document.
1847         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1848         default value to 0.
1849         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1850         split out from...
1851         (vect_analyze_loop_2): ...here. Don't check the vectorization
1852         factor against the number of loop iterations if the loop is
1853         fully-masked.
1854
1855 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1856             Alan Hayward  <alan.hayward@arm.com>
1857             David Sherwood  <david.sherwood@arm.com>
1858
1859         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1860         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1861         (dump_groups): Update accordingly.
1862         (iv_use::mem_type): New member variable.
1863         (address_p): New function.
1864         (record_use): Add a mem_type argument and initialize the new
1865         mem_type field.
1866         (record_group_use): Add a mem_type argument.  Use address_p.
1867         Remove obsolete null checks of base_object.  Update call to record_use.
1868         (find_interesting_uses_op): Update call to record_group_use.
1869         (find_interesting_uses_cond): Likewise.
1870         (find_interesting_uses_address): Likewise.
1871         (get_mem_type_for_internal_fn): New function.
1872         (find_address_like_use): Likewise.
1873         (find_interesting_uses_stmt): Try find_address_like_use before
1874         calling find_interesting_uses_op.
1875         (addr_offset_valid_p): Use the iv mem_type field as the type
1876         of the addressed memory.
1877         (add_autoinc_candidates): Likewise.
1878         (get_address_cost): Likewise.
1879         (split_small_address_groups_p): Use address_p.
1880         (split_address_groups): Likewise.
1881         (add_iv_candidate_for_use): Likewise.
1882         (autoinc_possible_for_pair): Likewise.
1883         (rewrite_groups): Likewise.
1884         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1885         (determine_group_iv_cost): Update after split of USE_ADDRESS.
1886         (get_alias_ptr_type_for_ptr_address): New function.
1887         (rewrite_use_address): Rewrite address uses in calls that were
1888         identified by find_address_like_use.
1889
1890 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1891             Alan Hayward  <alan.hayward@arm.com>
1892             David Sherwood  <david.sherwood@arm.com>
1893
1894         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1895         TARGET_MEM_REFs.
1896         * gimple-expr.h (is_gimple_addressable: Likewise.
1897         * gimple-expr.c (is_gimple_address): Likewise.
1898         * internal-fn.c (expand_call_mem_ref): New function.
1899         (expand_mask_load_optab_fn): Use it.
1900         (expand_mask_store_optab_fn): Likewise.
1901
1902 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1903             Alan Hayward  <alan.hayward@arm.com>
1904             David Sherwood  <david.sherwood@arm.com>
1905
1906         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1907         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1908         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1909         (cond_umax@var{mode}): Document.
1910         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1911         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1912         (cond_umin_optab, cond_umax_optab): New optabs.
1913         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1914         (COND_IOR, COND_XOR): New internal functions.
1915         * internal-fn.h (get_conditional_internal_fn): Declare.
1916         * internal-fn.c (cond_binary_direct): New macro.
1917         (expand_cond_binary_optab_fn): Likewise.
1918         (direct_cond_binary_optab_supported_p): Likewise.
1919         (get_conditional_internal_fn): New function.
1920         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1921         Cope with reduction statements that are vectorized as calls rather
1922         than assignments.
1923         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1924         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1925         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1926         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1927         (UNSPEC_COND_EOR): New unspecs.
1928         (optab): Add mappings for them.
1929         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1930         (sve_int_op, sve_fp_op): New int attributes.
1931
1932 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1933             Alan Hayward  <alan.hayward@arm.com>
1934             David Sherwood  <david.sherwood@arm.com>
1935
1936         * optabs.def (while_ult_optab): New optab.
1937         * doc/md.texi (while_ult@var{m}@var{n}): Document.
1938         * internal-fn.def (WHILE_ULT): New internal function.
1939         * internal-fn.h (direct_internal_fn_supported_p): New override
1940         that takes two types as argument.
1941         * internal-fn.c (while_direct): New macro.
1942         (expand_while_optab_fn): New function.
1943         (convert_optab_supported_p): Likewise.
1944         (direct_while_optab_supported_p): New macro.
1945         * wide-int.h (wi::udiv_ceil): New function.
1946         * tree-vectorizer.h (rgroup_masks): New structure.
1947         (vec_loop_masks): New typedef.
1948         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1949         and fully_masked_p.
1950         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1951         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1952         (vect_max_vf): New function.
1953         (slpeel_make_loop_iterate_ntimes): Delete.
1954         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1955         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1956         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1957         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1958         internal-fn.h, stor-layout.h and optabs-query.h.
1959         (vect_set_loop_mask): New function.
1960         (add_preheader_seq): Likewise.
1961         (add_header_seq): Likewise.
1962         (interleave_supported_p): Likewise.
1963         (vect_maybe_permute_loop_masks): Likewise.
1964         (vect_set_loop_masks_directly): Likewise.
1965         (vect_set_loop_condition_masked): Likewise.
1966         (vect_set_loop_condition_unmasked): New function, split out from
1967         slpeel_make_loop_iterate_ntimes.
1968         (slpeel_make_loop_iterate_ntimes): Rename to..
1969         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
1970         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1971         (vect_do_peeling): Update call accordingly.
1972         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1973         loops.
1974         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1975         mask_compare_type, can_fully_mask_p and fully_masked_p.
1976         (release_vec_loop_masks): New function.
1977         (_loop_vec_info): Use it to free the loop masks.
1978         (can_produce_all_loop_masks_p): New function.
1979         (vect_get_max_nscalars_per_iter): Likewise.
1980         (vect_verify_full_masking): Likewise.
1981         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1982         retries, and free the mask rgroups before retrying.  Check loop-wide
1983         reasons for disallowing fully-masked loops.  Make the final decision
1984         about whether use a fully-masked loop or not.
1985         (vect_estimate_min_profitable_iters): Do not assume that peeling
1986         for the number of iterations will be needed for fully-masked loops.
1987         (vectorizable_reduction): Disable fully-masked loops.
1988         (vectorizable_live_operation): Likewise.
1989         (vect_halve_mask_nunits): New function.
1990         (vect_double_mask_nunits): Likewise.
1991         (vect_record_loop_mask): Likewise.
1992         (vect_get_loop_mask): Likewise.
1993         (vect_transform_loop): Handle the case in which the final loop
1994         iteration might handle a partial vector.  Call vect_set_loop_condition
1995         instead of slpeel_make_loop_iterate_ntimes.
1996         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1997         (check_load_store_masking): New function.
1998         (prepare_load_store_mask): Likewise.
1999         (vectorizable_store): Handle fully-masked loops.
2000         (vectorizable_load): Likewise.
2001         (supportable_widening_operation): Use vect_halve_mask_nunits for
2002         booleans.
2003         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
2004         (vect_gen_while): New function.
2005         * config/aarch64/aarch64.md (umax<mode>3): New expander.
2006         (aarch64_uqdec<mode>): New insn.
2007
2008 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2009             Alan Hayward  <alan.hayward@arm.com>
2010             David Sherwood  <david.sherwood@arm.com>
2011
2012         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
2013         (reduc_xor_scal_optab): New optabs.
2014         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
2015         (reduc_xor_scal_@var{m}): Document.
2016         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
2017         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
2018         internal functions.
2019         * fold-const-call.c (fold_const_call): Handle them.
2020         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
2021         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
2022         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
2023         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
2024         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
2025         (UNSPEC_XORV): New unspecs.
2026         (optab): Add entries for them.
2027         (BITWISEV): New int iterator.
2028         (bit_reduc_op): New int attributes.
2029
2030 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2031             Alan Hayward  <alan.hayward@arm.com>
2032             David Sherwood  <david.sherwood@arm.com>
2033
2034         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
2035         * internal-fn.def (VEC_SHL_INSERT): New internal function.
2036         * optabs.def (vec_shl_insert_optab): New optab.
2037         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
2038         (duplicate_and_interleave): Likewise.
2039         * tree-vect-loop.c: Include internal-fn.h.
2040         (neutral_op_for_slp_reduction): New function, split out from
2041         get_initial_defs_for_reduction.
2042         (get_initial_def_for_reduction): Handle option 2 for variable-length
2043         vectors by loading the neutral value into a vector and then shifting
2044         the initial value into element 0.
2045         (get_initial_defs_for_reduction): Replace the code argument with
2046         the neutral value calculated by neutral_op_for_slp_reduction.
2047         Use gimple_build_vector for constant-length vectors.
2048         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
2049         but the first group_size elements have a neutral value.
2050         Use duplicate_and_interleave otherwise.
2051         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
2052         Update call to get_initial_defs_for_reduction.  Handle SLP
2053         reductions for variable-length vectors by creating one vector
2054         result for each scalar result, with the elements associated
2055         with other scalar results stubbed out with the neutral value.
2056         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
2057         Require IFN_VEC_SHL_INSERT for double reductions on
2058         variable-length vectors, or SLP reductions that have
2059         a neutral value.  Require can_duplicate_and_interleave_p
2060         support for variable-length unchained SLP reductions if there
2061         is no neutral value, such as for MIN/MAX reductions.  Also require
2062         the number of vector elements to be a multiple of the number of
2063         SLP statements when doing variable-length unchained SLP reductions.
2064         Update call to vect_create_epilog_for_reduction.
2065         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
2066         and remove initial values.
2067         (duplicate_and_interleave): Make public.
2068         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
2069         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
2070
2071 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2072             Alan Hayward  <alan.hayward@arm.com>
2073             David Sherwood  <david.sherwood@arm.com>
2074
2075         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
2076         (can_duplicate_and_interleave_p): New function.
2077         (vect_get_and_check_slp_defs): Take the vector of statements
2078         rather than just the current one.  Remove excess parentheses.
2079         Restriction rejectinon of vect_constant_def and vect_external_def
2080         for variable-length vectors to boolean types, or types for which
2081         can_duplicate_and_interleave_p is false.
2082         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
2083         (duplicate_and_interleave): New function.
2084         (vect_get_constant_vectors): Use gimple_build_vector for
2085         constant-length vectors and suitable variable-length constant
2086         vectors.  Use duplicate_and_interleave for other variable-length
2087         vectors.  Don't defer the update when inserting new statements.
2088
2089 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2090             Alan Hayward  <alan.hayward@arm.com>
2091             David Sherwood  <david.sherwood@arm.com>
2092
2093         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
2094         min_profitable_iters doesn't go negative.
2095
2096 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2097             Alan Hayward  <alan.hayward@arm.com>
2098             David Sherwood  <david.sherwood@arm.com>
2099
2100         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
2101         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
2102         * optabs.def (vec_mask_load_lanes_optab): New optab.
2103         (vec_mask_store_lanes_optab): Likewise.
2104         * internal-fn.def (MASK_LOAD_LANES): New internal function.
2105         (MASK_STORE_LANES): Likewise.
2106         * internal-fn.c (mask_load_lanes_direct): New macro.
2107         (mask_store_lanes_direct): Likewise.
2108         (expand_mask_load_optab_fn): Handle masked operations.
2109         (expand_mask_load_lanes_optab_fn): New macro.
2110         (expand_mask_store_optab_fn): Handle masked operations.
2111         (expand_mask_store_lanes_optab_fn): New macro.
2112         (direct_mask_load_lanes_optab_supported_p): Likewise.
2113         (direct_mask_store_lanes_optab_supported_p): Likewise.
2114         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
2115         parameter.
2116         (vect_load_lanes_supported): Likewise.
2117         * tree-vect-data-refs.c (strip_conversion): New function.
2118         (can_group_stmts_p): Likewise.
2119         (vect_analyze_data_ref_accesses): Use it instead of checking
2120         for a pair of assignments.
2121         (vect_store_lanes_supported): Take a masked_p parameter.
2122         (vect_load_lanes_supported): Likewise.
2123         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
2124         vect_store_lanes_supported and vect_load_lanes_supported.
2125         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
2126         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
2127         parameter.  Don't allow gaps for masked accesses.
2128         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
2129         and vect_load_lanes_supported.
2130         (get_load_store_type): Take a masked_p parameter and update
2131         call to get_group_load_store_type.
2132         (vectorizable_store): Update call to get_load_store_type.
2133         Handle IFN_MASK_STORE_LANES.
2134         (vectorizable_load): Update call to get_load_store_type.
2135         Handle IFN_MASK_LOAD_LANES.
2136
2137 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2138             Alan Hayward  <alan.hayward@arm.com>
2139             David Sherwood  <david.sherwood@arm.com>
2140
2141         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
2142         modes for SVE.
2143         * config/aarch64/aarch64-protos.h
2144         (aarch64_sve_struct_memory_operand_p): Declare.
2145         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
2146         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
2147         (VPRED, vpred): Handle SVE structure modes.
2148         * config/aarch64/constraints.md (Utx): New constraint.
2149         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
2150         (aarch64_sve_struct_nonimmediate_operand): New predicates.
2151         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
2152         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
2153         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
2154         structure modes.  Split into pieces after RA.
2155         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
2156         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
2157         New patterns.
2158         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
2159         SVE structure modes.
2160         (aarch64_classify_address): Likewise.
2161         (sizetochar): Move earlier in file.
2162         (aarch64_print_operand): Handle SVE register lists.
2163         (aarch64_array_mode): New function.
2164         (aarch64_sve_struct_memory_operand_p): Likewise.
2165         (TARGET_ARRAY_MODE): Redefine.
2166
2167 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2168             Alan Hayward  <alan.hayward@arm.com>
2169             David Sherwood  <david.sherwood@arm.com>
2170
2171         * target.def (array_mode): New target hook.
2172         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
2173         * doc/tm.texi: Regenerate.
2174         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
2175         * hooks.c (hook_optmode_mode_uhwi_none): New function.
2176         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
2177         targetm.array_mode.
2178         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
2179         type sizes.
2180
2181 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2182             Alan Hayward  <alan.hayward@arm.com>
2183             David Sherwood  <david.sherwood@arm.com>
2184
2185         * fold-const.c (fold_binary_loc): Check the argument types
2186         rather than the result type when testing for a vector operation.
2187
2188 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2189
2190         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
2191         * doc/tm.texi: Regenerate.
2192
2193 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2194             Alan Hayward  <alan.hayward@arm.com>
2195             David Sherwood  <david.sherwood@arm.com>
2196
2197         * doc/invoke.texi (-msve-vector-bits=): Document new option.
2198         (sve): Document new AArch64 extension.
2199         * doc/md.texi (w): Extend the description of the AArch64
2200         constraint to include SVE vectors.
2201         (Upl, Upa): Document new AArch64 predicate constraints.
2202         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
2203         enum.
2204         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
2205         (msve-vector-bits=): New option.
2206         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
2207         SVE when these are disabled.
2208         (sve): New extension.
2209         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
2210         modes.  Adjust their number of units based on aarch64_sve_vg.
2211         (MAX_BITSIZE_MODE_ANY_MODE): Define.
2212         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
2213         aarch64_addr_query_type.
2214         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
2215         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
2216         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
2217         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
2218         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
2219         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
2220         (aarch64_simd_imm_zero_p): Delete.
2221         (aarch64_check_zero_based_sve_index_immediate): Declare.
2222         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2223         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2224         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2225         (aarch64_sve_float_mul_immediate_p): Likewise.
2226         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2227         rather than an rtx.
2228         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
2229         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
2230         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
2231         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
2232         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
2233         (aarch64_regmode_natural_size): Likewise.
2234         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
2235         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
2236         left one place.
2237         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
2238         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
2239         for VG and the SVE predicate registers.
2240         (V_ALIASES): Add a "z"-prefixed alias.
2241         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
2242         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
2243         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
2244         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
2245         (REG_CLASS_NAMES): Add entries for them.
2246         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
2247         and the predicate registers.
2248         (aarch64_sve_vg): Declare.
2249         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
2250         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
2251         (REGMODE_NATURAL_SIZE): Define.
2252         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
2253         SVE macros.
2254         * config/aarch64/aarch64.c: Include cfgrtl.h.
2255         (simd_immediate_info): Add a constructor for series vectors,
2256         and an associated step field.
2257         (aarch64_sve_vg): New variable.
2258         (aarch64_dbx_register_number): Handle VG and the predicate registers.
2259         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
2260         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
2261         (VEC_ANY_DATA, VEC_STRUCT): New constants.
2262         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
2263         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
2264         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
2265         (aarch64_get_mask_mode): New functions.
2266         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
2267         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
2268         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
2269         predicate modes and predicate registers.  Explicitly restrict
2270         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
2271         to store a vector mode if it is recognized by
2272         aarch64_classify_vector_mode.
2273         (aarch64_regmode_natural_size): New function.
2274         (aarch64_hard_regno_caller_save_mode): Return the original mode
2275         for predicates.
2276         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
2277         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
2278         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
2279         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
2280         functions.
2281         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
2282         does not overlap dest if the function is frame-related.  Handle
2283         SVE constants.
2284         (aarch64_split_add_offset): New function.
2285         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
2286         them aarch64_add_offset.
2287         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
2288         and update call to aarch64_sub_sp.
2289         (aarch64_add_cfa_expression): New function.
2290         (aarch64_expand_prologue): Pass extra temporary registers to the
2291         functions above.  Handle the case in which we need to emit new
2292         DW_CFA_expressions for registers that were originally saved
2293         relative to the stack pointer, but now have to be expressed
2294         relative to the frame pointer.
2295         (aarch64_output_mi_thunk): Pass extra temporary registers to the
2296         functions above.
2297         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
2298         IP0 and IP1 values for SVE frames.
2299         (aarch64_expand_vec_series): New function.
2300         (aarch64_expand_sve_widened_duplicate): Likewise.
2301         (aarch64_expand_sve_const_vector): Likewise.
2302         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
2303         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
2304         into the register, rather than emitting a SET directly.
2305         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
2306         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
2307         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
2308         (offset_9bit_signed_scaled_p): New functions.
2309         (aarch64_replicate_bitmask_imm): New function.
2310         (aarch64_bitmask_imm): Use it.
2311         (aarch64_cannot_force_const_mem): Reject expressions involving
2312         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
2313         (aarch64_classify_index): Handle SVE indices, by requiring
2314         a plain register index with a scale that matches the element size.
2315         (aarch64_classify_address): Handle SVE addresses.  Assert that
2316         the mode of the address is VOIDmode or an integer mode.
2317         Update call to aarch64_classify_symbol.
2318         (aarch64_classify_symbolic_expression): Update call to
2319         aarch64_classify_symbol.
2320         (aarch64_const_vec_all_in_range_p): New function.
2321         (aarch64_print_vector_float_operand): Likewise.
2322         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
2323         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
2324         and the FP immediates 1.0 and 0.5.
2325         (aarch64_print_address_internal): Handle SVE addresses.
2326         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
2327         (aarch64_regno_regclass): Handle predicate registers.
2328         (aarch64_secondary_reload): Handle big-endian reloads of SVE
2329         data modes.
2330         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
2331         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
2332         (aarch64_convert_sve_vector_bits): New function.
2333         (aarch64_override_options): Use it to handle -msve-vector-bits=.
2334         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2335         rather than an rtx.
2336         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
2337         Handle SVE vector and predicate modes.  Accept VL-based constants
2338         that need only one temporary register, and VL offsets that require
2339         no temporary registers.
2340         (aarch64_conditional_register_usage): Mark the predicate registers
2341         as fixed if SVE isn't available.
2342         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
2343         Return true for SVE vector and predicate modes.
2344         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
2345         rather than an unsigned int.  Handle SVE modes.
2346         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
2347         SVE modes.
2348         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
2349         if SVE is enabled.
2350         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2351         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2352         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2353         (aarch64_sve_float_mul_immediate_p): New functions.
2354         (aarch64_sve_valid_immediate): New function.
2355         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
2356         Explicitly reject structure modes.  Check for INDEX constants.
2357         Handle PTRUE and PFALSE constants.
2358         (aarch64_check_zero_based_sve_index_immediate): New function.
2359         (aarch64_simd_imm_zero_p): Delete.
2360         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
2361         vector modes.  Accept constants in the range of CNT[BHWD].
2362         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
2363         ask for an Advanced SIMD mode.
2364         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
2365         (aarch64_simd_vector_alignment): Handle SVE predicates.
2366         (aarch64_vectorize_preferred_vector_alignment): New function.
2367         (aarch64_simd_vector_alignment_reachable): Use it instead of
2368         the vector size.
2369         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
2370         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
2371         functions.
2372         (MAX_VECT_LEN): Delete.
2373         (expand_vec_perm_d): Add a vec_flags field.
2374         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
2375         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
2376         (aarch64_evpc_ext): Don't apply a big-endian lane correction
2377         for SVE modes.
2378         (aarch64_evpc_rev): Rename to...
2379         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
2380         (aarch64_evpc_rev_global): New function.
2381         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
2382         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
2383         MAX_VECT_LEN.
2384         (aarch64_evpc_sve_tbl): New function.
2385         (aarch64_expand_vec_perm_const_1): Update after rename of
2386         aarch64_evpc_rev.  Handle SVE permutes too, trying
2387         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
2388         than aarch64_evpc_tbl.
2389         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
2390         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
2391         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
2392         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
2393         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
2394         (aarch64_expand_sve_vcond): New functions.
2395         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
2396         of aarch64_vector_mode_p.
2397         (aarch64_dwarf_poly_indeterminate_value): New function.
2398         (aarch64_compute_pressure_classes): Likewise.
2399         (aarch64_can_change_mode_class): Likewise.
2400         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
2401         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
2402         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
2403         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
2404         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
2405         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
2406         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
2407         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
2408         constraints.
2409         (Dn, Dl, Dr): Accept const as well as const_vector.
2410         (Dz): Likewise.  Compare against CONST0_RTX.
2411         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
2412         of "vector" where appropriate.
2413         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
2414         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
2415         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
2416         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
2417         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
2418         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
2419         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
2420         (v_int_equiv): Extend to SVE modes.
2421         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
2422         mode attributes.
2423         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
2424         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
2425         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
2426         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
2427         (SVE_COND_FP_CMP): New int iterators.
2428         (perm_hilo): Handle the new unpack unspecs.
2429         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
2430         attributes.
2431         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
2432         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
2433         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
2434         (aarch64_equality_operator, aarch64_constant_vector_operand)
2435         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
2436         (aarch64_sve_nonimmediate_operand): Likewise.
2437         (aarch64_sve_general_operand): Likewise.
2438         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
2439         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
2440         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
2441         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
2442         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
2443         (aarch64_sve_float_arith_immediate): Likewise.
2444         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
2445         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
2446         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
2447         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
2448         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
2449         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
2450         (aarch64_sve_float_arith_operand): Likewise.
2451         (aarch64_sve_float_arith_with_sub_operand): Likewise.
2452         (aarch64_sve_float_mul_operand): Likewise.
2453         (aarch64_sve_vec_perm_operand): Likewise.
2454         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
2455         (aarch64_mov_operand): Accept const_poly_int and const_vector.
2456         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
2457         as well as const_vector.
2458         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
2459         in file.  Use CONST0_RTX and CONSTM1_RTX.
2460         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
2461         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
2462         Use aarch64_simd_imm_zero.
2463         * config/aarch64/aarch64-sve.md: New file.
2464         * config/aarch64/aarch64.md: Include it.
2465         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
2466         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
2467         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
2468         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
2469         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
2470         (sve): New attribute.
2471         (enabled): Disable instructions with the sve attribute unless
2472         TARGET_SVE.
2473         (movqi, movhi): Pass CONST_POLY_INT operaneds through
2474         aarch64_expand_mov_immediate.
2475         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
2476         CNT[BHSD] immediates.
2477         (movti): Split CONST_POLY_INT moves into two halves.
2478         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
2479         Split additions that need a temporary here if the destination
2480         is the stack pointer.
2481         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
2482         (*add<mode>3_poly_1): New instruction.
2483         (set_clobber_cc): New expander.
2484
2485 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2486
2487         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
2488         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
2489         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
2490         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
2491         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
2492         Change innermode from fixed_mode_size to machine_mode.
2493         (simplify_subreg): Update call accordingly.  Handle a constant-sized
2494         subreg of a variable-length CONST_VECTOR.
2495
2496 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2497             Alan Hayward  <alan.hayward@arm.com>
2498             David Sherwood  <david.sherwood@arm.com>
2499
2500         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
2501         (add_offset_to_base): New function, split out from...
2502         (create_mem_ref): ...here.  When handling a scale other than 1,
2503         check first whether the address is valid without the offset.
2504         Add it into the base if so, leaving the index and scale as-is.
2505
2506 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
2507
2508         PR c++/83778
2509         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
2510         fold_for_warn before checking if arg2 is INTEGER_CST.
2511
2512 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
2513
2514         * config/rs6000/predicates.md (load_multiple_operation): Delete.
2515         (store_multiple_operation): Delete.
2516         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
2517         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
2518         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
2519         guarded by TARGET_STRING.
2520         (rs6000_output_load_multiple): Delete.
2521         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
2522         OPTION_MASK_STRING / TARGET_STRING handling.
2523         (print_operand) <'N', 'O'>: Add comment that these are unused now.
2524         (const rs6000_opt_masks) <"string">: Change mask to 0.
2525         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
2526         (MASK_STRING): Delete.
2527         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
2528         parts.  Simplify.
2529         (load_multiple): Delete.
2530         (*ldmsi8): Delete.
2531         (*ldmsi7): Delete.
2532         (*ldmsi6): Delete.
2533         (*ldmsi5): Delete.
2534         (*ldmsi4): Delete.
2535         (*ldmsi3): Delete.
2536         (store_multiple): Delete.
2537         (*stmsi8): Delete.
2538         (*stmsi7): Delete.
2539         (*stmsi6): Delete.
2540         (*stmsi5): Delete.
2541         (*stmsi4): Delete.
2542         (*stmsi3): Delete.
2543         (movmemsi_8reg): Delete.
2544         (corresponding unnamed define_insn): Delete.
2545         (movmemsi_6reg): Delete.
2546         (corresponding unnamed define_insn): Delete.
2547         (movmemsi_4reg): Delete.
2548         (corresponding unnamed define_insn): Delete.
2549         (movmemsi_2reg): Delete.
2550         (corresponding unnamed define_insn): Delete.
2551         (movmemsi_1reg): Delete.
2552         (corresponding unnamed define_insn): Delete.
2553         * config/rs6000/rs6000.opt (mno-string): New.
2554         (mstring): Replace by deprecation warning stub.
2555         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
2556
2557 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
2558
2559         * regrename.c (regrename_do_replace): If replacing the same
2560         reg multiple times, try to reuse last created gen_raw_REG.
2561
2562         PR debug/81155
2563         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
2564         main to workaround a bug in GDB.
2565
2566 2018-01-12  Tom de Vries  <tom@codesourcery.com>
2567
2568         PR target/83737
2569         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
2570
2571 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
2572
2573         PR rtl-optimization/80481
2574         * ira-color.c (get_cap_member): New function.
2575         (allocnos_conflict_by_live_ranges_p): Use it.
2576         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
2577         (setup_slot_coalesced_allocno_live_ranges): Ditto.
2578
2579 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
2580
2581         PR target/83628
2582         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
2583         (*saddl_se_1): Ditto.
2584         (*ssubsi_1): Ditto.
2585         (*ssubl_se_1): Ditto.
2586
2587 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2588
2589         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
2590         rather than wi::to_widest for DR_INITs.
2591         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
2592         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
2593         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
2594         INTEGER_CSTs.
2595         (vect_analyze_group_access_1): Note that here.
2596
2597 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2598
2599         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
2600         polynomial type sizes.
2601
2602 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
2603
2604         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
2605         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
2606         (gimple_add_tmp_var): Likewise.
2607
2608 2018-01-12  Martin Liska  <mliska@suse.cz>
2609
2610         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
2611         (gimple_alloc_sizes): Likewise.
2612         (dump_gimple_statistics): Use PRIu64 in printf format.
2613         * gimple.h: Change uint64_t to int.
2614
2615 2018-01-12  Martin Liska  <mliska@suse.cz>
2616
2617         * tree-core.h: Use uint64_t instead of int.
2618         * tree.c (tree_node_counts): Likewise.
2619         (tree_node_sizes): Likewise.
2620         (dump_tree_statistics): Use PRIu64 in printf format.
2621
2622 2018-01-12  Martin Liska  <mliska@suse.cz>
2623
2624         * Makefile.in: As qsort_chk is implemented in vec.c, add
2625         vec.o to linkage of gencfn-macros.
2626         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
2627         passing the info to record_node_allocation_statistics.
2628         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
2629         and pass the info.
2630         * ggc-common.c (struct ggc_usage): Add operator== and use
2631         it in operator< and compare function.
2632         * mem-stats.h (struct mem_usage): Likewise.
2633         * vec.c (struct vec_usage): Remove operator< and compare
2634         function. Can be simply inherited.
2635
2636 2018-01-12  Martin Jambor  <mjambor@suse.cz>
2637
2638         PR target/81616
2639         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
2640         * tree-ssa-math-opts.c: Include domwalk.h.
2641         (convert_mult_to_fma_1): New function.
2642         (fma_transformation_info): New type.
2643         (fma_deferring_state): Likewise.
2644         (cancel_fma_deferring): New function.
2645         (result_of_phi): Likewise.
2646         (last_fma_candidate_feeds_initial_phi): Likewise.
2647         (convert_mult_to_fma): Added deferring logic, split actual
2648         transformation to convert_mult_to_fma_1.
2649         (math_opts_dom_walker): New type.
2650         (math_opts_dom_walker::after_dom_children): New method, body moved
2651         here from pass_optimize_widening_mul::execute, added deferring logic
2652         bits.
2653         (pass_optimize_widening_mul::execute): Moved most of code to
2654         math_opts_dom_walker::after_dom_children.
2655         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
2656         * config/i386/i386.c (ix86_option_override_internal): Added
2657         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
2658
2659 2018-01-12  Richard Biener  <rguenther@suse.de>
2660
2661         PR debug/83157
2662         * dwarf2out.c (gen_variable_die): Do not reset old_die for
2663         inline instance vars.
2664
2665 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
2666
2667         PR target/81819
2668         * config/rx/rx.c (rx_is_restricted_memory_address):
2669         Handle SUBREG case.
2670
2671 2018-01-12  Richard Biener  <rguenther@suse.de>
2672
2673         PR tree-optimization/80846
2674         * target.def (split_reduction): New target hook.
2675         * targhooks.c (default_split_reduction): New function.
2676         * targhooks.h (default_split_reduction): Declare.
2677         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
2678         target requests first reduce vectors by combining low and high
2679         parts.
2680         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
2681         (get_vectype_for_scalar_type_and_size): Export.
2682         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
2683         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
2684         * doc/tm.texi: Regenerate.
2685         * config/i386/i386.c (ix86_split_reduction): Implement
2686         TARGET_VECTORIZE_SPLIT_REDUCTION.
2687
2688 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
2689
2690         PR target/83368
2691         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
2692         in PIC mode except for TARGET_VXWORKS_RTP.
2693         * config/sparc/sparc.c: Include cfgrtl.h.
2694         (TARGET_INIT_PIC_REG): Define.
2695         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
2696         (sparc_pic_register_p): New predicate.
2697         (sparc_legitimate_address_p): Use it.
2698         (sparc_legitimize_pic_address): Likewise.
2699         (sparc_delegitimize_address): Likewise.
2700         (sparc_mode_dependent_address_p): Likewise.
2701         (gen_load_pcrel_sym): Remove 4th parameter.
2702         (load_got_register): Adjust call to above.  Remove obsolete stuff.
2703         (sparc_expand_prologue): Do not call load_got_register here.
2704         (sparc_flat_expand_prologue): Likewise.
2705         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
2706         (sparc_use_pseudo_pic_reg): New function.
2707         (sparc_init_pic_reg): Likewise.
2708         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
2709         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
2710
2711 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
2712
2713         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
2714         Add item for branch_cost.
2715
2716 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
2717
2718         PR rtl-optimization/83565
2719         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
2720         not extend the result to a larger mode for rotate operations.
2721         (num_sign_bit_copies1): Likewise.
2722
2723 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
2724
2725         PR target/40411
2726         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
2727         -symbolic.
2728         Use values-Xc.o for -pedantic.
2729         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
2730
2731 2018-01-12  Martin Liska  <mliska@suse.cz>
2732
2733         PR ipa/83054
2734         * ipa-devirt.c (final_warning_record::grow_type_warnings):
2735         New function.
2736         (possible_polymorphic_call_targets): Use it.
2737         (ipa_devirt): Likewise.
2738
2739 2018-01-12  Martin Liska  <mliska@suse.cz>
2740
2741         * profile-count.h (enum profile_quality): Use 0 as invalid
2742         enum value of profile_quality.
2743
2744 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
2745
2746         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
2747         -mext-string options.
2748
2749 2018-01-12  Richard Biener  <rguenther@suse.de>
2750
2751         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2752         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2753         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2754         Likewise.
2755         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2756
2757 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
2758
2759         * configure.ac (--with-long-double-format): Add support for the
2760         configuration option to change the default long double format on
2761         PowerPC systems.
2762         * config.gcc (powerpc*-linux*-*): Likewise.
2763         * configure: Regenerate.
2764         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2765         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2766         used without modification.
2767
2768 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
2769
2770         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2771         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2772         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2773         MISC_BUILTIN_SPEC_BARRIER.
2774         (rs6000_init_builtins): Likewise.
2775         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2776         enum value.
2777         (speculation_barrier): New define_insn.
2778         * doc/extend.texi: Document __builtin_speculation_barrier.
2779
2780 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
2781
2782         PR target/83203
2783         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2784         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2785         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2786         iterators.
2787         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
2788         integral modes instead of "ss" and "sd".
2789         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2790         vectors with 32-bit and 64-bit elements.
2791         (vecdupssescalarmodesuffix): New mode attribute.
2792         (vec_dup<mode>): Use it.
2793
2794 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
2795
2796         PR target/83330
2797         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2798         frame if argument is passed on stack.
2799
2800 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
2801
2802         PR target/82682
2803         * ree.c (combine_reaching_defs): Optimize also
2804         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2805         reg2=any_extend(exp); reg1=reg2;, formatting fix.
2806
2807 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
2808
2809         PR middle-end/83189
2810         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2811
2812 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
2813
2814         PR middle-end/83718
2815         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2816         after they are computed.
2817
2818 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
2819
2820         PR tree-optimization/83695
2821         * gimple-loop-linterchange.cc
2822         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2823         reset cached scev information after interchange.
2824         (pass_linterchange::execute): Remove call to scev_reset_htab.
2825
2826 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2827
2828         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2829         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2830         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2831         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2832         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2833         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2834         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2835         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2836         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2837         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2838         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2839         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2840         (V_lane_reg): Likewise.
2841         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2842         New define_expand.
2843         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2844         (vfmal_lane_low<mode>_intrinsic,
2845         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2846         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2847         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2848         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2849         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2850         vfmsl_lane_high<mode>_intrinsic): New define_insns.
2851
2852 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2853
2854         * config/arm/arm-cpus.in (fp16fml): New feature.
2855         (ALL_SIMD): Add fp16fml.
2856         (armv8.2-a): Add fp16fml as an option.
2857         (armv8.3-a): Likewise.
2858         (armv8.4-a): Add fp16fml as part of fp16.
2859         * config/arm/arm.h (TARGET_FP16FML): Define.
2860         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2861         when appropriate.
2862         * config/arm/arm-modes.def (V2HF): Define.
2863         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2864         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2865         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2866         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2867         vfmsl_low, vfmsl_high): New set of builtins.
2868         * config/arm/iterators.md (PLUSMINUS): New code iterator.
2869         (vfml_op): New code attribute.
2870         (VFMLHALVES): New int iterator.
2871         (VFML, VFMLSEL): New mode attributes.
2872         (V_reg): Define mapping for V2HF.
2873         (V_hi, V_lo): New mode attributes.
2874         (VF_constraint): Likewise.
2875         (vfml_half, vfml_half_selector): New int attributes.
2876         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2877         define_expand.
2878         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2879         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2880         New define_insn.
2881         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2882         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2883         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2884         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
2885         documentation.
2886         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2887         Document new effective target and option set.
2888
2889 2017-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2890
2891         * config/arm/arm-cpus.in (armv8_4): New feature.
2892         (ARMv8_4a): New fgroup.
2893         (armv8.4-a): New arch.
2894         * config/arm/arm-tables.opt: Regenerate.
2895         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2896         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2897         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2898         Add matching rules for -march=armv8.4-a and extensions.
2899         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2900
2901 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
2902
2903         PR target/81821
2904         * config/rx/rx.md (BW): New mode attribute.
2905         (sync_lock_test_and_setsi): Add mode suffix to insn output.
2906
2907 2018-01-11  Richard Biener  <rguenther@suse.de>
2908
2909         PR tree-optimization/83435
2910         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2911         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2912         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2913
2914 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2915             Alan Hayward  <alan.hayward@arm.com>
2916             David Sherwood  <david.sherwood@arm.com>
2917
2918         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2919         field.
2920         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
2921         (aarch64_print_address_internal): Use it to check for a zero offset.
2922
2923 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
2924             Alan Hayward  <alan.hayward@arm.com>
2925             David Sherwood  <david.sherwood@arm.com>
2926
2927         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2928         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2929         Return a poly_int64 rather than a HOST_WIDE_INT.
2930         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2931         rather than a HOST_WIDE_INT.
2932         * config/aarch64/aarch64.h (aarch64_frame): Protect with
2933         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
2934         hard_fp_offset, frame_size, initial_adjust, callee_offset and
2935         final_offset from HOST_WIDE_INT to poly_int64.
2936         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2937         to_constant when getting the number of units in an Advanced SIMD
2938         mode.
2939         (aarch64_builtin_vectorized_function): Check for a constant number
2940         of units.
2941         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2942         GET_MODE_SIZE.
2943         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2944         attribute instead of GET_MODE_NUNITS.
2945         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2946         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2947         GET_MODE_SIZE for fixed-size registers.
2948         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2949         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2950         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2951         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2952         (aarch64_print_operand, aarch64_print_address_internal)
2953         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2954         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2955         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2956         Handle polynomial GET_MODE_SIZE.
2957         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
2958         wider than SImode without modification.
2959         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2960         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2961         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2962         passing and returning SVE modes.
2963         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2964         rather than GEN_INT.
2965         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2966         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2967         (aarch64_allocate_and_probe_stack_space): Likewise.
2968         (aarch64_layout_frame): Cope with polynomial offsets.
2969         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2970         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
2971         polynomial offsets.
2972         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2973         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2974         poly_int64 rather than a HOST_WIDE_INT.
2975         (aarch64_get_separate_components, aarch64_process_components)
2976         (aarch64_expand_prologue, aarch64_expand_epilogue)
2977         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2978         (aarch64_anchor_offset): New function, split out from...
2979         (aarch64_legitimize_address): ...here.
2980         (aarch64_builtin_vectorization_cost): Handle polynomial
2981         TYPE_VECTOR_SUBPARTS.
2982         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2983         GET_MODE_NUNITS.
2984         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2985         number of elements from the PARALLEL rather than the mode.
2986         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2987         rather than GET_MODE_BITSIZE.
2988         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2989         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2990         (aarch64_expand_vec_perm_const_1): Handle polynomial
2991         d->perm.length () and d->perm elements.
2992         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
2993         Apply to_constant to d->perm elements.
2994         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2995         polynomial CONST_VECTOR_NUNITS.
2996         (aarch64_move_pointer): Take amount as a poly_int64 rather
2997         than an int.
2998         (aarch64_progress_pointer): Avoid temporary variable.
2999         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
3000         the mode attribute instead of GET_MODE.
3001
3002 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3003             Alan Hayward  <alan.hayward@arm.com>
3004             David Sherwood  <david.sherwood@arm.com>
3005
3006         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
3007         x exists before using it.
3008         (aarch64_add_constant_internal): Rename to...
3009         (aarch64_add_offset_1): ...this.  Replace regnum with separate
3010         src and dest rtxes.  Handle the case in which they're different,
3011         including when the offset is zero.  Replace scratchreg with an rtx.
3012         Use 2 additions if there is no spare register into which we can
3013         move a 16-bit constant.
3014         (aarch64_add_constant): Delete.
3015         (aarch64_add_offset): Replace reg with separate src and dest
3016         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
3017         Use aarch64_add_offset_1.
3018         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
3019         an rtx rather than an int.  Take the delta as a poly_int64
3020         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
3021         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
3022         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
3023         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
3024         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
3025         and aarch64_add_sp.
3026         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
3027         aarch64_add_constant.
3028
3029 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3030
3031         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
3032         Use scalar_float_mode.
3033
3034 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3035
3036         * config/aarch64/aarch64-simd.md
3037         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
3038         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
3039         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
3040         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
3041         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
3042         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
3043         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
3044         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
3045         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
3046         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
3047
3048 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3049
3050         PR target/83514
3051         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
3052         targ_options->x_arm_arch_string is non NULL.
3053
3054 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
3055
3056         * config/aarch64/aarch64.h
3057         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
3058
3059 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
3060
3061         PR target/82096
3062         * expmed.c (emit_store_flag_force): Swap if const op0
3063         and change VOIDmode to mode of op0.
3064
3065 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3066
3067         PR rtl-optimization/83761
3068         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
3069         than bytes to mode_for_size.
3070
3071 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3072
3073         PR middle-end/83189
3074         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
3075         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
3076         profile.
3077
3078 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3079
3080         PR middle-end/83575
3081         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
3082         when in layout mode.
3083         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
3084         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
3085         partition fixup.
3086
3087 2018-01-10  Michael Collison  <michael.collison@arm.com>
3088
3089         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
3090         * config/aarch64/aarch64-option-extension.def: Add
3091         AARCH64_OPT_EXTENSION of 'fp16fml'.
3092         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3093         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
3094         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
3095         * config/aarch64/constraints.md (Ui7): New constraint.
3096         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
3097         (VFMLA_SEL_W): Ditto.
3098         (f16quad): Ditto.
3099         (f16mac1): Ditto.
3100         (VFMLA16_LOW): New int iterator.
3101         (VFMLA16_HIGH): Ditto.
3102         (UNSPEC_FMLAL): New unspec.
3103         (UNSPEC_FMLSL): Ditto.
3104         (UNSPEC_FMLAL2): Ditto.
3105         (UNSPEC_FMLSL2): Ditto.
3106         (f16mac): New code attribute.
3107         * config/aarch64/aarch64-simd-builtins.def
3108         (aarch64_fmlal_lowv2sf): Ditto.
3109         (aarch64_fmlsl_lowv2sf): Ditto.
3110         (aarch64_fmlalq_lowv4sf): Ditto.
3111         (aarch64_fmlslq_lowv4sf): Ditto.
3112         (aarch64_fmlal_highv2sf): Ditto.
3113         (aarch64_fmlsl_highv2sf): Ditto.
3114         (aarch64_fmlalq_highv4sf): Ditto.
3115         (aarch64_fmlslq_highv4sf): Ditto.
3116         (aarch64_fmlal_lane_lowv2sf): Ditto.
3117         (aarch64_fmlsl_lane_lowv2sf): Ditto.
3118         (aarch64_fmlal_laneq_lowv2sf): Ditto.
3119         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
3120         (aarch64_fmlalq_lane_lowv4sf): Ditto.
3121         (aarch64_fmlsl_lane_lowv4sf): Ditto.
3122         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
3123         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
3124         (aarch64_fmlal_lane_highv2sf): Ditto.
3125         (aarch64_fmlsl_lane_highv2sf): Ditto.
3126         (aarch64_fmlal_laneq_highv2sf): Ditto.
3127         (aarch64_fmlsl_laneq_highv2sf): Ditto.
3128         (aarch64_fmlalq_lane_highv4sf): Ditto.
3129         (aarch64_fmlsl_lane_highv4sf): Ditto.
3130         (aarch64_fmlalq_laneq_highv4sf): Ditto.
3131         (aarch64_fmlsl_laneq_highv4sf): Ditto.
3132         * config/aarch64/aarch64-simd.md:
3133         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
3134         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3135         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
3136         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3137         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
3138         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
3139         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
3140         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
3141         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
3142         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
3143         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
3144         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
3145         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
3146         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
3147         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
3148         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
3149         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
3150         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
3151         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
3152         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
3153         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
3154         (vfmlsl_low_u32): Ditto.
3155         (vfmlalq_low_u32): Ditto.
3156         (vfmlslq_low_u32): Ditto.
3157         (vfmlal_high_u32): Ditto.
3158         (vfmlsl_high_u32): Ditto.
3159         (vfmlalq_high_u32): Ditto.
3160         (vfmlslq_high_u32): Ditto.
3161         (vfmlal_lane_low_u32): Ditto.
3162         (vfmlsl_lane_low_u32): Ditto.
3163         (vfmlal_laneq_low_u32): Ditto.
3164         (vfmlsl_laneq_low_u32): Ditto.
3165         (vfmlalq_lane_low_u32): Ditto.
3166         (vfmlslq_lane_low_u32): Ditto.
3167         (vfmlalq_laneq_low_u32): Ditto.
3168         (vfmlslq_laneq_low_u32): Ditto.
3169         (vfmlal_lane_high_u32): Ditto.
3170         (vfmlsl_lane_high_u32): Ditto.
3171         (vfmlal_laneq_high_u32): Ditto.
3172         (vfmlsl_laneq_high_u32): Ditto.
3173         (vfmlalq_lane_high_u32): Ditto.
3174         (vfmlslq_lane_high_u32): Ditto.
3175         (vfmlalq_laneq_high_u32): Ditto.
3176         (vfmlslq_laneq_high_u32): Ditto.
3177         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
3178         (AARCH64_FL_FOR_ARCH8_4): New.
3179         (AARCH64_ISA_F16FML): New ISA flag.
3180         (TARGET_F16FML): New feature flag for fp16fml.
3181         (doc/invoke.texi): Document new fp16fml option.
3182
3183 2018-01-10  Michael Collison  <michael.collison@arm.com>
3184
3185         * config/aarch64/aarch64-builtins.c:
3186         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
3187         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3188         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
3189         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
3190         (AARCH64_ISA_SHA3): New ISA flag.
3191         (TARGET_SHA3): New feature flag for sha3.
3192         * config/aarch64/iterators.md (sha512_op): New int attribute.
3193         (CRYPTO_SHA512): New int iterator.
3194         (UNSPEC_SHA512H): New unspec.
3195         (UNSPEC_SHA512H2): Ditto.
3196         (UNSPEC_SHA512SU0): Ditto.
3197         (UNSPEC_SHA512SU1): Ditto.
3198         * config/aarch64/aarch64-simd-builtins.def
3199         (aarch64_crypto_sha512hqv2di): New builtin.
3200         (aarch64_crypto_sha512h2qv2di): Ditto.
3201         (aarch64_crypto_sha512su0qv2di): Ditto.
3202         (aarch64_crypto_sha512su1qv2di): Ditto.
3203         (aarch64_eor3qv8hi): Ditto.
3204         (aarch64_rax1qv2di): Ditto.
3205         (aarch64_xarqv2di): Ditto.
3206         (aarch64_bcaxqv8hi): Ditto.
3207         * config/aarch64/aarch64-simd.md:
3208         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
3209         (aarch64_crypto_sha512su0qv2di): Ditto.
3210         (aarch64_crypto_sha512su1qv2di): Ditto.
3211         (aarch64_eor3qv8hi): Ditto.
3212         (aarch64_rax1qv2di): Ditto.
3213         (aarch64_xarqv2di): Ditto.
3214         (aarch64_bcaxqv8hi): Ditto.
3215         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
3216         (vsha512h2q_u64): Ditto.
3217         (vsha512su0q_u64): Ditto.
3218         (vsha512su1q_u64): Ditto.
3219         (veor3q_u16): Ditto.
3220         (vrax1q_u64): Ditto.
3221         (vxarq_u64): Ditto.
3222         (vbcaxq_u16): Ditto.
3223         * config/arm/types.md (crypto_sha512): New type attribute.
3224         (crypto_sha3): Ditto.
3225         (doc/invoke.texi): Document new sha3 option.
3226
3227 2018-01-10  Michael Collison  <michael.collison@arm.com>
3228
3229         * config/aarch64/aarch64-builtins.c:
3230         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
3231         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3232         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
3233         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
3234         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
3235         (AARCH64_ISA_SM4): New ISA flag.
3236         (TARGET_SM4): New feature flag for sm4.
3237         * config/aarch64/aarch64-simd-builtins.def
3238         (aarch64_sm3ss1qv4si): Ditto.
3239         (aarch64_sm3tt1aq4si): Ditto.
3240         (aarch64_sm3tt1bq4si): Ditto.
3241         (aarch64_sm3tt2aq4si): Ditto.
3242         (aarch64_sm3tt2bq4si): Ditto.
3243         (aarch64_sm3partw1qv4si): Ditto.
3244         (aarch64_sm3partw2qv4si): Ditto.
3245         (aarch64_sm4eqv4si): Ditto.
3246         (aarch64_sm4ekeyqv4si): Ditto.
3247         * config/aarch64/aarch64-simd.md:
3248         (aarch64_sm3ss1qv4si): Ditto.
3249         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
3250         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
3251         (aarch64_sm4eqv4si): Ditto.
3252         (aarch64_sm4ekeyqv4si): Ditto.
3253         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
3254         (sm3part_op): Ditto.
3255         (CRYPTO_SM3TT): Ditto.
3256         (CRYPTO_SM3PART): Ditto.
3257         (UNSPEC_SM3SS1): New unspec.
3258         (UNSPEC_SM3TT1A): Ditto.
3259         (UNSPEC_SM3TT1B): Ditto.
3260         (UNSPEC_SM3TT2A): Ditto.
3261         (UNSPEC_SM3TT2B): Ditto.
3262         (UNSPEC_SM3PARTW1): Ditto.
3263         (UNSPEC_SM3PARTW2): Ditto.
3264         (UNSPEC_SM4E): Ditto.
3265         (UNSPEC_SM4EKEY): Ditto.
3266         * config/aarch64/constraints.md (Ui2): New constraint.
3267         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
3268         * config/arm/types.md (crypto_sm3): New type attribute.
3269         (crypto_sm4): Ditto.
3270         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
3271         (vsm3tt1aq_u32): Ditto.
3272         (vsm3tt1bq_u32): Ditto.
3273         (vsm3tt2aq_u32): Ditto.
3274         (vsm3tt2bq_u32): Ditto.
3275         (vsm3partw1q_u32): Ditto.
3276         (vsm3partw2q_u32): Ditto.
3277         (vsm4eq_u32): Ditto.
3278         (vsm4ekeyq_u32): Ditto.
3279         (doc/invoke.texi): Document new sm4 option.
3280
3281 2018-01-10  Michael Collison  <michael.collison@arm.com>
3282
3283         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
3284         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
3285         (AARCH64_FL_FOR_ARCH8_4): New.
3286         (AARCH64_FL_V8_4): New flag.
3287         (doc/invoke.texi): Document new armv8.4-a option.
3288
3289 2018-01-10  Michael Collison  <michael.collison@arm.com>
3290
3291         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3292         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
3293         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
3294         * config/aarch64/aarch64-option-extension.def: Add
3295         AARCH64_OPT_EXTENSION of 'sha2'.
3296         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
3297         (crypto): Disable sha2 and aes if crypto disabled.
3298         (crypto): Enable aes and sha2 if enabled.
3299         (simd): Disable sha2 and aes if simd disabled.
3300         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
3301         New flags.
3302         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
3303         (TARGET_SHA2): New feature flag for sha2.
3304         (TARGET_AES): New feature flag for aes.
3305         * config/aarch64/aarch64-simd.md:
3306         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
3307         conditional on TARGET_AES.
3308         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
3309         (aarch64_crypto_sha1hsi): Make pattern conditional
3310         on TARGET_SHA2.
3311         (aarch64_crypto_sha1hv4si): Ditto.
3312         (aarch64_be_crypto_sha1hv4si): Ditto.
3313         (aarch64_crypto_sha1su1v4si): Ditto.
3314         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
3315         (aarch64_crypto_sha1su0v4si): Ditto.
3316         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
3317         (aarch64_crypto_sha256su0v4si): Ditto.
3318         (aarch64_crypto_sha256su1v4si): Ditto.
3319         (doc/invoke.texi): Document new aes and sha2 options.
3320
3321 2018-01-10  Martin Sebor  <msebor@redhat.com>
3322
3323         PR tree-optimization/83781
3324         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
3325         as string arrays.
3326
3327 2018-01-11  Martin Sebor  <msebor@gmail.com>
3328             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3329
3330         PR tree-optimization/83501
3331         PR tree-optimization/81703
3332
3333         * tree-ssa-strlen.c (get_string_cst): Rename...
3334         (get_string_len): ...to this.  Handle global constants.
3335         (handle_char_store): Adjust.
3336
3337 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
3338             Jim Wilson  <jimw@sifive.com>
3339
3340         * config/riscv/riscv-protos.h (riscv_output_return): New.
3341         * config/riscv/riscv.c (struct machine_function): New naked_p field.
3342         (riscv_attribute_table, riscv_output_return),
3343         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
3344         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
3345         (riscv_compute_frame_info): Only compute frame->mask if not a naked
3346         function.
3347         (riscv_expand_prologue): Add early return for naked function.
3348         (riscv_expand_epilogue): Likewise.
3349         (riscv_function_ok_for_sibcall): Return false for naked function.
3350         (riscv_set_current_function): New.
3351         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
3352         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
3353         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
3354         * doc/extend.texi (RISC-V Function Attributes): New.
3355
3356 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
3357
3358         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
3359         check for 128-bit long double before checking TCmode.
3360         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
3361         128-bit long doubles before checking TFmode or TCmode.
3362         (FLOAT128_IBM_P): Likewise.
3363
3364 2018-01-10  Martin Sebor  <msebor@redhat.com>
3365
3366         PR tree-optimization/83671
3367         * builtins.c (c_strlen): Unconditionally return zero for the empty
3368         string.
3369         Use -Warray-bounds for warnings.
3370         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
3371         for non-constant array indices with COMPONENT_REF, arrays of
3372         arrays, and pointers to arrays.
3373         (gimple_fold_builtin_strlen): Determine and set length range for
3374         non-constant character arrays.
3375
3376 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
3377
3378         PR middle-end/81897
3379         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
3380         empty blocks.
3381
3382 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
3383
3384         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
3385
3386 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3387
3388         PR target/83399
3389         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
3390         VECTOR_MEM_ALTIVEC_OR_VSX_P.
3391         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
3392         indexed_or_indirect_operand predicate.
3393         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
3394         (*vsx_le_perm_load_v8hi): Likewise.
3395         (*vsx_le_perm_load_v16qi): Likewise.
3396         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
3397         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
3398         (*vsx_le_perm_store_v8hi): Likewise.
3399         (*vsx_le_perm_store_v16qi): Likewise.
3400         (eight unnamed splitters): Likewise.
3401
3402 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3403
3404         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
3405         * config/rs6000/emmintrin.h: Likewise.
3406         * config/rs6000/mmintrin.h: Likewise.
3407         * config/rs6000/xmmintrin.h: Likewise.
3408
3409 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
3410
3411         PR c++/43486
3412         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
3413         "public_flag".
3414         * tree.c (tree_nop_conversion): Return true for location wrapper
3415         nodes.
3416         (maybe_wrap_with_location): New function.
3417         (selftest::check_strip_nops): New function.
3418         (selftest::test_location_wrappers): New function.
3419         (selftest::tree_c_tests): Call it.
3420         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
3421         (maybe_wrap_with_location): New decl.
3422         (EXPR_LOCATION_WRAPPER_P): New macro.
3423         (location_wrapper_p): New inline function.
3424         (tree_strip_any_location_wrapper): New inline function.
3425
3426 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
3427
3428         PR target/83735
3429         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
3430         stack_realign_offset for the largest alignment of stack slot
3431         actually used.
3432         (ix86_find_max_used_stack_alignment): New function.
3433         (ix86_finalize_stack_frame_flags): Use it.  Set
3434         max_used_stack_alignment if we don't realign stack.
3435         * config/i386/i386.h (machine_function): Add
3436         max_used_stack_alignment.
3437
3438 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
3439
3440         * config/arm/arm.opt (-mbranch-cost): New option.
3441         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
3442         account.
3443
3444 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
3445
3446         PR target/83629
3447         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
3448         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
3449
3450 2018-01-10  Richard Biener  <rguenther@suse.de>
3451
3452         PR debug/83765
3453         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
3454         early out so it also covers the case where we have a non-NULL
3455         origin.
3456
3457 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
3458
3459         PR tree-optimization/83753
3460         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
3461         for non-strided grouped accesses if the number of elements is 1.
3462
3463 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3464
3465         PR target/81616
3466         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
3467         * i386.h (TARGET_USE_GATHER): Define.
3468         * x86-tune.def (X86_TUNE_USE_GATHER): New.
3469
3470 2018-01-10  Martin Liska  <mliska@suse.cz>
3471
3472         PR bootstrap/82831
3473         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
3474         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
3475         partitioning.
3476         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
3477         CLEANUP_NO_PARTITIONING is not set.
3478
3479 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
3480
3481         * doc/rtl.texi: Remove documentation of (const ...) wrappers
3482         for vectors, as a partial revert of r254296.
3483         * rtl.h (const_vec_p): Delete.
3484         (const_vec_duplicate_p): Don't test for vector CONSTs.
3485         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
3486         * expmed.c (make_tree): Likewise.
3487
3488         Revert:
3489         * common.md (E, F): Use CONSTANT_P instead of checking for
3490         CONST_VECTOR.
3491         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
3492         checking for CONST_VECTOR.
3493
3494 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3495
3496         PR middle-end/83575
3497         * predict.c (force_edge_cold): Handle in more sane way edges
3498         with no prediction.
3499
3500 2018-01-09  Carl Love  <cel@us.ibm.com>
3501
3502         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
3503         V4SI, V4SF types.
3504         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
3505         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
3506         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
3507         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
3508         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
3509         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
3510         * config/rs6000/rs6000-protos.h: Add extern defition for
3511         rs6000_generate_float2_double_code.
3512         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
3513         function.
3514         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
3515         (float2_v2df): Add define_expand.
3516
3517 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
3518
3519         PR target/83628
3520         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
3521         op_mode in the force_to_mode call.
3522
3523 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3524
3525         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
3526         instead of checking each element individually.
3527         (aarch64_evpc_uzp): Likewise.
3528         (aarch64_evpc_zip): Likewise.
3529         (aarch64_evpc_ext): Likewise.
3530         (aarch64_evpc_rev): Likewise.
3531         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
3532         instead of checking each element individually.  Return true without
3533         generating rtl if
3534         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
3535         whether all selected elements come from the same input, instead of
3536         checking each element individually.  Remove calls to gen_rtx_REG,
3537         start_sequence and end_sequence and instead assert that no rtl is
3538         generated.
3539
3540 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3541
3542         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
3543         order of HIGH and CONST checks.
3544
3545 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
3546
3547         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
3548         if the destination isn't an SSA_NAME.
3549
3550 2018-01-09  Richard Biener  <rguenther@suse.de>
3551
3552         PR tree-optimization/83668
3553         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
3554         move prologue...
3555         (canonicalize_loop_form): ... here, renamed from ...
3556         (canonicalize_loop_closed_ssa_form): ... this and amended to
3557         swap successor edges for loop exit blocks to make us use
3558         the RPO order we need for initial schedule generation.
3559
3560 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
3561
3562         PR tree-optimization/64811
3563         * match.pd: When optimizing comparisons with Inf, avoid
3564         introducing or losing exceptions from comparisons with NaN.
3565
3566 2018-01-09  Martin Liska  <mliska@suse.cz>
3567
3568         PR sanitizer/82517
3569         * asan.c (shadow_mem_size): Add gcc_assert.
3570
3571 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
3572
3573         Don't save registers in main().
3574
3575         PR target/83738
3576         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
3577         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
3578         * config/avr/avr.c (avr_set_current_function): Don't error if
3579         naked, OS_task or OS_main are specified at the same time.
3580         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
3581         OS_main.
3582         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
3583         attribute.
3584         * common/config/avr/avr-common.c (avr_option_optimization_table):
3585         Switch on -mmain-is-OS_task for optimizing compilations.
3586
3587 2018-01-09  Richard Biener  <rguenther@suse.de>
3588
3589         PR tree-optimization/83572
3590         * graphite.c: Include cfganal.h.
3591         (graphite_transform_loops): Connect infinite loops to exit
3592         and remove fake edges at the end.
3593
3594 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3595
3596         * ipa-inline.c (edge_badness): Revert accidental checkin.
3597
3598 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
3599
3600         PR ipa/80763
3601         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
3602         symbols; not inline clones.
3603
3604 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
3605
3606         PR target/83507
3607         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
3608         hard registers.  Formatting fixes.
3609
3610         PR preprocessor/83722
3611         * gcc.c (try_generate_repro): Pass
3612         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
3613         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
3614         do_report_bug.
3615
3616 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
3617             Kito Cheng  <kito.cheng@gmail.com>
3618
3619         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
3620         (riscv_leaf_function_p): Delete.
3621         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
3622
3623 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3624
3625         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
3626         function.
3627         (do_ifelse): New function.
3628         (do_isel): New function.
3629         (do_sub3): New function.
3630         (do_add3): New function.
3631         (do_load_mask_compare): New function.
3632         (do_overlap_load_compare): New function.
3633         (expand_compare_loop): New function.
3634         (expand_block_compare): Call expand_compare_loop() when appropriate.
3635         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
3636         option description.
3637         (-mblock-compare-inline-loop-limit): New option.
3638
3639 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3640
3641         PR target/83677
3642         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
3643         Reverse order of second and third operands in first alternative.
3644         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
3645         of first and second elements in UNSPEC_VPERMR vector.
3646         (altivec_expand_vec_perm_le): Likewise.
3647
3648 2017-01-08  Jeff Law  <law@redhat.com>
3649
3650         PR rtl-optimizatin/81308
3651         * tree-switch-conversion.c (cfg_altered): New file scoped static.
3652         (process_switch): If group_case_labels makes a change, then set
3653         cfg_altered.
3654         (pass_convert_switch::execute): If a switch is converted, then
3655         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
3656
3657         PR rtl-optimization/81308
3658         * recog.c (split_all_insns): Conditionally cleanup the CFG after
3659         splitting insns.
3660
3661 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
3662
3663         PR target/83663 - Revert r255946
3664         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
3665         generation for cases where splatting a value is not useful.
3666         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
3667         across a vec_duplicate and a paradoxical subreg forming a vector
3668         mode to a vec_concat.
3669
3670 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3671
3672         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
3673         -march=armv8.3-a variants.
3674         * config/arm/t-multilib: Likewise.
3675         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
3676
3677 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3678
3679         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
3680         to generate rtl.
3681         (cceq_ior_compare_complement): Give it a name so I can use it, and
3682         change boolean_or_operator predicate to boolean_operator so it can
3683         be used to generate a crand.
3684         (eqne): New code iterator.
3685         (bd/bd_neg): New code_attrs.
3686         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
3687         a single define_insn.
3688         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
3689         decrement (bdnzt/bdnzf/bdzt/bdzf).
3690         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
3691         with the new names of the branch decrement patterns, and added the
3692         names of the branch decrement conditional patterns.
3693
3694 2018-01-08  Richard Biener  <rguenther@suse.de>
3695
3696         PR tree-optimization/83563
3697         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
3698         cache.
3699
3700 2018-01-08  Richard Biener  <rguenther@suse.de>
3701
3702         PR middle-end/83713
3703         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
3704
3705 2018-01-08  Richard Biener  <rguenther@suse.de>
3706
3707         PR tree-optimization/83685
3708         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
3709         references to abnormals.
3710
3711 2018-01-08  Richard Biener  <rguenther@suse.de>
3712
3713         PR lto/83719
3714         * dwarf2out.c (output_indirect_strings): Handle empty
3715         skeleton_debug_str_hash.
3716         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
3717
3718 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
3719
3720         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
3721         (emit_store_direct): Likewise.
3722         (arc_trampoline_adjust_address): Likewise.
3723         (arc_asm_trampoline_template): New function.
3724         (arc_initialize_trampoline): Use asm_trampoline_template.
3725         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
3726         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
3727         * config/arc/arc.md (flush_icache): Delete pattern.
3728
3729 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
3730
3731         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
3732         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
3733         munaligned-access.
3734
3735 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3736
3737         PR target/83681
3738         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
3739         by not USED_FOR_TARGET.
3740         (make_pass_resolve_sw_modes): Likewise.
3741
3742 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3743
3744         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
3745         USED_FOR_TARGET.
3746
3747 2018-01-08  Richard Biener  <rguenther@suse.de>
3748
3749         PR middle-end/83580
3750         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3751
3752 2018-01-08  Richard Biener  <rguenther@suse.de>
3753
3754         PR middle-end/83517
3755         * match.pd ((t * 2) / 2) -> t): Add missing :c.
3756
3757 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
3758
3759         PR middle-end/81897
3760         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3761         basic blocks with a small number of successors.
3762         (convert_control_dep_chain_into_preds): Improve handling of
3763         forwarder blocks.
3764         (dump_predicates): Split apart into...
3765         (dump_pred_chain): ...here...
3766         (dump_pred_info): ...and here.
3767         (can_one_predicate_be_invalidated_p): Add debugging printfs.
3768         (can_chain_union_be_invalidated_p): Improve check for invalidation
3769         of paths.
3770         (uninit_uses_cannot_happen): Avoid unnecessary if
3771         convert_control_dep_chain_into_preds yielded nothing.
3772
3773 2018-01-06  Martin Sebor  <msebor@redhat.com>
3774
3775         PR tree-optimization/83640
3776         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3777         subtracting negative offset from size.
3778         (builtin_access::overlap): Adjust offset bounds of the access to fall
3779         within the size of the object if possible.
3780
3781 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
3782
3783         PR rtl-optimization/83699
3784         * expmed.c (extract_bit_field_1): Restrict the vector usage of
3785         extract_bit_field_as_subreg to cases in which the extracted
3786         value is also a vector.
3787
3788         * lra-constraints.c (process_alt_operands): Test for the equivalence
3789         substitutions when detecting a possible reload cycle.
3790
3791 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
3792
3793         PR debug/83480
3794         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3795         by default if flag_selective_schedling{,2}.  Formatting fixes.
3796
3797         PR rtl-optimization/83682
3798         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3799         if it has non-VECTOR_MODE element mode.
3800         (vec_duplicate_p): Likewise.
3801
3802         PR middle-end/83694
3803         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3804         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3805
3806 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
3807
3808         PR target/83604
3809         * config/i386/i386-builtin.def
3810         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3811         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3812         Require also OPTION_MASK_ISA_AVX512F in addition to
3813         OPTION_MASK_ISA_GFNI.
3814         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3815         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3816         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3817         to OPTION_MASK_ISA_GFNI.
3818         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3819         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3820         OPTION_MASK_ISA_AVX512BW.
3821         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3822         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3823         addition to OPTION_MASK_ISA_GFNI.
3824         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3825         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3826         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3827         to OPTION_MASK_ISA_GFNI.
3828         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3829         a requirement for all ISAs rather than any of them with a few
3830         exceptions.
3831         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3832         processing.
3833         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3834         bitmasks to be enabled with 3 exceptions, instead of requiring any
3835         enabled ISA with lots of exceptions.
3836         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3837         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3838         Change avx512bw in isa attribute to avx512f.
3839         * config/i386/sgxintrin.h: Add license boilerplate.
3840         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
3841         to __AVX512F__ and __AVX512VL to __AVX512VL__.
3842         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3843         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3844         defined.
3845         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3846         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3847         temporarily sse2 rather than sse if not enabled already.
3848
3849         PR target/83604
3850         * config/i386/sse.md (VI248_VLBW): Rename to ...
3851         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
3852         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3853         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3854         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3855         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3856         mode iterator instead of VI248_VLBW.
3857
3858 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
3859
3860         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3861         (record_modified): Skip clobbers; add debug output.
3862         (param_change_prob): Use sreal frequencies.
3863
3864 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
3865
3866         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3867         punt for user-aligned variables.
3868
3869 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
3870
3871         * tree-chrec.c (chrec_contains_symbols): Return true for
3872         POLY_INT_CST.
3873
3874 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
3875
3876         PR target/82439
3877         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3878         of (x|y) == x for BICS pattern.
3879
3880 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
3881
3882         PR tree-optimization/83605
3883         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3884         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3885         can throw.
3886
3887 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
3888
3889         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3890         * config/epiphany/rtems.h: New file.
3891
3892 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3893             Uros Bizjak  <ubizjak@gmail.com>
3894
3895         PR target/83554
3896         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3897         QIreg_operand instead of register_operand predicate.
3898         * config/i386/i386.c (ix86_rop_should_change_byte_p,
3899         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3900         comments instead of -fmitigate[-_]rop.
3901
3902 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
3903
3904         PR bootstrap/81926
3905         * cgraphunit.c (symbol_table::compile): Switch to text_section
3906         before calling assembly_start debug hook.
3907         * run-rtl-passes.c (run_rtl_passes): Likewise.
3908         Include output.h.
3909
3910 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3911
3912         * tree-vrp.c (extract_range_from_binary_expr_1): Check
3913         range_int_cst_p rather than !symbolic_range_p before calling
3914         extract_range_from_multiplicative_op_1.
3915
3916 2017-01-04  Jeff Law  <law@redhat.com>
3917
3918         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3919         redundant test in assertion.
3920
3921 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3922
3923         * doc/rtl.texi: Document machine_mode wrapper classes.
3924
3925 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3926
3927         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3928         using tree_to_uhwi.
3929
3930 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3931
3932         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3933         the VEC_PERM_EXPR fold to fail.
3934
3935 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3936
3937         PR debug/83585
3938         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3939         to switched_sections.
3940
3941 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3942
3943         PR target/83680
3944         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3945         test for d.testing.
3946
3947 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
3948
3949         PR target/83387
3950         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3951         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3952
3953 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3954
3955         PR debug/83666
3956         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3957         is BLKmode and bitpos not zero or mode change is needed.
3958
3959 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
3960
3961         PR target/83675
3962         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3963         TARGET_VIS2.
3964
3965 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
3966
3967         PR target/83628
3968         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3969         instead of MULT rtx.  Update all corresponding splitters.
3970         (*saddl_se): Ditto.
3971         (*ssub<modesuffix>): Ditto.
3972         (*ssubl_se): Ditto.
3973         (*cmp_sadd_di): Update split patterns.
3974         (*cmp_sadd_si): Ditto.
3975         (*cmp_sadd_sidi): Ditto.
3976         (*cmp_ssub_di): Ditto.
3977         (*cmp_ssub_si): Ditto.
3978         (*cmp_ssub_sidi): Ditto.
3979         * config/alpha/predicates.md (const23_operand): New predicate.
3980         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3981         Look for ASHIFT, not MULT inner operand.
3982         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3983
3984 2018-01-04  Martin Liska  <mliska@suse.cz>
3985
3986         PR gcov-profile/83669
3987         * gcov.c (output_intermediate_file): Add version to intermediate
3988         gcov file.
3989         * doc/gcov.texi: Document new field 'version' in intermediate
3990         file format. Fix location of '-k' option of gcov command.
3991
3992 2018-01-04  Martin Liska  <mliska@suse.cz>
3993
3994         PR ipa/82352
3995         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3996
3997 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
3998
3999         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
4000
4001 2018-01-03  Martin Sebor  <msebor@redhat.com>
4002
4003         PR tree-optimization/83655
4004         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
4005         checking calls with invalid arguments.
4006
4007 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4008
4009         * tree-vect-stmts.c (vect_get_store_rhs): New function.
4010         (vectorizable_mask_load_store): Delete.
4011         (vectorizable_call): Return false for masked loads and stores.
4012         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
4013         instead of gimple_assign_rhs1.
4014         (vectorizable_load): Handle IFN_MASK_LOAD.
4015         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
4016
4017 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4018
4019         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
4020         split out from..,
4021         (vectorizable_mask_load_store): ...here.
4022         (vectorizable_load): ...and here.
4023
4024 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4025
4026         * tree-vect-stmts.c (vect_build_all_ones_mask)
4027         (vect_build_zero_merge_argument): New functions, split out from...
4028         (vectorizable_load): ...here.
4029
4030 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4031
4032         * tree-vect-stmts.c (vect_check_store_rhs): New function,
4033         split out from...
4034         (vectorizable_mask_load_store): ...here.
4035         (vectorizable_store): ...and here.
4036
4037 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4038
4039         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
4040         split out from...
4041         (vectorizable_mask_load_store): ...here.
4042
4043 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4044
4045         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
4046         (vect_model_store_cost): Take a vec_load_store_type instead of a
4047         vect_def_type.
4048         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
4049         (vect_model_store_cost): Take a vec_load_store_type instead of a
4050         vect_def_type.
4051         (vectorizable_mask_load_store): Update accordingly.
4052         (vectorizable_store): Likewise.
4053         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
4054
4055 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4056
4057         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
4058         IFN_MASK_LOAD calls here rather than...
4059         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
4060
4061 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4062             Alan Hayward  <alan.hayward@arm.com>
4063             David Sherwood  <david.sherwood@arm.com>
4064
4065         * expmed.c (extract_bit_field_1): For vector extracts,
4066         fall back to extract_bit_field_as_subreg if vec_extract
4067         isn't available.
4068
4069 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4070             Alan Hayward  <alan.hayward@arm.com>
4071             David Sherwood  <david.sherwood@arm.com>
4072
4073         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
4074         they are variable or constant sized.
4075         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
4076         slots for constant-sized data.
4077
4078 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4079             Alan Hayward  <alan.hayward@arm.com>
4080             David Sherwood  <david.sherwood@arm.com>
4081
4082         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
4083         handling COND_EXPRs with boolean comparisons, try to find a better
4084         basis for the mask type than the boolean itself.
4085
4086 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4087
4088         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
4089         is calculated and how it can be overridden.
4090         * genmodes.c (max_bitsize_mode_any_mode): New variable.
4091         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
4092         if defined.
4093         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
4094         if nonzero.
4095
4096 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4097             Alan Hayward  <alan.hayward@arm.com>
4098             David Sherwood  <david.sherwood@arm.com>
4099
4100         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
4101         Remove the mode argument.
4102         (aarch64_simd_valid_immediate): Remove the mode and inverse
4103         arguments.
4104         * config/aarch64/iterators.md (bitsize): New iterator.
4105         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
4106         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
4107         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
4108         aarch64_simd_valid_immediate.
4109         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
4110         (aarch64_reg_or_bic_imm): Likewise.
4111         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
4112         with an insn_type enum and msl with a modifier_type enum.
4113         Replace element_width with a scalar_mode.  Change the shift
4114         to unsigned int.  Add constructors for scalar_float_mode and
4115         scalar_int_mode elements.
4116         (aarch64_vect_float_const_representable_p): Delete.
4117         (aarch64_can_const_movi_rtx_p)
4118         (aarch64_simd_scalar_immediate_valid_for_move)
4119         (aarch64_simd_make_constant): Update call to
4120         aarch64_simd_valid_immediate.
4121         (aarch64_advsimd_valid_immediate_hs): New function.
4122         (aarch64_advsimd_valid_immediate): Likewise.
4123         (aarch64_simd_valid_immediate): Remove mode and inverse
4124         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
4125         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
4126         and aarch64_float_const_representable_p on the result.
4127         (aarch64_output_simd_mov_immediate): Remove mode argument.
4128         Update call to aarch64_simd_valid_immediate and use of
4129         simd_immediate_info.
4130         (aarch64_output_scalar_simd_mov_immediate): Update call
4131         accordingly.
4132
4133 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4134             Alan Hayward  <alan.hayward@arm.com>
4135             David Sherwood  <david.sherwood@arm.com>
4136
4137         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
4138         (mode_nunits): Likewise CONST_MODE_NUNITS.
4139         * machmode.def (ADJUST_NUNITS): Document.
4140         * genmodes.c (mode_data::need_nunits_adj): New field.
4141         (blank_mode): Update accordingly.
4142         (adj_nunits): New variable.
4143         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
4144         parameter.
4145         (emit_mode_size_inline): Set need_bytesize_adj for all modes
4146         listed in adj_nunits.
4147         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
4148         listed in adj_nunits.  Don't emit case statements for such modes.
4149         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
4150         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
4151         nothing if adj_nunits is nonnull.
4152         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
4153         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
4154         (emit_mode_fbit): Update use of print_maybe_const_decl.
4155         (emit_move_size): Likewise.  Treat the array as non-const
4156         if adj_nunits.
4157         (emit_mode_adjustments): Handle adj_nunits.
4158
4159 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4160
4161         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
4162         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
4163         (VECTOR_MODES): Use it.
4164         (make_vector_modes): Take the prefix as an argument.
4165
4166 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4167             Alan Hayward  <alan.hayward@arm.com>
4168             David Sherwood  <david.sherwood@arm.com>
4169
4170         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
4171         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
4172         for MODE_VECTOR_BOOL.
4173         * machmode.def (VECTOR_BOOL_MODE): Document.
4174         * genmodes.c (VECTOR_BOOL_MODE): New macro.
4175         (make_vector_bool_mode): New function.
4176         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
4177         MODE_VECTOR_BOOL.
4178         * lto-streamer-in.c (lto_input_mode_table): Likewise.
4179         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
4180         Likewise.
4181         * stor-layout.c (int_mode_for_mode): Likewise.
4182         * tree.c (build_vector_type_for_mode): Likewise.
4183         * varasm.c (output_constant_pool_2): Likewise.
4184         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
4185         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
4186         for MODE_VECTOR_BOOL.
4187         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
4188         of mode class checks.
4189         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
4190         instead of a list of mode class checks.
4191         (expand_vector_scalar_condition): Likewise.
4192         (type_for_widest_vector_mode): Handle BImode as an inner mode.
4193
4194 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4195             Alan Hayward  <alan.hayward@arm.com>
4196             David Sherwood  <david.sherwood@arm.com>
4197
4198         * machmode.h (mode_size): Change from unsigned short to
4199         poly_uint16_pod.
4200         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
4201         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4202         or if measurement_type is not polynomial.
4203         (fixed_size_mode::includes_p): Check for constant-sized modes.
4204         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
4205         return a poly_uint16 rather than an unsigned short.
4206         (emit_mode_size): Change the type of mode_size from unsigned short
4207         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
4208         (emit_mode_adjustments): Cope with polynomial vector sizes.
4209         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4210         for GET_MODE_SIZE.
4211         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4212         for GET_MODE_SIZE.
4213         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
4214         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
4215         * caller-save.c (setup_save_areas): Likewise.
4216         (replace_reg_with_saved_mem): Likewise.
4217         * calls.c (emit_library_call_value_1): Likewise.
4218         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
4219         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
4220         (gen_lowpart_for_combine): Likewise.
4221         * convert.c (convert_to_integer_1): Likewise.
4222         * cse.c (equiv_constant, cse_insn): Likewise.
4223         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
4224         (cselib_subst_to_values): Likewise.
4225         * dce.c (word_dce_process_block): Likewise.
4226         * df-problems.c (df_word_lr_mark_ref): Likewise.
4227         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
4228         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
4229         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
4230         (rtl_for_decl_location): Likewise.
4231         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
4232         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
4233         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
4234         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
4235         (expand_expr_real_1): Likewise.
4236         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
4237         (pad_below): Likewise.
4238         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4239         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
4240         * ira.c (get_subreg_tracking_sizes): Likewise.
4241         * ira-build.c (ira_create_allocno_objects): Likewise.
4242         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
4243         (ira_sort_regnos_for_alter_reg): Likewise.
4244         * ira-costs.c (record_operand_costs): Likewise.
4245         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
4246         (resolve_simple_move): Likewise.
4247         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
4248         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
4249         (lra_constraints): Likewise.
4250         (CONST_POOL_OK_P): Reject variable-sized modes.
4251         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
4252         (add_pseudo_to_slot, lra_spill): Likewise.
4253         * omp-low.c (omp_clause_aligned_alignment): Likewise.
4254         * optabs-query.c (get_best_extraction_insn): Likewise.
4255         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4256         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
4257         (expand_mult_highpart, valid_multiword_target_p): Likewise.
4258         * recog.c (offsettable_address_addr_space_p): Likewise.
4259         * regcprop.c (maybe_mode_change): Likewise.
4260         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
4261         * regrename.c (build_def_use): Likewise.
4262         * regstat.c (dump_reg_info): Likewise.
4263         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
4264         (find_reloads, find_reloads_subreg_address): Likewise.
4265         * reload1.c (eliminate_regs_1): Likewise.
4266         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
4267         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
4268         (simplify_binary_operation_1, simplify_subreg): Likewise.
4269         * targhooks.c (default_function_arg_padding): Likewise.
4270         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
4271         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
4272         (verify_gimple_assign_ternary): Likewise.
4273         * tree-inline.c (estimate_move_cost): Likewise.
4274         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4275         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
4276         (get_address_cost_ainc): Likewise.
4277         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
4278         (vect_supportable_dr_alignment): Likewise.
4279         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4280         (vectorizable_reduction): Likewise.
4281         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
4282         (vectorizable_operation, vectorizable_load): Likewise.
4283         * tree.c (build_same_sized_truth_vector_type): Likewise.
4284         * valtrack.c (cleanup_auto_inc_dec): Likewise.
4285         * var-tracking.c (emit_note_insn_var_location): Likewise.
4286         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
4287         (ADDR_VEC_ALIGN): Likewise.
4288
4289 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4290             Alan Hayward  <alan.hayward@arm.com>
4291             David Sherwood  <david.sherwood@arm.com>
4292
4293         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
4294         unsigned short.
4295         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4296         or if measurement_type is polynomial.
4297         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
4298         * combine.c (make_extraction): Likewise.
4299         * dse.c (find_shift_sequence): Likewise.
4300         * dwarf2out.c (mem_loc_descriptor): Likewise.
4301         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
4302         (extract_bit_field, extract_low_bits): Likewise.
4303         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
4304         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
4305         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
4306         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
4307         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4308         * reload.c (find_reloads): Likewise.
4309         * reload1.c (alter_reg): Likewise.
4310         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
4311         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
4312         * tree-if-conv.c (predicate_mem_writes): Likewise.
4313         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
4314         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
4315         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
4316         * valtrack.c (dead_debug_insert_temp): Likewise.
4317         * varasm.c (mergeable_constant_section): Likewise.
4318         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
4319
4320 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4321             Alan Hayward  <alan.hayward@arm.com>
4322             David Sherwood  <david.sherwood@arm.com>
4323
4324         * expr.c (expand_assignment): Cope with polynomial mode sizes
4325         when assigning to a CONCAT.
4326
4327 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4328             Alan Hayward  <alan.hayward@arm.com>
4329             David Sherwood  <david.sherwood@arm.com>
4330
4331         * machmode.h (mode_precision): Change from unsigned short to
4332         poly_uint16_pod.
4333         (mode_to_precision): Return a poly_uint16 rather than an unsigned
4334         short.
4335         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
4336         or if measurement_type is not polynomial.
4337         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
4338         in which the mode is already known to be a scalar_int_mode.
4339         * genmodes.c (emit_mode_precision): Change the type of mode_precision
4340         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
4341         initializer.
4342         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4343         for GET_MODE_PRECISION.
4344         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4345         for GET_MODE_PRECISION.
4346         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
4347         as polynomial.
4348         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
4349         (expand_field_assignment, make_extraction): Likewise.
4350         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
4351         (get_last_value): Likewise.
4352         * convert.c (convert_to_integer_1): Likewise.
4353         * cse.c (cse_insn): Likewise.
4354         * expr.c (expand_expr_real_1): Likewise.
4355         * lra-constraints.c (simplify_operand_subreg): Likewise.
4356         * optabs-query.c (can_atomic_load_p): Likewise.
4357         * optabs.c (expand_atomic_load): Likewise.
4358         (expand_atomic_store): Likewise.
4359         * ree.c (combine_reaching_defs): Likewise.
4360         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
4361         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
4362         * tree.h (type_has_mode_precision_p): Likewise.
4363         * ubsan.c (instrument_si_overflow): Likewise.
4364
4365 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4366             Alan Hayward  <alan.hayward@arm.com>
4367             David Sherwood  <david.sherwood@arm.com>
4368
4369         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
4370         polynomial numbers of units.
4371         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
4372         (valid_vector_subparts_p): New function.
4373         (build_vector_type): Remove temporary shim and take the number
4374         of units as a poly_uint64 rather than an int.
4375         (build_opaque_vector_type): Take the number of units as a
4376         poly_uint64 rather than an int.
4377         * tree.c (build_vector_from_ctor): Handle polynomial
4378         TYPE_VECTOR_SUBPARTS.
4379         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
4380         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
4381         (build_vector_from_val): If the number of units is variable,
4382         use build_vec_duplicate_cst for constant operands and
4383         VEC_DUPLICATE_EXPR otherwise.
4384         (make_vector_type): Remove temporary is_constant ().
4385         (build_vector_type, build_opaque_vector_type): Take the number of
4386         units as a poly_uint64 rather than an int.
4387         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
4388         VECTOR_CST_NELTS.
4389         * cfgexpand.c (expand_debug_expr): Likewise.
4390         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
4391         (store_constructor, expand_expr_real_1): Likewise.
4392         (const_scalar_mask_from_tree): Likewise.
4393         * fold-const-call.c (fold_const_reduction): Likewise.
4394         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
4395         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
4396         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
4397         (fold_relational_const): Likewise.
4398         (native_interpret_vector): Likewise.  Change the size from an
4399         int to an unsigned int.
4400         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
4401         TYPE_VECTOR_SUBPARTS.
4402         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
4403         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
4404         duplicating a non-constant operand into a variable-length vector.
4405         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
4406         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
4407         * ipa-icf.c (sem_variable::equals): Likewise.
4408         * match.pd: Likewise.
4409         * omp-simd-clone.c (simd_clone_subparts): Likewise.
4410         * print-tree.c (print_node): Likewise.
4411         * stor-layout.c (layout_type): Likewise.
4412         * targhooks.c (default_builtin_vectorization_cost): Likewise.
4413         * tree-cfg.c (verify_gimple_comparison): Likewise.
4414         (verify_gimple_assign_binary): Likewise.
4415         (verify_gimple_assign_ternary): Likewise.
4416         (verify_gimple_assign_single): Likewise.
4417         * tree-pretty-print.c (dump_generic_node): Likewise.
4418         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4419         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
4420         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
4421         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
4422         (vect_shift_permute_load_chain): Likewise.
4423         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
4424         (expand_vector_condition, optimize_vector_constructor): Likewise.
4425         (lower_vec_perm, get_compute_type): Likewise.
4426         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4427         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
4428         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
4429         (vect_recog_mask_conversion_pattern): Likewise.
4430         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
4431         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
4432         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4433         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
4434         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
4435         (vectorizable_shift, vectorizable_operation, vectorizable_store)
4436         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
4437         (supportable_widening_operation): Likewise.
4438         (supportable_narrowing_operation): Likewise.
4439         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
4440         Likewise.
4441         * varasm.c (output_constant): Likewise.
4442
4443 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4444             Alan Hayward  <alan.hayward@arm.com>
4445             David Sherwood  <david.sherwood@arm.com>
4446
4447         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
4448         so that both the length == 3 and length != 3 cases set up their
4449         own permute vectors.  Add comments explaining why we know the
4450         number of elements is constant.
4451         (vect_permute_load_chain): Likewise.
4452
4453 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4454             Alan Hayward  <alan.hayward@arm.com>
4455             David Sherwood  <david.sherwood@arm.com>
4456
4457         * machmode.h (mode_nunits): Change from unsigned char to
4458         poly_uint16_pod.
4459         (ONLY_FIXED_SIZE_MODES): New macro.
4460         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
4461         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
4462         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
4463         New typedefs.
4464         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
4465         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
4466         or if measurement_type is not polynomial.
4467         * genmodes.c (ZERO_COEFFS): New macro.
4468         (emit_mode_nunits_inline): Make mode_nunits_inline return a
4469         poly_uint16.
4470         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
4471         Use ZERO_COEFFS when emitting initializers.
4472         * data-streamer.h (bp_pack_poly_value): New function.
4473         (bp_unpack_poly_value): Likewise.
4474         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4475         for GET_MODE_NUNITS.
4476         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4477         for GET_MODE_NUNITS.
4478         * tree.c (make_vector_type): Remove temporary shim and make
4479         the real function take the number of units as a poly_uint64
4480         rather than an int.
4481         (build_vector_type_for_mode): Handle polynomial nunits.
4482         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
4483         * emit-rtl.c (const_vec_series_p_1): Likewise.
4484         (gen_rtx_CONST_VECTOR): Likewise.
4485         * fold-const.c (test_vec_duplicate_folding): Likewise.
4486         * genrecog.c (validate_pattern): Likewise.
4487         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
4488         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4489         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
4490         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
4491         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
4492         * rtlanal.c (subreg_get_info): Likewise.
4493         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4494         (vect_grouped_load_supported): Likewise.
4495         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
4496         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
4497         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
4498         (simplify_const_unary_operation, simplify_binary_operation_1)
4499         (simplify_const_binary_operation, simplify_ternary_operation)
4500         (test_vector_ops_duplicate, test_vector_ops): Likewise.
4501         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
4502         instead of CONST_VECTOR_NUNITS.
4503         * varasm.c (output_constant_pool_2): Likewise.
4504         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
4505         explicit-encoded elements in the XVEC for variable-length vectors.
4506
4507 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4508
4509         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
4510
4511 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4512             Alan Hayward  <alan.hayward@arm.com>
4513             David Sherwood  <david.sherwood@arm.com>
4514
4515         * coretypes.h (fixed_size_mode): Declare.
4516         (fixed_size_mode_pod): New typedef.
4517         * builtins.h (target_builtins::x_apply_args_mode)
4518         (target_builtins::x_apply_result_mode): Change type to
4519         fixed_size_mode_pod.
4520         * builtins.c (apply_args_size, apply_result_size, result_vector)
4521         (expand_builtin_apply_args_1, expand_builtin_apply)
4522         (expand_builtin_return): Update accordingly.
4523
4524 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4525
4526         * cse.c (hash_rtx_cb): Hash only the encoded elements.
4527         * cselib.c (cselib_hash_rtx): Likewise.
4528         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
4529         CONST_VECTOR encoding.
4530
4531 2017-01-03  Jakub Jelinek  <jakub@redhat.com>
4532             Jeff Law  <law@redhat.com>
4533
4534         PR target/83641
4535         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
4536         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
4537         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
4538         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
4539
4540         PR target/83641
4541         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
4542         explicitly probe *sp in a noreturn function if there were any callee
4543         register saves or frame pointer is needed.
4544
4545 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4546
4547         PR debug/83621
4548         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
4549         BLKmode for ternary, binary or unary expressions.
4550
4551         PR debug/83645
4552         * var-tracking.c (delete_vta_debug_insn): New inline function.
4553         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
4554         insns from get_insns () to NULL instead of each bb separately.
4555         Use delete_vta_debug_insn.  No longer static.
4556         (vt_debug_insns_local, variable_tracking_main_1): Adjust
4557         delete_vta_debug_insns callers.
4558         * rtl.h (delete_vta_debug_insns): Declare.
4559         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
4560         instead of variable_tracking_main.
4561
4562 2018-01-03  Martin Sebor  <msebor@redhat.com>
4563
4564         PR tree-optimization/83603
4565         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
4566         arguments past the endof the argument list in functions declared
4567         without a prototype.
4568         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
4569         Avoid checking when arguments are null.
4570
4571 2018-01-03  Martin Sebor  <msebor@redhat.com>
4572
4573         PR c/83559
4574         * doc/extend.texi (attribute const): Fix a typo.
4575         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
4576         issuing -Wsuggest-attribute for void functions.
4577
4578 2018-01-03  Martin Sebor  <msebor@redhat.com>
4579
4580         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
4581         offset_int::from instead of wide_int::to_shwi.
4582         (maybe_diag_overlap): Remove assertion.
4583         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
4584         * gimple-ssa-sprintf.c (format_directive): Same.
4585         (parse_directive): Same.
4586         (sprintf_dom_walker::compute_format_length): Same.
4587         (try_substitute_return_value): Same.
4588
4589 2017-01-03  Jeff Law  <law@redhat.com>
4590
4591         PR middle-end/83654
4592         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
4593         non-constant residual for zero at runtime and avoid probing in
4594         that case.  Reorganize code for trailing problem to mirror handling
4595         of the residual.
4596
4597 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
4598
4599         PR tree-optimization/83501
4600         * tree-ssa-strlen.c (get_string_cst): New.
4601         (handle_char_store): Call get_string_cst.
4602
4603 2018-01-03  Martin Liska  <mliska@suse.cz>
4604
4605         PR tree-optimization/83593
4606         * tree-ssa-strlen.c: Include tree-cfg.h.
4607         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
4608         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
4609         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
4610         to false.
4611         (strlen_dom_walker::before_dom_children): Call
4612         gimple_purge_dead_eh_edges. Dump tranformation with details
4613         dump flags.
4614         (strlen_dom_walker::before_dom_children): Update call by adding
4615         new argument cleanup_eh.
4616         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
4617
4618 2018-01-03  Martin Liska  <mliska@suse.cz>
4619
4620         PR ipa/83549
4621         * cif-code.def (VARIADIC_THUNK): New enum value.
4622         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
4623         thunks.
4624
4625 2018-01-03  Jan Beulich  <jbeulich@suse.com>
4626
4627         * sse.md (mov<mode>_internal): Tighten condition for when to use
4628         vmovdqu<ssescalarsize> for TI and OI modes.
4629
4630 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4631
4632         Update copyright years.
4633
4634 2018-01-03  Martin Liska  <mliska@suse.cz>
4635
4636         PR ipa/83594
4637         * ipa-visibility.c (function_and_variable_visibility): Skip
4638         functions with noipa attribure.
4639
4640 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
4641
4642         * gcc.c (process_command): Update copyright notice dates.
4643         * gcov-dump.c (print_version): Ditto.
4644         * gcov.c (print_version): Ditto.
4645         * gcov-tool.c (print_version): Ditto.
4646         * gengtype.c (create_file): Ditto.
4647         * doc/cpp.texi: Bump @copying's copyright year.
4648         * doc/cppinternals.texi: Ditto.
4649         * doc/gcc.texi: Ditto.
4650         * doc/gccint.texi: Ditto.
4651         * doc/gcov.texi: Ditto.
4652         * doc/install.texi: Ditto.
4653         * doc/invoke.texi: Ditto.
4654
4655 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4656
4657         * vector-builder.h (vector_builder::m_full_nelts): Change from
4658         unsigned int to poly_uint64.
4659         (vector_builder::full_nelts): Update prototype accordingly.
4660         (vector_builder::new_vector): Likewise.
4661         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
4662         (vector_builder::operator ==): Likewise.
4663         (vector_builder::finalize): Likewise.
4664         * int-vector-builder.h (int_vector_builder::int_vector_builder):
4665         Take the number of elements as a poly_uint64 rather than an
4666         unsigned int.
4667         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
4668         from unsigned int to poly_uint64.
4669         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
4670         (vec_perm_indices::new_vector): Likewise.
4671         (vec_perm_indices::length): Likewise.
4672         (vec_perm_indices::nelts_per_input): Likewise.
4673         (vec_perm_indices::input_nelts): Likewise.
4674         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
4675         number of elements per input as a poly_uint64 rather than an
4676         unsigned int.  Use the original encoding for variable-length
4677         vectors, rather than clamping each individual element.
4678         For the second and subsequent elements in each pattern,
4679         clamp the step and base before clamping their sum.
4680         (vec_perm_indices::series_p): Handle polynomial element counts.
4681         (vec_perm_indices::all_in_range_p): Likewise.
4682         (vec_perm_indices_to_tree): Likewise.
4683         (vec_perm_indices_to_rtx): Likewise.
4684         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
4685         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
4686         (tree_vector_builder::new_binary_operation): Handle polynomial
4687         element counts.  Return false if we need to know the number
4688         of elements at compile time.
4689         * fold-const.c (fold_vec_perm): Punt if the number of elements
4690         isn't known at compile time.
4691
4692 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4693
4694         * vec-perm-indices.h (vec_perm_builder): Change element type
4695         from HOST_WIDE_INT to poly_int64.
4696         (vec_perm_indices::element_type): Update accordingly.
4697         (vec_perm_indices::clamp): Handle polynomial element_types.
4698         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4699         (vec_perm_indices::all_in_range_p): Likewise.
4700         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
4701         than shwi trees.
4702         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
4703         polynomial vec_perm_indices element types.
4704         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
4705         * fold-const.c (fold_vec_perm): Likewise.
4706         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
4707         * tree-vect-generic.c (lower_vec_perm): Likewise.
4708         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4709         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
4710         element type to HOST_WIDE_INT.
4711
4712 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4713             Alan Hayward  <alan.hayward@arm.com>
4714             David Sherwood  <david.sherwood@arm.com>
4715
4716         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
4717         rather than an int.  Use plus_constant.
4718         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
4719         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
4720
4721 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4722             Alan Hayward  <alan.hayward@arm.com>
4723             David Sherwood  <david.sherwood@arm.com>
4724
4725         * calls.c (emit_call_1, expand_call): Change struct_value_size from
4726         a HOST_WIDE_INT to a poly_int64.
4727
4728 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4729             Alan Hayward  <alan.hayward@arm.com>
4730             David Sherwood  <david.sherwood@arm.com>
4731
4732         * calls.c (load_register_parameters): Cope with polynomial
4733         mode sizes.  Require a constant size for BLKmode parameters
4734         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
4735         forces a parameter to be padded at the lsb end in order to
4736         fill a complete number of words, require the parameter size
4737         to be ordered wrt UNITS_PER_WORD.
4738
4739 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4740             Alan Hayward  <alan.hayward@arm.com>
4741             David Sherwood  <david.sherwood@arm.com>
4742
4743         * reload1.c (spill_stack_slot_width): Change element type
4744         from unsigned int to poly_uint64_pod.
4745         (alter_reg): Treat mode sizes as polynomial.
4746
4747 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4748             Alan Hayward  <alan.hayward@arm.com>
4749             David Sherwood  <david.sherwood@arm.com>
4750
4751         * reload.c (complex_word_subreg_p): New function.
4752         (reload_inner_reg_of_subreg, push_reload): Use it.
4753
4754 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4755             Alan Hayward  <alan.hayward@arm.com>
4756             David Sherwood  <david.sherwood@arm.com>
4757
4758         * lra-constraints.c (process_alt_operands): Reject matched
4759         operands whose sizes aren't ordered.
4760         (match_reload): Refer to this check here.
4761
4762 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4763             Alan Hayward  <alan.hayward@arm.com>
4764             David Sherwood  <david.sherwood@arm.com>
4765
4766         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4767         that the mode size is in the set {1, 2, 4, 8, 16}.
4768
4769 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4770             Alan Hayward  <alan.hayward@arm.com>
4771             David Sherwood  <david.sherwood@arm.com>
4772
4773         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4774         Use plus_constant instead of gen_rtx_PLUS.
4775
4776 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4777             Alan Hayward  <alan.hayward@arm.com>
4778             David Sherwood  <david.sherwood@arm.com>
4779
4780         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4781         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4782         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4783         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4784         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4785         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4786         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4787         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4788         * config/i386/i386.c (ix86_push_rounding): ...this new function.
4789         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4790         a poly_int64.
4791         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4792         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4793         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4794         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4795         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4796         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4797         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4798         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4799         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4800         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4801         function.
4802         * expr.c (emit_move_resolve_push): Treat the input and result
4803         of PUSH_ROUNDING as a poly_int64.
4804         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4805         (emit_push_insn): Likewise.
4806         * lra-eliminations.c (mark_not_eliminable): Likewise.
4807         * recog.c (push_operand): Likewise.
4808         * reload1.c (elimination_effects): Likewise.
4809         * rtlanal.c (nonzero_bits1): Likewise.
4810         * calls.c (store_one_arg): Likewise.  Require the padding to be
4811         known at compile time.
4812
4813 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4814             Alan Hayward  <alan.hayward@arm.com>
4815             David Sherwood  <david.sherwood@arm.com>
4816
4817         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4818         Use plus_constant instead of gen_rtx_PLUS.
4819
4820 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4821             Alan Hayward  <alan.hayward@arm.com>
4822             David Sherwood  <david.sherwood@arm.com>
4823
4824         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4825         rather than an int.
4826
4827 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4828             Alan Hayward  <alan.hayward@arm.com>
4829             David Sherwood  <david.sherwood@arm.com>
4830
4831         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4832         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4833         via stack temporaries.  Treat the mode size as polynomial too.
4834
4835 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4836             Alan Hayward  <alan.hayward@arm.com>
4837             David Sherwood  <david.sherwood@arm.com>
4838
4839         * expr.c (expand_expr_real_2): When handling conversions involving
4840         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4841         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
4842         as a poly_uint64 too.
4843
4844 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4845             Alan Hayward  <alan.hayward@arm.com>
4846             David Sherwood  <david.sherwood@arm.com>
4847
4848         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4849
4850 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4851             Alan Hayward  <alan.hayward@arm.com>
4852             David Sherwood  <david.sherwood@arm.com>
4853
4854         * combine.c (can_change_dest_mode): Handle polynomial
4855         REGMODE_NATURAL_SIZE.
4856         * expmed.c (store_bit_field_1): Likewise.
4857         * expr.c (store_constructor): Likewise.
4858         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4859         and polynomial REGMODE_NATURAL_SIZE.
4860         (gen_lowpart_common): Likewise.
4861         * reginfo.c (record_subregs_of_mode): Likewise.
4862         * rtlanal.c (read_modify_subreg_p): Likewise.
4863
4864 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4865             Alan Hayward  <alan.hayward@arm.com>
4866             David Sherwood  <david.sherwood@arm.com>
4867
4868         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4869         numbers of elements.
4870
4871 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4872             Alan Hayward  <alan.hayward@arm.com>
4873             David Sherwood  <david.sherwood@arm.com>
4874
4875         * match.pd: Cope with polynomial numbers of vector elements.
4876
4877 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4878             Alan Hayward  <alan.hayward@arm.com>
4879             David Sherwood  <david.sherwood@arm.com>
4880
4881         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4882         in a POINTER_PLUS_EXPR.
4883
4884 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4885             Alan Hayward  <alan.hayward@arm.com>
4886             David Sherwood  <david.sherwood@arm.com>
4887
4888         * omp-simd-clone.c (simd_clone_subparts): New function.
4889         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4890         (ipa_simd_modify_function_body): Likewise.
4891
4892 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4893             Alan Hayward  <alan.hayward@arm.com>
4894             David Sherwood  <david.sherwood@arm.com>
4895
4896         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4897         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4898         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4899         (expand_vector_condition, vector_element): Likewise.
4900         (subparts_gt): New function.
4901         (get_compute_type): Use subparts_gt.
4902         (count_type_subparts): Delete.
4903         (expand_vector_operations_1): Use subparts_gt instead of
4904         count_type_subparts.
4905
4906 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4907             Alan Hayward  <alan.hayward@arm.com>
4908             David Sherwood  <david.sherwood@arm.com>
4909
4910         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4911         (vect_compile_time_alias): ...this new function.  Do the calculation
4912         on poly_ints rather than trees.
4913         (vect_prune_runtime_alias_test_list): Update call accordingly.
4914
4915 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4916             Alan Hayward  <alan.hayward@arm.com>
4917             David Sherwood  <david.sherwood@arm.com>
4918
4919         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4920         numbers of units.
4921         (vect_schedule_slp_instance): Likewise.
4922
4923 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4924             Alan Hayward  <alan.hayward@arm.com>
4925             David Sherwood  <david.sherwood@arm.com>
4926
4927         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4928         constant and extern definitions for variable-length vectors.
4929         (vect_get_constant_vectors): Note that the number of units
4930         is known to be constant.
4931
4932 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4933             Alan Hayward  <alan.hayward@arm.com>
4934             David Sherwood  <david.sherwood@arm.com>
4935
4936         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4937         of units as polynomial.  Choose between WIDE and NARROW based
4938         on multiple_p.
4939
4940 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4941             Alan Hayward  <alan.hayward@arm.com>
4942             David Sherwood  <david.sherwood@arm.com>
4943
4944         * tree-vect-stmts.c (simd_clone_subparts): New function.
4945         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4946
4947 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4948             Alan Hayward  <alan.hayward@arm.com>
4949             David Sherwood  <david.sherwood@arm.com>
4950
4951         * tree-vect-stmts.c (vectorizable_call): Treat the number of
4952         vectors as polynomial.  Use build_index_vector for
4953         IFN_GOMP_SIMD_LANE.
4954
4955 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4956             Alan Hayward  <alan.hayward@arm.com>
4957             David Sherwood  <david.sherwood@arm.com>
4958
4959         * tree-vect-stmts.c (get_load_store_type): Treat the number of
4960         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4961         for variable-length vectors.
4962         (vectorizable_mask_load_store): Treat the number of units as
4963         polynomial, asserting that it is constant if the condition has
4964         already been enforced.
4965         (vectorizable_store, vectorizable_load): Likewise.
4966
4967 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4968             Alan Hayward  <alan.hayward@arm.com>
4969             David Sherwood  <david.sherwood@arm.com>
4970
4971         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4972         of units as polynomial.  Punt if we can't tell at compile time
4973         which vector contains the final result.
4974
4975 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4976             Alan Hayward  <alan.hayward@arm.com>
4977             David Sherwood  <david.sherwood@arm.com>
4978
4979         * tree-vect-loop.c (vectorizable_induction): Treat the number
4980         of units as polynomial.  Punt on SLP inductions.  Use an integer
4981         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
4982         cast of such a series for variable-length floating-point
4983         reductions.
4984
4985 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4986             Alan Hayward  <alan.hayward@arm.com>
4987             David Sherwood  <david.sherwood@arm.com>
4988
4989         * tree.h (build_index_vector): Declare.
4990         * tree.c (build_index_vector): New function.
4991         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4992         of units as polynomial, forcibly converting it to a constant if
4993         vectorizable_reduction has already enforced the condition.
4994         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
4995         to create a {1,2,3,...} vector.
4996         (vectorizable_reduction): Treat the number of units as polynomial.
4997         Choose vectype_in based on the largest scalar element size rather
4998         than the smallest number of units.  Enforce the restrictions
4999         relied on above.
5000
5001 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5002             Alan Hayward  <alan.hayward@arm.com>
5003             David Sherwood  <david.sherwood@arm.com>
5004
5005         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
5006         number of units as polynomial.
5007
5008 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5009             Alan Hayward  <alan.hayward@arm.com>
5010             David Sherwood  <david.sherwood@arm.com>
5011
5012         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
5013         * target.def (autovectorize_vector_sizes): Return the vector sizes
5014         by pointer, using vector_sizes rather than a bitmask.
5015         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
5016         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
5017         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
5018         Likewise.
5019         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
5020         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
5021         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
5022         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
5023         * omp-general.c (omp_max_vf): Likewise.
5024         * omp-low.c (omp_clause_aligned_alignment): Likewise.
5025         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
5026         * tree-vect-loop.c (vect_analyze_loop): Likewise.
5027         * tree-vect-slp.c (vect_slp_bb): Likewise.
5028         * doc/tm.texi: Regenerate.
5029         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
5030         to a poly_uint64.
5031         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
5032         the vector size as a poly_uint64 rather than an unsigned int.
5033         (current_vector_size): Change from an unsigned int to a poly_uint64.
5034         (get_vectype_for_scalar_type): Update accordingly.
5035         * tree.h (build_truth_vector_type): Take the size and number of
5036         units as a poly_uint64 rather than an unsigned int.
5037         (build_vector_type): Add a temporary overload that takes
5038         the number of units as a poly_uint64 rather than an unsigned int.
5039         * tree.c (make_vector_type): Likewise.
5040         (build_truth_vector_type): Take the number of units as a poly_uint64
5041         rather than an unsigned int.
5042
5043 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5044             Alan Hayward  <alan.hayward@arm.com>
5045             David Sherwood  <david.sherwood@arm.com>
5046
5047         * target.def (get_mask_mode): Take the number of units and length
5048         as poly_uint64s rather than unsigned ints.
5049         * targhooks.h (default_get_mask_mode): Update accordingly.
5050         * targhooks.c (default_get_mask_mode): Likewise.
5051         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
5052         * doc/tm.texi: Regenerate.
5053
5054 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5055             Alan Hayward  <alan.hayward@arm.com>
5056             David Sherwood  <david.sherwood@arm.com>
5057
5058         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
5059         * omp-general.c (omp_max_vf): Likewise.
5060         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
5061         (expand_omp_simd): Handle polynomial safelen.
5062         * omp-low.c (omplow_simd_context): Add a default constructor.
5063         (omplow_simd_context::max_vf): Change from int to poly_uint64.
5064         (lower_rec_simd_input_clauses): Update accordingly.
5065         (lower_rec_input_clauses): Likewise.
5066
5067 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5068             Alan Hayward  <alan.hayward@arm.com>
5069             David Sherwood  <david.sherwood@arm.com>
5070
5071         * tree-vectorizer.h (vect_nunits_for_cost): New function.
5072         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
5073         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
5074         (vect_analyze_slp_cost): Likewise.
5075         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
5076         (vect_model_load_cost): Likewise.
5077
5078 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5079             Alan Hayward  <alan.hayward@arm.com>
5080             David Sherwood  <david.sherwood@arm.com>
5081
5082         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
5083         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
5084         from an unsigned int * to a poly_uint64_pod *.
5085         (calculate_unrolling_factor): New function.
5086         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
5087
5088 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5089             Alan Hayward  <alan.hayward@arm.com>
5090             David Sherwood  <david.sherwood@arm.com>
5091
5092         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
5093         from an unsigned int to a poly_uint64.
5094         (_loop_vec_info::slp_unrolling_factor): Likewise.
5095         (_loop_vec_info::vectorization_factor): Change from an int
5096         to a poly_uint64.
5097         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
5098         (vect_get_num_vectors): New function.
5099         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
5100         (vect_get_num_copies): Use vect_get_num_vectors.
5101         (vect_analyze_data_ref_dependences): Change max_vf from an int *
5102         to an unsigned int *.
5103         (vect_analyze_data_refs): Change min_vf from an int * to a
5104         poly_uint64 *.
5105         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5106         than an unsigned HOST_WIDE_INT.
5107         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
5108         (vect_analyze_data_ref_dependence): Change max_vf from an int *
5109         to an unsigned int *.
5110         (vect_analyze_data_ref_dependences): Likewise.
5111         (vect_compute_data_ref_alignment): Handle polynomial vf.
5112         (vect_enhance_data_refs_alignment): Likewise.
5113         (vect_prune_runtime_alias_test_list): Likewise.
5114         (vect_shift_permute_load_chain): Likewise.
5115         (vect_supportable_dr_alignment): Likewise.
5116         (dependence_distance_ge_vf): Take the vectorization factor as a
5117         poly_uint64 rather than an unsigned HOST_WIDE_INT.
5118         (vect_analyze_data_refs): Change min_vf from an int * to a
5119         poly_uint64 *.
5120         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
5121         vfm1 as a poly_uint64 rather than an int.  Make the same change
5122         for the returned bound_scalar.
5123         (vect_gen_vector_loop_niters): Handle polynomial vf.
5124         (vect_do_peeling): Likewise.  Update call to
5125         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
5126         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
5127         be constant.
5128         * tree-vect-loop.c (vect_determine_vectorization_factor)
5129         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
5130         (vect_get_known_peeling_cost): Likewise.
5131         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
5132         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
5133         (vect_transform_loop): Likewise.  Use the lowest possible VF when
5134         updating the upper bounds of the loop.
5135         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
5136         rather than an int.
5137         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
5138         polynomial unroll factors.
5139         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
5140         (vect_make_slp_decision): Likewise.
5141         (vect_supported_load_permutation_p): Likewise, and polynomial
5142         vf too.
5143         (vect_analyze_slp_cost): Handle polynomial vf.
5144         (vect_slp_analyze_node_operations): Likewise.
5145         (vect_slp_analyze_bb_1): Likewise.
5146         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5147         than an unsigned HOST_WIDE_INT.
5148         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
5149         (vectorizable_load): Handle polynomial vf.
5150         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
5151         a poly_uint64.
5152         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
5153
5154 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5155             Alan Hayward  <alan.hayward@arm.com>
5156             David Sherwood  <david.sherwood@arm.com>
5157
5158         * match.pd: Handle bit operations involving three constants
5159         and try to fold one pair.
5160
5161 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5162
5163         * tree-vect-loop-manip.c: Include gimple-fold.h.
5164         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
5165         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
5166         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
5167         Add a path that uses a step of VF instead of 1, but disable it
5168         for now.
5169         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
5170         and niters_no_overflow parameters.  Update calls to
5171         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
5172         Create a new SSA name if the latter choses to use a ste other
5173         than zero, and return it via niters_vector_mult_vf_var.
5174         * tree-vect-loop.c (vect_transform_loop): Update calls to
5175         vect_do_peeling, vect_gen_vector_loop_niters and
5176         slpeel_make_loop_iterate_ntimes.
5177         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
5178         (vect_gen_vector_loop_niters): Update declarations after above changes.
5179
5180 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
5181
5182         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
5183         128-bit round to integer instructions.
5184         (ceil<mode>2): Likewise.
5185         (btrunc<mode>2): Likewise.
5186         (round<mode>2): Likewise.
5187
5188 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5189
5190         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
5191         unaligned VSX load/store on P8/P9.
5192         (expand_block_clear): Allow the use of unaligned VSX
5193         load/store on P8/P9.
5194
5195 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
5196
5197         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
5198         New function.
5199         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
5200         swap associated with both a load and a store.
5201
5202 2018-01-02  Andrew Waterman  <andrew@sifive.com>
5203
5204         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
5205         * config/riscv/riscv.md (clear_cache): Use it.
5206
5207 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
5208
5209         * web.c: Remove out-of-date comment.
5210
5211 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5212
5213         * expr.c (fixup_args_size_notes): Check that any existing
5214         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
5215         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
5216         (emit_single_push_insn): ...here.
5217
5218 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5219
5220         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
5221         (const_vector_encoded_nelts): New function.
5222         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
5223         (const_vector_int_elt, const_vector_elt): Declare.
5224         * emit-rtl.c (const_vector_int_elt_1): New function.
5225         (const_vector_elt): Likewise.
5226         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
5227         of CONST_VECTOR_ELT.
5228
5229 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5230
5231         * expr.c: Include rtx-vector-builder.h.
5232         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
5233         directly on the tree encoding.
5234         (const_vector_from_tree): Likewise.
5235         * optabs.c: Include rtx-vector-builder.h.
5236         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
5237         sequence of "u" values.
5238         * vec-perm-indices.c: Include rtx-vector-builder.h.
5239         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
5240         directly on the vec_perm_indices encoding.
5241
5242 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5243
5244         * doc/rtl.texi (const_vector): Describe new encoding scheme.
5245         * Makefile.in (OBJS): Add rtx-vector-builder.o.
5246         * rtx-vector-builder.h: New file.
5247         * rtx-vector-builder.c: Likewise.
5248         * rtl.h (rtx_def::u2): Add a const_vector field.
5249         (CONST_VECTOR_NPATTERNS): New macro.
5250         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
5251         (CONST_VECTOR_DUPLICATE_P): Likewise.
5252         (CONST_VECTOR_STEPPED_P): Likewise.
5253         (CONST_VECTOR_ENCODED_ELT): Likewise.
5254         (const_vec_duplicate_p): Check for a duplicated vector encoding.
5255         (unwrap_const_vec_duplicate): Likewise.
5256         (const_vec_series_p): Check for a non-duplicated vector encoding.
5257         Say that the function only returns true for integer vectors.
5258         * emit-rtl.c: Include rtx-vector-builder.h.
5259         (gen_const_vec_duplicate_1): Delete.
5260         (gen_const_vector): Call gen_const_vec_duplicate instead of
5261         gen_const_vec_duplicate_1.
5262         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
5263         (gen_const_vec_duplicate): Use rtx_vector_builder.
5264         (gen_const_vec_series): Likewise.
5265         (gen_rtx_CONST_VECTOR): Likewise.
5266         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
5267         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5268         Build a new vector rather than modifying a CONST_VECTOR in-place.
5269         (handle_special_swappables): Update call accordingly.
5270         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
5271         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5272         Build a new vector rather than modifying a CONST_VECTOR in-place.
5273         (handle_special_swappables): Update call accordingly.
5274
5275 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5276
5277         * simplify-rtx.c (simplify_const_binary_operation): Use
5278         CONST_VECTOR_ELT instead of XVECEXP.
5279
5280 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5281
5282         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
5283         the selector elements to be different from the data elements
5284         if the selector is a VECTOR_CST.
5285         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
5286         ssizetype for the selector.
5287
5288 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5289
5290         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
5291         before testing each element individually.
5292         * tree-vect-generic.c (lower_vec_perm): Likewise.
5293
5294 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5295
5296         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
5297         * selftest-run-tests.c (selftest::run_tests): Call it.
5298         * vector-builder.h (vector_builder::operator ==): New function.
5299         (vector_builder::operator !=): Likewise.
5300         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
5301         (vec_perm_indices::all_from_input_p): New function.
5302         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5303         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
5304         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
5305         instead of reading the VECTOR_CST directly.  Detect whether both
5306         vector inputs are the same before constructing the vec_perm_indices,
5307         and update the number of inputs argument accordingly.  Use the
5308         utility functions added above.  Only construct sel2 if we need to.
5309
5310 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5311
5312         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
5313         the broadcast of the low byte.
5314         (expand_mult_highpart): Use an explicit encoding for the permutes.
5315         * optabs-query.c (can_mult_highpart_p): Likewise.
5316         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
5317         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5318         (vectorizable_bswap): Likewise.
5319         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
5320         explicit encoding for the power-of-2 permutes.
5321         (vect_permute_store_chain): Likewise.
5322         (vect_grouped_load_supported): Likewise.
5323         (vect_permute_load_chain): Likewise.
5324
5325 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5326
5327         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
5328         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
5329         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
5330         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5331         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
5332         (vect_gen_perm_mask_any): Likewise.
5333
5334 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5335
5336         * int-vector-builder.h: New file.
5337         * vec-perm-indices.h: Include int-vector-builder.h.
5338         (vec_perm_indices): Redefine as an int_vector_builder.
5339         (auto_vec_perm_indices): Delete.
5340         (vec_perm_builder): Redefine as a stand-alone class.
5341         (vec_perm_indices::vec_perm_indices): New function.
5342         (vec_perm_indices::clamp): Likewise.
5343         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
5344         (vec_perm_indices::new_vector): New function.
5345         (vec_perm_indices::new_expanded_vector): Update for new
5346         vec_perm_indices class.
5347         (vec_perm_indices::rotate_inputs): New function.
5348         (vec_perm_indices::all_in_range_p): Operate directly on the
5349         encoded form, without computing elided elements.
5350         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
5351         encoding.  Update for new vec_perm_indices class.
5352         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
5353         the given vec_perm_builder.
5354         (expand_vec_perm_var): Update vec_perm_builder constructor.
5355         (expand_mult_highpart): Use vec_perm_builder instead of
5356         auto_vec_perm_indices.
5357         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
5358         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
5359         or double series encoding as appropriate.
5360         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
5361         vec_perm_indices instead of auto_vec_perm_indices.
5362         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5363         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5364         (vect_permute_store_chain): Likewise.
5365         (vect_grouped_load_supported): Likewise.
5366         (vect_permute_load_chain): Likewise.
5367         (vect_shift_permute_load_chain): Likewise.
5368         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5369         (vect_transform_slp_perm_load): Likewise.
5370         (vect_schedule_slp_instance): Likewise.
5371         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5372         (vectorizable_mask_load_store): Likewise.
5373         (vectorizable_bswap): Likewise.
5374         (vectorizable_store): Likewise.
5375         (vectorizable_load): Likewise.
5376         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
5377         vec_perm_indices instead of auto_vec_perm_indices.  Use
5378         tree_to_vec_perm_builder to read the vector from a tree.
5379         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
5380         vec_perm_builder instead of a vec_perm_indices.
5381         (have_whole_vector_shift): Use vec_perm_builder and
5382         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
5383         truncation to calc_vec_perm_mask_for_shift.
5384         (vect_create_epilog_for_reduction): Likewise.
5385         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
5386         from auto_vec_perm_indices to vec_perm_indices.
5387         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5388         instead of changing individual elements.
5389         (aarch64_vectorize_vec_perm_const): Use new_vector to install
5390         the vector in d.perm.
5391         * config/arm/arm.c (expand_vec_perm_d::perm): Change
5392         from auto_vec_perm_indices to vec_perm_indices.
5393         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5394         instead of changing individual elements.
5395         (arm_vectorize_vec_perm_const): Use new_vector to install
5396         the vector in d.perm.
5397         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
5398         Update vec_perm_builder constructor.
5399         (rs6000_expand_interleave): Likewise.
5400         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
5401         (rs6000_expand_interleave): Likewise.
5402
5403 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5404
5405         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
5406         to qimode could truncate the indices.
5407         * optabs.c (expand_vec_perm_var): Likewise.
5408
5409 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5410
5411         * Makefile.in (OBJS): Add vec-perm-indices.o.
5412         * vec-perm-indices.h: New file.
5413         * vec-perm-indices.c: Likewise.
5414         * target.h (vec_perm_indices): Replace with a forward class
5415         declaration.
5416         (auto_vec_perm_indices): Move to vec-perm-indices.h.
5417         * optabs.h: Include vec-perm-indices.h.
5418         (expand_vec_perm): Delete.
5419         (selector_fits_mode_p, expand_vec_perm_var): Declare.
5420         (expand_vec_perm_const): Declare.
5421         * target.def (vec_perm_const_ok): Replace with...
5422         (vec_perm_const): ...this new hook.
5423         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
5424         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
5425         * doc/tm.texi: Regenerate.
5426         * optabs.def (vec_perm_const): Delete.
5427         * doc/md.texi (vec_perm_const): Likewise.
5428         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
5429         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
5430         expand_vec_perm for constant permutation vectors.  Assert that
5431         the mode of variable permutation vectors is the integer equivalent
5432         of the mode that is being permuted.
5433         * optabs-query.h (selector_fits_mode_p): Declare.
5434         * optabs-query.c: Include vec-perm-indices.h.
5435         (selector_fits_mode_p): New function.
5436         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
5437         is defined, instead of checking whether the vec_perm_const_optab
5438         exists.  Use targetm.vectorize.vec_perm_const instead of
5439         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
5440         fit in the vector mode before using a variable permute.
5441         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
5442         vec_perm_indices instead of an rtx.
5443         (expand_vec_perm): Replace with...
5444         (expand_vec_perm_const): ...this new function.  Take the selector
5445         as a vec_perm_indices rather than an rtx.  Also take the mode of
5446         the selector.  Update call to shift_amt_for_vec_perm_mask.
5447         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
5448         Use vec_perm_indices::new_expanded_vector to expand the original
5449         selector into bytes.  Check whether the indices fit in the vector
5450         mode before using a variable permute.
5451         (expand_vec_perm_var): Make global.
5452         (expand_mult_highpart): Use expand_vec_perm_const.
5453         * fold-const.c: Includes vec-perm-indices.h.
5454         * tree-ssa-forwprop.c: Likewise.
5455         * tree-vect-data-refs.c: Likewise.
5456         * tree-vect-generic.c: Likewise.
5457         * tree-vect-loop.c: Likewise.
5458         * tree-vect-slp.c: Likewise.
5459         * tree-vect-stmts.c: Likewise.
5460         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
5461         Delete.
5462         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
5463         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
5464         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
5465         (aarch64_vectorize_vec_perm_const): ...this new function.
5466         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5467         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5468         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
5469         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
5470         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5471         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5472         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
5473         into...
5474         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
5475         check for NEON modes.
5476         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
5477         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
5478         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
5479         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
5480         into...
5481         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
5482         the old VEC_PERM_CONST conditions.
5483         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
5484         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
5485         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
5486         (ia64_vectorize_vec_perm_const_ok): Merge into...
5487         (ia64_vectorize_vec_perm_const): ...this new function.
5488         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
5489         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
5490         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
5491         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
5492         * config/mips/mips.c (mips_expand_vec_perm_const)
5493         (mips_vectorize_vec_perm_const_ok): Merge into...
5494         (mips_vectorize_vec_perm_const): ...this new function.
5495         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
5496         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
5497         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
5498         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
5499         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
5500         (rs6000_expand_vec_perm_const): Delete.
5501         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
5502         Delete.
5503         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5504         (altivec_expand_vec_perm_const_le): Take each operand individually.
5505         Operate on constant selectors rather than rtxes.
5506         (altivec_expand_vec_perm_const): Likewise.  Update call to
5507         altivec_expand_vec_perm_const_le.
5508         (rs6000_expand_vec_perm_const): Delete.
5509         (rs6000_vectorize_vec_perm_const_ok): Delete.
5510         (rs6000_vectorize_vec_perm_const): New function.
5511         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5512         an element count and rtx array.
5513         (rs6000_expand_extract_even): Update call accordingly.
5514         (rs6000_expand_interleave): Likewise.
5515         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
5516         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
5517         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
5518         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
5519         (rs6000_expand_vec_perm_const): Delete.
5520         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5521         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5522         (altivec_expand_vec_perm_const_le): Take each operand individually.
5523         Operate on constant selectors rather than rtxes.
5524         (altivec_expand_vec_perm_const): Likewise.  Update call to
5525         altivec_expand_vec_perm_const_le.
5526         (rs6000_expand_vec_perm_const): Delete.
5527         (rs6000_vectorize_vec_perm_const_ok): Delete.
5528         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
5529         reference to the SPE evmerge intructions.
5530         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5531         an element count and rtx array.
5532         (rs6000_expand_extract_even): Update call accordingly.
5533         (rs6000_expand_interleave): Likewise.
5534         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
5535         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
5536         new function.
5537         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5538
5539 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5540
5541         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
5542         vector mode and that that mode matches the mode of the data
5543         being permuted.
5544         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
5545         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
5546         directly using expand_vec_perm_1 when forcing selectors into
5547         registers.
5548         (expand_vec_perm_var): New function, split out from expand_vec_perm.
5549
5550 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5551
5552         * optabs-query.h (can_vec_perm_p): Delete.
5553         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
5554         * optabs-query.c (can_vec_perm_p): Split into...
5555         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
5556         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
5557         particular selector is valid.
5558         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5559         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5560         (vect_grouped_load_supported): Likewise.
5561         (vect_shift_permute_load_chain): Likewise.
5562         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5563         (vect_transform_slp_perm_load): Likewise.
5564         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5565         (vectorizable_bswap): Likewise.
5566         (vect_gen_perm_mask_checked): Likewise.
5567         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
5568         implementations of variable permutation vectors into account
5569         when deciding which selector to use.
5570         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
5571         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
5572         with a false third argument.
5573         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
5574         to test whether the constant selector is valid and can_vec_perm_var_p
5575         to test whether a variable selector is valid.
5576
5577 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5578
5579         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
5580         * optabs-query.c (can_vec_perm_p): Likewise.
5581         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
5582         instead of vec_perm_indices.
5583         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
5584         (vect_gen_perm_mask_checked): Likewise,
5585         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
5586         (vect_gen_perm_mask_checked): Likewise,
5587
5588 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5589
5590         * optabs-query.h (qimode_for_vec_perm): Declare.
5591         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
5592         (qimode_for_vec_perm): ...this new function.
5593         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
5594
5595 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5596
5597         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
5598         does not have a conditional at the top.
5599
5600 2018-01-02  Richard Biener  <rguenther@suse.de>
5601
5602         * ipa-inline.c (big_speedup_p): Fix expression.
5603
5604 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
5605
5606         PR target/81616
5607         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
5608         for generic 4->6.
5609
5610 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
5611
5612         PR target/81616
5613         Generic tuning.
5614         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
5615         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
5616         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
5617         cond_taken_branch_cost 3->4.
5618
5619 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
5620
5621         PR tree-optimization/83581
5622         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
5623         TODO_cleanup_cfg if any changes have been made.
5624
5625         PR middle-end/83608
5626         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
5627         convert_modes if target mode has the right side, but different mode
5628         class.
5629
5630         PR middle-end/83609
5631         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
5632         last argument when extracting from CONCAT.  If either from_real or
5633         from_imag is NULL, use expansion through memory.  If result is not
5634         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
5635         the parts directly to inner mode, if even that fails, use expansion
5636         through memory.
5637
5638         PR middle-end/83623
5639         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
5640         check for bswap in mode rather than HImode and use that in expand_unop
5641         too.
5642 \f
5643 Copyright (C) 2018 Free Software Foundation, Inc.
5644
5645 Copying and distribution of this file, with or without modification,
5646 are permitted in any medium without royalty provided the copyright
5647 notice and this notice are preserved.