gcc/ChangeLog

   1 2018-02-08  Richard Biener  <rguenther@suse.de>
   2
   3         PR tree-optimization/84278
   4         * tree-vect-stmts.c (vectorizable_store): When looking for
   5         smaller vector types to perform grouped strided loads/stores
   6         make sure the mode is supported by the target.
   7         (vectorizable_load): Likewise.
   8
   9 2018-02-08  Wilco Dijkstra  <wdijkstr@arm.com>
  10
  11         * config/aarch64/aarch64.c (aarch64_components_for_bb):
  12         Increase LDP/STP opportunities by adding adjacent callee-saves.
  13
  14 2018-02-08  Wilco Dijkstra  <wdijkstr@arm.com>
  15
  16         PR rtl-optimization/84068
  17         PR rtl-optimization/83459
  18         * haifa-sched.c (rank_for_schedule): Fix SCHED_PRESSURE_MODEL sorting.
  19
  20 2018-02-08  Aldy Hernandez  <aldyh@redhat.com>
  21
  22         PR tree-optimization/84224
  23         * gimple-ssa-warn-alloca.c (pass_walloca::execute): Remove assert.
  24         * calls.c (gimple_alloca_call_p): Only return TRUE when we have
  25         non-zero arguments.
  26
  27 2018-02-07  Iain Sandoe  <iain@codesourcery.com>
  28
  29         * config/rs6000/altivec.md (*restore_world): Remove LR use.
  30         * config/rs6000/predicates.md (restore_world_operation): Adjust op
  31         count, remove one USE.
  32
  33 2018-02-07  Michael Meissner  <meissner@linux.vnet.ibm.com>
  34
  35         * doc/install.texi (Configuration): Document the
  36         --with-long-double-format={ibm,ieee} PowerPC configuration
  37         options.
  38
  39         PR target/84154
  40         * config/rs6000/rs6000.md (fix_trunc<SFDF:mode><QHI:mode>2):
  41         Convert from define_expand to be define_insn_and_split.  Rework
  42         float/double/_Float128 conversions to QI/HI/SImode to work with
  43         both ISA 2.07 (power8) or ISA 3.0 (power9).  Fix regression where
  44         conversions to QI/HImode types did a store and then a load to
  45         truncate the value.  For conversions to VSX registers, don't split
  46         the insn, instead emit the code directly.  Use the code iterator
  47         any_fix to combine signed and unsigned conversions.
  48         (fix<uns>_trunc<SFDF:mode>si2_p8): Likewise.
  49         (fixuns_trunc<SFDF:mode><QHI:mode>2): Likewise.
  50         (fix_trunc<IEEE128:mode><QHI:mode>2): Likewise.
  51         (fix<uns>_trunc<SFDF:mode><QHI:mode>2): Likewise.
  52         (fix_<mode>di2_hw): Likewise.
  53         (fixuns_<mode>di2_hw): Likewise.
  54         (fix_<mode>si2_hw): Likewise.
  55         (fixuns_<mode>si2_hw): Likewise.
  56         (fix<uns>_<IEEE128:mode><SDI:mode>2_hw): Likewise.
  57         (fix<uns>_trunc<IEEE128:mode><QHI:mode>2): Likewise.
  58         (fctiw<u>z_<mode>_smallint): Rename fctiw<u>z_<mode>_smallint to
  59         fix<uns>_trunc<SFDF:mode>si2_p8.
  60         (fix_trunc<SFDF:mode><QHI:mode>2_internal): Delete, no longer
  61         used.
  62         (fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
  63         (fix<uns>_<mode>_mem): Likewise.
  64         (fctiw<u>z_<mode>_mem): Likewise.
  65         (fix<uns>_<mode>_mem): Likewise.
  66         (fix<uns>_trunc<SFDF:mode><QHSI:mode>2_mem): On ISA 3.0, prevent
  67         the register allocator from doing a direct move to the GPRs to do
  68         a store, and instead use the ISA 3.0 store byte/half-word from
  69         vector register instruction.  For IEEE 128-bit floating point,
  70         also optimize stores of 32-bit ints.
  71         (fix<uns>_trunc<IEEE128:mode><QHSI:mode>2_mem): Likewise.
  72
  73 2018-02-07  Alan Hayward  <alan.hayward@arm.com>
  74
  75         * genextract.c (push_pathstr_operand): New function to support
  76         [a-zA-Z].
  77         (walk_rtx): Call push_pathstr_operand.
  78         (print_path): Support [a-zA-Z].
  79
  80 2018-02-07  Richard Biener  <rguenther@suse.de>
  81
  82         PR tree-optimization/84037
  83         * tree-vectorizer.h (struct _loop_vec_info): Add ivexpr_map member.
  84         (cse_and_gimplify_to_preheader): Declare.
  85         (vect_get_place_in_interleaving_chain): Likewise.
  86         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
  87         ivexpr_map.
  88         (_loop_vec_info::~_loop_vec_info): Delete it.
  89         (cse_and_gimplify_to_preheader): New function.
  90         * tree-vect-slp.c (vect_get_place_in_interleaving_chain): Export.
  91         * tree-vect-stmts.c (vectorizable_store): CSE base and steps.
  92         (vectorizable_load): Likewise.  For grouped stores always base
  93         the IV on the first element.
  94         * tree-vect-loop-manip.c (vect_loop_versioning): Unshare versioning
  95         condition before gimplifying.
  96
  97 2018-02-07  Jakub Jelinek  <jakub@redhat.com>
  98
  99         * tree-eh.c (operation_could_trap_helper_p): Ignore honor_trapv for
 100         *DIV_EXPR and *MOD_EXPR.
 101
 102 2018-02-07  H.J. Lu  <hongjiu.lu@intel.com>
 103
 104         PR target/84248
 105         * config/i386/i386.c (ix86_option_override_internal): Mask out
 106         the CF_SET bit when checking -fcf-protection.
 107
 108 2018-02-07  Tom de Vries  <tom@codesourcery.com>
 109
 110         PR libgomp/84217
 111         * omp-expand.c (expand_oacc_collapse_init): Ensure diff_type is large
 112         enough.
 113
 114 2018-02-07  Richard Biener  <rguenther@suse.de>
 115
 116         PR tree-optimization/84204
 117         * tree-chrec.c (chrec_fold_plus_1): Remove size limiting in
 118         this place.
 119
 120         PR tree-optimization/84205
 121         * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Also
 122         special-case isl_ast_op_zdiv_r.
 123
 124         PR tree-optimization/84223
 125         * graphite-scop-detection.c (gather_bbs::before_dom_children):
 126         Only add conditions from within the region.
 127         (gather_bbs::after_dom_children): Adjust.
 128
 129 2018-02-07  Georg-Johann Lay  <avr@gjlay.de>
 130
 131         PR target/84209
 132         * config/avr/avr.h (GENERAL_REGNO_P, GENERAL_REG_P): New macros.
 133         * config/avr/avr.md: Only post-reload split REG-REG moves if
 134         either register is REGERAL_REG_P.
 135
 136 2018-02-07  Jakub Jelinek  <jakub@redhat.com>
 137
 138         PR tree-optimization/84235
 139         * tree-ssa-scopedtables.c
 140         (avail_exprs_stack::simplify_binary_operation): Fir MINUS_EXPR, punt
 141         if the subtraction is performed in floating point type where NaNs are
 142         honored.  For *DIV_EXPR, punt for ALL_FRACT_MODE_Ps where we can't
 143         build 1.  Formatting fix.
 144
 145 2018-02-06  Jakub Jelinek  <jakub@redhat.com>
 146
 147         PR target/84146
 148         * config/i386/i386.c (rest_of_insert_endbranch): Only skip
 149         NOTE_INSN_CALL_ARG_LOCATION after a call, not anything else,
 150         and skip it regardless of bb boundaries.  Use CALL_P macro,
 151         don't test INSN_P (insn) together with CALL_P or JUMP_P check
 152         unnecessarily, formatting fix.
 153
 154 2018-02-06  Michael Collison  <michael.collison@arm.com>
 155
 156         * config/arm/thumb2.md:
 157         (*thumb2_mov_negscc): Split only if TARGET_THUMB2 && !arm_restrict_it.
 158         (*thumb_mov_notscc): Ditto.
 159
 160 2018-02-06  Michael Meissner  <meissner@linux.vnet.ibm.com>
 161
 162         PR target/84154
 163         * config/rs6000/rs6000.md (su code attribute): Use "u" for
 164         unsigned_fix, not "s".
 165
 166 2018-02-06  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 167
 168         * configure.ac (gcc_fn_eh_frame_ro): New function.
 169         (gcc_cv_as_cfi_directive): Check both 32 and 64-bit assembler for
 170         correct .eh_frame permissions.
 171         * configure: Regenerate.
 172
 173 2018-02-06  Andrew Jenner  <andrew@codeourcery.com>
 174
 175         * doc/invoke.texi: Add section for the PowerPC SPE backend. Remove
 176         irrelevant options.
 177
 178 2018-02-06  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 179
 180         * config/rs6000/rs6000.c (rs6000_option_override_internal):
 181         Display warning message for -mno-speculate-indirect-jumps.
 182
 183 2018-02-06  Andrew Jenner  <andrew@codesourcery.com>
 184
 185         * config/powerpcspe/powerpcspe.opt: (msimple-fpu, mfpu) Add
 186         Undocumented.
 187         * config/powerpcspe/sysv4.opt (mbit-align): Likewise.
 188
 189 2018-02-06  Aldy Hernandez  <aldyh@redhat.com>
 190
 191         PR tree-optimization/84225
 192         * tree-eh.c (find_trapping_overflow): Only call
 193         operation_no_trapping_overflow when ANY_INTEGRAL_TYPE_P.
 194
 195 2018-02-06  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 196
 197         PR target/84145
 198         * config/i386/i386.c: Reimplement the check of possible options
 199         -mibt/-mshstk conbination. Change error messages.
 200         * doc/invoke.texi: Fix a typo: remove extra '='.
 201
 202 2018-02-06  Marek Polacek  <polacek@redhat.com>
 203
 204         PR tree-optimization/84228
 205         * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Skip debug statements.
 206
 207 2018-02-06  Tamar Christina  <tamar.christina@arm.com>
 208
 209         PR target/82641
 210         * config/arm/arm.c (arm_print_asm_arch_directives): Record already
 211         emitted arch directives.
 212         * config/arm/arm-c.c (arm_cpu_builtins): Undefine __ARM_ARCH and
 213         __ARM_FEATURE_COPROC before changing architectures.
 214
 215 2018-02-06  Richard Biener  <rguenther@suse.de>
 216
 217         * config/i386/i386.c (print_reg): Fix typo.
 218         (ix86_loop_unroll_adjust): Do not unroll beyond the original nunroll.
 219
 220 2018-02-06  Eric Botcazou  <ebotcazou@adacore.com>
 221
 222         * configure: Regenerate.
 223
 224 2018-02-05  Martin Sebor  <msebor@redhat.com>
 225
 226         PR tree-optimization/83369
 227         * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Use %G to print
 228         inlining context.
 229
 230 2018-02-05  Martin Liska  <mliska@suse.cz>
 231
 232         * doc/invoke.texi: Cherry-pick upstream r323995.
 233
 234 2018-02-05  Richard Sandiford  <richard.sandiford@linaro.org>
 235
 236         * ira.c (ira_init_register_move_cost): Adjust comment.
 237
 238 2018-02-05  Martin Liska  <mliska@suse.cz>
 239
 240         PR gcov-profile/84137
 241         * doc/gcov.texi: Fix typo in documentation.
 242
 243 2018-02-05  Martin Liska  <mliska@suse.cz>
 244
 245         PR gcov-profile/83879
 246         * doc/gcov.texi: Document necessity of --dynamic-list-data when
 247         using dlopen functionality.
 248
 249 2018-02-05  Olga Makhotina  <olga.makhotina@intel.com>
 250
 251         * config/i386/avx512dqintrin.h (_mm_mask_range_sd, _mm_maskz_range_sd,
 252         _mm_mask_range_round_sd, _mm_maskz_range_round_sd, _mm_mask_range_ss,
 253         _mm_maskz_range_ss, _mm_mask_range_round_ss,
 254         _mm_maskz_range_round_ss): New intrinsics.
 255         (__builtin_ia32_rangesd128_round)
 256         (__builtin_ia32_rangess128_round): Remove.
 257         (__builtin_ia32_rangesd128_mask_round,
 258         __builtin_ia32_rangess128_mask_round): New builtins.
 259         * config/i386/i386-builtin.def (__builtin_ia32_rangesd128_round,
 260         __builtin_ia32_rangess128_round): Remove.
 261         (__builtin_ia32_rangesd128_mask_round,
 262         __builtin_ia32_rangess128_mask_round): New builtins.
 263         * config/i386/sse.md (ranges<mode><round_saeonly_name>): Renamed to ...
 264         (ranges<mode><mask_scalar_name><round_saeonly_scalar_name>): ... this.
 265         ((match_operand:VF_128 2 "<round_saeonly_nimm_predicate>"
 266         "<round_saeonly_constraint>")): Changed to ...
 267         ((match_operand:VF_128 2 "<round_saeonly_scalar_nimm_predicate>"
 268         "<round_saeonly_scalar_constraint>")): ... this.
 269         ("vrange<ssescalarmodesuffix>\t{%3, <round_saeonly_op4>%2, %1, %0|
 270         %0, %1, %2<round_saeonly_op4>, %3}"): Changed to ...
 271         ("vrange<ssescalarmodesuffix>\t{%3, <round_saeonly_scalar_mask_op4>%2,
 272         %1, %0<mask_scalar_operand4>|%0<mask_scalar_operand4>, %1,
 273         %2<round_saeonly_scalar_mask_op4>, %3}"): ... this.
 274
 275 2018-02-02  Andrew Jenner  <andrew@codesourcery.com>
 276
 277         * config/powerpcspe/powerpcspe.opt: Add Undocumented to irrelevant
 278         options.
 279         * config/powerpcspe/powerpcspe-tables.opt (rs6000_cpu_opt_value):
 280         Remove all values except native, 8540 and 8548.
 281
 282 2018-02-02  H.J. Lu  <hongjiu.lu@intel.com>
 283
 284         * config/i386/i386.c (ix86_output_function_return): Pass
 285         INVALID_REGNUM, instead of -1, as invalid register number to
 286         indirect_thunk_name and output_indirect_thunk.
 287
 288 2018-02-02  Julia Koval  <julia.koval@intel.com>
 289
 290         * config.gcc: Add -march=icelake.
 291         * config/i386/driver-i386.c (host_detect_local_cpu): Detect icelake.
 292         * config/i386/i386-c.c (ix86_target_macros_internal): Handle icelake.
 293         * config/i386/i386.c (processor_costs): Add m_ICELAKE.
 294         (PTA_ICELAKE, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES, PTA_AVX512VBMI2,
 295         PTA_VPCLMULQDQ, PTA_RDPID, PTA_AVX512BITALG): New.
 296         (processor_target_table): Add icelake.
 297         (ix86_option_override_internal): Handle new PTAs.
 298         (get_builtin_code_for_version): Handle icelake.
 299         (M_INTEL_COREI7_ICELAKE): New.
 300         (fold_builtin_cpu): Handle icelake.
 301         * config/i386/i386.h (TARGET_ICELAKE, PROCESSOR_ICELAKE): New.
 302         * doc/invoke.texi: Add -march=icelake.
 303
 304 2018-02-02  Julia Koval  <julia.koval@intel.com>
 305
 306         * config/i386/i386.c (ix86_option_override_internal): Change flags type
 307         to wide_int_bitmask.
 308         * wide-int-bitmask.h: New.
 309
 310 2018-02-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 311
 312         PR target/84066
 313         * config/i386/i386.md: Replace Pmode with word_mode in
 314         builtin_setjmp_setup and builtin_longjmp to support x32.
 315
 316 2018-02-01  Peter Bergner  <bergner@vnet.ibm.com>
 317
 318         PR target/56010
 319         PR target/83743
 320         * config/rs6000/driver-rs6000.c: #include "diagnostic.h".
 321         #include "opts.h".
 322         (rs6000_supported_cpu_names): New static variable.
 323         (linux_cpu_translation_table): Likewise.
 324         (elf_platform) <cpu>: Define new static variable and use it.
 325         Translate kernel AT_PLATFORM name to canonical name if needed.
 326         Error if platform name is unknown.
 327
 328 2018-02-01  Aldy Hernandez  <aldyh@redhat.com>
 329
 330         PR target/84089
 331         * config/pa/predicates.md (base14_operand): Handle E_VOIDmode.
 332
 333 2018-02-01  Jeff Law  <law@redhat.com>
 334
 335         PR target/84128
 336         * config/i386/i386.c (release_scratch_register_on_entry): Add new
 337         OFFSET and RELEASE_VIA_POP arguments.  Use SP+OFFSET to restore
 338         the scratch if RELEASE_VIA_POP is false.
 339         (ix86_adjust_stack_and_probe_stack_clash): Un-constify SIZE.
 340         If we have to save a temporary register, decrement SIZE appropriately.
 341         Pass new arguments to release_scratch_register_on_entry.
 342         (ix86_adjust_stack_and_probe): Likewise.
 343         (ix86_emit_probe_stack_range): Pass new arguments to
 344         release_scratch_register_on_entry.
 345
 346 2018-02-01  Uros Bizjak  <ubizjak@gmail.com>
 347
 348         PR rtl-optimization/84157
 349         * combine.c (change_zero_ext): Use REG_P predicate in
 350         front of HARD_REGISTER_P predicate.
 351
 352 2018-02-01  Georg-Johann Lay  <avr@gjlay.de>
 353
 354         * config/avr/avr.c (avr_option_override): Move disabling of
 355         -fdelete-null-pointer-checks to...
 356         * common/config/avr/avr-common.c (avr_option_optimization_table):
 357         ...here.
 358
 359 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 360
 361         PR tree-optimization/81635
 362         * tree-data-ref.c (split_constant_offset_1): For types that
 363         wrap on overflow, try to use range info to prove that wrapping
 364         cannot occur.
 365
 366 2018-02-01  Renlin Li  <renlin.li@arm.com>
 367
 368         PR target/83370
 369         * config/aarch64/aarch64.c (aarch64_class_max_nregs): Handle
 370         TAILCALL_ADDR_REGS.
 371         (aarch64_register_move_cost): Likewise.
 372         * config/aarch64/aarch64.h (reg_class): Rename CALLER_SAVE_REGS to
 373         TAILCALL_ADDR_REGS.
 374         (REG_CLASS_NAMES): Likewise.
 375         (REG_CLASS_CONTENTS): Rename CALLER_SAVE_REGS to
 376         TAILCALL_ADDR_REGS. Remove IP registers.
 377         * config/aarch64/aarch64.md (Ucs): Update register constraint.
 378
 379 2018-02-01  Richard Biener  <rguenther@suse.de>
 380
 381         * domwalk.h (dom_walker::dom_walker): Add additional constructor
 382         for specifying RPO order and allow NULL for that.
 383         * domwalk.c (dom_walker::dom_walker): Likewise.
 384         (dom_walker::walk): Handle NULL RPO order.
 385         * tree-into-ssa.c (rewrite_dom_walker): Do not walk dom children
 386         in RPO order.
 387         (rewrite_update_dom_walker): Likewise.
 388         (mark_def_dom_walker): Likewise.
 389
 390 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 391
 392         * config/aarch64/aarch64-protos.h (aarch64_split_sve_subreg_move)
 393         (aarch64_maybe_expand_sve_subreg_move): Declare.
 394         * config/aarch64/aarch64.md (UNSPEC_REV_SUBREG): New unspec.
 395         * config/aarch64/predicates.md (aarch64_any_register_operand): New
 396         predicate.
 397         * config/aarch64/aarch64-sve.md (mov<mode>): Optimize subreg moves
 398         that are semantically a reverse operation.
 399         (*aarch64_sve_mov<mode>_subreg_be): New pattern.
 400         * config/aarch64/aarch64.c (aarch64_maybe_expand_sve_subreg_move):
 401         (aarch64_replace_reg_mode, aarch64_split_sve_subreg_move): New
 402         functions.
 403         (aarch64_can_change_mode_class): For big-endian, forbid changes
 404         between two SVE modes if they have different element sizes.
 405
 406 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 407
 408         * config/aarch64/aarch64.c (aarch64_expand_sve_const_vector): Prefer
 409         the TImode handling for big-endian targets.
 410
 411 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 412
 413         * config/aarch64/aarch64-sve.md (sve_ld1rq): Replace with...
 414         (*sve_ld1rq<Vesize>): ... this new pattern.  Handle all element sizes,
 415         not just bytes.
 416         * config/aarch64/aarch64.c (aarch64_expand_sve_widened_duplicate):
 417         Remove BSWAP handing for big-endian targets and use the form of
 418         LD1RQ appropariate for the mode.
 419
 420 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 421
 422         * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Handle
 423         all CONST_VECTOR_DUPLICATE_P vectors, not just those with a single
 424         duplicated element.
 425
 426 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 427
 428         PR tearget/83845
 429         * config/aarch64/aarch64.c (aarch64_secondary_reload): Tighten
 430         check for operands that need to go through aarch64_sve_reload_be.
 431
 432 2018-02-01  Jakub Jelinek  <jakub@redhat.com>
 433
 434         PR tree-optimization/81661
 435         PR tree-optimization/84117
 436         * tree-eh.h (rewrite_to_non_trapping_overflow): Declare.
 437         * tree-eh.c: Include gimplify.h.
 438         (find_trapping_overflow, replace_trapping_overflow,
 439         rewrite_to_non_trapping_overflow): New functions.
 440         * tree-vect-loop.c: Include tree-eh.h.
 441         (vect_get_loop_niters): Use rewrite_to_non_trapping_overflow.
 442         * tree-data-ref.c: Include tree-eh.h.
 443         (get_segment_min_max): Use rewrite_to_non_trapping_overflow.
 444
 445 2018-01-31  Uros Bizjak  <ubizjak@gmail.com>
 446
 447         PR rtl-optimization/84123
 448         * combine.c (change_zero_ext): Check if hard register satisfies
 449         can_change_dest_mode before calling gen_lowpart_SUBREG.
 450
 451 2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>
 452
 453         PR target/82444
 454         * ira.c (ira_init_register_move_cost): Remove assert.
 455
 456 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 457
 458         PR rtl-optimization/84071
 459         * doc/tm.texi.in (WORD_REGISTER_OPERATIONS): Add explicit case.
 460         * doc/tm.texi: Regenerate.
 461
 462 2018-01-31  Richard Biener  <rguenther@suse.de>
 463
 464         PR tree-optimization/84132
 465         * tree-data-ref.c (analyze_miv_subscript): Properly
 466         check whether evolution_function_is_affine_multivariate_p
 467         before calling gcd_of_steps_may_divide_p.
 468
 469 2018-01-31  Julia Koval  <julia.koval@intel.com>
 470
 471         PR target/83618
 472         * config/i386/i386.c (ix86_expand_builtin): Handle IX86_BUILTIN_RDPID.
 473         * config/i386/i386.md (rdpid_rex64) New.
 474         (rdpid): Make 32bit only.
 475
 476 2018-01-29  Aldy Hernandez  <aldyh@redhat.com>
 477
 478         PR lto/84105
 479         * tree-pretty-print.c (dump_generic_node): Handle a TYPE_NAME with
 480         an IDENTIFIER_NODE for FUNCTION_TYPE's.
 481
 482 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 483
 484         Revert
 485         2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
 486
 487         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
 488
 489 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 490
 491         PR rtl-optimization/84071
 492         * combine.c (record_dead_and_set_regs_1): Record the source unmodified
 493         for a paradoxical SUBREG on a WORD_REGISTER_OPERATIONS target.
 494
 495 2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>
 496
 497         * config/arc/arc.c (arc_handle_aux_attribute): New function.
 498         (arc_attribute_table): Add 'aux' attribute.
 499         (arc_in_small_data_p): Consider aux like variables.
 500         (arc_is_aux_reg_p): New function.
 501         (arc_asm_output_aligned_decl_local): Ignore 'aux' like variables.
 502         (arc_get_aux_arg): New function.
 503         (prepare_move_operands): Handle aux-register access.
 504         (arc_handle_aux_attribute): New function.
 505         * doc/extend.texi (ARC Variable attributes): Add subsection.
 506
 507 2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>
 508
 509         * config/arc/arc-protos.h (arc_is_uncached_mem_p): Function proto.
 510         * config/arc/arc.c (arc_handle_uncached_attribute): New function.
 511         (arc_attribute_table): Add 'uncached' attribute.
 512         (arc_print_operand): Print '.di' flag for uncached memory
 513         accesses.
 514         (arc_in_small_data_p): Do not consider for small data the uncached
 515         types.
 516         (arc_is_uncached_mem_p): New function.
 517         * config/arc/predicates.md (compact_store_memory_operand): Check
 518         for uncached memory accesses.
 519         (nonvol_nonimm_operand): Likewise.
 520         * gcc/doc/extend.texi (ARC Type Attribute): New subsection.
 521
 522 2018-01-31  Jakub Jelinek  <jakub@redhat.com>
 523
 524         PR c/84100
 525         * common.opt (falign-functions=, falign-jumps=, falign-labels=,
 526         falign-loops=): Add Optimization flag.
 527
 528 2018-01-30  Jeff Law  <law@redhat.com>
 529
 530         PR target/84064
 531         * i386.c (ix86_adjust_stack_and_probe_stack_clash): New argument
 532         INT_REGISTERS_SAVED.  Check it prior to calling
 533         get_scratch_register_on_entry.
 534         (ix86_adjust_stack_and_probe): Similarly.
 535         (ix86_emit_probe_stack_range): Similarly.
 536         (ix86_expand_prologue): Corresponding changes.
 537
 538 2018-01-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 539
 540         PR target/40411
 541         * config/sol2.h (STARTFILE_ARCH_SPEC): Use -std=c*,
 542         -std=iso9899:199409 instead of -pedantic to select values-Xc.o.
 543
 544 2018-01-30  Vladimir Makarov  <vmakarov@redhat.com>
 545
 546         PR target/84112
 547         * lra-constraints.c (curr_insn_transform): Process AND in the
 548         address.
 549
 550 2018-01-30  Jakub Jelinek  <jakub@redhat.com>
 551
 552         PR rtl-optimization/83986
 553         * sched-deps.c (sched_analyze_insn): For frame related insns, add anti
 554         dependence against last_pending_memory_flush in addition to
 555         pending_jump_insns.
 556
 557 2018-01-30  Alexandre Oliva <aoliva@redhat.com>
 558
 559         PR tree-optimization/81611
 560         * tree-ssa-dom.c (simple_iv_increment_p): Skip intervening
 561         copies.
 562
 563 2018-01-30  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
 564
 565         * config/rs6000/rs6000.c (rs6000_internal_arg_pointer): Only return
 566         a reg rtx.
 567
 568 2018-01-30  Richard Biener  <rguenther@suse.de>
 569             Jakub Jelinek  <jakub@redhat.com>
 570
 571         PR tree-optimization/84111
 572         * tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1): Skip
 573         inner loops added during recursion, as they don't have up-to-date
 574         SSA form.
 575
 576 2018-01-30  Jan Hubicka  <hubicka@ucw.cz>
 577
 578         PR ipa/81360
 579         * ipa-inline.c (can_inline_edge_p): Break out late tests to...
 580         (can_inline_edge_by_limits_p): ... here.
 581         (can_early_inline_edge_p, check_callers,
 582         update_caller_keys, update_callee_keys, recursive_inlining,
 583         add_new_edges_to_heap, speculation_useful_p,
 584         inline_small_functions,
 585         inline_small_functions, flatten_function,
 586         inline_to_all_callers_1): Update.
 587
 588 2018-01-30  Jan Hubicka  <hubicka@ucw.cz>
 589
 590         * profile-count.c (profile_count::combine_with_ipa_count): Handle
 591         zeros correctly.
 592
 593 2018-01-30  Richard Biener  <rguenther@suse.de>
 594
 595         PR tree-optimization/83008
 596         * tree-vect-slp.c (vect_analyze_slp_cost_1): Properly cost
 597         invariant and constant vector uses in stmts when they need
 598         more than one stmt.
 599
 600 2018-01-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 601
 602         PR bootstrap/84017
 603         * configure.ac (gcc_cv_as_shf_merge): Disable on Solaris 10/x86.
 604         * configure: Regenerate.
 605
 606 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
 607
 608         * config/aarch64/aarch64-sve.md (*vec_extract<mode><Vel>_0): New
 609         pattern.
 610         (*vec_extract<mode><Vel>_v128): Require a nonzero lane number.
 611         Use gen_rtx_REG rather than gen_lowpart.
 612
 613 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
 614
 615         * lra-constraints.c (match_reload): Use subreg_lowpart_offset
 616         rather than 0 when creating partial subregs.
 617
 618 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
 619
 620         * vec-perm-indices.c (vec_perm_indices::series_p): Give examples
 621         of usage.
 622
 623 2018-01-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
 624
 625         PR target/81550
 626         * config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): If DFmode
 627         and SFmode can go in Altivec registers (-mcpu=power7 for DFmode,
 628         -mcpu=power8 for SFmode) don't set the PRE_INCDEC or PRE_MODIFY
 629         flags.  This restores the settings used before the 2017-07-24.
 630         Turning off pre increment/decrement/modify allows IVOPTS to
 631         optimize DF/SF loops where the index is an int.
 632
 633 2018-01-29  Richard Biener <rguenther@suse.de>
 634             Kelvin Nilsen  <kelvin@gcc.gnu.org>
 635
 636         PR bootstrap/80867
 637         * tree-vect-stmts.c (vectorizable_call): Don't call
 638         targetm.vectorize_builtin_md_vectorized_function if callee is
 639         NULL.
 640
 641 2018-01-22 Carl Love <cel@us.ibm.com>
 642
 643         * doc/extend.tex: Fix typo in second arg in
 644         __builtin_bcdadd_{lt|eq|gt|ov} and __builtin_bcdsub_{lt|eq|gt|ov}.
 645
 646 2018-01-29  Richard Biener  <rguenther@suse.de>
 647
 648         PR tree-optimization/84086
 649         * tree-ssanames.c: Include cfgloop.h and tree-scalar-evolution.h.
 650         (flush_ssaname_freelist): When SSA names were released reset
 651         the SCEV hash table.
 652
 653 2018-01-29  Richard Biener  <rguenther@suse.de>
 654
 655         PR tree-optimization/84057
 656         * tree-ssa-loop-ivcanon.c (unloop_loops): Deal with already
 657         removed paths when removing edges.
 658
 659 2018-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 660
 661         * doc/invoke.texi: Replace -mfunction-return==@var{choice} with
 662         -mfunction-return=@var{choice}.
 663
 664 2018-01-27  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 665
 666         PR diagnostic/84034
 667         * diagnostic-show-locus.c (get_line_width_without_trailing_whitespace):
 668         Handle CR like TAB.
 669         (layout::print_source_line): Likewise.
 670         (test_get_line_width_without_trailing_whitespace): Add test cases.
 671
 672 2018-01-27  Jakub Jelinek  <jakub@redhat.com>
 673
 674         PR middle-end/84040
 675         * sched-deps.c (sched_macro_fuse_insns): Return immediately for
 676         debug insns.
 677
 678 2018-01-26  Jim Wilson  <jimw@sifive.com>
 679
 680         * config/riscv/riscv.h (MAX_FIXED_MODE_SIZE): New.
 681
 682         * config/riscv/elf.h (LIB_SPEC): Don't include -lgloss when nosys.specs
 683         specified.
 684
 685 2018-01-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 686
 687         * config/aarch64/aarch64.md: Add peepholes for CMP + SUB -> SUBS
 688         and CMP + SUB-immediate -> SUBS.
 689
 690 2018-01-26  Martin Sebor  <msebor@redhat.com>
 691
 692         PR tree-optimization/83896
 693         * tree-ssa-strlen.c (get_string_len): Rename...
 694         (get_string_cst_length): ...to this.  Return HOST_WIDE_INT.
 695         Avoid assuming length is constant.
 696         (handle_char_store): Use HOST_WIDE_INT for string length.
 697
 698 2018-01-26  Uros Bizjak  <ubizjak@gmail.com>
 699
 700         PR target/81763
 701         * config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
 702         to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
 703
 704 2018-01-26  Richard Biener  <rguenther@suse.de>
 705
 706         PR rtl-optimization/84003
 707         * dse.c (record_store): Only record redundant stores when
 708         the earlier store aliases at least all accesses the later one does.
 709
 710 2018-01-26  Jakub Jelinek  <jakub@redhat.com>
 711
 712         PR rtl-optimization/83985
 713         * dce.c (deletable_insn_p): Return false for separate shrink wrapping
 714         REG_CFA_RESTORE insns.
 715         (delete_unmarked_insns): Don't ignore separate shrink wrapping
 716         REG_CFA_RESTORE insns here.
 717
 718         PR c/83989
 719         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Don't
 720         use SSA_NAME_VAR as base for SSA_NAMEs with non-NULL SSA_NAME_VAR.
 721
 722 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 723
 724         * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3.
 725         * config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... .
 726         (arc_init): Likewise.
 727         (arc_override_options): Likewise.
 728         (arc_file_start): Choose Tag_ARC_CPU_variation based on arc_tune
 729         value.
 730         (hwloop_fail): Use TARGET_DBNZ when we want to check for dbnz insn
 731         support.
 732         * config/arc/arc.h (TARGET_DBNZ): Define.
 733         * config/arc/arc.md (attr tune): Add core_3, use ARC_TUNE_... to
 734         properly set the tune attribute.
 735         (dbnz): Use TARGET_DBNZ guard.
 736         * config/arc/arc.opt (mtune): Add core3 option.
 737
 738 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 739
 740         * config/arc/arc.c (arc_delegitimize_address_0): Refactored to
 741         recognize new pic like addresses.
 742         (arc_delegitimize_address): Clean up.
 743
 744 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 745
 746         * config/arc/arc-arches.def: Option mrf16 valid for all
 747         architectures.
 748         * config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
 749         * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
 750         * config/arc/arc-options.def (FL_RF16): Add mrf16 option.
 751         * config/arc/arc-tables.opt: Regenerate.
 752         * config/arc/arc.c (arc_conditional_register_usage): Handle
 753         reduced register file case.
 754         (arc_file_start): Set must have build attributes.
 755         * config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
 756         mrf16 option value.
 757         * config/arc/arc.opt (mrf16): Add new option.
 758         * config/arc/elf.h (ATTRIBUTE_PCS): Define.
 759         * config/arc/genmultilib.awk: Handle new mrf16 option.
 760         * config/arc/linux.h (ATTRIBUTE_PCS): Define.
 761         * config/arc/t-multilib: Regenerate.
 762         * doc/invoke.texi (ARC Options): Document mrf16 option.
 763
 764 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 765
 766         * config/arc/arc-protos.h: Add arc_is_secure_call_p proto.
 767         * config/arc/arc.c (arc_handle_secure_attribute): New function.
 768         (arc_attribute_table): Add 'secure_call' attribute.
 769         (arc_print_operand): Print secure call operand.
 770         (arc_function_ok_for_sibcall): Don't optimize tail calls when
 771         secure.
 772         (arc_is_secure_call_p): New function.  * config/arc/arc.md
 773         (call_i): Add support for sjli instruction.
 774         (call_value_i): Likewise.
 775         * config/arc/constraints.md (Csc): New constraint.
 776
 777 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 778             John Eric Martin <John.Martin@emmicro-us.com>
 779
 780         * config/arc/arc-protos.h: Add arc_is_jli_call_p proto.
 781         * config/arc/arc.c (_arc_jli_section): New struct.
 782         (arc_jli_section): New type.
 783         (rc_jli_sections): New static variable.
 784         (arc_handle_jli_attribute): New function.
 785         (arc_attribute_table): Add jli_always and jli_fixed attribute.
 786         (arc_file_end): New function.
 787         (TARGET_ASM_FILE_END): Define.
 788         (arc_print_operand): Reuse 'S' letter for JLI output instruction.
 789         (arc_add_jli_section): New function.
 790         (jli_call_scan): Likewise.
 791         (arc_reorg): Call jli_call_scan.
 792         (arc_output_addsi): Remove 'S' from printing asm operand.
 793         (arc_is_jli_call_p): New function.
 794         * config/arc/arc.md (movqi_insn): Remove 'S' from printing asm
 795         operand.
 796         (movhi_insn): Likewise.
 797         (movsi_insn): Likewise.
 798         (movsi_set_cc_insn): Likewise.
 799         (loadqi_update): Likewise.
 800         (load_zeroextendqisi_update): Likewise.
 801         (load_signextendqisi_update): Likewise.
 802         (loadhi_update): Likewise.
 803         (load_zeroextendhisi_update): Likewise.
 804         (load_signextendhisi_update): Likewise.
 805         (loadsi_update): Likewise.
 806         (loadsf_update): Likewise.
 807         (movsicc_insn): Likewise.
 808         (bset_insn): Likewise.
 809         (bxor_insn): Likewise.
 810         (bclr_insn): Likewise.
 811         (bmsk_insn): Likewise.
 812         (bicsi3_insn): Likewise.
 813         (cmpsi_cc_c_insn): Likewise.
 814         (movsi_ne): Likewise.
 815         (movsi_cond_exec): Likewise.
 816         (clrsbsi2): Likewise.
 817         (norm_f): Likewise.
 818         (normw): Likewise.
 819         (swap): Likewise.
 820         (divaw): Likewise.
 821         (flag): Likewise.
 822         (sr): Likewise.
 823         (kflag): Likewise.
 824         (ffs): Likewise.
 825         (ffs_f): Likewise.
 826         (fls): Likewise.
 827         (call_i): Remove 'S' asm letter, add jli instruction.
 828         (call_value_i): Likewise.
 829         * config/arc/arc.op (mjli-always): New option.
 830         * config/arc/constraints.md (Cji): New constraint.
 831         * config/arc/fpx.md (addsf3_fpx): Remove 'S' from printing asm
 832         operand.
 833         (subsf3_fpx): Likewise.
 834         (mulsf3_fpx): Likewise.
 835         * config/arc/simdext.md (vendrec_insn): Remove 'S' from printing
 836         asm operand.
 837         * doc/extend.texi (ARC): Document 'jli-always' and 'jli-fixed'
 838         function attrbutes.
 839         * doc/invoke.texi (ARC): Document mjli-always option.
 840
 841 2018-01-26  Sebastian Perta  <sebastian.perta@renesas.com>
 842
 843         * config/rl78/rl78.c: if operand 2 is const avoid addition with 0
 844         and use incw and decw where possible
 845         * testsuite/gcc.target/rl78/test_addsi3_internal.c: new file
 846
 847 2018-01-26  Richard Biener  <rguenther@suse.de>
 848
 849         PR tree-optimization/81082
 850         * fold-const.c (fold_plusminus_mult_expr): Do not perform the
 851         association if it requires casting to unsigned.
 852         * match.pd ((A * C) +- (B * C) -> (A+-B)): New patterns derived
 853         from fold_plusminus_mult_expr to catch important cases late when
 854         range info is available.
 855
 856 2018-01-26  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 857
 858         * config/i386/sol2.h (USE_HIDDEN_LINKONCE): Remove.
 859         * configure.ac (hidden_linkonce): New test.
 860         * configure: Regenerate.
 861         * config.in: Regenerate.
 862
 863 2018-01-26  Julia Koval  <julia.koval@intel.com>
 864
 865         * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
 866         _mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
 867         _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
 868         _mm_mask_bitshuffle_epi64_mask): Fix type.
 869         * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
 870         USI_FTYPE_V4DI_V4DI_USI): Remove.
 871         * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
 872         __builtin_ia32_vpshufbitqmb256_mask,
 873         __builtin_ia32_vpshufbitqmb128_mask): Fix types.
 874         * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
 875         * config/i386/sse.md (VI1_AVX512VLBW): Change types.
 876
 877 2018-01-26  Alan Modra  <amodra@gmail.com>
 878
 879         PR target/84033
 880         * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Exclude
 881         UNSPEC_VBPERMQ.  Sort other unspecs.
 882
 883 2018-01-25  David Edelsohn  <dje.gcc@gmail.com>
 884
 885         * doc/invoke.texi (PowerPC Options): Document 'native' cpu type.
 886
 887 2018-01-25  Jan Hubicka  <hubicka@ucw.cz>
 888
 889         PR middle-end/83055
 890         * predict.c (drop_profile): Do not push/pop cfun; update also
 891         node->count.
 892         (handle_missing_profiles): Fix logic looking for zero profiles.
 893
 894 2018-01-25  Jakub Jelinek  <jakub@redhat.com>
 895
 896         PR middle-end/83977
 897         * ipa-fnsummary.c (compute_fn_summary): Clear can_change_signature
 898         on functions with #pragma omp declare simd or functions with simd
 899         attribute.
 900         * omp-simd-clone.c (expand_simd_clones): Revert 2018-01-24 change.
 901         * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
 902         Remove trailing \n from warning_at calls.
 903
 904 2018-01-25  Tom de Vries  <tom@codesourcery.com>
 905
 906         PR target/84028
 907         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
 908         for neutered workers.
 909
 910 2018-01-24  Joseph Myers  <joseph@codesourcery.com>
 911
 912         PR target/68467
 913         * config/m68k/m68k.c (m68k_promote_function_mode): New function.
 914         (TARGET_PROMOTE_FUNCTION_MODE): New macro.
 915
 916 2018-01-24  Jeff Law  <law@redhat.com>
 917
 918         PR target/83994
 919         * i386.c (get_probe_interval): Move to earlier point.
 920         (ix86_compute_frame_layout): If -fstack-clash-protection and
 921         the frame is larger than the probe interval, then use pushes
 922         to save registers rather than reg->mem moves.
 923         (ix86_expand_prologue): Remove conditional for int_registers_saved
 924         assertion.
 925
 926 2018-01-24  Vladimir Makarov  <vmakarov@redhat.com>
 927
 928         PR target/84014
 929         * ira-build.c (setup_min_max_allocno_live_range_point): Set up
 930         min/max for never referenced object.
 931
 932 2018-01-24  Jakub Jelinek  <jakub@redhat.com>
 933
 934         PR middle-end/83977
 935         * tree.c (free_lang_data_in_decl): Don't clear DECL_ABSTRACT_ORIGIN
 936         here.
 937         * omp-low.c (create_omp_child_function): Remove "omp declare simd"
 938         attributes from DECL_ATTRIBUTES (decl) without affecting
 939         DECL_ATTRIBUTES (current_function_decl).
 940         * omp-simd-clone.c (expand_simd_clones): Ignore DECL_ARTIFICIAL
 941         functions with non-NULL DECL_ABSTRACT_ORIGIN.
 942
 943 2018-01-24  Richard Sandiford  <richard.sandiford@linaro.org>
 944
 945         PR tree-optimization/83979
 946         * fold-const.c (fold_comparison): Use constant_boolean_node
 947         instead of boolean_{true,false}_node.
 948
 949 2018-01-24  Jan Hubicka  <hubicka@ucw.cz>
 950
 951         * ipa-profile.c (ipa_propagate_frequency_1): Fix logic skipping calls
 952         with zero counts.
 953
 954 2018-01-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 955
 956         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
 957         Simplify the clause that sets the length attribute.
 958         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
 959         (*sibcall_nonlocal_sysv<mode>): Clean up code block; simplify the
 960         clause that sets the length attribute.
 961         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
 962
 963 2018-01-24  Tom de Vries  <tom@codesourcery.com>
 964
 965         PR target/83589
 966         * config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_2): Define to 1.
 967         (nvptx_pc_set, nvptx_condjump_label): New function. Copy from jump.c.
 968         Add strict parameter.
 969         (prevent_branch_around_nothing): Insert dummy insn between branch to
 970         label and label with no ptx insn inbetween.
 971         * config/nvptx/nvptx.md (define_insn "fake_nop"): New insn.
 972
 973 2018-01-24  Tom de Vries  <tom@codesourcery.com>
 974
 975         PR target/81352
 976         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
 977         for neutered threads in warp.
 978         * config/nvptx/nvptx.md (define_insn "exit"): New insn.
 979
 980 2018-01-24  Richard Biener  <rguenther@suse.de>
 981
 982         PR tree-optimization/83176
 983         * tree-chrec.c (chrec_fold_plus_1): Handle (signed T){(T) .. }
 984         operands.
 985
 986 2018-01-24  Richard Biener  <rguenther@suse.de>
 987
 988         PR tree-optimization/82819
 989         * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
 990         code generating pluses that are no-ops in the target precision.
 991
 992 2018-01-24  Richard Biener  <rguenther@suse.de>
 993
 994         PR middle-end/84000
 995         * tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind.
 996
 997 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
 998
 999         * cfgcleanup.c (try_crossjump_to_edge): Use combine_with_count
1000         to merge probabilities.
1001         * predict.c (probably_never_executed): Also mark as cold functions
1002         with global 0 profile and guessed local profile.
1003         * profile-count.c (profile_probability::combine_with_count): New
1004         member function.
1005         * profile-count.h (profile_probability::operator*,
1006         profile_probability::operator*=, profile_probability::operator/,
1007         profile_probability::operator/=): Reduce precision to adjusted
1008         and set value to guessed on contradictory divisions.
1009         (profile_probability::combine_with_freq): Remove.
1010         (profile_probability::combine_wiht_count): Declare.
1011         (profile_count::force_nonzero):: Set to adjusted.
1012         (profile_count::probability_in):: Set quality to adjusted.
1013         * tree-ssa-tail-merge.c (replace_block_by): Use
1014         combine_with_count.
1015
1016 2018-01-23  Andrew Waterman  <andrew@sifive.com>
1017             Jim Wilson  <jimw@sifive.com>
1018
1019         * config/riscv/riscv.c (riscv_stack_boundary): New.
1020         (riscv_option_override): Set riscv_stack_boundary.  Handle
1021         riscv_preferred_stack_boundary_arg.
1022         * config/riscv/riscv.h (MIN_STACK_BOUNDARY, ABI_STACK_BOUNDARY): New.
1023         (BIGGEST_ALIGNMENT): Set to STACK_BOUNDARY.
1024         (STACK_BOUNDARY): Set to riscv_stack_boundary.
1025         (RISCV_STACK_ALIGN): Use STACK_BOUNDARY.
1026         * config/riscv/riscv.opt (mpreferred-stack-boundary): New.
1027         * doc/invoke.tex (RISC-V Options): Add -mpreferred-stack-boundary.
1028
1029 2018-01-23  H.J. Lu  <hongjiu.lu@intel.com>
1030
1031         PR target/83905
1032         * config/i386/i386.c (ix86_expand_prologue): Use cost reference
1033         of struct ix86_frame.
1034         (ix86_expand_epilogue): Likewise.  Add a local variable for
1035         the reg_save_offset field in struct ix86_frame.
1036
1037 2018-01-23  Bin Cheng  <bin.cheng@arm.com>
1038
1039         PR tree-optimization/82604
1040         * tree-loop-distribution.c (enum partition_kind): New enum item
1041         PKIND_PARTIAL_MEMSET.
1042         (partition_builtin_p): Support above new enum item.
1043         (generate_code_for_partition): Ditto.
1044         (compute_access_range): Differentiate cases that equality can be
1045         proven at all loops, the innermost loops or no loops.
1046         (classify_builtin_st, classify_builtin_ldst): Adjust call to above
1047         function.  Set PKIND_PARTIAL_MEMSET for partition appropriately.
1048         (finalize_partitions, distribute_loop): Don't fuse partition of
1049         PKIND_PARTIAL_MEMSET kind when distributing 3-level loop nest.
1050         (prepare_perfect_loop_nest): Distribute 3-level loop nest only if
1051         parloop is enabled.
1052
1053 2018-01-23  Martin Liska  <mliska@suse.cz>
1054
1055         * predict.def (PRED_INDIR_CALL): Set probability to PROB_EVEN in
1056         order to ignore the predictor.
1057         (PRED_POLYMORPHIC_CALL): Likewise.
1058         (PRED_RECURSIVE_CALL): Likewise.
1059
1060 2018-01-23  Martin Liska  <mliska@suse.cz>
1061
1062         * tree-profile.c (tree_profiling): Print function header to
1063         aware reader which function we are working on.
1064         * value-prof.c (gimple_find_values_to_profile): Do not print
1065         not interesting value histograms.
1066
1067 2018-01-23  Martin Liska  <mliska@suse.cz>
1068
1069         * profile-count.h (enum profile_quality): Add
1070         profile_uninitialized as the first value. Do not number values
1071         as they are zero based.
1072         (profile_count::verify): Update sanity check.
1073         (profile_probability::verify): Likewise.
1074
1075 2018-01-23  Nathan Sidwell  <nathan@acm.org>
1076
1077         * doc/invoke.texi (ffor-scope): Deprecate.
1078
1079 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
1080
1081         PR tree-optimization/83510
1082         * domwalk.c (set_all_edges_as_executable): New function.
1083         (dom_walker::dom_walker): Convert bool param
1084         "skip_unreachable_blocks" to enum reachability.  Move setup of
1085         edge flags to set_all_edges_as_executable and only do it when
1086         reachability is REACHABLE_BLOCKS.
1087         * domwalk.h (enum dom_walker::reachability): New enum.
1088         (dom_walker::dom_walker): Convert bool param
1089         "skip_unreachable_blocks" to enum reachability.
1090         (set_all_edges_as_executable): New decl.
1091         * graphite-scop-detection.c  (gather_bbs::gather_bbs): Convert
1092         from false for "skip_unreachable_blocks" to ALL_BLOCKS for
1093         "reachability".
1094         * tree-ssa-dom.c (dom_opt_dom_walker::dom_opt_dom_walker): Likewise,
1095         but converting true to REACHABLE_BLOCKS.
1096         * tree-ssa-sccvn.c (sccvn_dom_walker::sccvn_dom_walker): Likewise.
1097         * tree-vrp.c
1098         (check_array_bounds_dom_walker::check_array_bounds_dom_walker):
1099         Likewise, but converting it to REACHABLE_BLOCKS_PRESERVING_FLAGS.
1100         (vrp_dom_walker::vrp_dom_walker): Likewise, but converting it to
1101         REACHABLE_BLOCKS.
1102         (vrp_prop::vrp_finalize): Call set_all_edges_as_executable
1103         if check_all_array_refs will be called.
1104
1105 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
1106
1107         * tree.c (selftest::test_location_wrappers): Add more test
1108         coverage.
1109
1110 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
1111
1112         * sbitmap.c (selftest::test_set_range): Fix memory leaks.
1113         (selftest::test_bit_in_range): Likewise.
1114
1115 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
1116
1117         PR testsuite/83888
1118         * doc/sourcebuild.texi (vect_float): Say that the selector
1119         only describes the situation when -funsafe-math-optimizations is on.
1120         (vect_float_strict): Document.
1121
1122 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
1123
1124         PR tree-optimization/83965
1125         * tree-vect-patterns.c (vect_reassociating_reduction_p): New function.
1126         (vect_recog_dot_prod_pattern, vect_recog_sad_pattern): Use it
1127         instead of checking only for a reduction.
1128         (vect_recog_widen_sum_pattern): Likewise.
1129
1130 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
1131
1132         * predict.c (probably_never_executed): Only use precise profile info.
1133         (compute_function_frequency): Skip after inlining hack since we now
1134         have quality checking.
1135
1136 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
1137
1138         * profile-count.h (profile_probability::very_unlikely,
1139         profile_probability::unlikely, profile_probability::even): Set
1140         precision to guessed.
1141
1142 2018-01-23  Richard Biener  <rguenther@suse.de>
1143
1144         PR tree-optimization/83963
1145         * graphite-scop-detection.c (scop_detection::harmful_loop_in_region):
1146         Properly terminate dominator walk when crossing the exit edge not
1147         when visiting its source block.
1148
1149 2018-01-23  Jakub Jelinek  <jakub@redhat.com>
1150
1151         PR c++/83918
1152         * tree.c (maybe_wrap_with_location): Use NON_LVALUE_EXPR rather than
1153         VIEW_CONVERT_EXPR to wrap CONST_DECLs.
1154
1155 2018-01-22  Jakub Jelinek  <jakub@redhat.com>
1156
1157         PR tree-optimization/83957
1158         * omp-expand.c (expand_omp_for_generic): Ignore virtual PHIs.  Remove
1159         semicolon after for body surrounded by braces.
1160
1161         PR tree-optimization/83081
1162         * profile-count.h (profile_probability::split): New method.
1163         * dojump.c (do_jump_1) <case TRUTH_ANDIF_EXPR, case TRUTH_ORIF_EXPR>:
1164         Use profile_probability::split.
1165         (do_compare_rtx_and_jump): Fix adjustment of probabilities
1166         when splitting a single conditional jump into 2.
1167
1168 2018-01-22  David Malcolm  <dmalcolm@redhat.com>
1169
1170         PR tree-optimization/69452
1171         * tree-ssa-loop-im.c (class move_computations_dom_walker): Remove
1172         decl.
1173
1174 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1175
1176         * config/rl78/rl78-expand.md: New define_expand "bswaphi2"
1177         * config/rl78/rl78-virt.md: New define_insn "*bswaphi2_virt"
1178         * config/rl78/rl78-real.md: New define_insn "*bswaphi2_real"
1179
1180 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1181
1182         * config/rl78/rl78-protos.h: New function declaration rl78_split_movdi
1183         * config/rl78/rl78.md: New define_expand "movdi"
1184         * config/rl78/rl78.c: New function definition rl78_split_movdi
1185
1186 2018-01-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
1187
1188         PR target/83862
1189         * config/rs6000/rs6000-protos.h (rs6000_split_signbit): Delete,
1190         no longer used.
1191         * config/rs6000/rs6000.c (rs6000_split_signbit): Likewise.
1192         * config/rs6000/rs6000.md (signbit<mode>2): Change code for IEEE
1193         128-bit to produce an UNSPEC move to get the double word with the
1194         signbit and then a shift directly to do signbit.
1195         (signbit<mode>2_dm): Replace old IEEE 128-bit signbit
1196         implementation with a new version that just does either a direct
1197         move or a regular move.  Move memory interface to separate insns.
1198         Move insns so they are next to the expander.
1199         (signbit<mode>2_dm_mem_be): New combiner insns to combine load
1200         with signbit move.  Split big and little endian case.
1201         (signbit<mode>2_dm_mem_le): Likewise.
1202         (signbit<mode>2_dm_<su>ext): Delete, no longer used.
1203         (signbit<mode>2_dm2): Likewise.
1204
1205 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1206
1207         * config/rl78/rl78.md: New define_expand "anddi3".
1208
1209 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1210
1211         * config/rl78/rl78.md: New define_expand "umindi3".
1212
1213 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1214
1215         * config/rl78/rl78.md: New define_expand "smindi3".
1216
1217 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1218
1219         * config/rl78/rl78.md: New define_expand "smaxdi3".
1220
1221 2018-01-22 Carl Love <cel@us.ibm.com>
1222
1223         * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
1224         LVX_V1TI): Add macro expansion.
1225         * config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
1226         definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
1227         VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
1228         * config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
1229         Change check to determine if the instruction is a byte reversing
1230         entry.  Fix typo in comment.
1231         * config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
1232         for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
1233         Add def_builtin calls for new builtins.
1234         * config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
1235         Add define_insn expansion.
1236
1237 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1238
1239         * config/rl78/rl78.md: New define_expand "umaxdi3".
1240
1241 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1242
1243         * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
1244         for non-QImode registers
1245
1246 2018-01-22  Richard Biener  <rguenther@suse.de>
1247
1248         PR tree-optimization/83963
1249         * graphite-scop-detection.c (scop_detection::get_sese): Delay
1250         including the loop exit block.
1251         (scop_detection::merge_sese): Likewise.
1252         (scop_detection::add_scop): Do it here instead.
1253
1254 2018-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1255
1256         * doc/sourcebuild.texi (arm_softfloat): Document.
1257
1258 2018-01-21  John David Anglin  <danglin@gcc.gnu.org>
1259
1260         PR gcc/77734
1261         * config/pa/pa.c (pa_function_ok_for_sibcall): Use
1262         targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
1263         Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
1264
1265 2018-01-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1266             David Edelsohn <dje.gcc@gmail.com>
1267
1268         PR target/83946
1269         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
1270         Change "crset eq" to "crset 2".
1271         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
1272         (*call_indirect_aix<mode>_nospec): Likewise.
1273         (*call_value_indirect_aix<mode>_nospec): Likewise.
1274         (*call_indirect_elfv2<mode>_nospec): Likewise.
1275         (*call_value_indirect_elfv2<mode>_nospec): Likewise.
1276         (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
1277         change assembly output from . to $.
1278         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
1279         (indirect_jump<mode>_nospec): Change assembly output from . to $.
1280         (*tablejump<mode>_internal1_nospec): Likewise.
1281
1282 2018-01-21  Oleg Endo  <olegendo@gcc.gnu.org>
1283
1284         PR target/80870
1285         * config/sh/sh_optimize_sett_clrt.cc:
1286         Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
1287
1288 2018-01-20  Richard Sandiford  <richard.sandiford@linaro.org>
1289
1290         PR tree-optimization/83940
1291         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
1292         offset_dt to vect_constant_def rather than vect_unknown_def_type.
1293         (vect_check_load_store_mask): Add a mask_dt_out parameter and
1294         use it to pass back the definition type.
1295         (vect_check_store_rhs): Likewise rhs_dt_out.
1296         (vect_build_gather_load_calls): Add a mask_dt argument and use
1297         it instead of a call to vect_is_simple_use.
1298         (vectorizable_store): Update calls to vect_check_load_store_mask
1299         and vect_check_store_rhs.  Use the dt returned by the latter instead
1300         of scatter_src_dt.  Use the cached mask_dt and gs_info.offset_dt
1301         instead of calls to vect_is_simple_use.  Pass the scalar rather
1302         than the vector operand to vect_is_simple_use when handling
1303         second and subsequent copies of an rhs value.
1304         (vectorizable_load): Update calls to vect_check_load_store_mask
1305         and vect_build_gather_load_calls.  Use the cached mask_dt and
1306         gs_info.offset_dt instead of calls to vect_is_simple_use.
1307
1308 2018-01-20  Jakub Jelinek  <jakub@redhat.com>
1309
1310         PR middle-end/83945
1311         * tree-emutls.c: Include gimplify.h.
1312         (lower_emutls_2): New function.
1313         (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
1314         with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
1315         it before further processing.
1316
1317         PR target/83930
1318         * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
1319         UINTVAL (trueop1) instead of INTVAL (op1).
1320
1321 2018-01-19  Jakub Jelinek  <jakub@redhat.com>
1322
1323         PR debug/81570
1324         PR debug/83728
1325         * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
1326         INCOMING_FRAME_SP_OFFSET if not defined.
1327         (scan_trace): Add ENTRY argument.  If true and
1328         DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
1329         emit a note to adjust the CFA offset.
1330         (create_cfi_notes): Adjust scan_trace callers.
1331         (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
1332         INCOMING_FRAME_SP_OFFSET in the CIE.
1333         * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
1334         * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
1335         Likewise.
1336         * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
1337         * doc/tm.texi: Regenerated.
1338
1339 2018-01-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
1340
1341         PR rtl-optimization/83147
1342         * lra-constraints.c (remove_inheritance_pseudos): Use
1343         lra_substitute_pseudo_within_insn.
1344
1345 2018-01-19  Tom de Vries  <tom@codesourcery.com>
1346             Cesar Philippidis  <cesar@codesourcery.com>
1347
1348         PR target/83920
1349         * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
1350
1351 2018-01-19  Cesar Philippidis  <cesar@codesourcery.com>
1352
1353         PR target/83790
1354         * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
1355         spaces for function labels.
1356
1357 2018-01-19  Martin Liska  <mliska@suse.cz>
1358
1359         * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
1360         (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
1361         (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
1362         (PRED_OPCODE_POSITIVE): Change from 64 to 59.
1363         (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
1364         (PRED_CONST_RETURN): Change from 69 to 65.
1365         (PRED_NULL_RETURN): Change from 91 to 71.
1366         (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
1367         (PRED_LOOP_GUARD): Change from 66 to 73.
1368
1369 2018-01-19  Martin Liska  <mliska@suse.cz>
1370
1371         * predict.c (predict_insn_def): Add new assert.
1372         (struct branch_predictor): Change type to signed integer.
1373         (test_prediction_value_range): Amend test to cover
1374         PROB_UNINITIALIZED.
1375         * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
1376         (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
1377         (PRED_LOOP_ITERATIONS_MAX): Likewise.
1378         (PRED_LOOP_IV_COMPARE): Likewise.
1379         * predict.h (PROB_UNINITIALIZED): Define new constant.
1380
1381 2018-01-19  Martin Liska  <mliska@suse.cz>
1382
1383         * predict.c (dump_prediction): Add new format for
1384         analyze_brprob.py script which is enabled with -details
1385         suboption.
1386         * profile-count.h (precise_p): New function.
1387
1388 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
1389
1390         PR tree-optimization/83922
1391         * tree-vect-loop.c (vect_verify_full_masking): Return false if
1392         there are no statements that need masking.
1393         (vect_active_double_reduction_p): New function.
1394         (vect_analyze_loop_operations): Use it when handling phis that
1395         are not in the loop header.
1396
1397 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
1398
1399         PR tree-optimization/83914
1400         * tree-vect-loop.c (vectorizable_induction): Don't convert
1401         init_expr or apply the peeling adjustment for inductions
1402         that are nested within the vectorized loop.
1403
1404 2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1405
1406         * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
1407         instead of NEG.
1408
1409 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
1410
1411         PR sanitizer/81715
1412         PR testsuite/83882
1413         * function.h (gimplify_parameters): Add gimple_seq * argument.
1414         * function.c: Include gimple.h and options.h.
1415         (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
1416         for the added local temporaries if needed.
1417         * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
1418         if there are any parameter cleanups, wrap whole body into a
1419         try/finally with the cleanups.
1420
1421 2018-01-18  Wilco Dijkstra  <wdijkstr@arm.com>
1422
1423         PR target/82964
1424         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
1425         Use GET_MODE_CLASS for scalar floating point.
1426
1427 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
1428
1429         PR ipa/82256
1430         patch by PaX Team
1431         * cgraphclones.c (cgraph_node::create_version_clone_with_body):
1432         Fix call of call_cgraph_insertion_hooks.
1433
1434 2018-01-18  Martin Sebor  <msebor@redhat.com>
1435
1436         * doc/invoke.texi (-Wclass-memaccess): Tweak text.
1437
1438 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
1439
1440         PR ipa/83619
1441         * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
1442         frequencies.
1443
1444 2018-01-18  Boris Kolpackov  <boris@codesynthesis.com>
1445
1446         PR other/70268
1447         * common.opt: (-ffile-prefix-map): New option.
1448         * opts.c (common_handle_option): Defer it.
1449         * opts-global.c (handle_common_deferred_options): Handle it.
1450         * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
1451         * file-prefix-map.h: New file.
1452         (remap_debug_filename, add_debug_prefix_map): ...here.
1453         (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
1454         * final.c (debug_prefix_map, add_debug_prefix_map
1455         remap_debug_filename): Move to...
1456         * file-prefix-map.c: New file.
1457         (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
1458         generalize, get rid of alloca(), use strrchr() instead of strchr().
1459         (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
1460         Implement in terms of add_prefix_map().
1461         (remap_macro_filename, remap_debug_filename): Implement in term of
1462         remap_filename().
1463         * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
1464         * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
1465         * dbxout.c: Include file-prefix-map.h.
1466         * varasm.c: Likewise.
1467         * vmsdbgout.c: Likewise.
1468         * xcoffout.c: Likewise.
1469         * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
1470         * doc/cppopts.texi (-fmacro-prefix-map): Document.
1471         * doc/invoke.texi (-ffile-prefix-map): Document.
1472         (-fdebug-prefix-map): Update description.
1473
1474 2018-01-18  Martin Liska  <mliska@suse.cz>
1475
1476         * config/i386/i386.c (indirect_thunk_name): Document that also
1477         lfence is emitted.
1478         (output_indirect_thunk): Document why both instructions
1479         (pause and lfence) are generated.
1480
1481 2018-01-18  Richard Biener  <rguenther@suse.de>
1482
1483         PR tree-optimization/83887
1484         * graphite-scop-detection.c
1485         (scop_detection::get_nearest_dom_with_single_entry): Remove.
1486         (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
1487         (scop_detection::merge_sese): Re-implement with a flood-fill
1488         algorithm that properly finds a SESE region if it exists.
1489
1490 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
1491
1492         PR c/61240
1493         * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
1494         pointer_diff optimizations use view_convert instead of convert.
1495
1496 2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1497
1498         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
1499         Generate different code for -mno-speculate-indirect-jumps.
1500         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
1501         (*call_indirect_aix<mode>): Disable for
1502         -mno-speculate-indirect-jumps.
1503         (*call_indirect_aix<mode>_nospec): New define_insn.
1504         (*call_value_indirect_aix<mode>): Disable for
1505         -mno-speculate-indirect-jumps.
1506         (*call_value_indirect_aix<mode>_nospec): New define_insn.
1507         (*sibcall_nonlocal_sysv<mode>): Generate different code for
1508         -mno-speculate-indirect-jumps.
1509         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
1510
1511 2018-01-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
1512
1513         * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
1514         long double type, set the flags for noting the default long double
1515         type, even if we don't pass or return a long double type.
1516
1517 2018-01-17  Jan Hubicka  <hubicka@ucw.cz>
1518
1519         PR ipa/83051
1520         * ipa-inline.c (flatten_function): Do not overwrite final inlining
1521         failure.
1522
1523 2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>
1524
1525         * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
1526         support for merge[hl].
1527         (fold_mergehl_helper): New helper function.
1528         (tree-vector-builder.h): New #include for tree_vector_builder usage.
1529         * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
1530         (altivec_vmrglw_direct): Add xxmrglw insn.
1531
1532 2018-01-17  Andrew Waterman  <andrew@sifive.com>
1533
1534         * config/riscv/riscv.c (riscv_conditional_register_usage): If
1535         UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
1536
1537 2018-01-17  David Malcolm  <dmalcolm@redhat.com>
1538
1539         PR lto/83121
1540         * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
1541         call the lto_location_cache before reading the
1542         DECL_SOURCE_LOCATION of the types.
1543
1544 2018-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
1545             Richard Sandiford  <richard.sandiford@linaro.org>
1546
1547         * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
1548         * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
1549         (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
1550         SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
1551         * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
1552         Add declaration.
1553         * config/aarch64/constraints.md (aarch64_movti_operand):
1554         Limit immediates.
1555         * config/aarch64/predicates.md (Uti): Add new constraint.
1556
1557 2018-01-17 Carl Love  <cel@us.ibm.com>
1558         * config/rs6000/vsx.md (define_expand xl_len_r,
1559         define_expand stxvl, define_expand *stxvl): Add match_dup argument.
1560         (define_insn): Add, match_dup 1 argument to define_insn stxvll and
1561         lxvll.
1562         (define_expand, define_insn): Move the shift left from  the
1563         define_insn to the define_expand for lxvl and stxvl instructions.
1564         * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
1565         and XL_LEN_R definitions to PURE.
1566
1567 2018-01-17  Uros Bizjak  <ubizjak@gmail.com>
1568
1569         * config/i386/i386.c (indirect_thunk_name): Declare regno
1570         as unsigned int.  Compare regno with INVALID_REGNUM.
1571         (output_indirect_thunk): Ditto.
1572         (output_indirect_thunk_function): Ditto.
1573         (ix86_code_end): Declare regno as unsigned int.  Use INVALID_REGNUM
1574         in the call to output_indirect_thunk_function.
1575
1576 2018-01-17  Richard Sandiford  <richard.sandiford@linaro.org>
1577
1578         PR middle-end/83884
1579         * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
1580         rather than the size of inner_type to determine the stack slot size
1581         when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
1582
1583 2018-01-16  Sebastian Peryt  <sebastian.peryt@intel.com>
1584
1585         PR target/83546
1586         * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
1587         to PTA_SILVERMONT.
1588
1589 2018-01-16  Michael Meissner  <meissner@linux.vnet.ibm.com>
1590
1591         * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
1592         endian Linux systems to optionally enable multilibs for selecting
1593         the long double type if the user configured an explicit type.
1594         * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
1595         have no long double multilibs if not defined.
1596         * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
1597         warn if the user used -mabi={ieee,ibm}longdouble and we built
1598         multilibs for long double.
1599         * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
1600         appropriate multilib option.
1601         (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
1602         multilib options.
1603         * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
1604         for building long double multilibs.
1605         * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
1606
1607 2018-01-16  John David Anglin  <danglin@gcc.gnu.org>
1608
1609         * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
1610         copies.
1611
1612         * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
1613         64 bits.
1614         * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
1615         128 bits.
1616
1617         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
1618         variables.
1619
1620         * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
1621         return value.
1622
1623 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
1624
1625         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
1626         ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
1627
1628 2018-01-16  Kelvin Nilsen  <kelvin@gcc.gnu.org>
1629
1630         * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
1631         different rtl trees depending on TARGET_64BIT.
1632         (rs6000_gen_lvx): Likewise.
1633
1634 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
1635
1636         * config/visium/visium.md (nop): Tweak comment.
1637         (hazard_nop): Likewise.
1638
1639 2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1640
1641         * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
1642         -mspeculate-indirect-jumps.
1643         * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
1644         for -mno-speculate-indirect-jumps.
1645         (*call_indirect_elfv2<mode>_nospec): New define_insn.
1646         (*call_value_indirect_elfv2<mode>): Disable for
1647         -mno-speculate-indirect-jumps.
1648         (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
1649         (indirect_jump): Emit different RTL for
1650         -mno-speculate-indirect-jumps.
1651         (*indirect_jump<mode>): Disable for
1652         -mno-speculate-indirect-jumps.
1653         (*indirect_jump<mode>_nospec): New define_insn.
1654         (tablejump): Emit different RTL for
1655         -mno-speculate-indirect-jumps.
1656         (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
1657         (tablejumpsi_nospec): New define_expand.
1658         (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
1659         (tablejumpdi_nospec): New define_expand.
1660         (*tablejump<mode>_internal1): Disable for
1661         -mno-speculate-indirect-jumps.
1662         (*tablejump<mode>_internal1_nospec): New define_insn.
1663         * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
1664         option.
1665
1666 2018-01-16  Artyom Skrobov tyomitch@gmail.com
1667
1668         * caller-save.c (insert_save): Drop unnecessary parameter.  All
1669         callers updated.
1670
1671 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1672             Richard Biener  <rguenth@suse.de>
1673
1674         PR libgomp/83590
1675         * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
1676         return early, inline manually is_gimple_sizepos.  Make sure if we
1677         call gimplify_expr we don't end up with a gimple constant.
1678         * tree.c (variably_modified_type_p): Don't return true for
1679         is_gimple_constant (_t).  Inline manually is_gimple_sizepos.
1680         * gimplify.h (is_gimple_sizepos): Remove.
1681
1682 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1683
1684         PR tree-optimization/83857
1685         * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
1686         vectorizable_live_operation for pure SLP statements.
1687         (vectorizable_live_operation): Handle PHIs.
1688
1689 2018-01-16  Richard Biener  <rguenther@suse.de>
1690
1691         PR tree-optimization/83867
1692         * tree-vect-stmts.c (vect_transform_stmt): Precompute
1693         nested_in_vect_loop_p since the scalar stmt may get invalidated.
1694
1695 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1696
1697         PR c/83844
1698         * stor-layout.c (handle_warn_if_not_align): Use byte_position and
1699         multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
1700         If off is not INTEGER_CST, issue a may not be aligned warning
1701         rather than isn't aligned.  Use isn%'t rather than isn't.
1702         * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
1703         into MULT_EXPR.
1704         <case MULT_EXPR>: Improve the case when bottom and one of the
1705         MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
1706         operand, in that case check if the other operand is multiple of
1707         bottom divided by the INTEGER_CST operand.
1708
1709 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1710
1711         PR target/83858
1712         * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
1713         * config/pa/pa-protos.h (pa_function_arg_size): Declare.
1714         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
1715         pa_function_arg_size instead of FUNCTION_ARG_SIZE.
1716         * config/pa/pa.c (pa_function_arg_advance): Likewise.
1717         (pa_function_arg, pa_arg_partial_bytes): Likewise.
1718         (pa_function_arg_size): New function.
1719
1720 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1721
1722         * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
1723         in a separate statement.
1724
1725 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1726
1727         PR tree-optimization/83847
1728         * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
1729         group gathers and scatters.
1730
1731 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1732
1733         PR rtl-optimization/86620
1734         * params.def (max-sched-ready-insns): Bump minimum value to 1.
1735
1736         PR rtl-optimization/83213
1737         * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
1738         to last if both are JUMP_INSNs.
1739
1740         PR tree-optimization/83843
1741         * gimple-ssa-store-merging.c
1742         (imm_store_chain_info::output_merged_store): Handle bit_not_p on
1743         store_immediate_info for bswap/nop orig_stores.
1744
1745 2018-01-15  Andrew Waterman  <andrew@sifive.com>
1746
1747         * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
1748         !TARGET_MUL.
1749         <UDIV>: Increase cost if !TARGET_DIV.
1750
1751 2018-01-15  Segher Boessenkool  <segher@kernel.crashing.org>
1752
1753         * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
1754         (define_attr "cr_logical_3op"): New.
1755         (cceq_ior_compare): Adjust.
1756         (cceq_ior_compare_complement): Adjust.
1757         (*cceq_rev_compare): Adjust.
1758         * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
1759         (is_cracked_insn): Adjust.
1760         (insn_must_be_first_in_group): Adjust.
1761         * config/rs6000/40x.md: Adjust.
1762         * config/rs6000/440.md: Adjust.
1763         * config/rs6000/476.md: Adjust.
1764         * config/rs6000/601.md: Adjust.
1765         * config/rs6000/603.md: Adjust.
1766         * config/rs6000/6xx.md: Adjust.
1767         * config/rs6000/7450.md: Adjust.
1768         * config/rs6000/7xx.md: Adjust.
1769         * config/rs6000/8540.md: Adjust.
1770         * config/rs6000/cell.md: Adjust.
1771         * config/rs6000/e300c2c3.md: Adjust.
1772         * config/rs6000/e500mc.md: Adjust.
1773         * config/rs6000/e500mc64.md: Adjust.
1774         * config/rs6000/e5500.md: Adjust.
1775         * config/rs6000/e6500.md: Adjust.
1776         * config/rs6000/mpc.md: Adjust.
1777         * config/rs6000/power4.md: Adjust.
1778         * config/rs6000/power5.md: Adjust.
1779         * config/rs6000/power6.md: Adjust.
1780         * config/rs6000/power7.md: Adjust.
1781         * config/rs6000/power8.md: Adjust.
1782         * config/rs6000/power9.md: Adjust.
1783         * config/rs6000/rs64.md: Adjust.
1784         * config/rs6000/titan.md: Adjust.
1785
1786 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1787
1788         * config/i386/predicates.md (indirect_branch_operand): Rewrite
1789         ix86_indirect_branch_register logic.
1790
1791 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1792
1793         * config/i386/constraints.md (Bs): Update
1794         ix86_indirect_branch_register check.  Don't check
1795         ix86_indirect_branch_register with GOT_memory_operand.
1796         (Bw): Likewise.
1797         * config/i386/predicates.md (GOT_memory_operand): Don't check
1798         ix86_indirect_branch_register here.
1799         (GOT32_symbol_operand): Likewise.
1800
1801 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1802
1803         * config/i386/predicates.md (constant_call_address_operand):
1804         Rewrite ix86_indirect_branch_register logic.
1805         (sibcall_insn_operand): Likewise.
1806
1807 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1808
1809         * config/i386/constraints.md (Bs): Replace
1810         ix86_indirect_branch_thunk_register with
1811         ix86_indirect_branch_register.
1812         (Bw): Likewise.
1813         * config/i386/i386.md (indirect_jump): Likewise.
1814         (tablejump): Likewise.
1815         (*sibcall_memory): Likewise.
1816         (*sibcall_value_memory): Likewise.
1817         Peepholes of indirect call and jump via memory: Likewise.
1818         * config/i386/i386.opt: Likewise.
1819         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1820         (GOT_memory_operand): Likewise.
1821         (call_insn_operand): Likewise.
1822         (sibcall_insn_operand): Likewise.
1823         (GOT32_symbol_operand): Likewise.
1824
1825 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1826
1827         PR middle-end/83837
1828         * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
1829         type rather than type addr's type points to.
1830         (expand_omp_atomic_mutex): Likewise.
1831         (expand_omp_atomic): Likewise.
1832
1833 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1834
1835         PR target/83839
1836         * config/i386/i386.c (output_indirect_thunk_function): Use
1837         ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
1838         for  __x86_return_thunk.
1839
1840 2018-01-15  Richard Biener  <rguenther@suse.de>
1841
1842         PR middle-end/83850
1843         * expmed.c (extract_bit_field_1): Fix typo.
1844
1845 2018-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1846
1847         PR target/83687
1848         * config/arm/iterators.md (VF): New mode iterator.
1849         * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
1850         Remove integer-related logic from pattern.
1851         (neon_vabd<mode>_3): Likewise.
1852
1853 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1854
1855         PR middle-end/82694
1856         * common.opt (fstrict-overflow): No longer an alias.
1857         (fwrapv-pointer): New option.
1858         * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
1859         also for pointer types based on flag_wrapv_pointer.
1860         * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
1861         opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
1862         opts->x_flag_wrapv got set.
1863         * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
1864         changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
1865         POINTER_TYPE_OVERFLOW_UNDEFINED.
1866         * match.pd: Likewise in address comparison pattern.
1867         * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
1868
1869 2018-01-15  Richard Biener  <rguenther@suse.de>
1870
1871         PR lto/83804
1872         * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
1873         from TYPE_FIELDS.  Free TYPE_BINFO if not used by devirtualization.
1874         Reset type names to their identifier if their TYPE_DECL doesn't
1875         have linkage (and thus is used for ODR and devirt).
1876         (save_debug_info_for_decl): Remove.
1877         (save_debug_info_for_type): Likewise.
1878         (add_tree_to_fld_list): Adjust.
1879         * tree-pretty-print.c (dump_generic_node): Make dumping of
1880         type names more robust.
1881
1882 2018-01-15  Richard Biener  <rguenther@suse.de>
1883
1884         * BASE-VER: Bump to 8.0.1.
1885
1886 2018-01-14  Martin Sebor  <msebor@redhat.com>
1887
1888         PR other/83508
1889         * builtins.c (check_access): Avoid warning when the no-warning bit
1890         is set.
1891
1892 2018-01-14  Cory Fields  <cory-nospam-@coryfields.com>
1893
1894         * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
1895         * ira-color (allocno_hard_regs_compare): Likewise.
1896
1897 2018-01-14  Nathan Rossi  <nathan@nathanrossi.com>
1898
1899         PR target/83013
1900         * config/microblaze/microblaze.c (microblaze_asm_output_ident):
1901         Use .pushsection/.popsection.
1902
1903 2018-01-14  Martin Sebor  <msebor@redhat.com>
1904
1905         PR c++/81327
1906         * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
1907
1908 2018-01-14  Jakub Jelinek  <jakub@redhat.com>
1909
1910         * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
1911         entry from extra_headers.
1912         (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
1913         extra_headers, make the list bitwise identical to the i?86-*-* one.
1914
1915 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1916
1917         * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
1918         -mcmodel=large with -mindirect-branch=thunk,
1919         -mindirect-branch=thunk-extern, -mfunction-return=thunk and
1920         -mfunction-return=thunk-extern.
1921         * doc/invoke.texi: Document -mcmodel=large is incompatible with
1922         -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
1923         -mfunction-return=thunk and -mfunction-return=thunk-extern.
1924
1925 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1926
1927         * config/i386/i386.c (print_reg): Print the name of the full
1928         integer register without '%'.
1929         (ix86_print_operand): Handle 'V'.
1930          * doc/extend.texi: Document 'V' modifier.
1931
1932 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1933
1934         * config/i386/constraints.md (Bs): Disallow memory operand for
1935         -mindirect-branch-register.
1936         (Bw): Likewise.
1937         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1938         (GOT_memory_operand): Likewise.
1939         (call_insn_operand): Likewise.
1940         (sibcall_insn_operand): Likewise.
1941         (GOT32_symbol_operand): Likewise.
1942         * config/i386/i386.md (indirect_jump): Call convert_memory_address
1943         for -mindirect-branch-register.
1944         (tablejump): Likewise.
1945         (*sibcall_memory): Likewise.
1946         (*sibcall_value_memory): Likewise.
1947         Disallow peepholes of indirect call and jump via memory for
1948         -mindirect-branch-register.
1949         (*call_pop): Replace m with Bw.
1950         (*call_value_pop): Likewise.
1951         (*sibcall_pop_memory): Replace m with Bs.
1952         * config/i386/i386.opt (mindirect-branch-register): New option.
1953         * doc/invoke.texi: Document -mindirect-branch-register option.
1954
1955 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1956
1957         * config/i386/i386-protos.h (ix86_output_function_return): New.
1958         * config/i386/i386.c (ix86_set_indirect_branch_type): Also
1959         set function_return_type.
1960         (indirect_thunk_name): Add ret_p to indicate thunk for function
1961         return.
1962         (output_indirect_thunk_function): Pass false to
1963         indirect_thunk_name.
1964         (ix86_output_indirect_branch_via_reg): Likewise.
1965         (ix86_output_indirect_branch_via_push): Likewise.
1966         (output_indirect_thunk_function): Create alias for function
1967         return thunk if regno < 0.
1968         (ix86_output_function_return): New function.
1969         (ix86_handle_fndecl_attribute): Handle function_return.
1970         (ix86_attribute_table): Add function_return.
1971         * config/i386/i386.h (machine_function): Add
1972         function_return_type.
1973         * config/i386/i386.md (simple_return_internal): Use
1974         ix86_output_function_return.
1975         (simple_return_internal_long): Likewise.
1976         * config/i386/i386.opt (mfunction-return=): New option.
1977         (indirect_branch): Mention -mfunction-return=.
1978         * doc/extend.texi: Document function_return function attribute.
1979         * doc/invoke.texi: Document -mfunction-return= option.
1980
1981 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1982
1983         * config/i386/i386-opts.h (indirect_branch): New.
1984         * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
1985         * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
1986         with local indirect jump when converting indirect call and jump.
1987         (ix86_set_indirect_branch_type): New.
1988         (ix86_set_current_function): Call ix86_set_indirect_branch_type.
1989         (indirectlabelno): New.
1990         (indirect_thunk_needed): Likewise.
1991         (indirect_thunk_bnd_needed): Likewise.
1992         (indirect_thunks_used): Likewise.
1993         (indirect_thunks_bnd_used): Likewise.
1994         (INDIRECT_LABEL): Likewise.
1995         (indirect_thunk_name): Likewise.
1996         (output_indirect_thunk): Likewise.
1997         (output_indirect_thunk_function): Likewise.
1998         (ix86_output_indirect_branch_via_reg): Likewise.
1999         (ix86_output_indirect_branch_via_push): Likewise.
2000         (ix86_output_indirect_branch): Likewise.
2001         (ix86_output_indirect_jmp): Likewise.
2002         (ix86_code_end): Call output_indirect_thunk_function if needed.
2003         (ix86_output_call_insn): Call ix86_output_indirect_branch if
2004         needed.
2005         (ix86_handle_fndecl_attribute): Handle indirect_branch.
2006         (ix86_attribute_table): Add indirect_branch.
2007         * config/i386/i386.h (machine_function): Add indirect_branch_type
2008         and has_local_indirect_jump.
2009         * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
2010         to true.
2011         (tablejump): Likewise.
2012         (*indirect_jump): Use ix86_output_indirect_jmp.
2013         (*tablejump_1): Likewise.
2014         (simple_return_indirect_internal): Likewise.
2015         * config/i386/i386.opt (mindirect-branch=): New option.
2016         (indirect_branch): New.
2017         (keep): Likewise.
2018         (thunk): Likewise.
2019         (thunk-inline): Likewise.
2020         (thunk-extern): Likewise.
2021         * doc/extend.texi: Document indirect_branch function attribute.
2022         * doc/invoke.texi: Document -mindirect-branch= option.
2023
2024 2018-01-14  Jan Hubicka  <hubicka@ucw.cz>
2025
2026         PR ipa/83051
2027         * ipa-inline.c (edge_badness): Tolerate roundoff errors.
2028
2029 2018-01-14  Richard Sandiford  <richard.sandiford@linaro.org>
2030
2031         * ipa-inline.c (want_inline_small_function_p): Return false if
2032         inlining has already failed with CIF_FINAL_ERROR.
2033         (update_caller_keys): Call want_inline_small_function_p before
2034         can_inline_edge_p.
2035         (update_callee_keys): Likewise.
2036
2037 2018-01-10  Kelvin Nilsen  <kelvin@gcc.gnu.org>
2038
2039         * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
2040         New function.
2041         (rs6000_quadword_masked_address_p): Likewise.
2042         (quad_aligned_load_p): Likewise.
2043         (quad_aligned_store_p): Likewise.
2044         (const_load_sequence_p): Add comment to describe the outer-most loop.
2045         (mimic_memory_attributes_and_flags): New function.
2046         (rs6000_gen_stvx): Likewise.
2047         (replace_swapped_aligned_store): Likewise.
2048         (rs6000_gen_lvx): Likewise.
2049         (replace_swapped_aligned_load): Likewise.
2050         (replace_swapped_load_constant): Capitalize argument name in
2051         comment describing this function.
2052         (rs6000_analyze_swaps): Add a third pass to search for vector loads
2053         and stores that access quad-word aligned addresses and replace
2054         with stvx or lvx instructions when appropriate.
2055         * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
2056         New function prototype.
2057         (rs6000_quadword_masked_address_p): Likewise.
2058         (rs6000_gen_lvx): Likewise.
2059         (rs6000_gen_stvx): Likewise.
2060         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
2061         VSX_D (V2DF, V2DI), modify this split to select lvx instruction
2062         when memory address is aligned.
2063         (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
2064         this split to select lvx instruction when memory address is aligned.
2065         (*vsx_le_perm_load_v8hi): Modify this split to select lvx
2066         instruction when memory address is aligned.
2067         (*vsx_le_perm_load_v16qi): Likewise.
2068         (four unnamed splitters): Modify to select the stvx instruction
2069         when memory is aligned.
2070
2071 2018-01-13  Jan Hubicka  <hubicka@ucw.cz>
2072
2073         * predict.c (determine_unlikely_bbs): Handle correctly BBs
2074         which appears in the queue multiple times.
2075
2076 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2077             Alan Hayward  <alan.hayward@arm.com>
2078             David Sherwood  <david.sherwood@arm.com>
2079
2080         * tree-vectorizer.h (vec_lower_bound): New structure.
2081         (_loop_vec_info): Add check_nonzero and lower_bounds.
2082         (LOOP_VINFO_CHECK_NONZERO): New macro.
2083         (LOOP_VINFO_LOWER_BOUNDS): Likewise.
2084         (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
2085         * tree-data-ref.h (dr_with_seg_len): Add access_size and align
2086         fields.  Make seg_len the distance travelled, not including the
2087         access size.
2088         (dr_direction_indicator): Declare.
2089         (dr_zero_step_indicator): Likewise.
2090         (dr_known_forward_stride_p): Likewise.
2091         * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
2092         tree-ssanames.h.
2093         (runtime_alias_check_p): Allow runtime alias checks with
2094         variable strides.
2095         (operator ==): Compare access_size and align.
2096         (prune_runtime_alias_test_list): Rework for new distinction between
2097         the access_size and seg_len.
2098         (create_intersect_range_checks_index): Likewise.  Cope with polynomial
2099         segment lengths.
2100         (get_segment_min_max): New function.
2101         (create_intersect_range_checks): Use it.
2102         (dr_step_indicator): New function.
2103         (dr_direction_indicator): Likewise.
2104         (dr_zero_step_indicator): Likewise.
2105         (dr_known_forward_stride_p): Likewise.
2106         * tree-loop-distribution.c (data_ref_segment_size): Return
2107         DR_STEP * (niters - 1).
2108         (compute_alias_check_pairs): Update call to the dr_with_seg_len
2109         constructor.
2110         * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
2111         (vect_preserves_scalar_order_p): New function, split out from...
2112         (vect_analyze_data_ref_dependence): ...here.  Check for zero steps.
2113         (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
2114         (vect_vfa_access_size): New function.
2115         (vect_vfa_align): Likewise.
2116         (vect_compile_time_alias): Take access_size_a and access_b arguments.
2117         (dump_lower_bound): New function.
2118         (vect_check_lower_bound): Likewise.
2119         (vect_small_gap_p): Likewise.
2120         (vectorizable_with_step_bound_p): Likewise.
2121         (vect_prune_runtime_alias_test_list): Ignore cross-iteration
2122         depencies if the vectorization factor is 1.  Convert the checks
2123         for nonzero steps into checks on the bounds of DR_STEP.  Try using
2124         a bunds check for variable steps if the minimum required step is
2125         relatively small. Update calls to the dr_with_seg_len
2126         constructor and to vect_compile_time_alias.
2127         * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
2128         function.
2129         (vect_loop_versioning): Call it.
2130         * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
2131         when retrying.
2132         (vect_estimate_min_profitable_iters): Account for any bounds checks.
2133
2134 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2135             Alan Hayward  <alan.hayward@arm.com>
2136             David Sherwood  <david.sherwood@arm.com>
2137
2138         * doc/sourcebuild.texi (vect_scatter_store): Document.
2139         * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
2140         optabs.
2141         * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
2142         Document.
2143         * genopinit.c (main): Add supports_vec_scatter_store and
2144         supports_vec_scatter_store_cached to target_optabs.
2145         * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
2146         IFN_MASK_SCATTER_STORE.
2147         * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
2148         functions.
2149         * internal-fn.h (internal_store_fn_p): Declare.
2150         (internal_fn_stored_value_index): Likewise.
2151         * internal-fn.c (scatter_store_direct): New macro.
2152         (expand_scatter_store_optab_fn): New function.
2153         (direct_scatter_store_optab_supported_p): New macro.
2154         (internal_store_fn_p): New function.
2155         (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
2156         IFN_MASK_SCATTER_STORE.
2157         (internal_fn_mask_index): Likewise.
2158         (internal_fn_stored_value_index): New function.
2159         (internal_gather_scatter_fn_supported_p): Adjust operand numbers
2160         for scatter stores.
2161         * optabs-query.h (supports_vec_scatter_store_p): Declare.
2162         * optabs-query.c (supports_vec_scatter_store_p): New function.
2163         * tree-vectorizer.h (vect_get_store_rhs): Declare.
2164         * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
2165         true for scatter stores.
2166         (vect_gather_scatter_fn_p): Handle scatter stores too.
2167         (vect_check_gather_scatter): Consider using scatter stores if
2168         supports_vec_scatter_store_p.
2169         * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
2170         scatter stores too.
2171         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
2172         internal_fn_stored_value_index.
2173         (check_load_store_masking): Handle scatter stores too.
2174         (vect_get_store_rhs): Make public.
2175         (vectorizable_call): Use internal_store_fn_p.
2176         (vectorizable_store): Handle scatter store internal functions.
2177         (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
2178         when deciding whether the end of the group has been reached.
2179         * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
2180         * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
2181         (mask_scatter_store<mode>): New insns.
2182
2183 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2184             Alan Hayward  <alan.hayward@arm.com>
2185             David Sherwood  <david.sherwood@arm.com>
2186
2187         * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
2188         * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
2189         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
2190         function.
2191         (vect_use_strided_gather_scatters_p): Take a masked_p argument.
2192         Use vect_truncate_gather_scatter_offset if we can't treat the
2193         operation as a normal gather load or scatter store.
2194         (get_group_load_store_type): Take the gather_scatter_info
2195         as argument.  Try using a gather load or scatter store for
2196         single-element groups.
2197         (get_load_store_type): Update calls to get_group_load_store_type
2198         and vect_use_strided_gather_scatters_p.
2199
2200 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2201             Alan Hayward  <alan.hayward@arm.com>
2202             David Sherwood  <david.sherwood@arm.com>
2203
2204         * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
2205         optional tree argument.
2206         * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
2207         null target hooks.
2208         (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
2209         but continue to use the current value as a fallback.
2210         (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
2211         to compare the updates.
2212         * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
2213         (get_load_store_type): Use it when handling a strided access.
2214         (vect_get_strided_load_store_ops): New function.
2215         (vect_get_data_ptr_increment): Likewise.
2216         (vectorizable_load): Handle strided gather loads.  Always pass
2217         a step to vect_create_data_ref_ptr and bump_vector_ptr.
2218
2219 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2220             Alan Hayward  <alan.hayward@arm.com>
2221             David Sherwood  <david.sherwood@arm.com>
2222
2223         * doc/md.texi (gather_load@var{m}): Document.
2224         (mask_gather_load@var{m}): Likewise.
2225         * genopinit.c (main): Add supports_vec_gather_load and
2226         supports_vec_gather_load_cached to target_optabs.
2227         * optabs-tree.c (init_tree_optimization_optabs): Use
2228         ggc_cleared_alloc to allocate target_optabs.
2229         * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
2230         * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
2231         functions.
2232         * internal-fn.h (internal_load_fn_p): Declare.
2233         (internal_gather_scatter_fn_p): Likewise.
2234         (internal_fn_mask_index): Likewise.
2235         (internal_gather_scatter_fn_supported_p): Likewise.
2236         * internal-fn.c (gather_load_direct): New macro.
2237         (expand_gather_load_optab_fn): New function.
2238         (direct_gather_load_optab_supported_p): New macro.
2239         (direct_internal_fn_optab): New function.
2240         (internal_load_fn_p): Likewise.
2241         (internal_gather_scatter_fn_p): Likewise.
2242         (internal_fn_mask_index): Likewise.
2243         (internal_gather_scatter_fn_supported_p): Likewise.
2244         * optabs-query.c (supports_at_least_one_mode_p): New function.
2245         (supports_vec_gather_load_p): Likewise.
2246         * optabs-query.h (supports_vec_gather_load_p): Declare.
2247         * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
2248         and memory_type field.
2249         (NUM_PATTERNS): Bump to 15.
2250         * tree-vect-data-refs.c: Include internal-fn.h.
2251         (vect_gather_scatter_fn_p): New function.
2252         (vect_describe_gather_scatter_call): Likewise.
2253         (vect_check_gather_scatter): Try using internal functions for
2254         gather loads.  Recognize existing calls to a gather load function.
2255         (vect_analyze_data_refs): Consider using gather loads if
2256         supports_vec_gather_load_p.
2257         * tree-vect-patterns.c (vect_get_load_store_mask): New function.
2258         (vect_get_gather_scatter_offset_type): Likewise.
2259         (vect_convert_mask_for_vectype): Likewise.
2260         (vect_add_conversion_to_patterm): Likewise.
2261         (vect_try_gather_scatter_pattern): Likewise.
2262         (vect_recog_gather_scatter_pattern): New pattern recognizer.
2263         (vect_vect_recog_func_ptrs): Add it.
2264         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
2265         internal_fn_mask_index and internal_gather_scatter_fn_p.
2266         (check_load_store_masking): Take the gather_scatter_info as an
2267         argument and handle gather loads.
2268         (vect_get_gather_scatter_ops): New function.
2269         (vectorizable_call): Check internal_load_fn_p.
2270         (vectorizable_load): Likewise.  Handle gather load internal
2271         functions.
2272         (vectorizable_store): Update call to check_load_store_masking.
2273         * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
2274         * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
2275         * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
2276         (aarch64_gather_scale_operand_d): New predicates.
2277         * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
2278         (mask_gather_load<mode>): New insns.
2279
2280 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2281             Alan Hayward  <alan.hayward@arm.com>
2282             David Sherwood  <david.sherwood@arm.com>
2283
2284         * optabs.def (fold_left_plus_optab): New optab.
2285         * doc/md.texi (fold_left_plus_@var{m}): Document.
2286         * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
2287         * internal-fn.c (fold_left_direct): Define.
2288         (expand_fold_left_optab_fn): Likewise.
2289         (direct_fold_left_optab_supported_p): Likewise.
2290         * fold-const-call.c (fold_const_fold_left): New function.
2291         (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
2292         * tree-parloops.c (valid_reduction_p): New function.
2293         (gather_scalar_reductions): Use it.
2294         * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
2295         (vect_finish_replace_stmt): Declare.
2296         * tree-vect-loop.c (fold_left_reduction_fn): New function.
2297         (needs_fold_left_reduction_p): New function, split out from...
2298         (vect_is_simple_reduction): ...here.  Accept reductions that
2299         forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
2300         (vect_force_simple_reduction): Also store the reduction type in
2301         the assignment's STMT_VINFO_REDUC_TYPE.
2302         (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
2303         (merge_with_identity): New function.
2304         (vect_expand_fold_left): Likewise.
2305         (vectorize_fold_left_reduction): Likewise.
2306         (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION.  Leave the
2307         scalar phi in place for it.  Check for target support and reject
2308         cases that would reassociate the operation.  Defer the transform
2309         phase to vectorize_fold_left_reduction.
2310         * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
2311         * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
2312         (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
2313
2314 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2315
2316         * tree-if-conv.c (predicate_mem_writes): Remove redundant
2317         call to ifc_temp_var.
2318
2319 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2320             Alan Hayward  <alan.hayward@arm.com>
2321             David Sherwood  <david.sherwood@arm.com>
2322
2323         * target.def (legitimize_address_displacement): Take the original
2324         offset as a poly_int.
2325         * targhooks.h (default_legitimize_address_displacement): Update
2326         accordingly.
2327         * targhooks.c (default_legitimize_address_displacement): Likewise.
2328         * doc/tm.texi: Regenerate.
2329         * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
2330         as an argument, moving assert of ad->disp == ad->disp_term to...
2331         (process_address_1): ...here.  Update calls to base_plus_disp_to_reg.
2332         Try calling targetm.legitimize_address_displacement before expanding
2333         the address rather than afterwards, and adjust for the new interface.
2334         * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
2335         Match the new hook interface.  Handle SVE addresses.
2336         * config/sh/sh.c (sh_legitimize_address_displacement): Make the
2337         new hook interface.
2338
2339 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2340
2341         * Makefile.in (OBJS): Add early-remat.o.
2342         * target.def (select_early_remat_modes): New hook.
2343         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
2344         * doc/tm.texi: Regenerate.
2345         * targhooks.h (default_select_early_remat_modes): Declare.
2346         * targhooks.c (default_select_early_remat_modes): New function.
2347         * timevar.def (TV_EARLY_REMAT): New timevar.
2348         * passes.def (pass_early_remat): New pass.
2349         * tree-pass.h (make_pass_early_remat): Declare.
2350         * early-remat.c: New file.
2351         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
2352         function.
2353         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
2354
2355 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2356             Alan Hayward  <alan.hayward@arm.com>
2357             David Sherwood  <david.sherwood@arm.com>
2358
2359         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
2360         vfm1 with a bound_epilog parameter.
2361         (vect_do_peeling): Update calls accordingly, and move the prologue
2362         call earlier in the function.  Treat the base bound_epilog as 0 for
2363         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
2364         this base when peeling for gaps.
2365         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
2366         with fully-masked loops.
2367         (vect_estimate_min_profitable_iters): Handle the single peeled
2368         iteration in that case.
2369
2370 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2371             Alan Hayward  <alan.hayward@arm.com>
2372             David Sherwood  <david.sherwood@arm.com>
2373
2374         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
2375         single-element interleaving even if the size is not a power of 2.
2376         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
2377         accesses for single-element interleaving if the group size is
2378         not a power of 2.
2379
2380 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2381             Alan Hayward  <alan.hayward@arm.com>
2382             David Sherwood  <david.sherwood@arm.com>
2383
2384         * doc/md.texi (fold_extract_last_@var{m}): Document.
2385         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
2386         * optabs.def (fold_extract_last_optab): New optab.
2387         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
2388         * internal-fn.c (fold_extract_direct): New macro.
2389         (expand_fold_extract_optab_fn): Likewise.
2390         (direct_fold_extract_optab_supported_p): Likewise.
2391         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
2392         * tree-vect-loop.c (vect_model_reduction_cost): Handle
2393         EXTRACT_LAST_REDUCTION.
2394         (get_initial_def_for_reduction): Do not create an initial vector
2395         for EXTRACT_LAST_REDUCTION reductions.
2396         (vectorizable_reduction): Leave the scalar phi in place for
2397         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
2398         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
2399         epilogue code for EXTRACT_LAST_REDUCTION and defer the
2400         transform phase to vectorizable_condition.
2401         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
2402         split out from...
2403         (vect_finish_stmt_generation): ...here.
2404         (vect_finish_replace_stmt): New function.
2405         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
2406         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
2407         pattern.
2408         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
2409
2410 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2411             Alan Hayward  <alan.hayward@arm.com>
2412             David Sherwood  <david.sherwood@arm.com>
2413
2414         * doc/md.texi (extract_last_@var{m}): Document.
2415         * optabs.def (extract_last_optab): New optab.
2416         * internal-fn.def (EXTRACT_LAST): New internal function.
2417         * internal-fn.c (cond_unary_direct): New macro.
2418         (expand_cond_unary_optab_fn): Likewise.
2419         (direct_cond_unary_optab_supported_p): Likewise.
2420         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
2421         loops using EXTRACT_LAST.
2422         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
2423         (extract_last_<mode>): ...this optab.
2424         (vec_extract<mode><Vel>): Update accordingly.
2425
2426 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2427             Alan Hayward  <alan.hayward@arm.com>
2428             David Sherwood  <david.sherwood@arm.com>
2429
2430         * target.def (empty_mask_is_expensive): New hook.
2431         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
2432         * doc/tm.texi: Regenerate.
2433         * targhooks.h (default_empty_mask_is_expensive): Declare.
2434         * targhooks.c (default_empty_mask_is_expensive): New function.
2435         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
2436         if the target says that empty masks are expensive.
2437         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
2438         New function.
2439         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
2440
2441 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2442             Alan Hayward  <alan.hayward@arm.com>
2443             David Sherwood  <david.sherwood@arm.com>
2444
2445         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
2446         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
2447         (vect_use_loop_mask_for_alignment_p): New function.
2448         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
2449         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
2450         niters_skip argument.  Make sure that the first niters_skip elements
2451         of the first iteration are inactive.
2452         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
2453         Update call to vect_set_loop_masks_directly.
2454         (get_misalign_in_elems): New function, split out from...
2455         (vect_gen_prolog_loop_niters): ...here.
2456         (vect_update_init_of_dr): Take a code argument that specifies whether
2457         the adjustment should be added or subtracted.
2458         (vect_update_init_of_drs): Likewise.
2459         (vect_prepare_for_masked_peels): New function.
2460         (vect_do_peeling): Skip prologue peeling if we're using a mask
2461         instead.  Update call to vect_update_inits_of_drs.
2462         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
2463         mask_skip_niters.
2464         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
2465         alignment.  Do not include the number of peeled iterations in
2466         the minimum threshold in that case.
2467         (vectorizable_induction): Adjust the start value down by
2468         LOOP_VINFO_MASK_SKIP_NITERS iterations.
2469         (vect_transform_loop): Call vect_prepare_for_masked_peels.
2470         Take the number of skipped iterations into account when calculating
2471         the loop bounds.
2472         * tree-vect-stmts.c (vect_gen_while_not): New function.
2473
2474 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2475             Alan Hayward  <alan.hayward@arm.com>
2476             David Sherwood  <david.sherwood@arm.com>
2477
2478         * doc/sourcebuild.texi (vect_fully_masked): Document.
2479         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
2480         default value to 0.
2481         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
2482         split out from...
2483         (vect_analyze_loop_2): ...here. Don't check the vectorization
2484         factor against the number of loop iterations if the loop is
2485         fully-masked.
2486
2487 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2488             Alan Hayward  <alan.hayward@arm.com>
2489             David Sherwood  <david.sherwood@arm.com>
2490
2491         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
2492         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
2493         (dump_groups): Update accordingly.
2494         (iv_use::mem_type): New member variable.
2495         (address_p): New function.
2496         (record_use): Add a mem_type argument and initialize the new
2497         mem_type field.
2498         (record_group_use): Add a mem_type argument.  Use address_p.
2499         Remove obsolete null checks of base_object.  Update call to record_use.
2500         (find_interesting_uses_op): Update call to record_group_use.
2501         (find_interesting_uses_cond): Likewise.
2502         (find_interesting_uses_address): Likewise.
2503         (get_mem_type_for_internal_fn): New function.
2504         (find_address_like_use): Likewise.
2505         (find_interesting_uses_stmt): Try find_address_like_use before
2506         calling find_interesting_uses_op.
2507         (addr_offset_valid_p): Use the iv mem_type field as the type
2508         of the addressed memory.
2509         (add_autoinc_candidates): Likewise.
2510         (get_address_cost): Likewise.
2511         (split_small_address_groups_p): Use address_p.
2512         (split_address_groups): Likewise.
2513         (add_iv_candidate_for_use): Likewise.
2514         (autoinc_possible_for_pair): Likewise.
2515         (rewrite_groups): Likewise.
2516         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
2517         (determine_group_iv_cost): Update after split of USE_ADDRESS.
2518         (get_alias_ptr_type_for_ptr_address): New function.
2519         (rewrite_use_address): Rewrite address uses in calls that were
2520         identified by find_address_like_use.
2521
2522 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2523             Alan Hayward  <alan.hayward@arm.com>
2524             David Sherwood  <david.sherwood@arm.com>
2525
2526         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
2527         TARGET_MEM_REFs.
2528         * gimple-expr.h (is_gimple_addressable: Likewise.
2529         * gimple-expr.c (is_gimple_address): Likewise.
2530         * internal-fn.c (expand_call_mem_ref): New function.
2531         (expand_mask_load_optab_fn): Use it.
2532         (expand_mask_store_optab_fn): Likewise.
2533
2534 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2535             Alan Hayward  <alan.hayward@arm.com>
2536             David Sherwood  <david.sherwood@arm.com>
2537
2538         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
2539         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
2540         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
2541         (cond_umax@var{mode}): Document.
2542         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
2543         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
2544         (cond_umin_optab, cond_umax_optab): New optabs.
2545         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
2546         (COND_IOR, COND_XOR): New internal functions.
2547         * internal-fn.h (get_conditional_internal_fn): Declare.
2548         * internal-fn.c (cond_binary_direct): New macro.
2549         (expand_cond_binary_optab_fn): Likewise.
2550         (direct_cond_binary_optab_supported_p): Likewise.
2551         (get_conditional_internal_fn): New function.
2552         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
2553         Cope with reduction statements that are vectorized as calls rather
2554         than assignments.
2555         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
2556         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
2557         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
2558         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
2559         (UNSPEC_COND_EOR): New unspecs.
2560         (optab): Add mappings for them.
2561         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
2562         (sve_int_op, sve_fp_op): New int attributes.
2563
2564 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2565             Alan Hayward  <alan.hayward@arm.com>
2566             David Sherwood  <david.sherwood@arm.com>
2567
2568         * optabs.def (while_ult_optab): New optab.
2569         * doc/md.texi (while_ult@var{m}@var{n}): Document.
2570         * internal-fn.def (WHILE_ULT): New internal function.
2571         * internal-fn.h (direct_internal_fn_supported_p): New override
2572         that takes two types as argument.
2573         * internal-fn.c (while_direct): New macro.
2574         (expand_while_optab_fn): New function.
2575         (convert_optab_supported_p): Likewise.
2576         (direct_while_optab_supported_p): New macro.
2577         * wide-int.h (wi::udiv_ceil): New function.
2578         * tree-vectorizer.h (rgroup_masks): New structure.
2579         (vec_loop_masks): New typedef.
2580         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
2581         and fully_masked_p.
2582         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
2583         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
2584         (vect_max_vf): New function.
2585         (slpeel_make_loop_iterate_ntimes): Delete.
2586         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
2587         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
2588         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
2589         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
2590         internal-fn.h, stor-layout.h and optabs-query.h.
2591         (vect_set_loop_mask): New function.
2592         (add_preheader_seq): Likewise.
2593         (add_header_seq): Likewise.
2594         (interleave_supported_p): Likewise.
2595         (vect_maybe_permute_loop_masks): Likewise.
2596         (vect_set_loop_masks_directly): Likewise.
2597         (vect_set_loop_condition_masked): Likewise.
2598         (vect_set_loop_condition_unmasked): New function, split out from
2599         slpeel_make_loop_iterate_ntimes.
2600         (slpeel_make_loop_iterate_ntimes): Rename to..
2601         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
2602         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
2603         (vect_do_peeling): Update call accordingly.
2604         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
2605         loops.
2606         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
2607         mask_compare_type, can_fully_mask_p and fully_masked_p.
2608         (release_vec_loop_masks): New function.
2609         (_loop_vec_info): Use it to free the loop masks.
2610         (can_produce_all_loop_masks_p): New function.
2611         (vect_get_max_nscalars_per_iter): Likewise.
2612         (vect_verify_full_masking): Likewise.
2613         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
2614         retries, and free the mask rgroups before retrying.  Check loop-wide
2615         reasons for disallowing fully-masked loops.  Make the final decision
2616         about whether use a fully-masked loop or not.
2617         (vect_estimate_min_profitable_iters): Do not assume that peeling
2618         for the number of iterations will be needed for fully-masked loops.
2619         (vectorizable_reduction): Disable fully-masked loops.
2620         (vectorizable_live_operation): Likewise.
2621         (vect_halve_mask_nunits): New function.
2622         (vect_double_mask_nunits): Likewise.
2623         (vect_record_loop_mask): Likewise.
2624         (vect_get_loop_mask): Likewise.
2625         (vect_transform_loop): Handle the case in which the final loop
2626         iteration might handle a partial vector.  Call vect_set_loop_condition
2627         instead of slpeel_make_loop_iterate_ntimes.
2628         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
2629         (check_load_store_masking): New function.
2630         (prepare_load_store_mask): Likewise.
2631         (vectorizable_store): Handle fully-masked loops.
2632         (vectorizable_load): Likewise.
2633         (supportable_widening_operation): Use vect_halve_mask_nunits for
2634         booleans.
2635         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
2636         (vect_gen_while): New function.
2637         * config/aarch64/aarch64.md (umax<mode>3): New expander.
2638         (aarch64_uqdec<mode>): New insn.
2639
2640 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2641             Alan Hayward  <alan.hayward@arm.com>
2642             David Sherwood  <david.sherwood@arm.com>
2643
2644         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
2645         (reduc_xor_scal_optab): New optabs.
2646         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
2647         (reduc_xor_scal_@var{m}): Document.
2648         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
2649         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
2650         internal functions.
2651         * fold-const-call.c (fold_const_call): Handle them.
2652         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
2653         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
2654         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
2655         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
2656         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
2657         (UNSPEC_XORV): New unspecs.
2658         (optab): Add entries for them.
2659         (BITWISEV): New int iterator.
2660         (bit_reduc_op): New int attributes.
2661
2662 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2663             Alan Hayward  <alan.hayward@arm.com>
2664             David Sherwood  <david.sherwood@arm.com>
2665
2666         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
2667         * internal-fn.def (VEC_SHL_INSERT): New internal function.
2668         * optabs.def (vec_shl_insert_optab): New optab.
2669         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
2670         (duplicate_and_interleave): Likewise.
2671         * tree-vect-loop.c: Include internal-fn.h.
2672         (neutral_op_for_slp_reduction): New function, split out from
2673         get_initial_defs_for_reduction.
2674         (get_initial_def_for_reduction): Handle option 2 for variable-length
2675         vectors by loading the neutral value into a vector and then shifting
2676         the initial value into element 0.
2677         (get_initial_defs_for_reduction): Replace the code argument with
2678         the neutral value calculated by neutral_op_for_slp_reduction.
2679         Use gimple_build_vector for constant-length vectors.
2680         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
2681         but the first group_size elements have a neutral value.
2682         Use duplicate_and_interleave otherwise.
2683         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
2684         Update call to get_initial_defs_for_reduction.  Handle SLP
2685         reductions for variable-length vectors by creating one vector
2686         result for each scalar result, with the elements associated
2687         with other scalar results stubbed out with the neutral value.
2688         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
2689         Require IFN_VEC_SHL_INSERT for double reductions on
2690         variable-length vectors, or SLP reductions that have
2691         a neutral value.  Require can_duplicate_and_interleave_p
2692         support for variable-length unchained SLP reductions if there
2693         is no neutral value, such as for MIN/MAX reductions.  Also require
2694         the number of vector elements to be a multiple of the number of
2695         SLP statements when doing variable-length unchained SLP reductions.
2696         Update call to vect_create_epilog_for_reduction.
2697         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
2698         and remove initial values.
2699         (duplicate_and_interleave): Make public.
2700         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
2701         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
2702
2703 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2704             Alan Hayward  <alan.hayward@arm.com>
2705             David Sherwood  <david.sherwood@arm.com>
2706
2707         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
2708         (can_duplicate_and_interleave_p): New function.
2709         (vect_get_and_check_slp_defs): Take the vector of statements
2710         rather than just the current one.  Remove excess parentheses.
2711         Restriction rejectinon of vect_constant_def and vect_external_def
2712         for variable-length vectors to boolean types, or types for which
2713         can_duplicate_and_interleave_p is false.
2714         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
2715         (duplicate_and_interleave): New function.
2716         (vect_get_constant_vectors): Use gimple_build_vector for
2717         constant-length vectors and suitable variable-length constant
2718         vectors.  Use duplicate_and_interleave for other variable-length
2719         vectors.  Don't defer the update when inserting new statements.
2720
2721 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2722             Alan Hayward  <alan.hayward@arm.com>
2723             David Sherwood  <david.sherwood@arm.com>
2724
2725         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
2726         min_profitable_iters doesn't go negative.
2727
2728 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2729             Alan Hayward  <alan.hayward@arm.com>
2730             David Sherwood  <david.sherwood@arm.com>
2731
2732         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
2733         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
2734         * optabs.def (vec_mask_load_lanes_optab): New optab.
2735         (vec_mask_store_lanes_optab): Likewise.
2736         * internal-fn.def (MASK_LOAD_LANES): New internal function.
2737         (MASK_STORE_LANES): Likewise.
2738         * internal-fn.c (mask_load_lanes_direct): New macro.
2739         (mask_store_lanes_direct): Likewise.
2740         (expand_mask_load_optab_fn): Handle masked operations.
2741         (expand_mask_load_lanes_optab_fn): New macro.
2742         (expand_mask_store_optab_fn): Handle masked operations.
2743         (expand_mask_store_lanes_optab_fn): New macro.
2744         (direct_mask_load_lanes_optab_supported_p): Likewise.
2745         (direct_mask_store_lanes_optab_supported_p): Likewise.
2746         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
2747         parameter.
2748         (vect_load_lanes_supported): Likewise.
2749         * tree-vect-data-refs.c (strip_conversion): New function.
2750         (can_group_stmts_p): Likewise.
2751         (vect_analyze_data_ref_accesses): Use it instead of checking
2752         for a pair of assignments.
2753         (vect_store_lanes_supported): Take a masked_p parameter.
2754         (vect_load_lanes_supported): Likewise.
2755         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
2756         vect_store_lanes_supported and vect_load_lanes_supported.
2757         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
2758         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
2759         parameter.  Don't allow gaps for masked accesses.
2760         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
2761         and vect_load_lanes_supported.
2762         (get_load_store_type): Take a masked_p parameter and update
2763         call to get_group_load_store_type.
2764         (vectorizable_store): Update call to get_load_store_type.
2765         Handle IFN_MASK_STORE_LANES.
2766         (vectorizable_load): Update call to get_load_store_type.
2767         Handle IFN_MASK_LOAD_LANES.
2768
2769 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2770             Alan Hayward  <alan.hayward@arm.com>
2771             David Sherwood  <david.sherwood@arm.com>
2772
2773         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
2774         modes for SVE.
2775         * config/aarch64/aarch64-protos.h
2776         (aarch64_sve_struct_memory_operand_p): Declare.
2777         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
2778         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
2779         (VPRED, vpred): Handle SVE structure modes.
2780         * config/aarch64/constraints.md (Utx): New constraint.
2781         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
2782         (aarch64_sve_struct_nonimmediate_operand): New predicates.
2783         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
2784         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
2785         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
2786         structure modes.  Split into pieces after RA.
2787         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
2788         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
2789         New patterns.
2790         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
2791         SVE structure modes.
2792         (aarch64_classify_address): Likewise.
2793         (sizetochar): Move earlier in file.
2794         (aarch64_print_operand): Handle SVE register lists.
2795         (aarch64_array_mode): New function.
2796         (aarch64_sve_struct_memory_operand_p): Likewise.
2797         (TARGET_ARRAY_MODE): Redefine.
2798
2799 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2800             Alan Hayward  <alan.hayward@arm.com>
2801             David Sherwood  <david.sherwood@arm.com>
2802
2803         * target.def (array_mode): New target hook.
2804         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
2805         * doc/tm.texi: Regenerate.
2806         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
2807         * hooks.c (hook_optmode_mode_uhwi_none): New function.
2808         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
2809         targetm.array_mode.
2810         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
2811         type sizes.
2812
2813 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2814             Alan Hayward  <alan.hayward@arm.com>
2815             David Sherwood  <david.sherwood@arm.com>
2816
2817         * fold-const.c (fold_binary_loc): Check the argument types
2818         rather than the result type when testing for a vector operation.
2819
2820 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2821
2822         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
2823         * doc/tm.texi: Regenerate.
2824
2825 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2826             Alan Hayward  <alan.hayward@arm.com>
2827             David Sherwood  <david.sherwood@arm.com>
2828
2829         * doc/invoke.texi (-msve-vector-bits=): Document new option.
2830         (sve): Document new AArch64 extension.
2831         * doc/md.texi (w): Extend the description of the AArch64
2832         constraint to include SVE vectors.
2833         (Upl, Upa): Document new AArch64 predicate constraints.
2834         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
2835         enum.
2836         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
2837         (msve-vector-bits=): New option.
2838         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
2839         SVE when these are disabled.
2840         (sve): New extension.
2841         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
2842         modes.  Adjust their number of units based on aarch64_sve_vg.
2843         (MAX_BITSIZE_MODE_ANY_MODE): Define.
2844         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
2845         aarch64_addr_query_type.
2846         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
2847         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
2848         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
2849         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
2850         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
2851         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
2852         (aarch64_simd_imm_zero_p): Delete.
2853         (aarch64_check_zero_based_sve_index_immediate): Declare.
2854         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2855         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2856         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2857         (aarch64_sve_float_mul_immediate_p): Likewise.
2858         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2859         rather than an rtx.
2860         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
2861         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
2862         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
2863         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
2864         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
2865         (aarch64_regmode_natural_size): Likewise.
2866         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
2867         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
2868         left one place.
2869         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
2870         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
2871         for VG and the SVE predicate registers.
2872         (V_ALIASES): Add a "z"-prefixed alias.
2873         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
2874         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
2875         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
2876         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
2877         (REG_CLASS_NAMES): Add entries for them.
2878         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
2879         and the predicate registers.
2880         (aarch64_sve_vg): Declare.
2881         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
2882         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
2883         (REGMODE_NATURAL_SIZE): Define.
2884         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
2885         SVE macros.
2886         * config/aarch64/aarch64.c: Include cfgrtl.h.
2887         (simd_immediate_info): Add a constructor for series vectors,
2888         and an associated step field.
2889         (aarch64_sve_vg): New variable.
2890         (aarch64_dbx_register_number): Handle VG and the predicate registers.
2891         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
2892         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
2893         (VEC_ANY_DATA, VEC_STRUCT): New constants.
2894         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
2895         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
2896         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
2897         (aarch64_get_mask_mode): New functions.
2898         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
2899         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
2900         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
2901         predicate modes and predicate registers.  Explicitly restrict
2902         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
2903         to store a vector mode if it is recognized by
2904         aarch64_classify_vector_mode.
2905         (aarch64_regmode_natural_size): New function.
2906         (aarch64_hard_regno_caller_save_mode): Return the original mode
2907         for predicates.
2908         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
2909         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
2910         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
2911         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
2912         functions.
2913         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
2914         does not overlap dest if the function is frame-related.  Handle
2915         SVE constants.
2916         (aarch64_split_add_offset): New function.
2917         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
2918         them aarch64_add_offset.
2919         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
2920         and update call to aarch64_sub_sp.
2921         (aarch64_add_cfa_expression): New function.
2922         (aarch64_expand_prologue): Pass extra temporary registers to the
2923         functions above.  Handle the case in which we need to emit new
2924         DW_CFA_expressions for registers that were originally saved
2925         relative to the stack pointer, but now have to be expressed
2926         relative to the frame pointer.
2927         (aarch64_output_mi_thunk): Pass extra temporary registers to the
2928         functions above.
2929         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
2930         IP0 and IP1 values for SVE frames.
2931         (aarch64_expand_vec_series): New function.
2932         (aarch64_expand_sve_widened_duplicate): Likewise.
2933         (aarch64_expand_sve_const_vector): Likewise.
2934         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
2935         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
2936         into the register, rather than emitting a SET directly.
2937         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
2938         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
2939         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
2940         (offset_9bit_signed_scaled_p): New functions.
2941         (aarch64_replicate_bitmask_imm): New function.
2942         (aarch64_bitmask_imm): Use it.
2943         (aarch64_cannot_force_const_mem): Reject expressions involving
2944         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
2945         (aarch64_classify_index): Handle SVE indices, by requiring
2946         a plain register index with a scale that matches the element size.
2947         (aarch64_classify_address): Handle SVE addresses.  Assert that
2948         the mode of the address is VOIDmode or an integer mode.
2949         Update call to aarch64_classify_symbol.
2950         (aarch64_classify_symbolic_expression): Update call to
2951         aarch64_classify_symbol.
2952         (aarch64_const_vec_all_in_range_p): New function.
2953         (aarch64_print_vector_float_operand): Likewise.
2954         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
2955         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
2956         and the FP immediates 1.0 and 0.5.
2957         (aarch64_print_address_internal): Handle SVE addresses.
2958         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
2959         (aarch64_regno_regclass): Handle predicate registers.
2960         (aarch64_secondary_reload): Handle big-endian reloads of SVE
2961         data modes.
2962         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
2963         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
2964         (aarch64_convert_sve_vector_bits): New function.
2965         (aarch64_override_options): Use it to handle -msve-vector-bits=.
2966         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2967         rather than an rtx.
2968         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
2969         Handle SVE vector and predicate modes.  Accept VL-based constants
2970         that need only one temporary register, and VL offsets that require
2971         no temporary registers.
2972         (aarch64_conditional_register_usage): Mark the predicate registers
2973         as fixed if SVE isn't available.
2974         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
2975         Return true for SVE vector and predicate modes.
2976         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
2977         rather than an unsigned int.  Handle SVE modes.
2978         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
2979         SVE modes.
2980         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
2981         if SVE is enabled.
2982         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2983         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2984         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2985         (aarch64_sve_float_mul_immediate_p): New functions.
2986         (aarch64_sve_valid_immediate): New function.
2987         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
2988         Explicitly reject structure modes.  Check for INDEX constants.
2989         Handle PTRUE and PFALSE constants.
2990         (aarch64_check_zero_based_sve_index_immediate): New function.
2991         (aarch64_simd_imm_zero_p): Delete.
2992         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
2993         vector modes.  Accept constants in the range of CNT[BHWD].
2994         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
2995         ask for an Advanced SIMD mode.
2996         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
2997         (aarch64_simd_vector_alignment): Handle SVE predicates.
2998         (aarch64_vectorize_preferred_vector_alignment): New function.
2999         (aarch64_simd_vector_alignment_reachable): Use it instead of
3000         the vector size.
3001         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
3002         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
3003         functions.
3004         (MAX_VECT_LEN): Delete.
3005         (expand_vec_perm_d): Add a vec_flags field.
3006         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
3007         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
3008         (aarch64_evpc_ext): Don't apply a big-endian lane correction
3009         for SVE modes.
3010         (aarch64_evpc_rev): Rename to...
3011         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
3012         (aarch64_evpc_rev_global): New function.
3013         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
3014         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
3015         MAX_VECT_LEN.
3016         (aarch64_evpc_sve_tbl): New function.
3017         (aarch64_expand_vec_perm_const_1): Update after rename of
3018         aarch64_evpc_rev.  Handle SVE permutes too, trying
3019         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
3020         than aarch64_evpc_tbl.
3021         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
3022         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
3023         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
3024         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
3025         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
3026         (aarch64_expand_sve_vcond): New functions.
3027         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
3028         of aarch64_vector_mode_p.
3029         (aarch64_dwarf_poly_indeterminate_value): New function.
3030         (aarch64_compute_pressure_classes): Likewise.
3031         (aarch64_can_change_mode_class): Likewise.
3032         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
3033         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
3034         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
3035         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
3036         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
3037         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
3038         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
3039         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
3040         constraints.
3041         (Dn, Dl, Dr): Accept const as well as const_vector.
3042         (Dz): Likewise.  Compare against CONST0_RTX.
3043         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
3044         of "vector" where appropriate.
3045         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
3046         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
3047         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
3048         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
3049         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
3050         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
3051         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
3052         (v_int_equiv): Extend to SVE modes.
3053         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
3054         mode attributes.
3055         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
3056         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
3057         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
3058         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
3059         (SVE_COND_FP_CMP): New int iterators.
3060         (perm_hilo): Handle the new unpack unspecs.
3061         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
3062         attributes.
3063         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
3064         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
3065         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
3066         (aarch64_equality_operator, aarch64_constant_vector_operand)
3067         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
3068         (aarch64_sve_nonimmediate_operand): Likewise.
3069         (aarch64_sve_general_operand): Likewise.
3070         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
3071         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
3072         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
3073         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
3074         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
3075         (aarch64_sve_float_arith_immediate): Likewise.
3076         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
3077         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
3078         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
3079         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
3080         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
3081         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
3082         (aarch64_sve_float_arith_operand): Likewise.
3083         (aarch64_sve_float_arith_with_sub_operand): Likewise.
3084         (aarch64_sve_float_mul_operand): Likewise.
3085         (aarch64_sve_vec_perm_operand): Likewise.
3086         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
3087         (aarch64_mov_operand): Accept const_poly_int and const_vector.
3088         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
3089         as well as const_vector.
3090         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
3091         in file.  Use CONST0_RTX and CONSTM1_RTX.
3092         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
3093         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
3094         Use aarch64_simd_imm_zero.
3095         * config/aarch64/aarch64-sve.md: New file.
3096         * config/aarch64/aarch64.md: Include it.
3097         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
3098         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
3099         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
3100         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
3101         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
3102         (sve): New attribute.
3103         (enabled): Disable instructions with the sve attribute unless
3104         TARGET_SVE.
3105         (movqi, movhi): Pass CONST_POLY_INT operaneds through
3106         aarch64_expand_mov_immediate.
3107         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
3108         CNT[BHSD] immediates.
3109         (movti): Split CONST_POLY_INT moves into two halves.
3110         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
3111         Split additions that need a temporary here if the destination
3112         is the stack pointer.
3113         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
3114         (*add<mode>3_poly_1): New instruction.
3115         (set_clobber_cc): New expander.
3116
3117 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
3118
3119         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
3120         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
3121         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
3122         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
3123         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
3124         Change innermode from fixed_mode_size to machine_mode.
3125         (simplify_subreg): Update call accordingly.  Handle a constant-sized
3126         subreg of a variable-length CONST_VECTOR.
3127
3128 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
3129             Alan Hayward  <alan.hayward@arm.com>
3130             David Sherwood  <david.sherwood@arm.com>
3131
3132         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
3133         (add_offset_to_base): New function, split out from...
3134         (create_mem_ref): ...here.  When handling a scale other than 1,
3135         check first whether the address is valid without the offset.
3136         Add it into the base if so, leaving the index and scale as-is.
3137
3138 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
3139
3140         PR c++/83778
3141         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
3142         fold_for_warn before checking if arg2 is INTEGER_CST.
3143
3144 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
3145
3146         * config/rs6000/predicates.md (load_multiple_operation): Delete.
3147         (store_multiple_operation): Delete.
3148         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
3149         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
3150         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
3151         guarded by TARGET_STRING.
3152         (rs6000_output_load_multiple): Delete.
3153         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
3154         OPTION_MASK_STRING / TARGET_STRING handling.
3155         (print_operand) <'N', 'O'>: Add comment that these are unused now.
3156         (const rs6000_opt_masks) <"string">: Change mask to 0.
3157         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
3158         (MASK_STRING): Delete.
3159         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
3160         parts.  Simplify.
3161         (load_multiple): Delete.
3162         (*ldmsi8): Delete.
3163         (*ldmsi7): Delete.
3164         (*ldmsi6): Delete.
3165         (*ldmsi5): Delete.
3166         (*ldmsi4): Delete.
3167         (*ldmsi3): Delete.
3168         (store_multiple): Delete.
3169         (*stmsi8): Delete.
3170         (*stmsi7): Delete.
3171         (*stmsi6): Delete.
3172         (*stmsi5): Delete.
3173         (*stmsi4): Delete.
3174         (*stmsi3): Delete.
3175         (movmemsi_8reg): Delete.
3176         (corresponding unnamed define_insn): Delete.
3177         (movmemsi_6reg): Delete.
3178         (corresponding unnamed define_insn): Delete.
3179         (movmemsi_4reg): Delete.
3180         (corresponding unnamed define_insn): Delete.
3181         (movmemsi_2reg): Delete.
3182         (corresponding unnamed define_insn): Delete.
3183         (movmemsi_1reg): Delete.
3184         (corresponding unnamed define_insn): Delete.
3185         * config/rs6000/rs6000.opt (mno-string): New.
3186         (mstring): Replace by deprecation warning stub.
3187         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
3188
3189 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
3190
3191         * regrename.c (regrename_do_replace): If replacing the same
3192         reg multiple times, try to reuse last created gen_raw_REG.
3193
3194         PR debug/81155
3195         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
3196         main to workaround a bug in GDB.
3197
3198 2018-01-12  Tom de Vries  <tom@codesourcery.com>
3199
3200         PR target/83737
3201         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
3202
3203 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
3204
3205         PR rtl-optimization/80481
3206         * ira-color.c (get_cap_member): New function.
3207         (allocnos_conflict_by_live_ranges_p): Use it.
3208         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
3209         (setup_slot_coalesced_allocno_live_ranges): Ditto.
3210
3211 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
3212
3213         PR target/83628
3214         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
3215         (*saddl_se_1): Ditto.
3216         (*ssubsi_1): Ditto.
3217         (*ssubl_se_1): Ditto.
3218
3219 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
3220
3221         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
3222         rather than wi::to_widest for DR_INITs.
3223         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
3224         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
3225         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
3226         INTEGER_CSTs.
3227         (vect_analyze_group_access_1): Note that here.
3228
3229 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
3230
3231         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
3232         polynomial type sizes.
3233
3234 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
3235
3236         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
3237         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
3238         (gimple_add_tmp_var): Likewise.
3239
3240 2018-01-12  Martin Liska  <mliska@suse.cz>
3241
3242         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
3243         (gimple_alloc_sizes): Likewise.
3244         (dump_gimple_statistics): Use PRIu64 in printf format.
3245         * gimple.h: Change uint64_t to int.
3246
3247 2018-01-12  Martin Liska  <mliska@suse.cz>
3248
3249         * tree-core.h: Use uint64_t instead of int.
3250         * tree.c (tree_node_counts): Likewise.
3251         (tree_node_sizes): Likewise.
3252         (dump_tree_statistics): Use PRIu64 in printf format.
3253
3254 2018-01-12  Martin Liska  <mliska@suse.cz>
3255
3256         * Makefile.in: As qsort_chk is implemented in vec.c, add
3257         vec.o to linkage of gencfn-macros.
3258         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
3259         passing the info to record_node_allocation_statistics.
3260         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
3261         and pass the info.
3262         * ggc-common.c (struct ggc_usage): Add operator== and use
3263         it in operator< and compare function.
3264         * mem-stats.h (struct mem_usage): Likewise.
3265         * vec.c (struct vec_usage): Remove operator< and compare
3266         function. Can be simply inherited.
3267
3268 2018-01-12  Martin Jambor  <mjambor@suse.cz>
3269
3270         PR target/81616
3271         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
3272         * tree-ssa-math-opts.c: Include domwalk.h.
3273         (convert_mult_to_fma_1): New function.
3274         (fma_transformation_info): New type.
3275         (fma_deferring_state): Likewise.
3276         (cancel_fma_deferring): New function.
3277         (result_of_phi): Likewise.
3278         (last_fma_candidate_feeds_initial_phi): Likewise.
3279         (convert_mult_to_fma): Added deferring logic, split actual
3280         transformation to convert_mult_to_fma_1.
3281         (math_opts_dom_walker): New type.
3282         (math_opts_dom_walker::after_dom_children): New method, body moved
3283         here from pass_optimize_widening_mul::execute, added deferring logic
3284         bits.
3285         (pass_optimize_widening_mul::execute): Moved most of code to
3286         math_opts_dom_walker::after_dom_children.
3287         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
3288         * config/i386/i386.c (ix86_option_override_internal): Added
3289         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
3290
3291 2018-01-12  Richard Biener  <rguenther@suse.de>
3292
3293         PR debug/83157
3294         * dwarf2out.c (gen_variable_die): Do not reset old_die for
3295         inline instance vars.
3296
3297 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
3298
3299         PR target/81819
3300         * config/rx/rx.c (rx_is_restricted_memory_address):
3301         Handle SUBREG case.
3302
3303 2018-01-12  Richard Biener  <rguenther@suse.de>
3304
3305         PR tree-optimization/80846
3306         * target.def (split_reduction): New target hook.
3307         * targhooks.c (default_split_reduction): New function.
3308         * targhooks.h (default_split_reduction): Declare.
3309         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
3310         target requests first reduce vectors by combining low and high
3311         parts.
3312         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
3313         (get_vectype_for_scalar_type_and_size): Export.
3314         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
3315         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
3316         * doc/tm.texi: Regenerate.
3317         * config/i386/i386.c (ix86_split_reduction): Implement
3318         TARGET_VECTORIZE_SPLIT_REDUCTION.
3319
3320 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
3321
3322         PR target/83368
3323         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
3324         in PIC mode except for TARGET_VXWORKS_RTP.
3325         * config/sparc/sparc.c: Include cfgrtl.h.
3326         (TARGET_INIT_PIC_REG): Define.
3327         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
3328         (sparc_pic_register_p): New predicate.
3329         (sparc_legitimate_address_p): Use it.
3330         (sparc_legitimize_pic_address): Likewise.
3331         (sparc_delegitimize_address): Likewise.
3332         (sparc_mode_dependent_address_p): Likewise.
3333         (gen_load_pcrel_sym): Remove 4th parameter.
3334         (load_got_register): Adjust call to above.  Remove obsolete stuff.
3335         (sparc_expand_prologue): Do not call load_got_register here.
3336         (sparc_flat_expand_prologue): Likewise.
3337         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
3338         (sparc_use_pseudo_pic_reg): New function.
3339         (sparc_init_pic_reg): Likewise.
3340         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
3341         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
3342
3343 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
3344
3345         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
3346         Add item for branch_cost.
3347
3348 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
3349
3350         PR rtl-optimization/83565
3351         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
3352         not extend the result to a larger mode for rotate operations.
3353         (num_sign_bit_copies1): Likewise.
3354
3355 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
3356
3357         PR target/40411
3358         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
3359         -symbolic.
3360         Use values-Xc.o for -pedantic.
3361         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
3362
3363 2018-01-12  Martin Liska  <mliska@suse.cz>
3364
3365         PR ipa/83054
3366         * ipa-devirt.c (final_warning_record::grow_type_warnings):
3367         New function.
3368         (possible_polymorphic_call_targets): Use it.
3369         (ipa_devirt): Likewise.
3370
3371 2018-01-12  Martin Liska  <mliska@suse.cz>
3372
3373         * profile-count.h (enum profile_quality): Use 0 as invalid
3374         enum value of profile_quality.
3375
3376 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
3377
3378         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
3379         -mext-string options.
3380
3381 2018-01-12  Richard Biener  <rguenther@suse.de>
3382
3383         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
3384         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
3385         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
3386         Likewise.
3387         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
3388
3389 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
3390
3391         * configure.ac (--with-long-double-format): Add support for the
3392         configuration option to change the default long double format on
3393         PowerPC systems.
3394         * config.gcc (powerpc*-linux*-*): Likewise.
3395         * configure: Regenerate.
3396         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
3397         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
3398         used without modification.
3399
3400 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3401
3402         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
3403         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
3404         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
3405         MISC_BUILTIN_SPEC_BARRIER.
3406         (rs6000_init_builtins): Likewise.
3407         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
3408         enum value.
3409         (speculation_barrier): New define_insn.
3410         * doc/extend.texi: Document __builtin_speculation_barrier.
3411
3412 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
3413
3414         PR target/83203
3415         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
3416         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
3417         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
3418         iterators.
3419         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
3420         integral modes instead of "ss" and "sd".
3421         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
3422         vectors with 32-bit and 64-bit elements.
3423         (vecdupssescalarmodesuffix): New mode attribute.
3424         (vec_dup<mode>): Use it.
3425
3426 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
3427
3428         PR target/83330
3429         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
3430         frame if argument is passed on stack.
3431
3432 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
3433
3434         PR target/82682
3435         * ree.c (combine_reaching_defs): Optimize also
3436         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
3437         reg2=any_extend(exp); reg1=reg2;, formatting fix.
3438
3439 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
3440
3441         PR middle-end/83189
3442         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
3443
3444 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
3445
3446         PR middle-end/83718
3447         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
3448         after they are computed.
3449
3450 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
3451
3452         PR tree-optimization/83695
3453         * gimple-loop-linterchange.cc
3454         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
3455         reset cached scev information after interchange.
3456         (pass_linterchange::execute): Remove call to scev_reset_htab.
3457
3458 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3459
3460         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
3461         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
3462         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
3463         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
3464         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
3465         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
3466         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
3467         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
3468         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
3469         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
3470         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
3471         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
3472         (V_lane_reg): Likewise.
3473         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
3474         New define_expand.
3475         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
3476         (vfmal_lane_low<mode>_intrinsic,
3477         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
3478         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
3479         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
3480         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
3481         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
3482         vfmsl_lane_high<mode>_intrinsic): New define_insns.
3483
3484 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3485
3486         * config/arm/arm-cpus.in (fp16fml): New feature.
3487         (ALL_SIMD): Add fp16fml.
3488         (armv8.2-a): Add fp16fml as an option.
3489         (armv8.3-a): Likewise.
3490         (armv8.4-a): Add fp16fml as part of fp16.
3491         * config/arm/arm.h (TARGET_FP16FML): Define.
3492         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
3493         when appropriate.
3494         * config/arm/arm-modes.def (V2HF): Define.
3495         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
3496         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
3497         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
3498         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
3499         vfmsl_low, vfmsl_high): New set of builtins.
3500         * config/arm/iterators.md (PLUSMINUS): New code iterator.
3501         (vfml_op): New code attribute.
3502         (VFMLHALVES): New int iterator.
3503         (VFML, VFMLSEL): New mode attributes.
3504         (V_reg): Define mapping for V2HF.
3505         (V_hi, V_lo): New mode attributes.
3506         (VF_constraint): Likewise.
3507         (vfml_half, vfml_half_selector): New int attributes.
3508         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
3509         define_expand.
3510         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
3511         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
3512         New define_insn.
3513         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
3514         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
3515         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
3516         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
3517         documentation.
3518         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
3519         Document new effective target and option set.
3520
3521 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3522
3523         * config/arm/arm-cpus.in (armv8_4): New feature.
3524         (ARMv8_4a): New fgroup.
3525         (armv8.4-a): New arch.
3526         * config/arm/arm-tables.opt: Regenerate.
3527         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
3528         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
3529         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
3530         Add matching rules for -march=armv8.4-a and extensions.
3531         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
3532
3533 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
3534
3535         PR target/81821
3536         * config/rx/rx.md (BW): New mode attribute.
3537         (sync_lock_test_and_setsi): Add mode suffix to insn output.
3538
3539 2018-01-11  Richard Biener  <rguenther@suse.de>
3540
3541         PR tree-optimization/83435
3542         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
3543         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
3544         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
3545
3546 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3547             Alan Hayward  <alan.hayward@arm.com>
3548             David Sherwood  <david.sherwood@arm.com>
3549
3550         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
3551         field.
3552         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
3553         (aarch64_print_address_internal): Use it to check for a zero offset.
3554
3555 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3556             Alan Hayward  <alan.hayward@arm.com>
3557             David Sherwood  <david.sherwood@arm.com>
3558
3559         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
3560         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
3561         Return a poly_int64 rather than a HOST_WIDE_INT.
3562         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
3563         rather than a HOST_WIDE_INT.
3564         * config/aarch64/aarch64.h (aarch64_frame): Protect with
3565         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
3566         hard_fp_offset, frame_size, initial_adjust, callee_offset and
3567         final_offset from HOST_WIDE_INT to poly_int64.
3568         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
3569         to_constant when getting the number of units in an Advanced SIMD
3570         mode.
3571         (aarch64_builtin_vectorized_function): Check for a constant number
3572         of units.
3573         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
3574         GET_MODE_SIZE.
3575         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
3576         attribute instead of GET_MODE_NUNITS.
3577         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
3578         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
3579         GET_MODE_SIZE for fixed-size registers.
3580         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
3581         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
3582         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
3583         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
3584         (aarch64_print_operand, aarch64_print_address_internal)
3585         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
3586         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
3587         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
3588         Handle polynomial GET_MODE_SIZE.
3589         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
3590         wider than SImode without modification.
3591         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
3592         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
3593         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
3594         passing and returning SVE modes.
3595         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
3596         rather than GEN_INT.
3597         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
3598         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
3599         (aarch64_allocate_and_probe_stack_space): Likewise.
3600         (aarch64_layout_frame): Cope with polynomial offsets.
3601         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
3602         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
3603         polynomial offsets.
3604         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
3605         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
3606         poly_int64 rather than a HOST_WIDE_INT.
3607         (aarch64_get_separate_components, aarch64_process_components)
3608         (aarch64_expand_prologue, aarch64_expand_epilogue)
3609         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
3610         (aarch64_anchor_offset): New function, split out from...
3611         (aarch64_legitimize_address): ...here.
3612         (aarch64_builtin_vectorization_cost): Handle polynomial
3613         TYPE_VECTOR_SUBPARTS.
3614         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
3615         GET_MODE_NUNITS.
3616         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
3617         number of elements from the PARALLEL rather than the mode.
3618         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
3619         rather than GET_MODE_BITSIZE.
3620         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
3621         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
3622         (aarch64_expand_vec_perm_const_1): Handle polynomial
3623         d->perm.length () and d->perm elements.
3624         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
3625         Apply to_constant to d->perm elements.
3626         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
3627         polynomial CONST_VECTOR_NUNITS.
3628         (aarch64_move_pointer): Take amount as a poly_int64 rather
3629         than an int.
3630         (aarch64_progress_pointer): Avoid temporary variable.
3631         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
3632         the mode attribute instead of GET_MODE.
3633
3634 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3635             Alan Hayward  <alan.hayward@arm.com>
3636             David Sherwood  <david.sherwood@arm.com>
3637
3638         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
3639         x exists before using it.
3640         (aarch64_add_constant_internal): Rename to...
3641         (aarch64_add_offset_1): ...this.  Replace regnum with separate
3642         src and dest rtxes.  Handle the case in which they're different,
3643         including when the offset is zero.  Replace scratchreg with an rtx.
3644         Use 2 additions if there is no spare register into which we can
3645         move a 16-bit constant.
3646         (aarch64_add_constant): Delete.
3647         (aarch64_add_offset): Replace reg with separate src and dest
3648         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
3649         Use aarch64_add_offset_1.
3650         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
3651         an rtx rather than an int.  Take the delta as a poly_int64
3652         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
3653         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
3654         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
3655         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
3656         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
3657         and aarch64_add_sp.
3658         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
3659         aarch64_add_constant.
3660
3661 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3662
3663         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
3664         Use scalar_float_mode.
3665
3666 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3667
3668         * config/aarch64/aarch64-simd.md
3669         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
3670         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
3671         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
3672         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
3673         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
3674         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
3675         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
3676         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
3677         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
3678         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
3679
3680 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3681
3682         PR target/83514
3683         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
3684         targ_options->x_arm_arch_string is non NULL.
3685
3686 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
3687
3688         * config/aarch64/aarch64.h
3689         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
3690
3691 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
3692
3693         PR target/82096
3694         * expmed.c (emit_store_flag_force): Swap if const op0
3695         and change VOIDmode to mode of op0.
3696
3697 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3698
3699         PR rtl-optimization/83761
3700         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
3701         than bytes to mode_for_size.
3702
3703 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3704
3705         PR middle-end/83189
3706         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
3707         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
3708         profile.
3709
3710 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3711
3712         PR middle-end/83575
3713         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
3714         when in layout mode.
3715         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
3716         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
3717         partition fixup.
3718
3719 2018-01-10  Michael Collison  <michael.collison@arm.com>
3720
3721         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
3722         * config/aarch64/aarch64-option-extension.def: Add
3723         AARCH64_OPT_EXTENSION of 'fp16fml'.
3724         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3725         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
3726         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
3727         * config/aarch64/constraints.md (Ui7): New constraint.
3728         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
3729         (VFMLA_SEL_W): Ditto.
3730         (f16quad): Ditto.
3731         (f16mac1): Ditto.
3732         (VFMLA16_LOW): New int iterator.
3733         (VFMLA16_HIGH): Ditto.
3734         (UNSPEC_FMLAL): New unspec.
3735         (UNSPEC_FMLSL): Ditto.
3736         (UNSPEC_FMLAL2): Ditto.
3737         (UNSPEC_FMLSL2): Ditto.
3738         (f16mac): New code attribute.
3739         * config/aarch64/aarch64-simd-builtins.def
3740         (aarch64_fmlal_lowv2sf): Ditto.
3741         (aarch64_fmlsl_lowv2sf): Ditto.
3742         (aarch64_fmlalq_lowv4sf): Ditto.
3743         (aarch64_fmlslq_lowv4sf): Ditto.
3744         (aarch64_fmlal_highv2sf): Ditto.
3745         (aarch64_fmlsl_highv2sf): Ditto.
3746         (aarch64_fmlalq_highv4sf): Ditto.
3747         (aarch64_fmlslq_highv4sf): Ditto.
3748         (aarch64_fmlal_lane_lowv2sf): Ditto.
3749         (aarch64_fmlsl_lane_lowv2sf): Ditto.
3750         (aarch64_fmlal_laneq_lowv2sf): Ditto.
3751         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
3752         (aarch64_fmlalq_lane_lowv4sf): Ditto.
3753         (aarch64_fmlsl_lane_lowv4sf): Ditto.
3754         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
3755         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
3756         (aarch64_fmlal_lane_highv2sf): Ditto.
3757         (aarch64_fmlsl_lane_highv2sf): Ditto.
3758         (aarch64_fmlal_laneq_highv2sf): Ditto.
3759         (aarch64_fmlsl_laneq_highv2sf): Ditto.
3760         (aarch64_fmlalq_lane_highv4sf): Ditto.
3761         (aarch64_fmlsl_lane_highv4sf): Ditto.
3762         (aarch64_fmlalq_laneq_highv4sf): Ditto.
3763         (aarch64_fmlsl_laneq_highv4sf): Ditto.
3764         * config/aarch64/aarch64-simd.md:
3765         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
3766         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3767         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
3768         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3769         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
3770         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
3771         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
3772         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
3773         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
3774         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
3775         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
3776         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
3777         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
3778         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
3779         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
3780         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
3781         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
3782         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
3783         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
3784         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
3785         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
3786         (vfmlsl_low_u32): Ditto.
3787         (vfmlalq_low_u32): Ditto.
3788         (vfmlslq_low_u32): Ditto.
3789         (vfmlal_high_u32): Ditto.
3790         (vfmlsl_high_u32): Ditto.
3791         (vfmlalq_high_u32): Ditto.
3792         (vfmlslq_high_u32): Ditto.
3793         (vfmlal_lane_low_u32): Ditto.
3794         (vfmlsl_lane_low_u32): Ditto.
3795         (vfmlal_laneq_low_u32): Ditto.
3796         (vfmlsl_laneq_low_u32): Ditto.
3797         (vfmlalq_lane_low_u32): Ditto.
3798         (vfmlslq_lane_low_u32): Ditto.
3799         (vfmlalq_laneq_low_u32): Ditto.
3800         (vfmlslq_laneq_low_u32): Ditto.
3801         (vfmlal_lane_high_u32): Ditto.
3802         (vfmlsl_lane_high_u32): Ditto.
3803         (vfmlal_laneq_high_u32): Ditto.
3804         (vfmlsl_laneq_high_u32): Ditto.
3805         (vfmlalq_lane_high_u32): Ditto.
3806         (vfmlslq_lane_high_u32): Ditto.
3807         (vfmlalq_laneq_high_u32): Ditto.
3808         (vfmlslq_laneq_high_u32): Ditto.
3809         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
3810         (AARCH64_FL_FOR_ARCH8_4): New.
3811         (AARCH64_ISA_F16FML): New ISA flag.
3812         (TARGET_F16FML): New feature flag for fp16fml.
3813         (doc/invoke.texi): Document new fp16fml option.
3814
3815 2018-01-10  Michael Collison  <michael.collison@arm.com>
3816
3817         * config/aarch64/aarch64-builtins.c:
3818         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
3819         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3820         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
3821         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
3822         (AARCH64_ISA_SHA3): New ISA flag.
3823         (TARGET_SHA3): New feature flag for sha3.
3824         * config/aarch64/iterators.md (sha512_op): New int attribute.
3825         (CRYPTO_SHA512): New int iterator.
3826         (UNSPEC_SHA512H): New unspec.
3827         (UNSPEC_SHA512H2): Ditto.
3828         (UNSPEC_SHA512SU0): Ditto.
3829         (UNSPEC_SHA512SU1): Ditto.
3830         * config/aarch64/aarch64-simd-builtins.def
3831         (aarch64_crypto_sha512hqv2di): New builtin.
3832         (aarch64_crypto_sha512h2qv2di): Ditto.
3833         (aarch64_crypto_sha512su0qv2di): Ditto.
3834         (aarch64_crypto_sha512su1qv2di): Ditto.
3835         (aarch64_eor3qv8hi): Ditto.
3836         (aarch64_rax1qv2di): Ditto.
3837         (aarch64_xarqv2di): Ditto.
3838         (aarch64_bcaxqv8hi): Ditto.
3839         * config/aarch64/aarch64-simd.md:
3840         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
3841         (aarch64_crypto_sha512su0qv2di): Ditto.
3842         (aarch64_crypto_sha512su1qv2di): Ditto.
3843         (aarch64_eor3qv8hi): Ditto.
3844         (aarch64_rax1qv2di): Ditto.
3845         (aarch64_xarqv2di): Ditto.
3846         (aarch64_bcaxqv8hi): Ditto.
3847         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
3848         (vsha512h2q_u64): Ditto.
3849         (vsha512su0q_u64): Ditto.
3850         (vsha512su1q_u64): Ditto.
3851         (veor3q_u16): Ditto.
3852         (vrax1q_u64): Ditto.
3853         (vxarq_u64): Ditto.
3854         (vbcaxq_u16): Ditto.
3855         * config/arm/types.md (crypto_sha512): New type attribute.
3856         (crypto_sha3): Ditto.
3857         (doc/invoke.texi): Document new sha3 option.
3858
3859 2018-01-10  Michael Collison  <michael.collison@arm.com>
3860
3861         * config/aarch64/aarch64-builtins.c:
3862         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
3863         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3864         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
3865         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
3866         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
3867         (AARCH64_ISA_SM4): New ISA flag.
3868         (TARGET_SM4): New feature flag for sm4.
3869         * config/aarch64/aarch64-simd-builtins.def
3870         (aarch64_sm3ss1qv4si): Ditto.
3871         (aarch64_sm3tt1aq4si): Ditto.
3872         (aarch64_sm3tt1bq4si): Ditto.
3873         (aarch64_sm3tt2aq4si): Ditto.
3874         (aarch64_sm3tt2bq4si): Ditto.
3875         (aarch64_sm3partw1qv4si): Ditto.
3876         (aarch64_sm3partw2qv4si): Ditto.
3877         (aarch64_sm4eqv4si): Ditto.
3878         (aarch64_sm4ekeyqv4si): Ditto.
3879         * config/aarch64/aarch64-simd.md:
3880         (aarch64_sm3ss1qv4si): Ditto.
3881         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
3882         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
3883         (aarch64_sm4eqv4si): Ditto.
3884         (aarch64_sm4ekeyqv4si): Ditto.
3885         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
3886         (sm3part_op): Ditto.
3887         (CRYPTO_SM3TT): Ditto.
3888         (CRYPTO_SM3PART): Ditto.
3889         (UNSPEC_SM3SS1): New unspec.
3890         (UNSPEC_SM3TT1A): Ditto.
3891         (UNSPEC_SM3TT1B): Ditto.
3892         (UNSPEC_SM3TT2A): Ditto.
3893         (UNSPEC_SM3TT2B): Ditto.
3894         (UNSPEC_SM3PARTW1): Ditto.
3895         (UNSPEC_SM3PARTW2): Ditto.
3896         (UNSPEC_SM4E): Ditto.
3897         (UNSPEC_SM4EKEY): Ditto.
3898         * config/aarch64/constraints.md (Ui2): New constraint.
3899         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
3900         * config/arm/types.md (crypto_sm3): New type attribute.
3901         (crypto_sm4): Ditto.
3902         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
3903         (vsm3tt1aq_u32): Ditto.
3904         (vsm3tt1bq_u32): Ditto.
3905         (vsm3tt2aq_u32): Ditto.
3906         (vsm3tt2bq_u32): Ditto.
3907         (vsm3partw1q_u32): Ditto.
3908         (vsm3partw2q_u32): Ditto.
3909         (vsm4eq_u32): Ditto.
3910         (vsm4ekeyq_u32): Ditto.
3911         (doc/invoke.texi): Document new sm4 option.
3912
3913 2018-01-10  Michael Collison  <michael.collison@arm.com>
3914
3915         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
3916         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
3917         (AARCH64_FL_FOR_ARCH8_4): New.
3918         (AARCH64_FL_V8_4): New flag.
3919         (doc/invoke.texi): Document new armv8.4-a option.
3920
3921 2018-01-10  Michael Collison  <michael.collison@arm.com>
3922
3923         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3924         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
3925         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
3926         * config/aarch64/aarch64-option-extension.def: Add
3927         AARCH64_OPT_EXTENSION of 'sha2'.
3928         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
3929         (crypto): Disable sha2 and aes if crypto disabled.
3930         (crypto): Enable aes and sha2 if enabled.
3931         (simd): Disable sha2 and aes if simd disabled.
3932         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
3933         New flags.
3934         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
3935         (TARGET_SHA2): New feature flag for sha2.
3936         (TARGET_AES): New feature flag for aes.
3937         * config/aarch64/aarch64-simd.md:
3938         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
3939         conditional on TARGET_AES.
3940         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
3941         (aarch64_crypto_sha1hsi): Make pattern conditional
3942         on TARGET_SHA2.
3943         (aarch64_crypto_sha1hv4si): Ditto.
3944         (aarch64_be_crypto_sha1hv4si): Ditto.
3945         (aarch64_crypto_sha1su1v4si): Ditto.
3946         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
3947         (aarch64_crypto_sha1su0v4si): Ditto.
3948         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
3949         (aarch64_crypto_sha256su0v4si): Ditto.
3950         (aarch64_crypto_sha256su1v4si): Ditto.
3951         (doc/invoke.texi): Document new aes and sha2 options.
3952
3953 2018-01-10  Martin Sebor  <msebor@redhat.com>
3954
3955         PR tree-optimization/83781
3956         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
3957         as string arrays.
3958
3959 2018-01-11  Martin Sebor  <msebor@gmail.com>
3960             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3961
3962         PR tree-optimization/83501
3963         PR tree-optimization/81703
3964
3965         * tree-ssa-strlen.c (get_string_cst): Rename...
3966         (get_string_len): ...to this.  Handle global constants.
3967         (handle_char_store): Adjust.
3968
3969 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
3970             Jim Wilson  <jimw@sifive.com>
3971
3972         * config/riscv/riscv-protos.h (riscv_output_return): New.
3973         * config/riscv/riscv.c (struct machine_function): New naked_p field.
3974         (riscv_attribute_table, riscv_output_return),
3975         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
3976         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
3977         (riscv_compute_frame_info): Only compute frame->mask if not a naked
3978         function.
3979         (riscv_expand_prologue): Add early return for naked function.
3980         (riscv_expand_epilogue): Likewise.
3981         (riscv_function_ok_for_sibcall): Return false for naked function.
3982         (riscv_set_current_function): New.
3983         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
3984         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
3985         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
3986         * doc/extend.texi (RISC-V Function Attributes): New.
3987
3988 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
3989
3990         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
3991         check for 128-bit long double before checking TCmode.
3992         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
3993         128-bit long doubles before checking TFmode or TCmode.
3994         (FLOAT128_IBM_P): Likewise.
3995
3996 2018-01-10  Martin Sebor  <msebor@redhat.com>
3997
3998         PR tree-optimization/83671
3999         * builtins.c (c_strlen): Unconditionally return zero for the empty
4000         string.
4001         Use -Warray-bounds for warnings.
4002         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
4003         for non-constant array indices with COMPONENT_REF, arrays of
4004         arrays, and pointers to arrays.
4005         (gimple_fold_builtin_strlen): Determine and set length range for
4006         non-constant character arrays.
4007
4008 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
4009
4010         PR middle-end/81897
4011         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
4012         empty blocks.
4013
4014 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
4015
4016         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
4017
4018 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
4019
4020         PR target/83399
4021         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
4022         VECTOR_MEM_ALTIVEC_OR_VSX_P.
4023         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
4024         indexed_or_indirect_operand predicate.
4025         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
4026         (*vsx_le_perm_load_v8hi): Likewise.
4027         (*vsx_le_perm_load_v16qi): Likewise.
4028         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
4029         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
4030         (*vsx_le_perm_store_v8hi): Likewise.
4031         (*vsx_le_perm_store_v16qi): Likewise.
4032         (eight unnamed splitters): Likewise.
4033
4034 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
4035
4036         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
4037         * config/rs6000/emmintrin.h: Likewise.
4038         * config/rs6000/mmintrin.h: Likewise.
4039         * config/rs6000/xmmintrin.h: Likewise.
4040
4041 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
4042
4043         PR c++/43486
4044         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
4045         "public_flag".
4046         * tree.c (tree_nop_conversion): Return true for location wrapper
4047         nodes.
4048         (maybe_wrap_with_location): New function.
4049         (selftest::check_strip_nops): New function.
4050         (selftest::test_location_wrappers): New function.
4051         (selftest::tree_c_tests): Call it.
4052         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
4053         (maybe_wrap_with_location): New decl.
4054         (EXPR_LOCATION_WRAPPER_P): New macro.
4055         (location_wrapper_p): New inline function.
4056         (tree_strip_any_location_wrapper): New inline function.
4057
4058 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
4059
4060         PR target/83735
4061         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
4062         stack_realign_offset for the largest alignment of stack slot
4063         actually used.
4064         (ix86_find_max_used_stack_alignment): New function.
4065         (ix86_finalize_stack_frame_flags): Use it.  Set
4066         max_used_stack_alignment if we don't realign stack.
4067         * config/i386/i386.h (machine_function): Add
4068         max_used_stack_alignment.
4069
4070 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
4071
4072         * config/arm/arm.opt (-mbranch-cost): New option.
4073         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
4074         account.
4075
4076 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
4077
4078         PR target/83629
4079         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
4080         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
4081
4082 2018-01-10  Richard Biener  <rguenther@suse.de>
4083
4084         PR debug/83765
4085         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
4086         early out so it also covers the case where we have a non-NULL
4087         origin.
4088
4089 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
4090
4091         PR tree-optimization/83753
4092         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
4093         for non-strided grouped accesses if the number of elements is 1.
4094
4095 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
4096
4097         PR target/81616
4098         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
4099         * i386.h (TARGET_USE_GATHER): Define.
4100         * x86-tune.def (X86_TUNE_USE_GATHER): New.
4101
4102 2018-01-10  Martin Liska  <mliska@suse.cz>
4103
4104         PR bootstrap/82831
4105         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
4106         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
4107         partitioning.
4108         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
4109         CLEANUP_NO_PARTITIONING is not set.
4110
4111 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
4112
4113         * doc/rtl.texi: Remove documentation of (const ...) wrappers
4114         for vectors, as a partial revert of r254296.
4115         * rtl.h (const_vec_p): Delete.
4116         (const_vec_duplicate_p): Don't test for vector CONSTs.
4117         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
4118         * expmed.c (make_tree): Likewise.
4119
4120         Revert:
4121         * common.md (E, F): Use CONSTANT_P instead of checking for
4122         CONST_VECTOR.
4123         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
4124         checking for CONST_VECTOR.
4125
4126 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
4127
4128         PR middle-end/83575
4129         * predict.c (force_edge_cold): Handle in more sane way edges
4130         with no prediction.
4131
4132 2018-01-09  Carl Love  <cel@us.ibm.com>
4133
4134         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
4135         V4SI, V4SF types.
4136         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
4137         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
4138         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
4139         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
4140         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
4141         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
4142         * config/rs6000/rs6000-protos.h: Add extern defition for
4143         rs6000_generate_float2_double_code.
4144         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
4145         function.
4146         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
4147         (float2_v2df): Add define_expand.
4148
4149 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
4150
4151         PR target/83628
4152         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
4153         op_mode in the force_to_mode call.
4154
4155 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
4156
4157         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
4158         instead of checking each element individually.
4159         (aarch64_evpc_uzp): Likewise.
4160         (aarch64_evpc_zip): Likewise.
4161         (aarch64_evpc_ext): Likewise.
4162         (aarch64_evpc_rev): Likewise.
4163         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
4164         instead of checking each element individually.  Return true without
4165         generating rtl if
4166         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
4167         whether all selected elements come from the same input, instead of
4168         checking each element individually.  Remove calls to gen_rtx_REG,
4169         start_sequence and end_sequence and instead assert that no rtl is
4170         generated.
4171
4172 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
4173
4174         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
4175         order of HIGH and CONST checks.
4176
4177 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
4178
4179         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
4180         if the destination isn't an SSA_NAME.
4181
4182 2018-01-09  Richard Biener  <rguenther@suse.de>
4183
4184         PR tree-optimization/83668
4185         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
4186         move prologue...
4187         (canonicalize_loop_form): ... here, renamed from ...
4188         (canonicalize_loop_closed_ssa_form): ... this and amended to
4189         swap successor edges for loop exit blocks to make us use
4190         the RPO order we need for initial schedule generation.
4191
4192 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
4193
4194         PR tree-optimization/64811
4195         * match.pd: When optimizing comparisons with Inf, avoid
4196         introducing or losing exceptions from comparisons with NaN.
4197
4198 2018-01-09  Martin Liska  <mliska@suse.cz>
4199
4200         PR sanitizer/82517
4201         * asan.c (shadow_mem_size): Add gcc_assert.
4202
4203 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
4204
4205         Don't save registers in main().
4206
4207         PR target/83738
4208         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
4209         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
4210         * config/avr/avr.c (avr_set_current_function): Don't error if
4211         naked, OS_task or OS_main are specified at the same time.
4212         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
4213         OS_main.
4214         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
4215         attribute.
4216         * common/config/avr/avr-common.c (avr_option_optimization_table):
4217         Switch on -mmain-is-OS_task for optimizing compilations.
4218
4219 2018-01-09  Richard Biener  <rguenther@suse.de>
4220
4221         PR tree-optimization/83572
4222         * graphite.c: Include cfganal.h.
4223         (graphite_transform_loops): Connect infinite loops to exit
4224         and remove fake edges at the end.
4225
4226 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
4227
4228         * ipa-inline.c (edge_badness): Revert accidental checkin.
4229
4230 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
4231
4232         PR ipa/80763
4233         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
4234         symbols; not inline clones.
4235
4236 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
4237
4238         PR target/83507
4239         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
4240         hard registers.  Formatting fixes.
4241
4242         PR preprocessor/83722
4243         * gcc.c (try_generate_repro): Pass
4244         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
4245         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
4246         do_report_bug.
4247
4248 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
4249             Kito Cheng  <kito.cheng@gmail.com>
4250
4251         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
4252         (riscv_leaf_function_p): Delete.
4253         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
4254
4255 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
4256
4257         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
4258         function.
4259         (do_ifelse): New function.
4260         (do_isel): New function.
4261         (do_sub3): New function.
4262         (do_add3): New function.
4263         (do_load_mask_compare): New function.
4264         (do_overlap_load_compare): New function.
4265         (expand_compare_loop): New function.
4266         (expand_block_compare): Call expand_compare_loop() when appropriate.
4267         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
4268         option description.
4269         (-mblock-compare-inline-loop-limit): New option.
4270
4271 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
4272
4273         PR target/83677
4274         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
4275         Reverse order of second and third operands in first alternative.
4276         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
4277         of first and second elements in UNSPEC_VPERMR vector.
4278         (altivec_expand_vec_perm_le): Likewise.
4279
4280 2018-01-08  Jeff Law  <law@redhat.com>
4281
4282         PR rtl-optimizatin/81308
4283         * tree-switch-conversion.c (cfg_altered): New file scoped static.
4284         (process_switch): If group_case_labels makes a change, then set
4285         cfg_altered.
4286         (pass_convert_switch::execute): If a switch is converted, then
4287         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
4288
4289         PR rtl-optimization/81308
4290         * recog.c (split_all_insns): Conditionally cleanup the CFG after
4291         splitting insns.
4292
4293 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
4294
4295         PR target/83663 - Revert r255946
4296         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
4297         generation for cases where splatting a value is not useful.
4298         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
4299         across a vec_duplicate and a paradoxical subreg forming a vector
4300         mode to a vec_concat.
4301
4302 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
4303
4304         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
4305         -march=armv8.3-a variants.
4306         * config/arm/t-multilib: Likewise.
4307         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
4308
4309 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
4310
4311         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
4312         to generate rtl.
4313         (cceq_ior_compare_complement): Give it a name so I can use it, and
4314         change boolean_or_operator predicate to boolean_operator so it can
4315         be used to generate a crand.
4316         (eqne): New code iterator.
4317         (bd/bd_neg): New code_attrs.
4318         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
4319         a single define_insn.
4320         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
4321         decrement (bdnzt/bdnzf/bdzt/bdzf).
4322         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
4323         with the new names of the branch decrement patterns, and added the
4324         names of the branch decrement conditional patterns.
4325
4326 2018-01-08  Richard Biener  <rguenther@suse.de>
4327
4328         PR tree-optimization/83563
4329         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
4330         cache.
4331
4332 2018-01-08  Richard Biener  <rguenther@suse.de>
4333
4334         PR middle-end/83713
4335         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
4336
4337 2018-01-08  Richard Biener  <rguenther@suse.de>
4338
4339         PR tree-optimization/83685
4340         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
4341         references to abnormals.
4342
4343 2018-01-08  Richard Biener  <rguenther@suse.de>
4344
4345         PR lto/83719
4346         * dwarf2out.c (output_indirect_strings): Handle empty
4347         skeleton_debug_str_hash.
4348         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
4349
4350 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
4351
4352         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
4353         (emit_store_direct): Likewise.
4354         (arc_trampoline_adjust_address): Likewise.
4355         (arc_asm_trampoline_template): New function.
4356         (arc_initialize_trampoline): Use asm_trampoline_template.
4357         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
4358         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
4359         * config/arc/arc.md (flush_icache): Delete pattern.
4360
4361 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
4362
4363         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
4364         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
4365         munaligned-access.
4366
4367 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4368
4369         PR target/83681
4370         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
4371         by not USED_FOR_TARGET.
4372         (make_pass_resolve_sw_modes): Likewise.
4373
4374 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4375
4376         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
4377         USED_FOR_TARGET.
4378
4379 2018-01-08  Richard Biener  <rguenther@suse.de>
4380
4381         PR middle-end/83580
4382         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
4383
4384 2018-01-08  Richard Biener  <rguenther@suse.de>
4385
4386         PR middle-end/83517
4387         * match.pd ((t * 2) / 2) -> t): Add missing :c.
4388
4389 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
4390
4391         PR middle-end/81897
4392         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
4393         basic blocks with a small number of successors.
4394         (convert_control_dep_chain_into_preds): Improve handling of
4395         forwarder blocks.
4396         (dump_predicates): Split apart into...
4397         (dump_pred_chain): ...here...
4398         (dump_pred_info): ...and here.
4399         (can_one_predicate_be_invalidated_p): Add debugging printfs.
4400         (can_chain_union_be_invalidated_p): Improve check for invalidation
4401         of paths.
4402         (uninit_uses_cannot_happen): Avoid unnecessary if
4403         convert_control_dep_chain_into_preds yielded nothing.
4404
4405 2018-01-06  Martin Sebor  <msebor@redhat.com>
4406
4407         PR tree-optimization/83640
4408         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
4409         subtracting negative offset from size.
4410         (builtin_access::overlap): Adjust offset bounds of the access to fall
4411         within the size of the object if possible.
4412
4413 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
4414
4415         PR rtl-optimization/83699
4416         * expmed.c (extract_bit_field_1): Restrict the vector usage of
4417         extract_bit_field_as_subreg to cases in which the extracted
4418         value is also a vector.
4419
4420         * lra-constraints.c (process_alt_operands): Test for the equivalence
4421         substitutions when detecting a possible reload cycle.
4422
4423 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
4424
4425         PR debug/83480
4426         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
4427         by default if flag_selective_schedling{,2}.  Formatting fixes.
4428
4429         PR rtl-optimization/83682
4430         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
4431         if it has non-VECTOR_MODE element mode.
4432         (vec_duplicate_p): Likewise.
4433
4434         PR middle-end/83694
4435         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
4436         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
4437
4438 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
4439
4440         PR target/83604
4441         * config/i386/i386-builtin.def
4442         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
4443         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
4444         Require also OPTION_MASK_ISA_AVX512F in addition to
4445         OPTION_MASK_ISA_GFNI.
4446         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
4447         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
4448         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
4449         to OPTION_MASK_ISA_GFNI.
4450         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
4451         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
4452         OPTION_MASK_ISA_AVX512BW.
4453         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
4454         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
4455         addition to OPTION_MASK_ISA_GFNI.
4456         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
4457         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
4458         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
4459         to OPTION_MASK_ISA_GFNI.
4460         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
4461         a requirement for all ISAs rather than any of them with a few
4462         exceptions.
4463         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
4464         processing.
4465         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
4466         bitmasks to be enabled with 3 exceptions, instead of requiring any
4467         enabled ISA with lots of exceptions.
4468         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
4469         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
4470         Change avx512bw in isa attribute to avx512f.
4471         * config/i386/sgxintrin.h: Add license boilerplate.
4472         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
4473         to __AVX512F__ and __AVX512VL to __AVX512VL__.
4474         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
4475         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
4476         defined.
4477         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
4478         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
4479         temporarily sse2 rather than sse if not enabled already.
4480
4481         PR target/83604
4482         * config/i386/sse.md (VI248_VLBW): Rename to ...
4483         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
4484         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
4485         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
4486         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
4487         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
4488         mode iterator instead of VI248_VLBW.
4489
4490 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
4491
4492         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
4493         (record_modified): Skip clobbers; add debug output.
4494         (param_change_prob): Use sreal frequencies.
4495
4496 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
4497
4498         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
4499         punt for user-aligned variables.
4500
4501 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
4502
4503         * tree-chrec.c (chrec_contains_symbols): Return true for
4504         POLY_INT_CST.
4505
4506 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
4507
4508         PR target/82439
4509         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
4510         of (x|y) == x for BICS pattern.
4511
4512 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
4513
4514         PR tree-optimization/83605
4515         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
4516         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
4517         can throw.
4518
4519 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4520
4521         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
4522         * config/epiphany/rtems.h: New file.
4523
4524 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4525             Uros Bizjak  <ubizjak@gmail.com>
4526
4527         PR target/83554
4528         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
4529         QIreg_operand instead of register_operand predicate.
4530         * config/i386/i386.c (ix86_rop_should_change_byte_p,
4531         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
4532         comments instead of -fmitigate[-_]rop.
4533
4534 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
4535
4536         PR bootstrap/81926
4537         * cgraphunit.c (symbol_table::compile): Switch to text_section
4538         before calling assembly_start debug hook.
4539         * run-rtl-passes.c (run_rtl_passes): Likewise.
4540         Include output.h.
4541
4542 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4543
4544         * tree-vrp.c (extract_range_from_binary_expr_1): Check
4545         range_int_cst_p rather than !symbolic_range_p before calling
4546         extract_range_from_multiplicative_op_1.
4547
4548 2018-01-04  Jeff Law  <law@redhat.com>
4549
4550         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
4551         redundant test in assertion.
4552
4553 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4554
4555         * doc/rtl.texi: Document machine_mode wrapper classes.
4556
4557 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4558
4559         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
4560         using tree_to_uhwi.
4561
4562 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4563
4564         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
4565         the VEC_PERM_EXPR fold to fail.
4566
4567 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4568
4569         PR debug/83585
4570         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
4571         to switched_sections.
4572
4573 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4574
4575         PR target/83680
4576         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
4577         test for d.testing.
4578
4579 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
4580
4581         PR target/83387
4582         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
4583         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
4584
4585 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4586
4587         PR debug/83666
4588         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
4589         is BLKmode and bitpos not zero or mode change is needed.
4590
4591 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4592
4593         PR target/83675
4594         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
4595         TARGET_VIS2.
4596
4597 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
4598
4599         PR target/83628
4600         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
4601         instead of MULT rtx.  Update all corresponding splitters.
4602         (*saddl_se): Ditto.
4603         (*ssub<modesuffix>): Ditto.
4604         (*ssubl_se): Ditto.
4605         (*cmp_sadd_di): Update split patterns.
4606         (*cmp_sadd_si): Ditto.
4607         (*cmp_sadd_sidi): Ditto.
4608         (*cmp_ssub_di): Ditto.
4609         (*cmp_ssub_si): Ditto.
4610         (*cmp_ssub_sidi): Ditto.
4611         * config/alpha/predicates.md (const23_operand): New predicate.
4612         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
4613         Look for ASHIFT, not MULT inner operand.
4614         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
4615
4616 2018-01-04  Martin Liska  <mliska@suse.cz>
4617
4618         PR gcov-profile/83669
4619         * gcov.c (output_intermediate_file): Add version to intermediate
4620         gcov file.
4621         * doc/gcov.texi: Document new field 'version' in intermediate
4622         file format. Fix location of '-k' option of gcov command.
4623
4624 2018-01-04  Martin Liska  <mliska@suse.cz>
4625
4626         PR ipa/82352
4627         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
4628
4629 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4630
4631         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
4632
4633 2018-01-03  Martin Sebor  <msebor@redhat.com>
4634
4635         PR tree-optimization/83655
4636         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
4637         checking calls with invalid arguments.
4638
4639 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4640
4641         * tree-vect-stmts.c (vect_get_store_rhs): New function.
4642         (vectorizable_mask_load_store): Delete.
4643         (vectorizable_call): Return false for masked loads and stores.
4644         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
4645         instead of gimple_assign_rhs1.
4646         (vectorizable_load): Handle IFN_MASK_LOAD.
4647         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
4648
4649 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4650
4651         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
4652         split out from..,
4653         (vectorizable_mask_load_store): ...here.
4654         (vectorizable_load): ...and here.
4655
4656 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4657
4658         * tree-vect-stmts.c (vect_build_all_ones_mask)
4659         (vect_build_zero_merge_argument): New functions, split out from...
4660         (vectorizable_load): ...here.
4661
4662 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4663
4664         * tree-vect-stmts.c (vect_check_store_rhs): New function,
4665         split out from...
4666         (vectorizable_mask_load_store): ...here.
4667         (vectorizable_store): ...and here.
4668
4669 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4670
4671         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
4672         split out from...
4673         (vectorizable_mask_load_store): ...here.
4674
4675 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4676
4677         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
4678         (vect_model_store_cost): Take a vec_load_store_type instead of a
4679         vect_def_type.
4680         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
4681         (vect_model_store_cost): Take a vec_load_store_type instead of a
4682         vect_def_type.
4683         (vectorizable_mask_load_store): Update accordingly.
4684         (vectorizable_store): Likewise.
4685         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
4686
4687 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4688
4689         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
4690         IFN_MASK_LOAD calls here rather than...
4691         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
4692
4693 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4694             Alan Hayward  <alan.hayward@arm.com>
4695             David Sherwood  <david.sherwood@arm.com>
4696
4697         * expmed.c (extract_bit_field_1): For vector extracts,
4698         fall back to extract_bit_field_as_subreg if vec_extract
4699         isn't available.
4700
4701 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4702             Alan Hayward  <alan.hayward@arm.com>
4703             David Sherwood  <david.sherwood@arm.com>
4704
4705         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
4706         they are variable or constant sized.
4707         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
4708         slots for constant-sized data.
4709
4710 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4711             Alan Hayward  <alan.hayward@arm.com>
4712             David Sherwood  <david.sherwood@arm.com>
4713
4714         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
4715         handling COND_EXPRs with boolean comparisons, try to find a better
4716         basis for the mask type than the boolean itself.
4717
4718 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4719
4720         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
4721         is calculated and how it can be overridden.
4722         * genmodes.c (max_bitsize_mode_any_mode): New variable.
4723         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
4724         if defined.
4725         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
4726         if nonzero.
4727
4728 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4729             Alan Hayward  <alan.hayward@arm.com>
4730             David Sherwood  <david.sherwood@arm.com>
4731
4732         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
4733         Remove the mode argument.
4734         (aarch64_simd_valid_immediate): Remove the mode and inverse
4735         arguments.
4736         * config/aarch64/iterators.md (bitsize): New iterator.
4737         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
4738         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
4739         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
4740         aarch64_simd_valid_immediate.
4741         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
4742         (aarch64_reg_or_bic_imm): Likewise.
4743         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
4744         with an insn_type enum and msl with a modifier_type enum.
4745         Replace element_width with a scalar_mode.  Change the shift
4746         to unsigned int.  Add constructors for scalar_float_mode and
4747         scalar_int_mode elements.
4748         (aarch64_vect_float_const_representable_p): Delete.
4749         (aarch64_can_const_movi_rtx_p)
4750         (aarch64_simd_scalar_immediate_valid_for_move)
4751         (aarch64_simd_make_constant): Update call to
4752         aarch64_simd_valid_immediate.
4753         (aarch64_advsimd_valid_immediate_hs): New function.
4754         (aarch64_advsimd_valid_immediate): Likewise.
4755         (aarch64_simd_valid_immediate): Remove mode and inverse
4756         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
4757         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
4758         and aarch64_float_const_representable_p on the result.
4759         (aarch64_output_simd_mov_immediate): Remove mode argument.
4760         Update call to aarch64_simd_valid_immediate and use of
4761         simd_immediate_info.
4762         (aarch64_output_scalar_simd_mov_immediate): Update call
4763         accordingly.
4764
4765 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4766             Alan Hayward  <alan.hayward@arm.com>
4767             David Sherwood  <david.sherwood@arm.com>
4768
4769         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
4770         (mode_nunits): Likewise CONST_MODE_NUNITS.
4771         * machmode.def (ADJUST_NUNITS): Document.
4772         * genmodes.c (mode_data::need_nunits_adj): New field.
4773         (blank_mode): Update accordingly.
4774         (adj_nunits): New variable.
4775         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
4776         parameter.
4777         (emit_mode_size_inline): Set need_bytesize_adj for all modes
4778         listed in adj_nunits.
4779         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
4780         listed in adj_nunits.  Don't emit case statements for such modes.
4781         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
4782         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
4783         nothing if adj_nunits is nonnull.
4784         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
4785         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
4786         (emit_mode_fbit): Update use of print_maybe_const_decl.
4787         (emit_move_size): Likewise.  Treat the array as non-const
4788         if adj_nunits.
4789         (emit_mode_adjustments): Handle adj_nunits.
4790
4791 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4792
4793         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
4794         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
4795         (VECTOR_MODES): Use it.
4796         (make_vector_modes): Take the prefix as an argument.
4797
4798 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4799             Alan Hayward  <alan.hayward@arm.com>
4800             David Sherwood  <david.sherwood@arm.com>
4801
4802         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
4803         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
4804         for MODE_VECTOR_BOOL.
4805         * machmode.def (VECTOR_BOOL_MODE): Document.
4806         * genmodes.c (VECTOR_BOOL_MODE): New macro.
4807         (make_vector_bool_mode): New function.
4808         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
4809         MODE_VECTOR_BOOL.
4810         * lto-streamer-in.c (lto_input_mode_table): Likewise.
4811         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
4812         Likewise.
4813         * stor-layout.c (int_mode_for_mode): Likewise.
4814         * tree.c (build_vector_type_for_mode): Likewise.
4815         * varasm.c (output_constant_pool_2): Likewise.
4816         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
4817         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
4818         for MODE_VECTOR_BOOL.
4819         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
4820         of mode class checks.
4821         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
4822         instead of a list of mode class checks.
4823         (expand_vector_scalar_condition): Likewise.
4824         (type_for_widest_vector_mode): Handle BImode as an inner mode.
4825
4826 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4827             Alan Hayward  <alan.hayward@arm.com>
4828             David Sherwood  <david.sherwood@arm.com>
4829
4830         * machmode.h (mode_size): Change from unsigned short to
4831         poly_uint16_pod.
4832         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
4833         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4834         or if measurement_type is not polynomial.
4835         (fixed_size_mode::includes_p): Check for constant-sized modes.
4836         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
4837         return a poly_uint16 rather than an unsigned short.
4838         (emit_mode_size): Change the type of mode_size from unsigned short
4839         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
4840         (emit_mode_adjustments): Cope with polynomial vector sizes.
4841         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4842         for GET_MODE_SIZE.
4843         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4844         for GET_MODE_SIZE.
4845         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
4846         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
4847         * caller-save.c (setup_save_areas): Likewise.
4848         (replace_reg_with_saved_mem): Likewise.
4849         * calls.c (emit_library_call_value_1): Likewise.
4850         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
4851         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
4852         (gen_lowpart_for_combine): Likewise.
4853         * convert.c (convert_to_integer_1): Likewise.
4854         * cse.c (equiv_constant, cse_insn): Likewise.
4855         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
4856         (cselib_subst_to_values): Likewise.
4857         * dce.c (word_dce_process_block): Likewise.
4858         * df-problems.c (df_word_lr_mark_ref): Likewise.
4859         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
4860         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
4861         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
4862         (rtl_for_decl_location): Likewise.
4863         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
4864         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
4865         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
4866         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
4867         (expand_expr_real_1): Likewise.
4868         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
4869         (pad_below): Likewise.
4870         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4871         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
4872         * ira.c (get_subreg_tracking_sizes): Likewise.
4873         * ira-build.c (ira_create_allocno_objects): Likewise.
4874         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
4875         (ira_sort_regnos_for_alter_reg): Likewise.
4876         * ira-costs.c (record_operand_costs): Likewise.
4877         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
4878         (resolve_simple_move): Likewise.
4879         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
4880         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
4881         (lra_constraints): Likewise.
4882         (CONST_POOL_OK_P): Reject variable-sized modes.
4883         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
4884         (add_pseudo_to_slot, lra_spill): Likewise.
4885         * omp-low.c (omp_clause_aligned_alignment): Likewise.
4886         * optabs-query.c (get_best_extraction_insn): Likewise.
4887         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4888         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
4889         (expand_mult_highpart, valid_multiword_target_p): Likewise.
4890         * recog.c (offsettable_address_addr_space_p): Likewise.
4891         * regcprop.c (maybe_mode_change): Likewise.
4892         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
4893         * regrename.c (build_def_use): Likewise.
4894         * regstat.c (dump_reg_info): Likewise.
4895         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
4896         (find_reloads, find_reloads_subreg_address): Likewise.
4897         * reload1.c (eliminate_regs_1): Likewise.
4898         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
4899         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
4900         (simplify_binary_operation_1, simplify_subreg): Likewise.
4901         * targhooks.c (default_function_arg_padding): Likewise.
4902         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
4903         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
4904         (verify_gimple_assign_ternary): Likewise.
4905         * tree-inline.c (estimate_move_cost): Likewise.
4906         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4907         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
4908         (get_address_cost_ainc): Likewise.
4909         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
4910         (vect_supportable_dr_alignment): Likewise.
4911         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4912         (vectorizable_reduction): Likewise.
4913         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
4914         (vectorizable_operation, vectorizable_load): Likewise.
4915         * tree.c (build_same_sized_truth_vector_type): Likewise.
4916         * valtrack.c (cleanup_auto_inc_dec): Likewise.
4917         * var-tracking.c (emit_note_insn_var_location): Likewise.
4918         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
4919         (ADDR_VEC_ALIGN): Likewise.
4920
4921 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4922             Alan Hayward  <alan.hayward@arm.com>
4923             David Sherwood  <david.sherwood@arm.com>
4924
4925         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
4926         unsigned short.
4927         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4928         or if measurement_type is polynomial.
4929         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
4930         * combine.c (make_extraction): Likewise.
4931         * dse.c (find_shift_sequence): Likewise.
4932         * dwarf2out.c (mem_loc_descriptor): Likewise.
4933         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
4934         (extract_bit_field, extract_low_bits): Likewise.
4935         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
4936         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
4937         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
4938         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
4939         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4940         * reload.c (find_reloads): Likewise.
4941         * reload1.c (alter_reg): Likewise.
4942         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
4943         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
4944         * tree-if-conv.c (predicate_mem_writes): Likewise.
4945         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
4946         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
4947         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
4948         * valtrack.c (dead_debug_insert_temp): Likewise.
4949         * varasm.c (mergeable_constant_section): Likewise.
4950         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
4951
4952 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4953             Alan Hayward  <alan.hayward@arm.com>
4954             David Sherwood  <david.sherwood@arm.com>
4955
4956         * expr.c (expand_assignment): Cope with polynomial mode sizes
4957         when assigning to a CONCAT.
4958
4959 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4960             Alan Hayward  <alan.hayward@arm.com>
4961             David Sherwood  <david.sherwood@arm.com>
4962
4963         * machmode.h (mode_precision): Change from unsigned short to
4964         poly_uint16_pod.
4965         (mode_to_precision): Return a poly_uint16 rather than an unsigned
4966         short.
4967         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
4968         or if measurement_type is not polynomial.
4969         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
4970         in which the mode is already known to be a scalar_int_mode.
4971         * genmodes.c (emit_mode_precision): Change the type of mode_precision
4972         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
4973         initializer.
4974         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4975         for GET_MODE_PRECISION.
4976         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4977         for GET_MODE_PRECISION.
4978         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
4979         as polynomial.
4980         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
4981         (expand_field_assignment, make_extraction): Likewise.
4982         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
4983         (get_last_value): Likewise.
4984         * convert.c (convert_to_integer_1): Likewise.
4985         * cse.c (cse_insn): Likewise.
4986         * expr.c (expand_expr_real_1): Likewise.
4987         * lra-constraints.c (simplify_operand_subreg): Likewise.
4988         * optabs-query.c (can_atomic_load_p): Likewise.
4989         * optabs.c (expand_atomic_load): Likewise.
4990         (expand_atomic_store): Likewise.
4991         * ree.c (combine_reaching_defs): Likewise.
4992         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
4993         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
4994         * tree.h (type_has_mode_precision_p): Likewise.
4995         * ubsan.c (instrument_si_overflow): Likewise.
4996
4997 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4998             Alan Hayward  <alan.hayward@arm.com>
4999             David Sherwood  <david.sherwood@arm.com>
5000
5001         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
5002         polynomial numbers of units.
5003         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
5004         (valid_vector_subparts_p): New function.
5005         (build_vector_type): Remove temporary shim and take the number
5006         of units as a poly_uint64 rather than an int.
5007         (build_opaque_vector_type): Take the number of units as a
5008         poly_uint64 rather than an int.
5009         * tree.c (build_vector_from_ctor): Handle polynomial
5010         TYPE_VECTOR_SUBPARTS.
5011         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
5012         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
5013         (build_vector_from_val): If the number of units is variable,
5014         use build_vec_duplicate_cst for constant operands and
5015         VEC_DUPLICATE_EXPR otherwise.
5016         (make_vector_type): Remove temporary is_constant ().
5017         (build_vector_type, build_opaque_vector_type): Take the number of
5018         units as a poly_uint64 rather than an int.
5019         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
5020         VECTOR_CST_NELTS.
5021         * cfgexpand.c (expand_debug_expr): Likewise.
5022         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
5023         (store_constructor, expand_expr_real_1): Likewise.
5024         (const_scalar_mask_from_tree): Likewise.
5025         * fold-const-call.c (fold_const_reduction): Likewise.
5026         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
5027         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
5028         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
5029         (fold_relational_const): Likewise.
5030         (native_interpret_vector): Likewise.  Change the size from an
5031         int to an unsigned int.
5032         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
5033         TYPE_VECTOR_SUBPARTS.
5034         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
5035         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
5036         duplicating a non-constant operand into a variable-length vector.
5037         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
5038         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
5039         * ipa-icf.c (sem_variable::equals): Likewise.
5040         * match.pd: Likewise.
5041         * omp-simd-clone.c (simd_clone_subparts): Likewise.
5042         * print-tree.c (print_node): Likewise.
5043         * stor-layout.c (layout_type): Likewise.
5044         * targhooks.c (default_builtin_vectorization_cost): Likewise.
5045         * tree-cfg.c (verify_gimple_comparison): Likewise.
5046         (verify_gimple_assign_binary): Likewise.
5047         (verify_gimple_assign_ternary): Likewise.
5048         (verify_gimple_assign_single): Likewise.
5049         * tree-pretty-print.c (dump_generic_node): Likewise.
5050         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5051         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
5052         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
5053         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
5054         (vect_shift_permute_load_chain): Likewise.
5055         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
5056         (expand_vector_condition, optimize_vector_constructor): Likewise.
5057         (lower_vec_perm, get_compute_type): Likewise.
5058         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
5059         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
5060         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
5061         (vect_recog_mask_conversion_pattern): Likewise.
5062         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
5063         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
5064         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5065         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
5066         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
5067         (vectorizable_shift, vectorizable_operation, vectorizable_store)
5068         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
5069         (supportable_widening_operation): Likewise.
5070         (supportable_narrowing_operation): Likewise.
5071         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
5072         Likewise.
5073         * varasm.c (output_constant): Likewise.
5074
5075 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5076             Alan Hayward  <alan.hayward@arm.com>
5077             David Sherwood  <david.sherwood@arm.com>
5078
5079         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
5080         so that both the length == 3 and length != 3 cases set up their
5081         own permute vectors.  Add comments explaining why we know the
5082         number of elements is constant.
5083         (vect_permute_load_chain): Likewise.
5084
5085 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5086             Alan Hayward  <alan.hayward@arm.com>
5087             David Sherwood  <david.sherwood@arm.com>
5088
5089         * machmode.h (mode_nunits): Change from unsigned char to
5090         poly_uint16_pod.
5091         (ONLY_FIXED_SIZE_MODES): New macro.
5092         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
5093         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
5094         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
5095         New typedefs.
5096         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
5097         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
5098         or if measurement_type is not polynomial.
5099         * genmodes.c (ZERO_COEFFS): New macro.
5100         (emit_mode_nunits_inline): Make mode_nunits_inline return a
5101         poly_uint16.
5102         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
5103         Use ZERO_COEFFS when emitting initializers.
5104         * data-streamer.h (bp_pack_poly_value): New function.
5105         (bp_unpack_poly_value): Likewise.
5106         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
5107         for GET_MODE_NUNITS.
5108         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
5109         for GET_MODE_NUNITS.
5110         * tree.c (make_vector_type): Remove temporary shim and make
5111         the real function take the number of units as a poly_uint64
5112         rather than an int.
5113         (build_vector_type_for_mode): Handle polynomial nunits.
5114         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
5115         * emit-rtl.c (const_vec_series_p_1): Likewise.
5116         (gen_rtx_CONST_VECTOR): Likewise.
5117         * fold-const.c (test_vec_duplicate_folding): Likewise.
5118         * genrecog.c (validate_pattern): Likewise.
5119         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
5120         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
5121         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
5122         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
5123         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
5124         * rtlanal.c (subreg_get_info): Likewise.
5125         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5126         (vect_grouped_load_supported): Likewise.
5127         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
5128         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
5129         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
5130         (simplify_const_unary_operation, simplify_binary_operation_1)
5131         (simplify_const_binary_operation, simplify_ternary_operation)
5132         (test_vector_ops_duplicate, test_vector_ops): Likewise.
5133         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
5134         instead of CONST_VECTOR_NUNITS.
5135         * varasm.c (output_constant_pool_2): Likewise.
5136         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
5137         explicit-encoded elements in the XVEC for variable-length vectors.
5138
5139 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5140
5141         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
5142
5143 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5144             Alan Hayward  <alan.hayward@arm.com>
5145             David Sherwood  <david.sherwood@arm.com>
5146
5147         * coretypes.h (fixed_size_mode): Declare.
5148         (fixed_size_mode_pod): New typedef.
5149         * builtins.h (target_builtins::x_apply_args_mode)
5150         (target_builtins::x_apply_result_mode): Change type to
5151         fixed_size_mode_pod.
5152         * builtins.c (apply_args_size, apply_result_size, result_vector)
5153         (expand_builtin_apply_args_1, expand_builtin_apply)
5154         (expand_builtin_return): Update accordingly.
5155
5156 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5157
5158         * cse.c (hash_rtx_cb): Hash only the encoded elements.
5159         * cselib.c (cselib_hash_rtx): Likewise.
5160         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
5161         CONST_VECTOR encoding.
5162
5163 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
5164             Jeff Law  <law@redhat.com>
5165
5166         PR target/83641
5167         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
5168         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
5169         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
5170         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
5171
5172         PR target/83641
5173         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
5174         explicitly probe *sp in a noreturn function if there were any callee
5175         register saves or frame pointer is needed.
5176
5177 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
5178
5179         PR debug/83621
5180         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
5181         BLKmode for ternary, binary or unary expressions.
5182
5183         PR debug/83645
5184         * var-tracking.c (delete_vta_debug_insn): New inline function.
5185         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
5186         insns from get_insns () to NULL instead of each bb separately.
5187         Use delete_vta_debug_insn.  No longer static.
5188         (vt_debug_insns_local, variable_tracking_main_1): Adjust
5189         delete_vta_debug_insns callers.
5190         * rtl.h (delete_vta_debug_insns): Declare.
5191         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
5192         instead of variable_tracking_main.
5193
5194 2018-01-03  Martin Sebor  <msebor@redhat.com>
5195
5196         PR tree-optimization/83603
5197         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
5198         arguments past the endof the argument list in functions declared
5199         without a prototype.
5200         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
5201         Avoid checking when arguments are null.
5202
5203 2018-01-03  Martin Sebor  <msebor@redhat.com>
5204
5205         PR c/83559
5206         * doc/extend.texi (attribute const): Fix a typo.
5207         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
5208         issuing -Wsuggest-attribute for void functions.
5209
5210 2018-01-03  Martin Sebor  <msebor@redhat.com>
5211
5212         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
5213         offset_int::from instead of wide_int::to_shwi.
5214         (maybe_diag_overlap): Remove assertion.
5215         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
5216         * gimple-ssa-sprintf.c (format_directive): Same.
5217         (parse_directive): Same.
5218         (sprintf_dom_walker::compute_format_length): Same.
5219         (try_substitute_return_value): Same.
5220
5221 2018-01-03  Jeff Law  <law@redhat.com>
5222
5223         PR middle-end/83654
5224         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
5225         non-constant residual for zero at runtime and avoid probing in
5226         that case.  Reorganize code for trailing problem to mirror handling
5227         of the residual.
5228
5229 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
5230
5231         PR tree-optimization/83501
5232         * tree-ssa-strlen.c (get_string_cst): New.
5233         (handle_char_store): Call get_string_cst.
5234
5235 2018-01-03  Martin Liska  <mliska@suse.cz>
5236
5237         PR tree-optimization/83593
5238         * tree-ssa-strlen.c: Include tree-cfg.h.
5239         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
5240         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
5241         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
5242         to false.
5243         (strlen_dom_walker::before_dom_children): Call
5244         gimple_purge_dead_eh_edges. Dump tranformation with details
5245         dump flags.
5246         (strlen_dom_walker::before_dom_children): Update call by adding
5247         new argument cleanup_eh.
5248         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
5249
5250 2018-01-03  Martin Liska  <mliska@suse.cz>
5251
5252         PR ipa/83549
5253         * cif-code.def (VARIADIC_THUNK): New enum value.
5254         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
5255         thunks.
5256
5257 2018-01-03  Jan Beulich  <jbeulich@suse.com>
5258
5259         * sse.md (mov<mode>_internal): Tighten condition for when to use
5260         vmovdqu<ssescalarsize> for TI and OI modes.
5261
5262 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
5263
5264         Update copyright years.
5265
5266 2018-01-03  Martin Liska  <mliska@suse.cz>
5267
5268         PR ipa/83594
5269         * ipa-visibility.c (function_and_variable_visibility): Skip
5270         functions with noipa attribure.
5271
5272 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
5273
5274         * gcc.c (process_command): Update copyright notice dates.
5275         * gcov-dump.c (print_version): Ditto.
5276         * gcov.c (print_version): Ditto.
5277         * gcov-tool.c (print_version): Ditto.
5278         * gengtype.c (create_file): Ditto.
5279         * doc/cpp.texi: Bump @copying's copyright year.
5280         * doc/cppinternals.texi: Ditto.
5281         * doc/gcc.texi: Ditto.
5282         * doc/gccint.texi: Ditto.
5283         * doc/gcov.texi: Ditto.
5284         * doc/install.texi: Ditto.
5285         * doc/invoke.texi: Ditto.
5286
5287 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5288
5289         * vector-builder.h (vector_builder::m_full_nelts): Change from
5290         unsigned int to poly_uint64.
5291         (vector_builder::full_nelts): Update prototype accordingly.
5292         (vector_builder::new_vector): Likewise.
5293         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
5294         (vector_builder::operator ==): Likewise.
5295         (vector_builder::finalize): Likewise.
5296         * int-vector-builder.h (int_vector_builder::int_vector_builder):
5297         Take the number of elements as a poly_uint64 rather than an
5298         unsigned int.
5299         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
5300         from unsigned int to poly_uint64.
5301         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
5302         (vec_perm_indices::new_vector): Likewise.
5303         (vec_perm_indices::length): Likewise.
5304         (vec_perm_indices::nelts_per_input): Likewise.
5305         (vec_perm_indices::input_nelts): Likewise.
5306         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
5307         number of elements per input as a poly_uint64 rather than an
5308         unsigned int.  Use the original encoding for variable-length
5309         vectors, rather than clamping each individual element.
5310         For the second and subsequent elements in each pattern,
5311         clamp the step and base before clamping their sum.
5312         (vec_perm_indices::series_p): Handle polynomial element counts.
5313         (vec_perm_indices::all_in_range_p): Likewise.
5314         (vec_perm_indices_to_tree): Likewise.
5315         (vec_perm_indices_to_rtx): Likewise.
5316         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
5317         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
5318         (tree_vector_builder::new_binary_operation): Handle polynomial
5319         element counts.  Return false if we need to know the number
5320         of elements at compile time.
5321         * fold-const.c (fold_vec_perm): Punt if the number of elements
5322         isn't known at compile time.
5323
5324 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5325
5326         * vec-perm-indices.h (vec_perm_builder): Change element type
5327         from HOST_WIDE_INT to poly_int64.
5328         (vec_perm_indices::element_type): Update accordingly.
5329         (vec_perm_indices::clamp): Handle polynomial element_types.
5330         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5331         (vec_perm_indices::all_in_range_p): Likewise.
5332         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
5333         than shwi trees.
5334         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
5335         polynomial vec_perm_indices element types.
5336         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
5337         * fold-const.c (fold_vec_perm): Likewise.
5338         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
5339         * tree-vect-generic.c (lower_vec_perm): Likewise.
5340         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5341         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
5342         element type to HOST_WIDE_INT.
5343
5344 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5345             Alan Hayward  <alan.hayward@arm.com>
5346             David Sherwood  <david.sherwood@arm.com>
5347
5348         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
5349         rather than an int.  Use plus_constant.
5350         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
5351         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
5352
5353 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5354             Alan Hayward  <alan.hayward@arm.com>
5355             David Sherwood  <david.sherwood@arm.com>
5356
5357         * calls.c (emit_call_1, expand_call): Change struct_value_size from
5358         a HOST_WIDE_INT to a poly_int64.
5359
5360 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5361             Alan Hayward  <alan.hayward@arm.com>
5362             David Sherwood  <david.sherwood@arm.com>
5363
5364         * calls.c (load_register_parameters): Cope with polynomial
5365         mode sizes.  Require a constant size for BLKmode parameters
5366         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
5367         forces a parameter to be padded at the lsb end in order to
5368         fill a complete number of words, require the parameter size
5369         to be ordered wrt UNITS_PER_WORD.
5370
5371 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5372             Alan Hayward  <alan.hayward@arm.com>
5373             David Sherwood  <david.sherwood@arm.com>
5374
5375         * reload1.c (spill_stack_slot_width): Change element type
5376         from unsigned int to poly_uint64_pod.
5377         (alter_reg): Treat mode sizes as polynomial.
5378
5379 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5380             Alan Hayward  <alan.hayward@arm.com>
5381             David Sherwood  <david.sherwood@arm.com>
5382
5383         * reload.c (complex_word_subreg_p): New function.
5384         (reload_inner_reg_of_subreg, push_reload): Use it.
5385
5386 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5387             Alan Hayward  <alan.hayward@arm.com>
5388             David Sherwood  <david.sherwood@arm.com>
5389
5390         * lra-constraints.c (process_alt_operands): Reject matched
5391         operands whose sizes aren't ordered.
5392         (match_reload): Refer to this check here.
5393
5394 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5395             Alan Hayward  <alan.hayward@arm.com>
5396             David Sherwood  <david.sherwood@arm.com>
5397
5398         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
5399         that the mode size is in the set {1, 2, 4, 8, 16}.
5400
5401 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5402             Alan Hayward  <alan.hayward@arm.com>
5403             David Sherwood  <david.sherwood@arm.com>
5404
5405         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
5406         Use plus_constant instead of gen_rtx_PLUS.
5407
5408 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5409             Alan Hayward  <alan.hayward@arm.com>
5410             David Sherwood  <david.sherwood@arm.com>
5411
5412         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
5413         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
5414         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
5415         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
5416         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
5417         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
5418         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
5419         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
5420         * config/i386/i386.c (ix86_push_rounding): ...this new function.
5421         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
5422         a poly_int64.
5423         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
5424         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
5425         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
5426         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
5427         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
5428         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
5429         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
5430         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
5431         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
5432         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
5433         function.
5434         * expr.c (emit_move_resolve_push): Treat the input and result
5435         of PUSH_ROUNDING as a poly_int64.
5436         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
5437         (emit_push_insn): Likewise.
5438         * lra-eliminations.c (mark_not_eliminable): Likewise.
5439         * recog.c (push_operand): Likewise.
5440         * reload1.c (elimination_effects): Likewise.
5441         * rtlanal.c (nonzero_bits1): Likewise.
5442         * calls.c (store_one_arg): Likewise.  Require the padding to be
5443         known at compile time.
5444
5445 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5446             Alan Hayward  <alan.hayward@arm.com>
5447             David Sherwood  <david.sherwood@arm.com>
5448
5449         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
5450         Use plus_constant instead of gen_rtx_PLUS.
5451
5452 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5453             Alan Hayward  <alan.hayward@arm.com>
5454             David Sherwood  <david.sherwood@arm.com>
5455
5456         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
5457         rather than an int.
5458
5459 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5460             Alan Hayward  <alan.hayward@arm.com>
5461             David Sherwood  <david.sherwood@arm.com>
5462
5463         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
5464         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
5465         via stack temporaries.  Treat the mode size as polynomial too.
5466
5467 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5468             Alan Hayward  <alan.hayward@arm.com>
5469             David Sherwood  <david.sherwood@arm.com>
5470
5471         * expr.c (expand_expr_real_2): When handling conversions involving
5472         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
5473         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
5474         as a poly_uint64 too.
5475
5476 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5477             Alan Hayward  <alan.hayward@arm.com>
5478             David Sherwood  <david.sherwood@arm.com>
5479
5480         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
5481
5482 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5483             Alan Hayward  <alan.hayward@arm.com>
5484             David Sherwood  <david.sherwood@arm.com>
5485
5486         * combine.c (can_change_dest_mode): Handle polynomial
5487         REGMODE_NATURAL_SIZE.
5488         * expmed.c (store_bit_field_1): Likewise.
5489         * expr.c (store_constructor): Likewise.
5490         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
5491         and polynomial REGMODE_NATURAL_SIZE.
5492         (gen_lowpart_common): Likewise.
5493         * reginfo.c (record_subregs_of_mode): Likewise.
5494         * rtlanal.c (read_modify_subreg_p): Likewise.
5495
5496 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5497             Alan Hayward  <alan.hayward@arm.com>
5498             David Sherwood  <david.sherwood@arm.com>
5499
5500         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
5501         numbers of elements.
5502
5503 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5504             Alan Hayward  <alan.hayward@arm.com>
5505             David Sherwood  <david.sherwood@arm.com>
5506
5507         * match.pd: Cope with polynomial numbers of vector elements.
5508
5509 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5510             Alan Hayward  <alan.hayward@arm.com>
5511             David Sherwood  <david.sherwood@arm.com>
5512
5513         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
5514         in a POINTER_PLUS_EXPR.
5515
5516 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5517             Alan Hayward  <alan.hayward@arm.com>
5518             David Sherwood  <david.sherwood@arm.com>
5519
5520         * omp-simd-clone.c (simd_clone_subparts): New function.
5521         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
5522         (ipa_simd_modify_function_body): Likewise.
5523
5524 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5525             Alan Hayward  <alan.hayward@arm.com>
5526             David Sherwood  <david.sherwood@arm.com>
5527
5528         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
5529         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
5530         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
5531         (expand_vector_condition, vector_element): Likewise.
5532         (subparts_gt): New function.
5533         (get_compute_type): Use subparts_gt.
5534         (count_type_subparts): Delete.
5535         (expand_vector_operations_1): Use subparts_gt instead of
5536         count_type_subparts.
5537
5538 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5539             Alan Hayward  <alan.hayward@arm.com>
5540             David Sherwood  <david.sherwood@arm.com>
5541
5542         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
5543         (vect_compile_time_alias): ...this new function.  Do the calculation
5544         on poly_ints rather than trees.
5545         (vect_prune_runtime_alias_test_list): Update call accordingly.
5546
5547 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5548             Alan Hayward  <alan.hayward@arm.com>
5549             David Sherwood  <david.sherwood@arm.com>
5550
5551         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
5552         numbers of units.
5553         (vect_schedule_slp_instance): Likewise.
5554
5555 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5556             Alan Hayward  <alan.hayward@arm.com>
5557             David Sherwood  <david.sherwood@arm.com>
5558
5559         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
5560         constant and extern definitions for variable-length vectors.
5561         (vect_get_constant_vectors): Note that the number of units
5562         is known to be constant.
5563
5564 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5565             Alan Hayward  <alan.hayward@arm.com>
5566             David Sherwood  <david.sherwood@arm.com>
5567
5568         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
5569         of units as polynomial.  Choose between WIDE and NARROW based
5570         on multiple_p.
5571
5572 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5573             Alan Hayward  <alan.hayward@arm.com>
5574             David Sherwood  <david.sherwood@arm.com>
5575
5576         * tree-vect-stmts.c (simd_clone_subparts): New function.
5577         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
5578
5579 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5580             Alan Hayward  <alan.hayward@arm.com>
5581             David Sherwood  <david.sherwood@arm.com>
5582
5583         * tree-vect-stmts.c (vectorizable_call): Treat the number of
5584         vectors as polynomial.  Use build_index_vector for
5585         IFN_GOMP_SIMD_LANE.
5586
5587 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5588             Alan Hayward  <alan.hayward@arm.com>
5589             David Sherwood  <david.sherwood@arm.com>
5590
5591         * tree-vect-stmts.c (get_load_store_type): Treat the number of
5592         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
5593         for variable-length vectors.
5594         (vectorizable_mask_load_store): Treat the number of units as
5595         polynomial, asserting that it is constant if the condition has
5596         already been enforced.
5597         (vectorizable_store, vectorizable_load): Likewise.
5598
5599 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5600             Alan Hayward  <alan.hayward@arm.com>
5601             David Sherwood  <david.sherwood@arm.com>
5602
5603         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
5604         of units as polynomial.  Punt if we can't tell at compile time
5605         which vector contains the final result.
5606
5607 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5608             Alan Hayward  <alan.hayward@arm.com>
5609             David Sherwood  <david.sherwood@arm.com>
5610
5611         * tree-vect-loop.c (vectorizable_induction): Treat the number
5612         of units as polynomial.  Punt on SLP inductions.  Use an integer
5613         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
5614         cast of such a series for variable-length floating-point
5615         reductions.
5616
5617 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5618             Alan Hayward  <alan.hayward@arm.com>
5619             David Sherwood  <david.sherwood@arm.com>
5620
5621         * tree.h (build_index_vector): Declare.
5622         * tree.c (build_index_vector): New function.
5623         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
5624         of units as polynomial, forcibly converting it to a constant if
5625         vectorizable_reduction has already enforced the condition.
5626         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
5627         to create a {1,2,3,...} vector.
5628         (vectorizable_reduction): Treat the number of units as polynomial.
5629         Choose vectype_in based on the largest scalar element size rather
5630         than the smallest number of units.  Enforce the restrictions
5631         relied on above.
5632
5633 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5634             Alan Hayward  <alan.hayward@arm.com>
5635             David Sherwood  <david.sherwood@arm.com>
5636
5637         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
5638         number of units as polynomial.
5639
5640 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5641             Alan Hayward  <alan.hayward@arm.com>
5642             David Sherwood  <david.sherwood@arm.com>
5643
5644         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
5645         * target.def (autovectorize_vector_sizes): Return the vector sizes
5646         by pointer, using vector_sizes rather than a bitmask.
5647         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
5648         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
5649         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
5650         Likewise.
5651         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
5652         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
5653         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
5654         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
5655         * omp-general.c (omp_max_vf): Likewise.
5656         * omp-low.c (omp_clause_aligned_alignment): Likewise.
5657         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
5658         * tree-vect-loop.c (vect_analyze_loop): Likewise.
5659         * tree-vect-slp.c (vect_slp_bb): Likewise.
5660         * doc/tm.texi: Regenerate.
5661         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
5662         to a poly_uint64.
5663         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
5664         the vector size as a poly_uint64 rather than an unsigned int.
5665         (current_vector_size): Change from an unsigned int to a poly_uint64.
5666         (get_vectype_for_scalar_type): Update accordingly.
5667         * tree.h (build_truth_vector_type): Take the size and number of
5668         units as a poly_uint64 rather than an unsigned int.
5669         (build_vector_type): Add a temporary overload that takes
5670         the number of units as a poly_uint64 rather than an unsigned int.
5671         * tree.c (make_vector_type): Likewise.
5672         (build_truth_vector_type): Take the number of units as a poly_uint64
5673         rather than an unsigned int.
5674
5675 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5676             Alan Hayward  <alan.hayward@arm.com>
5677             David Sherwood  <david.sherwood@arm.com>
5678
5679         * target.def (get_mask_mode): Take the number of units and length
5680         as poly_uint64s rather than unsigned ints.
5681         * targhooks.h (default_get_mask_mode): Update accordingly.
5682         * targhooks.c (default_get_mask_mode): Likewise.
5683         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
5684         * doc/tm.texi: Regenerate.
5685
5686 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5687             Alan Hayward  <alan.hayward@arm.com>
5688             David Sherwood  <david.sherwood@arm.com>
5689
5690         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
5691         * omp-general.c (omp_max_vf): Likewise.
5692         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
5693         (expand_omp_simd): Handle polynomial safelen.
5694         * omp-low.c (omplow_simd_context): Add a default constructor.
5695         (omplow_simd_context::max_vf): Change from int to poly_uint64.
5696         (lower_rec_simd_input_clauses): Update accordingly.
5697         (lower_rec_input_clauses): Likewise.
5698
5699 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5700             Alan Hayward  <alan.hayward@arm.com>
5701             David Sherwood  <david.sherwood@arm.com>
5702
5703         * tree-vectorizer.h (vect_nunits_for_cost): New function.
5704         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
5705         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
5706         (vect_analyze_slp_cost): Likewise.
5707         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
5708         (vect_model_load_cost): Likewise.
5709
5710 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5711             Alan Hayward  <alan.hayward@arm.com>
5712             David Sherwood  <david.sherwood@arm.com>
5713
5714         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
5715         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
5716         from an unsigned int * to a poly_uint64_pod *.
5717         (calculate_unrolling_factor): New function.
5718         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
5719
5720 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5721             Alan Hayward  <alan.hayward@arm.com>
5722             David Sherwood  <david.sherwood@arm.com>
5723
5724         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
5725         from an unsigned int to a poly_uint64.
5726         (_loop_vec_info::slp_unrolling_factor): Likewise.
5727         (_loop_vec_info::vectorization_factor): Change from an int
5728         to a poly_uint64.
5729         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
5730         (vect_get_num_vectors): New function.
5731         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
5732         (vect_get_num_copies): Use vect_get_num_vectors.
5733         (vect_analyze_data_ref_dependences): Change max_vf from an int *
5734         to an unsigned int *.
5735         (vect_analyze_data_refs): Change min_vf from an int * to a
5736         poly_uint64 *.
5737         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5738         than an unsigned HOST_WIDE_INT.
5739         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
5740         (vect_analyze_data_ref_dependence): Change max_vf from an int *
5741         to an unsigned int *.
5742         (vect_analyze_data_ref_dependences): Likewise.
5743         (vect_compute_data_ref_alignment): Handle polynomial vf.
5744         (vect_enhance_data_refs_alignment): Likewise.
5745         (vect_prune_runtime_alias_test_list): Likewise.
5746         (vect_shift_permute_load_chain): Likewise.
5747         (vect_supportable_dr_alignment): Likewise.
5748         (dependence_distance_ge_vf): Take the vectorization factor as a
5749         poly_uint64 rather than an unsigned HOST_WIDE_INT.
5750         (vect_analyze_data_refs): Change min_vf from an int * to a
5751         poly_uint64 *.
5752         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
5753         vfm1 as a poly_uint64 rather than an int.  Make the same change
5754         for the returned bound_scalar.
5755         (vect_gen_vector_loop_niters): Handle polynomial vf.
5756         (vect_do_peeling): Likewise.  Update call to
5757         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
5758         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
5759         be constant.
5760         * tree-vect-loop.c (vect_determine_vectorization_factor)
5761         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
5762         (vect_get_known_peeling_cost): Likewise.
5763         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
5764         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
5765         (vect_transform_loop): Likewise.  Use the lowest possible VF when
5766         updating the upper bounds of the loop.
5767         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
5768         rather than an int.
5769         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
5770         polynomial unroll factors.
5771         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
5772         (vect_make_slp_decision): Likewise.
5773         (vect_supported_load_permutation_p): Likewise, and polynomial
5774         vf too.
5775         (vect_analyze_slp_cost): Handle polynomial vf.
5776         (vect_slp_analyze_node_operations): Likewise.
5777         (vect_slp_analyze_bb_1): Likewise.
5778         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5779         than an unsigned HOST_WIDE_INT.
5780         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
5781         (vectorizable_load): Handle polynomial vf.
5782         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
5783         a poly_uint64.
5784         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
5785
5786 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5787             Alan Hayward  <alan.hayward@arm.com>
5788             David Sherwood  <david.sherwood@arm.com>
5789
5790         * match.pd: Handle bit operations involving three constants
5791         and try to fold one pair.
5792
5793 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5794
5795         * tree-vect-loop-manip.c: Include gimple-fold.h.
5796         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
5797         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
5798         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
5799         Add a path that uses a step of VF instead of 1, but disable it
5800         for now.
5801         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
5802         and niters_no_overflow parameters.  Update calls to
5803         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
5804         Create a new SSA name if the latter choses to use a ste other
5805         than zero, and return it via niters_vector_mult_vf_var.
5806         * tree-vect-loop.c (vect_transform_loop): Update calls to
5807         vect_do_peeling, vect_gen_vector_loop_niters and
5808         slpeel_make_loop_iterate_ntimes.
5809         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
5810         (vect_gen_vector_loop_niters): Update declarations after above changes.
5811
5812 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
5813
5814         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
5815         128-bit round to integer instructions.
5816         (ceil<mode>2): Likewise.
5817         (btrunc<mode>2): Likewise.
5818         (round<mode>2): Likewise.
5819
5820 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5821
5822         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
5823         unaligned VSX load/store on P8/P9.
5824         (expand_block_clear): Allow the use of unaligned VSX
5825         load/store on P8/P9.
5826
5827 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
5828
5829         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
5830         New function.
5831         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
5832         swap associated with both a load and a store.
5833
5834 2018-01-02  Andrew Waterman  <andrew@sifive.com>
5835
5836         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
5837         * config/riscv/riscv.md (clear_cache): Use it.
5838
5839 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
5840
5841         * web.c: Remove out-of-date comment.
5842
5843 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5844
5845         * expr.c (fixup_args_size_notes): Check that any existing
5846         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
5847         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
5848         (emit_single_push_insn): ...here.
5849
5850 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5851
5852         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
5853         (const_vector_encoded_nelts): New function.
5854         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
5855         (const_vector_int_elt, const_vector_elt): Declare.
5856         * emit-rtl.c (const_vector_int_elt_1): New function.
5857         (const_vector_elt): Likewise.
5858         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
5859         of CONST_VECTOR_ELT.
5860
5861 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5862
5863         * expr.c: Include rtx-vector-builder.h.
5864         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
5865         directly on the tree encoding.
5866         (const_vector_from_tree): Likewise.
5867         * optabs.c: Include rtx-vector-builder.h.
5868         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
5869         sequence of "u" values.
5870         * vec-perm-indices.c: Include rtx-vector-builder.h.
5871         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
5872         directly on the vec_perm_indices encoding.
5873
5874 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5875
5876         * doc/rtl.texi (const_vector): Describe new encoding scheme.
5877         * Makefile.in (OBJS): Add rtx-vector-builder.o.
5878         * rtx-vector-builder.h: New file.
5879         * rtx-vector-builder.c: Likewise.
5880         * rtl.h (rtx_def::u2): Add a const_vector field.
5881         (CONST_VECTOR_NPATTERNS): New macro.
5882         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
5883         (CONST_VECTOR_DUPLICATE_P): Likewise.
5884         (CONST_VECTOR_STEPPED_P): Likewise.
5885         (CONST_VECTOR_ENCODED_ELT): Likewise.
5886         (const_vec_duplicate_p): Check for a duplicated vector encoding.
5887         (unwrap_const_vec_duplicate): Likewise.
5888         (const_vec_series_p): Check for a non-duplicated vector encoding.
5889         Say that the function only returns true for integer vectors.
5890         * emit-rtl.c: Include rtx-vector-builder.h.
5891         (gen_const_vec_duplicate_1): Delete.
5892         (gen_const_vector): Call gen_const_vec_duplicate instead of
5893         gen_const_vec_duplicate_1.
5894         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
5895         (gen_const_vec_duplicate): Use rtx_vector_builder.
5896         (gen_const_vec_series): Likewise.
5897         (gen_rtx_CONST_VECTOR): Likewise.
5898         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
5899         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5900         Build a new vector rather than modifying a CONST_VECTOR in-place.
5901         (handle_special_swappables): Update call accordingly.
5902         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
5903         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5904         Build a new vector rather than modifying a CONST_VECTOR in-place.
5905         (handle_special_swappables): Update call accordingly.
5906
5907 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5908
5909         * simplify-rtx.c (simplify_const_binary_operation): Use
5910         CONST_VECTOR_ELT instead of XVECEXP.
5911
5912 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5913
5914         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
5915         the selector elements to be different from the data elements
5916         if the selector is a VECTOR_CST.
5917         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
5918         ssizetype for the selector.
5919
5920 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5921
5922         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
5923         before testing each element individually.
5924         * tree-vect-generic.c (lower_vec_perm): Likewise.
5925
5926 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5927
5928         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
5929         * selftest-run-tests.c (selftest::run_tests): Call it.
5930         * vector-builder.h (vector_builder::operator ==): New function.
5931         (vector_builder::operator !=): Likewise.
5932         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
5933         (vec_perm_indices::all_from_input_p): New function.
5934         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5935         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
5936         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
5937         instead of reading the VECTOR_CST directly.  Detect whether both
5938         vector inputs are the same before constructing the vec_perm_indices,
5939         and update the number of inputs argument accordingly.  Use the
5940         utility functions added above.  Only construct sel2 if we need to.
5941
5942 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5943
5944         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
5945         the broadcast of the low byte.
5946         (expand_mult_highpart): Use an explicit encoding for the permutes.
5947         * optabs-query.c (can_mult_highpart_p): Likewise.
5948         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
5949         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5950         (vectorizable_bswap): Likewise.
5951         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
5952         explicit encoding for the power-of-2 permutes.
5953         (vect_permute_store_chain): Likewise.
5954         (vect_grouped_load_supported): Likewise.
5955         (vect_permute_load_chain): Likewise.
5956
5957 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5958
5959         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
5960         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
5961         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
5962         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5963         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
5964         (vect_gen_perm_mask_any): Likewise.
5965
5966 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5967
5968         * int-vector-builder.h: New file.
5969         * vec-perm-indices.h: Include int-vector-builder.h.
5970         (vec_perm_indices): Redefine as an int_vector_builder.
5971         (auto_vec_perm_indices): Delete.
5972         (vec_perm_builder): Redefine as a stand-alone class.
5973         (vec_perm_indices::vec_perm_indices): New function.
5974         (vec_perm_indices::clamp): Likewise.
5975         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
5976         (vec_perm_indices::new_vector): New function.
5977         (vec_perm_indices::new_expanded_vector): Update for new
5978         vec_perm_indices class.
5979         (vec_perm_indices::rotate_inputs): New function.
5980         (vec_perm_indices::all_in_range_p): Operate directly on the
5981         encoded form, without computing elided elements.
5982         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
5983         encoding.  Update for new vec_perm_indices class.
5984         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
5985         the given vec_perm_builder.
5986         (expand_vec_perm_var): Update vec_perm_builder constructor.
5987         (expand_mult_highpart): Use vec_perm_builder instead of
5988         auto_vec_perm_indices.
5989         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
5990         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
5991         or double series encoding as appropriate.
5992         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
5993         vec_perm_indices instead of auto_vec_perm_indices.
5994         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5995         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5996         (vect_permute_store_chain): Likewise.
5997         (vect_grouped_load_supported): Likewise.
5998         (vect_permute_load_chain): Likewise.
5999         (vect_shift_permute_load_chain): Likewise.
6000         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
6001         (vect_transform_slp_perm_load): Likewise.
6002         (vect_schedule_slp_instance): Likewise.
6003         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
6004         (vectorizable_mask_load_store): Likewise.
6005         (vectorizable_bswap): Likewise.
6006         (vectorizable_store): Likewise.
6007         (vectorizable_load): Likewise.
6008         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
6009         vec_perm_indices instead of auto_vec_perm_indices.  Use
6010         tree_to_vec_perm_builder to read the vector from a tree.
6011         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
6012         vec_perm_builder instead of a vec_perm_indices.
6013         (have_whole_vector_shift): Use vec_perm_builder and
6014         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
6015         truncation to calc_vec_perm_mask_for_shift.
6016         (vect_create_epilog_for_reduction): Likewise.
6017         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
6018         from auto_vec_perm_indices to vec_perm_indices.
6019         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
6020         instead of changing individual elements.
6021         (aarch64_vectorize_vec_perm_const): Use new_vector to install
6022         the vector in d.perm.
6023         * config/arm/arm.c (expand_vec_perm_d::perm): Change
6024         from auto_vec_perm_indices to vec_perm_indices.
6025         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
6026         instead of changing individual elements.
6027         (arm_vectorize_vec_perm_const): Use new_vector to install
6028         the vector in d.perm.
6029         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
6030         Update vec_perm_builder constructor.
6031         (rs6000_expand_interleave): Likewise.
6032         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
6033         (rs6000_expand_interleave): Likewise.
6034
6035 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6036
6037         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
6038         to qimode could truncate the indices.
6039         * optabs.c (expand_vec_perm_var): Likewise.
6040
6041 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6042
6043         * Makefile.in (OBJS): Add vec-perm-indices.o.
6044         * vec-perm-indices.h: New file.
6045         * vec-perm-indices.c: Likewise.
6046         * target.h (vec_perm_indices): Replace with a forward class
6047         declaration.
6048         (auto_vec_perm_indices): Move to vec-perm-indices.h.
6049         * optabs.h: Include vec-perm-indices.h.
6050         (expand_vec_perm): Delete.
6051         (selector_fits_mode_p, expand_vec_perm_var): Declare.
6052         (expand_vec_perm_const): Declare.
6053         * target.def (vec_perm_const_ok): Replace with...
6054         (vec_perm_const): ...this new hook.
6055         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
6056         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
6057         * doc/tm.texi: Regenerate.
6058         * optabs.def (vec_perm_const): Delete.
6059         * doc/md.texi (vec_perm_const): Likewise.
6060         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
6061         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
6062         expand_vec_perm for constant permutation vectors.  Assert that
6063         the mode of variable permutation vectors is the integer equivalent
6064         of the mode that is being permuted.
6065         * optabs-query.h (selector_fits_mode_p): Declare.
6066         * optabs-query.c: Include vec-perm-indices.h.
6067         (selector_fits_mode_p): New function.
6068         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
6069         is defined, instead of checking whether the vec_perm_const_optab
6070         exists.  Use targetm.vectorize.vec_perm_const instead of
6071         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
6072         fit in the vector mode before using a variable permute.
6073         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
6074         vec_perm_indices instead of an rtx.
6075         (expand_vec_perm): Replace with...
6076         (expand_vec_perm_const): ...this new function.  Take the selector
6077         as a vec_perm_indices rather than an rtx.  Also take the mode of
6078         the selector.  Update call to shift_amt_for_vec_perm_mask.
6079         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
6080         Use vec_perm_indices::new_expanded_vector to expand the original
6081         selector into bytes.  Check whether the indices fit in the vector
6082         mode before using a variable permute.
6083         (expand_vec_perm_var): Make global.
6084         (expand_mult_highpart): Use expand_vec_perm_const.
6085         * fold-const.c: Includes vec-perm-indices.h.
6086         * tree-ssa-forwprop.c: Likewise.
6087         * tree-vect-data-refs.c: Likewise.
6088         * tree-vect-generic.c: Likewise.
6089         * tree-vect-loop.c: Likewise.
6090         * tree-vect-slp.c: Likewise.
6091         * tree-vect-stmts.c: Likewise.
6092         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
6093         Delete.
6094         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
6095         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
6096         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
6097         (aarch64_vectorize_vec_perm_const): ...this new function.
6098         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
6099         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6100         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
6101         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
6102         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
6103         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6104         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
6105         into...
6106         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
6107         check for NEON modes.
6108         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
6109         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
6110         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
6111         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
6112         into...
6113         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
6114         the old VEC_PERM_CONST conditions.
6115         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
6116         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
6117         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
6118         (ia64_vectorize_vec_perm_const_ok): Merge into...
6119         (ia64_vectorize_vec_perm_const): ...this new function.
6120         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
6121         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
6122         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
6123         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
6124         * config/mips/mips.c (mips_expand_vec_perm_const)
6125         (mips_vectorize_vec_perm_const_ok): Merge into...
6126         (mips_vectorize_vec_perm_const): ...this new function.
6127         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
6128         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
6129         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
6130         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
6131         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
6132         (rs6000_expand_vec_perm_const): Delete.
6133         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
6134         Delete.
6135         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6136         (altivec_expand_vec_perm_const_le): Take each operand individually.
6137         Operate on constant selectors rather than rtxes.
6138         (altivec_expand_vec_perm_const): Likewise.  Update call to
6139         altivec_expand_vec_perm_const_le.
6140         (rs6000_expand_vec_perm_const): Delete.
6141         (rs6000_vectorize_vec_perm_const_ok): Delete.
6142         (rs6000_vectorize_vec_perm_const): New function.
6143         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
6144         an element count and rtx array.
6145         (rs6000_expand_extract_even): Update call accordingly.
6146         (rs6000_expand_interleave): Likewise.
6147         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
6148         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
6149         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
6150         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
6151         (rs6000_expand_vec_perm_const): Delete.
6152         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
6153         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6154         (altivec_expand_vec_perm_const_le): Take each operand individually.
6155         Operate on constant selectors rather than rtxes.
6156         (altivec_expand_vec_perm_const): Likewise.  Update call to
6157         altivec_expand_vec_perm_const_le.
6158         (rs6000_expand_vec_perm_const): Delete.
6159         (rs6000_vectorize_vec_perm_const_ok): Delete.
6160         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
6161         reference to the SPE evmerge intructions.
6162         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
6163         an element count and rtx array.
6164         (rs6000_expand_extract_even): Update call accordingly.
6165         (rs6000_expand_interleave): Likewise.
6166         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
6167         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
6168         new function.
6169         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6170
6171 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6172
6173         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
6174         vector mode and that that mode matches the mode of the data
6175         being permuted.
6176         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
6177         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
6178         directly using expand_vec_perm_1 when forcing selectors into
6179         registers.
6180         (expand_vec_perm_var): New function, split out from expand_vec_perm.
6181
6182 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6183
6184         * optabs-query.h (can_vec_perm_p): Delete.
6185         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
6186         * optabs-query.c (can_vec_perm_p): Split into...
6187         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
6188         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
6189         particular selector is valid.
6190         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
6191         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
6192         (vect_grouped_load_supported): Likewise.
6193         (vect_shift_permute_load_chain): Likewise.
6194         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
6195         (vect_transform_slp_perm_load): Likewise.
6196         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
6197         (vectorizable_bswap): Likewise.
6198         (vect_gen_perm_mask_checked): Likewise.
6199         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
6200         implementations of variable permutation vectors into account
6201         when deciding which selector to use.
6202         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
6203         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
6204         with a false third argument.
6205         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
6206         to test whether the constant selector is valid and can_vec_perm_var_p
6207         to test whether a variable selector is valid.
6208
6209 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6210
6211         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
6212         * optabs-query.c (can_vec_perm_p): Likewise.
6213         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
6214         instead of vec_perm_indices.
6215         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
6216         (vect_gen_perm_mask_checked): Likewise,
6217         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
6218         (vect_gen_perm_mask_checked): Likewise,
6219
6220 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6221
6222         * optabs-query.h (qimode_for_vec_perm): Declare.
6223         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
6224         (qimode_for_vec_perm): ...this new function.
6225         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
6226
6227 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
6228
6229         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
6230         does not have a conditional at the top.
6231
6232 2018-01-02  Richard Biener  <rguenther@suse.de>
6233
6234         * ipa-inline.c (big_speedup_p): Fix expression.
6235
6236 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
6237
6238         PR target/81616
6239         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
6240         for generic 4->6.
6241
6242 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
6243
6244         PR target/81616
6245         Generic tuning.
6246         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
6247         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
6248         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
6249         cond_taken_branch_cost 3->4.
6250
6251 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
6252
6253         PR tree-optimization/83581
6254         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
6255         TODO_cleanup_cfg if any changes have been made.
6256
6257         PR middle-end/83608
6258         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
6259         convert_modes if target mode has the right side, but different mode
6260         class.
6261
6262         PR middle-end/83609
6263         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
6264         last argument when extracting from CONCAT.  If either from_real or
6265         from_imag is NULL, use expansion through memory.  If result is not
6266         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
6267         the parts directly to inner mode, if even that fails, use expansion
6268         through memory.
6269
6270         PR middle-end/83623
6271         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
6272         check for bswap in mode rather than HImode and use that in expand_unop
6273         too.
6274 \f
6275 Copyright (C) 2018 Free Software Foundation, Inc.
6276
6277 Copying and distribution of this file, with or without modification,
6278 are permitted in any medium without royalty provided the copyright
6279 notice and this notice are preserved.