gcc/ChangeLog

   1 2018-02-07  Jakub Jelinek  <jakub@redhat.com>
   2
   3         * tree-eh.c (operation_could_trap_helper_p): Ignore honor_trapv for
   4         *DIV_EXPR and *MOD_EXPR.
   5
   6 2018-02-07  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         PR target/84248
   9         * config/i386/i386.c (ix86_option_override_internal): Mask out
  10         the CF_SET bit when checking -fcf-protection.
  11
  12 2018-02-07  Tom de Vries  <tom@codesourcery.com>
  13
  14         PR libgomp/84217
  15         * omp-expand.c (expand_oacc_collapse_init): Ensure diff_type is large
  16         enough.
  17
  18 2018-02-07  Richard Biener  <rguenther@suse.de>
  19
  20         PR tree-optimization/84204
  21         * tree-chrec.c (chrec_fold_plus_1): Remove size limiting in
  22         this place.
  23
  24         PR tree-optimization/84205
  25         * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Also
  26         special-case isl_ast_op_zdiv_r.
  27
  28         PR tree-optimization/84223
  29         * graphite-scop-detection.c (gather_bbs::before_dom_children):
  30         Only add conditions from within the region.
  31         (gather_bbs::after_dom_children): Adjust.
  32
  33 2018-02-07  Georg-Johann Lay  <avr@gjlay.de>
  34
  35         PR target/84209
  36         * config/avr/avr.h (GENERAL_REGNO_P, GENERAL_REG_P): New macros.
  37         * config/avr/avr.md: Only post-reload split REG-REG moves if
  38         either register is REGERAL_REG_P.
  39
  40 2018-02-07  Jakub Jelinek  <jakub@redhat.com>
  41
  42         PR tree-optimization/84235
  43         * tree-ssa-scopedtables.c
  44         (avail_exprs_stack::simplify_binary_operation): Fir MINUS_EXPR, punt
  45         if the subtraction is performed in floating point type where NaNs are
  46         honored.  For *DIV_EXPR, punt for ALL_FRACT_MODE_Ps where we can't
  47         build 1.  Formatting fix.
  48
  49 2018-02-06  Jakub Jelinek  <jakub@redhat.com>
  50
  51         PR target/84146
  52         * config/i386/i386.c (rest_of_insert_endbranch): Only skip
  53         NOTE_INSN_CALL_ARG_LOCATION after a call, not anything else,
  54         and skip it regardless of bb boundaries.  Use CALL_P macro,
  55         don't test INSN_P (insn) together with CALL_P or JUMP_P check
  56         unnecessarily, formatting fix.
  57
  58 2018-02-06  Michael Collison  <michael.collison@arm.com>
  59
  60         * config/arm/thumb2.md:
  61         (*thumb2_mov_negscc): Split only if TARGET_THUMB2 && !arm_restrict_it.
  62         (*thumb_mov_notscc): Ditto.
  63
  64 2018-02-06  Michael Meissner  <meissner@linux.vnet.ibm.com>
  65
  66         PR target/84154
  67         * config/rs6000/rs6000.md (su code attribute): Use "u" for
  68         unsigned_fix, not "s".
  69
  70 2018-02-06  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  71
  72         * configure.ac (gcc_fn_eh_frame_ro): New function.
  73         (gcc_cv_as_cfi_directive): Check both 32 and 64-bit assembler for
  74         correct .eh_frame permissions.
  75         * configure: Regenerate.
  76
  77 2018-02-06  Andrew Jenner  <andrew@codeourcery.com>
  78
  79         * doc/invoke.texi: Add section for the PowerPC SPE backend. Remove
  80         irrelevant options.
  81
  82 2018-02-06  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
  83
  84         * config/rs6000/rs6000.c (rs6000_option_override_internal):
  85         Display warning message for -mno-speculate-indirect-jumps.
  86
  87 2018-02-06  Andrew Jenner  <andrew@codesourcery.com>
  88
  89         * config/powerpcspe/powerpcspe.opt: (msimple-fpu, mfpu) Add
  90         Undocumented.
  91         * config/powerpcspe/sysv4.opt (mbit-align): Likewise.
  92
  93 2018-02-06  Aldy Hernandez  <aldyh@redhat.com>
  94
  95         PR tree-optimization/84225
  96         * tree-eh.c (find_trapping_overflow): Only call
  97         operation_no_trapping_overflow when ANY_INTEGRAL_TYPE_P.
  98
  99 2018-02-06  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 100
 101         PR target/84145
 102         * config/i386/i386.c: Reimplement the check of possible options
 103         -mibt/-mshstk conbination. Change error messages.
 104         * doc/invoke.texi: Fix a typo: remove extra '='.
 105
 106 2018-02-06  Marek Polacek  <polacek@redhat.com>
 107
 108         PR tree-optimization/84228
 109         * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Skip debug statements.
 110
 111 2018-02-06  Tamar Christina  <tamar.christina@arm.com>
 112
 113         PR target/82641
 114         * config/arm/arm.c (arm_print_asm_arch_directives): Record already
 115         emitted arch directives.
 116         * config/arm/arm-c.c (arm_cpu_builtins): Undefine __ARM_ARCH and
 117         __ARM_FEATURE_COPROC before changing architectures.
 118
 119 2018-02-06  Richard Biener  <rguenther@suse.de>
 120
 121         * config/i386/i386.c (print_reg): Fix typo.
 122         (ix86_loop_unroll_adjust): Do not unroll beyond the original nunroll.
 123
 124 2018-02-06  Eric Botcazou  <ebotcazou@adacore.com>
 125
 126         * configure: Regenerate.
 127
 128 2018-02-05  Martin Sebor  <msebor@redhat.com>
 129
 130         PR tree-optimization/83369
 131         * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Use %G to print
 132         inlining context.
 133
 134 2018-02-05  Martin Liska  <mliska@suse.cz>
 135
 136         * doc/invoke.texi: Cherry-pick upstream r323995.
 137
 138 2018-02-05  Richard Sandiford  <richard.sandiford@linaro.org>
 139
 140         * ira.c (ira_init_register_move_cost): Adjust comment.
 141
 142 2018-02-05  Martin Liska  <mliska@suse.cz>
 143
 144         PR gcov-profile/84137
 145         * doc/gcov.texi: Fix typo in documentation.
 146
 147 2018-02-05  Martin Liska  <mliska@suse.cz>
 148
 149         PR gcov-profile/83879
 150         * doc/gcov.texi: Document necessity of --dynamic-list-data when
 151         using dlopen functionality.
 152
 153 2018-02-05  Olga Makhotina  <olga.makhotina@intel.com>
 154
 155         * config/i386/avx512dqintrin.h (_mm_mask_range_sd, _mm_maskz_range_sd,
 156         _mm_mask_range_round_sd, _mm_maskz_range_round_sd, _mm_mask_range_ss,
 157         _mm_maskz_range_ss, _mm_mask_range_round_ss,
 158         _mm_maskz_range_round_ss): New intrinsics.
 159         (__builtin_ia32_rangesd128_round)
 160         (__builtin_ia32_rangess128_round): Remove.
 161         (__builtin_ia32_rangesd128_mask_round,
 162         __builtin_ia32_rangess128_mask_round): New builtins.
 163         * config/i386/i386-builtin.def (__builtin_ia32_rangesd128_round,
 164         __builtin_ia32_rangess128_round): Remove.
 165         (__builtin_ia32_rangesd128_mask_round,
 166         __builtin_ia32_rangess128_mask_round): New builtins.
 167         * config/i386/sse.md (ranges<mode><round_saeonly_name>): Renamed to ...
 168         (ranges<mode><mask_scalar_name><round_saeonly_scalar_name>): ... this.
 169         ((match_operand:VF_128 2 "<round_saeonly_nimm_predicate>"
 170         "<round_saeonly_constraint>")): Changed to ...
 171         ((match_operand:VF_128 2 "<round_saeonly_scalar_nimm_predicate>"
 172         "<round_saeonly_scalar_constraint>")): ... this.
 173         ("vrange<ssescalarmodesuffix>\t{%3, <round_saeonly_op4>%2, %1, %0|
 174         %0, %1, %2<round_saeonly_op4>, %3}"): Changed to ...
 175         ("vrange<ssescalarmodesuffix>\t{%3, <round_saeonly_scalar_mask_op4>%2,
 176         %1, %0<mask_scalar_operand4>|%0<mask_scalar_operand4>, %1,
 177         %2<round_saeonly_scalar_mask_op4>, %3}"): ... this.
 178
 179 2018-02-02  Andrew Jenner  <andrew@codesourcery.com>
 180
 181         * config/powerpcspe/powerpcspe.opt: Add Undocumented to irrelevant
 182         options.
 183         * config/powerpcspe/powerpcspe-tables.opt (rs6000_cpu_opt_value):
 184         Remove all values except native, 8540 and 8548.
 185
 186 2018-02-02  H.J. Lu  <hongjiu.lu@intel.com>
 187
 188         * config/i386/i386.c (ix86_output_function_return): Pass
 189         INVALID_REGNUM, instead of -1, as invalid register number to
 190         indirect_thunk_name and output_indirect_thunk.
 191
 192 2018-02-02  Julia Koval  <julia.koval@intel.com>
 193
 194         * config.gcc: Add -march=icelake.
 195         * config/i386/driver-i386.c (host_detect_local_cpu): Detect icelake.
 196         * config/i386/i386-c.c (ix86_target_macros_internal): Handle icelake.
 197         * config/i386/i386.c (processor_costs): Add m_ICELAKE.
 198         (PTA_ICELAKE, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES, PTA_AVX512VBMI2,
 199         PTA_VPCLMULQDQ, PTA_RDPID, PTA_AVX512BITALG): New.
 200         (processor_target_table): Add icelake.
 201         (ix86_option_override_internal): Handle new PTAs.
 202         (get_builtin_code_for_version): Handle icelake.
 203         (M_INTEL_COREI7_ICELAKE): New.
 204         (fold_builtin_cpu): Handle icelake.
 205         * config/i386/i386.h (TARGET_ICELAKE, PROCESSOR_ICELAKE): New.
 206         * doc/invoke.texi: Add -march=icelake.
 207
 208 2018-02-02  Julia Koval  <julia.koval@intel.com>
 209
 210         * config/i386/i386.c (ix86_option_override_internal): Change flags type
 211         to wide_int_bitmask.
 212         * wide-int-bitmask.h: New.
 213
 214 2018-02-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 215
 216         PR target/84066
 217         * config/i386/i386.md: Replace Pmode with word_mode in
 218         builtin_setjmp_setup and builtin_longjmp to support x32.
 219
 220 2018-02-01  Peter Bergner  <bergner@vnet.ibm.com>
 221
 222         PR target/56010
 223         PR target/83743
 224         * config/rs6000/driver-rs6000.c: #include "diagnostic.h".
 225         #include "opts.h".
 226         (rs6000_supported_cpu_names): New static variable.
 227         (linux_cpu_translation_table): Likewise.
 228         (elf_platform) <cpu>: Define new static variable and use it.
 229         Translate kernel AT_PLATFORM name to canonical name if needed.
 230         Error if platform name is unknown.
 231
 232 2018-02-01  Aldy Hernandez  <aldyh@redhat.com>
 233
 234         PR target/84089
 235         * config/pa/predicates.md (base14_operand): Handle E_VOIDmode.
 236
 237 2018-02-01  Jeff Law  <law@redhat.com>
 238
 239         PR target/84128
 240         * config/i386/i386.c (release_scratch_register_on_entry): Add new
 241         OFFSET and RELEASE_VIA_POP arguments.  Use SP+OFFSET to restore
 242         the scratch if RELEASE_VIA_POP is false.
 243         (ix86_adjust_stack_and_probe_stack_clash): Un-constify SIZE.
 244         If we have to save a temporary register, decrement SIZE appropriately.
 245         Pass new arguments to release_scratch_register_on_entry.
 246         (ix86_adjust_stack_and_probe): Likewise.
 247         (ix86_emit_probe_stack_range): Pass new arguments to
 248         release_scratch_register_on_entry.
 249
 250 2018-02-01  Uros Bizjak  <ubizjak@gmail.com>
 251
 252         PR rtl-optimization/84157
 253         * combine.c (change_zero_ext): Use REG_P predicate in
 254         front of HARD_REGISTER_P predicate.
 255
 256 2018-02-01  Georg-Johann Lay  <avr@gjlay.de>
 257
 258         * config/avr/avr.c (avr_option_override): Move disabling of
 259         -fdelete-null-pointer-checks to...
 260         * common/config/avr/avr-common.c (avr_option_optimization_table):
 261         ...here.
 262
 263 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 264
 265         PR tree-optimization/81635
 266         * tree-data-ref.c (split_constant_offset_1): For types that
 267         wrap on overflow, try to use range info to prove that wrapping
 268         cannot occur.
 269
 270 2018-02-01  Renlin Li  <renlin.li@arm.com>
 271
 272         PR target/83370
 273         * config/aarch64/aarch64.c (aarch64_class_max_nregs): Handle
 274         TAILCALL_ADDR_REGS.
 275         (aarch64_register_move_cost): Likewise.
 276         * config/aarch64/aarch64.h (reg_class): Rename CALLER_SAVE_REGS to
 277         TAILCALL_ADDR_REGS.
 278         (REG_CLASS_NAMES): Likewise.
 279         (REG_CLASS_CONTENTS): Rename CALLER_SAVE_REGS to
 280         TAILCALL_ADDR_REGS. Remove IP registers.
 281         * config/aarch64/aarch64.md (Ucs): Update register constraint.
 282
 283 2018-02-01  Richard Biener  <rguenther@suse.de>
 284
 285         * domwalk.h (dom_walker::dom_walker): Add additional constructor
 286         for specifying RPO order and allow NULL for that.
 287         * domwalk.c (dom_walker::dom_walker): Likewise.
 288         (dom_walker::walk): Handle NULL RPO order.
 289         * tree-into-ssa.c (rewrite_dom_walker): Do not walk dom children
 290         in RPO order.
 291         (rewrite_update_dom_walker): Likewise.
 292         (mark_def_dom_walker): Likewise.
 293
 294 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 295
 296         * config/aarch64/aarch64-protos.h (aarch64_split_sve_subreg_move)
 297         (aarch64_maybe_expand_sve_subreg_move): Declare.
 298         * config/aarch64/aarch64.md (UNSPEC_REV_SUBREG): New unspec.
 299         * config/aarch64/predicates.md (aarch64_any_register_operand): New
 300         predicate.
 301         * config/aarch64/aarch64-sve.md (mov<mode>): Optimize subreg moves
 302         that are semantically a reverse operation.
 303         (*aarch64_sve_mov<mode>_subreg_be): New pattern.
 304         * config/aarch64/aarch64.c (aarch64_maybe_expand_sve_subreg_move):
 305         (aarch64_replace_reg_mode, aarch64_split_sve_subreg_move): New
 306         functions.
 307         (aarch64_can_change_mode_class): For big-endian, forbid changes
 308         between two SVE modes if they have different element sizes.
 309
 310 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 311
 312         * config/aarch64/aarch64.c (aarch64_expand_sve_const_vector): Prefer
 313         the TImode handling for big-endian targets.
 314
 315 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 316
 317         * config/aarch64/aarch64-sve.md (sve_ld1rq): Replace with...
 318         (*sve_ld1rq<Vesize>): ... this new pattern.  Handle all element sizes,
 319         not just bytes.
 320         * config/aarch64/aarch64.c (aarch64_expand_sve_widened_duplicate):
 321         Remove BSWAP handing for big-endian targets and use the form of
 322         LD1RQ appropariate for the mode.
 323
 324 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 325
 326         * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Handle
 327         all CONST_VECTOR_DUPLICATE_P vectors, not just those with a single
 328         duplicated element.
 329
 330 2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>
 331
 332         PR tearget/83845
 333         * config/aarch64/aarch64.c (aarch64_secondary_reload): Tighten
 334         check for operands that need to go through aarch64_sve_reload_be.
 335
 336 2018-02-01  Jakub Jelinek  <jakub@redhat.com>
 337
 338         PR tree-optimization/81661
 339         PR tree-optimization/84117
 340         * tree-eh.h (rewrite_to_non_trapping_overflow): Declare.
 341         * tree-eh.c: Include gimplify.h.
 342         (find_trapping_overflow, replace_trapping_overflow,
 343         rewrite_to_non_trapping_overflow): New functions.
 344         * tree-vect-loop.c: Include tree-eh.h.
 345         (vect_get_loop_niters): Use rewrite_to_non_trapping_overflow.
 346         * tree-data-ref.c: Include tree-eh.h.
 347         (get_segment_min_max): Use rewrite_to_non_trapping_overflow.
 348
 349 2018-01-31  Uros Bizjak  <ubizjak@gmail.com>
 350
 351         PR rtl-optimization/84123
 352         * combine.c (change_zero_ext): Check if hard register satisfies
 353         can_change_dest_mode before calling gen_lowpart_SUBREG.
 354
 355 2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>
 356
 357         PR target/82444
 358         * ira.c (ira_init_register_move_cost): Remove assert.
 359
 360 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 361
 362         PR rtl-optimization/84071
 363         * doc/tm.texi.in (WORD_REGISTER_OPERATIONS): Add explicit case.
 364         * doc/tm.texi: Regenerate.
 365
 366 2018-01-31  Richard Biener  <rguenther@suse.de>
 367
 368         PR tree-optimization/84132
 369         * tree-data-ref.c (analyze_miv_subscript): Properly
 370         check whether evolution_function_is_affine_multivariate_p
 371         before calling gcd_of_steps_may_divide_p.
 372
 373 2018-01-31  Julia Koval  <julia.koval@intel.com>
 374
 375         PR target/83618
 376         * config/i386/i386.c (ix86_expand_builtin): Handle IX86_BUILTIN_RDPID.
 377         * config/i386/i386.md (rdpid_rex64) New.
 378         (rdpid): Make 32bit only.
 379
 380 2018-01-29  Aldy Hernandez  <aldyh@redhat.com>
 381
 382         PR lto/84105
 383         * tree-pretty-print.c (dump_generic_node): Handle a TYPE_NAME with
 384         an IDENTIFIER_NODE for FUNCTION_TYPE's.
 385
 386 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 387
 388         Revert
 389         2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
 390
 391         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
 392
 393 2018-01-31  Eric Botcazou  <ebotcazou@adacore.com>
 394
 395         PR rtl-optimization/84071
 396         * combine.c (record_dead_and_set_regs_1): Record the source unmodified
 397         for a paradoxical SUBREG on a WORD_REGISTER_OPERATIONS target.
 398
 399 2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>
 400
 401         * config/arc/arc.c (arc_handle_aux_attribute): New function.
 402         (arc_attribute_table): Add 'aux' attribute.
 403         (arc_in_small_data_p): Consider aux like variables.
 404         (arc_is_aux_reg_p): New function.
 405         (arc_asm_output_aligned_decl_local): Ignore 'aux' like variables.
 406         (arc_get_aux_arg): New function.
 407         (prepare_move_operands): Handle aux-register access.
 408         (arc_handle_aux_attribute): New function.
 409         * doc/extend.texi (ARC Variable attributes): Add subsection.
 410
 411 2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>
 412
 413         * config/arc/arc-protos.h (arc_is_uncached_mem_p): Function proto.
 414         * config/arc/arc.c (arc_handle_uncached_attribute): New function.
 415         (arc_attribute_table): Add 'uncached' attribute.
 416         (arc_print_operand): Print '.di' flag for uncached memory
 417         accesses.
 418         (arc_in_small_data_p): Do not consider for small data the uncached
 419         types.
 420         (arc_is_uncached_mem_p): New function.
 421         * config/arc/predicates.md (compact_store_memory_operand): Check
 422         for uncached memory accesses.
 423         (nonvol_nonimm_operand): Likewise.
 424         * gcc/doc/extend.texi (ARC Type Attribute): New subsection.
 425
 426 2018-01-31  Jakub Jelinek  <jakub@redhat.com>
 427
 428         PR c/84100
 429         * common.opt (falign-functions=, falign-jumps=, falign-labels=,
 430         falign-loops=): Add Optimization flag.
 431
 432 2018-01-30  Jeff Law  <law@redhat.com>
 433
 434         PR target/84064
 435         * i386.c (ix86_adjust_stack_and_probe_stack_clash): New argument
 436         INT_REGISTERS_SAVED.  Check it prior to calling
 437         get_scratch_register_on_entry.
 438         (ix86_adjust_stack_and_probe): Similarly.
 439         (ix86_emit_probe_stack_range): Similarly.
 440         (ix86_expand_prologue): Corresponding changes.
 441
 442 2018-01-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 443
 444         PR target/40411
 445         * config/sol2.h (STARTFILE_ARCH_SPEC): Use -std=c*,
 446         -std=iso9899:199409 instead of -pedantic to select values-Xc.o.
 447
 448 2018-01-30  Vladimir Makarov  <vmakarov@redhat.com>
 449
 450         PR target/84112
 451         * lra-constraints.c (curr_insn_transform): Process AND in the
 452         address.
 453
 454 2018-01-30  Jakub Jelinek  <jakub@redhat.com>
 455
 456         PR rtl-optimization/83986
 457         * sched-deps.c (sched_analyze_insn): For frame related insns, add anti
 458         dependence against last_pending_memory_flush in addition to
 459         pending_jump_insns.
 460
 461 2018-01-30  Alexandre Oliva <aoliva@redhat.com>
 462
 463         PR tree-optimization/81611
 464         * tree-ssa-dom.c (simple_iv_increment_p): Skip intervening
 465         copies.
 466
 467 2018-01-30  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
 468
 469         * config/rs6000/rs6000.c (rs6000_internal_arg_pointer): Only return
 470         a reg rtx.
 471
 472 2018-01-30  Richard Biener  <rguenther@suse.de>
 473             Jakub Jelinek  <jakub@redhat.com>
 474
 475         PR tree-optimization/84111
 476         * tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1): Skip
 477         inner loops added during recursion, as they don't have up-to-date
 478         SSA form.
 479
 480 2018-01-30  Jan Hubicka  <hubicka@ucw.cz>
 481
 482         PR ipa/81360
 483         * ipa-inline.c (can_inline_edge_p): Break out late tests to...
 484         (can_inline_edge_by_limits_p): ... here.
 485         (can_early_inline_edge_p, check_callers,
 486         update_caller_keys, update_callee_keys, recursive_inlining,
 487         add_new_edges_to_heap, speculation_useful_p,
 488         inline_small_functions,
 489         inline_small_functions, flatten_function,
 490         inline_to_all_callers_1): Update.
 491
 492 2018-01-30  Jan Hubicka  <hubicka@ucw.cz>
 493
 494         * profile-count.c (profile_count::combine_with_ipa_count): Handle
 495         zeros correctly.
 496
 497 2018-01-30  Richard Biener  <rguenther@suse.de>
 498
 499         PR tree-optimization/83008
 500         * tree-vect-slp.c (vect_analyze_slp_cost_1): Properly cost
 501         invariant and constant vector uses in stmts when they need
 502         more than one stmt.
 503
 504 2018-01-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 505
 506         PR bootstrap/84017
 507         * configure.ac (gcc_cv_as_shf_merge): Disable on Solaris 10/x86.
 508         * configure: Regenerate.
 509
 510 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
 511
 512         * config/aarch64/aarch64-sve.md (*vec_extract<mode><Vel>_0): New
 513         pattern.
 514         (*vec_extract<mode><Vel>_v128): Require a nonzero lane number.
 515         Use gen_rtx_REG rather than gen_lowpart.
 516
 517 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
 518
 519         * lra-constraints.c (match_reload): Use subreg_lowpart_offset
 520         rather than 0 when creating partial subregs.
 521
 522 2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>
 523
 524         * vec-perm-indices.c (vec_perm_indices::series_p): Give examples
 525         of usage.
 526
 527 2018-01-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
 528
 529         PR target/81550
 530         * config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): If DFmode
 531         and SFmode can go in Altivec registers (-mcpu=power7 for DFmode,
 532         -mcpu=power8 for SFmode) don't set the PRE_INCDEC or PRE_MODIFY
 533         flags.  This restores the settings used before the 2017-07-24.
 534         Turning off pre increment/decrement/modify allows IVOPTS to
 535         optimize DF/SF loops where the index is an int.
 536
 537 2018-01-29  Richard Biener <rguenther@suse.de>
 538             Kelvin Nilsen  <kelvin@gcc.gnu.org>
 539
 540         PR bootstrap/80867
 541         * tree-vect-stmts.c (vectorizable_call): Don't call
 542         targetm.vectorize_builtin_md_vectorized_function if callee is
 543         NULL.
 544
 545 2018-01-22 Carl Love <cel@us.ibm.com>
 546
 547         * doc/extend.tex: Fix typo in second arg in
 548         __builtin_bcdadd_{lt|eq|gt|ov} and __builtin_bcdsub_{lt|eq|gt|ov}.
 549
 550 2018-01-29  Richard Biener  <rguenther@suse.de>
 551
 552         PR tree-optimization/84086
 553         * tree-ssanames.c: Include cfgloop.h and tree-scalar-evolution.h.
 554         (flush_ssaname_freelist): When SSA names were released reset
 555         the SCEV hash table.
 556
 557 2018-01-29  Richard Biener  <rguenther@suse.de>
 558
 559         PR tree-optimization/84057
 560         * tree-ssa-loop-ivcanon.c (unloop_loops): Deal with already
 561         removed paths when removing edges.
 562
 563 2018-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 564
 565         * doc/invoke.texi: Replace -mfunction-return==@var{choice} with
 566         -mfunction-return=@var{choice}.
 567
 568 2018-01-27  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 569
 570         PR diagnostic/84034
 571         * diagnostic-show-locus.c (get_line_width_without_trailing_whitespace):
 572         Handle CR like TAB.
 573         (layout::print_source_line): Likewise.
 574         (test_get_line_width_without_trailing_whitespace): Add test cases.
 575
 576 2018-01-27  Jakub Jelinek  <jakub@redhat.com>
 577
 578         PR middle-end/84040
 579         * sched-deps.c (sched_macro_fuse_insns): Return immediately for
 580         debug insns.
 581
 582 2018-01-26  Jim Wilson  <jimw@sifive.com>
 583
 584         * config/riscv/riscv.h (MAX_FIXED_MODE_SIZE): New.
 585
 586         * config/riscv/elf.h (LIB_SPEC): Don't include -lgloss when nosys.specs
 587         specified.
 588
 589 2018-01-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 590
 591         * config/aarch64/aarch64.md: Add peepholes for CMP + SUB -> SUBS
 592         and CMP + SUB-immediate -> SUBS.
 593
 594 2018-01-26  Martin Sebor  <msebor@redhat.com>
 595
 596         PR tree-optimization/83896
 597         * tree-ssa-strlen.c (get_string_len): Rename...
 598         (get_string_cst_length): ...to this.  Return HOST_WIDE_INT.
 599         Avoid assuming length is constant.
 600         (handle_char_store): Use HOST_WIDE_INT for string length.
 601
 602 2018-01-26  Uros Bizjak  <ubizjak@gmail.com>
 603
 604         PR target/81763
 605         * config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
 606         to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
 607
 608 2018-01-26  Richard Biener  <rguenther@suse.de>
 609
 610         PR rtl-optimization/84003
 611         * dse.c (record_store): Only record redundant stores when
 612         the earlier store aliases at least all accesses the later one does.
 613
 614 2018-01-26  Jakub Jelinek  <jakub@redhat.com>
 615
 616         PR rtl-optimization/83985
 617         * dce.c (deletable_insn_p): Return false for separate shrink wrapping
 618         REG_CFA_RESTORE insns.
 619         (delete_unmarked_insns): Don't ignore separate shrink wrapping
 620         REG_CFA_RESTORE insns here.
 621
 622         PR c/83989
 623         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Don't
 624         use SSA_NAME_VAR as base for SSA_NAMEs with non-NULL SSA_NAME_VAR.
 625
 626 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 627
 628         * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3.
 629         * config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... .
 630         (arc_init): Likewise.
 631         (arc_override_options): Likewise.
 632         (arc_file_start): Choose Tag_ARC_CPU_variation based on arc_tune
 633         value.
 634         (hwloop_fail): Use TARGET_DBNZ when we want to check for dbnz insn
 635         support.
 636         * config/arc/arc.h (TARGET_DBNZ): Define.
 637         * config/arc/arc.md (attr tune): Add core_3, use ARC_TUNE_... to
 638         properly set the tune attribute.
 639         (dbnz): Use TARGET_DBNZ guard.
 640         * config/arc/arc.opt (mtune): Add core3 option.
 641
 642 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 643
 644         * config/arc/arc.c (arc_delegitimize_address_0): Refactored to
 645         recognize new pic like addresses.
 646         (arc_delegitimize_address): Clean up.
 647
 648 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 649
 650         * config/arc/arc-arches.def: Option mrf16 valid for all
 651         architectures.
 652         * config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
 653         * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
 654         * config/arc/arc-options.def (FL_RF16): Add mrf16 option.
 655         * config/arc/arc-tables.opt: Regenerate.
 656         * config/arc/arc.c (arc_conditional_register_usage): Handle
 657         reduced register file case.
 658         (arc_file_start): Set must have build attributes.
 659         * config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
 660         mrf16 option value.
 661         * config/arc/arc.opt (mrf16): Add new option.
 662         * config/arc/elf.h (ATTRIBUTE_PCS): Define.
 663         * config/arc/genmultilib.awk: Handle new mrf16 option.
 664         * config/arc/linux.h (ATTRIBUTE_PCS): Define.
 665         * config/arc/t-multilib: Regenerate.
 666         * doc/invoke.texi (ARC Options): Document mrf16 option.
 667
 668 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 669
 670         * config/arc/arc-protos.h: Add arc_is_secure_call_p proto.
 671         * config/arc/arc.c (arc_handle_secure_attribute): New function.
 672         (arc_attribute_table): Add 'secure_call' attribute.
 673         (arc_print_operand): Print secure call operand.
 674         (arc_function_ok_for_sibcall): Don't optimize tail calls when
 675         secure.
 676         (arc_is_secure_call_p): New function.  * config/arc/arc.md
 677         (call_i): Add support for sjli instruction.
 678         (call_value_i): Likewise.
 679         * config/arc/constraints.md (Csc): New constraint.
 680
 681 2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
 682             John Eric Martin <John.Martin@emmicro-us.com>
 683
 684         * config/arc/arc-protos.h: Add arc_is_jli_call_p proto.
 685         * config/arc/arc.c (_arc_jli_section): New struct.
 686         (arc_jli_section): New type.
 687         (rc_jli_sections): New static variable.
 688         (arc_handle_jli_attribute): New function.
 689         (arc_attribute_table): Add jli_always and jli_fixed attribute.
 690         (arc_file_end): New function.
 691         (TARGET_ASM_FILE_END): Define.
 692         (arc_print_operand): Reuse 'S' letter for JLI output instruction.
 693         (arc_add_jli_section): New function.
 694         (jli_call_scan): Likewise.
 695         (arc_reorg): Call jli_call_scan.
 696         (arc_output_addsi): Remove 'S' from printing asm operand.
 697         (arc_is_jli_call_p): New function.
 698         * config/arc/arc.md (movqi_insn): Remove 'S' from printing asm
 699         operand.
 700         (movhi_insn): Likewise.
 701         (movsi_insn): Likewise.
 702         (movsi_set_cc_insn): Likewise.
 703         (loadqi_update): Likewise.
 704         (load_zeroextendqisi_update): Likewise.
 705         (load_signextendqisi_update): Likewise.
 706         (loadhi_update): Likewise.
 707         (load_zeroextendhisi_update): Likewise.
 708         (load_signextendhisi_update): Likewise.
 709         (loadsi_update): Likewise.
 710         (loadsf_update): Likewise.
 711         (movsicc_insn): Likewise.
 712         (bset_insn): Likewise.
 713         (bxor_insn): Likewise.
 714         (bclr_insn): Likewise.
 715         (bmsk_insn): Likewise.
 716         (bicsi3_insn): Likewise.
 717         (cmpsi_cc_c_insn): Likewise.
 718         (movsi_ne): Likewise.
 719         (movsi_cond_exec): Likewise.
 720         (clrsbsi2): Likewise.
 721         (norm_f): Likewise.
 722         (normw): Likewise.
 723         (swap): Likewise.
 724         (divaw): Likewise.
 725         (flag): Likewise.
 726         (sr): Likewise.
 727         (kflag): Likewise.
 728         (ffs): Likewise.
 729         (ffs_f): Likewise.
 730         (fls): Likewise.
 731         (call_i): Remove 'S' asm letter, add jli instruction.
 732         (call_value_i): Likewise.
 733         * config/arc/arc.op (mjli-always): New option.
 734         * config/arc/constraints.md (Cji): New constraint.
 735         * config/arc/fpx.md (addsf3_fpx): Remove 'S' from printing asm
 736         operand.
 737         (subsf3_fpx): Likewise.
 738         (mulsf3_fpx): Likewise.
 739         * config/arc/simdext.md (vendrec_insn): Remove 'S' from printing
 740         asm operand.
 741         * doc/extend.texi (ARC): Document 'jli-always' and 'jli-fixed'
 742         function attrbutes.
 743         * doc/invoke.texi (ARC): Document mjli-always option.
 744
 745 2018-01-26  Sebastian Perta  <sebastian.perta@renesas.com>
 746
 747         * config/rl78/rl78.c: if operand 2 is const avoid addition with 0
 748         and use incw and decw where possible
 749         * testsuite/gcc.target/rl78/test_addsi3_internal.c: new file
 750
 751 2018-01-26  Richard Biener  <rguenther@suse.de>
 752
 753         PR tree-optimization/81082
 754         * fold-const.c (fold_plusminus_mult_expr): Do not perform the
 755         association if it requires casting to unsigned.
 756         * match.pd ((A * C) +- (B * C) -> (A+-B)): New patterns derived
 757         from fold_plusminus_mult_expr to catch important cases late when
 758         range info is available.
 759
 760 2018-01-26  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 761
 762         * config/i386/sol2.h (USE_HIDDEN_LINKONCE): Remove.
 763         * configure.ac (hidden_linkonce): New test.
 764         * configure: Regenerate.
 765         * config.in: Regenerate.
 766
 767 2018-01-26  Julia Koval  <julia.koval@intel.com>
 768
 769         * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
 770         _mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
 771         _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
 772         _mm_mask_bitshuffle_epi64_mask): Fix type.
 773         * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
 774         USI_FTYPE_V4DI_V4DI_USI): Remove.
 775         * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
 776         __builtin_ia32_vpshufbitqmb256_mask,
 777         __builtin_ia32_vpshufbitqmb128_mask): Fix types.
 778         * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
 779         * config/i386/sse.md (VI1_AVX512VLBW): Change types.
 780
 781 2018-01-26  Alan Modra  <amodra@gmail.com>
 782
 783         PR target/84033
 784         * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Exclude
 785         UNSPEC_VBPERMQ.  Sort other unspecs.
 786
 787 2018-01-25  David Edelsohn  <dje.gcc@gmail.com>
 788
 789         * doc/invoke.texi (PowerPC Options): Document 'native' cpu type.
 790
 791 2018-01-25  Jan Hubicka  <hubicka@ucw.cz>
 792
 793         PR middle-end/83055
 794         * predict.c (drop_profile): Do not push/pop cfun; update also
 795         node->count.
 796         (handle_missing_profiles): Fix logic looking for zero profiles.
 797
 798 2018-01-25  Jakub Jelinek  <jakub@redhat.com>
 799
 800         PR middle-end/83977
 801         * ipa-fnsummary.c (compute_fn_summary): Clear can_change_signature
 802         on functions with #pragma omp declare simd or functions with simd
 803         attribute.
 804         * omp-simd-clone.c (expand_simd_clones): Revert 2018-01-24 change.
 805         * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
 806         Remove trailing \n from warning_at calls.
 807
 808 2018-01-25  Tom de Vries  <tom@codesourcery.com>
 809
 810         PR target/84028
 811         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
 812         for neutered workers.
 813
 814 2018-01-24  Joseph Myers  <joseph@codesourcery.com>
 815
 816         PR target/68467
 817         * config/m68k/m68k.c (m68k_promote_function_mode): New function.
 818         (TARGET_PROMOTE_FUNCTION_MODE): New macro.
 819
 820 2018-01-24  Jeff Law  <law@redhat.com>
 821
 822         PR target/83994
 823         * i386.c (get_probe_interval): Move to earlier point.
 824         (ix86_compute_frame_layout): If -fstack-clash-protection and
 825         the frame is larger than the probe interval, then use pushes
 826         to save registers rather than reg->mem moves.
 827         (ix86_expand_prologue): Remove conditional for int_registers_saved
 828         assertion.
 829
 830 2018-01-24  Vladimir Makarov  <vmakarov@redhat.com>
 831
 832         PR target/84014
 833         * ira-build.c (setup_min_max_allocno_live_range_point): Set up
 834         min/max for never referenced object.
 835
 836 2018-01-24  Jakub Jelinek  <jakub@redhat.com>
 837
 838         PR middle-end/83977
 839         * tree.c (free_lang_data_in_decl): Don't clear DECL_ABSTRACT_ORIGIN
 840         here.
 841         * omp-low.c (create_omp_child_function): Remove "omp declare simd"
 842         attributes from DECL_ATTRIBUTES (decl) without affecting
 843         DECL_ATTRIBUTES (current_function_decl).
 844         * omp-simd-clone.c (expand_simd_clones): Ignore DECL_ARTIFICIAL
 845         functions with non-NULL DECL_ABSTRACT_ORIGIN.
 846
 847 2018-01-24  Richard Sandiford  <richard.sandiford@linaro.org>
 848
 849         PR tree-optimization/83979
 850         * fold-const.c (fold_comparison): Use constant_boolean_node
 851         instead of boolean_{true,false}_node.
 852
 853 2018-01-24  Jan Hubicka  <hubicka@ucw.cz>
 854
 855         * ipa-profile.c (ipa_propagate_frequency_1): Fix logic skipping calls
 856         with zero counts.
 857
 858 2018-01-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 859
 860         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
 861         Simplify the clause that sets the length attribute.
 862         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
 863         (*sibcall_nonlocal_sysv<mode>): Clean up code block; simplify the
 864         clause that sets the length attribute.
 865         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
 866
 867 2018-01-24  Tom de Vries  <tom@codesourcery.com>
 868
 869         PR target/83589
 870         * config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_2): Define to 1.
 871         (nvptx_pc_set, nvptx_condjump_label): New function. Copy from jump.c.
 872         Add strict parameter.
 873         (prevent_branch_around_nothing): Insert dummy insn between branch to
 874         label and label with no ptx insn inbetween.
 875         * config/nvptx/nvptx.md (define_insn "fake_nop"): New insn.
 876
 877 2018-01-24  Tom de Vries  <tom@codesourcery.com>
 878
 879         PR target/81352
 880         * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
 881         for neutered threads in warp.
 882         * config/nvptx/nvptx.md (define_insn "exit"): New insn.
 883
 884 2018-01-24  Richard Biener  <rguenther@suse.de>
 885
 886         PR tree-optimization/83176
 887         * tree-chrec.c (chrec_fold_plus_1): Handle (signed T){(T) .. }
 888         operands.
 889
 890 2018-01-24  Richard Biener  <rguenther@suse.de>
 891
 892         PR tree-optimization/82819
 893         * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
 894         code generating pluses that are no-ops in the target precision.
 895
 896 2018-01-24  Richard Biener  <rguenther@suse.de>
 897
 898         PR middle-end/84000
 899         * tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind.
 900
 901 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
 902
 903         * cfgcleanup.c (try_crossjump_to_edge): Use combine_with_count
 904         to merge probabilities.
 905         * predict.c (probably_never_executed): Also mark as cold functions
 906         with global 0 profile and guessed local profile.
 907         * profile-count.c (profile_probability::combine_with_count): New
 908         member function.
 909         * profile-count.h (profile_probability::operator*,
 910         profile_probability::operator*=, profile_probability::operator/,
 911         profile_probability::operator/=): Reduce precision to adjusted
 912         and set value to guessed on contradictory divisions.
 913         (profile_probability::combine_with_freq): Remove.
 914         (profile_probability::combine_wiht_count): Declare.
 915         (profile_count::force_nonzero):: Set to adjusted.
 916         (profile_count::probability_in):: Set quality to adjusted.
 917         * tree-ssa-tail-merge.c (replace_block_by): Use
 918         combine_with_count.
 919
 920 2018-01-23  Andrew Waterman  <andrew@sifive.com>
 921             Jim Wilson  <jimw@sifive.com>
 922
 923         * config/riscv/riscv.c (riscv_stack_boundary): New.
 924         (riscv_option_override): Set riscv_stack_boundary.  Handle
 925         riscv_preferred_stack_boundary_arg.
 926         * config/riscv/riscv.h (MIN_STACK_BOUNDARY, ABI_STACK_BOUNDARY): New.
 927         (BIGGEST_ALIGNMENT): Set to STACK_BOUNDARY.
 928         (STACK_BOUNDARY): Set to riscv_stack_boundary.
 929         (RISCV_STACK_ALIGN): Use STACK_BOUNDARY.
 930         * config/riscv/riscv.opt (mpreferred-stack-boundary): New.
 931         * doc/invoke.tex (RISC-V Options): Add -mpreferred-stack-boundary.
 932
 933 2018-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 934
 935         PR target/83905
 936         * config/i386/i386.c (ix86_expand_prologue): Use cost reference
 937         of struct ix86_frame.
 938         (ix86_expand_epilogue): Likewise.  Add a local variable for
 939         the reg_save_offset field in struct ix86_frame.
 940
 941 2018-01-23  Bin Cheng  <bin.cheng@arm.com>
 942
 943         PR tree-optimization/82604
 944         * tree-loop-distribution.c (enum partition_kind): New enum item
 945         PKIND_PARTIAL_MEMSET.
 946         (partition_builtin_p): Support above new enum item.
 947         (generate_code_for_partition): Ditto.
 948         (compute_access_range): Differentiate cases that equality can be
 949         proven at all loops, the innermost loops or no loops.
 950         (classify_builtin_st, classify_builtin_ldst): Adjust call to above
 951         function.  Set PKIND_PARTIAL_MEMSET for partition appropriately.
 952         (finalize_partitions, distribute_loop): Don't fuse partition of
 953         PKIND_PARTIAL_MEMSET kind when distributing 3-level loop nest.
 954         (prepare_perfect_loop_nest): Distribute 3-level loop nest only if
 955         parloop is enabled.
 956
 957 2018-01-23  Martin Liska  <mliska@suse.cz>
 958
 959         * predict.def (PRED_INDIR_CALL): Set probability to PROB_EVEN in
 960         order to ignore the predictor.
 961         (PRED_POLYMORPHIC_CALL): Likewise.
 962         (PRED_RECURSIVE_CALL): Likewise.
 963
 964 2018-01-23  Martin Liska  <mliska@suse.cz>
 965
 966         * tree-profile.c (tree_profiling): Print function header to
 967         aware reader which function we are working on.
 968         * value-prof.c (gimple_find_values_to_profile): Do not print
 969         not interesting value histograms.
 970
 971 2018-01-23  Martin Liska  <mliska@suse.cz>
 972
 973         * profile-count.h (enum profile_quality): Add
 974         profile_uninitialized as the first value. Do not number values
 975         as they are zero based.
 976         (profile_count::verify): Update sanity check.
 977         (profile_probability::verify): Likewise.
 978
 979 2018-01-23  Nathan Sidwell  <nathan@acm.org>
 980
 981         * doc/invoke.texi (ffor-scope): Deprecate.
 982
 983 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
 984
 985         PR tree-optimization/83510
 986         * domwalk.c (set_all_edges_as_executable): New function.
 987         (dom_walker::dom_walker): Convert bool param
 988         "skip_unreachable_blocks" to enum reachability.  Move setup of
 989         edge flags to set_all_edges_as_executable and only do it when
 990         reachability is REACHABLE_BLOCKS.
 991         * domwalk.h (enum dom_walker::reachability): New enum.
 992         (dom_walker::dom_walker): Convert bool param
 993         "skip_unreachable_blocks" to enum reachability.
 994         (set_all_edges_as_executable): New decl.
 995         * graphite-scop-detection.c  (gather_bbs::gather_bbs): Convert
 996         from false for "skip_unreachable_blocks" to ALL_BLOCKS for
 997         "reachability".
 998         * tree-ssa-dom.c (dom_opt_dom_walker::dom_opt_dom_walker): Likewise,
 999         but converting true to REACHABLE_BLOCKS.
1000         * tree-ssa-sccvn.c (sccvn_dom_walker::sccvn_dom_walker): Likewise.
1001         * tree-vrp.c
1002         (check_array_bounds_dom_walker::check_array_bounds_dom_walker):
1003         Likewise, but converting it to REACHABLE_BLOCKS_PRESERVING_FLAGS.
1004         (vrp_dom_walker::vrp_dom_walker): Likewise, but converting it to
1005         REACHABLE_BLOCKS.
1006         (vrp_prop::vrp_finalize): Call set_all_edges_as_executable
1007         if check_all_array_refs will be called.
1008
1009 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
1010
1011         * tree.c (selftest::test_location_wrappers): Add more test
1012         coverage.
1013
1014 2018-01-23  David Malcolm  <dmalcolm@redhat.com>
1015
1016         * sbitmap.c (selftest::test_set_range): Fix memory leaks.
1017         (selftest::test_bit_in_range): Likewise.
1018
1019 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
1020
1021         PR testsuite/83888
1022         * doc/sourcebuild.texi (vect_float): Say that the selector
1023         only describes the situation when -funsafe-math-optimizations is on.
1024         (vect_float_strict): Document.
1025
1026 2018-01-23  Richard Sandiford  <richard.sandiford@linaro.org>
1027
1028         PR tree-optimization/83965
1029         * tree-vect-patterns.c (vect_reassociating_reduction_p): New function.
1030         (vect_recog_dot_prod_pattern, vect_recog_sad_pattern): Use it
1031         instead of checking only for a reduction.
1032         (vect_recog_widen_sum_pattern): Likewise.
1033
1034 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
1035
1036         * predict.c (probably_never_executed): Only use precise profile info.
1037         (compute_function_frequency): Skip after inlining hack since we now
1038         have quality checking.
1039
1040 2018-01-23  Jan Hubicka  <hubicka@ucw.cz>
1041
1042         * profile-count.h (profile_probability::very_unlikely,
1043         profile_probability::unlikely, profile_probability::even): Set
1044         precision to guessed.
1045
1046 2018-01-23  Richard Biener  <rguenther@suse.de>
1047
1048         PR tree-optimization/83963
1049         * graphite-scop-detection.c (scop_detection::harmful_loop_in_region):
1050         Properly terminate dominator walk when crossing the exit edge not
1051         when visiting its source block.
1052
1053 2018-01-23  Jakub Jelinek  <jakub@redhat.com>
1054
1055         PR c++/83918
1056         * tree.c (maybe_wrap_with_location): Use NON_LVALUE_EXPR rather than
1057         VIEW_CONVERT_EXPR to wrap CONST_DECLs.
1058
1059 2018-01-22  Jakub Jelinek  <jakub@redhat.com>
1060
1061         PR tree-optimization/83957
1062         * omp-expand.c (expand_omp_for_generic): Ignore virtual PHIs.  Remove
1063         semicolon after for body surrounded by braces.
1064
1065         PR tree-optimization/83081
1066         * profile-count.h (profile_probability::split): New method.
1067         * dojump.c (do_jump_1) <case TRUTH_ANDIF_EXPR, case TRUTH_ORIF_EXPR>:
1068         Use profile_probability::split.
1069         (do_compare_rtx_and_jump): Fix adjustment of probabilities
1070         when splitting a single conditional jump into 2.
1071
1072 2018-01-22  David Malcolm  <dmalcolm@redhat.com>
1073
1074         PR tree-optimization/69452
1075         * tree-ssa-loop-im.c (class move_computations_dom_walker): Remove
1076         decl.
1077
1078 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1079
1080         * config/rl78/rl78-expand.md: New define_expand "bswaphi2"
1081         * config/rl78/rl78-virt.md: New define_insn "*bswaphi2_virt"
1082         * config/rl78/rl78-real.md: New define_insn "*bswaphi2_real"
1083
1084 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1085
1086         * config/rl78/rl78-protos.h: New function declaration rl78_split_movdi
1087         * config/rl78/rl78.md: New define_expand "movdi"
1088         * config/rl78/rl78.c: New function definition rl78_split_movdi
1089
1090 2018-01-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
1091
1092         PR target/83862
1093         * config/rs6000/rs6000-protos.h (rs6000_split_signbit): Delete,
1094         no longer used.
1095         * config/rs6000/rs6000.c (rs6000_split_signbit): Likewise.
1096         * config/rs6000/rs6000.md (signbit<mode>2): Change code for IEEE
1097         128-bit to produce an UNSPEC move to get the double word with the
1098         signbit and then a shift directly to do signbit.
1099         (signbit<mode>2_dm): Replace old IEEE 128-bit signbit
1100         implementation with a new version that just does either a direct
1101         move or a regular move.  Move memory interface to separate insns.
1102         Move insns so they are next to the expander.
1103         (signbit<mode>2_dm_mem_be): New combiner insns to combine load
1104         with signbit move.  Split big and little endian case.
1105         (signbit<mode>2_dm_mem_le): Likewise.
1106         (signbit<mode>2_dm_<su>ext): Delete, no longer used.
1107         (signbit<mode>2_dm2): Likewise.
1108
1109 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1110
1111         * config/rl78/rl78.md: New define_expand "anddi3".
1112
1113 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1114
1115         * config/rl78/rl78.md: New define_expand "umindi3".
1116
1117 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1118
1119         * config/rl78/rl78.md: New define_expand "smindi3".
1120
1121 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1122
1123         * config/rl78/rl78.md: New define_expand "smaxdi3".
1124
1125 2018-01-22 Carl Love <cel@us.ibm.com>
1126
1127         * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
1128         LVX_V1TI): Add macro expansion.
1129         * config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
1130         definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
1131         VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
1132         * config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
1133         Change check to determine if the instruction is a byte reversing
1134         entry.  Fix typo in comment.
1135         * config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
1136         for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
1137         Add def_builtin calls for new builtins.
1138         * config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
1139         Add define_insn expansion.
1140
1141 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1142
1143         * config/rl78/rl78.md: New define_expand "umaxdi3".
1144
1145 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
1146
1147         * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
1148         for non-QImode registers
1149
1150 2018-01-22  Richard Biener  <rguenther@suse.de>
1151
1152         PR tree-optimization/83963
1153         * graphite-scop-detection.c (scop_detection::get_sese): Delay
1154         including the loop exit block.
1155         (scop_detection::merge_sese): Likewise.
1156         (scop_detection::add_scop): Do it here instead.
1157
1158 2018-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1159
1160         * doc/sourcebuild.texi (arm_softfloat): Document.
1161
1162 2018-01-21  John David Anglin  <danglin@gcc.gnu.org>
1163
1164         PR gcc/77734
1165         * config/pa/pa.c (pa_function_ok_for_sibcall): Use
1166         targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
1167         Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
1168
1169 2018-01-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1170             David Edelsohn <dje.gcc@gmail.com>
1171
1172         PR target/83946
1173         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
1174         Change "crset eq" to "crset 2".
1175         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
1176         (*call_indirect_aix<mode>_nospec): Likewise.
1177         (*call_value_indirect_aix<mode>_nospec): Likewise.
1178         (*call_indirect_elfv2<mode>_nospec): Likewise.
1179         (*call_value_indirect_elfv2<mode>_nospec): Likewise.
1180         (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
1181         change assembly output from . to $.
1182         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
1183         (indirect_jump<mode>_nospec): Change assembly output from . to $.
1184         (*tablejump<mode>_internal1_nospec): Likewise.
1185
1186 2018-01-21  Oleg Endo  <olegendo@gcc.gnu.org>
1187
1188         PR target/80870
1189         * config/sh/sh_optimize_sett_clrt.cc:
1190         Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
1191
1192 2018-01-20  Richard Sandiford  <richard.sandiford@linaro.org>
1193
1194         PR tree-optimization/83940
1195         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
1196         offset_dt to vect_constant_def rather than vect_unknown_def_type.
1197         (vect_check_load_store_mask): Add a mask_dt_out parameter and
1198         use it to pass back the definition type.
1199         (vect_check_store_rhs): Likewise rhs_dt_out.
1200         (vect_build_gather_load_calls): Add a mask_dt argument and use
1201         it instead of a call to vect_is_simple_use.
1202         (vectorizable_store): Update calls to vect_check_load_store_mask
1203         and vect_check_store_rhs.  Use the dt returned by the latter instead
1204         of scatter_src_dt.  Use the cached mask_dt and gs_info.offset_dt
1205         instead of calls to vect_is_simple_use.  Pass the scalar rather
1206         than the vector operand to vect_is_simple_use when handling
1207         second and subsequent copies of an rhs value.
1208         (vectorizable_load): Update calls to vect_check_load_store_mask
1209         and vect_build_gather_load_calls.  Use the cached mask_dt and
1210         gs_info.offset_dt instead of calls to vect_is_simple_use.
1211
1212 2018-01-20  Jakub Jelinek  <jakub@redhat.com>
1213
1214         PR middle-end/83945
1215         * tree-emutls.c: Include gimplify.h.
1216         (lower_emutls_2): New function.
1217         (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
1218         with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
1219         it before further processing.
1220
1221         PR target/83930
1222         * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
1223         UINTVAL (trueop1) instead of INTVAL (op1).
1224
1225 2018-01-19  Jakub Jelinek  <jakub@redhat.com>
1226
1227         PR debug/81570
1228         PR debug/83728
1229         * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
1230         INCOMING_FRAME_SP_OFFSET if not defined.
1231         (scan_trace): Add ENTRY argument.  If true and
1232         DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
1233         emit a note to adjust the CFA offset.
1234         (create_cfi_notes): Adjust scan_trace callers.
1235         (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
1236         INCOMING_FRAME_SP_OFFSET in the CIE.
1237         * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
1238         * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
1239         Likewise.
1240         * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
1241         * doc/tm.texi: Regenerated.
1242
1243 2018-01-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
1244
1245         PR rtl-optimization/83147
1246         * lra-constraints.c (remove_inheritance_pseudos): Use
1247         lra_substitute_pseudo_within_insn.
1248
1249 2018-01-19  Tom de Vries  <tom@codesourcery.com>
1250             Cesar Philippidis  <cesar@codesourcery.com>
1251
1252         PR target/83920
1253         * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
1254
1255 2018-01-19  Cesar Philippidis  <cesar@codesourcery.com>
1256
1257         PR target/83790
1258         * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
1259         spaces for function labels.
1260
1261 2018-01-19  Martin Liska  <mliska@suse.cz>
1262
1263         * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
1264         (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
1265         (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
1266         (PRED_OPCODE_POSITIVE): Change from 64 to 59.
1267         (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
1268         (PRED_CONST_RETURN): Change from 69 to 65.
1269         (PRED_NULL_RETURN): Change from 91 to 71.
1270         (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
1271         (PRED_LOOP_GUARD): Change from 66 to 73.
1272
1273 2018-01-19  Martin Liska  <mliska@suse.cz>
1274
1275         * predict.c (predict_insn_def): Add new assert.
1276         (struct branch_predictor): Change type to signed integer.
1277         (test_prediction_value_range): Amend test to cover
1278         PROB_UNINITIALIZED.
1279         * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
1280         (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
1281         (PRED_LOOP_ITERATIONS_MAX): Likewise.
1282         (PRED_LOOP_IV_COMPARE): Likewise.
1283         * predict.h (PROB_UNINITIALIZED): Define new constant.
1284
1285 2018-01-19  Martin Liska  <mliska@suse.cz>
1286
1287         * predict.c (dump_prediction): Add new format for
1288         analyze_brprob.py script which is enabled with -details
1289         suboption.
1290         * profile-count.h (precise_p): New function.
1291
1292 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
1293
1294         PR tree-optimization/83922
1295         * tree-vect-loop.c (vect_verify_full_masking): Return false if
1296         there are no statements that need masking.
1297         (vect_active_double_reduction_p): New function.
1298         (vect_analyze_loop_operations): Use it when handling phis that
1299         are not in the loop header.
1300
1301 2018-01-19  Richard Sandiford  <richard.sandiford@linaro.org>
1302
1303         PR tree-optimization/83914
1304         * tree-vect-loop.c (vectorizable_induction): Don't convert
1305         init_expr or apply the peeling adjustment for inductions
1306         that are nested within the vectorized loop.
1307
1308 2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1309
1310         * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
1311         instead of NEG.
1312
1313 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
1314
1315         PR sanitizer/81715
1316         PR testsuite/83882
1317         * function.h (gimplify_parameters): Add gimple_seq * argument.
1318         * function.c: Include gimple.h and options.h.
1319         (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
1320         for the added local temporaries if needed.
1321         * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
1322         if there are any parameter cleanups, wrap whole body into a
1323         try/finally with the cleanups.
1324
1325 2018-01-18  Wilco Dijkstra  <wdijkstr@arm.com>
1326
1327         PR target/82964
1328         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
1329         Use GET_MODE_CLASS for scalar floating point.
1330
1331 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
1332
1333         PR ipa/82256
1334         patch by PaX Team
1335         * cgraphclones.c (cgraph_node::create_version_clone_with_body):
1336         Fix call of call_cgraph_insertion_hooks.
1337
1338 2018-01-18  Martin Sebor  <msebor@redhat.com>
1339
1340         * doc/invoke.texi (-Wclass-memaccess): Tweak text.
1341
1342 2018-01-18  Jan Hubicka  <hubicka@ucw.cz>
1343
1344         PR ipa/83619
1345         * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
1346         frequencies.
1347
1348 2018-01-18  Boris Kolpackov  <boris@codesynthesis.com>
1349
1350         PR other/70268
1351         * common.opt: (-ffile-prefix-map): New option.
1352         * opts.c (common_handle_option): Defer it.
1353         * opts-global.c (handle_common_deferred_options): Handle it.
1354         * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
1355         * file-prefix-map.h: New file.
1356         (remap_debug_filename, add_debug_prefix_map): ...here.
1357         (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
1358         * final.c (debug_prefix_map, add_debug_prefix_map
1359         remap_debug_filename): Move to...
1360         * file-prefix-map.c: New file.
1361         (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
1362         generalize, get rid of alloca(), use strrchr() instead of strchr().
1363         (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
1364         Implement in terms of add_prefix_map().
1365         (remap_macro_filename, remap_debug_filename): Implement in term of
1366         remap_filename().
1367         * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
1368         * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
1369         * dbxout.c: Include file-prefix-map.h.
1370         * varasm.c: Likewise.
1371         * vmsdbgout.c: Likewise.
1372         * xcoffout.c: Likewise.
1373         * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
1374         * doc/cppopts.texi (-fmacro-prefix-map): Document.
1375         * doc/invoke.texi (-ffile-prefix-map): Document.
1376         (-fdebug-prefix-map): Update description.
1377
1378 2018-01-18  Martin Liska  <mliska@suse.cz>
1379
1380         * config/i386/i386.c (indirect_thunk_name): Document that also
1381         lfence is emitted.
1382         (output_indirect_thunk): Document why both instructions
1383         (pause and lfence) are generated.
1384
1385 2018-01-18  Richard Biener  <rguenther@suse.de>
1386
1387         PR tree-optimization/83887
1388         * graphite-scop-detection.c
1389         (scop_detection::get_nearest_dom_with_single_entry): Remove.
1390         (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
1391         (scop_detection::merge_sese): Re-implement with a flood-fill
1392         algorithm that properly finds a SESE region if it exists.
1393
1394 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
1395
1396         PR c/61240
1397         * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
1398         pointer_diff optimizations use view_convert instead of convert.
1399
1400 2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1401
1402         * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
1403         Generate different code for -mno-speculate-indirect-jumps.
1404         (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
1405         (*call_indirect_aix<mode>): Disable for
1406         -mno-speculate-indirect-jumps.
1407         (*call_indirect_aix<mode>_nospec): New define_insn.
1408         (*call_value_indirect_aix<mode>): Disable for
1409         -mno-speculate-indirect-jumps.
1410         (*call_value_indirect_aix<mode>_nospec): New define_insn.
1411         (*sibcall_nonlocal_sysv<mode>): Generate different code for
1412         -mno-speculate-indirect-jumps.
1413         (*sibcall_value_nonlocal_sysv<mode>): Likewise.
1414
1415 2018-01-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
1416
1417         * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
1418         long double type, set the flags for noting the default long double
1419         type, even if we don't pass or return a long double type.
1420
1421 2018-01-17  Jan Hubicka  <hubicka@ucw.cz>
1422
1423         PR ipa/83051
1424         * ipa-inline.c (flatten_function): Do not overwrite final inlining
1425         failure.
1426
1427 2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>
1428
1429         * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
1430         support for merge[hl].
1431         (fold_mergehl_helper): New helper function.
1432         (tree-vector-builder.h): New #include for tree_vector_builder usage.
1433         * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
1434         (altivec_vmrglw_direct): Add xxmrglw insn.
1435
1436 2018-01-17  Andrew Waterman  <andrew@sifive.com>
1437
1438         * config/riscv/riscv.c (riscv_conditional_register_usage): If
1439         UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
1440
1441 2018-01-17  David Malcolm  <dmalcolm@redhat.com>
1442
1443         PR lto/83121
1444         * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
1445         call the lto_location_cache before reading the
1446         DECL_SOURCE_LOCATION of the types.
1447
1448 2018-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
1449             Richard Sandiford  <richard.sandiford@linaro.org>
1450
1451         * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
1452         * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
1453         (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
1454         SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
1455         * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
1456         Add declaration.
1457         * config/aarch64/constraints.md (aarch64_movti_operand):
1458         Limit immediates.
1459         * config/aarch64/predicates.md (Uti): Add new constraint.
1460
1461 2018-01-17 Carl Love  <cel@us.ibm.com>
1462         * config/rs6000/vsx.md (define_expand xl_len_r,
1463         define_expand stxvl, define_expand *stxvl): Add match_dup argument.
1464         (define_insn): Add, match_dup 1 argument to define_insn stxvll and
1465         lxvll.
1466         (define_expand, define_insn): Move the shift left from  the
1467         define_insn to the define_expand for lxvl and stxvl instructions.
1468         * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
1469         and XL_LEN_R definitions to PURE.
1470
1471 2018-01-17  Uros Bizjak  <ubizjak@gmail.com>
1472
1473         * config/i386/i386.c (indirect_thunk_name): Declare regno
1474         as unsigned int.  Compare regno with INVALID_REGNUM.
1475         (output_indirect_thunk): Ditto.
1476         (output_indirect_thunk_function): Ditto.
1477         (ix86_code_end): Declare regno as unsigned int.  Use INVALID_REGNUM
1478         in the call to output_indirect_thunk_function.
1479
1480 2018-01-17  Richard Sandiford  <richard.sandiford@linaro.org>
1481
1482         PR middle-end/83884
1483         * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
1484         rather than the size of inner_type to determine the stack slot size
1485         when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
1486
1487 2018-01-16  Sebastian Peryt  <sebastian.peryt@intel.com>
1488
1489         PR target/83546
1490         * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
1491         to PTA_SILVERMONT.
1492
1493 2018-01-16  Michael Meissner  <meissner@linux.vnet.ibm.com>
1494
1495         * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
1496         endian Linux systems to optionally enable multilibs for selecting
1497         the long double type if the user configured an explicit type.
1498         * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
1499         have no long double multilibs if not defined.
1500         * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
1501         warn if the user used -mabi={ieee,ibm}longdouble and we built
1502         multilibs for long double.
1503         * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
1504         appropriate multilib option.
1505         (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
1506         multilib options.
1507         * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
1508         for building long double multilibs.
1509         * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
1510
1511 2018-01-16  John David Anglin  <danglin@gcc.gnu.org>
1512
1513         * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
1514         copies.
1515
1516         * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
1517         64 bits.
1518         * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
1519         128 bits.
1520
1521         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
1522         variables.
1523
1524         * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
1525         return value.
1526
1527 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
1528
1529         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
1530         ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
1531
1532 2018-01-16  Kelvin Nilsen  <kelvin@gcc.gnu.org>
1533
1534         * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
1535         different rtl trees depending on TARGET_64BIT.
1536         (rs6000_gen_lvx): Likewise.
1537
1538 2018-01-16  Eric Botcazou  <ebotcazou@adacore.com>
1539
1540         * config/visium/visium.md (nop): Tweak comment.
1541         (hazard_nop): Likewise.
1542
1543 2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1544
1545         * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
1546         -mspeculate-indirect-jumps.
1547         * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
1548         for -mno-speculate-indirect-jumps.
1549         (*call_indirect_elfv2<mode>_nospec): New define_insn.
1550         (*call_value_indirect_elfv2<mode>): Disable for
1551         -mno-speculate-indirect-jumps.
1552         (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
1553         (indirect_jump): Emit different RTL for
1554         -mno-speculate-indirect-jumps.
1555         (*indirect_jump<mode>): Disable for
1556         -mno-speculate-indirect-jumps.
1557         (*indirect_jump<mode>_nospec): New define_insn.
1558         (tablejump): Emit different RTL for
1559         -mno-speculate-indirect-jumps.
1560         (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
1561         (tablejumpsi_nospec): New define_expand.
1562         (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
1563         (tablejumpdi_nospec): New define_expand.
1564         (*tablejump<mode>_internal1): Disable for
1565         -mno-speculate-indirect-jumps.
1566         (*tablejump<mode>_internal1_nospec): New define_insn.
1567         * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
1568         option.
1569
1570 2018-01-16  Artyom Skrobov tyomitch@gmail.com
1571
1572         * caller-save.c (insert_save): Drop unnecessary parameter.  All
1573         callers updated.
1574
1575 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1576             Richard Biener  <rguenth@suse.de>
1577
1578         PR libgomp/83590
1579         * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
1580         return early, inline manually is_gimple_sizepos.  Make sure if we
1581         call gimplify_expr we don't end up with a gimple constant.
1582         * tree.c (variably_modified_type_p): Don't return true for
1583         is_gimple_constant (_t).  Inline manually is_gimple_sizepos.
1584         * gimplify.h (is_gimple_sizepos): Remove.
1585
1586 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1587
1588         PR tree-optimization/83857
1589         * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
1590         vectorizable_live_operation for pure SLP statements.
1591         (vectorizable_live_operation): Handle PHIs.
1592
1593 2018-01-16  Richard Biener  <rguenther@suse.de>
1594
1595         PR tree-optimization/83867
1596         * tree-vect-stmts.c (vect_transform_stmt): Precompute
1597         nested_in_vect_loop_p since the scalar stmt may get invalidated.
1598
1599 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1600
1601         PR c/83844
1602         * stor-layout.c (handle_warn_if_not_align): Use byte_position and
1603         multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
1604         If off is not INTEGER_CST, issue a may not be aligned warning
1605         rather than isn't aligned.  Use isn%'t rather than isn't.
1606         * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
1607         into MULT_EXPR.
1608         <case MULT_EXPR>: Improve the case when bottom and one of the
1609         MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
1610         operand, in that case check if the other operand is multiple of
1611         bottom divided by the INTEGER_CST operand.
1612
1613 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1614
1615         PR target/83858
1616         * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
1617         * config/pa/pa-protos.h (pa_function_arg_size): Declare.
1618         * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
1619         pa_function_arg_size instead of FUNCTION_ARG_SIZE.
1620         * config/pa/pa.c (pa_function_arg_advance): Likewise.
1621         (pa_function_arg, pa_arg_partial_bytes): Likewise.
1622         (pa_function_arg_size): New function.
1623
1624 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1625
1626         * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
1627         in a separate statement.
1628
1629 2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>
1630
1631         PR tree-optimization/83847
1632         * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
1633         group gathers and scatters.
1634
1635 2018-01-16  Jakub Jelinek  <jakub@redhat.com>
1636
1637         PR rtl-optimization/86620
1638         * params.def (max-sched-ready-insns): Bump minimum value to 1.
1639
1640         PR rtl-optimization/83213
1641         * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
1642         to last if both are JUMP_INSNs.
1643
1644         PR tree-optimization/83843
1645         * gimple-ssa-store-merging.c
1646         (imm_store_chain_info::output_merged_store): Handle bit_not_p on
1647         store_immediate_info for bswap/nop orig_stores.
1648
1649 2018-01-15  Andrew Waterman  <andrew@sifive.com>
1650
1651         * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
1652         !TARGET_MUL.
1653         <UDIV>: Increase cost if !TARGET_DIV.
1654
1655 2018-01-15  Segher Boessenkool  <segher@kernel.crashing.org>
1656
1657         * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
1658         (define_attr "cr_logical_3op"): New.
1659         (cceq_ior_compare): Adjust.
1660         (cceq_ior_compare_complement): Adjust.
1661         (*cceq_rev_compare): Adjust.
1662         * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
1663         (is_cracked_insn): Adjust.
1664         (insn_must_be_first_in_group): Adjust.
1665         * config/rs6000/40x.md: Adjust.
1666         * config/rs6000/440.md: Adjust.
1667         * config/rs6000/476.md: Adjust.
1668         * config/rs6000/601.md: Adjust.
1669         * config/rs6000/603.md: Adjust.
1670         * config/rs6000/6xx.md: Adjust.
1671         * config/rs6000/7450.md: Adjust.
1672         * config/rs6000/7xx.md: Adjust.
1673         * config/rs6000/8540.md: Adjust.
1674         * config/rs6000/cell.md: Adjust.
1675         * config/rs6000/e300c2c3.md: Adjust.
1676         * config/rs6000/e500mc.md: Adjust.
1677         * config/rs6000/e500mc64.md: Adjust.
1678         * config/rs6000/e5500.md: Adjust.
1679         * config/rs6000/e6500.md: Adjust.
1680         * config/rs6000/mpc.md: Adjust.
1681         * config/rs6000/power4.md: Adjust.
1682         * config/rs6000/power5.md: Adjust.
1683         * config/rs6000/power6.md: Adjust.
1684         * config/rs6000/power7.md: Adjust.
1685         * config/rs6000/power8.md: Adjust.
1686         * config/rs6000/power9.md: Adjust.
1687         * config/rs6000/rs64.md: Adjust.
1688         * config/rs6000/titan.md: Adjust.
1689
1690 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1691
1692         * config/i386/predicates.md (indirect_branch_operand): Rewrite
1693         ix86_indirect_branch_register logic.
1694
1695 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1696
1697         * config/i386/constraints.md (Bs): Update
1698         ix86_indirect_branch_register check.  Don't check
1699         ix86_indirect_branch_register with GOT_memory_operand.
1700         (Bw): Likewise.
1701         * config/i386/predicates.md (GOT_memory_operand): Don't check
1702         ix86_indirect_branch_register here.
1703         (GOT32_symbol_operand): Likewise.
1704
1705 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1706
1707         * config/i386/predicates.md (constant_call_address_operand):
1708         Rewrite ix86_indirect_branch_register logic.
1709         (sibcall_insn_operand): Likewise.
1710
1711 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1712
1713         * config/i386/constraints.md (Bs): Replace
1714         ix86_indirect_branch_thunk_register with
1715         ix86_indirect_branch_register.
1716         (Bw): Likewise.
1717         * config/i386/i386.md (indirect_jump): Likewise.
1718         (tablejump): Likewise.
1719         (*sibcall_memory): Likewise.
1720         (*sibcall_value_memory): Likewise.
1721         Peepholes of indirect call and jump via memory: Likewise.
1722         * config/i386/i386.opt: Likewise.
1723         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1724         (GOT_memory_operand): Likewise.
1725         (call_insn_operand): Likewise.
1726         (sibcall_insn_operand): Likewise.
1727         (GOT32_symbol_operand): Likewise.
1728
1729 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1730
1731         PR middle-end/83837
1732         * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
1733         type rather than type addr's type points to.
1734         (expand_omp_atomic_mutex): Likewise.
1735         (expand_omp_atomic): Likewise.
1736
1737 2018-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1738
1739         PR target/83839
1740         * config/i386/i386.c (output_indirect_thunk_function): Use
1741         ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
1742         for  __x86_return_thunk.
1743
1744 2018-01-15  Richard Biener  <rguenther@suse.de>
1745
1746         PR middle-end/83850
1747         * expmed.c (extract_bit_field_1): Fix typo.
1748
1749 2018-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1750
1751         PR target/83687
1752         * config/arm/iterators.md (VF): New mode iterator.
1753         * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
1754         Remove integer-related logic from pattern.
1755         (neon_vabd<mode>_3): Likewise.
1756
1757 2018-01-15  Jakub Jelinek  <jakub@redhat.com>
1758
1759         PR middle-end/82694
1760         * common.opt (fstrict-overflow): No longer an alias.
1761         (fwrapv-pointer): New option.
1762         * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
1763         also for pointer types based on flag_wrapv_pointer.
1764         * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
1765         opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
1766         opts->x_flag_wrapv got set.
1767         * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
1768         changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
1769         POINTER_TYPE_OVERFLOW_UNDEFINED.
1770         * match.pd: Likewise in address comparison pattern.
1771         * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
1772
1773 2018-01-15  Richard Biener  <rguenther@suse.de>
1774
1775         PR lto/83804
1776         * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
1777         from TYPE_FIELDS.  Free TYPE_BINFO if not used by devirtualization.
1778         Reset type names to their identifier if their TYPE_DECL doesn't
1779         have linkage (and thus is used for ODR and devirt).
1780         (save_debug_info_for_decl): Remove.
1781         (save_debug_info_for_type): Likewise.
1782         (add_tree_to_fld_list): Adjust.
1783         * tree-pretty-print.c (dump_generic_node): Make dumping of
1784         type names more robust.
1785
1786 2018-01-15  Richard Biener  <rguenther@suse.de>
1787
1788         * BASE-VER: Bump to 8.0.1.
1789
1790 2018-01-14  Martin Sebor  <msebor@redhat.com>
1791
1792         PR other/83508
1793         * builtins.c (check_access): Avoid warning when the no-warning bit
1794         is set.
1795
1796 2018-01-14  Cory Fields  <cory-nospam-@coryfields.com>
1797
1798         * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
1799         * ira-color (allocno_hard_regs_compare): Likewise.
1800
1801 2018-01-14  Nathan Rossi  <nathan@nathanrossi.com>
1802
1803         PR target/83013
1804         * config/microblaze/microblaze.c (microblaze_asm_output_ident):
1805         Use .pushsection/.popsection.
1806
1807 2018-01-14  Martin Sebor  <msebor@redhat.com>
1808
1809         PR c++/81327
1810         * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
1811
1812 2018-01-14  Jakub Jelinek  <jakub@redhat.com>
1813
1814         * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
1815         entry from extra_headers.
1816         (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
1817         extra_headers, make the list bitwise identical to the i?86-*-* one.
1818
1819 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1820
1821         * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
1822         -mcmodel=large with -mindirect-branch=thunk,
1823         -mindirect-branch=thunk-extern, -mfunction-return=thunk and
1824         -mfunction-return=thunk-extern.
1825         * doc/invoke.texi: Document -mcmodel=large is incompatible with
1826         -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
1827         -mfunction-return=thunk and -mfunction-return=thunk-extern.
1828
1829 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1830
1831         * config/i386/i386.c (print_reg): Print the name of the full
1832         integer register without '%'.
1833         (ix86_print_operand): Handle 'V'.
1834          * doc/extend.texi: Document 'V' modifier.
1835
1836 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1837
1838         * config/i386/constraints.md (Bs): Disallow memory operand for
1839         -mindirect-branch-register.
1840         (Bw): Likewise.
1841         * config/i386/predicates.md (indirect_branch_operand): Likewise.
1842         (GOT_memory_operand): Likewise.
1843         (call_insn_operand): Likewise.
1844         (sibcall_insn_operand): Likewise.
1845         (GOT32_symbol_operand): Likewise.
1846         * config/i386/i386.md (indirect_jump): Call convert_memory_address
1847         for -mindirect-branch-register.
1848         (tablejump): Likewise.
1849         (*sibcall_memory): Likewise.
1850         (*sibcall_value_memory): Likewise.
1851         Disallow peepholes of indirect call and jump via memory for
1852         -mindirect-branch-register.
1853         (*call_pop): Replace m with Bw.
1854         (*call_value_pop): Likewise.
1855         (*sibcall_pop_memory): Replace m with Bs.
1856         * config/i386/i386.opt (mindirect-branch-register): New option.
1857         * doc/invoke.texi: Document -mindirect-branch-register option.
1858
1859 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1860
1861         * config/i386/i386-protos.h (ix86_output_function_return): New.
1862         * config/i386/i386.c (ix86_set_indirect_branch_type): Also
1863         set function_return_type.
1864         (indirect_thunk_name): Add ret_p to indicate thunk for function
1865         return.
1866         (output_indirect_thunk_function): Pass false to
1867         indirect_thunk_name.
1868         (ix86_output_indirect_branch_via_reg): Likewise.
1869         (ix86_output_indirect_branch_via_push): Likewise.
1870         (output_indirect_thunk_function): Create alias for function
1871         return thunk if regno < 0.
1872         (ix86_output_function_return): New function.
1873         (ix86_handle_fndecl_attribute): Handle function_return.
1874         (ix86_attribute_table): Add function_return.
1875         * config/i386/i386.h (machine_function): Add
1876         function_return_type.
1877         * config/i386/i386.md (simple_return_internal): Use
1878         ix86_output_function_return.
1879         (simple_return_internal_long): Likewise.
1880         * config/i386/i386.opt (mfunction-return=): New option.
1881         (indirect_branch): Mention -mfunction-return=.
1882         * doc/extend.texi: Document function_return function attribute.
1883         * doc/invoke.texi: Document -mfunction-return= option.
1884
1885 2018-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1886
1887         * config/i386/i386-opts.h (indirect_branch): New.
1888         * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
1889         * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
1890         with local indirect jump when converting indirect call and jump.
1891         (ix86_set_indirect_branch_type): New.
1892         (ix86_set_current_function): Call ix86_set_indirect_branch_type.
1893         (indirectlabelno): New.
1894         (indirect_thunk_needed): Likewise.
1895         (indirect_thunk_bnd_needed): Likewise.
1896         (indirect_thunks_used): Likewise.
1897         (indirect_thunks_bnd_used): Likewise.
1898         (INDIRECT_LABEL): Likewise.
1899         (indirect_thunk_name): Likewise.
1900         (output_indirect_thunk): Likewise.
1901         (output_indirect_thunk_function): Likewise.
1902         (ix86_output_indirect_branch_via_reg): Likewise.
1903         (ix86_output_indirect_branch_via_push): Likewise.
1904         (ix86_output_indirect_branch): Likewise.
1905         (ix86_output_indirect_jmp): Likewise.
1906         (ix86_code_end): Call output_indirect_thunk_function if needed.
1907         (ix86_output_call_insn): Call ix86_output_indirect_branch if
1908         needed.
1909         (ix86_handle_fndecl_attribute): Handle indirect_branch.
1910         (ix86_attribute_table): Add indirect_branch.
1911         * config/i386/i386.h (machine_function): Add indirect_branch_type
1912         and has_local_indirect_jump.
1913         * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
1914         to true.
1915         (tablejump): Likewise.
1916         (*indirect_jump): Use ix86_output_indirect_jmp.
1917         (*tablejump_1): Likewise.
1918         (simple_return_indirect_internal): Likewise.
1919         * config/i386/i386.opt (mindirect-branch=): New option.
1920         (indirect_branch): New.
1921         (keep): Likewise.
1922         (thunk): Likewise.
1923         (thunk-inline): Likewise.
1924         (thunk-extern): Likewise.
1925         * doc/extend.texi: Document indirect_branch function attribute.
1926         * doc/invoke.texi: Document -mindirect-branch= option.
1927
1928 2018-01-14  Jan Hubicka  <hubicka@ucw.cz>
1929
1930         PR ipa/83051
1931         * ipa-inline.c (edge_badness): Tolerate roundoff errors.
1932
1933 2018-01-14  Richard Sandiford  <richard.sandiford@linaro.org>
1934
1935         * ipa-inline.c (want_inline_small_function_p): Return false if
1936         inlining has already failed with CIF_FINAL_ERROR.
1937         (update_caller_keys): Call want_inline_small_function_p before
1938         can_inline_edge_p.
1939         (update_callee_keys): Likewise.
1940
1941 2018-01-10  Kelvin Nilsen  <kelvin@gcc.gnu.org>
1942
1943         * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
1944         New function.
1945         (rs6000_quadword_masked_address_p): Likewise.
1946         (quad_aligned_load_p): Likewise.
1947         (quad_aligned_store_p): Likewise.
1948         (const_load_sequence_p): Add comment to describe the outer-most loop.
1949         (mimic_memory_attributes_and_flags): New function.
1950         (rs6000_gen_stvx): Likewise.
1951         (replace_swapped_aligned_store): Likewise.
1952         (rs6000_gen_lvx): Likewise.
1953         (replace_swapped_aligned_load): Likewise.
1954         (replace_swapped_load_constant): Capitalize argument name in
1955         comment describing this function.
1956         (rs6000_analyze_swaps): Add a third pass to search for vector loads
1957         and stores that access quad-word aligned addresses and replace
1958         with stvx or lvx instructions when appropriate.
1959         * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
1960         New function prototype.
1961         (rs6000_quadword_masked_address_p): Likewise.
1962         (rs6000_gen_lvx): Likewise.
1963         (rs6000_gen_stvx): Likewise.
1964         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
1965         VSX_D (V2DF, V2DI), modify this split to select lvx instruction
1966         when memory address is aligned.
1967         (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
1968         this split to select lvx instruction when memory address is aligned.
1969         (*vsx_le_perm_load_v8hi): Modify this split to select lvx
1970         instruction when memory address is aligned.
1971         (*vsx_le_perm_load_v16qi): Likewise.
1972         (four unnamed splitters): Modify to select the stvx instruction
1973         when memory is aligned.
1974
1975 2018-01-13  Jan Hubicka  <hubicka@ucw.cz>
1976
1977         * predict.c (determine_unlikely_bbs): Handle correctly BBs
1978         which appears in the queue multiple times.
1979
1980 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
1981             Alan Hayward  <alan.hayward@arm.com>
1982             David Sherwood  <david.sherwood@arm.com>
1983
1984         * tree-vectorizer.h (vec_lower_bound): New structure.
1985         (_loop_vec_info): Add check_nonzero and lower_bounds.
1986         (LOOP_VINFO_CHECK_NONZERO): New macro.
1987         (LOOP_VINFO_LOWER_BOUNDS): Likewise.
1988         (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
1989         * tree-data-ref.h (dr_with_seg_len): Add access_size and align
1990         fields.  Make seg_len the distance travelled, not including the
1991         access size.
1992         (dr_direction_indicator): Declare.
1993         (dr_zero_step_indicator): Likewise.
1994         (dr_known_forward_stride_p): Likewise.
1995         * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
1996         tree-ssanames.h.
1997         (runtime_alias_check_p): Allow runtime alias checks with
1998         variable strides.
1999         (operator ==): Compare access_size and align.
2000         (prune_runtime_alias_test_list): Rework for new distinction between
2001         the access_size and seg_len.
2002         (create_intersect_range_checks_index): Likewise.  Cope with polynomial
2003         segment lengths.
2004         (get_segment_min_max): New function.
2005         (create_intersect_range_checks): Use it.
2006         (dr_step_indicator): New function.
2007         (dr_direction_indicator): Likewise.
2008         (dr_zero_step_indicator): Likewise.
2009         (dr_known_forward_stride_p): Likewise.
2010         * tree-loop-distribution.c (data_ref_segment_size): Return
2011         DR_STEP * (niters - 1).
2012         (compute_alias_check_pairs): Update call to the dr_with_seg_len
2013         constructor.
2014         * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
2015         (vect_preserves_scalar_order_p): New function, split out from...
2016         (vect_analyze_data_ref_dependence): ...here.  Check for zero steps.
2017         (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
2018         (vect_vfa_access_size): New function.
2019         (vect_vfa_align): Likewise.
2020         (vect_compile_time_alias): Take access_size_a and access_b arguments.
2021         (dump_lower_bound): New function.
2022         (vect_check_lower_bound): Likewise.
2023         (vect_small_gap_p): Likewise.
2024         (vectorizable_with_step_bound_p): Likewise.
2025         (vect_prune_runtime_alias_test_list): Ignore cross-iteration
2026         depencies if the vectorization factor is 1.  Convert the checks
2027         for nonzero steps into checks on the bounds of DR_STEP.  Try using
2028         a bunds check for variable steps if the minimum required step is
2029         relatively small. Update calls to the dr_with_seg_len
2030         constructor and to vect_compile_time_alias.
2031         * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
2032         function.
2033         (vect_loop_versioning): Call it.
2034         * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
2035         when retrying.
2036         (vect_estimate_min_profitable_iters): Account for any bounds checks.
2037
2038 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2039             Alan Hayward  <alan.hayward@arm.com>
2040             David Sherwood  <david.sherwood@arm.com>
2041
2042         * doc/sourcebuild.texi (vect_scatter_store): Document.
2043         * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
2044         optabs.
2045         * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
2046         Document.
2047         * genopinit.c (main): Add supports_vec_scatter_store and
2048         supports_vec_scatter_store_cached to target_optabs.
2049         * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
2050         IFN_MASK_SCATTER_STORE.
2051         * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
2052         functions.
2053         * internal-fn.h (internal_store_fn_p): Declare.
2054         (internal_fn_stored_value_index): Likewise.
2055         * internal-fn.c (scatter_store_direct): New macro.
2056         (expand_scatter_store_optab_fn): New function.
2057         (direct_scatter_store_optab_supported_p): New macro.
2058         (internal_store_fn_p): New function.
2059         (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
2060         IFN_MASK_SCATTER_STORE.
2061         (internal_fn_mask_index): Likewise.
2062         (internal_fn_stored_value_index): New function.
2063         (internal_gather_scatter_fn_supported_p): Adjust operand numbers
2064         for scatter stores.
2065         * optabs-query.h (supports_vec_scatter_store_p): Declare.
2066         * optabs-query.c (supports_vec_scatter_store_p): New function.
2067         * tree-vectorizer.h (vect_get_store_rhs): Declare.
2068         * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
2069         true for scatter stores.
2070         (vect_gather_scatter_fn_p): Handle scatter stores too.
2071         (vect_check_gather_scatter): Consider using scatter stores if
2072         supports_vec_scatter_store_p.
2073         * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
2074         scatter stores too.
2075         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
2076         internal_fn_stored_value_index.
2077         (check_load_store_masking): Handle scatter stores too.
2078         (vect_get_store_rhs): Make public.
2079         (vectorizable_call): Use internal_store_fn_p.
2080         (vectorizable_store): Handle scatter store internal functions.
2081         (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
2082         when deciding whether the end of the group has been reached.
2083         * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
2084         * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
2085         (mask_scatter_store<mode>): New insns.
2086
2087 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2088             Alan Hayward  <alan.hayward@arm.com>
2089             David Sherwood  <david.sherwood@arm.com>
2090
2091         * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
2092         * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
2093         * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
2094         function.
2095         (vect_use_strided_gather_scatters_p): Take a masked_p argument.
2096         Use vect_truncate_gather_scatter_offset if we can't treat the
2097         operation as a normal gather load or scatter store.
2098         (get_group_load_store_type): Take the gather_scatter_info
2099         as argument.  Try using a gather load or scatter store for
2100         single-element groups.
2101         (get_load_store_type): Update calls to get_group_load_store_type
2102         and vect_use_strided_gather_scatters_p.
2103
2104 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2105             Alan Hayward  <alan.hayward@arm.com>
2106             David Sherwood  <david.sherwood@arm.com>
2107
2108         * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
2109         optional tree argument.
2110         * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
2111         null target hooks.
2112         (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
2113         but continue to use the current value as a fallback.
2114         (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
2115         to compare the updates.
2116         * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
2117         (get_load_store_type): Use it when handling a strided access.
2118         (vect_get_strided_load_store_ops): New function.
2119         (vect_get_data_ptr_increment): Likewise.
2120         (vectorizable_load): Handle strided gather loads.  Always pass
2121         a step to vect_create_data_ref_ptr and bump_vector_ptr.
2122
2123 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2124             Alan Hayward  <alan.hayward@arm.com>
2125             David Sherwood  <david.sherwood@arm.com>
2126
2127         * doc/md.texi (gather_load@var{m}): Document.
2128         (mask_gather_load@var{m}): Likewise.
2129         * genopinit.c (main): Add supports_vec_gather_load and
2130         supports_vec_gather_load_cached to target_optabs.
2131         * optabs-tree.c (init_tree_optimization_optabs): Use
2132         ggc_cleared_alloc to allocate target_optabs.
2133         * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
2134         * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
2135         functions.
2136         * internal-fn.h (internal_load_fn_p): Declare.
2137         (internal_gather_scatter_fn_p): Likewise.
2138         (internal_fn_mask_index): Likewise.
2139         (internal_gather_scatter_fn_supported_p): Likewise.
2140         * internal-fn.c (gather_load_direct): New macro.
2141         (expand_gather_load_optab_fn): New function.
2142         (direct_gather_load_optab_supported_p): New macro.
2143         (direct_internal_fn_optab): New function.
2144         (internal_load_fn_p): Likewise.
2145         (internal_gather_scatter_fn_p): Likewise.
2146         (internal_fn_mask_index): Likewise.
2147         (internal_gather_scatter_fn_supported_p): Likewise.
2148         * optabs-query.c (supports_at_least_one_mode_p): New function.
2149         (supports_vec_gather_load_p): Likewise.
2150         * optabs-query.h (supports_vec_gather_load_p): Declare.
2151         * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
2152         and memory_type field.
2153         (NUM_PATTERNS): Bump to 15.
2154         * tree-vect-data-refs.c: Include internal-fn.h.
2155         (vect_gather_scatter_fn_p): New function.
2156         (vect_describe_gather_scatter_call): Likewise.
2157         (vect_check_gather_scatter): Try using internal functions for
2158         gather loads.  Recognize existing calls to a gather load function.
2159         (vect_analyze_data_refs): Consider using gather loads if
2160         supports_vec_gather_load_p.
2161         * tree-vect-patterns.c (vect_get_load_store_mask): New function.
2162         (vect_get_gather_scatter_offset_type): Likewise.
2163         (vect_convert_mask_for_vectype): Likewise.
2164         (vect_add_conversion_to_patterm): Likewise.
2165         (vect_try_gather_scatter_pattern): Likewise.
2166         (vect_recog_gather_scatter_pattern): New pattern recognizer.
2167         (vect_vect_recog_func_ptrs): Add it.
2168         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
2169         internal_fn_mask_index and internal_gather_scatter_fn_p.
2170         (check_load_store_masking): Take the gather_scatter_info as an
2171         argument and handle gather loads.
2172         (vect_get_gather_scatter_ops): New function.
2173         (vectorizable_call): Check internal_load_fn_p.
2174         (vectorizable_load): Likewise.  Handle gather load internal
2175         functions.
2176         (vectorizable_store): Update call to check_load_store_masking.
2177         * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
2178         * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
2179         * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
2180         (aarch64_gather_scale_operand_d): New predicates.
2181         * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
2182         (mask_gather_load<mode>): New insns.
2183
2184 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2185             Alan Hayward  <alan.hayward@arm.com>
2186             David Sherwood  <david.sherwood@arm.com>
2187
2188         * optabs.def (fold_left_plus_optab): New optab.
2189         * doc/md.texi (fold_left_plus_@var{m}): Document.
2190         * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
2191         * internal-fn.c (fold_left_direct): Define.
2192         (expand_fold_left_optab_fn): Likewise.
2193         (direct_fold_left_optab_supported_p): Likewise.
2194         * fold-const-call.c (fold_const_fold_left): New function.
2195         (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
2196         * tree-parloops.c (valid_reduction_p): New function.
2197         (gather_scalar_reductions): Use it.
2198         * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
2199         (vect_finish_replace_stmt): Declare.
2200         * tree-vect-loop.c (fold_left_reduction_fn): New function.
2201         (needs_fold_left_reduction_p): New function, split out from...
2202         (vect_is_simple_reduction): ...here.  Accept reductions that
2203         forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
2204         (vect_force_simple_reduction): Also store the reduction type in
2205         the assignment's STMT_VINFO_REDUC_TYPE.
2206         (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
2207         (merge_with_identity): New function.
2208         (vect_expand_fold_left): Likewise.
2209         (vectorize_fold_left_reduction): Likewise.
2210         (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION.  Leave the
2211         scalar phi in place for it.  Check for target support and reject
2212         cases that would reassociate the operation.  Defer the transform
2213         phase to vectorize_fold_left_reduction.
2214         * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
2215         * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
2216         (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
2217
2218 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2219
2220         * tree-if-conv.c (predicate_mem_writes): Remove redundant
2221         call to ifc_temp_var.
2222
2223 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2224             Alan Hayward  <alan.hayward@arm.com>
2225             David Sherwood  <david.sherwood@arm.com>
2226
2227         * target.def (legitimize_address_displacement): Take the original
2228         offset as a poly_int.
2229         * targhooks.h (default_legitimize_address_displacement): Update
2230         accordingly.
2231         * targhooks.c (default_legitimize_address_displacement): Likewise.
2232         * doc/tm.texi: Regenerate.
2233         * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
2234         as an argument, moving assert of ad->disp == ad->disp_term to...
2235         (process_address_1): ...here.  Update calls to base_plus_disp_to_reg.
2236         Try calling targetm.legitimize_address_displacement before expanding
2237         the address rather than afterwards, and adjust for the new interface.
2238         * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
2239         Match the new hook interface.  Handle SVE addresses.
2240         * config/sh/sh.c (sh_legitimize_address_displacement): Make the
2241         new hook interface.
2242
2243 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2244
2245         * Makefile.in (OBJS): Add early-remat.o.
2246         * target.def (select_early_remat_modes): New hook.
2247         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
2248         * doc/tm.texi: Regenerate.
2249         * targhooks.h (default_select_early_remat_modes): Declare.
2250         * targhooks.c (default_select_early_remat_modes): New function.
2251         * timevar.def (TV_EARLY_REMAT): New timevar.
2252         * passes.def (pass_early_remat): New pass.
2253         * tree-pass.h (make_pass_early_remat): Declare.
2254         * early-remat.c: New file.
2255         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
2256         function.
2257         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
2258
2259 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2260             Alan Hayward  <alan.hayward@arm.com>
2261             David Sherwood  <david.sherwood@arm.com>
2262
2263         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
2264         vfm1 with a bound_epilog parameter.
2265         (vect_do_peeling): Update calls accordingly, and move the prologue
2266         call earlier in the function.  Treat the base bound_epilog as 0 for
2267         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
2268         this base when peeling for gaps.
2269         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
2270         with fully-masked loops.
2271         (vect_estimate_min_profitable_iters): Handle the single peeled
2272         iteration in that case.
2273
2274 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2275             Alan Hayward  <alan.hayward@arm.com>
2276             David Sherwood  <david.sherwood@arm.com>
2277
2278         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
2279         single-element interleaving even if the size is not a power of 2.
2280         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
2281         accesses for single-element interleaving if the group size is
2282         not a power of 2.
2283
2284 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2285             Alan Hayward  <alan.hayward@arm.com>
2286             David Sherwood  <david.sherwood@arm.com>
2287
2288         * doc/md.texi (fold_extract_last_@var{m}): Document.
2289         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
2290         * optabs.def (fold_extract_last_optab): New optab.
2291         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
2292         * internal-fn.c (fold_extract_direct): New macro.
2293         (expand_fold_extract_optab_fn): Likewise.
2294         (direct_fold_extract_optab_supported_p): Likewise.
2295         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
2296         * tree-vect-loop.c (vect_model_reduction_cost): Handle
2297         EXTRACT_LAST_REDUCTION.
2298         (get_initial_def_for_reduction): Do not create an initial vector
2299         for EXTRACT_LAST_REDUCTION reductions.
2300         (vectorizable_reduction): Leave the scalar phi in place for
2301         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
2302         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
2303         epilogue code for EXTRACT_LAST_REDUCTION and defer the
2304         transform phase to vectorizable_condition.
2305         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
2306         split out from...
2307         (vect_finish_stmt_generation): ...here.
2308         (vect_finish_replace_stmt): New function.
2309         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
2310         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
2311         pattern.
2312         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
2313
2314 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2315             Alan Hayward  <alan.hayward@arm.com>
2316             David Sherwood  <david.sherwood@arm.com>
2317
2318         * doc/md.texi (extract_last_@var{m}): Document.
2319         * optabs.def (extract_last_optab): New optab.
2320         * internal-fn.def (EXTRACT_LAST): New internal function.
2321         * internal-fn.c (cond_unary_direct): New macro.
2322         (expand_cond_unary_optab_fn): Likewise.
2323         (direct_cond_unary_optab_supported_p): Likewise.
2324         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
2325         loops using EXTRACT_LAST.
2326         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
2327         (extract_last_<mode>): ...this optab.
2328         (vec_extract<mode><Vel>): Update accordingly.
2329
2330 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2331             Alan Hayward  <alan.hayward@arm.com>
2332             David Sherwood  <david.sherwood@arm.com>
2333
2334         * target.def (empty_mask_is_expensive): New hook.
2335         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
2336         * doc/tm.texi: Regenerate.
2337         * targhooks.h (default_empty_mask_is_expensive): Declare.
2338         * targhooks.c (default_empty_mask_is_expensive): New function.
2339         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
2340         if the target says that empty masks are expensive.
2341         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
2342         New function.
2343         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
2344
2345 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2346             Alan Hayward  <alan.hayward@arm.com>
2347             David Sherwood  <david.sherwood@arm.com>
2348
2349         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
2350         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
2351         (vect_use_loop_mask_for_alignment_p): New function.
2352         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
2353         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
2354         niters_skip argument.  Make sure that the first niters_skip elements
2355         of the first iteration are inactive.
2356         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
2357         Update call to vect_set_loop_masks_directly.
2358         (get_misalign_in_elems): New function, split out from...
2359         (vect_gen_prolog_loop_niters): ...here.
2360         (vect_update_init_of_dr): Take a code argument that specifies whether
2361         the adjustment should be added or subtracted.
2362         (vect_update_init_of_drs): Likewise.
2363         (vect_prepare_for_masked_peels): New function.
2364         (vect_do_peeling): Skip prologue peeling if we're using a mask
2365         instead.  Update call to vect_update_inits_of_drs.
2366         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
2367         mask_skip_niters.
2368         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
2369         alignment.  Do not include the number of peeled iterations in
2370         the minimum threshold in that case.
2371         (vectorizable_induction): Adjust the start value down by
2372         LOOP_VINFO_MASK_SKIP_NITERS iterations.
2373         (vect_transform_loop): Call vect_prepare_for_masked_peels.
2374         Take the number of skipped iterations into account when calculating
2375         the loop bounds.
2376         * tree-vect-stmts.c (vect_gen_while_not): New function.
2377
2378 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2379             Alan Hayward  <alan.hayward@arm.com>
2380             David Sherwood  <david.sherwood@arm.com>
2381
2382         * doc/sourcebuild.texi (vect_fully_masked): Document.
2383         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
2384         default value to 0.
2385         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
2386         split out from...
2387         (vect_analyze_loop_2): ...here. Don't check the vectorization
2388         factor against the number of loop iterations if the loop is
2389         fully-masked.
2390
2391 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2392             Alan Hayward  <alan.hayward@arm.com>
2393             David Sherwood  <david.sherwood@arm.com>
2394
2395         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
2396         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
2397         (dump_groups): Update accordingly.
2398         (iv_use::mem_type): New member variable.
2399         (address_p): New function.
2400         (record_use): Add a mem_type argument and initialize the new
2401         mem_type field.
2402         (record_group_use): Add a mem_type argument.  Use address_p.
2403         Remove obsolete null checks of base_object.  Update call to record_use.
2404         (find_interesting_uses_op): Update call to record_group_use.
2405         (find_interesting_uses_cond): Likewise.
2406         (find_interesting_uses_address): Likewise.
2407         (get_mem_type_for_internal_fn): New function.
2408         (find_address_like_use): Likewise.
2409         (find_interesting_uses_stmt): Try find_address_like_use before
2410         calling find_interesting_uses_op.
2411         (addr_offset_valid_p): Use the iv mem_type field as the type
2412         of the addressed memory.
2413         (add_autoinc_candidates): Likewise.
2414         (get_address_cost): Likewise.
2415         (split_small_address_groups_p): Use address_p.
2416         (split_address_groups): Likewise.
2417         (add_iv_candidate_for_use): Likewise.
2418         (autoinc_possible_for_pair): Likewise.
2419         (rewrite_groups): Likewise.
2420         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
2421         (determine_group_iv_cost): Update after split of USE_ADDRESS.
2422         (get_alias_ptr_type_for_ptr_address): New function.
2423         (rewrite_use_address): Rewrite address uses in calls that were
2424         identified by find_address_like_use.
2425
2426 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2427             Alan Hayward  <alan.hayward@arm.com>
2428             David Sherwood  <david.sherwood@arm.com>
2429
2430         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
2431         TARGET_MEM_REFs.
2432         * gimple-expr.h (is_gimple_addressable: Likewise.
2433         * gimple-expr.c (is_gimple_address): Likewise.
2434         * internal-fn.c (expand_call_mem_ref): New function.
2435         (expand_mask_load_optab_fn): Use it.
2436         (expand_mask_store_optab_fn): Likewise.
2437
2438 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2439             Alan Hayward  <alan.hayward@arm.com>
2440             David Sherwood  <david.sherwood@arm.com>
2441
2442         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
2443         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
2444         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
2445         (cond_umax@var{mode}): Document.
2446         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
2447         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
2448         (cond_umin_optab, cond_umax_optab): New optabs.
2449         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
2450         (COND_IOR, COND_XOR): New internal functions.
2451         * internal-fn.h (get_conditional_internal_fn): Declare.
2452         * internal-fn.c (cond_binary_direct): New macro.
2453         (expand_cond_binary_optab_fn): Likewise.
2454         (direct_cond_binary_optab_supported_p): Likewise.
2455         (get_conditional_internal_fn): New function.
2456         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
2457         Cope with reduction statements that are vectorized as calls rather
2458         than assignments.
2459         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
2460         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
2461         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
2462         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
2463         (UNSPEC_COND_EOR): New unspecs.
2464         (optab): Add mappings for them.
2465         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
2466         (sve_int_op, sve_fp_op): New int attributes.
2467
2468 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2469             Alan Hayward  <alan.hayward@arm.com>
2470             David Sherwood  <david.sherwood@arm.com>
2471
2472         * optabs.def (while_ult_optab): New optab.
2473         * doc/md.texi (while_ult@var{m}@var{n}): Document.
2474         * internal-fn.def (WHILE_ULT): New internal function.
2475         * internal-fn.h (direct_internal_fn_supported_p): New override
2476         that takes two types as argument.
2477         * internal-fn.c (while_direct): New macro.
2478         (expand_while_optab_fn): New function.
2479         (convert_optab_supported_p): Likewise.
2480         (direct_while_optab_supported_p): New macro.
2481         * wide-int.h (wi::udiv_ceil): New function.
2482         * tree-vectorizer.h (rgroup_masks): New structure.
2483         (vec_loop_masks): New typedef.
2484         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
2485         and fully_masked_p.
2486         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
2487         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
2488         (vect_max_vf): New function.
2489         (slpeel_make_loop_iterate_ntimes): Delete.
2490         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
2491         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
2492         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
2493         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
2494         internal-fn.h, stor-layout.h and optabs-query.h.
2495         (vect_set_loop_mask): New function.
2496         (add_preheader_seq): Likewise.
2497         (add_header_seq): Likewise.
2498         (interleave_supported_p): Likewise.
2499         (vect_maybe_permute_loop_masks): Likewise.
2500         (vect_set_loop_masks_directly): Likewise.
2501         (vect_set_loop_condition_masked): Likewise.
2502         (vect_set_loop_condition_unmasked): New function, split out from
2503         slpeel_make_loop_iterate_ntimes.
2504         (slpeel_make_loop_iterate_ntimes): Rename to..
2505         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
2506         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
2507         (vect_do_peeling): Update call accordingly.
2508         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
2509         loops.
2510         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
2511         mask_compare_type, can_fully_mask_p and fully_masked_p.
2512         (release_vec_loop_masks): New function.
2513         (_loop_vec_info): Use it to free the loop masks.
2514         (can_produce_all_loop_masks_p): New function.
2515         (vect_get_max_nscalars_per_iter): Likewise.
2516         (vect_verify_full_masking): Likewise.
2517         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
2518         retries, and free the mask rgroups before retrying.  Check loop-wide
2519         reasons for disallowing fully-masked loops.  Make the final decision
2520         about whether use a fully-masked loop or not.
2521         (vect_estimate_min_profitable_iters): Do not assume that peeling
2522         for the number of iterations will be needed for fully-masked loops.
2523         (vectorizable_reduction): Disable fully-masked loops.
2524         (vectorizable_live_operation): Likewise.
2525         (vect_halve_mask_nunits): New function.
2526         (vect_double_mask_nunits): Likewise.
2527         (vect_record_loop_mask): Likewise.
2528         (vect_get_loop_mask): Likewise.
2529         (vect_transform_loop): Handle the case in which the final loop
2530         iteration might handle a partial vector.  Call vect_set_loop_condition
2531         instead of slpeel_make_loop_iterate_ntimes.
2532         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
2533         (check_load_store_masking): New function.
2534         (prepare_load_store_mask): Likewise.
2535         (vectorizable_store): Handle fully-masked loops.
2536         (vectorizable_load): Likewise.
2537         (supportable_widening_operation): Use vect_halve_mask_nunits for
2538         booleans.
2539         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
2540         (vect_gen_while): New function.
2541         * config/aarch64/aarch64.md (umax<mode>3): New expander.
2542         (aarch64_uqdec<mode>): New insn.
2543
2544 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2545             Alan Hayward  <alan.hayward@arm.com>
2546             David Sherwood  <david.sherwood@arm.com>
2547
2548         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
2549         (reduc_xor_scal_optab): New optabs.
2550         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
2551         (reduc_xor_scal_@var{m}): Document.
2552         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
2553         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
2554         internal functions.
2555         * fold-const-call.c (fold_const_call): Handle them.
2556         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
2557         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
2558         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
2559         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
2560         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
2561         (UNSPEC_XORV): New unspecs.
2562         (optab): Add entries for them.
2563         (BITWISEV): New int iterator.
2564         (bit_reduc_op): New int attributes.
2565
2566 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2567             Alan Hayward  <alan.hayward@arm.com>
2568             David Sherwood  <david.sherwood@arm.com>
2569
2570         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
2571         * internal-fn.def (VEC_SHL_INSERT): New internal function.
2572         * optabs.def (vec_shl_insert_optab): New optab.
2573         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
2574         (duplicate_and_interleave): Likewise.
2575         * tree-vect-loop.c: Include internal-fn.h.
2576         (neutral_op_for_slp_reduction): New function, split out from
2577         get_initial_defs_for_reduction.
2578         (get_initial_def_for_reduction): Handle option 2 for variable-length
2579         vectors by loading the neutral value into a vector and then shifting
2580         the initial value into element 0.
2581         (get_initial_defs_for_reduction): Replace the code argument with
2582         the neutral value calculated by neutral_op_for_slp_reduction.
2583         Use gimple_build_vector for constant-length vectors.
2584         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
2585         but the first group_size elements have a neutral value.
2586         Use duplicate_and_interleave otherwise.
2587         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
2588         Update call to get_initial_defs_for_reduction.  Handle SLP
2589         reductions for variable-length vectors by creating one vector
2590         result for each scalar result, with the elements associated
2591         with other scalar results stubbed out with the neutral value.
2592         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
2593         Require IFN_VEC_SHL_INSERT for double reductions on
2594         variable-length vectors, or SLP reductions that have
2595         a neutral value.  Require can_duplicate_and_interleave_p
2596         support for variable-length unchained SLP reductions if there
2597         is no neutral value, such as for MIN/MAX reductions.  Also require
2598         the number of vector elements to be a multiple of the number of
2599         SLP statements when doing variable-length unchained SLP reductions.
2600         Update call to vect_create_epilog_for_reduction.
2601         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
2602         and remove initial values.
2603         (duplicate_and_interleave): Make public.
2604         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
2605         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
2606
2607 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2608             Alan Hayward  <alan.hayward@arm.com>
2609             David Sherwood  <david.sherwood@arm.com>
2610
2611         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
2612         (can_duplicate_and_interleave_p): New function.
2613         (vect_get_and_check_slp_defs): Take the vector of statements
2614         rather than just the current one.  Remove excess parentheses.
2615         Restriction rejectinon of vect_constant_def and vect_external_def
2616         for variable-length vectors to boolean types, or types for which
2617         can_duplicate_and_interleave_p is false.
2618         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
2619         (duplicate_and_interleave): New function.
2620         (vect_get_constant_vectors): Use gimple_build_vector for
2621         constant-length vectors and suitable variable-length constant
2622         vectors.  Use duplicate_and_interleave for other variable-length
2623         vectors.  Don't defer the update when inserting new statements.
2624
2625 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2626             Alan Hayward  <alan.hayward@arm.com>
2627             David Sherwood  <david.sherwood@arm.com>
2628
2629         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
2630         min_profitable_iters doesn't go negative.
2631
2632 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2633             Alan Hayward  <alan.hayward@arm.com>
2634             David Sherwood  <david.sherwood@arm.com>
2635
2636         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
2637         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
2638         * optabs.def (vec_mask_load_lanes_optab): New optab.
2639         (vec_mask_store_lanes_optab): Likewise.
2640         * internal-fn.def (MASK_LOAD_LANES): New internal function.
2641         (MASK_STORE_LANES): Likewise.
2642         * internal-fn.c (mask_load_lanes_direct): New macro.
2643         (mask_store_lanes_direct): Likewise.
2644         (expand_mask_load_optab_fn): Handle masked operations.
2645         (expand_mask_load_lanes_optab_fn): New macro.
2646         (expand_mask_store_optab_fn): Handle masked operations.
2647         (expand_mask_store_lanes_optab_fn): New macro.
2648         (direct_mask_load_lanes_optab_supported_p): Likewise.
2649         (direct_mask_store_lanes_optab_supported_p): Likewise.
2650         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
2651         parameter.
2652         (vect_load_lanes_supported): Likewise.
2653         * tree-vect-data-refs.c (strip_conversion): New function.
2654         (can_group_stmts_p): Likewise.
2655         (vect_analyze_data_ref_accesses): Use it instead of checking
2656         for a pair of assignments.
2657         (vect_store_lanes_supported): Take a masked_p parameter.
2658         (vect_load_lanes_supported): Likewise.
2659         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
2660         vect_store_lanes_supported and vect_load_lanes_supported.
2661         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
2662         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
2663         parameter.  Don't allow gaps for masked accesses.
2664         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
2665         and vect_load_lanes_supported.
2666         (get_load_store_type): Take a masked_p parameter and update
2667         call to get_group_load_store_type.
2668         (vectorizable_store): Update call to get_load_store_type.
2669         Handle IFN_MASK_STORE_LANES.
2670         (vectorizable_load): Update call to get_load_store_type.
2671         Handle IFN_MASK_LOAD_LANES.
2672
2673 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2674             Alan Hayward  <alan.hayward@arm.com>
2675             David Sherwood  <david.sherwood@arm.com>
2676
2677         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
2678         modes for SVE.
2679         * config/aarch64/aarch64-protos.h
2680         (aarch64_sve_struct_memory_operand_p): Declare.
2681         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
2682         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
2683         (VPRED, vpred): Handle SVE structure modes.
2684         * config/aarch64/constraints.md (Utx): New constraint.
2685         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
2686         (aarch64_sve_struct_nonimmediate_operand): New predicates.
2687         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
2688         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
2689         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
2690         structure modes.  Split into pieces after RA.
2691         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
2692         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
2693         New patterns.
2694         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
2695         SVE structure modes.
2696         (aarch64_classify_address): Likewise.
2697         (sizetochar): Move earlier in file.
2698         (aarch64_print_operand): Handle SVE register lists.
2699         (aarch64_array_mode): New function.
2700         (aarch64_sve_struct_memory_operand_p): Likewise.
2701         (TARGET_ARRAY_MODE): Redefine.
2702
2703 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2704             Alan Hayward  <alan.hayward@arm.com>
2705             David Sherwood  <david.sherwood@arm.com>
2706
2707         * target.def (array_mode): New target hook.
2708         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
2709         * doc/tm.texi: Regenerate.
2710         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
2711         * hooks.c (hook_optmode_mode_uhwi_none): New function.
2712         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
2713         targetm.array_mode.
2714         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
2715         type sizes.
2716
2717 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2718             Alan Hayward  <alan.hayward@arm.com>
2719             David Sherwood  <david.sherwood@arm.com>
2720
2721         * fold-const.c (fold_binary_loc): Check the argument types
2722         rather than the result type when testing for a vector operation.
2723
2724 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2725
2726         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
2727         * doc/tm.texi: Regenerate.
2728
2729 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
2730             Alan Hayward  <alan.hayward@arm.com>
2731             David Sherwood  <david.sherwood@arm.com>
2732
2733         * doc/invoke.texi (-msve-vector-bits=): Document new option.
2734         (sve): Document new AArch64 extension.
2735         * doc/md.texi (w): Extend the description of the AArch64
2736         constraint to include SVE vectors.
2737         (Upl, Upa): Document new AArch64 predicate constraints.
2738         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
2739         enum.
2740         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
2741         (msve-vector-bits=): New option.
2742         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
2743         SVE when these are disabled.
2744         (sve): New extension.
2745         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
2746         modes.  Adjust their number of units based on aarch64_sve_vg.
2747         (MAX_BITSIZE_MODE_ANY_MODE): Define.
2748         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
2749         aarch64_addr_query_type.
2750         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
2751         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
2752         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
2753         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
2754         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
2755         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
2756         (aarch64_simd_imm_zero_p): Delete.
2757         (aarch64_check_zero_based_sve_index_immediate): Declare.
2758         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2759         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2760         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2761         (aarch64_sve_float_mul_immediate_p): Likewise.
2762         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2763         rather than an rtx.
2764         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
2765         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
2766         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
2767         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
2768         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
2769         (aarch64_regmode_natural_size): Likewise.
2770         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
2771         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
2772         left one place.
2773         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
2774         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
2775         for VG and the SVE predicate registers.
2776         (V_ALIASES): Add a "z"-prefixed alias.
2777         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
2778         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
2779         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
2780         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
2781         (REG_CLASS_NAMES): Add entries for them.
2782         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
2783         and the predicate registers.
2784         (aarch64_sve_vg): Declare.
2785         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
2786         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
2787         (REGMODE_NATURAL_SIZE): Define.
2788         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
2789         SVE macros.
2790         * config/aarch64/aarch64.c: Include cfgrtl.h.
2791         (simd_immediate_info): Add a constructor for series vectors,
2792         and an associated step field.
2793         (aarch64_sve_vg): New variable.
2794         (aarch64_dbx_register_number): Handle VG and the predicate registers.
2795         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
2796         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
2797         (VEC_ANY_DATA, VEC_STRUCT): New constants.
2798         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
2799         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
2800         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
2801         (aarch64_get_mask_mode): New functions.
2802         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
2803         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
2804         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
2805         predicate modes and predicate registers.  Explicitly restrict
2806         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
2807         to store a vector mode if it is recognized by
2808         aarch64_classify_vector_mode.
2809         (aarch64_regmode_natural_size): New function.
2810         (aarch64_hard_regno_caller_save_mode): Return the original mode
2811         for predicates.
2812         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
2813         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
2814         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
2815         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
2816         functions.
2817         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
2818         does not overlap dest if the function is frame-related.  Handle
2819         SVE constants.
2820         (aarch64_split_add_offset): New function.
2821         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
2822         them aarch64_add_offset.
2823         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
2824         and update call to aarch64_sub_sp.
2825         (aarch64_add_cfa_expression): New function.
2826         (aarch64_expand_prologue): Pass extra temporary registers to the
2827         functions above.  Handle the case in which we need to emit new
2828         DW_CFA_expressions for registers that were originally saved
2829         relative to the stack pointer, but now have to be expressed
2830         relative to the frame pointer.
2831         (aarch64_output_mi_thunk): Pass extra temporary registers to the
2832         functions above.
2833         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
2834         IP0 and IP1 values for SVE frames.
2835         (aarch64_expand_vec_series): New function.
2836         (aarch64_expand_sve_widened_duplicate): Likewise.
2837         (aarch64_expand_sve_const_vector): Likewise.
2838         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
2839         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
2840         into the register, rather than emitting a SET directly.
2841         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
2842         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
2843         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
2844         (offset_9bit_signed_scaled_p): New functions.
2845         (aarch64_replicate_bitmask_imm): New function.
2846         (aarch64_bitmask_imm): Use it.
2847         (aarch64_cannot_force_const_mem): Reject expressions involving
2848         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
2849         (aarch64_classify_index): Handle SVE indices, by requiring
2850         a plain register index with a scale that matches the element size.
2851         (aarch64_classify_address): Handle SVE addresses.  Assert that
2852         the mode of the address is VOIDmode or an integer mode.
2853         Update call to aarch64_classify_symbol.
2854         (aarch64_classify_symbolic_expression): Update call to
2855         aarch64_classify_symbol.
2856         (aarch64_const_vec_all_in_range_p): New function.
2857         (aarch64_print_vector_float_operand): Likewise.
2858         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
2859         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
2860         and the FP immediates 1.0 and 0.5.
2861         (aarch64_print_address_internal): Handle SVE addresses.
2862         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
2863         (aarch64_regno_regclass): Handle predicate registers.
2864         (aarch64_secondary_reload): Handle big-endian reloads of SVE
2865         data modes.
2866         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
2867         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
2868         (aarch64_convert_sve_vector_bits): New function.
2869         (aarch64_override_options): Use it to handle -msve-vector-bits=.
2870         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2871         rather than an rtx.
2872         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
2873         Handle SVE vector and predicate modes.  Accept VL-based constants
2874         that need only one temporary register, and VL offsets that require
2875         no temporary registers.
2876         (aarch64_conditional_register_usage): Mark the predicate registers
2877         as fixed if SVE isn't available.
2878         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
2879         Return true for SVE vector and predicate modes.
2880         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
2881         rather than an unsigned int.  Handle SVE modes.
2882         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
2883         SVE modes.
2884         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
2885         if SVE is enabled.
2886         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2887         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2888         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2889         (aarch64_sve_float_mul_immediate_p): New functions.
2890         (aarch64_sve_valid_immediate): New function.
2891         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
2892         Explicitly reject structure modes.  Check for INDEX constants.
2893         Handle PTRUE and PFALSE constants.
2894         (aarch64_check_zero_based_sve_index_immediate): New function.
2895         (aarch64_simd_imm_zero_p): Delete.
2896         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
2897         vector modes.  Accept constants in the range of CNT[BHWD].
2898         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
2899         ask for an Advanced SIMD mode.
2900         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
2901         (aarch64_simd_vector_alignment): Handle SVE predicates.
2902         (aarch64_vectorize_preferred_vector_alignment): New function.
2903         (aarch64_simd_vector_alignment_reachable): Use it instead of
2904         the vector size.
2905         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
2906         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
2907         functions.
2908         (MAX_VECT_LEN): Delete.
2909         (expand_vec_perm_d): Add a vec_flags field.
2910         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
2911         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
2912         (aarch64_evpc_ext): Don't apply a big-endian lane correction
2913         for SVE modes.
2914         (aarch64_evpc_rev): Rename to...
2915         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
2916         (aarch64_evpc_rev_global): New function.
2917         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
2918         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
2919         MAX_VECT_LEN.
2920         (aarch64_evpc_sve_tbl): New function.
2921         (aarch64_expand_vec_perm_const_1): Update after rename of
2922         aarch64_evpc_rev.  Handle SVE permutes too, trying
2923         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
2924         than aarch64_evpc_tbl.
2925         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
2926         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
2927         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
2928         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
2929         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
2930         (aarch64_expand_sve_vcond): New functions.
2931         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
2932         of aarch64_vector_mode_p.
2933         (aarch64_dwarf_poly_indeterminate_value): New function.
2934         (aarch64_compute_pressure_classes): Likewise.
2935         (aarch64_can_change_mode_class): Likewise.
2936         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
2937         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
2938         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
2939         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
2940         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
2941         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
2942         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
2943         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
2944         constraints.
2945         (Dn, Dl, Dr): Accept const as well as const_vector.
2946         (Dz): Likewise.  Compare against CONST0_RTX.
2947         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
2948         of "vector" where appropriate.
2949         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
2950         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
2951         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
2952         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
2953         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
2954         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
2955         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
2956         (v_int_equiv): Extend to SVE modes.
2957         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
2958         mode attributes.
2959         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
2960         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
2961         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
2962         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
2963         (SVE_COND_FP_CMP): New int iterators.
2964         (perm_hilo): Handle the new unpack unspecs.
2965         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
2966         attributes.
2967         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
2968         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
2969         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
2970         (aarch64_equality_operator, aarch64_constant_vector_operand)
2971         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
2972         (aarch64_sve_nonimmediate_operand): Likewise.
2973         (aarch64_sve_general_operand): Likewise.
2974         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
2975         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
2976         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
2977         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
2978         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
2979         (aarch64_sve_float_arith_immediate): Likewise.
2980         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
2981         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
2982         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
2983         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
2984         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
2985         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
2986         (aarch64_sve_float_arith_operand): Likewise.
2987         (aarch64_sve_float_arith_with_sub_operand): Likewise.
2988         (aarch64_sve_float_mul_operand): Likewise.
2989         (aarch64_sve_vec_perm_operand): Likewise.
2990         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
2991         (aarch64_mov_operand): Accept const_poly_int and const_vector.
2992         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
2993         as well as const_vector.
2994         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
2995         in file.  Use CONST0_RTX and CONSTM1_RTX.
2996         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
2997         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
2998         Use aarch64_simd_imm_zero.
2999         * config/aarch64/aarch64-sve.md: New file.
3000         * config/aarch64/aarch64.md: Include it.
3001         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
3002         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
3003         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
3004         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
3005         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
3006         (sve): New attribute.
3007         (enabled): Disable instructions with the sve attribute unless
3008         TARGET_SVE.
3009         (movqi, movhi): Pass CONST_POLY_INT operaneds through
3010         aarch64_expand_mov_immediate.
3011         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
3012         CNT[BHSD] immediates.
3013         (movti): Split CONST_POLY_INT moves into two halves.
3014         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
3015         Split additions that need a temporary here if the destination
3016         is the stack pointer.
3017         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
3018         (*add<mode>3_poly_1): New instruction.
3019         (set_clobber_cc): New expander.
3020
3021 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
3022
3023         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
3024         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
3025         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
3026         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
3027         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
3028         Change innermode from fixed_mode_size to machine_mode.
3029         (simplify_subreg): Update call accordingly.  Handle a constant-sized
3030         subreg of a variable-length CONST_VECTOR.
3031
3032 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
3033             Alan Hayward  <alan.hayward@arm.com>
3034             David Sherwood  <david.sherwood@arm.com>
3035
3036         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
3037         (add_offset_to_base): New function, split out from...
3038         (create_mem_ref): ...here.  When handling a scale other than 1,
3039         check first whether the address is valid without the offset.
3040         Add it into the base if so, leaving the index and scale as-is.
3041
3042 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
3043
3044         PR c++/83778
3045         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
3046         fold_for_warn before checking if arg2 is INTEGER_CST.
3047
3048 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
3049
3050         * config/rs6000/predicates.md (load_multiple_operation): Delete.
3051         (store_multiple_operation): Delete.
3052         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
3053         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
3054         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
3055         guarded by TARGET_STRING.
3056         (rs6000_output_load_multiple): Delete.
3057         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
3058         OPTION_MASK_STRING / TARGET_STRING handling.
3059         (print_operand) <'N', 'O'>: Add comment that these are unused now.
3060         (const rs6000_opt_masks) <"string">: Change mask to 0.
3061         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
3062         (MASK_STRING): Delete.
3063         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
3064         parts.  Simplify.
3065         (load_multiple): Delete.
3066         (*ldmsi8): Delete.
3067         (*ldmsi7): Delete.
3068         (*ldmsi6): Delete.
3069         (*ldmsi5): Delete.
3070         (*ldmsi4): Delete.
3071         (*ldmsi3): Delete.
3072         (store_multiple): Delete.
3073         (*stmsi8): Delete.
3074         (*stmsi7): Delete.
3075         (*stmsi6): Delete.
3076         (*stmsi5): Delete.
3077         (*stmsi4): Delete.
3078         (*stmsi3): Delete.
3079         (movmemsi_8reg): Delete.
3080         (corresponding unnamed define_insn): Delete.
3081         (movmemsi_6reg): Delete.
3082         (corresponding unnamed define_insn): Delete.
3083         (movmemsi_4reg): Delete.
3084         (corresponding unnamed define_insn): Delete.
3085         (movmemsi_2reg): Delete.
3086         (corresponding unnamed define_insn): Delete.
3087         (movmemsi_1reg): Delete.
3088         (corresponding unnamed define_insn): Delete.
3089         * config/rs6000/rs6000.opt (mno-string): New.
3090         (mstring): Replace by deprecation warning stub.
3091         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
3092
3093 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
3094
3095         * regrename.c (regrename_do_replace): If replacing the same
3096         reg multiple times, try to reuse last created gen_raw_REG.
3097
3098         PR debug/81155
3099         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
3100         main to workaround a bug in GDB.
3101
3102 2018-01-12  Tom de Vries  <tom@codesourcery.com>
3103
3104         PR target/83737
3105         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
3106
3107 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
3108
3109         PR rtl-optimization/80481
3110         * ira-color.c (get_cap_member): New function.
3111         (allocnos_conflict_by_live_ranges_p): Use it.
3112         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
3113         (setup_slot_coalesced_allocno_live_ranges): Ditto.
3114
3115 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
3116
3117         PR target/83628
3118         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
3119         (*saddl_se_1): Ditto.
3120         (*ssubsi_1): Ditto.
3121         (*ssubl_se_1): Ditto.
3122
3123 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
3124
3125         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
3126         rather than wi::to_widest for DR_INITs.
3127         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
3128         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
3129         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
3130         INTEGER_CSTs.
3131         (vect_analyze_group_access_1): Note that here.
3132
3133 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
3134
3135         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
3136         polynomial type sizes.
3137
3138 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
3139
3140         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
3141         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
3142         (gimple_add_tmp_var): Likewise.
3143
3144 2018-01-12  Martin Liska  <mliska@suse.cz>
3145
3146         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
3147         (gimple_alloc_sizes): Likewise.
3148         (dump_gimple_statistics): Use PRIu64 in printf format.
3149         * gimple.h: Change uint64_t to int.
3150
3151 2018-01-12  Martin Liska  <mliska@suse.cz>
3152
3153         * tree-core.h: Use uint64_t instead of int.
3154         * tree.c (tree_node_counts): Likewise.
3155         (tree_node_sizes): Likewise.
3156         (dump_tree_statistics): Use PRIu64 in printf format.
3157
3158 2018-01-12  Martin Liska  <mliska@suse.cz>
3159
3160         * Makefile.in: As qsort_chk is implemented in vec.c, add
3161         vec.o to linkage of gencfn-macros.
3162         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
3163         passing the info to record_node_allocation_statistics.
3164         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
3165         and pass the info.
3166         * ggc-common.c (struct ggc_usage): Add operator== and use
3167         it in operator< and compare function.
3168         * mem-stats.h (struct mem_usage): Likewise.
3169         * vec.c (struct vec_usage): Remove operator< and compare
3170         function. Can be simply inherited.
3171
3172 2018-01-12  Martin Jambor  <mjambor@suse.cz>
3173
3174         PR target/81616
3175         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
3176         * tree-ssa-math-opts.c: Include domwalk.h.
3177         (convert_mult_to_fma_1): New function.
3178         (fma_transformation_info): New type.
3179         (fma_deferring_state): Likewise.
3180         (cancel_fma_deferring): New function.
3181         (result_of_phi): Likewise.
3182         (last_fma_candidate_feeds_initial_phi): Likewise.
3183         (convert_mult_to_fma): Added deferring logic, split actual
3184         transformation to convert_mult_to_fma_1.
3185         (math_opts_dom_walker): New type.
3186         (math_opts_dom_walker::after_dom_children): New method, body moved
3187         here from pass_optimize_widening_mul::execute, added deferring logic
3188         bits.
3189         (pass_optimize_widening_mul::execute): Moved most of code to
3190         math_opts_dom_walker::after_dom_children.
3191         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
3192         * config/i386/i386.c (ix86_option_override_internal): Added
3193         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
3194
3195 2018-01-12  Richard Biener  <rguenther@suse.de>
3196
3197         PR debug/83157
3198         * dwarf2out.c (gen_variable_die): Do not reset old_die for
3199         inline instance vars.
3200
3201 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
3202
3203         PR target/81819
3204         * config/rx/rx.c (rx_is_restricted_memory_address):
3205         Handle SUBREG case.
3206
3207 2018-01-12  Richard Biener  <rguenther@suse.de>
3208
3209         PR tree-optimization/80846
3210         * target.def (split_reduction): New target hook.
3211         * targhooks.c (default_split_reduction): New function.
3212         * targhooks.h (default_split_reduction): Declare.
3213         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
3214         target requests first reduce vectors by combining low and high
3215         parts.
3216         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
3217         (get_vectype_for_scalar_type_and_size): Export.
3218         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
3219         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
3220         * doc/tm.texi: Regenerate.
3221         * config/i386/i386.c (ix86_split_reduction): Implement
3222         TARGET_VECTORIZE_SPLIT_REDUCTION.
3223
3224 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
3225
3226         PR target/83368
3227         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
3228         in PIC mode except for TARGET_VXWORKS_RTP.
3229         * config/sparc/sparc.c: Include cfgrtl.h.
3230         (TARGET_INIT_PIC_REG): Define.
3231         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
3232         (sparc_pic_register_p): New predicate.
3233         (sparc_legitimate_address_p): Use it.
3234         (sparc_legitimize_pic_address): Likewise.
3235         (sparc_delegitimize_address): Likewise.
3236         (sparc_mode_dependent_address_p): Likewise.
3237         (gen_load_pcrel_sym): Remove 4th parameter.
3238         (load_got_register): Adjust call to above.  Remove obsolete stuff.
3239         (sparc_expand_prologue): Do not call load_got_register here.
3240         (sparc_flat_expand_prologue): Likewise.
3241         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
3242         (sparc_use_pseudo_pic_reg): New function.
3243         (sparc_init_pic_reg): Likewise.
3244         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
3245         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
3246
3247 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
3248
3249         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
3250         Add item for branch_cost.
3251
3252 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
3253
3254         PR rtl-optimization/83565
3255         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
3256         not extend the result to a larger mode for rotate operations.
3257         (num_sign_bit_copies1): Likewise.
3258
3259 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
3260
3261         PR target/40411
3262         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
3263         -symbolic.
3264         Use values-Xc.o for -pedantic.
3265         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
3266
3267 2018-01-12  Martin Liska  <mliska@suse.cz>
3268
3269         PR ipa/83054
3270         * ipa-devirt.c (final_warning_record::grow_type_warnings):
3271         New function.
3272         (possible_polymorphic_call_targets): Use it.
3273         (ipa_devirt): Likewise.
3274
3275 2018-01-12  Martin Liska  <mliska@suse.cz>
3276
3277         * profile-count.h (enum profile_quality): Use 0 as invalid
3278         enum value of profile_quality.
3279
3280 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
3281
3282         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
3283         -mext-string options.
3284
3285 2018-01-12  Richard Biener  <rguenther@suse.de>
3286
3287         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
3288         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
3289         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
3290         Likewise.
3291         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
3292
3293 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
3294
3295         * configure.ac (--with-long-double-format): Add support for the
3296         configuration option to change the default long double format on
3297         PowerPC systems.
3298         * config.gcc (powerpc*-linux*-*): Likewise.
3299         * configure: Regenerate.
3300         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
3301         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
3302         used without modification.
3303
3304 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3305
3306         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
3307         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
3308         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
3309         MISC_BUILTIN_SPEC_BARRIER.
3310         (rs6000_init_builtins): Likewise.
3311         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
3312         enum value.
3313         (speculation_barrier): New define_insn.
3314         * doc/extend.texi: Document __builtin_speculation_barrier.
3315
3316 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
3317
3318         PR target/83203
3319         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
3320         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
3321         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
3322         iterators.
3323         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
3324         integral modes instead of "ss" and "sd".
3325         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
3326         vectors with 32-bit and 64-bit elements.
3327         (vecdupssescalarmodesuffix): New mode attribute.
3328         (vec_dup<mode>): Use it.
3329
3330 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
3331
3332         PR target/83330
3333         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
3334         frame if argument is passed on stack.
3335
3336 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
3337
3338         PR target/82682
3339         * ree.c (combine_reaching_defs): Optimize also
3340         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
3341         reg2=any_extend(exp); reg1=reg2;, formatting fix.
3342
3343 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
3344
3345         PR middle-end/83189
3346         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
3347
3348 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
3349
3350         PR middle-end/83718
3351         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
3352         after they are computed.
3353
3354 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
3355
3356         PR tree-optimization/83695
3357         * gimple-loop-linterchange.cc
3358         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
3359         reset cached scev information after interchange.
3360         (pass_linterchange::execute): Remove call to scev_reset_htab.
3361
3362 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3363
3364         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
3365         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
3366         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
3367         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
3368         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
3369         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
3370         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
3371         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
3372         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
3373         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
3374         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
3375         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
3376         (V_lane_reg): Likewise.
3377         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
3378         New define_expand.
3379         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
3380         (vfmal_lane_low<mode>_intrinsic,
3381         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
3382         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
3383         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
3384         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
3385         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
3386         vfmsl_lane_high<mode>_intrinsic): New define_insns.
3387
3388 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3389
3390         * config/arm/arm-cpus.in (fp16fml): New feature.
3391         (ALL_SIMD): Add fp16fml.
3392         (armv8.2-a): Add fp16fml as an option.
3393         (armv8.3-a): Likewise.
3394         (armv8.4-a): Add fp16fml as part of fp16.
3395         * config/arm/arm.h (TARGET_FP16FML): Define.
3396         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
3397         when appropriate.
3398         * config/arm/arm-modes.def (V2HF): Define.
3399         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
3400         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
3401         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
3402         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
3403         vfmsl_low, vfmsl_high): New set of builtins.
3404         * config/arm/iterators.md (PLUSMINUS): New code iterator.
3405         (vfml_op): New code attribute.
3406         (VFMLHALVES): New int iterator.
3407         (VFML, VFMLSEL): New mode attributes.
3408         (V_reg): Define mapping for V2HF.
3409         (V_hi, V_lo): New mode attributes.
3410         (VF_constraint): Likewise.
3411         (vfml_half, vfml_half_selector): New int attributes.
3412         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
3413         define_expand.
3414         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
3415         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
3416         New define_insn.
3417         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
3418         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
3419         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
3420         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
3421         documentation.
3422         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
3423         Document new effective target and option set.
3424
3425 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3426
3427         * config/arm/arm-cpus.in (armv8_4): New feature.
3428         (ARMv8_4a): New fgroup.
3429         (armv8.4-a): New arch.
3430         * config/arm/arm-tables.opt: Regenerate.
3431         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
3432         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
3433         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
3434         Add matching rules for -march=armv8.4-a and extensions.
3435         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
3436
3437 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
3438
3439         PR target/81821
3440         * config/rx/rx.md (BW): New mode attribute.
3441         (sync_lock_test_and_setsi): Add mode suffix to insn output.
3442
3443 2018-01-11  Richard Biener  <rguenther@suse.de>
3444
3445         PR tree-optimization/83435
3446         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
3447         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
3448         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
3449
3450 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3451             Alan Hayward  <alan.hayward@arm.com>
3452             David Sherwood  <david.sherwood@arm.com>
3453
3454         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
3455         field.
3456         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
3457         (aarch64_print_address_internal): Use it to check for a zero offset.
3458
3459 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3460             Alan Hayward  <alan.hayward@arm.com>
3461             David Sherwood  <david.sherwood@arm.com>
3462
3463         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
3464         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
3465         Return a poly_int64 rather than a HOST_WIDE_INT.
3466         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
3467         rather than a HOST_WIDE_INT.
3468         * config/aarch64/aarch64.h (aarch64_frame): Protect with
3469         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
3470         hard_fp_offset, frame_size, initial_adjust, callee_offset and
3471         final_offset from HOST_WIDE_INT to poly_int64.
3472         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
3473         to_constant when getting the number of units in an Advanced SIMD
3474         mode.
3475         (aarch64_builtin_vectorized_function): Check for a constant number
3476         of units.
3477         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
3478         GET_MODE_SIZE.
3479         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
3480         attribute instead of GET_MODE_NUNITS.
3481         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
3482         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
3483         GET_MODE_SIZE for fixed-size registers.
3484         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
3485         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
3486         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
3487         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
3488         (aarch64_print_operand, aarch64_print_address_internal)
3489         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
3490         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
3491         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
3492         Handle polynomial GET_MODE_SIZE.
3493         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
3494         wider than SImode without modification.
3495         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
3496         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
3497         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
3498         passing and returning SVE modes.
3499         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
3500         rather than GEN_INT.
3501         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
3502         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
3503         (aarch64_allocate_and_probe_stack_space): Likewise.
3504         (aarch64_layout_frame): Cope with polynomial offsets.
3505         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
3506         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
3507         polynomial offsets.
3508         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
3509         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
3510         poly_int64 rather than a HOST_WIDE_INT.
3511         (aarch64_get_separate_components, aarch64_process_components)
3512         (aarch64_expand_prologue, aarch64_expand_epilogue)
3513         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
3514         (aarch64_anchor_offset): New function, split out from...
3515         (aarch64_legitimize_address): ...here.
3516         (aarch64_builtin_vectorization_cost): Handle polynomial
3517         TYPE_VECTOR_SUBPARTS.
3518         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
3519         GET_MODE_NUNITS.
3520         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
3521         number of elements from the PARALLEL rather than the mode.
3522         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
3523         rather than GET_MODE_BITSIZE.
3524         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
3525         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
3526         (aarch64_expand_vec_perm_const_1): Handle polynomial
3527         d->perm.length () and d->perm elements.
3528         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
3529         Apply to_constant to d->perm elements.
3530         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
3531         polynomial CONST_VECTOR_NUNITS.
3532         (aarch64_move_pointer): Take amount as a poly_int64 rather
3533         than an int.
3534         (aarch64_progress_pointer): Avoid temporary variable.
3535         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
3536         the mode attribute instead of GET_MODE.
3537
3538 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3539             Alan Hayward  <alan.hayward@arm.com>
3540             David Sherwood  <david.sherwood@arm.com>
3541
3542         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
3543         x exists before using it.
3544         (aarch64_add_constant_internal): Rename to...
3545         (aarch64_add_offset_1): ...this.  Replace regnum with separate
3546         src and dest rtxes.  Handle the case in which they're different,
3547         including when the offset is zero.  Replace scratchreg with an rtx.
3548         Use 2 additions if there is no spare register into which we can
3549         move a 16-bit constant.
3550         (aarch64_add_constant): Delete.
3551         (aarch64_add_offset): Replace reg with separate src and dest
3552         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
3553         Use aarch64_add_offset_1.
3554         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
3555         an rtx rather than an int.  Take the delta as a poly_int64
3556         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
3557         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
3558         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
3559         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
3560         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
3561         and aarch64_add_sp.
3562         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
3563         aarch64_add_constant.
3564
3565 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3566
3567         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
3568         Use scalar_float_mode.
3569
3570 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3571
3572         * config/aarch64/aarch64-simd.md
3573         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
3574         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
3575         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
3576         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
3577         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
3578         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
3579         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
3580         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
3581         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
3582         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
3583
3584 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3585
3586         PR target/83514
3587         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
3588         targ_options->x_arm_arch_string is non NULL.
3589
3590 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
3591
3592         * config/aarch64/aarch64.h
3593         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
3594
3595 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
3596
3597         PR target/82096
3598         * expmed.c (emit_store_flag_force): Swap if const op0
3599         and change VOIDmode to mode of op0.
3600
3601 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
3602
3603         PR rtl-optimization/83761
3604         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
3605         than bytes to mode_for_size.
3606
3607 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3608
3609         PR middle-end/83189
3610         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
3611         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
3612         profile.
3613
3614 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
3615
3616         PR middle-end/83575
3617         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
3618         when in layout mode.
3619         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
3620         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
3621         partition fixup.
3622
3623 2018-01-10  Michael Collison  <michael.collison@arm.com>
3624
3625         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
3626         * config/aarch64/aarch64-option-extension.def: Add
3627         AARCH64_OPT_EXTENSION of 'fp16fml'.
3628         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3629         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
3630         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
3631         * config/aarch64/constraints.md (Ui7): New constraint.
3632         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
3633         (VFMLA_SEL_W): Ditto.
3634         (f16quad): Ditto.
3635         (f16mac1): Ditto.
3636         (VFMLA16_LOW): New int iterator.
3637         (VFMLA16_HIGH): Ditto.
3638         (UNSPEC_FMLAL): New unspec.
3639         (UNSPEC_FMLSL): Ditto.
3640         (UNSPEC_FMLAL2): Ditto.
3641         (UNSPEC_FMLSL2): Ditto.
3642         (f16mac): New code attribute.
3643         * config/aarch64/aarch64-simd-builtins.def
3644         (aarch64_fmlal_lowv2sf): Ditto.
3645         (aarch64_fmlsl_lowv2sf): Ditto.
3646         (aarch64_fmlalq_lowv4sf): Ditto.
3647         (aarch64_fmlslq_lowv4sf): Ditto.
3648         (aarch64_fmlal_highv2sf): Ditto.
3649         (aarch64_fmlsl_highv2sf): Ditto.
3650         (aarch64_fmlalq_highv4sf): Ditto.
3651         (aarch64_fmlslq_highv4sf): Ditto.
3652         (aarch64_fmlal_lane_lowv2sf): Ditto.
3653         (aarch64_fmlsl_lane_lowv2sf): Ditto.
3654         (aarch64_fmlal_laneq_lowv2sf): Ditto.
3655         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
3656         (aarch64_fmlalq_lane_lowv4sf): Ditto.
3657         (aarch64_fmlsl_lane_lowv4sf): Ditto.
3658         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
3659         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
3660         (aarch64_fmlal_lane_highv2sf): Ditto.
3661         (aarch64_fmlsl_lane_highv2sf): Ditto.
3662         (aarch64_fmlal_laneq_highv2sf): Ditto.
3663         (aarch64_fmlsl_laneq_highv2sf): Ditto.
3664         (aarch64_fmlalq_lane_highv4sf): Ditto.
3665         (aarch64_fmlsl_lane_highv4sf): Ditto.
3666         (aarch64_fmlalq_laneq_highv4sf): Ditto.
3667         (aarch64_fmlsl_laneq_highv4sf): Ditto.
3668         * config/aarch64/aarch64-simd.md:
3669         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
3670         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3671         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
3672         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
3673         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
3674         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
3675         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
3676         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
3677         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
3678         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
3679         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
3680         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
3681         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
3682         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
3683         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
3684         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
3685         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
3686         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
3687         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
3688         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
3689         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
3690         (vfmlsl_low_u32): Ditto.
3691         (vfmlalq_low_u32): Ditto.
3692         (vfmlslq_low_u32): Ditto.
3693         (vfmlal_high_u32): Ditto.
3694         (vfmlsl_high_u32): Ditto.
3695         (vfmlalq_high_u32): Ditto.
3696         (vfmlslq_high_u32): Ditto.
3697         (vfmlal_lane_low_u32): Ditto.
3698         (vfmlsl_lane_low_u32): Ditto.
3699         (vfmlal_laneq_low_u32): Ditto.
3700         (vfmlsl_laneq_low_u32): Ditto.
3701         (vfmlalq_lane_low_u32): Ditto.
3702         (vfmlslq_lane_low_u32): Ditto.
3703         (vfmlalq_laneq_low_u32): Ditto.
3704         (vfmlslq_laneq_low_u32): Ditto.
3705         (vfmlal_lane_high_u32): Ditto.
3706         (vfmlsl_lane_high_u32): Ditto.
3707         (vfmlal_laneq_high_u32): Ditto.
3708         (vfmlsl_laneq_high_u32): Ditto.
3709         (vfmlalq_lane_high_u32): Ditto.
3710         (vfmlslq_lane_high_u32): Ditto.
3711         (vfmlalq_laneq_high_u32): Ditto.
3712         (vfmlslq_laneq_high_u32): Ditto.
3713         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
3714         (AARCH64_FL_FOR_ARCH8_4): New.
3715         (AARCH64_ISA_F16FML): New ISA flag.
3716         (TARGET_F16FML): New feature flag for fp16fml.
3717         (doc/invoke.texi): Document new fp16fml option.
3718
3719 2018-01-10  Michael Collison  <michael.collison@arm.com>
3720
3721         * config/aarch64/aarch64-builtins.c:
3722         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
3723         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3724         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
3725         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
3726         (AARCH64_ISA_SHA3): New ISA flag.
3727         (TARGET_SHA3): New feature flag for sha3.
3728         * config/aarch64/iterators.md (sha512_op): New int attribute.
3729         (CRYPTO_SHA512): New int iterator.
3730         (UNSPEC_SHA512H): New unspec.
3731         (UNSPEC_SHA512H2): Ditto.
3732         (UNSPEC_SHA512SU0): Ditto.
3733         (UNSPEC_SHA512SU1): Ditto.
3734         * config/aarch64/aarch64-simd-builtins.def
3735         (aarch64_crypto_sha512hqv2di): New builtin.
3736         (aarch64_crypto_sha512h2qv2di): Ditto.
3737         (aarch64_crypto_sha512su0qv2di): Ditto.
3738         (aarch64_crypto_sha512su1qv2di): Ditto.
3739         (aarch64_eor3qv8hi): Ditto.
3740         (aarch64_rax1qv2di): Ditto.
3741         (aarch64_xarqv2di): Ditto.
3742         (aarch64_bcaxqv8hi): Ditto.
3743         * config/aarch64/aarch64-simd.md:
3744         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
3745         (aarch64_crypto_sha512su0qv2di): Ditto.
3746         (aarch64_crypto_sha512su1qv2di): Ditto.
3747         (aarch64_eor3qv8hi): Ditto.
3748         (aarch64_rax1qv2di): Ditto.
3749         (aarch64_xarqv2di): Ditto.
3750         (aarch64_bcaxqv8hi): Ditto.
3751         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
3752         (vsha512h2q_u64): Ditto.
3753         (vsha512su0q_u64): Ditto.
3754         (vsha512su1q_u64): Ditto.
3755         (veor3q_u16): Ditto.
3756         (vrax1q_u64): Ditto.
3757         (vxarq_u64): Ditto.
3758         (vbcaxq_u16): Ditto.
3759         * config/arm/types.md (crypto_sha512): New type attribute.
3760         (crypto_sha3): Ditto.
3761         (doc/invoke.texi): Document new sha3 option.
3762
3763 2018-01-10  Michael Collison  <michael.collison@arm.com>
3764
3765         * config/aarch64/aarch64-builtins.c:
3766         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
3767         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3768         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
3769         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
3770         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
3771         (AARCH64_ISA_SM4): New ISA flag.
3772         (TARGET_SM4): New feature flag for sm4.
3773         * config/aarch64/aarch64-simd-builtins.def
3774         (aarch64_sm3ss1qv4si): Ditto.
3775         (aarch64_sm3tt1aq4si): Ditto.
3776         (aarch64_sm3tt1bq4si): Ditto.
3777         (aarch64_sm3tt2aq4si): Ditto.
3778         (aarch64_sm3tt2bq4si): Ditto.
3779         (aarch64_sm3partw1qv4si): Ditto.
3780         (aarch64_sm3partw2qv4si): Ditto.
3781         (aarch64_sm4eqv4si): Ditto.
3782         (aarch64_sm4ekeyqv4si): Ditto.
3783         * config/aarch64/aarch64-simd.md:
3784         (aarch64_sm3ss1qv4si): Ditto.
3785         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
3786         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
3787         (aarch64_sm4eqv4si): Ditto.
3788         (aarch64_sm4ekeyqv4si): Ditto.
3789         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
3790         (sm3part_op): Ditto.
3791         (CRYPTO_SM3TT): Ditto.
3792         (CRYPTO_SM3PART): Ditto.
3793         (UNSPEC_SM3SS1): New unspec.
3794         (UNSPEC_SM3TT1A): Ditto.
3795         (UNSPEC_SM3TT1B): Ditto.
3796         (UNSPEC_SM3TT2A): Ditto.
3797         (UNSPEC_SM3TT2B): Ditto.
3798         (UNSPEC_SM3PARTW1): Ditto.
3799         (UNSPEC_SM3PARTW2): Ditto.
3800         (UNSPEC_SM4E): Ditto.
3801         (UNSPEC_SM4EKEY): Ditto.
3802         * config/aarch64/constraints.md (Ui2): New constraint.
3803         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
3804         * config/arm/types.md (crypto_sm3): New type attribute.
3805         (crypto_sm4): Ditto.
3806         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
3807         (vsm3tt1aq_u32): Ditto.
3808         (vsm3tt1bq_u32): Ditto.
3809         (vsm3tt2aq_u32): Ditto.
3810         (vsm3tt2bq_u32): Ditto.
3811         (vsm3partw1q_u32): Ditto.
3812         (vsm3partw2q_u32): Ditto.
3813         (vsm4eq_u32): Ditto.
3814         (vsm4ekeyq_u32): Ditto.
3815         (doc/invoke.texi): Document new sm4 option.
3816
3817 2018-01-10  Michael Collison  <michael.collison@arm.com>
3818
3819         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
3820         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
3821         (AARCH64_FL_FOR_ARCH8_4): New.
3822         (AARCH64_FL_V8_4): New flag.
3823         (doc/invoke.texi): Document new armv8.4-a option.
3824
3825 2018-01-10  Michael Collison  <michael.collison@arm.com>
3826
3827         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3828         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
3829         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
3830         * config/aarch64/aarch64-option-extension.def: Add
3831         AARCH64_OPT_EXTENSION of 'sha2'.
3832         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
3833         (crypto): Disable sha2 and aes if crypto disabled.
3834         (crypto): Enable aes and sha2 if enabled.
3835         (simd): Disable sha2 and aes if simd disabled.
3836         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
3837         New flags.
3838         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
3839         (TARGET_SHA2): New feature flag for sha2.
3840         (TARGET_AES): New feature flag for aes.
3841         * config/aarch64/aarch64-simd.md:
3842         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
3843         conditional on TARGET_AES.
3844         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
3845         (aarch64_crypto_sha1hsi): Make pattern conditional
3846         on TARGET_SHA2.
3847         (aarch64_crypto_sha1hv4si): Ditto.
3848         (aarch64_be_crypto_sha1hv4si): Ditto.
3849         (aarch64_crypto_sha1su1v4si): Ditto.
3850         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
3851         (aarch64_crypto_sha1su0v4si): Ditto.
3852         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
3853         (aarch64_crypto_sha256su0v4si): Ditto.
3854         (aarch64_crypto_sha256su1v4si): Ditto.
3855         (doc/invoke.texi): Document new aes and sha2 options.
3856
3857 2018-01-10  Martin Sebor  <msebor@redhat.com>
3858
3859         PR tree-optimization/83781
3860         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
3861         as string arrays.
3862
3863 2018-01-11  Martin Sebor  <msebor@gmail.com>
3864             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3865
3866         PR tree-optimization/83501
3867         PR tree-optimization/81703
3868
3869         * tree-ssa-strlen.c (get_string_cst): Rename...
3870         (get_string_len): ...to this.  Handle global constants.
3871         (handle_char_store): Adjust.
3872
3873 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
3874             Jim Wilson  <jimw@sifive.com>
3875
3876         * config/riscv/riscv-protos.h (riscv_output_return): New.
3877         * config/riscv/riscv.c (struct machine_function): New naked_p field.
3878         (riscv_attribute_table, riscv_output_return),
3879         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
3880         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
3881         (riscv_compute_frame_info): Only compute frame->mask if not a naked
3882         function.
3883         (riscv_expand_prologue): Add early return for naked function.
3884         (riscv_expand_epilogue): Likewise.
3885         (riscv_function_ok_for_sibcall): Return false for naked function.
3886         (riscv_set_current_function): New.
3887         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
3888         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
3889         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
3890         * doc/extend.texi (RISC-V Function Attributes): New.
3891
3892 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
3893
3894         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
3895         check for 128-bit long double before checking TCmode.
3896         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
3897         128-bit long doubles before checking TFmode or TCmode.
3898         (FLOAT128_IBM_P): Likewise.
3899
3900 2018-01-10  Martin Sebor  <msebor@redhat.com>
3901
3902         PR tree-optimization/83671
3903         * builtins.c (c_strlen): Unconditionally return zero for the empty
3904         string.
3905         Use -Warray-bounds for warnings.
3906         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
3907         for non-constant array indices with COMPONENT_REF, arrays of
3908         arrays, and pointers to arrays.
3909         (gimple_fold_builtin_strlen): Determine and set length range for
3910         non-constant character arrays.
3911
3912 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
3913
3914         PR middle-end/81897
3915         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
3916         empty blocks.
3917
3918 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
3919
3920         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
3921
3922 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3923
3924         PR target/83399
3925         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
3926         VECTOR_MEM_ALTIVEC_OR_VSX_P.
3927         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
3928         indexed_or_indirect_operand predicate.
3929         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
3930         (*vsx_le_perm_load_v8hi): Likewise.
3931         (*vsx_le_perm_load_v16qi): Likewise.
3932         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
3933         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
3934         (*vsx_le_perm_store_v8hi): Likewise.
3935         (*vsx_le_perm_store_v16qi): Likewise.
3936         (eight unnamed splitters): Likewise.
3937
3938 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
3939
3940         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
3941         * config/rs6000/emmintrin.h: Likewise.
3942         * config/rs6000/mmintrin.h: Likewise.
3943         * config/rs6000/xmmintrin.h: Likewise.
3944
3945 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
3946
3947         PR c++/43486
3948         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
3949         "public_flag".
3950         * tree.c (tree_nop_conversion): Return true for location wrapper
3951         nodes.
3952         (maybe_wrap_with_location): New function.
3953         (selftest::check_strip_nops): New function.
3954         (selftest::test_location_wrappers): New function.
3955         (selftest::tree_c_tests): Call it.
3956         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
3957         (maybe_wrap_with_location): New decl.
3958         (EXPR_LOCATION_WRAPPER_P): New macro.
3959         (location_wrapper_p): New inline function.
3960         (tree_strip_any_location_wrapper): New inline function.
3961
3962 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
3963
3964         PR target/83735
3965         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
3966         stack_realign_offset for the largest alignment of stack slot
3967         actually used.
3968         (ix86_find_max_used_stack_alignment): New function.
3969         (ix86_finalize_stack_frame_flags): Use it.  Set
3970         max_used_stack_alignment if we don't realign stack.
3971         * config/i386/i386.h (machine_function): Add
3972         max_used_stack_alignment.
3973
3974 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
3975
3976         * config/arm/arm.opt (-mbranch-cost): New option.
3977         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
3978         account.
3979
3980 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
3981
3982         PR target/83629
3983         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
3984         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
3985
3986 2018-01-10  Richard Biener  <rguenther@suse.de>
3987
3988         PR debug/83765
3989         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
3990         early out so it also covers the case where we have a non-NULL
3991         origin.
3992
3993 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
3994
3995         PR tree-optimization/83753
3996         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
3997         for non-strided grouped accesses if the number of elements is 1.
3998
3999 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
4000
4001         PR target/81616
4002         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
4003         * i386.h (TARGET_USE_GATHER): Define.
4004         * x86-tune.def (X86_TUNE_USE_GATHER): New.
4005
4006 2018-01-10  Martin Liska  <mliska@suse.cz>
4007
4008         PR bootstrap/82831
4009         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
4010         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
4011         partitioning.
4012         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
4013         CLEANUP_NO_PARTITIONING is not set.
4014
4015 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
4016
4017         * doc/rtl.texi: Remove documentation of (const ...) wrappers
4018         for vectors, as a partial revert of r254296.
4019         * rtl.h (const_vec_p): Delete.
4020         (const_vec_duplicate_p): Don't test for vector CONSTs.
4021         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
4022         * expmed.c (make_tree): Likewise.
4023
4024         Revert:
4025         * common.md (E, F): Use CONSTANT_P instead of checking for
4026         CONST_VECTOR.
4027         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
4028         checking for CONST_VECTOR.
4029
4030 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
4031
4032         PR middle-end/83575
4033         * predict.c (force_edge_cold): Handle in more sane way edges
4034         with no prediction.
4035
4036 2018-01-09  Carl Love  <cel@us.ibm.com>
4037
4038         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
4039         V4SI, V4SF types.
4040         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
4041         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
4042         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
4043         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
4044         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
4045         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
4046         * config/rs6000/rs6000-protos.h: Add extern defition for
4047         rs6000_generate_float2_double_code.
4048         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
4049         function.
4050         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
4051         (float2_v2df): Add define_expand.
4052
4053 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
4054
4055         PR target/83628
4056         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
4057         op_mode in the force_to_mode call.
4058
4059 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
4060
4061         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
4062         instead of checking each element individually.
4063         (aarch64_evpc_uzp): Likewise.
4064         (aarch64_evpc_zip): Likewise.
4065         (aarch64_evpc_ext): Likewise.
4066         (aarch64_evpc_rev): Likewise.
4067         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
4068         instead of checking each element individually.  Return true without
4069         generating rtl if
4070         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
4071         whether all selected elements come from the same input, instead of
4072         checking each element individually.  Remove calls to gen_rtx_REG,
4073         start_sequence and end_sequence and instead assert that no rtl is
4074         generated.
4075
4076 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
4077
4078         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
4079         order of HIGH and CONST checks.
4080
4081 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
4082
4083         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
4084         if the destination isn't an SSA_NAME.
4085
4086 2018-01-09  Richard Biener  <rguenther@suse.de>
4087
4088         PR tree-optimization/83668
4089         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
4090         move prologue...
4091         (canonicalize_loop_form): ... here, renamed from ...
4092         (canonicalize_loop_closed_ssa_form): ... this and amended to
4093         swap successor edges for loop exit blocks to make us use
4094         the RPO order we need for initial schedule generation.
4095
4096 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
4097
4098         PR tree-optimization/64811
4099         * match.pd: When optimizing comparisons with Inf, avoid
4100         introducing or losing exceptions from comparisons with NaN.
4101
4102 2018-01-09  Martin Liska  <mliska@suse.cz>
4103
4104         PR sanitizer/82517
4105         * asan.c (shadow_mem_size): Add gcc_assert.
4106
4107 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
4108
4109         Don't save registers in main().
4110
4111         PR target/83738
4112         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
4113         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
4114         * config/avr/avr.c (avr_set_current_function): Don't error if
4115         naked, OS_task or OS_main are specified at the same time.
4116         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
4117         OS_main.
4118         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
4119         attribute.
4120         * common/config/avr/avr-common.c (avr_option_optimization_table):
4121         Switch on -mmain-is-OS_task for optimizing compilations.
4122
4123 2018-01-09  Richard Biener  <rguenther@suse.de>
4124
4125         PR tree-optimization/83572
4126         * graphite.c: Include cfganal.h.
4127         (graphite_transform_loops): Connect infinite loops to exit
4128         and remove fake edges at the end.
4129
4130 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
4131
4132         * ipa-inline.c (edge_badness): Revert accidental checkin.
4133
4134 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
4135
4136         PR ipa/80763
4137         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
4138         symbols; not inline clones.
4139
4140 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
4141
4142         PR target/83507
4143         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
4144         hard registers.  Formatting fixes.
4145
4146         PR preprocessor/83722
4147         * gcc.c (try_generate_repro): Pass
4148         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
4149         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
4150         do_report_bug.
4151
4152 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
4153             Kito Cheng  <kito.cheng@gmail.com>
4154
4155         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
4156         (riscv_leaf_function_p): Delete.
4157         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
4158
4159 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
4160
4161         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
4162         function.
4163         (do_ifelse): New function.
4164         (do_isel): New function.
4165         (do_sub3): New function.
4166         (do_add3): New function.
4167         (do_load_mask_compare): New function.
4168         (do_overlap_load_compare): New function.
4169         (expand_compare_loop): New function.
4170         (expand_block_compare): Call expand_compare_loop() when appropriate.
4171         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
4172         option description.
4173         (-mblock-compare-inline-loop-limit): New option.
4174
4175 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
4176
4177         PR target/83677
4178         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
4179         Reverse order of second and third operands in first alternative.
4180         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
4181         of first and second elements in UNSPEC_VPERMR vector.
4182         (altivec_expand_vec_perm_le): Likewise.
4183
4184 2018-01-08  Jeff Law  <law@redhat.com>
4185
4186         PR rtl-optimizatin/81308
4187         * tree-switch-conversion.c (cfg_altered): New file scoped static.
4188         (process_switch): If group_case_labels makes a change, then set
4189         cfg_altered.
4190         (pass_convert_switch::execute): If a switch is converted, then
4191         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
4192
4193         PR rtl-optimization/81308
4194         * recog.c (split_all_insns): Conditionally cleanup the CFG after
4195         splitting insns.
4196
4197 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
4198
4199         PR target/83663 - Revert r255946
4200         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
4201         generation for cases where splatting a value is not useful.
4202         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
4203         across a vec_duplicate and a paradoxical subreg forming a vector
4204         mode to a vec_concat.
4205
4206 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
4207
4208         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
4209         -march=armv8.3-a variants.
4210         * config/arm/t-multilib: Likewise.
4211         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
4212
4213 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
4214
4215         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
4216         to generate rtl.
4217         (cceq_ior_compare_complement): Give it a name so I can use it, and
4218         change boolean_or_operator predicate to boolean_operator so it can
4219         be used to generate a crand.
4220         (eqne): New code iterator.
4221         (bd/bd_neg): New code_attrs.
4222         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
4223         a single define_insn.
4224         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
4225         decrement (bdnzt/bdnzf/bdzt/bdzf).
4226         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
4227         with the new names of the branch decrement patterns, and added the
4228         names of the branch decrement conditional patterns.
4229
4230 2018-01-08  Richard Biener  <rguenther@suse.de>
4231
4232         PR tree-optimization/83563
4233         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
4234         cache.
4235
4236 2018-01-08  Richard Biener  <rguenther@suse.de>
4237
4238         PR middle-end/83713
4239         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
4240
4241 2018-01-08  Richard Biener  <rguenther@suse.de>
4242
4243         PR tree-optimization/83685
4244         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
4245         references to abnormals.
4246
4247 2018-01-08  Richard Biener  <rguenther@suse.de>
4248
4249         PR lto/83719
4250         * dwarf2out.c (output_indirect_strings): Handle empty
4251         skeleton_debug_str_hash.
4252         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
4253
4254 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
4255
4256         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
4257         (emit_store_direct): Likewise.
4258         (arc_trampoline_adjust_address): Likewise.
4259         (arc_asm_trampoline_template): New function.
4260         (arc_initialize_trampoline): Use asm_trampoline_template.
4261         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
4262         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
4263         * config/arc/arc.md (flush_icache): Delete pattern.
4264
4265 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
4266
4267         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
4268         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
4269         munaligned-access.
4270
4271 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4272
4273         PR target/83681
4274         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
4275         by not USED_FOR_TARGET.
4276         (make_pass_resolve_sw_modes): Likewise.
4277
4278 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4279
4280         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
4281         USED_FOR_TARGET.
4282
4283 2018-01-08  Richard Biener  <rguenther@suse.de>
4284
4285         PR middle-end/83580
4286         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
4287
4288 2018-01-08  Richard Biener  <rguenther@suse.de>
4289
4290         PR middle-end/83517
4291         * match.pd ((t * 2) / 2) -> t): Add missing :c.
4292
4293 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
4294
4295         PR middle-end/81897
4296         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
4297         basic blocks with a small number of successors.
4298         (convert_control_dep_chain_into_preds): Improve handling of
4299         forwarder blocks.
4300         (dump_predicates): Split apart into...
4301         (dump_pred_chain): ...here...
4302         (dump_pred_info): ...and here.
4303         (can_one_predicate_be_invalidated_p): Add debugging printfs.
4304         (can_chain_union_be_invalidated_p): Improve check for invalidation
4305         of paths.
4306         (uninit_uses_cannot_happen): Avoid unnecessary if
4307         convert_control_dep_chain_into_preds yielded nothing.
4308
4309 2018-01-06  Martin Sebor  <msebor@redhat.com>
4310
4311         PR tree-optimization/83640
4312         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
4313         subtracting negative offset from size.
4314         (builtin_access::overlap): Adjust offset bounds of the access to fall
4315         within the size of the object if possible.
4316
4317 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
4318
4319         PR rtl-optimization/83699
4320         * expmed.c (extract_bit_field_1): Restrict the vector usage of
4321         extract_bit_field_as_subreg to cases in which the extracted
4322         value is also a vector.
4323
4324         * lra-constraints.c (process_alt_operands): Test for the equivalence
4325         substitutions when detecting a possible reload cycle.
4326
4327 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
4328
4329         PR debug/83480
4330         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
4331         by default if flag_selective_schedling{,2}.  Formatting fixes.
4332
4333         PR rtl-optimization/83682
4334         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
4335         if it has non-VECTOR_MODE element mode.
4336         (vec_duplicate_p): Likewise.
4337
4338         PR middle-end/83694
4339         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
4340         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
4341
4342 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
4343
4344         PR target/83604
4345         * config/i386/i386-builtin.def
4346         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
4347         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
4348         Require also OPTION_MASK_ISA_AVX512F in addition to
4349         OPTION_MASK_ISA_GFNI.
4350         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
4351         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
4352         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
4353         to OPTION_MASK_ISA_GFNI.
4354         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
4355         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
4356         OPTION_MASK_ISA_AVX512BW.
4357         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
4358         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
4359         addition to OPTION_MASK_ISA_GFNI.
4360         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
4361         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
4362         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
4363         to OPTION_MASK_ISA_GFNI.
4364         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
4365         a requirement for all ISAs rather than any of them with a few
4366         exceptions.
4367         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
4368         processing.
4369         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
4370         bitmasks to be enabled with 3 exceptions, instead of requiring any
4371         enabled ISA with lots of exceptions.
4372         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
4373         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
4374         Change avx512bw in isa attribute to avx512f.
4375         * config/i386/sgxintrin.h: Add license boilerplate.
4376         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
4377         to __AVX512F__ and __AVX512VL to __AVX512VL__.
4378         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
4379         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
4380         defined.
4381         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
4382         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
4383         temporarily sse2 rather than sse if not enabled already.
4384
4385         PR target/83604
4386         * config/i386/sse.md (VI248_VLBW): Rename to ...
4387         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
4388         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
4389         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
4390         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
4391         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
4392         mode iterator instead of VI248_VLBW.
4393
4394 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
4395
4396         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
4397         (record_modified): Skip clobbers; add debug output.
4398         (param_change_prob): Use sreal frequencies.
4399
4400 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
4401
4402         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
4403         punt for user-aligned variables.
4404
4405 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
4406
4407         * tree-chrec.c (chrec_contains_symbols): Return true for
4408         POLY_INT_CST.
4409
4410 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
4411
4412         PR target/82439
4413         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
4414         of (x|y) == x for BICS pattern.
4415
4416 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
4417
4418         PR tree-optimization/83605
4419         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
4420         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
4421         can throw.
4422
4423 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
4424
4425         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
4426         * config/epiphany/rtems.h: New file.
4427
4428 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4429             Uros Bizjak  <ubizjak@gmail.com>
4430
4431         PR target/83554
4432         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
4433         QIreg_operand instead of register_operand predicate.
4434         * config/i386/i386.c (ix86_rop_should_change_byte_p,
4435         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
4436         comments instead of -fmitigate[-_]rop.
4437
4438 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
4439
4440         PR bootstrap/81926
4441         * cgraphunit.c (symbol_table::compile): Switch to text_section
4442         before calling assembly_start debug hook.
4443         * run-rtl-passes.c (run_rtl_passes): Likewise.
4444         Include output.h.
4445
4446 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4447
4448         * tree-vrp.c (extract_range_from_binary_expr_1): Check
4449         range_int_cst_p rather than !symbolic_range_p before calling
4450         extract_range_from_multiplicative_op_1.
4451
4452 2018-01-04  Jeff Law  <law@redhat.com>
4453
4454         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
4455         redundant test in assertion.
4456
4457 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4458
4459         * doc/rtl.texi: Document machine_mode wrapper classes.
4460
4461 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4462
4463         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
4464         using tree_to_uhwi.
4465
4466 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4467
4468         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
4469         the VEC_PERM_EXPR fold to fail.
4470
4471 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4472
4473         PR debug/83585
4474         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
4475         to switched_sections.
4476
4477 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4478
4479         PR target/83680
4480         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
4481         test for d.testing.
4482
4483 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
4484
4485         PR target/83387
4486         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
4487         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
4488
4489 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4490
4491         PR debug/83666
4492         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
4493         is BLKmode and bitpos not zero or mode change is needed.
4494
4495 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
4496
4497         PR target/83675
4498         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
4499         TARGET_VIS2.
4500
4501 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
4502
4503         PR target/83628
4504         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
4505         instead of MULT rtx.  Update all corresponding splitters.
4506         (*saddl_se): Ditto.
4507         (*ssub<modesuffix>): Ditto.
4508         (*ssubl_se): Ditto.
4509         (*cmp_sadd_di): Update split patterns.
4510         (*cmp_sadd_si): Ditto.
4511         (*cmp_sadd_sidi): Ditto.
4512         (*cmp_ssub_di): Ditto.
4513         (*cmp_ssub_si): Ditto.
4514         (*cmp_ssub_sidi): Ditto.
4515         * config/alpha/predicates.md (const23_operand): New predicate.
4516         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
4517         Look for ASHIFT, not MULT inner operand.
4518         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
4519
4520 2018-01-04  Martin Liska  <mliska@suse.cz>
4521
4522         PR gcov-profile/83669
4523         * gcov.c (output_intermediate_file): Add version to intermediate
4524         gcov file.
4525         * doc/gcov.texi: Document new field 'version' in intermediate
4526         file format. Fix location of '-k' option of gcov command.
4527
4528 2018-01-04  Martin Liska  <mliska@suse.cz>
4529
4530         PR ipa/82352
4531         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
4532
4533 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
4534
4535         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
4536
4537 2018-01-03  Martin Sebor  <msebor@redhat.com>
4538
4539         PR tree-optimization/83655
4540         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
4541         checking calls with invalid arguments.
4542
4543 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4544
4545         * tree-vect-stmts.c (vect_get_store_rhs): New function.
4546         (vectorizable_mask_load_store): Delete.
4547         (vectorizable_call): Return false for masked loads and stores.
4548         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
4549         instead of gimple_assign_rhs1.
4550         (vectorizable_load): Handle IFN_MASK_LOAD.
4551         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
4552
4553 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4554
4555         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
4556         split out from..,
4557         (vectorizable_mask_load_store): ...here.
4558         (vectorizable_load): ...and here.
4559
4560 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4561
4562         * tree-vect-stmts.c (vect_build_all_ones_mask)
4563         (vect_build_zero_merge_argument): New functions, split out from...
4564         (vectorizable_load): ...here.
4565
4566 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4567
4568         * tree-vect-stmts.c (vect_check_store_rhs): New function,
4569         split out from...
4570         (vectorizable_mask_load_store): ...here.
4571         (vectorizable_store): ...and here.
4572
4573 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4574
4575         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
4576         split out from...
4577         (vectorizable_mask_load_store): ...here.
4578
4579 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4580
4581         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
4582         (vect_model_store_cost): Take a vec_load_store_type instead of a
4583         vect_def_type.
4584         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
4585         (vect_model_store_cost): Take a vec_load_store_type instead of a
4586         vect_def_type.
4587         (vectorizable_mask_load_store): Update accordingly.
4588         (vectorizable_store): Likewise.
4589         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
4590
4591 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4592
4593         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
4594         IFN_MASK_LOAD calls here rather than...
4595         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
4596
4597 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4598             Alan Hayward  <alan.hayward@arm.com>
4599             David Sherwood  <david.sherwood@arm.com>
4600
4601         * expmed.c (extract_bit_field_1): For vector extracts,
4602         fall back to extract_bit_field_as_subreg if vec_extract
4603         isn't available.
4604
4605 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4606             Alan Hayward  <alan.hayward@arm.com>
4607             David Sherwood  <david.sherwood@arm.com>
4608
4609         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
4610         they are variable or constant sized.
4611         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
4612         slots for constant-sized data.
4613
4614 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4615             Alan Hayward  <alan.hayward@arm.com>
4616             David Sherwood  <david.sherwood@arm.com>
4617
4618         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
4619         handling COND_EXPRs with boolean comparisons, try to find a better
4620         basis for the mask type than the boolean itself.
4621
4622 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4623
4624         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
4625         is calculated and how it can be overridden.
4626         * genmodes.c (max_bitsize_mode_any_mode): New variable.
4627         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
4628         if defined.
4629         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
4630         if nonzero.
4631
4632 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4633             Alan Hayward  <alan.hayward@arm.com>
4634             David Sherwood  <david.sherwood@arm.com>
4635
4636         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
4637         Remove the mode argument.
4638         (aarch64_simd_valid_immediate): Remove the mode and inverse
4639         arguments.
4640         * config/aarch64/iterators.md (bitsize): New iterator.
4641         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
4642         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
4643         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
4644         aarch64_simd_valid_immediate.
4645         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
4646         (aarch64_reg_or_bic_imm): Likewise.
4647         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
4648         with an insn_type enum and msl with a modifier_type enum.
4649         Replace element_width with a scalar_mode.  Change the shift
4650         to unsigned int.  Add constructors for scalar_float_mode and
4651         scalar_int_mode elements.
4652         (aarch64_vect_float_const_representable_p): Delete.
4653         (aarch64_can_const_movi_rtx_p)
4654         (aarch64_simd_scalar_immediate_valid_for_move)
4655         (aarch64_simd_make_constant): Update call to
4656         aarch64_simd_valid_immediate.
4657         (aarch64_advsimd_valid_immediate_hs): New function.
4658         (aarch64_advsimd_valid_immediate): Likewise.
4659         (aarch64_simd_valid_immediate): Remove mode and inverse
4660         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
4661         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
4662         and aarch64_float_const_representable_p on the result.
4663         (aarch64_output_simd_mov_immediate): Remove mode argument.
4664         Update call to aarch64_simd_valid_immediate and use of
4665         simd_immediate_info.
4666         (aarch64_output_scalar_simd_mov_immediate): Update call
4667         accordingly.
4668
4669 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4670             Alan Hayward  <alan.hayward@arm.com>
4671             David Sherwood  <david.sherwood@arm.com>
4672
4673         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
4674         (mode_nunits): Likewise CONST_MODE_NUNITS.
4675         * machmode.def (ADJUST_NUNITS): Document.
4676         * genmodes.c (mode_data::need_nunits_adj): New field.
4677         (blank_mode): Update accordingly.
4678         (adj_nunits): New variable.
4679         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
4680         parameter.
4681         (emit_mode_size_inline): Set need_bytesize_adj for all modes
4682         listed in adj_nunits.
4683         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
4684         listed in adj_nunits.  Don't emit case statements for such modes.
4685         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
4686         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
4687         nothing if adj_nunits is nonnull.
4688         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
4689         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
4690         (emit_mode_fbit): Update use of print_maybe_const_decl.
4691         (emit_move_size): Likewise.  Treat the array as non-const
4692         if adj_nunits.
4693         (emit_mode_adjustments): Handle adj_nunits.
4694
4695 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4696
4697         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
4698         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
4699         (VECTOR_MODES): Use it.
4700         (make_vector_modes): Take the prefix as an argument.
4701
4702 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4703             Alan Hayward  <alan.hayward@arm.com>
4704             David Sherwood  <david.sherwood@arm.com>
4705
4706         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
4707         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
4708         for MODE_VECTOR_BOOL.
4709         * machmode.def (VECTOR_BOOL_MODE): Document.
4710         * genmodes.c (VECTOR_BOOL_MODE): New macro.
4711         (make_vector_bool_mode): New function.
4712         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
4713         MODE_VECTOR_BOOL.
4714         * lto-streamer-in.c (lto_input_mode_table): Likewise.
4715         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
4716         Likewise.
4717         * stor-layout.c (int_mode_for_mode): Likewise.
4718         * tree.c (build_vector_type_for_mode): Likewise.
4719         * varasm.c (output_constant_pool_2): Likewise.
4720         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
4721         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
4722         for MODE_VECTOR_BOOL.
4723         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
4724         of mode class checks.
4725         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
4726         instead of a list of mode class checks.
4727         (expand_vector_scalar_condition): Likewise.
4728         (type_for_widest_vector_mode): Handle BImode as an inner mode.
4729
4730 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4731             Alan Hayward  <alan.hayward@arm.com>
4732             David Sherwood  <david.sherwood@arm.com>
4733
4734         * machmode.h (mode_size): Change from unsigned short to
4735         poly_uint16_pod.
4736         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
4737         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4738         or if measurement_type is not polynomial.
4739         (fixed_size_mode::includes_p): Check for constant-sized modes.
4740         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
4741         return a poly_uint16 rather than an unsigned short.
4742         (emit_mode_size): Change the type of mode_size from unsigned short
4743         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
4744         (emit_mode_adjustments): Cope with polynomial vector sizes.
4745         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4746         for GET_MODE_SIZE.
4747         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4748         for GET_MODE_SIZE.
4749         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
4750         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
4751         * caller-save.c (setup_save_areas): Likewise.
4752         (replace_reg_with_saved_mem): Likewise.
4753         * calls.c (emit_library_call_value_1): Likewise.
4754         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
4755         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
4756         (gen_lowpart_for_combine): Likewise.
4757         * convert.c (convert_to_integer_1): Likewise.
4758         * cse.c (equiv_constant, cse_insn): Likewise.
4759         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
4760         (cselib_subst_to_values): Likewise.
4761         * dce.c (word_dce_process_block): Likewise.
4762         * df-problems.c (df_word_lr_mark_ref): Likewise.
4763         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
4764         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
4765         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
4766         (rtl_for_decl_location): Likewise.
4767         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
4768         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
4769         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
4770         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
4771         (expand_expr_real_1): Likewise.
4772         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
4773         (pad_below): Likewise.
4774         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4775         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
4776         * ira.c (get_subreg_tracking_sizes): Likewise.
4777         * ira-build.c (ira_create_allocno_objects): Likewise.
4778         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
4779         (ira_sort_regnos_for_alter_reg): Likewise.
4780         * ira-costs.c (record_operand_costs): Likewise.
4781         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
4782         (resolve_simple_move): Likewise.
4783         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
4784         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
4785         (lra_constraints): Likewise.
4786         (CONST_POOL_OK_P): Reject variable-sized modes.
4787         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
4788         (add_pseudo_to_slot, lra_spill): Likewise.
4789         * omp-low.c (omp_clause_aligned_alignment): Likewise.
4790         * optabs-query.c (get_best_extraction_insn): Likewise.
4791         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4792         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
4793         (expand_mult_highpart, valid_multiword_target_p): Likewise.
4794         * recog.c (offsettable_address_addr_space_p): Likewise.
4795         * regcprop.c (maybe_mode_change): Likewise.
4796         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
4797         * regrename.c (build_def_use): Likewise.
4798         * regstat.c (dump_reg_info): Likewise.
4799         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
4800         (find_reloads, find_reloads_subreg_address): Likewise.
4801         * reload1.c (eliminate_regs_1): Likewise.
4802         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
4803         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
4804         (simplify_binary_operation_1, simplify_subreg): Likewise.
4805         * targhooks.c (default_function_arg_padding): Likewise.
4806         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
4807         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
4808         (verify_gimple_assign_ternary): Likewise.
4809         * tree-inline.c (estimate_move_cost): Likewise.
4810         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4811         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
4812         (get_address_cost_ainc): Likewise.
4813         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
4814         (vect_supportable_dr_alignment): Likewise.
4815         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4816         (vectorizable_reduction): Likewise.
4817         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
4818         (vectorizable_operation, vectorizable_load): Likewise.
4819         * tree.c (build_same_sized_truth_vector_type): Likewise.
4820         * valtrack.c (cleanup_auto_inc_dec): Likewise.
4821         * var-tracking.c (emit_note_insn_var_location): Likewise.
4822         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
4823         (ADDR_VEC_ALIGN): Likewise.
4824
4825 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4826             Alan Hayward  <alan.hayward@arm.com>
4827             David Sherwood  <david.sherwood@arm.com>
4828
4829         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
4830         unsigned short.
4831         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4832         or if measurement_type is polynomial.
4833         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
4834         * combine.c (make_extraction): Likewise.
4835         * dse.c (find_shift_sequence): Likewise.
4836         * dwarf2out.c (mem_loc_descriptor): Likewise.
4837         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
4838         (extract_bit_field, extract_low_bits): Likewise.
4839         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
4840         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
4841         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
4842         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
4843         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4844         * reload.c (find_reloads): Likewise.
4845         * reload1.c (alter_reg): Likewise.
4846         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
4847         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
4848         * tree-if-conv.c (predicate_mem_writes): Likewise.
4849         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
4850         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
4851         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
4852         * valtrack.c (dead_debug_insert_temp): Likewise.
4853         * varasm.c (mergeable_constant_section): Likewise.
4854         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
4855
4856 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4857             Alan Hayward  <alan.hayward@arm.com>
4858             David Sherwood  <david.sherwood@arm.com>
4859
4860         * expr.c (expand_assignment): Cope with polynomial mode sizes
4861         when assigning to a CONCAT.
4862
4863 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4864             Alan Hayward  <alan.hayward@arm.com>
4865             David Sherwood  <david.sherwood@arm.com>
4866
4867         * machmode.h (mode_precision): Change from unsigned short to
4868         poly_uint16_pod.
4869         (mode_to_precision): Return a poly_uint16 rather than an unsigned
4870         short.
4871         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
4872         or if measurement_type is not polynomial.
4873         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
4874         in which the mode is already known to be a scalar_int_mode.
4875         * genmodes.c (emit_mode_precision): Change the type of mode_precision
4876         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
4877         initializer.
4878         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4879         for GET_MODE_PRECISION.
4880         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4881         for GET_MODE_PRECISION.
4882         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
4883         as polynomial.
4884         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
4885         (expand_field_assignment, make_extraction): Likewise.
4886         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
4887         (get_last_value): Likewise.
4888         * convert.c (convert_to_integer_1): Likewise.
4889         * cse.c (cse_insn): Likewise.
4890         * expr.c (expand_expr_real_1): Likewise.
4891         * lra-constraints.c (simplify_operand_subreg): Likewise.
4892         * optabs-query.c (can_atomic_load_p): Likewise.
4893         * optabs.c (expand_atomic_load): Likewise.
4894         (expand_atomic_store): Likewise.
4895         * ree.c (combine_reaching_defs): Likewise.
4896         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
4897         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
4898         * tree.h (type_has_mode_precision_p): Likewise.
4899         * ubsan.c (instrument_si_overflow): Likewise.
4900
4901 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4902             Alan Hayward  <alan.hayward@arm.com>
4903             David Sherwood  <david.sherwood@arm.com>
4904
4905         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
4906         polynomial numbers of units.
4907         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
4908         (valid_vector_subparts_p): New function.
4909         (build_vector_type): Remove temporary shim and take the number
4910         of units as a poly_uint64 rather than an int.
4911         (build_opaque_vector_type): Take the number of units as a
4912         poly_uint64 rather than an int.
4913         * tree.c (build_vector_from_ctor): Handle polynomial
4914         TYPE_VECTOR_SUBPARTS.
4915         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
4916         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
4917         (build_vector_from_val): If the number of units is variable,
4918         use build_vec_duplicate_cst for constant operands and
4919         VEC_DUPLICATE_EXPR otherwise.
4920         (make_vector_type): Remove temporary is_constant ().
4921         (build_vector_type, build_opaque_vector_type): Take the number of
4922         units as a poly_uint64 rather than an int.
4923         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
4924         VECTOR_CST_NELTS.
4925         * cfgexpand.c (expand_debug_expr): Likewise.
4926         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
4927         (store_constructor, expand_expr_real_1): Likewise.
4928         (const_scalar_mask_from_tree): Likewise.
4929         * fold-const-call.c (fold_const_reduction): Likewise.
4930         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
4931         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
4932         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
4933         (fold_relational_const): Likewise.
4934         (native_interpret_vector): Likewise.  Change the size from an
4935         int to an unsigned int.
4936         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
4937         TYPE_VECTOR_SUBPARTS.
4938         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
4939         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
4940         duplicating a non-constant operand into a variable-length vector.
4941         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
4942         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
4943         * ipa-icf.c (sem_variable::equals): Likewise.
4944         * match.pd: Likewise.
4945         * omp-simd-clone.c (simd_clone_subparts): Likewise.
4946         * print-tree.c (print_node): Likewise.
4947         * stor-layout.c (layout_type): Likewise.
4948         * targhooks.c (default_builtin_vectorization_cost): Likewise.
4949         * tree-cfg.c (verify_gimple_comparison): Likewise.
4950         (verify_gimple_assign_binary): Likewise.
4951         (verify_gimple_assign_ternary): Likewise.
4952         (verify_gimple_assign_single): Likewise.
4953         * tree-pretty-print.c (dump_generic_node): Likewise.
4954         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4955         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
4956         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
4957         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
4958         (vect_shift_permute_load_chain): Likewise.
4959         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
4960         (expand_vector_condition, optimize_vector_constructor): Likewise.
4961         (lower_vec_perm, get_compute_type): Likewise.
4962         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4963         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
4964         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
4965         (vect_recog_mask_conversion_pattern): Likewise.
4966         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
4967         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
4968         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4969         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
4970         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
4971         (vectorizable_shift, vectorizable_operation, vectorizable_store)
4972         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
4973         (supportable_widening_operation): Likewise.
4974         (supportable_narrowing_operation): Likewise.
4975         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
4976         Likewise.
4977         * varasm.c (output_constant): Likewise.
4978
4979 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4980             Alan Hayward  <alan.hayward@arm.com>
4981             David Sherwood  <david.sherwood@arm.com>
4982
4983         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
4984         so that both the length == 3 and length != 3 cases set up their
4985         own permute vectors.  Add comments explaining why we know the
4986         number of elements is constant.
4987         (vect_permute_load_chain): Likewise.
4988
4989 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
4990             Alan Hayward  <alan.hayward@arm.com>
4991             David Sherwood  <david.sherwood@arm.com>
4992
4993         * machmode.h (mode_nunits): Change from unsigned char to
4994         poly_uint16_pod.
4995         (ONLY_FIXED_SIZE_MODES): New macro.
4996         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
4997         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
4998         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
4999         New typedefs.
5000         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
5001         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
5002         or if measurement_type is not polynomial.
5003         * genmodes.c (ZERO_COEFFS): New macro.
5004         (emit_mode_nunits_inline): Make mode_nunits_inline return a
5005         poly_uint16.
5006         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
5007         Use ZERO_COEFFS when emitting initializers.
5008         * data-streamer.h (bp_pack_poly_value): New function.
5009         (bp_unpack_poly_value): Likewise.
5010         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
5011         for GET_MODE_NUNITS.
5012         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
5013         for GET_MODE_NUNITS.
5014         * tree.c (make_vector_type): Remove temporary shim and make
5015         the real function take the number of units as a poly_uint64
5016         rather than an int.
5017         (build_vector_type_for_mode): Handle polynomial nunits.
5018         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
5019         * emit-rtl.c (const_vec_series_p_1): Likewise.
5020         (gen_rtx_CONST_VECTOR): Likewise.
5021         * fold-const.c (test_vec_duplicate_folding): Likewise.
5022         * genrecog.c (validate_pattern): Likewise.
5023         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
5024         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
5025         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
5026         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
5027         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
5028         * rtlanal.c (subreg_get_info): Likewise.
5029         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5030         (vect_grouped_load_supported): Likewise.
5031         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
5032         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
5033         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
5034         (simplify_const_unary_operation, simplify_binary_operation_1)
5035         (simplify_const_binary_operation, simplify_ternary_operation)
5036         (test_vector_ops_duplicate, test_vector_ops): Likewise.
5037         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
5038         instead of CONST_VECTOR_NUNITS.
5039         * varasm.c (output_constant_pool_2): Likewise.
5040         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
5041         explicit-encoded elements in the XVEC for variable-length vectors.
5042
5043 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5044
5045         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
5046
5047 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5048             Alan Hayward  <alan.hayward@arm.com>
5049             David Sherwood  <david.sherwood@arm.com>
5050
5051         * coretypes.h (fixed_size_mode): Declare.
5052         (fixed_size_mode_pod): New typedef.
5053         * builtins.h (target_builtins::x_apply_args_mode)
5054         (target_builtins::x_apply_result_mode): Change type to
5055         fixed_size_mode_pod.
5056         * builtins.c (apply_args_size, apply_result_size, result_vector)
5057         (expand_builtin_apply_args_1, expand_builtin_apply)
5058         (expand_builtin_return): Update accordingly.
5059
5060 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5061
5062         * cse.c (hash_rtx_cb): Hash only the encoded elements.
5063         * cselib.c (cselib_hash_rtx): Likewise.
5064         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
5065         CONST_VECTOR encoding.
5066
5067 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
5068             Jeff Law  <law@redhat.com>
5069
5070         PR target/83641
5071         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
5072         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
5073         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
5074         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
5075
5076         PR target/83641
5077         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
5078         explicitly probe *sp in a noreturn function if there were any callee
5079         register saves or frame pointer is needed.
5080
5081 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
5082
5083         PR debug/83621
5084         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
5085         BLKmode for ternary, binary or unary expressions.
5086
5087         PR debug/83645
5088         * var-tracking.c (delete_vta_debug_insn): New inline function.
5089         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
5090         insns from get_insns () to NULL instead of each bb separately.
5091         Use delete_vta_debug_insn.  No longer static.
5092         (vt_debug_insns_local, variable_tracking_main_1): Adjust
5093         delete_vta_debug_insns callers.
5094         * rtl.h (delete_vta_debug_insns): Declare.
5095         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
5096         instead of variable_tracking_main.
5097
5098 2018-01-03  Martin Sebor  <msebor@redhat.com>
5099
5100         PR tree-optimization/83603
5101         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
5102         arguments past the endof the argument list in functions declared
5103         without a prototype.
5104         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
5105         Avoid checking when arguments are null.
5106
5107 2018-01-03  Martin Sebor  <msebor@redhat.com>
5108
5109         PR c/83559
5110         * doc/extend.texi (attribute const): Fix a typo.
5111         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
5112         issuing -Wsuggest-attribute for void functions.
5113
5114 2018-01-03  Martin Sebor  <msebor@redhat.com>
5115
5116         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
5117         offset_int::from instead of wide_int::to_shwi.
5118         (maybe_diag_overlap): Remove assertion.
5119         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
5120         * gimple-ssa-sprintf.c (format_directive): Same.
5121         (parse_directive): Same.
5122         (sprintf_dom_walker::compute_format_length): Same.
5123         (try_substitute_return_value): Same.
5124
5125 2018-01-03  Jeff Law  <law@redhat.com>
5126
5127         PR middle-end/83654
5128         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
5129         non-constant residual for zero at runtime and avoid probing in
5130         that case.  Reorganize code for trailing problem to mirror handling
5131         of the residual.
5132
5133 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
5134
5135         PR tree-optimization/83501
5136         * tree-ssa-strlen.c (get_string_cst): New.
5137         (handle_char_store): Call get_string_cst.
5138
5139 2018-01-03  Martin Liska  <mliska@suse.cz>
5140
5141         PR tree-optimization/83593
5142         * tree-ssa-strlen.c: Include tree-cfg.h.
5143         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
5144         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
5145         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
5146         to false.
5147         (strlen_dom_walker::before_dom_children): Call
5148         gimple_purge_dead_eh_edges. Dump tranformation with details
5149         dump flags.
5150         (strlen_dom_walker::before_dom_children): Update call by adding
5151         new argument cleanup_eh.
5152         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
5153
5154 2018-01-03  Martin Liska  <mliska@suse.cz>
5155
5156         PR ipa/83549
5157         * cif-code.def (VARIADIC_THUNK): New enum value.
5158         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
5159         thunks.
5160
5161 2018-01-03  Jan Beulich  <jbeulich@suse.com>
5162
5163         * sse.md (mov<mode>_internal): Tighten condition for when to use
5164         vmovdqu<ssescalarsize> for TI and OI modes.
5165
5166 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
5167
5168         Update copyright years.
5169
5170 2018-01-03  Martin Liska  <mliska@suse.cz>
5171
5172         PR ipa/83594
5173         * ipa-visibility.c (function_and_variable_visibility): Skip
5174         functions with noipa attribure.
5175
5176 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
5177
5178         * gcc.c (process_command): Update copyright notice dates.
5179         * gcov-dump.c (print_version): Ditto.
5180         * gcov.c (print_version): Ditto.
5181         * gcov-tool.c (print_version): Ditto.
5182         * gengtype.c (create_file): Ditto.
5183         * doc/cpp.texi: Bump @copying's copyright year.
5184         * doc/cppinternals.texi: Ditto.
5185         * doc/gcc.texi: Ditto.
5186         * doc/gccint.texi: Ditto.
5187         * doc/gcov.texi: Ditto.
5188         * doc/install.texi: Ditto.
5189         * doc/invoke.texi: Ditto.
5190
5191 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5192
5193         * vector-builder.h (vector_builder::m_full_nelts): Change from
5194         unsigned int to poly_uint64.
5195         (vector_builder::full_nelts): Update prototype accordingly.
5196         (vector_builder::new_vector): Likewise.
5197         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
5198         (vector_builder::operator ==): Likewise.
5199         (vector_builder::finalize): Likewise.
5200         * int-vector-builder.h (int_vector_builder::int_vector_builder):
5201         Take the number of elements as a poly_uint64 rather than an
5202         unsigned int.
5203         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
5204         from unsigned int to poly_uint64.
5205         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
5206         (vec_perm_indices::new_vector): Likewise.
5207         (vec_perm_indices::length): Likewise.
5208         (vec_perm_indices::nelts_per_input): Likewise.
5209         (vec_perm_indices::input_nelts): Likewise.
5210         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
5211         number of elements per input as a poly_uint64 rather than an
5212         unsigned int.  Use the original encoding for variable-length
5213         vectors, rather than clamping each individual element.
5214         For the second and subsequent elements in each pattern,
5215         clamp the step and base before clamping their sum.
5216         (vec_perm_indices::series_p): Handle polynomial element counts.
5217         (vec_perm_indices::all_in_range_p): Likewise.
5218         (vec_perm_indices_to_tree): Likewise.
5219         (vec_perm_indices_to_rtx): Likewise.
5220         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
5221         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
5222         (tree_vector_builder::new_binary_operation): Handle polynomial
5223         element counts.  Return false if we need to know the number
5224         of elements at compile time.
5225         * fold-const.c (fold_vec_perm): Punt if the number of elements
5226         isn't known at compile time.
5227
5228 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5229
5230         * vec-perm-indices.h (vec_perm_builder): Change element type
5231         from HOST_WIDE_INT to poly_int64.
5232         (vec_perm_indices::element_type): Update accordingly.
5233         (vec_perm_indices::clamp): Handle polynomial element_types.
5234         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5235         (vec_perm_indices::all_in_range_p): Likewise.
5236         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
5237         than shwi trees.
5238         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
5239         polynomial vec_perm_indices element types.
5240         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
5241         * fold-const.c (fold_vec_perm): Likewise.
5242         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
5243         * tree-vect-generic.c (lower_vec_perm): Likewise.
5244         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5245         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
5246         element type to HOST_WIDE_INT.
5247
5248 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5249             Alan Hayward  <alan.hayward@arm.com>
5250             David Sherwood  <david.sherwood@arm.com>
5251
5252         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
5253         rather than an int.  Use plus_constant.
5254         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
5255         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
5256
5257 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5258             Alan Hayward  <alan.hayward@arm.com>
5259             David Sherwood  <david.sherwood@arm.com>
5260
5261         * calls.c (emit_call_1, expand_call): Change struct_value_size from
5262         a HOST_WIDE_INT to a poly_int64.
5263
5264 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5265             Alan Hayward  <alan.hayward@arm.com>
5266             David Sherwood  <david.sherwood@arm.com>
5267
5268         * calls.c (load_register_parameters): Cope with polynomial
5269         mode sizes.  Require a constant size for BLKmode parameters
5270         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
5271         forces a parameter to be padded at the lsb end in order to
5272         fill a complete number of words, require the parameter size
5273         to be ordered wrt UNITS_PER_WORD.
5274
5275 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5276             Alan Hayward  <alan.hayward@arm.com>
5277             David Sherwood  <david.sherwood@arm.com>
5278
5279         * reload1.c (spill_stack_slot_width): Change element type
5280         from unsigned int to poly_uint64_pod.
5281         (alter_reg): Treat mode sizes as polynomial.
5282
5283 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5284             Alan Hayward  <alan.hayward@arm.com>
5285             David Sherwood  <david.sherwood@arm.com>
5286
5287         * reload.c (complex_word_subreg_p): New function.
5288         (reload_inner_reg_of_subreg, push_reload): Use it.
5289
5290 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5291             Alan Hayward  <alan.hayward@arm.com>
5292             David Sherwood  <david.sherwood@arm.com>
5293
5294         * lra-constraints.c (process_alt_operands): Reject matched
5295         operands whose sizes aren't ordered.
5296         (match_reload): Refer to this check here.
5297
5298 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5299             Alan Hayward  <alan.hayward@arm.com>
5300             David Sherwood  <david.sherwood@arm.com>
5301
5302         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
5303         that the mode size is in the set {1, 2, 4, 8, 16}.
5304
5305 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5306             Alan Hayward  <alan.hayward@arm.com>
5307             David Sherwood  <david.sherwood@arm.com>
5308
5309         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
5310         Use plus_constant instead of gen_rtx_PLUS.
5311
5312 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5313             Alan Hayward  <alan.hayward@arm.com>
5314             David Sherwood  <david.sherwood@arm.com>
5315
5316         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
5317         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
5318         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
5319         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
5320         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
5321         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
5322         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
5323         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
5324         * config/i386/i386.c (ix86_push_rounding): ...this new function.
5325         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
5326         a poly_int64.
5327         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
5328         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
5329         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
5330         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
5331         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
5332         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
5333         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
5334         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
5335         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
5336         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
5337         function.
5338         * expr.c (emit_move_resolve_push): Treat the input and result
5339         of PUSH_ROUNDING as a poly_int64.
5340         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
5341         (emit_push_insn): Likewise.
5342         * lra-eliminations.c (mark_not_eliminable): Likewise.
5343         * recog.c (push_operand): Likewise.
5344         * reload1.c (elimination_effects): Likewise.
5345         * rtlanal.c (nonzero_bits1): Likewise.
5346         * calls.c (store_one_arg): Likewise.  Require the padding to be
5347         known at compile time.
5348
5349 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5350             Alan Hayward  <alan.hayward@arm.com>
5351             David Sherwood  <david.sherwood@arm.com>
5352
5353         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
5354         Use plus_constant instead of gen_rtx_PLUS.
5355
5356 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5357             Alan Hayward  <alan.hayward@arm.com>
5358             David Sherwood  <david.sherwood@arm.com>
5359
5360         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
5361         rather than an int.
5362
5363 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5364             Alan Hayward  <alan.hayward@arm.com>
5365             David Sherwood  <david.sherwood@arm.com>
5366
5367         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
5368         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
5369         via stack temporaries.  Treat the mode size as polynomial too.
5370
5371 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5372             Alan Hayward  <alan.hayward@arm.com>
5373             David Sherwood  <david.sherwood@arm.com>
5374
5375         * expr.c (expand_expr_real_2): When handling conversions involving
5376         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
5377         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
5378         as a poly_uint64 too.
5379
5380 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5381             Alan Hayward  <alan.hayward@arm.com>
5382             David Sherwood  <david.sherwood@arm.com>
5383
5384         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
5385
5386 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5387             Alan Hayward  <alan.hayward@arm.com>
5388             David Sherwood  <david.sherwood@arm.com>
5389
5390         * combine.c (can_change_dest_mode): Handle polynomial
5391         REGMODE_NATURAL_SIZE.
5392         * expmed.c (store_bit_field_1): Likewise.
5393         * expr.c (store_constructor): Likewise.
5394         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
5395         and polynomial REGMODE_NATURAL_SIZE.
5396         (gen_lowpart_common): Likewise.
5397         * reginfo.c (record_subregs_of_mode): Likewise.
5398         * rtlanal.c (read_modify_subreg_p): Likewise.
5399
5400 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5401             Alan Hayward  <alan.hayward@arm.com>
5402             David Sherwood  <david.sherwood@arm.com>
5403
5404         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
5405         numbers of elements.
5406
5407 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5408             Alan Hayward  <alan.hayward@arm.com>
5409             David Sherwood  <david.sherwood@arm.com>
5410
5411         * match.pd: Cope with polynomial numbers of vector elements.
5412
5413 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5414             Alan Hayward  <alan.hayward@arm.com>
5415             David Sherwood  <david.sherwood@arm.com>
5416
5417         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
5418         in a POINTER_PLUS_EXPR.
5419
5420 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5421             Alan Hayward  <alan.hayward@arm.com>
5422             David Sherwood  <david.sherwood@arm.com>
5423
5424         * omp-simd-clone.c (simd_clone_subparts): New function.
5425         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
5426         (ipa_simd_modify_function_body): Likewise.
5427
5428 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5429             Alan Hayward  <alan.hayward@arm.com>
5430             David Sherwood  <david.sherwood@arm.com>
5431
5432         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
5433         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
5434         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
5435         (expand_vector_condition, vector_element): Likewise.
5436         (subparts_gt): New function.
5437         (get_compute_type): Use subparts_gt.
5438         (count_type_subparts): Delete.
5439         (expand_vector_operations_1): Use subparts_gt instead of
5440         count_type_subparts.
5441
5442 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5443             Alan Hayward  <alan.hayward@arm.com>
5444             David Sherwood  <david.sherwood@arm.com>
5445
5446         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
5447         (vect_compile_time_alias): ...this new function.  Do the calculation
5448         on poly_ints rather than trees.
5449         (vect_prune_runtime_alias_test_list): Update call accordingly.
5450
5451 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5452             Alan Hayward  <alan.hayward@arm.com>
5453             David Sherwood  <david.sherwood@arm.com>
5454
5455         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
5456         numbers of units.
5457         (vect_schedule_slp_instance): Likewise.
5458
5459 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5460             Alan Hayward  <alan.hayward@arm.com>
5461             David Sherwood  <david.sherwood@arm.com>
5462
5463         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
5464         constant and extern definitions for variable-length vectors.
5465         (vect_get_constant_vectors): Note that the number of units
5466         is known to be constant.
5467
5468 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5469             Alan Hayward  <alan.hayward@arm.com>
5470             David Sherwood  <david.sherwood@arm.com>
5471
5472         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
5473         of units as polynomial.  Choose between WIDE and NARROW based
5474         on multiple_p.
5475
5476 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5477             Alan Hayward  <alan.hayward@arm.com>
5478             David Sherwood  <david.sherwood@arm.com>
5479
5480         * tree-vect-stmts.c (simd_clone_subparts): New function.
5481         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
5482
5483 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5484             Alan Hayward  <alan.hayward@arm.com>
5485             David Sherwood  <david.sherwood@arm.com>
5486
5487         * tree-vect-stmts.c (vectorizable_call): Treat the number of
5488         vectors as polynomial.  Use build_index_vector for
5489         IFN_GOMP_SIMD_LANE.
5490
5491 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5492             Alan Hayward  <alan.hayward@arm.com>
5493             David Sherwood  <david.sherwood@arm.com>
5494
5495         * tree-vect-stmts.c (get_load_store_type): Treat the number of
5496         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
5497         for variable-length vectors.
5498         (vectorizable_mask_load_store): Treat the number of units as
5499         polynomial, asserting that it is constant if the condition has
5500         already been enforced.
5501         (vectorizable_store, vectorizable_load): Likewise.
5502
5503 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5504             Alan Hayward  <alan.hayward@arm.com>
5505             David Sherwood  <david.sherwood@arm.com>
5506
5507         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
5508         of units as polynomial.  Punt if we can't tell at compile time
5509         which vector contains the final result.
5510
5511 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5512             Alan Hayward  <alan.hayward@arm.com>
5513             David Sherwood  <david.sherwood@arm.com>
5514
5515         * tree-vect-loop.c (vectorizable_induction): Treat the number
5516         of units as polynomial.  Punt on SLP inductions.  Use an integer
5517         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
5518         cast of such a series for variable-length floating-point
5519         reductions.
5520
5521 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5522             Alan Hayward  <alan.hayward@arm.com>
5523             David Sherwood  <david.sherwood@arm.com>
5524
5525         * tree.h (build_index_vector): Declare.
5526         * tree.c (build_index_vector): New function.
5527         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
5528         of units as polynomial, forcibly converting it to a constant if
5529         vectorizable_reduction has already enforced the condition.
5530         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
5531         to create a {1,2,3,...} vector.
5532         (vectorizable_reduction): Treat the number of units as polynomial.
5533         Choose vectype_in based on the largest scalar element size rather
5534         than the smallest number of units.  Enforce the restrictions
5535         relied on above.
5536
5537 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5538             Alan Hayward  <alan.hayward@arm.com>
5539             David Sherwood  <david.sherwood@arm.com>
5540
5541         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
5542         number of units as polynomial.
5543
5544 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5545             Alan Hayward  <alan.hayward@arm.com>
5546             David Sherwood  <david.sherwood@arm.com>
5547
5548         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
5549         * target.def (autovectorize_vector_sizes): Return the vector sizes
5550         by pointer, using vector_sizes rather than a bitmask.
5551         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
5552         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
5553         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
5554         Likewise.
5555         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
5556         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
5557         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
5558         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
5559         * omp-general.c (omp_max_vf): Likewise.
5560         * omp-low.c (omp_clause_aligned_alignment): Likewise.
5561         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
5562         * tree-vect-loop.c (vect_analyze_loop): Likewise.
5563         * tree-vect-slp.c (vect_slp_bb): Likewise.
5564         * doc/tm.texi: Regenerate.
5565         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
5566         to a poly_uint64.
5567         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
5568         the vector size as a poly_uint64 rather than an unsigned int.
5569         (current_vector_size): Change from an unsigned int to a poly_uint64.
5570         (get_vectype_for_scalar_type): Update accordingly.
5571         * tree.h (build_truth_vector_type): Take the size and number of
5572         units as a poly_uint64 rather than an unsigned int.
5573         (build_vector_type): Add a temporary overload that takes
5574         the number of units as a poly_uint64 rather than an unsigned int.
5575         * tree.c (make_vector_type): Likewise.
5576         (build_truth_vector_type): Take the number of units as a poly_uint64
5577         rather than an unsigned int.
5578
5579 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5580             Alan Hayward  <alan.hayward@arm.com>
5581             David Sherwood  <david.sherwood@arm.com>
5582
5583         * target.def (get_mask_mode): Take the number of units and length
5584         as poly_uint64s rather than unsigned ints.
5585         * targhooks.h (default_get_mask_mode): Update accordingly.
5586         * targhooks.c (default_get_mask_mode): Likewise.
5587         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
5588         * doc/tm.texi: Regenerate.
5589
5590 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5591             Alan Hayward  <alan.hayward@arm.com>
5592             David Sherwood  <david.sherwood@arm.com>
5593
5594         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
5595         * omp-general.c (omp_max_vf): Likewise.
5596         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
5597         (expand_omp_simd): Handle polynomial safelen.
5598         * omp-low.c (omplow_simd_context): Add a default constructor.
5599         (omplow_simd_context::max_vf): Change from int to poly_uint64.
5600         (lower_rec_simd_input_clauses): Update accordingly.
5601         (lower_rec_input_clauses): Likewise.
5602
5603 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5604             Alan Hayward  <alan.hayward@arm.com>
5605             David Sherwood  <david.sherwood@arm.com>
5606
5607         * tree-vectorizer.h (vect_nunits_for_cost): New function.
5608         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
5609         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
5610         (vect_analyze_slp_cost): Likewise.
5611         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
5612         (vect_model_load_cost): Likewise.
5613
5614 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5615             Alan Hayward  <alan.hayward@arm.com>
5616             David Sherwood  <david.sherwood@arm.com>
5617
5618         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
5619         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
5620         from an unsigned int * to a poly_uint64_pod *.
5621         (calculate_unrolling_factor): New function.
5622         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
5623
5624 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5625             Alan Hayward  <alan.hayward@arm.com>
5626             David Sherwood  <david.sherwood@arm.com>
5627
5628         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
5629         from an unsigned int to a poly_uint64.
5630         (_loop_vec_info::slp_unrolling_factor): Likewise.
5631         (_loop_vec_info::vectorization_factor): Change from an int
5632         to a poly_uint64.
5633         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
5634         (vect_get_num_vectors): New function.
5635         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
5636         (vect_get_num_copies): Use vect_get_num_vectors.
5637         (vect_analyze_data_ref_dependences): Change max_vf from an int *
5638         to an unsigned int *.
5639         (vect_analyze_data_refs): Change min_vf from an int * to a
5640         poly_uint64 *.
5641         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5642         than an unsigned HOST_WIDE_INT.
5643         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
5644         (vect_analyze_data_ref_dependence): Change max_vf from an int *
5645         to an unsigned int *.
5646         (vect_analyze_data_ref_dependences): Likewise.
5647         (vect_compute_data_ref_alignment): Handle polynomial vf.
5648         (vect_enhance_data_refs_alignment): Likewise.
5649         (vect_prune_runtime_alias_test_list): Likewise.
5650         (vect_shift_permute_load_chain): Likewise.
5651         (vect_supportable_dr_alignment): Likewise.
5652         (dependence_distance_ge_vf): Take the vectorization factor as a
5653         poly_uint64 rather than an unsigned HOST_WIDE_INT.
5654         (vect_analyze_data_refs): Change min_vf from an int * to a
5655         poly_uint64 *.
5656         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
5657         vfm1 as a poly_uint64 rather than an int.  Make the same change
5658         for the returned bound_scalar.
5659         (vect_gen_vector_loop_niters): Handle polynomial vf.
5660         (vect_do_peeling): Likewise.  Update call to
5661         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
5662         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
5663         be constant.
5664         * tree-vect-loop.c (vect_determine_vectorization_factor)
5665         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
5666         (vect_get_known_peeling_cost): Likewise.
5667         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
5668         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
5669         (vect_transform_loop): Likewise.  Use the lowest possible VF when
5670         updating the upper bounds of the loop.
5671         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
5672         rather than an int.
5673         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
5674         polynomial unroll factors.
5675         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
5676         (vect_make_slp_decision): Likewise.
5677         (vect_supported_load_permutation_p): Likewise, and polynomial
5678         vf too.
5679         (vect_analyze_slp_cost): Handle polynomial vf.
5680         (vect_slp_analyze_node_operations): Likewise.
5681         (vect_slp_analyze_bb_1): Likewise.
5682         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
5683         than an unsigned HOST_WIDE_INT.
5684         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
5685         (vectorizable_load): Handle polynomial vf.
5686         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
5687         a poly_uint64.
5688         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
5689
5690 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5691             Alan Hayward  <alan.hayward@arm.com>
5692             David Sherwood  <david.sherwood@arm.com>
5693
5694         * match.pd: Handle bit operations involving three constants
5695         and try to fold one pair.
5696
5697 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
5698
5699         * tree-vect-loop-manip.c: Include gimple-fold.h.
5700         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
5701         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
5702         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
5703         Add a path that uses a step of VF instead of 1, but disable it
5704         for now.
5705         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
5706         and niters_no_overflow parameters.  Update calls to
5707         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
5708         Create a new SSA name if the latter choses to use a ste other
5709         than zero, and return it via niters_vector_mult_vf_var.
5710         * tree-vect-loop.c (vect_transform_loop): Update calls to
5711         vect_do_peeling, vect_gen_vector_loop_niters and
5712         slpeel_make_loop_iterate_ntimes.
5713         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
5714         (vect_gen_vector_loop_niters): Update declarations after above changes.
5715
5716 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
5717
5718         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
5719         128-bit round to integer instructions.
5720         (ceil<mode>2): Likewise.
5721         (btrunc<mode>2): Likewise.
5722         (round<mode>2): Likewise.
5723
5724 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
5725
5726         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
5727         unaligned VSX load/store on P8/P9.
5728         (expand_block_clear): Allow the use of unaligned VSX
5729         load/store on P8/P9.
5730
5731 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
5732
5733         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
5734         New function.
5735         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
5736         swap associated with both a load and a store.
5737
5738 2018-01-02  Andrew Waterman  <andrew@sifive.com>
5739
5740         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
5741         * config/riscv/riscv.md (clear_cache): Use it.
5742
5743 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
5744
5745         * web.c: Remove out-of-date comment.
5746
5747 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5748
5749         * expr.c (fixup_args_size_notes): Check that any existing
5750         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
5751         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
5752         (emit_single_push_insn): ...here.
5753
5754 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5755
5756         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
5757         (const_vector_encoded_nelts): New function.
5758         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
5759         (const_vector_int_elt, const_vector_elt): Declare.
5760         * emit-rtl.c (const_vector_int_elt_1): New function.
5761         (const_vector_elt): Likewise.
5762         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
5763         of CONST_VECTOR_ELT.
5764
5765 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5766
5767         * expr.c: Include rtx-vector-builder.h.
5768         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
5769         directly on the tree encoding.
5770         (const_vector_from_tree): Likewise.
5771         * optabs.c: Include rtx-vector-builder.h.
5772         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
5773         sequence of "u" values.
5774         * vec-perm-indices.c: Include rtx-vector-builder.h.
5775         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
5776         directly on the vec_perm_indices encoding.
5777
5778 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5779
5780         * doc/rtl.texi (const_vector): Describe new encoding scheme.
5781         * Makefile.in (OBJS): Add rtx-vector-builder.o.
5782         * rtx-vector-builder.h: New file.
5783         * rtx-vector-builder.c: Likewise.
5784         * rtl.h (rtx_def::u2): Add a const_vector field.
5785         (CONST_VECTOR_NPATTERNS): New macro.
5786         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
5787         (CONST_VECTOR_DUPLICATE_P): Likewise.
5788         (CONST_VECTOR_STEPPED_P): Likewise.
5789         (CONST_VECTOR_ENCODED_ELT): Likewise.
5790         (const_vec_duplicate_p): Check for a duplicated vector encoding.
5791         (unwrap_const_vec_duplicate): Likewise.
5792         (const_vec_series_p): Check for a non-duplicated vector encoding.
5793         Say that the function only returns true for integer vectors.
5794         * emit-rtl.c: Include rtx-vector-builder.h.
5795         (gen_const_vec_duplicate_1): Delete.
5796         (gen_const_vector): Call gen_const_vec_duplicate instead of
5797         gen_const_vec_duplicate_1.
5798         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
5799         (gen_const_vec_duplicate): Use rtx_vector_builder.
5800         (gen_const_vec_series): Likewise.
5801         (gen_rtx_CONST_VECTOR): Likewise.
5802         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
5803         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5804         Build a new vector rather than modifying a CONST_VECTOR in-place.
5805         (handle_special_swappables): Update call accordingly.
5806         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
5807         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5808         Build a new vector rather than modifying a CONST_VECTOR in-place.
5809         (handle_special_swappables): Update call accordingly.
5810
5811 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5812
5813         * simplify-rtx.c (simplify_const_binary_operation): Use
5814         CONST_VECTOR_ELT instead of XVECEXP.
5815
5816 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5817
5818         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
5819         the selector elements to be different from the data elements
5820         if the selector is a VECTOR_CST.
5821         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
5822         ssizetype for the selector.
5823
5824 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5825
5826         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
5827         before testing each element individually.
5828         * tree-vect-generic.c (lower_vec_perm): Likewise.
5829
5830 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5831
5832         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
5833         * selftest-run-tests.c (selftest::run_tests): Call it.
5834         * vector-builder.h (vector_builder::operator ==): New function.
5835         (vector_builder::operator !=): Likewise.
5836         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
5837         (vec_perm_indices::all_from_input_p): New function.
5838         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5839         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
5840         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
5841         instead of reading the VECTOR_CST directly.  Detect whether both
5842         vector inputs are the same before constructing the vec_perm_indices,
5843         and update the number of inputs argument accordingly.  Use the
5844         utility functions added above.  Only construct sel2 if we need to.
5845
5846 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5847
5848         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
5849         the broadcast of the low byte.
5850         (expand_mult_highpart): Use an explicit encoding for the permutes.
5851         * optabs-query.c (can_mult_highpart_p): Likewise.
5852         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
5853         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5854         (vectorizable_bswap): Likewise.
5855         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
5856         explicit encoding for the power-of-2 permutes.
5857         (vect_permute_store_chain): Likewise.
5858         (vect_grouped_load_supported): Likewise.
5859         (vect_permute_load_chain): Likewise.
5860
5861 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5862
5863         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
5864         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
5865         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
5866         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5867         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
5868         (vect_gen_perm_mask_any): Likewise.
5869
5870 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5871
5872         * int-vector-builder.h: New file.
5873         * vec-perm-indices.h: Include int-vector-builder.h.
5874         (vec_perm_indices): Redefine as an int_vector_builder.
5875         (auto_vec_perm_indices): Delete.
5876         (vec_perm_builder): Redefine as a stand-alone class.
5877         (vec_perm_indices::vec_perm_indices): New function.
5878         (vec_perm_indices::clamp): Likewise.
5879         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
5880         (vec_perm_indices::new_vector): New function.
5881         (vec_perm_indices::new_expanded_vector): Update for new
5882         vec_perm_indices class.
5883         (vec_perm_indices::rotate_inputs): New function.
5884         (vec_perm_indices::all_in_range_p): Operate directly on the
5885         encoded form, without computing elided elements.
5886         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
5887         encoding.  Update for new vec_perm_indices class.
5888         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
5889         the given vec_perm_builder.
5890         (expand_vec_perm_var): Update vec_perm_builder constructor.
5891         (expand_mult_highpart): Use vec_perm_builder instead of
5892         auto_vec_perm_indices.
5893         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
5894         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
5895         or double series encoding as appropriate.
5896         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
5897         vec_perm_indices instead of auto_vec_perm_indices.
5898         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5899         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5900         (vect_permute_store_chain): Likewise.
5901         (vect_grouped_load_supported): Likewise.
5902         (vect_permute_load_chain): Likewise.
5903         (vect_shift_permute_load_chain): Likewise.
5904         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5905         (vect_transform_slp_perm_load): Likewise.
5906         (vect_schedule_slp_instance): Likewise.
5907         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5908         (vectorizable_mask_load_store): Likewise.
5909         (vectorizable_bswap): Likewise.
5910         (vectorizable_store): Likewise.
5911         (vectorizable_load): Likewise.
5912         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
5913         vec_perm_indices instead of auto_vec_perm_indices.  Use
5914         tree_to_vec_perm_builder to read the vector from a tree.
5915         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
5916         vec_perm_builder instead of a vec_perm_indices.
5917         (have_whole_vector_shift): Use vec_perm_builder and
5918         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
5919         truncation to calc_vec_perm_mask_for_shift.
5920         (vect_create_epilog_for_reduction): Likewise.
5921         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
5922         from auto_vec_perm_indices to vec_perm_indices.
5923         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5924         instead of changing individual elements.
5925         (aarch64_vectorize_vec_perm_const): Use new_vector to install
5926         the vector in d.perm.
5927         * config/arm/arm.c (expand_vec_perm_d::perm): Change
5928         from auto_vec_perm_indices to vec_perm_indices.
5929         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5930         instead of changing individual elements.
5931         (arm_vectorize_vec_perm_const): Use new_vector to install
5932         the vector in d.perm.
5933         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
5934         Update vec_perm_builder constructor.
5935         (rs6000_expand_interleave): Likewise.
5936         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
5937         (rs6000_expand_interleave): Likewise.
5938
5939 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5940
5941         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
5942         to qimode could truncate the indices.
5943         * optabs.c (expand_vec_perm_var): Likewise.
5944
5945 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
5946
5947         * Makefile.in (OBJS): Add vec-perm-indices.o.
5948         * vec-perm-indices.h: New file.
5949         * vec-perm-indices.c: Likewise.
5950         * target.h (vec_perm_indices): Replace with a forward class
5951         declaration.
5952         (auto_vec_perm_indices): Move to vec-perm-indices.h.
5953         * optabs.h: Include vec-perm-indices.h.
5954         (expand_vec_perm): Delete.
5955         (selector_fits_mode_p, expand_vec_perm_var): Declare.
5956         (expand_vec_perm_const): Declare.
5957         * target.def (vec_perm_const_ok): Replace with...
5958         (vec_perm_const): ...this new hook.
5959         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
5960         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
5961         * doc/tm.texi: Regenerate.
5962         * optabs.def (vec_perm_const): Delete.
5963         * doc/md.texi (vec_perm_const): Likewise.
5964         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
5965         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
5966         expand_vec_perm for constant permutation vectors.  Assert that
5967         the mode of variable permutation vectors is the integer equivalent
5968         of the mode that is being permuted.
5969         * optabs-query.h (selector_fits_mode_p): Declare.
5970         * optabs-query.c: Include vec-perm-indices.h.
5971         (selector_fits_mode_p): New function.
5972         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
5973         is defined, instead of checking whether the vec_perm_const_optab
5974         exists.  Use targetm.vectorize.vec_perm_const instead of
5975         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
5976         fit in the vector mode before using a variable permute.
5977         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
5978         vec_perm_indices instead of an rtx.
5979         (expand_vec_perm): Replace with...
5980         (expand_vec_perm_const): ...this new function.  Take the selector
5981         as a vec_perm_indices rather than an rtx.  Also take the mode of
5982         the selector.  Update call to shift_amt_for_vec_perm_mask.
5983         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
5984         Use vec_perm_indices::new_expanded_vector to expand the original
5985         selector into bytes.  Check whether the indices fit in the vector
5986         mode before using a variable permute.
5987         (expand_vec_perm_var): Make global.
5988         (expand_mult_highpart): Use expand_vec_perm_const.
5989         * fold-const.c: Includes vec-perm-indices.h.
5990         * tree-ssa-forwprop.c: Likewise.
5991         * tree-vect-data-refs.c: Likewise.
5992         * tree-vect-generic.c: Likewise.
5993         * tree-vect-loop.c: Likewise.
5994         * tree-vect-slp.c: Likewise.
5995         * tree-vect-stmts.c: Likewise.
5996         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
5997         Delete.
5998         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
5999         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
6000         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
6001         (aarch64_vectorize_vec_perm_const): ...this new function.
6002         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
6003         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6004         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
6005         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
6006         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
6007         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6008         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
6009         into...
6010         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
6011         check for NEON modes.
6012         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
6013         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
6014         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
6015         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
6016         into...
6017         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
6018         the old VEC_PERM_CONST conditions.
6019         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
6020         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
6021         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
6022         (ia64_vectorize_vec_perm_const_ok): Merge into...
6023         (ia64_vectorize_vec_perm_const): ...this new function.
6024         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
6025         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
6026         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
6027         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
6028         * config/mips/mips.c (mips_expand_vec_perm_const)
6029         (mips_vectorize_vec_perm_const_ok): Merge into...
6030         (mips_vectorize_vec_perm_const): ...this new function.
6031         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
6032         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
6033         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
6034         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
6035         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
6036         (rs6000_expand_vec_perm_const): Delete.
6037         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
6038         Delete.
6039         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6040         (altivec_expand_vec_perm_const_le): Take each operand individually.
6041         Operate on constant selectors rather than rtxes.
6042         (altivec_expand_vec_perm_const): Likewise.  Update call to
6043         altivec_expand_vec_perm_const_le.
6044         (rs6000_expand_vec_perm_const): Delete.
6045         (rs6000_vectorize_vec_perm_const_ok): Delete.
6046         (rs6000_vectorize_vec_perm_const): New function.
6047         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
6048         an element count and rtx array.
6049         (rs6000_expand_extract_even): Update call accordingly.
6050         (rs6000_expand_interleave): Likewise.
6051         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
6052         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
6053         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
6054         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
6055         (rs6000_expand_vec_perm_const): Delete.
6056         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
6057         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6058         (altivec_expand_vec_perm_const_le): Take each operand individually.
6059         Operate on constant selectors rather than rtxes.
6060         (altivec_expand_vec_perm_const): Likewise.  Update call to
6061         altivec_expand_vec_perm_const_le.
6062         (rs6000_expand_vec_perm_const): Delete.
6063         (rs6000_vectorize_vec_perm_const_ok): Delete.
6064         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
6065         reference to the SPE evmerge intructions.
6066         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
6067         an element count and rtx array.
6068         (rs6000_expand_extract_even): Update call accordingly.
6069         (rs6000_expand_interleave): Likewise.
6070         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
6071         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
6072         new function.
6073         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
6074
6075 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6076
6077         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
6078         vector mode and that that mode matches the mode of the data
6079         being permuted.
6080         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
6081         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
6082         directly using expand_vec_perm_1 when forcing selectors into
6083         registers.
6084         (expand_vec_perm_var): New function, split out from expand_vec_perm.
6085
6086 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6087
6088         * optabs-query.h (can_vec_perm_p): Delete.
6089         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
6090         * optabs-query.c (can_vec_perm_p): Split into...
6091         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
6092         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
6093         particular selector is valid.
6094         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
6095         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
6096         (vect_grouped_load_supported): Likewise.
6097         (vect_shift_permute_load_chain): Likewise.
6098         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
6099         (vect_transform_slp_perm_load): Likewise.
6100         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
6101         (vectorizable_bswap): Likewise.
6102         (vect_gen_perm_mask_checked): Likewise.
6103         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
6104         implementations of variable permutation vectors into account
6105         when deciding which selector to use.
6106         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
6107         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
6108         with a false third argument.
6109         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
6110         to test whether the constant selector is valid and can_vec_perm_var_p
6111         to test whether a variable selector is valid.
6112
6113 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6114
6115         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
6116         * optabs-query.c (can_vec_perm_p): Likewise.
6117         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
6118         instead of vec_perm_indices.
6119         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
6120         (vect_gen_perm_mask_checked): Likewise,
6121         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
6122         (vect_gen_perm_mask_checked): Likewise,
6123
6124 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
6125
6126         * optabs-query.h (qimode_for_vec_perm): Declare.
6127         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
6128         (qimode_for_vec_perm): ...this new function.
6129         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
6130
6131 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
6132
6133         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
6134         does not have a conditional at the top.
6135
6136 2018-01-02  Richard Biener  <rguenther@suse.de>
6137
6138         * ipa-inline.c (big_speedup_p): Fix expression.
6139
6140 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
6141
6142         PR target/81616
6143         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
6144         for generic 4->6.
6145
6146 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
6147
6148         PR target/81616
6149         Generic tuning.
6150         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
6151         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
6152         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
6153         cond_taken_branch_cost 3->4.
6154
6155 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
6156
6157         PR tree-optimization/83581
6158         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
6159         TODO_cleanup_cfg if any changes have been made.
6160
6161         PR middle-end/83608
6162         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
6163         convert_modes if target mode has the right side, but different mode
6164         class.
6165
6166         PR middle-end/83609
6167         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
6168         last argument when extracting from CONCAT.  If either from_real or
6169         from_imag is NULL, use expansion through memory.  If result is not
6170         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
6171         the parts directly to inner mode, if even that fails, use expansion
6172         through memory.
6173
6174         PR middle-end/83623
6175         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
6176         check for bswap in mode rather than HImode and use that in expand_unop
6177         too.
6178 \f
6179 Copyright (C) 2018 Free Software Foundation, Inc.
6180
6181 Copying and distribution of this file, with or without modification,
6182 are permitted in any medium without royalty provided the copyright
6183 notice and this notice are preserved.