* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
[external/binutils.git] / gas / testsuite / gas / tilegx / t_insns.d
1 #as:
2 #objdump: -dr
3
4 .*:     file format .*
5
6
7 Disassembly of section .text:
8
9 0000000000000000 <target>:
10        0:       [0-9a-f]*       { nop }
11        8:       [0-9a-f]*       { nop }
12       10:       [0-9a-f]*       { nop }
13       18:       [0-9a-f]*       { nop }
14       20:       [0-9a-f]*       { nop }
15       28:       [0-9a-f]*       { nop }
16       30:       [0-9a-f]*       { nop }
17       38:       [0-9a-f]*       { nop }
18       40:       [0-9a-f]*       { nop }
19       48:       [0-9a-f]*       { nop }
20       50:       [0-9a-f]*       { nop }
21       58:       [0-9a-f]*       { nop }
22       60:       [0-9a-f]*       { nop }
23       68:       [0-9a-f]*       { nop }
24       70:       [0-9a-f]*       { nop }
25       78:       [0-9a-f]*       { nop }
26       80:       [0-9a-f]*       { nop }
27       88:       [0-9a-f]*       { nop }
28       90:       [0-9a-f]*       { nop }
29       98:       [0-9a-f]*       { nop }
30       a0:       [0-9a-f]*       { nop }
31       a8:       [0-9a-f]*       { nop }
32       b0:       [0-9a-f]*       { nop }
33       b8:       [0-9a-f]*       { nop }
34       c0:       [0-9a-f]*       { nop }
35       c8:       [0-9a-f]*       { nop }
36       d0:       [0-9a-f]*       { nop }
37       d8:       [0-9a-f]*       { nop }
38       e0:       [0-9a-f]*       { nop }
39       e8:       [0-9a-f]*       { nop }
40       f0:       [0-9a-f]*       { nop }
41       f8:       [0-9a-f]*       { nop }
42      100:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; bnezt r15, 0 <target> }
43      108:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; bnez r15, 0 <target> }
44      110:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; bnez r15, 0 <target> }
45      118:       [0-9a-f]*       { fdouble_pack1 r5, r6, r7 ; bnez r15, 0 <target> }
46      120:       [0-9a-f]*       { fsingle_pack2 r5, r6, r7 ; bnez r15, 0 <target> }
47      128:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; blez r15, 0 <target> }
48      130:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; bgtzt r15, 0 <target> }
49      138:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; bgtzt r15, 0 <target> }
50      140:       [0-9a-f]*       { addli r5, r6, 4660 ; bgtzt r15, 0 <target> }
51      148:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; beqzt r15, 0 <target> }
52      150:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; beqzt r15, 0 <target> }
53      158:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; beqzt r15, 0 <target> }
54      160:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; beqz r15, 0 <target> }
55      168:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; beqz r15, 0 <target> }
56      170:       [0-9a-f]*       { addli r5, r6, 4660 ; beqz r15, 0 <target> }
57      178:       [0-9a-f]*       { dblalign2 r5, r6, r7 ; beqz r15, 0 <target> }
58      180:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; blbs r15, 0 <target> }
59      188:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; blbs r15, 0 <target> }
60      190:       [0-9a-f]*       { shl1addx r5, r6, r7 ; blbst r15, 0 <target> }
61      198:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; blbst r15, 0 <target> }
62      1a0:       [0-9a-f]*       { v1ddotpu r5, r6, r7 ; blbst r15, 0 <target> }
63      1a8:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; blbs r15, 0 <target> }
64      1b0:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; blbst r15, 0 <target> }
65      1b8:       [0-9a-f]*       { v4packsc r5, r6, r7 ; blbst r15, 0 <target> }
66      1c0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; blbst r15, 0 <target> }
67      1c8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; bgtz r15, 0 <target> }
68      1d0:       [0-9a-f]*       { v1adduc r5, r6, r7 ; bgtzt r15, 0 <target> }
69      1d8:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; bgtz r15, 0 <target> }
70      1e0:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; bgtzt r15, 0 <target> }
71      1e8:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; bgtz r15, 0 <target> }
72      1f0:       [0-9a-f]*       { v1sadau r5, r6, r7 ; bgtzt r15, 0 <target> }
73      1f8:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 ; bgtzt r15, 0 <target> }
74      200:       [0-9a-f]*       { v2cmpltu r5, r6, r7 ; bgtz r15, 0 <target> }
75      208:       [0-9a-f]*       { v2int_l r5, r6, r7 ; bgtzt r15, 0 <target> }
76      210:       [0-9a-f]*       { v2packuc r5, r6, r7 ; bgtz r15, 0 <target> }
77      218:       [0-9a-f]*       { v4addsc r5, r6, r7 ; bgtzt r15, 0 <target> }
78      220:       [0-9a-f]*       { v4subsc r5, r6, r7 ; bgtzt r15, 0 <target> }
79      228:       [0-9a-f]*       { cmples r5, r6, r7 ; bgtzt r15, 0 <target> }
80      230:       [0-9a-f]*       { cmpltui r5, r6, 5 ; bgtzt r15, 0 <target> }
81      238:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; j 0 <target> }
82      240:       [0-9a-f]*       { subxsc r5, r6, r7 ; bltzt r15, 0 <target> }
83      248:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; bltz r15, 0 <target> }
84      250:       [0-9a-f]*       { v1int_l r5, r6, r7 ; bltz r15, 0 <target> }
85      258:       [0-9a-f]*       { v1multu r5, r6, r7 ; bltz r15, 0 <target> }
86      260:       [0-9a-f]*       { v1shrs r5, r6, r7 ; bltzt r15, 0 <target> }
87      268:       [0-9a-f]*       { v2addsc r5, r6, r7 ; bltz r15, 0 <target> }
88      270:       [0-9a-f]*       { v2dotp r5, r6, r7 ; bltzt r15, 0 <target> }
89      278:       [0-9a-f]*       { v2maxsi r5, r6, 5 ; bltzt r15, 0 <target> }
90      280:       [0-9a-f]*       { v2packh r5, r6, r7 ; bltz r15, 0 <target> }
91      288:       [0-9a-f]*       { v2sadu r5, r6, r7 ; bltzt r15, 0 <target> }
92      290:       [0-9a-f]*       { v2shrui r5, r6, 5 ; bltzt r15, 0 <target> }
93      298:       [0-9a-f]*       { v4shlsc r5, r6, r7 ; bltz r15, 0 <target> }
94      2a0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; bltzt r15, 0 <target> }
95      2a8:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; bltz r15, 0 <target> }
96      2b0:       [0-9a-f]*       { cmulaf r5, r6, r7 ; bltz r15, 0 <target> }
97      2b8:       [0-9a-f]*       { moveli r5, 4660 ; bgez r15, 0 <target> }
98      2c0:       [0-9a-f]*       { subxsc r5, r6, r7 ; bnez r15, 0 <target> }
99      2c8:       [0-9a-f]*       { v1maxu r5, r6, r7 ; bnez r15, 0 <target> }
100      2d0:       [0-9a-f]*       { v1mulu r5, r6, r7 ; bnez r15, 0 <target> }
101      2d8:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; bnez r15, 0 <target> }
102      2e0:       [0-9a-f]*       { v2addi r5, r6, 5 ; bnezt r15, 0 <target> }
103      2e8:       [0-9a-f]*       { v2mins r5, r6, r7 ; bnez r15, 0 <target> }
104      2f0:       [0-9a-f]*       { v2sadu r5, r6, r7 ; bnez r15, 0 <target> }
105      2f8:       [0-9a-f]*       { v2shru r5, r6, r7 ; bnez r15, 0 <target> }
106      300:       [0-9a-f]*       { v4shrs r5, r6, r7 ; bnez r15, 0 <target> }
107      308:       [0-9a-f]*       { cmpeq r5, r6, r7 ; bnez r15, 0 <target> }
108      310:       [0-9a-f]*       { cmulf r5, r6, r7 ; bnez r15, 0 <target> }
109      318:       [0-9a-f]*       { revbytes r5, r6 ; blbst r15, 0 <target> }
110      320:       [0-9a-f]*       { shrs r5, r6, r7 ; blbst r15, 0 <target> }
111      328:       [0-9a-f]*       { shruxi r5, r6, 5 ; blbs r15, 0 <target> }
112      330:       [0-9a-f]*       { tblidxb3 r5, r6 ; blbst r15, 0 <target> }
113      338:       [0-9a-f]*       { v1shl r5, r6, r7 ; blbs r15, 0 <target> }
114      340:       [0-9a-f]*       { v2mnz r5, r6, r7 ; blbs r15, 0 <target> }
115      348:       [0-9a-f]*       { v4add r5, r6, r7 ; blbs r15, 0 <target> }
116      350:       [0-9a-f]*       { addx r5, r6, r7 ; blbs r15, 0 <target> }
117      358:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; j 0 <target> }
118      360:       [0-9a-f]*       { nor r5, r6, r7 ; blezt r15, 0 <target> }
119      368:       [0-9a-f]*       { shl r5, r6, r7 ; blezt r15, 0 <target> }
120      370:       [0-9a-f]*       { shrsi r5, r6, 5 ; blez r15, 0 <target> }
121      378:       [0-9a-f]*       { tblidxb0 r5, r6 ; blbs r15, 0 <target> }
122      380:       [0-9a-f]*       { v2mz r5, r6, r7 ; blbc r15, 0 <target> }
123      388:       [0-9a-f]*       { and r5, r6, r7 ; bgtz r15, 0 <target> }
124      390:       [0-9a-f]*       { mz r5, r6, r7 ; blbst r15, 0 <target> }
125      398:       [0-9a-f]*       { shl r5, r6, r7 ; blbs r15, 0 <target> }
126      3a0:       [0-9a-f]*       { bfexts r5, r6, 5, 7 ; jal 0 <target> }
127      3a8:       [0-9a-f]*       { ori r5, r6, 5 ; bgtz r15, 0 <target> }
128      3b0:       [0-9a-f]*       { infol 4660 ; bgez r15, 0 <target> }
129      3b8:       [0-9a-f]*       { pcnt r5, r6 ; bnezt r15, 0 <target> }
130      3c0:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; j 0 <target> }
131      3c8:       [0-9a-f]*       { movei r5, 5 ; blbs r15, 0 <target> }
132      3d0:       [0-9a-f]*       { v2avgs r5, r6, r7 ; jal 0 <target> }
133      3d8:       [0-9a-f]*       { cmulh r5, r6, r7 ; jal 0 <target> }
134      3e0:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; j 0 <target> }
135      3e8:       [0-9a-f]*       { rotli r5, r6, 5 ; jal 0 <target> }
136      3f0:       [0-9a-f]*       { v4shrs r5, r6, r7 ; j 0 <target> }
137      3f8:       [0-9a-f]*       { v2sub r5, r6, r7 ; j 0 <target> }
138      400:       [0-9a-f]*       { and r5, r6, r7 ; j 0 <target> }
139      408:       [0-9a-f]*       { nop ; blbst r15, 0 <target> }
140      410:       [0-9a-f]*       { cmpltu r5, r6, r7 ; beqzt r15, 0 <target> }
141      418:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; beqzt r15, 0 <target> }
142      420:       [0-9a-f]*       { shli r5, r6, 5 ; beqzt r15, 0 <target> }
143      428:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; beqzt r15, 0 <target> }
144      430:       [0-9a-f]*       { v2maxs r5, r6, r7 ; beqzt r15, 0 <target> }
145      438:       [0-9a-f]*       { addli r5, r6, 4660 ; bgezt r15, 0 <target> }
146      440:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; bgezt r15, 0 <target> }
147      448:       [0-9a-f]*       { mulx r5, r6, r7 ; bgezt r15, 0 <target> }
148      450:       [0-9a-f]*       { v1avgu r5, r6, r7 ; bgezt r15, 0 <target> }
149      458:       [0-9a-f]*       { v1subuc r5, r6, r7 ; bgezt r15, 0 <target> }
150      460:       [0-9a-f]*       { v2shru r5, r6, r7 ; bgezt r15, 0 <target> }
151      468:       [0-9a-f]*       { cmpne r5, r6, r7 ; bgtzt r15, 0 <target> }
152      470:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; bgtzt r15, 0 <target> }
153      478:       [0-9a-f]*       { shlxi r5, r6, 5 ; bgtzt r15, 0 <target> }
154      480:       [0-9a-f]*       { v1int_l r5, r6, r7 ; bgtzt r15, 0 <target> }
155      488:       [0-9a-f]*       { v2mins r5, r6, r7 ; bgtzt r15, 0 <target> }
156      490:       [0-9a-f]*       { addxi r5, r6, 5 ; blbct r15, 0 <target> }
157      498:       [0-9a-f]*       { fdouble_unpack_max r5, r6, r7 ; blbct r15, 0 <target> }
158      4a0:       [0-9a-f]*       { nop ; blbct r15, 0 <target> }
159      4a8:       [0-9a-f]*       { v1cmpeqi r5, r6, 5 ; blbct r15, 0 <target> }
160      4b0:       [0-9a-f]*       { v2addi r5, r6, 5 ; blbct r15, 0 <target> }
161      4b8:       [0-9a-f]*       { v2sub r5, r6, r7 ; blbct r15, 0 <target> }
162      4c0:       [0-9a-f]*       { cmula r5, r6, r7 ; blbst r15, 0 <target> }
163      4c8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; blbst r15, 0 <target> }
164      4d0:       [0-9a-f]*       { shrsi r5, r6, 5 ; blbst r15, 0 <target> }
165      4d8:       [0-9a-f]*       { v1maxui r5, r6, 5 ; blbst r15, 0 <target> }
166      4e0:       [0-9a-f]*       { v2mnz r5, r6, r7 ; blbst r15, 0 <target> }
167      4e8:       [0-9a-f]*       { addxsc r5, r6, r7 ; blezt r15, 0 <target> }
168      4f0:       [0-9a-f]*       { blezt r15, 0 <target> }
169      4f8:       [0-9a-f]*       { or r5, r6, r7 ; blezt r15, 0 <target> }
170      500:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; blezt r15, 0 <target> }
171      508:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; blezt r15, 0 <target> }
172      510:       [0-9a-f]*       { v4add r5, r6, r7 ; blezt r15, 0 <target> }
173      518:       [0-9a-f]*       { cmulf r5, r6, r7 ; bltzt r15, 0 <target> }
174      520:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; bltzt r15, 0 <target> }
175      528:       [0-9a-f]*       { shrui r5, r6, 5 ; bltzt r15, 0 <target> }
176      530:       [0-9a-f]*       { v1minui r5, r6, 5 ; bltzt r15, 0 <target> }
177      538:       [0-9a-f]*       { v2muls r5, r6, r7 ; bltzt r15, 0 <target> }
178      540:       [0-9a-f]*       { andi r5, r6, 5 ; bnezt r15, 0 <target> }
179      548:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; bnezt r15, 0 <target> }
180      550:       [0-9a-f]*       { pcnt r5, r6 ; bnezt r15, 0 <target> }
181      558:       [0-9a-f]*       { v1cmpltsi r5, r6, 5 ; bnezt r15, 0 <target> }
182      560:       [0-9a-f]*       { v2cmpeq r5, r6, r7 ; bnezt r15, 0 <target> }
183      568:       [0-9a-f]*       { v4int_h r5, r6, r7 ; bnezt r15, 0 <target> }
184      570:       [0-9a-f]*       { cmulfr r5, r6, r7 ; beqz r15, 0 <target> }
185      578:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; beqz r15, 0 <target> }
186      580:       [0-9a-f]*       { shrux r5, r6, r7 ; beqz r15, 0 <target> }
187      588:       [0-9a-f]*       { v1mnz r5, r6, r7 ; beqz r15, 0 <target> }
188      590:       [0-9a-f]*       { v2mults r5, r6, r7 ; beqz r15, 0 <target> }
189      598:       [0-9a-f]*       { bfexts r5, r6, 5, 7 ; bgez r15, 0 <target> }
190      5a0:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; bgez r15, 0 <target> }
191      5a8:       [0-9a-f]*       { revbits r5, r6 ; bgez r15, 0 <target> }
192      5b0:       [0-9a-f]*       { v1cmpltu r5, r6, r7 ; bgez r15, 0 <target> }
193      5b8:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 ; bgez r15, 0 <target> }
194      5c0:       [0-9a-f]*       { v4int_l r5, r6, r7 ; bgez r15, 0 <target> }
195      5c8:       [0-9a-f]*       { cmulhr r5, r6, r7 ; bgtz r15, 0 <target> }
196      5d0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; bgtz r15, 0 <target> }
197      5d8:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; bgtz r15, 0 <target> }
198      5e0:       [0-9a-f]*       { v1mulu r5, r6, r7 ; bgtz r15, 0 <target> }
199      5e8:       [0-9a-f]*       { v2packh r5, r6, r7 ; bgtz r15, 0 <target> }
200      5f0:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; blbc r15, 0 <target> }
201      5f8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; blbc r15, 0 <target> }
202      600:       [0-9a-f]*       { rotl r5, r6, r7 ; blbc r15, 0 <target> }
203      608:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; blbc r15, 0 <target> }
204      610:       [0-9a-f]*       { v2cmpleu r5, r6, r7 ; blbc r15, 0 <target> }
205      618:       [0-9a-f]*       { v4shl r5, r6, r7 ; blbc r15, 0 <target> }
206      620:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; blbs r15, 0 <target> }
207      628:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; blbs r15, 0 <target> }
208      630:       [0-9a-f]*       { subx r5, r6, r7 ; blbs r15, 0 <target> }
209      638:       [0-9a-f]*       { v1mz r5, r6, r7 ; blbs r15, 0 <target> }
210      640:       [0-9a-f]*       { v2packuc r5, r6, r7 ; blbs r15, 0 <target> }
211      648:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; blez r15, 0 <target> }
212      650:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; blez r15, 0 <target> }
213      658:       [0-9a-f]*       { shl r5, r6, r7 ; blez r15, 0 <target> }
214      660:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; blez r15, 0 <target> }
215      668:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; blez r15, 0 <target> }
216      670:       [0-9a-f]*       { v4shrs r5, r6, r7 ; blez r15, 0 <target> }
217      678:       [0-9a-f]*       { dblalign r5, r6, r7 ; bltz r15, 0 <target> }
218      680:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; bltz r15, 0 <target> }
219      688:       [0-9a-f]*       { tblidxb0 r5, r6 ; bltz r15, 0 <target> }
220      690:       [0-9a-f]*       { v1sadu r5, r6, r7 ; bltz r15, 0 <target> }
221      698:       [0-9a-f]*       { v2sadau r5, r6, r7 ; bltz r15, 0 <target> }
222      6a0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; bnez r15, 0 <target> }
223      6a8:       [0-9a-f]*       { infol 4660 ; bnez r15, 0 <target> }
224      6b0:       [0-9a-f]*       { shl1add r5, r6, r7 ; bnez r15, 0 <target> }
225      6b8:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; bnez r15, 0 <target> }
226      6c0:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; bnez r15, 0 <target> }
227      6c8:       [0-9a-f]*       { v4sub r5, r6, r7 ; bnez r15, 0 <target> }
228      6d0:       [0-9a-f]*       { cmples r5, r6, r7 ; jal 0 <target> }
229      6d8:       [0-9a-f]*       { mnz r5, r6, r7 ; jal 0 <target> }
230      6e0:       [0-9a-f]*       { shl2add r5, r6, r7 ; jal 0 <target> }
231      6e8:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; jal 0 <target> }
232      6f0:       [0-9a-f]*       { v2dotp r5, r6, r7 ; jal 0 <target> }
233      6f8:       [0-9a-f]*       { xor r5, r6, r7 ; jal 0 <target> }
234      700:       [0-9a-f]*       { dblalign6 r5, r6, r7 ; j 0 <target> }
235      708:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; j 0 <target> }
236      710:       [0-9a-f]*       { tblidxb3 r5, r6 ; j 0 <target> }
237      718:       [0-9a-f]*       { v1shrs r5, r6, r7 ; j 0 <target> }
238      720:       [0-9a-f]*       { v2shl r5, r6, r7 ; j 0 <target> }
239      728:       [0-9a-f]*       { cmpeqi r5, r6, 5 }
240      730:       [0-9a-f]*       { fetchand r5, r6, r7 }
241      738:       [0-9a-f]*       { ldna_add r5, r6, 5 }
242      740:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 }
243      748:       [0-9a-f]*       { shlx r5, r6, r7 }
244      750:       [0-9a-f]*       { v1avgu r5, r6, r7 }
245      758:       [0-9a-f]*       { v1subuc r5, r6, r7 }
246      760:       [0-9a-f]*       { v2shru r5, r6, r7 }
247      768:       [0-9a-f]*       { add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
248      770:       [0-9a-f]*       { add r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
249      778:       [0-9a-f]*       { add r15, r16, r17 ; andi r5, r6, 5 ; ld2u r25, r26 }
250      780:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
251      788:       [0-9a-f]*       { add r15, r16, r17 ; cmpeq r5, r6, r7 ; ld4s r25, r26 }
252      790:       [0-9a-f]*       { add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 }
253      798:       [0-9a-f]*       { add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 }
254      7a0:       [0-9a-f]*       { add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 }
255      7a8:       [0-9a-f]*       { ctz r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 }
256      7b0:       [0-9a-f]*       { add r15, r16, r17 ; prefetch_l3 r25 }
257      7b8:       [0-9a-f]*       { add r15, r16, r17 ; info 19 ; prefetch r25 }
258      7c0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
259      7c8:       [0-9a-f]*       { add r15, r16, r17 ; andi r5, r6, 5 ; ld1s r25, r26 }
260      7d0:       [0-9a-f]*       { add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
261      7d8:       [0-9a-f]*       { add r15, r16, r17 ; move r5, r6 ; ld1u r25, r26 }
262      7e0:       [0-9a-f]*       { add r15, r16, r17 ; ld1u r25, r26 }
263      7e8:       [0-9a-f]*       { revbits r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 }
264      7f0:       [0-9a-f]*       { add r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
265      7f8:       [0-9a-f]*       { add r15, r16, r17 ; subx r5, r6, r7 ; ld2u r25, r26 }
266      800:       [0-9a-f]*       { mulx r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
267      808:       [0-9a-f]*       { add r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
268      810:       [0-9a-f]*       { add r15, r16, r17 ; shli r5, r6, 5 ; ld4u r25, r26 }
269      818:       [0-9a-f]*       { add r15, r16, r17 ; move r5, r6 ; prefetch r25 }
270      820:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
271      828:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
272      830:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
273      838:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
274      840:       [0-9a-f]*       { mulax r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
275      848:       [0-9a-f]*       { add r15, r16, r17 ; mz r5, r6, r7 ; ld4u r25, r26 }
276      850:       [0-9a-f]*       { add r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 }
277      858:       [0-9a-f]*       { pcnt r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
278      860:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
279      868:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
280      870:       [0-9a-f]*       { add r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
281      878:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
282      880:       [0-9a-f]*       { add r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 }
283      888:       [0-9a-f]*       { add r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l2 r25 }
284      890:       [0-9a-f]*       { add r15, r16, r17 ; prefetch_l2_fault r25 }
285      898:       [0-9a-f]*       { tblidxb1 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
286      8a0:       [0-9a-f]*       { add r15, r16, r17 ; nop ; prefetch_l3 r25 }
287      8a8:       [0-9a-f]*       { add r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3_fault r25 }
288      8b0:       [0-9a-f]*       { add r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3_fault r25 }
289      8b8:       [0-9a-f]*       { revbytes r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 }
290      8c0:       [0-9a-f]*       { add r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
291      8c8:       [0-9a-f]*       { add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
292      8d0:       [0-9a-f]*       { add r15, r16, r17 ; shl2add r5, r6, r7 ; st1 r25, r26 }
293      8d8:       [0-9a-f]*       { add r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
294      8e0:       [0-9a-f]*       { add r15, r16, r17 ; shlx r5, r6, r7 }
295      8e8:       [0-9a-f]*       { add r15, r16, r17 ; shru r5, r6, r7 ; ld r25, r26 }
296      8f0:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; add r15, r16, r17 }
297      8f8:       [0-9a-f]*       { revbits r5, r6 ; add r15, r16, r17 ; st r25, r26 }
298      900:       [0-9a-f]*       { add r15, r16, r17 ; cmpne r5, r6, r7 ; st1 r25, r26 }
299      908:       [0-9a-f]*       { add r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 }
300      910:       [0-9a-f]*       { mulx r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 }
301      918:       [0-9a-f]*       { add r15, r16, r17 ; cmpeqi r5, r6, 5 ; st4 r25, r26 }
302      920:       [0-9a-f]*       { add r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 }
303      928:       [0-9a-f]*       { add r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
304      930:       [0-9a-f]*       { tblidxb1 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
305      938:       [0-9a-f]*       { tblidxb3 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
306      940:       [0-9a-f]*       { v1mulu r5, r6, r7 ; add r15, r16, r17 }
307      948:       [0-9a-f]*       { add r15, r16, r17 ; v2packh r5, r6, r7 }
308      950:       [0-9a-f]*       { add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
309      958:       [0-9a-f]*       { add r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 }
310      960:       [0-9a-f]*       { add r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 }
311      968:       [0-9a-f]*       { add r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
312      970:       [0-9a-f]*       { add r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
313      978:       [0-9a-f]*       { add r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
314      980:       [0-9a-f]*       { add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
315      988:       [0-9a-f]*       { add r5, r6, r7 ; dblalign4 r15, r16, r17 }
316      990:       [0-9a-f]*       { add r5, r6, r7 ; ill ; ld2u r25, r26 }
317      998:       [0-9a-f]*       { add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
318      9a0:       [0-9a-f]*       { add r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
319      9a8:       [0-9a-f]*       { add r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 }
320      9b0:       [0-9a-f]*       { add r5, r6, r7 ; ld r25, r26 }
321      9b8:       [0-9a-f]*       { add r5, r6, r7 ; shli r15, r16, 5 ; ld1s r25, r26 }
322      9c0:       [0-9a-f]*       { add r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 }
323      9c8:       [0-9a-f]*       { add r5, r6, r7 ; jrp r15 ; ld2s r25, r26 }
324      9d0:       [0-9a-f]*       { add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
325      9d8:       [0-9a-f]*       { add r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
326      9e0:       [0-9a-f]*       { add r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 }
327      9e8:       [0-9a-f]*       { add r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
328      9f0:       [0-9a-f]*       { add r5, r6, r7 ; lnk r15 ; prefetch r25 }
329      9f8:       [0-9a-f]*       { add r5, r6, r7 ; move r15, r16 ; prefetch r25 }
330      a00:       [0-9a-f]*       { add r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
331      a08:       [0-9a-f]*       { add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
332      a10:       [0-9a-f]*       { add r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
333      a18:       [0-9a-f]*       { add r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
334      a20:       [0-9a-f]*       { add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
335      a28:       [0-9a-f]*       { add r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
336      a30:       [0-9a-f]*       { add r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 }
337      a38:       [0-9a-f]*       { add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
338      a40:       [0-9a-f]*       { add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
339      a48:       [0-9a-f]*       { add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
340      a50:       [0-9a-f]*       { add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
341      a58:       [0-9a-f]*       { add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
342      a60:       [0-9a-f]*       { add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
343      a68:       [0-9a-f]*       { add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
344      a70:       [0-9a-f]*       { add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 }
345      a78:       [0-9a-f]*       { add r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 }
346      a80:       [0-9a-f]*       { add r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
347      a88:       [0-9a-f]*       { add r5, r6, r7 ; shrui r15, r16, 5 }
348      a90:       [0-9a-f]*       { add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 }
349      a98:       [0-9a-f]*       { add r5, r6, r7 ; or r15, r16, r17 ; st1 r25, r26 }
350      aa0:       [0-9a-f]*       { add r5, r6, r7 ; jr r15 ; st2 r25, r26 }
351      aa8:       [0-9a-f]*       { add r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 }
352      ab0:       [0-9a-f]*       { add r5, r6, r7 ; stnt1 r15, r16 }
353      ab8:       [0-9a-f]*       { add r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 }
354      ac0:       [0-9a-f]*       { add r5, r6, r7 ; v2cmpleu r15, r16, r17 }
355      ac8:       [0-9a-f]*       { add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
356      ad0:       [0-9a-f]*       { addi r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 }
357      ad8:       [0-9a-f]*       { addi r15, r16, 5 ; addxi r5, r6, 5 ; ld2u r25, r26 }
358      ae0:       [0-9a-f]*       { addi r15, r16, 5 ; andi r5, r6, 5 ; ld2u r25, r26 }
359      ae8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 }
360      af0:       [0-9a-f]*       { addi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld4s r25, r26 }
361      af8:       [0-9a-f]*       { addi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 }
362      b00:       [0-9a-f]*       { addi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 }
363      b08:       [0-9a-f]*       { addi r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 }
364      b10:       [0-9a-f]*       { ctz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 }
365      b18:       [0-9a-f]*       { addi r15, r16, 5 ; prefetch_l3 r25 }
366      b20:       [0-9a-f]*       { addi r15, r16, 5 ; info 19 ; prefetch r25 }
367      b28:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 }
368      b30:       [0-9a-f]*       { addi r15, r16, 5 ; andi r5, r6, 5 ; ld1s r25, r26 }
369      b38:       [0-9a-f]*       { addi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
370      b40:       [0-9a-f]*       { addi r15, r16, 5 ; move r5, r6 ; ld1u r25, r26 }
371      b48:       [0-9a-f]*       { addi r15, r16, 5 ; ld1u r25, r26 }
372      b50:       [0-9a-f]*       { revbits r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 }
373      b58:       [0-9a-f]*       { addi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
374      b60:       [0-9a-f]*       { addi r15, r16, 5 ; subx r5, r6, r7 ; ld2u r25, r26 }
375      b68:       [0-9a-f]*       { mulx r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
376      b70:       [0-9a-f]*       { addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
377      b78:       [0-9a-f]*       { addi r15, r16, 5 ; shli r5, r6, 5 ; ld4u r25, r26 }
378      b80:       [0-9a-f]*       { addi r15, r16, 5 ; move r5, r6 ; prefetch r25 }
379      b88:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
380      b90:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
381      b98:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 }
382      ba0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 }
383      ba8:       [0-9a-f]*       { mulax r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 }
384      bb0:       [0-9a-f]*       { addi r15, r16, 5 ; mz r5, r6, r7 ; ld4u r25, r26 }
385      bb8:       [0-9a-f]*       { addi r15, r16, 5 ; nor r5, r6, r7 ; prefetch r25 }
386      bc0:       [0-9a-f]*       { pcnt r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
387      bc8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
388      bd0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
389      bd8:       [0-9a-f]*       { addi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch r25 }
390      be0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
391      be8:       [0-9a-f]*       { addi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 }
392      bf0:       [0-9a-f]*       { addi r15, r16, 5 ; rotl r5, r6, r7 ; prefetch_l2 r25 }
393      bf8:       [0-9a-f]*       { addi r15, r16, 5 ; prefetch_l2_fault r25 }
394      c00:       [0-9a-f]*       { tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
395      c08:       [0-9a-f]*       { addi r15, r16, 5 ; nop ; prefetch_l3 r25 }
396      c10:       [0-9a-f]*       { addi r15, r16, 5 ; cmpleu r5, r6, r7 ; prefetch_l3_fault r25 }
397      c18:       [0-9a-f]*       { addi r15, r16, 5 ; shrsi r5, r6, 5 ; prefetch_l3_fault r25 }
398      c20:       [0-9a-f]*       { revbytes r5, r6 ; addi r15, r16, 5 ; prefetch_l2 r25 }
399      c28:       [0-9a-f]*       { addi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
400      c30:       [0-9a-f]*       { addi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
401      c38:       [0-9a-f]*       { addi r15, r16, 5 ; shl2add r5, r6, r7 ; st1 r25, r26 }
402      c40:       [0-9a-f]*       { addi r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 }
403      c48:       [0-9a-f]*       { addi r15, r16, 5 ; shlx r5, r6, r7 }
404      c50:       [0-9a-f]*       { addi r15, r16, 5 ; shru r5, r6, r7 ; ld r25, r26 }
405      c58:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; addi r15, r16, 5 }
406      c60:       [0-9a-f]*       { revbits r5, r6 ; addi r15, r16, 5 ; st r25, r26 }
407      c68:       [0-9a-f]*       { addi r15, r16, 5 ; cmpne r5, r6, r7 ; st1 r25, r26 }
408      c70:       [0-9a-f]*       { addi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 }
409      c78:       [0-9a-f]*       { mulx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
410      c80:       [0-9a-f]*       { addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; st4 r25, r26 }
411      c88:       [0-9a-f]*       { addi r15, r16, 5 ; shli r5, r6, 5 ; st4 r25, r26 }
412      c90:       [0-9a-f]*       { addi r15, r16, 5 ; subx r5, r6, r7 ; prefetch r25 }
413      c98:       [0-9a-f]*       { tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
414      ca0:       [0-9a-f]*       { tblidxb3 r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
415      ca8:       [0-9a-f]*       { v1mulu r5, r6, r7 ; addi r15, r16, 5 }
416      cb0:       [0-9a-f]*       { addi r15, r16, 5 ; v2packh r5, r6, r7 }
417      cb8:       [0-9a-f]*       { addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
418      cc0:       [0-9a-f]*       { addi r5, r6, 5 ; addi r15, r16, 5 ; st r25, r26 }
419      cc8:       [0-9a-f]*       { addi r5, r6, 5 ; addxi r15, r16, 5 ; st1 r25, r26 }
420      cd0:       [0-9a-f]*       { addi r5, r6, 5 ; andi r15, r16, 5 ; st1 r25, r26 }
421      cd8:       [0-9a-f]*       { addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
422      ce0:       [0-9a-f]*       { addi r5, r6, 5 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
423      ce8:       [0-9a-f]*       { addi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld r25, r26 }
424      cf0:       [0-9a-f]*       { addi r5, r6, 5 ; dblalign4 r15, r16, r17 }
425      cf8:       [0-9a-f]*       { addi r5, r6, 5 ; ill ; ld2u r25, r26 }
426      d00:       [0-9a-f]*       { addi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 }
427      d08:       [0-9a-f]*       { addi r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
428      d10:       [0-9a-f]*       { addi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 }
429      d18:       [0-9a-f]*       { addi r5, r6, 5 ; ld r25, r26 }
430      d20:       [0-9a-f]*       { addi r5, r6, 5 ; shli r15, r16, 5 ; ld1s r25, r26 }
431      d28:       [0-9a-f]*       { addi r5, r6, 5 ; rotl r15, r16, r17 ; ld1u r25, r26 }
432      d30:       [0-9a-f]*       { addi r5, r6, 5 ; jrp r15 ; ld2s r25, r26 }
433      d38:       [0-9a-f]*       { addi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
434      d40:       [0-9a-f]*       { addi r5, r6, 5 ; addx r15, r16, r17 ; ld4s r25, r26 }
435      d48:       [0-9a-f]*       { addi r5, r6, 5 ; shrui r15, r16, 5 ; ld4s r25, r26 }
436      d50:       [0-9a-f]*       { addi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
437      d58:       [0-9a-f]*       { addi r5, r6, 5 ; lnk r15 ; prefetch r25 }
438      d60:       [0-9a-f]*       { addi r5, r6, 5 ; move r15, r16 ; prefetch r25 }
439      d68:       [0-9a-f]*       { addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch r25 }
440      d70:       [0-9a-f]*       { addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 }
441      d78:       [0-9a-f]*       { addi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 }
442      d80:       [0-9a-f]*       { addi r5, r6, 5 ; prefetch_add_l2_fault r15, 5 }
443      d88:       [0-9a-f]*       { addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 }
444      d90:       [0-9a-f]*       { addi r5, r6, 5 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
445      d98:       [0-9a-f]*       { addi r5, r6, 5 ; jrp r15 ; prefetch_l2 r25 }
446      da0:       [0-9a-f]*       { addi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
447      da8:       [0-9a-f]*       { addi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l3 r25 }
448      db0:       [0-9a-f]*       { addi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l3 r25 }
449      db8:       [0-9a-f]*       { addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
450      dc0:       [0-9a-f]*       { addi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
451      dc8:       [0-9a-f]*       { addi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
452      dd0:       [0-9a-f]*       { addi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
453      dd8:       [0-9a-f]*       { addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 }
454      de0:       [0-9a-f]*       { addi r5, r6, 5 ; shli r15, r16, 5 ; st2 r25, r26 }
455      de8:       [0-9a-f]*       { addi r5, r6, 5 ; shrsi r15, r16, 5 ; st2 r25, r26 }
456      df0:       [0-9a-f]*       { addi r5, r6, 5 ; shrui r15, r16, 5 }
457      df8:       [0-9a-f]*       { addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 }
458      e00:       [0-9a-f]*       { addi r5, r6, 5 ; or r15, r16, r17 ; st1 r25, r26 }
459      e08:       [0-9a-f]*       { addi r5, r6, 5 ; jr r15 ; st2 r25, r26 }
460      e10:       [0-9a-f]*       { addi r5, r6, 5 ; cmplts r15, r16, r17 ; st4 r25, r26 }
461      e18:       [0-9a-f]*       { addi r5, r6, 5 ; stnt1 r15, r16 }
462      e20:       [0-9a-f]*       { addi r5, r6, 5 ; subx r15, r16, r17 ; st r25, r26 }
463      e28:       [0-9a-f]*       { addi r5, r6, 5 ; v2cmpleu r15, r16, r17 }
464      e30:       [0-9a-f]*       { addi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 }
465      e38:       [0-9a-f]*       { addli r15, r16, 4660 ; cmpltui r5, r6, 5 }
466      e40:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; addli r15, r16, 4660 }
467      e48:       [0-9a-f]*       { addli r15, r16, 4660 ; shlx r5, r6, r7 }
468      e50:       [0-9a-f]*       { addli r15, r16, 4660 ; v1int_h r5, r6, r7 }
469      e58:       [0-9a-f]*       { addli r15, r16, 4660 ; v2maxsi r5, r6, 5 }
470      e60:       [0-9a-f]*       { addli r5, r6, 4660 ; addx r15, r16, r17 }
471      e68:       [0-9a-f]*       { addli r5, r6, 4660 ; iret }
472      e70:       [0-9a-f]*       { addli r5, r6, 4660 ; movei r15, 5 }
473      e78:       [0-9a-f]*       { addli r5, r6, 4660 ; shruxi r15, r16, 5 }
474      e80:       [0-9a-f]*       { addli r5, r6, 4660 ; v1shl r15, r16, r17 }
475      e88:       [0-9a-f]*       { addli r5, r6, 4660 ; v4add r15, r16, r17 }
476      e90:       [0-9a-f]*       { addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 }
477      e98:       [0-9a-f]*       { addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 }
478      ea0:       [0-9a-f]*       { addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
479      ea8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
480      eb0:       [0-9a-f]*       { addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 }
481      eb8:       [0-9a-f]*       { addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 }
482      ec0:       [0-9a-f]*       { addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 }
483      ec8:       [0-9a-f]*       { addx r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
484      ed0:       [0-9a-f]*       { ctz r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
485      ed8:       [0-9a-f]*       { addx r15, r16, r17 ; st2 r25, r26 }
486      ee0:       [0-9a-f]*       { addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 }
487      ee8:       [0-9a-f]*       { mulax r5, r6, r7 ; addx r15, r16, r17 ; ld r25, r26 }
488      ef0:       [0-9a-f]*       { addx r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1s r25, r26 }
489      ef8:       [0-9a-f]*       { addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1s r25, r26 }
490      f00:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
491      f08:       [0-9a-f]*       { addx r15, r16, r17 ; addxi r5, r6, 5 ; ld2s r25, r26 }
492      f10:       [0-9a-f]*       { addx r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 }
493      f18:       [0-9a-f]*       { addx r15, r16, r17 ; info 19 ; ld2u r25, r26 }
494      f20:       [0-9a-f]*       { tblidxb3 r5, r6 ; addx r15, r16, r17 ; ld2u r25, r26 }
495      f28:       [0-9a-f]*       { addx r15, r16, r17 ; or r5, r6, r7 ; ld4s r25, r26 }
496      f30:       [0-9a-f]*       { addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld4u r25, r26 }
497      f38:       [0-9a-f]*       { addx r15, r16, r17 ; shrui r5, r6, 5 ; ld4u r25, r26 }
498      f40:       [0-9a-f]*       { addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 }
499      f48:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
500      f50:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
501      f58:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 }
502      f60:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
503      f68:       [0-9a-f]*       { mulax r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
504      f70:       [0-9a-f]*       { addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l2 r25 }
505      f78:       [0-9a-f]*       { addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l3 r25 }
506      f80:       [0-9a-f]*       { pcnt r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
507      f88:       [0-9a-f]*       { addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
508      f90:       [0-9a-f]*       { addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 }
509      f98:       [0-9a-f]*       { addx r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
510      fa0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
511      fa8:       [0-9a-f]*       { addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2 r25 }
512      fb0:       [0-9a-f]*       { addx r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2 r25 }
513      fb8:       [0-9a-f]*       { addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 }
514      fc0:       [0-9a-f]*       { addx r15, r16, r17 ; prefetch_l2_fault r25 }
515      fc8:       [0-9a-f]*       { revbits r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 }
516      fd0:       [0-9a-f]*       { addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 }
517      fd8:       [0-9a-f]*       { addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 }
518      fe0:       [0-9a-f]*       { revbytes r5, r6 ; addx r15, r16, r17 ; st r25, r26 }
519      fe8:       [0-9a-f]*       { addx r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
520      ff0:       [0-9a-f]*       { addx r15, r16, r17 ; shl1add r5, r6, r7 ; st4 r25, r26 }
521      ff8:       [0-9a-f]*       { addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld r25, r26 }
522     1000:       [0-9a-f]*       { addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
523     1008:       [0-9a-f]*       { addx r15, r16, r17 ; shrs r5, r6, r7 ; ld1u r25, r26 }
524     1010:       [0-9a-f]*       { addx r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
525     1018:       [0-9a-f]*       { addx r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
526     1020:       [0-9a-f]*       { addx r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 }
527     1028:       [0-9a-f]*       { addx r15, r16, r17 ; info 19 ; st1 r25, r26 }
528     1030:       [0-9a-f]*       { tblidxb3 r5, r6 ; addx r15, r16, r17 ; st1 r25, r26 }
529     1038:       [0-9a-f]*       { addx r15, r16, r17 ; or r5, r6, r7 ; st2 r25, r26 }
530     1040:       [0-9a-f]*       { addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; st4 r25, r26 }
531     1048:       [0-9a-f]*       { addx r15, r16, r17 ; shrui r5, r6, 5 ; st4 r25, r26 }
532     1050:       [0-9a-f]*       { addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3 r25 }
533     1058:       [0-9a-f]*       { tblidxb1 r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
534     1060:       [0-9a-f]*       { tblidxb3 r5, r6 ; addx r15, r16, r17 ; st1 r25, r26 }
535     1068:       [0-9a-f]*       { v1sadu r5, r6, r7 ; addx r15, r16, r17 }
536     1070:       [0-9a-f]*       { v2sadau r5, r6, r7 ; addx r15, r16, r17 }
537     1078:       [0-9a-f]*       { addx r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 }
538     1080:       [0-9a-f]*       { addx r5, r6, r7 ; addi r15, r16, 5 }
539     1088:       [0-9a-f]*       { addx r5, r6, r7 ; addxli r15, r16, 4660 }
540     1090:       [0-9a-f]*       { addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 }
541     1098:       [0-9a-f]*       { addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
542     10a0:       [0-9a-f]*       { addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
543     10a8:       [0-9a-f]*       { addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
544     10b0:       [0-9a-f]*       { addx r5, r6, r7 ; exch4 r15, r16, r17 }
545     10b8:       [0-9a-f]*       { addx r5, r6, r7 ; ill ; prefetch r25 }
546     10c0:       [0-9a-f]*       { addx r5, r6, r7 ; jalr r15 ; prefetch r25 }
547     10c8:       [0-9a-f]*       { addx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
548     10d0:       [0-9a-f]*       { addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
549     10d8:       [0-9a-f]*       { addx r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
550     10e0:       [0-9a-f]*       { addx r5, r6, r7 ; shrui r15, r16, 5 ; ld1s r25, r26 }
551     10e8:       [0-9a-f]*       { addx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
552     10f0:       [0-9a-f]*       { addx r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 }
553     10f8:       [0-9a-f]*       { addx r5, r6, r7 ; ill ; ld2u r25, r26 }
554     1100:       [0-9a-f]*       { addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
555     1108:       [0-9a-f]*       { addx r5, r6, r7 ; ld4s r25, r26 }
556     1110:       [0-9a-f]*       { addx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
557     1118:       [0-9a-f]*       { addx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
558     1120:       [0-9a-f]*       { addx r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 }
559     1128:       [0-9a-f]*       { addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
560     1130:       [0-9a-f]*       { addx r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 }
561     1138:       [0-9a-f]*       { addx r5, r6, r7 ; prefetch r25 }
562     1140:       [0-9a-f]*       { addx r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
563     1148:       [0-9a-f]*       { addx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch r25 }
564     1150:       [0-9a-f]*       { addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
565     1158:       [0-9a-f]*       { addx r5, r6, r7 ; movei r15, 5 ; prefetch_l2 r25 }
566     1160:       [0-9a-f]*       { addx r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 }
567     1168:       [0-9a-f]*       { addx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
568     1170:       [0-9a-f]*       { addx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
569     1178:       [0-9a-f]*       { addx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
570     1180:       [0-9a-f]*       { addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
571     1188:       [0-9a-f]*       { addx r5, r6, r7 ; shl1add r15, r16, r17 ; st r25, r26 }
572     1190:       [0-9a-f]*       { addx r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 }
573     1198:       [0-9a-f]*       { addx r5, r6, r7 ; shl3add r15, r16, r17 }
574     11a0:       [0-9a-f]*       { addx r5, r6, r7 ; shlxi r15, r16, 5 }
575     11a8:       [0-9a-f]*       { addx r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 }
576     11b0:       [0-9a-f]*       { addx r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
577     11b8:       [0-9a-f]*       { addx r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
578     11c0:       [0-9a-f]*       { addx r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 }
579     11c8:       [0-9a-f]*       { addx r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
580     11d0:       [0-9a-f]*       { addx r5, r6, r7 ; st4 r25, r26 }
581     11d8:       [0-9a-f]*       { addx r5, r6, r7 ; stnt4 r15, r16 }
582     11e0:       [0-9a-f]*       { addx r5, r6, r7 ; subx r15, r16, r17 }
583     11e8:       [0-9a-f]*       { addx r5, r6, r7 ; v2cmpltui r15, r16, 5 }
584     11f0:       [0-9a-f]*       { addx r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
585     11f8:       [0-9a-f]*       { addxi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 }
586     1200:       [0-9a-f]*       { addxi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch r25 }
587     1208:       [0-9a-f]*       { addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
588     1210:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
589     1218:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 }
590     1220:       [0-9a-f]*       { addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 }
591     1228:       [0-9a-f]*       { addxi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 }
592     1230:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
593     1238:       [0-9a-f]*       { ctz r5, r6 ; addxi r15, r16, 5 ; prefetch r25 }
594     1240:       [0-9a-f]*       { addxi r15, r16, 5 ; st2 r25, r26 }
595     1248:       [0-9a-f]*       { addxi r15, r16, 5 ; info 19 ; prefetch_l3 r25 }
596     1250:       [0-9a-f]*       { mulax r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
597     1258:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld1s r25, r26 }
598     1260:       [0-9a-f]*       { addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1s r25, r26 }
599     1268:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; ld1u r25, r26 }
600     1270:       [0-9a-f]*       { addxi r15, r16, 5 ; addxi r5, r6, 5 ; ld2s r25, r26 }
601     1278:       [0-9a-f]*       { addxi r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 }
602     1280:       [0-9a-f]*       { addxi r15, r16, 5 ; info 19 ; ld2u r25, r26 }
603     1288:       [0-9a-f]*       { tblidxb3 r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 }
604     1290:       [0-9a-f]*       { addxi r15, r16, 5 ; or r5, r6, r7 ; ld4s r25, r26 }
605     1298:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4u r25, r26 }
606     12a0:       [0-9a-f]*       { addxi r15, r16, 5 ; shrui r5, r6, 5 ; ld4u r25, r26 }
607     12a8:       [0-9a-f]*       { addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 }
608     12b0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3 r25 }
609     12b8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
610     12c0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
611     12c8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
612     12d0:       [0-9a-f]*       { mulax r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
613     12d8:       [0-9a-f]*       { addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l2 r25 }
614     12e0:       [0-9a-f]*       { addxi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l3 r25 }
615     12e8:       [0-9a-f]*       { pcnt r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
616     12f0:       [0-9a-f]*       { addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 }
617     12f8:       [0-9a-f]*       { addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 }
618     1300:       [0-9a-f]*       { addxi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 }
619     1308:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
620     1310:       [0-9a-f]*       { addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2 r25 }
621     1318:       [0-9a-f]*       { addxi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l2 r25 }
622     1320:       [0-9a-f]*       { addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 }
623     1328:       [0-9a-f]*       { addxi r15, r16, 5 ; prefetch_l2_fault r25 }
624     1330:       [0-9a-f]*       { revbits r5, r6 ; addxi r15, r16, 5 ; prefetch_l3 r25 }
625     1338:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 }
626     1340:       [0-9a-f]*       { addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3_fault r25 }
627     1348:       [0-9a-f]*       { revbytes r5, r6 ; addxi r15, r16, 5 ; st r25, r26 }
628     1350:       [0-9a-f]*       { addxi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 }
629     1358:       [0-9a-f]*       { addxi r15, r16, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 }
630     1360:       [0-9a-f]*       { addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 }
631     1368:       [0-9a-f]*       { addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
632     1370:       [0-9a-f]*       { addxi r15, r16, 5 ; shrs r5, r6, r7 ; ld1u r25, r26 }
633     1378:       [0-9a-f]*       { addxi r15, r16, 5 ; shru r5, r6, r7 ; ld2u r25, r26 }
634     1380:       [0-9a-f]*       { addxi r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 }
635     1388:       [0-9a-f]*       { addxi r15, r16, 5 ; shl r5, r6, r7 ; st r25, r26 }
636     1390:       [0-9a-f]*       { addxi r15, r16, 5 ; info 19 ; st1 r25, r26 }
637     1398:       [0-9a-f]*       { tblidxb3 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 }
638     13a0:       [0-9a-f]*       { addxi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 }
639     13a8:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st4 r25, r26 }
640     13b0:       [0-9a-f]*       { addxi r15, r16, 5 ; shrui r5, r6, 5 ; st4 r25, r26 }
641     13b8:       [0-9a-f]*       { addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3 r25 }
642     13c0:       [0-9a-f]*       { tblidxb1 r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
643     13c8:       [0-9a-f]*       { tblidxb3 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 }
644     13d0:       [0-9a-f]*       { v1sadu r5, r6, r7 ; addxi r15, r16, 5 }
645     13d8:       [0-9a-f]*       { v2sadau r5, r6, r7 ; addxi r15, r16, 5 }
646     13e0:       [0-9a-f]*       { addxi r15, r16, 5 ; xor r5, r6, r7 ; st4 r25, r26 }
647     13e8:       [0-9a-f]*       { addxi r5, r6, 5 ; addi r15, r16, 5 }
648     13f0:       [0-9a-f]*       { addxi r5, r6, 5 ; addxli r15, r16, 4660 }
649     13f8:       [0-9a-f]*       { addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 }
650     1400:       [0-9a-f]*       { addxi r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 }
651     1408:       [0-9a-f]*       { addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
652     1410:       [0-9a-f]*       { addxi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
653     1418:       [0-9a-f]*       { addxi r5, r6, 5 ; exch4 r15, r16, r17 }
654     1420:       [0-9a-f]*       { addxi r5, r6, 5 ; ill ; prefetch r25 }
655     1428:       [0-9a-f]*       { addxi r5, r6, 5 ; jalr r15 ; prefetch r25 }
656     1430:       [0-9a-f]*       { addxi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 }
657     1438:       [0-9a-f]*       { addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld r25, r26 }
658     1440:       [0-9a-f]*       { addxi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 }
659     1448:       [0-9a-f]*       { addxi r5, r6, 5 ; shrui r15, r16, 5 ; ld1s r25, r26 }
660     1450:       [0-9a-f]*       { addxi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
661     1458:       [0-9a-f]*       { addxi r5, r6, 5 ; movei r15, 5 ; ld2s r25, r26 }
662     1460:       [0-9a-f]*       { addxi r5, r6, 5 ; ill ; ld2u r25, r26 }
663     1468:       [0-9a-f]*       { addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
664     1470:       [0-9a-f]*       { addxi r5, r6, 5 ; ld4s r25, r26 }
665     1478:       [0-9a-f]*       { addxi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
666     1480:       [0-9a-f]*       { addxi r5, r6, 5 ; lnk r15 ; prefetch_l3 r25 }
667     1488:       [0-9a-f]*       { addxi r5, r6, 5 ; move r15, r16 ; prefetch_l3 r25 }
668     1490:       [0-9a-f]*       { addxi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 }
669     1498:       [0-9a-f]*       { addxi r5, r6, 5 ; nor r15, r16, r17 ; st r25, r26 }
670     14a0:       [0-9a-f]*       { addxi r5, r6, 5 ; prefetch r25 }
671     14a8:       [0-9a-f]*       { addxi r5, r6, 5 ; add r15, r16, r17 ; prefetch r25 }
672     14b0:       [0-9a-f]*       { addxi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch r25 }
673     14b8:       [0-9a-f]*       { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
674     14c0:       [0-9a-f]*       { addxi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 }
675     14c8:       [0-9a-f]*       { addxi r5, r6, 5 ; info 19 ; prefetch_l2_fault r25 }
676     14d0:       [0-9a-f]*       { addxi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
677     14d8:       [0-9a-f]*       { addxi r5, r6, 5 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
678     14e0:       [0-9a-f]*       { addxi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
679     14e8:       [0-9a-f]*       { addxi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
680     14f0:       [0-9a-f]*       { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st r25, r26 }
681     14f8:       [0-9a-f]*       { addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 }
682     1500:       [0-9a-f]*       { addxi r5, r6, 5 ; shl3add r15, r16, r17 }
683     1508:       [0-9a-f]*       { addxi r5, r6, 5 ; shlxi r15, r16, 5 }
684     1510:       [0-9a-f]*       { addxi r5, r6, 5 ; shru r15, r16, r17 ; ld1s r25, r26 }
685     1518:       [0-9a-f]*       { addxi r5, r6, 5 ; add r15, r16, r17 ; st r25, r26 }
686     1520:       [0-9a-f]*       { addxi r5, r6, 5 ; shrsi r15, r16, 5 ; st r25, r26 }
687     1528:       [0-9a-f]*       { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st1 r25, r26 }
688     1530:       [0-9a-f]*       { addxi r5, r6, 5 ; move r15, r16 ; st2 r25, r26 }
689     1538:       [0-9a-f]*       { addxi r5, r6, 5 ; st4 r25, r26 }
690     1540:       [0-9a-f]*       { addxi r5, r6, 5 ; stnt4 r15, r16 }
691     1548:       [0-9a-f]*       { addxi r5, r6, 5 ; subx r15, r16, r17 }
692     1550:       [0-9a-f]*       { addxi r5, r6, 5 ; v2cmpltui r15, r16, 5 }
693     1558:       [0-9a-f]*       { addxi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 }
694     1560:       [0-9a-f]*       { cmulaf r5, r6, r7 ; addxli r15, r16, 4660 }
695     1568:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; addxli r15, r16, 4660 }
696     1570:       [0-9a-f]*       { addxli r15, r16, 4660 ; shru r5, r6, r7 }
697     1578:       [0-9a-f]*       { addxli r15, r16, 4660 ; v1minu r5, r6, r7 }
698     1580:       [0-9a-f]*       { v2mulfsc r5, r6, r7 ; addxli r15, r16, 4660 }
699     1588:       [0-9a-f]*       { addxli r5, r6, 4660 ; and r15, r16, r17 }
700     1590:       [0-9a-f]*       { addxli r5, r6, 4660 ; jrp r15 }
701     1598:       [0-9a-f]*       { addxli r5, r6, 4660 ; nop }
702     15a0:       [0-9a-f]*       { addxli r5, r6, 4660 ; st2 r15, r16 }
703     15a8:       [0-9a-f]*       { addxli r5, r6, 4660 ; v1shru r15, r16, r17 }
704     15b0:       [0-9a-f]*       { addxli r5, r6, 4660 ; v4packsc r15, r16, r17 }
705     15b8:       [0-9a-f]*       { cmulhr r5, r6, r7 ; addxsc r15, r16, r17 }
706     15c0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; addxsc r15, r16, r17 }
707     15c8:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; addxsc r15, r16, r17 }
708     15d0:       [0-9a-f]*       { v1mulu r5, r6, r7 ; addxsc r15, r16, r17 }
709     15d8:       [0-9a-f]*       { addxsc r15, r16, r17 ; v2packh r5, r6, r7 }
710     15e0:       [0-9a-f]*       { addxsc r5, r6, r7 ; cmpexch r15, r16, r17 }
711     15e8:       [0-9a-f]*       { addxsc r5, r6, r7 ; ld1u r15, r16 }
712     15f0:       [0-9a-f]*       { addxsc r5, r6, r7 ; prefetch r15 }
713     15f8:       [0-9a-f]*       { addxsc r5, r6, r7 ; st_add r15, r16, 5 }
714     1600:       [0-9a-f]*       { addxsc r5, r6, r7 ; v2add r15, r16, r17 }
715     1608:       [0-9a-f]*       { addxsc r5, r6, r7 ; v4shru r15, r16, r17 }
716     1610:       [0-9a-f]*       { and r15, r16, r17 ; addi r5, r6, 5 ; st1 r25, r26 }
717     1618:       [0-9a-f]*       { and r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 }
718     1620:       [0-9a-f]*       { and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
719     1628:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
720     1630:       [0-9a-f]*       { and r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
721     1638:       [0-9a-f]*       { and r15, r16, r17 ; cmpleu r5, r6, r7 ; ld r25, r26 }
722     1640:       [0-9a-f]*       { and r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 }
723     1648:       [0-9a-f]*       { and r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
724     1650:       [0-9a-f]*       { ctz r5, r6 ; and r15, r16, r17 ; st1 r25, r26 }
725     1658:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
726     1660:       [0-9a-f]*       { and r15, r16, r17 ; add r5, r6, r7 ; ld r25, r26 }
727     1668:       [0-9a-f]*       { revbytes r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
728     1670:       [0-9a-f]*       { ctz r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
729     1678:       [0-9a-f]*       { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
730     1680:       [0-9a-f]*       { and r15, r16, r17 ; mz r5, r6, r7 ; ld1u r25, r26 }
731     1688:       [0-9a-f]*       { and r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 }
732     1690:       [0-9a-f]*       { and r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 }
733     1698:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
734     16a0:       [0-9a-f]*       { and r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 }
735     16a8:       [0-9a-f]*       { and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
736     16b0:       [0-9a-f]*       { and r15, r16, r17 ; move r5, r6 ; ld4u r25, r26 }
737     16b8:       [0-9a-f]*       { and r15, r16, r17 ; ld4u r25, r26 }
738     16c0:       [0-9a-f]*       { and r15, r16, r17 ; movei r5, 5 ; ld r25, r26 }
739     16c8:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; and r15, r16, r17 }
740     16d0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
741     16d8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 }
742     16e0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
743     16e8:       [0-9a-f]*       { mulax r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
744     16f0:       [0-9a-f]*       { and r15, r16, r17 ; mz r5, r6, r7 }
745     16f8:       [0-9a-f]*       { and r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
746     1700:       [0-9a-f]*       { and r15, r16, r17 ; addx r5, r6, r7 ; prefetch r25 }
747     1708:       [0-9a-f]*       { and r15, r16, r17 ; rotli r5, r6, 5 ; prefetch r25 }
748     1710:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
749     1718:       [0-9a-f]*       { tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
750     1720:       [0-9a-f]*       { and r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
751     1728:       [0-9a-f]*       { and r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2 r25 }
752     1730:       [0-9a-f]*       { and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 }
753     1738:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
754     1740:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
755     1748:       [0-9a-f]*       { and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3 r25 }
756     1750:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 }
757     1758:       [0-9a-f]*       { revbits r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
758     1760:       [0-9a-f]*       { and r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
759     1768:       [0-9a-f]*       { and r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 }
760     1770:       [0-9a-f]*       { and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4u r25, r26 }
761     1778:       [0-9a-f]*       { and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
762     1780:       [0-9a-f]*       { and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 }
763     1788:       [0-9a-f]*       { and r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
764     1790:       [0-9a-f]*       { and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3 r25 }
765     1798:       [0-9a-f]*       { and r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 }
766     17a0:       [0-9a-f]*       { and r15, r16, r17 ; shrs r5, r6, r7 ; st r25, r26 }
767     17a8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
768     17b0:       [0-9a-f]*       { and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
769     17b8:       [0-9a-f]*       { and r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
770     17c0:       [0-9a-f]*       { and r15, r16, r17 ; move r5, r6 ; st4 r25, r26 }
771     17c8:       [0-9a-f]*       { and r15, r16, r17 ; st4 r25, r26 }
772     17d0:       [0-9a-f]*       { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
773     17d8:       [0-9a-f]*       { tblidxb2 r5, r6 ; and r15, r16, r17 ; ld1u r25, r26 }
774     17e0:       [0-9a-f]*       { v1avgu r5, r6, r7 ; and r15, r16, r17 }
775     17e8:       [0-9a-f]*       { and r15, r16, r17 ; v1subuc r5, r6, r7 }
776     17f0:       [0-9a-f]*       { and r15, r16, r17 ; v2shru r5, r6, r7 }
777     17f8:       [0-9a-f]*       { and r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
778     1800:       [0-9a-f]*       { and r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
779     1808:       [0-9a-f]*       { and r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
780     1810:       [0-9a-f]*       { and r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
781     1818:       [0-9a-f]*       { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
782     1820:       [0-9a-f]*       { and r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
783     1828:       [0-9a-f]*       { and r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
784     1830:       [0-9a-f]*       { and r5, r6, r7 ; fetchor4 r15, r16, r17 }
785     1838:       [0-9a-f]*       { and r5, r6, r7 ; ill ; st2 r25, r26 }
786     1840:       [0-9a-f]*       { and r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
787     1848:       [0-9a-f]*       { and r5, r6, r7 ; jr r15 ; st4 r25, r26 }
788     1850:       [0-9a-f]*       { and r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
789     1858:       [0-9a-f]*       { and r5, r6, r7 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
790     1860:       [0-9a-f]*       { and r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 }
791     1868:       [0-9a-f]*       { and r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 }
792     1870:       [0-9a-f]*       { and r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
793     1878:       [0-9a-f]*       { and r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
794     1880:       [0-9a-f]*       { and r5, r6, r7 ; ld4s r25, r26 }
795     1888:       [0-9a-f]*       { and r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 }
796     1890:       [0-9a-f]*       { and r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
797     1898:       [0-9a-f]*       { and r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
798     18a0:       [0-9a-f]*       { and r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
799     18a8:       [0-9a-f]*       { and r5, r6, r7 ; nop ; ld1s r25, r26 }
800     18b0:       [0-9a-f]*       { and r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
801     18b8:       [0-9a-f]*       { and r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
802     18c0:       [0-9a-f]*       { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
803     18c8:       [0-9a-f]*       { and r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
804     18d0:       [0-9a-f]*       { and r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
805     18d8:       [0-9a-f]*       { and r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
806     18e0:       [0-9a-f]*       { and r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 }
807     18e8:       [0-9a-f]*       { and r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
808     18f0:       [0-9a-f]*       { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
809     18f8:       [0-9a-f]*       { and r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 }
810     1900:       [0-9a-f]*       { and r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
811     1908:       [0-9a-f]*       { and r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
812     1910:       [0-9a-f]*       { and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
813     1918:       [0-9a-f]*       { and r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
814     1920:       [0-9a-f]*       { and r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
815     1928:       [0-9a-f]*       { and r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
816     1930:       [0-9a-f]*       { and r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
817     1938:       [0-9a-f]*       { and r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
818     1940:       [0-9a-f]*       { and r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
819     1948:       [0-9a-f]*       { and r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
820     1950:       [0-9a-f]*       { and r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 }
821     1958:       [0-9a-f]*       { and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
822     1960:       [0-9a-f]*       { and r5, r6, r7 ; v1cmpleu r15, r16, r17 }
823     1968:       [0-9a-f]*       { and r5, r6, r7 ; v2mnz r15, r16, r17 }
824     1970:       [0-9a-f]*       { and r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
825     1978:       [0-9a-f]*       { andi r15, r16, 5 ; addi r5, r6, 5 ; st1 r25, r26 }
826     1980:       [0-9a-f]*       { andi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 }
827     1988:       [0-9a-f]*       { andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 }
828     1990:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
829     1998:       [0-9a-f]*       { andi r15, r16, 5 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
830     19a0:       [0-9a-f]*       { andi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 }
831     19a8:       [0-9a-f]*       { andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 }
832     19b0:       [0-9a-f]*       { andi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
833     19b8:       [0-9a-f]*       { ctz r5, r6 ; andi r15, r16, 5 ; st1 r25, r26 }
834     19c0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 }
835     19c8:       [0-9a-f]*       { andi r15, r16, 5 ; add r5, r6, r7 ; ld r25, r26 }
836     19d0:       [0-9a-f]*       { revbytes r5, r6 ; andi r15, r16, 5 ; ld r25, r26 }
837     19d8:       [0-9a-f]*       { ctz r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 }
838     19e0:       [0-9a-f]*       { tblidxb0 r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 }
839     19e8:       [0-9a-f]*       { andi r15, r16, 5 ; mz r5, r6, r7 ; ld1u r25, r26 }
840     19f0:       [0-9a-f]*       { andi r15, r16, 5 ; cmples r5, r6, r7 ; ld2s r25, r26 }
841     19f8:       [0-9a-f]*       { andi r15, r16, 5 ; shrs r5, r6, r7 ; ld2s r25, r26 }
842     1a00:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld2u r25, r26 }
843     1a08:       [0-9a-f]*       { andi r15, r16, 5 ; andi r5, r6, 5 ; ld4s r25, r26 }
844     1a10:       [0-9a-f]*       { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
845     1a18:       [0-9a-f]*       { andi r15, r16, 5 ; move r5, r6 ; ld4u r25, r26 }
846     1a20:       [0-9a-f]*       { andi r15, r16, 5 ; ld4u r25, r26 }
847     1a28:       [0-9a-f]*       { andi r15, r16, 5 ; movei r5, 5 ; ld r25, r26 }
848     1a30:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; andi r15, r16, 5 }
849     1a38:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
850     1a40:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 }
851     1a48:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
852     1a50:       [0-9a-f]*       { mulax r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 }
853     1a58:       [0-9a-f]*       { andi r15, r16, 5 ; mz r5, r6, r7 }
854     1a60:       [0-9a-f]*       { andi r15, r16, 5 ; or r5, r6, r7 ; ld1s r25, r26 }
855     1a68:       [0-9a-f]*       { andi r15, r16, 5 ; addx r5, r6, r7 ; prefetch r25 }
856     1a70:       [0-9a-f]*       { andi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch r25 }
857     1a78:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
858     1a80:       [0-9a-f]*       { tblidxb2 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
859     1a88:       [0-9a-f]*       { andi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
860     1a90:       [0-9a-f]*       { andi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l2 r25 }
861     1a98:       [0-9a-f]*       { andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
862     1aa0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
863     1aa8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3 r25 }
864     1ab0:       [0-9a-f]*       { andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l3 r25 }
865     1ab8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
866     1ac0:       [0-9a-f]*       { revbits r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 }
867     1ac8:       [0-9a-f]*       { andi r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 }
868     1ad0:       [0-9a-f]*       { andi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 }
869     1ad8:       [0-9a-f]*       { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4u r25, r26 }
870     1ae0:       [0-9a-f]*       { andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch r25 }
871     1ae8:       [0-9a-f]*       { andi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 }
872     1af0:       [0-9a-f]*       { andi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
873     1af8:       [0-9a-f]*       { andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l3 r25 }
874     1b00:       [0-9a-f]*       { andi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 }
875     1b08:       [0-9a-f]*       { andi r15, r16, 5 ; shrs r5, r6, r7 ; st r25, r26 }
876     1b10:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
877     1b18:       [0-9a-f]*       { andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 }
878     1b20:       [0-9a-f]*       { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
879     1b28:       [0-9a-f]*       { andi r15, r16, 5 ; move r5, r6 ; st4 r25, r26 }
880     1b30:       [0-9a-f]*       { andi r15, r16, 5 ; st4 r25, r26 }
881     1b38:       [0-9a-f]*       { tblidxb0 r5, r6 ; andi r15, r16, 5 ; ld r25, r26 }
882     1b40:       [0-9a-f]*       { tblidxb2 r5, r6 ; andi r15, r16, 5 ; ld1u r25, r26 }
883     1b48:       [0-9a-f]*       { v1avgu r5, r6, r7 ; andi r15, r16, 5 }
884     1b50:       [0-9a-f]*       { andi r15, r16, 5 ; v1subuc r5, r6, r7 }
885     1b58:       [0-9a-f]*       { andi r15, r16, 5 ; v2shru r5, r6, r7 }
886     1b60:       [0-9a-f]*       { andi r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 }
887     1b68:       [0-9a-f]*       { andi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 }
888     1b70:       [0-9a-f]*       { andi r5, r6, 5 ; and r15, r16, r17 ; ld4u r25, r26 }
889     1b78:       [0-9a-f]*       { andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 }
890     1b80:       [0-9a-f]*       { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 }
891     1b88:       [0-9a-f]*       { andi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
892     1b90:       [0-9a-f]*       { andi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
893     1b98:       [0-9a-f]*       { andi r5, r6, 5 ; fetchor4 r15, r16, r17 }
894     1ba0:       [0-9a-f]*       { andi r5, r6, 5 ; ill ; st2 r25, r26 }
895     1ba8:       [0-9a-f]*       { andi r5, r6, 5 ; jalr r15 ; st1 r25, r26 }
896     1bb0:       [0-9a-f]*       { andi r5, r6, 5 ; jr r15 ; st4 r25, r26 }
897     1bb8:       [0-9a-f]*       { andi r5, r6, 5 ; jalrp r15 ; ld r25, r26 }
898     1bc0:       [0-9a-f]*       { andi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
899     1bc8:       [0-9a-f]*       { andi r5, r6, 5 ; addi r15, r16, 5 ; ld1u r25, r26 }
900     1bd0:       [0-9a-f]*       { andi r5, r6, 5 ; shru r15, r16, r17 ; ld1u r25, r26 }
901     1bd8:       [0-9a-f]*       { andi r5, r6, 5 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
902     1be0:       [0-9a-f]*       { andi r5, r6, 5 ; move r15, r16 ; ld2u r25, r26 }
903     1be8:       [0-9a-f]*       { andi r5, r6, 5 ; ld4s r25, r26 }
904     1bf0:       [0-9a-f]*       { andi r5, r6, 5 ; andi r15, r16, 5 ; ld4u r25, r26 }
905     1bf8:       [0-9a-f]*       { andi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 }
906     1c00:       [0-9a-f]*       { andi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
907     1c08:       [0-9a-f]*       { andi r5, r6, 5 ; movei r15, 5 ; ld1s r25, r26 }
908     1c10:       [0-9a-f]*       { andi r5, r6, 5 ; nop ; ld1s r25, r26 }
909     1c18:       [0-9a-f]*       { andi r5, r6, 5 ; or r15, r16, r17 ; ld2s r25, r26 }
910     1c20:       [0-9a-f]*       { andi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 }
911     1c28:       [0-9a-f]*       { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 }
912     1c30:       [0-9a-f]*       { andi r5, r6, 5 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
913     1c38:       [0-9a-f]*       { andi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
914     1c40:       [0-9a-f]*       { andi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
915     1c48:       [0-9a-f]*       { andi r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 }
916     1c50:       [0-9a-f]*       { andi r5, r6, 5 ; info 19 ; prefetch_l3 r25 }
917     1c58:       [0-9a-f]*       { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
918     1c60:       [0-9a-f]*       { andi r5, r6, 5 ; rotl r15, r16, r17 ; ld r25, r26 }
919     1c68:       [0-9a-f]*       { andi r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 }
920     1c70:       [0-9a-f]*       { andi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
921     1c78:       [0-9a-f]*       { andi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
922     1c80:       [0-9a-f]*       { andi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch r25 }
923     1c88:       [0-9a-f]*       { andi r5, r6, 5 ; shrs r15, r16, r17 ; prefetch r25 }
924     1c90:       [0-9a-f]*       { andi r5, r6, 5 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
925     1c98:       [0-9a-f]*       { andi r5, r6, 5 ; cmples r15, r16, r17 ; st r25, r26 }
926     1ca0:       [0-9a-f]*       { andi r5, r6, 5 ; add r15, r16, r17 ; st1 r25, r26 }
927     1ca8:       [0-9a-f]*       { andi r5, r6, 5 ; shrsi r15, r16, 5 ; st1 r25, r26 }
928     1cb0:       [0-9a-f]*       { andi r5, r6, 5 ; shl r15, r16, r17 ; st2 r25, r26 }
929     1cb8:       [0-9a-f]*       { andi r5, r6, 5 ; mnz r15, r16, r17 ; st4 r25, r26 }
930     1cc0:       [0-9a-f]*       { andi r5, r6, 5 ; sub r15, r16, r17 ; ld4s r25, r26 }
931     1cc8:       [0-9a-f]*       { andi r5, r6, 5 ; v1cmpleu r15, r16, r17 }
932     1cd0:       [0-9a-f]*       { andi r5, r6, 5 ; v2mnz r15, r16, r17 }
933     1cd8:       [0-9a-f]*       { andi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 }
934     1ce0:       [0-9a-f]*       { bfexts r5, r6, 5, 7 ; finv r15 }
935     1ce8:       [0-9a-f]*       { bfexts r5, r6, 5, 7 ; ldnt4s_add r15, r16, 5 }
936     1cf0:       [0-9a-f]*       { bfexts r5, r6, 5, 7 ; shl3addx r15, r16, r17 }
937     1cf8:       [0-9a-f]*       { bfexts r5, r6, 5, 7 ; v1cmpne r15, r16, r17 }
938     1d00:       [0-9a-f]*       { bfexts r5, r6, 5, 7 ; v2shl r15, r16, r17 }
939     1d08:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; cmpltu r15, r16, r17 }
940     1d10:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; ld4s r15, r16 }
941     1d18:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; prefetch_add_l3_fault r15, 5 }
942     1d20:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; stnt4 r15, r16 }
943     1d28:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; v2cmpleu r15, r16, r17 }
944     1d30:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; add r15, r16, r17 }
945     1d38:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; info 19 }
946     1d40:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
947     1d48:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; shru r15, r16, r17 }
948     1d50:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; v1minui r15, r16, 5 }
949     1d58:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; v2shrui r15, r16, 5 }
950     1d60:       [0-9a-f]*       { clz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 }
951     1d68:       [0-9a-f]*       { clz r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 }
952     1d70:       [0-9a-f]*       { clz r5, r6 ; andi r15, r16, 5 ; ld2u r25, r26 }
953     1d78:       [0-9a-f]*       { clz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 }
954     1d80:       [0-9a-f]*       { clz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
955     1d88:       [0-9a-f]*       { clz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 }
956     1d90:       [0-9a-f]*       { clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
957     1d98:       [0-9a-f]*       { clz r5, r6 ; prefetch_l3_fault r25 }
958     1da0:       [0-9a-f]*       { clz r5, r6 ; info 19 ; st r25, r26 }
959     1da8:       [0-9a-f]*       { clz r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 }
960     1db0:       [0-9a-f]*       { clz r5, r6 ; jrp r15 ; st1 r25, r26 }
961     1db8:       [0-9a-f]*       { clz r5, r6 ; shl2addx r15, r16, r17 ; ld r25, r26 }
962     1dc0:       [0-9a-f]*       { clz r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 }
963     1dc8:       [0-9a-f]*       { clz r5, r6 ; jalrp r15 ; ld1u r25, r26 }
964     1dd0:       [0-9a-f]*       { clz r5, r6 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
965     1dd8:       [0-9a-f]*       { clz r5, r6 ; add r15, r16, r17 ; ld2u r25, r26 }
966     1de0:       [0-9a-f]*       { clz r5, r6 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
967     1de8:       [0-9a-f]*       { clz r5, r6 ; shl r15, r16, r17 ; ld4s r25, r26 }
968     1df0:       [0-9a-f]*       { clz r5, r6 ; mnz r15, r16, r17 ; ld4u r25, r26 }
969     1df8:       [0-9a-f]*       { clz r5, r6 ; ldnt4u r15, r16 }
970     1e00:       [0-9a-f]*       { clz r5, r6 ; mnz r15, r16, r17 ; st2 r25, r26 }
971     1e08:       [0-9a-f]*       { clz r5, r6 ; movei r15, 5 }
972     1e10:       [0-9a-f]*       { clz r5, r6 ; nop }
973     1e18:       [0-9a-f]*       { clz r5, r6 ; prefetch r15 }
974     1e20:       [0-9a-f]*       { clz r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
975     1e28:       [0-9a-f]*       { clz r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
976     1e30:       [0-9a-f]*       { clz r5, r6 ; jalr r15 ; prefetch_l1_fault r25 }
977     1e38:       [0-9a-f]*       { clz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
978     1e40:       [0-9a-f]*       { clz r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
979     1e48:       [0-9a-f]*       { clz r5, r6 ; shru r15, r16, r17 ; prefetch_l2_fault r25 }
980     1e50:       [0-9a-f]*       { clz r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 }
981     1e58:       [0-9a-f]*       { clz r5, r6 ; mz r15, r16, r17 ; prefetch_l3_fault r25 }
982     1e60:       [0-9a-f]*       { clz r5, r6 ; rotl r15, r16, r17 ; st4 r25, r26 }
983     1e68:       [0-9a-f]*       { clz r5, r6 ; shl16insli r15, r16, 4660 }
984     1e70:       [0-9a-f]*       { clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
985     1e78:       [0-9a-f]*       { clz r5, r6 ; shl3add r15, r16, r17 ; ld2s r25, r26 }
986     1e80:       [0-9a-f]*       { clz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 }
987     1e88:       [0-9a-f]*       { clz r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
988     1e90:       [0-9a-f]*       { clz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
989     1e98:       [0-9a-f]*       { clz r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
990     1ea0:       [0-9a-f]*       { clz r5, r6 ; jalr r15 ; st1 r25, r26 }
991     1ea8:       [0-9a-f]*       { clz r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 }
992     1eb0:       [0-9a-f]*       { clz r5, r6 ; st4 r15, r16 }
993     1eb8:       [0-9a-f]*       { clz r5, r6 ; shrs r15, r16, r17 ; st4 r25, r26 }
994     1ec0:       [0-9a-f]*       { clz r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 }
995     1ec8:       [0-9a-f]*       { clz r5, r6 ; v1shrsi r15, r16, 5 }
996     1ed0:       [0-9a-f]*       { clz r5, r6 ; v4int_l r15, r16, r17 }
997     1ed8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
998     1ee0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
999     1ee8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
1000     1ef0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
1001     1ef8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
1002     1f00:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 }
1003     1f08:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 }
1004     1f10:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; ld1u r25, r26 }
1005     1f18:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; info 19 ; ld2s r25, r26 }
1006     1f20:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 }
1007     1f28:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
1008     1f30:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
1009     1f38:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; info 19 ; ld1s r25, r26 }
1010     1f40:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
1011     1f48:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; ld1u_add r15, r16, 5 }
1012     1f50:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 }
1013     1f58:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 }
1014     1f60:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
1015     1f68:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 }
1016     1f70:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; ldnt r15, r16 }
1017     1f78:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
1018     1f80:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
1019     1f88:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; nop ; prefetch r25 }
1020     1f90:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
1021     1f98:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
1022     1fa0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; prefetch r25 }
1023     1fa8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
1024     1fb0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 }
1025     1fb8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 }
1026     1fc0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
1027     1fc8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3 r25 }
1028     1fd0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 }
1029     1fd8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 }
1030     1fe0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
1031     1fe8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
1032     1ff0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
1033     1ff8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
1034     2000:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
1035     2008:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
1036     2010:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; st r25, r26 }
1037     2018:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 }
1038     2020:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; st1 r25, r26 }
1039     2028:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; st2 r25, r26 }
1040     2030:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 }
1041     2038:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2_fault r25 }
1042     2040:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; v1int_h r15, r16, r17 }
1043     2048:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; v2shli r15, r16, 5 }
1044     2050:       [0-9a-f]*       { cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
1045     2058:       [0-9a-f]*       { cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
1046     2060:       [0-9a-f]*       { cmovnez r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
1047     2068:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
1048     2070:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
1049     2078:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
1050     2080:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
1051     2088:       [0-9a-f]*       { cmovnez r5, r6, r7 ; fetchaddgez r15, r16, r17 }
1052     2090:       [0-9a-f]*       { cmovnez r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
1053     2098:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
1054     20a0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
1055     20a8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
1056     20b0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
1057     20b8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
1058     20c0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
1059     20c8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
1060     20d0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
1061     20d8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
1062     20e0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
1063     20e8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
1064     20f0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
1065     20f8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
1066     2100:       [0-9a-f]*       { cmovnez r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
1067     2108:       [0-9a-f]*       { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
1068     2110:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jalr r15 ; prefetch r25 }
1069     2118:       [0-9a-f]*       { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
1070     2120:       [0-9a-f]*       { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
1071     2128:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
1072     2130:       [0-9a-f]*       { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
1073     2138:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
1074     2140:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
1075     2148:       [0-9a-f]*       { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
1076     2150:       [0-9a-f]*       { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
1077     2158:       [0-9a-f]*       { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
1078     2160:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
1079     2168:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
1080     2170:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
1081     2178:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
1082     2180:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
1083     2188:       [0-9a-f]*       { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 }
1084     2190:       [0-9a-f]*       { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 }
1085     2198:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
1086     21a0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; nop ; st2 r25, r26 }
1087     21a8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
1088     21b0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
1089     21b8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; v1addi r15, r16, 5 }
1090     21c0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; v2int_l r15, r16, r17 }
1091     21c8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
1092     21d0:       [0-9a-f]*       { cmpeq r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 }
1093     21d8:       [0-9a-f]*       { cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 }
1094     21e0:       [0-9a-f]*       { cmpeq r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2_fault r25 }
1095     21e8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
1096     21f0:       [0-9a-f]*       { cmpeq r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
1097     21f8:       [0-9a-f]*       { cmpeq r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 }
1098     2200:       [0-9a-f]*       { cmpeq r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 }
1099     2208:       [0-9a-f]*       { cmpeq r15, r16, r17 ; cmpltu r5, r6, r7 }
1100     2210:       [0-9a-f]*       { ctz r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
1101     2218:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; cmpeq r15, r16, r17 }
1102     2220:       [0-9a-f]*       { cmpeq r15, r16, r17 ; info 19 ; st1 r25, r26 }
1103     2228:       [0-9a-f]*       { cmpeq r15, r16, r17 ; nop ; ld r25, r26 }
1104     2230:       [0-9a-f]*       { cmpeq r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
1105     2238:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shrsi r5, r6, 5 ; ld1s r25, r26 }
1106     2240:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
1107     2248:       [0-9a-f]*       { clz r5, r6 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
1108     2250:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shl2add r5, r6, r7 ; ld2s r25, r26 }
1109     2258:       [0-9a-f]*       { cmpeq r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 }
1110     2260:       [0-9a-f]*       { cmpeq r15, r16, r17 ; add r5, r6, r7 ; ld4s r25, r26 }
1111     2268:       [0-9a-f]*       { revbytes r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
1112     2270:       [0-9a-f]*       { ctz r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
1113     2278:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
1114     2280:       [0-9a-f]*       { cmpeq r15, r16, r17 ; move r5, r6 ; st r25, r26 }
1115     2288:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 }
1116     2290:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
1117     2298:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
1118     22a0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
1119     22a8:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
1120     22b0:       [0-9a-f]*       { cmpeq r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l3_fault r25 }
1121     22b8:       [0-9a-f]*       { cmpeq r15, r16, r17 ; nor r5, r6, r7 ; st1 r25, r26 }
1122     22c0:       [0-9a-f]*       { pcnt r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
1123     22c8:       [0-9a-f]*       { cmpeq r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 }
1124     22d0:       [0-9a-f]*       { cmpeq r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
1125     22d8:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
1126     22e0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
1127     22e8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
1128     22f0:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2 r25 }
1129     22f8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
1130     2300:       [0-9a-f]*       { cmpeq r15, r16, r17 ; addx r5, r6, r7 ; prefetch_l3 r25 }
1131     2308:       [0-9a-f]*       { cmpeq r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
1132     2310:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
1133     2318:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
1134     2320:       [0-9a-f]*       { revbytes r5, r6 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
1135     2328:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shl r5, r6, r7 ; ld r25, r26 }
1136     2330:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
1137     2338:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shl2addx r5, r6, r7 ; ld2s r25, r26 }
1138     2340:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shl3addx r5, r6, r7 ; ld4s r25, r26 }
1139     2348:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shrs r5, r6, r7 ; ld4s r25, r26 }
1140     2350:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shru r5, r6, r7 ; prefetch r25 }
1141     2358:       [0-9a-f]*       { clz r5, r6 ; cmpeq r15, r16, r17 ; st r25, r26 }
1142     2360:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shl2add r5, r6, r7 ; st r25, r26 }
1143     2368:       [0-9a-f]*       { cmpeq r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
1144     2370:       [0-9a-f]*       { cmpeq r15, r16, r17 ; add r5, r6, r7 ; st2 r25, r26 }
1145     2378:       [0-9a-f]*       { revbytes r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
1146     2380:       [0-9a-f]*       { ctz r5, r6 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
1147     2388:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
1148     2390:       [0-9a-f]*       { cmpeq r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 }
1149     2398:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
1150     23a0:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 }
1151     23a8:       [0-9a-f]*       { cmpeq r15, r16, r17 ; v1shrs r5, r6, r7 }
1152     23b0:       [0-9a-f]*       { cmpeq r15, r16, r17 ; v2shl r5, r6, r7 }
1153     23b8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
1154     23c0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
1155     23c8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
1156     23d0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
1157     23d8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
1158     23e0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
1159     23e8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
1160     23f0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; fetchaddgez r15, r16, r17 }
1161     23f8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
1162     2400:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
1163     2408:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
1164     2410:       [0-9a-f]*       { cmpeq r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
1165     2418:       [0-9a-f]*       { cmpeq r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
1166     2420:       [0-9a-f]*       { cmpeq r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
1167     2428:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
1168     2430:       [0-9a-f]*       { cmpeq r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
1169     2438:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
1170     2440:       [0-9a-f]*       { cmpeq r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
1171     2448:       [0-9a-f]*       { cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
1172     2450:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
1173     2458:       [0-9a-f]*       { cmpeq r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
1174     2460:       [0-9a-f]*       { cmpeq r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
1175     2468:       [0-9a-f]*       { cmpeq r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
1176     2470:       [0-9a-f]*       { cmpeq r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
1177     2478:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jalr r15 ; prefetch r25 }
1178     2480:       [0-9a-f]*       { cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
1179     2488:       [0-9a-f]*       { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
1180     2490:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
1181     2498:       [0-9a-f]*       { cmpeq r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
1182     24a0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
1183     24a8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
1184     24b0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
1185     24b8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
1186     24c0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
1187     24c8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
1188     24d0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
1189     24d8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
1190     24e0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
1191     24e8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
1192     24f0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 }
1193     24f8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 }
1194     2500:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
1195     2508:       [0-9a-f]*       { cmpeq r5, r6, r7 ; nop ; st2 r25, r26 }
1196     2510:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
1197     2518:       [0-9a-f]*       { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
1198     2520:       [0-9a-f]*       { cmpeq r5, r6, r7 ; v1addi r15, r16, 5 }
1199     2528:       [0-9a-f]*       { cmpeq r5, r6, r7 ; v2int_l r15, r16, r17 }
1200     2530:       [0-9a-f]*       { cmpeq r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
1201     2538:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 }
1202     2540:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 }
1203     2548:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2_fault r25 }
1204     2550:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
1205     2558:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
1206     2560:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 }
1207     2568:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 ; st2 r25, r26 }
1208     2570:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; cmpltu r5, r6, r7 }
1209     2578:       [0-9a-f]*       { ctz r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
1210     2580:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; cmpeqi r15, r16, 5 }
1211     2588:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; info 19 ; st1 r25, r26 }
1212     2590:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; nop ; ld r25, r26 }
1213     2598:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
1214     25a0:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shrsi r5, r6, 5 ; ld1s r25, r26 }
1215     25a8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
1216     25b0:       [0-9a-f]*       { clz r5, r6 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
1217     25b8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 ; ld2s r25, r26 }
1218     25c0:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; movei r5, 5 ; ld2u r25, r26 }
1219     25c8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; add r5, r6, r7 ; ld4s r25, r26 }
1220     25d0:       [0-9a-f]*       { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; ld4s r25, r26 }
1221     25d8:       [0-9a-f]*       { ctz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 }
1222     25e0:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 }
1223     25e8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; move r5, r6 ; st r25, r26 }
1224     25f0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
1225     25f8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 }
1226     2600:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
1227     2608:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
1228     2610:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
1229     2618:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l3_fault r25 }
1230     2620:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; nor r5, r6, r7 ; st1 r25, r26 }
1231     2628:       [0-9a-f]*       { pcnt r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 }
1232     2630:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 }
1233     2638:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; cmpltsi r5, r6, 5 ; prefetch r25 }
1234     2640:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shrui r5, r6, 5 ; prefetch r25 }
1235     2648:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 }
1236     2650:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
1237     2658:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l2 r25 }
1238     2660:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
1239     2668:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; addx r5, r6, r7 ; prefetch_l3 r25 }
1240     2670:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
1241     2678:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
1242     2680:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
1243     2688:       [0-9a-f]*       { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
1244     2690:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl r5, r6, r7 ; ld r25, r26 }
1245     2698:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
1246     26a0:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld2s r25, r26 }
1247     26a8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld4s r25, r26 }
1248     26b0:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shrs r5, r6, r7 ; ld4s r25, r26 }
1249     26b8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shru r5, r6, r7 ; prefetch r25 }
1250     26c0:       [0-9a-f]*       { clz r5, r6 ; cmpeqi r15, r16, 5 ; st r25, r26 }
1251     26c8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 ; st r25, r26 }
1252     26d0:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; movei r5, 5 ; st1 r25, r26 }
1253     26d8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; add r5, r6, r7 ; st2 r25, r26 }
1254     26e0:       [0-9a-f]*       { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 }
1255     26e8:       [0-9a-f]*       { ctz r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
1256     26f0:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
1257     26f8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 }
1258     2700:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 }
1259     2708:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpeqi r15, r16, 5 }
1260     2710:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; v1shrs r5, r6, r7 }
1261     2718:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; v2shl r5, r6, r7 }
1262     2720:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; add r15, r16, r17 ; ld r25, r26 }
1263     2728:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 }
1264     2730:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 }
1265     2738:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
1266     2740:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 }
1267     2748:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
1268     2750:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch r25 }
1269     2758:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; fetchaddgez r15, r16, r17 }
1270     2760:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; ill ; prefetch_l2_fault r25 }
1271     2768:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jalr r15 ; prefetch_l2 r25 }
1272     2770:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jr r15 ; prefetch_l3 r25 }
1273     2778:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpne r15, r16, r17 ; ld r25, r26 }
1274     2780:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; andi r15, r16, 5 ; ld1s r25, r26 }
1275     2788:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; ld1s r25, r26 }
1276     2790:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
1277     2798:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 }
1278     27a0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jalrp r15 ; ld2u r25, r26 }
1279     27a8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
1280     27b0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; add r15, r16, r17 ; ld4u r25, r26 }
1281     27b8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
1282     27c0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; lnk r15 ; st1 r25, r26 }
1283     27c8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; move r15, r16 ; st1 r25, r26 }
1284     27d0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; mz r15, r16, r17 ; st1 r25, r26 }
1285     27d8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; st4 r25, r26 }
1286     27e0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jalr r15 ; prefetch r25 }
1287     27e8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch r25 }
1288     27f0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; prefetch r25 }
1289     27f8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
1290     2800:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 }
1291     2808:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jr r15 ; prefetch_l2_fault r25 }
1292     2810:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
1293     2818:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
1294     2820:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
1295     2828:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; rotli r15, r16, 5 ; st2 r25, r26 }
1296     2830:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shl1add r15, r16, r17 ; st4 r25, r26 }
1297     2838:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld r25, r26 }
1298     2840:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
1299     2848:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 }
1300     2850:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shru r15, r16, r17 ; ld2u r25, r26 }
1301     2858:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; st r25, r26 }
1302     2860:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; st r25, r26 }
1303     2868:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
1304     2870:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; nop ; st2 r25, r26 }
1305     2878:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jalr r15 ; st4 r25, r26 }
1306     2880:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; ld r25, r26 }
1307     2888:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; v1addi r15, r16, 5 }
1308     2890:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; v2int_l r15, r16, r17 }
1309     2898:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
1310     28a0:       [0-9a-f]*       { cmulh r5, r6, r7 ; cmpexch r15, r16, r17 }
1311     28a8:       [0-9a-f]*       { mul_ls_lu r5, r6, r7 ; cmpexch r15, r16, r17 }
1312     28b0:       [0-9a-f]*       { shruxi r5, r6, 5 ; cmpexch r15, r16, r17 }
1313     28b8:       [0-9a-f]*       { v1multu r5, r6, r7 ; cmpexch r15, r16, r17 }
1314     28c0:       [0-9a-f]*       { v2mz r5, r6, r7 ; cmpexch r15, r16, r17 }
1315     28c8:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; cmpexch4 r15, r16, r17 }
1316     28d0:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; cmpexch4 r15, r16, r17 }
1317     28d8:       [0-9a-f]*       { revbytes r5, r6 ; cmpexch4 r15, r16, r17 }
1318     28e0:       [0-9a-f]*       { v1cmpltui r5, r6, 5 ; cmpexch4 r15, r16, r17 }
1319     28e8:       [0-9a-f]*       { v2cmples r5, r6, r7 ; cmpexch4 r15, r16, r17 }
1320     28f0:       [0-9a-f]*       { v4packsc r5, r6, r7 ; cmpexch4 r15, r16, r17 }
1321     28f8:       [0-9a-f]*       { cmples r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
1322     2900:       [0-9a-f]*       { cmples r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
1323     2908:       [0-9a-f]*       { cmples r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
1324     2910:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
1325     2918:       [0-9a-f]*       { cmples r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
1326     2920:       [0-9a-f]*       { cmples r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
1327     2928:       [0-9a-f]*       { cmples r15, r16, r17 ; cmplts r5, r6, r7 }
1328     2930:       [0-9a-f]*       { cmples r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
1329     2938:       [0-9a-f]*       { ctz r5, r6 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
1330     2940:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; cmples r15, r16, r17 }
1331     2948:       [0-9a-f]*       { cmples r15, r16, r17 ; info 19 ; st4 r25, r26 }
1332     2950:       [0-9a-f]*       { cmples r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
1333     2958:       [0-9a-f]*       { cmples r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
1334     2960:       [0-9a-f]*       { cmples r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
1335     2968:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; ld1u r25, r26 }
1336     2970:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
1337     2978:       [0-9a-f]*       { cmples r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
1338     2980:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; ld2u r25, r26 }
1339     2988:       [0-9a-f]*       { cmples r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 }
1340     2990:       [0-9a-f]*       { cmples r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 }
1341     2998:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; ld4u r25, r26 }
1342     29a0:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmples r15, r16, r17 ; ld4u r25, r26 }
1343     29a8:       [0-9a-f]*       { cmples r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
1344     29b0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
1345     29b8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
1346     29c0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
1347     29c8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
1348     29d0:       [0-9a-f]*       { mulax r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
1349     29d8:       [0-9a-f]*       { cmples r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
1350     29e0:       [0-9a-f]*       { cmples r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
1351     29e8:       [0-9a-f]*       { pcnt r5, r6 ; cmples r15, r16, r17 }
1352     29f0:       [0-9a-f]*       { revbits r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
1353     29f8:       [0-9a-f]*       { cmples r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
1354     2a00:       [0-9a-f]*       { cmples r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
1355     2a08:       [0-9a-f]*       { mulx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
1356     2a10:       [0-9a-f]*       { cmples r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
1357     2a18:       [0-9a-f]*       { cmples r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 }
1358     2a20:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l2_fault r25 }
1359     2a28:       [0-9a-f]*       { cmples r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 }
1360     2a30:       [0-9a-f]*       { cmples r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
1361     2a38:       [0-9a-f]*       { cmples r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
1362     2a40:       [0-9a-f]*       { cmples r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
1363     2a48:       [0-9a-f]*       { cmples r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
1364     2a50:       [0-9a-f]*       { cmples r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
1365     2a58:       [0-9a-f]*       { cmples r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
1366     2a60:       [0-9a-f]*       { cmples r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
1367     2a68:       [0-9a-f]*       { cmples r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
1368     2a70:       [0-9a-f]*       { cmples r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
1369     2a78:       [0-9a-f]*       { cmples r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
1370     2a80:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
1371     2a88:       [0-9a-f]*       { cmples r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 }
1372     2a90:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
1373     2a98:       [0-9a-f]*       { cmples r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 }
1374     2aa0:       [0-9a-f]*       { cmples r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
1375     2aa8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; st4 r25, r26 }
1376     2ab0:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmples r15, r16, r17 ; st4 r25, r26 }
1377     2ab8:       [0-9a-f]*       { cmples r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
1378     2ac0:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmples r15, r16, r17 }
1379     2ac8:       [0-9a-f]*       { cmples r15, r16, r17 ; v1addi r5, r6, 5 }
1380     2ad0:       [0-9a-f]*       { cmples r15, r16, r17 ; v1shru r5, r6, r7 }
1381     2ad8:       [0-9a-f]*       { cmples r15, r16, r17 ; v2shlsc r5, r6, r7 }
1382     2ae0:       [0-9a-f]*       { cmples r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
1383     2ae8:       [0-9a-f]*       { cmples r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
1384     2af0:       [0-9a-f]*       { cmples r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
1385     2af8:       [0-9a-f]*       { cmples r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
1386     2b00:       [0-9a-f]*       { cmples r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
1387     2b08:       [0-9a-f]*       { cmples r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
1388     2b10:       [0-9a-f]*       { cmples r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
1389     2b18:       [0-9a-f]*       { cmples r5, r6, r7 ; fetchand r15, r16, r17 }
1390     2b20:       [0-9a-f]*       { cmples r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
1391     2b28:       [0-9a-f]*       { cmples r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
1392     2b30:       [0-9a-f]*       { cmples r5, r6, r7 ; jr r15 ; st r25, r26 }
1393     2b38:       [0-9a-f]*       { cmples r5, r6, r7 ; ill ; ld r25, r26 }
1394     2b40:       [0-9a-f]*       { cmples r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
1395     2b48:       [0-9a-f]*       { cmples r5, r6, r7 ; ld1s_add r15, r16, 5 }
1396     2b50:       [0-9a-f]*       { cmples r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
1397     2b58:       [0-9a-f]*       { cmples r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
1398     2b60:       [0-9a-f]*       { cmples r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
1399     2b68:       [0-9a-f]*       { cmples r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
1400     2b70:       [0-9a-f]*       { cmples r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
1401     2b78:       [0-9a-f]*       { cmples r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 }
1402     2b80:       [0-9a-f]*       { cmples r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
1403     2b88:       [0-9a-f]*       { cmples r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
1404     2b90:       [0-9a-f]*       { cmples r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
1405     2b98:       [0-9a-f]*       { cmples r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
1406     2ba0:       [0-9a-f]*       { cmples r5, r6, r7 ; jr r15 ; prefetch r25 }
1407     2ba8:       [0-9a-f]*       { cmples r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
1408     2bb0:       [0-9a-f]*       { cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
1409     2bb8:       [0-9a-f]*       { cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
1410     2bc0:       [0-9a-f]*       { cmples r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
1411     2bc8:       [0-9a-f]*       { cmples r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
1412     2bd0:       [0-9a-f]*       { cmples r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
1413     2bd8:       [0-9a-f]*       { cmples r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
1414     2be0:       [0-9a-f]*       { cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
1415     2be8:       [0-9a-f]*       { cmples r5, r6, r7 ; rotli r15, r16, 5 }
1416     2bf0:       [0-9a-f]*       { cmples r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
1417     2bf8:       [0-9a-f]*       { cmples r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
1418     2c00:       [0-9a-f]*       { cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
1419     2c08:       [0-9a-f]*       { cmples r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
1420     2c10:       [0-9a-f]*       { cmples r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
1421     2c18:       [0-9a-f]*       { cmples r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 }
1422     2c20:       [0-9a-f]*       { cmples r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
1423     2c28:       [0-9a-f]*       { cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
1424     2c30:       [0-9a-f]*       { cmples r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
1425     2c38:       [0-9a-f]*       { cmples r5, r6, r7 ; jr r15 ; st4 r25, r26 }
1426     2c40:       [0-9a-f]*       { cmples r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
1427     2c48:       [0-9a-f]*       { cmples r5, r6, r7 ; v1cmpeq r15, r16, r17 }
1428     2c50:       [0-9a-f]*       { cmples r5, r6, r7 ; v2maxsi r15, r16, 5 }
1429     2c58:       [0-9a-f]*       { cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
1430     2c60:       [0-9a-f]*       { cmpleu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
1431     2c68:       [0-9a-f]*       { cmpleu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
1432     2c70:       [0-9a-f]*       { cmpleu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
1433     2c78:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
1434     2c80:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
1435     2c88:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
1436     2c90:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmplts r5, r6, r7 }
1437     2c98:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
1438     2ca0:       [0-9a-f]*       { ctz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
1439     2ca8:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; cmpleu r15, r16, r17 }
1440     2cb0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; info 19 ; st4 r25, r26 }
1441     2cb8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
1442     2cc0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
1443     2cc8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
1444     2cd0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1u r25, r26 }
1445     2cd8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
1446     2ce0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
1447     2ce8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
1448     2cf0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 }
1449     2cf8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 }
1450     2d00:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
1451     2d08:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
1452     2d10:       [0-9a-f]*       { cmpleu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
1453     2d18:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
1454     2d20:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
1455     2d28:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
1456     2d30:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
1457     2d38:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
1458     2d40:       [0-9a-f]*       { cmpleu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
1459     2d48:       [0-9a-f]*       { cmpleu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
1460     2d50:       [0-9a-f]*       { pcnt r5, r6 ; cmpleu r15, r16, r17 }
1461     2d58:       [0-9a-f]*       { revbits r5, r6 ; cmpleu r15, r16, r17 ; prefetch r25 }
1462     2d60:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
1463     2d68:       [0-9a-f]*       { cmpleu r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
1464     2d70:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
1465     2d78:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
1466     2d80:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 }
1467     2d88:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 }
1468     2d90:       [0-9a-f]*       { cmpleu r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 }
1469     2d98:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
1470     2da0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
1471     2da8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
1472     2db0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
1473     2db8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
1474     2dc0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
1475     2dc8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
1476     2dd0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
1477     2dd8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
1478     2de0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
1479     2de8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
1480     2df0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 }
1481     2df8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
1482     2e00:       [0-9a-f]*       { cmpleu r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 }
1483     2e08:       [0-9a-f]*       { cmpleu r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
1484     2e10:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
1485     2e18:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
1486     2e20:       [0-9a-f]*       { cmpleu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
1487     2e28:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpleu r15, r16, r17 }
1488     2e30:       [0-9a-f]*       { cmpleu r15, r16, r17 ; v1addi r5, r6, 5 }
1489     2e38:       [0-9a-f]*       { cmpleu r15, r16, r17 ; v1shru r5, r6, r7 }
1490     2e40:       [0-9a-f]*       { cmpleu r15, r16, r17 ; v2shlsc r5, r6, r7 }
1491     2e48:       [0-9a-f]*       { cmpleu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
1492     2e50:       [0-9a-f]*       { cmpleu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
1493     2e58:       [0-9a-f]*       { cmpleu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
1494     2e60:       [0-9a-f]*       { cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
1495     2e68:       [0-9a-f]*       { cmpleu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
1496     2e70:       [0-9a-f]*       { cmpleu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
1497     2e78:       [0-9a-f]*       { cmpleu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
1498     2e80:       [0-9a-f]*       { cmpleu r5, r6, r7 ; fetchand r15, r16, r17 }
1499     2e88:       [0-9a-f]*       { cmpleu r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
1500     2e90:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
1501     2e98:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jr r15 ; st r25, r26 }
1502     2ea0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; ill ; ld r25, r26 }
1503     2ea8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
1504     2eb0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; ld1s_add r15, r16, 5 }
1505     2eb8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
1506     2ec0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
1507     2ec8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
1508     2ed0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
1509     2ed8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
1510     2ee0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 }
1511     2ee8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
1512     2ef0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
1513     2ef8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
1514     2f00:       [0-9a-f]*       { cmpleu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
1515     2f08:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jr r15 ; prefetch r25 }
1516     2f10:       [0-9a-f]*       { cmpleu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
1517     2f18:       [0-9a-f]*       { cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
1518     2f20:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
1519     2f28:       [0-9a-f]*       { cmpleu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
1520     2f30:       [0-9a-f]*       { cmpleu r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
1521     2f38:       [0-9a-f]*       { cmpleu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
1522     2f40:       [0-9a-f]*       { cmpleu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
1523     2f48:       [0-9a-f]*       { cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
1524     2f50:       [0-9a-f]*       { cmpleu r5, r6, r7 ; rotli r15, r16, 5 }
1525     2f58:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
1526     2f60:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
1527     2f68:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
1528     2f70:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
1529     2f78:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
1530     2f80:       [0-9a-f]*       { cmpleu r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 }
1531     2f88:       [0-9a-f]*       { cmpleu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
1532     2f90:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
1533     2f98:       [0-9a-f]*       { cmpleu r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
1534     2fa0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jr r15 ; st4 r25, r26 }
1535     2fa8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
1536     2fb0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; v1cmpeq r15, r16, r17 }
1537     2fb8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; v2maxsi r15, r16, 5 }
1538     2fc0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
1539     2fc8:       [0-9a-f]*       { cmplts r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
1540     2fd0:       [0-9a-f]*       { cmplts r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
1541     2fd8:       [0-9a-f]*       { cmplts r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
1542     2fe0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
1543     2fe8:       [0-9a-f]*       { cmplts r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
1544     2ff0:       [0-9a-f]*       { cmplts r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
1545     2ff8:       [0-9a-f]*       { cmplts r15, r16, r17 ; cmplts r5, r6, r7 }
1546     3000:       [0-9a-f]*       { cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
1547     3008:       [0-9a-f]*       { ctz r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
1548     3010:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; cmplts r15, r16, r17 }
1549     3018:       [0-9a-f]*       { cmplts r15, r16, r17 ; info 19 ; st4 r25, r26 }
1550     3020:       [0-9a-f]*       { cmplts r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
1551     3028:       [0-9a-f]*       { cmplts r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
1552     3030:       [0-9a-f]*       { cmplts r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
1553     3038:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
1554     3040:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld2s r25, r26 }
1555     3048:       [0-9a-f]*       { cmplts r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
1556     3050:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
1557     3058:       [0-9a-f]*       { cmplts r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 }
1558     3060:       [0-9a-f]*       { cmplts r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 }
1559     3068:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
1560     3070:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
1561     3078:       [0-9a-f]*       { cmplts r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
1562     3080:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 }
1563     3088:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
1564     3090:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
1565     3098:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
1566     30a0:       [0-9a-f]*       { mulax r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l3_fault r25 }
1567     30a8:       [0-9a-f]*       { cmplts r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
1568     30b0:       [0-9a-f]*       { cmplts r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
1569     30b8:       [0-9a-f]*       { pcnt r5, r6 ; cmplts r15, r16, r17 }
1570     30c0:       [0-9a-f]*       { revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 }
1571     30c8:       [0-9a-f]*       { cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
1572     30d0:       [0-9a-f]*       { cmplts r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
1573     30d8:       [0-9a-f]*       { mulx r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
1574     30e0:       [0-9a-f]*       { cmplts r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
1575     30e8:       [0-9a-f]*       { cmplts r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 }
1576     30f0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
1577     30f8:       [0-9a-f]*       { cmplts r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 }
1578     3100:       [0-9a-f]*       { cmplts r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
1579     3108:       [0-9a-f]*       { cmplts r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
1580     3110:       [0-9a-f]*       { cmplts r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
1581     3118:       [0-9a-f]*       { cmplts r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
1582     3120:       [0-9a-f]*       { cmplts r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
1583     3128:       [0-9a-f]*       { cmplts r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
1584     3130:       [0-9a-f]*       { cmplts r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
1585     3138:       [0-9a-f]*       { cmplts r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
1586     3140:       [0-9a-f]*       { cmplts r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
1587     3148:       [0-9a-f]*       { cmplts r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
1588     3150:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
1589     3158:       [0-9a-f]*       { cmplts r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 }
1590     3160:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
1591     3168:       [0-9a-f]*       { cmplts r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 }
1592     3170:       [0-9a-f]*       { cmplts r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
1593     3178:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; st4 r25, r26 }
1594     3180:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmplts r15, r16, r17 ; st4 r25, r26 }
1595     3188:       [0-9a-f]*       { cmplts r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
1596     3190:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmplts r15, r16, r17 }
1597     3198:       [0-9a-f]*       { cmplts r15, r16, r17 ; v1addi r5, r6, 5 }
1598     31a0:       [0-9a-f]*       { cmplts r15, r16, r17 ; v1shru r5, r6, r7 }
1599     31a8:       [0-9a-f]*       { cmplts r15, r16, r17 ; v2shlsc r5, r6, r7 }
1600     31b0:       [0-9a-f]*       { cmplts r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
1601     31b8:       [0-9a-f]*       { cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
1602     31c0:       [0-9a-f]*       { cmplts r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
1603     31c8:       [0-9a-f]*       { cmplts r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
1604     31d0:       [0-9a-f]*       { cmplts r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
1605     31d8:       [0-9a-f]*       { cmplts r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
1606     31e0:       [0-9a-f]*       { cmplts r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
1607     31e8:       [0-9a-f]*       { cmplts r5, r6, r7 ; fetchand r15, r16, r17 }
1608     31f0:       [0-9a-f]*       { cmplts r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
1609     31f8:       [0-9a-f]*       { cmplts r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
1610     3200:       [0-9a-f]*       { cmplts r5, r6, r7 ; jr r15 ; st r25, r26 }
1611     3208:       [0-9a-f]*       { cmplts r5, r6, r7 ; ill ; ld r25, r26 }
1612     3210:       [0-9a-f]*       { cmplts r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
1613     3218:       [0-9a-f]*       { cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 }
1614     3220:       [0-9a-f]*       { cmplts r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
1615     3228:       [0-9a-f]*       { cmplts r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
1616     3230:       [0-9a-f]*       { cmplts r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
1617     3238:       [0-9a-f]*       { cmplts r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
1618     3240:       [0-9a-f]*       { cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
1619     3248:       [0-9a-f]*       { cmplts r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 }
1620     3250:       [0-9a-f]*       { cmplts r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
1621     3258:       [0-9a-f]*       { cmplts r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
1622     3260:       [0-9a-f]*       { cmplts r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
1623     3268:       [0-9a-f]*       { cmplts r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
1624     3270:       [0-9a-f]*       { cmplts r5, r6, r7 ; jr r15 ; prefetch r25 }
1625     3278:       [0-9a-f]*       { cmplts r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
1626     3280:       [0-9a-f]*       { cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
1627     3288:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
1628     3290:       [0-9a-f]*       { cmplts r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
1629     3298:       [0-9a-f]*       { cmplts r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
1630     32a0:       [0-9a-f]*       { cmplts r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
1631     32a8:       [0-9a-f]*       { cmplts r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
1632     32b0:       [0-9a-f]*       { cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
1633     32b8:       [0-9a-f]*       { cmplts r5, r6, r7 ; rotli r15, r16, 5 }
1634     32c0:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
1635     32c8:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
1636     32d0:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
1637     32d8:       [0-9a-f]*       { cmplts r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
1638     32e0:       [0-9a-f]*       { cmplts r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
1639     32e8:       [0-9a-f]*       { cmplts r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 }
1640     32f0:       [0-9a-f]*       { cmplts r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
1641     32f8:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
1642     3300:       [0-9a-f]*       { cmplts r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
1643     3308:       [0-9a-f]*       { cmplts r5, r6, r7 ; jr r15 ; st4 r25, r26 }
1644     3310:       [0-9a-f]*       { cmplts r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
1645     3318:       [0-9a-f]*       { cmplts r5, r6, r7 ; v1cmpeq r15, r16, r17 }
1646     3320:       [0-9a-f]*       { cmplts r5, r6, r7 ; v2maxsi r15, r16, 5 }
1647     3328:       [0-9a-f]*       { cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
1648     3330:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3 r25 }
1649     3338:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
1650     3340:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
1651     3348:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
1652     3350:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 }
1653     3358:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; cmples r5, r6, r7 ; st2 r25, r26 }
1654     3360:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 }
1655     3368:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld r25, r26 }
1656     3370:       [0-9a-f]*       { ctz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
1657     3378:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; cmpltsi r15, r16, 5 }
1658     3380:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; info 19 ; st4 r25, r26 }
1659     3388:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; or r5, r6, r7 ; ld r25, r26 }
1660     3390:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
1661     3398:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shrui r5, r6, 5 ; ld1s r25, r26 }
1662     33a0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1u r25, r26 }
1663     33a8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 }
1664     33b0:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
1665     33b8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
1666     33c0:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; addx r5, r6, r7 ; ld4s r25, r26 }
1667     33c8:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; rotli r5, r6, 5 ; ld4s r25, r26 }
1668     33d0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 }
1669     33d8:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 }
1670     33e0:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; move r5, r6 ; st2 r25, r26 }
1671     33e8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
1672     33f0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; st r25, r26 }
1673     33f8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; st1 r25, r26 }
1674     3400:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
1675     3408:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 }
1676     3410:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 }
1677     3418:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; nor r5, r6, r7 ; st4 r25, r26 }
1678     3420:       [0-9a-f]*       { pcnt r5, r6 ; cmpltsi r15, r16, 5 }
1679     3428:       [0-9a-f]*       { revbits r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 }
1680     3430:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch r25 }
1681     3438:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; subx r5, r6, r7 ; prefetch r25 }
1682     3440:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l1_fault r25 }
1683     3448:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
1684     3450:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l2 r25 }
1685     3458:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 }
1686     3460:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; and r5, r6, r7 ; prefetch_l3 r25 }
1687     3468:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
1688     3470:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
1689     3478:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
1690     3480:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; rotl r5, r6, r7 ; ld r25, r26 }
1691     3488:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl r5, r6, r7 ; ld1u r25, r26 }
1692     3490:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
1693     3498:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
1694     34a0:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 }
1695     34a8:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 }
1696     34b0:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
1697     34b8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; st r25, r26 }
1698     34c0:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl3add r5, r6, r7 ; st r25, r26 }
1699     34c8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; st1 r25, r26 }
1700     34d0:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; addx r5, r6, r7 ; st2 r25, r26 }
1701     34d8:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 }
1702     34e0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
1703     34e8:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
1704     34f0:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; subx r5, r6, r7 ; st4 r25, r26 }
1705     34f8:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 }
1706     3500:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; v1addi r5, r6, 5 }
1707     3508:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; v1shru r5, r6, r7 }
1708     3510:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; v2shlsc r5, r6, r7 }
1709     3518:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; add r15, r16, r17 ; ld1u r25, r26 }
1710     3520:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; addx r15, r16, r17 ; ld2s r25, r26 }
1711     3528:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; and r15, r16, r17 ; ld2s r25, r26 }
1712     3530:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
1713     3538:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4s r25, r26 }
1714     3540:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 }
1715     3548:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
1716     3550:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; fetchand r15, r16, r17 }
1717     3558:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; ill ; prefetch_l3_fault r25 }
1718     3560:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; jalr r15 ; prefetch_l3 r25 }
1719     3568:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; jr r15 ; st r25, r26 }
1720     3570:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; ill ; ld r25, r26 }
1721     3578:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
1722     3580:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; ld1s_add r15, r16, 5 }
1723     3588:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shli r15, r16, 5 ; ld1u r25, r26 }
1724     3590:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; rotl r15, r16, r17 ; ld2s r25, r26 }
1725     3598:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; jrp r15 ; ld2u r25, r26 }
1726     35a0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
1727     35a8:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 }
1728     35b0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shrui r15, r16, 5 ; ld4u r25, r26 }
1729     35b8:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; lnk r15 ; st4 r25, r26 }
1730     35c0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; move r15, r16 ; st4 r25, r26 }
1731     35c8:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; mz r15, r16, r17 ; st4 r25, r26 }
1732     35d0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; or r15, r16, r17 ; ld r25, r26 }
1733     35d8:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; jr r15 ; prefetch r25 }
1734     35e0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; prefetch r25 }
1735     35e8:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch r25 }
1736     35f0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
1737     35f8:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
1738     3600:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; lnk r15 ; prefetch_l2_fault r25 }
1739     3608:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
1740     3610:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
1741     3618:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
1742     3620:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; rotli r15, r16, 5 }
1743     3628:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld r25, r26 }
1744     3630:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
1745     3638:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
1746     3640:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shrs r15, r16, r17 ; ld2u r25, r26 }
1747     3648:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shru r15, r16, r17 ; ld4u r25, r26 }
1748     3650:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; st r25, r26 }
1749     3658:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 }
1750     3660:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
1751     3668:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; or r15, r16, r17 ; st2 r25, r26 }
1752     3670:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; jr r15 ; st4 r25, r26 }
1753     3678:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; sub r15, r16, r17 ; ld1u r25, r26 }
1754     3680:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; v1cmpeq r15, r16, r17 }
1755     3688:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; v2maxsi r15, r16, 5 }
1756     3690:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
1757     3698:       [0-9a-f]*       { cmpltu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
1758     36a0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
1759     36a8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
1760     36b0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
1761     36b8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
1762     36c0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
1763     36c8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; cmplts r5, r6, r7 }
1764     36d0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
1765     36d8:       [0-9a-f]*       { ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
1766     36e0:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; cmpltu r15, r16, r17 }
1767     36e8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; info 19 ; st4 r25, r26 }
1768     36f0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
1769     36f8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
1770     3700:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
1771     3708:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
1772     3710:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2s r25, r26 }
1773     3718:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
1774     3720:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
1775     3728:       [0-9a-f]*       { cmpltu r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 }
1776     3730:       [0-9a-f]*       { cmpltu r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 }
1777     3738:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
1778     3740:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
1779     3748:       [0-9a-f]*       { cmpltu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
1780     3750:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
1781     3758:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; st r25, r26 }
1782     3760:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
1783     3768:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
1784     3770:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
1785     3778:       [0-9a-f]*       { cmpltu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
1786     3780:       [0-9a-f]*       { cmpltu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
1787     3788:       [0-9a-f]*       { pcnt r5, r6 ; cmpltu r15, r16, r17 }
1788     3790:       [0-9a-f]*       { revbits r5, r6 ; cmpltu r15, r16, r17 ; prefetch r25 }
1789     3798:       [0-9a-f]*       { cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
1790     37a0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
1791     37a8:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
1792     37b0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
1793     37b8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 }
1794     37c0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
1795     37c8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 }
1796     37d0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
1797     37d8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
1798     37e0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
1799     37e8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
1800     37f0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
1801     37f8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
1802     3800:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
1803     3808:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
1804     3810:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
1805     3818:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
1806     3820:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; st r25, r26 }
1807     3828:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 }
1808     3830:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
1809     3838:       [0-9a-f]*       { cmpltu r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 }
1810     3840:       [0-9a-f]*       { cmpltu r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
1811     3848:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
1812     3850:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
1813     3858:       [0-9a-f]*       { cmpltu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
1814     3860:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpltu r15, r16, r17 }
1815     3868:       [0-9a-f]*       { cmpltu r15, r16, r17 ; v1addi r5, r6, 5 }
1816     3870:       [0-9a-f]*       { cmpltu r15, r16, r17 ; v1shru r5, r6, r7 }
1817     3878:       [0-9a-f]*       { cmpltu r15, r16, r17 ; v2shlsc r5, r6, r7 }
1818     3880:       [0-9a-f]*       { cmpltu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
1819     3888:       [0-9a-f]*       { cmpltu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
1820     3890:       [0-9a-f]*       { cmpltu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
1821     3898:       [0-9a-f]*       { cmpltu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
1822     38a0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
1823     38a8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
1824     38b0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
1825     38b8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; fetchand r15, r16, r17 }
1826     38c0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
1827     38c8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
1828     38d0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jr r15 ; st r25, r26 }
1829     38d8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ill ; ld r25, r26 }
1830     38e0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
1831     38e8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ld1s_add r15, r16, 5 }
1832     38f0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
1833     38f8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
1834     3900:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
1835     3908:       [0-9a-f]*       { cmpltu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
1836     3910:       [0-9a-f]*       { cmpltu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
1837     3918:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 }
1838     3920:       [0-9a-f]*       { cmpltu r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
1839     3928:       [0-9a-f]*       { cmpltu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
1840     3930:       [0-9a-f]*       { cmpltu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
1841     3938:       [0-9a-f]*       { cmpltu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
1842     3940:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jr r15 ; prefetch r25 }
1843     3948:       [0-9a-f]*       { cmpltu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
1844     3950:       [0-9a-f]*       { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
1845     3958:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
1846     3960:       [0-9a-f]*       { cmpltu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
1847     3968:       [0-9a-f]*       { cmpltu r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
1848     3970:       [0-9a-f]*       { cmpltu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
1849     3978:       [0-9a-f]*       { cmpltu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
1850     3980:       [0-9a-f]*       { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
1851     3988:       [0-9a-f]*       { cmpltu r5, r6, r7 ; rotli r15, r16, 5 }
1852     3990:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
1853     3998:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
1854     39a0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
1855     39a8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
1856     39b0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
1857     39b8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 }
1858     39c0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
1859     39c8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
1860     39d0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
1861     39d8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jr r15 ; st4 r25, r26 }
1862     39e0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
1863     39e8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; v1cmpeq r15, r16, r17 }
1864     39f0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; v2maxsi r15, r16, 5 }
1865     39f8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
1866     3a00:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; cmpltui r15, r16, 5 }
1867     3a08:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpltui r15, r16, 5 }
1868     3a10:       [0-9a-f]*       { cmpltui r15, r16, 5 ; sub r5, r6, r7 }
1869     3a18:       [0-9a-f]*       { v1mulus r5, r6, r7 ; cmpltui r15, r16, 5 }
1870     3a20:       [0-9a-f]*       { cmpltui r15, r16, 5 ; v2packl r5, r6, r7 }
1871     3a28:       [0-9a-f]*       { cmpltui r5, r6, 5 ; cmpexch4 r15, r16, r17 }
1872     3a30:       [0-9a-f]*       { cmpltui r5, r6, 5 ; ld1u_add r15, r16, 5 }
1873     3a38:       [0-9a-f]*       { cmpltui r5, r6, 5 ; prefetch_add_l1 r15, 5 }
1874     3a40:       [0-9a-f]*       { cmpltui r5, r6, 5 ; stnt r15, r16 }
1875     3a48:       [0-9a-f]*       { cmpltui r5, r6, 5 ; v2addi r15, r16, 5 }
1876     3a50:       [0-9a-f]*       { cmpltui r5, r6, 5 ; v4sub r15, r16, r17 }
1877     3a58:       [0-9a-f]*       { cmpne r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 }
1878     3a60:       [0-9a-f]*       { cmpne r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 }
1879     3a68:       [0-9a-f]*       { cmpne r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 }
1880     3a70:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 ; st2 r25, r26 }
1881     3a78:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpeq r5, r6, r7 }
1882     3a80:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
1883     3a88:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 }
1884     3a90:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
1885     3a98:       [0-9a-f]*       { ctz r5, r6 ; cmpne r15, r16, r17 ; st2 r25, r26 }
1886     3aa0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpne r15, r16, r17 ; ld1u r25, r26 }
1887     3aa8:       [0-9a-f]*       { cmpne r15, r16, r17 ; addi r5, r6, 5 ; ld r25, r26 }
1888     3ab0:       [0-9a-f]*       { cmpne r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
1889     3ab8:       [0-9a-f]*       { cmpne r15, r16, r17 ; ld1s r25, r26 }
1890     3ac0:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
1891     3ac8:       [0-9a-f]*       { cmpne r15, r16, r17 ; nop ; ld1u r25, r26 }
1892     3ad0:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
1893     3ad8:       [0-9a-f]*       { cmpne r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
1894     3ae0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
1895     3ae8:       [0-9a-f]*       { clz r5, r6 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
1896     3af0:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 }
1897     3af8:       [0-9a-f]*       { cmpne r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
1898     3b00:       [0-9a-f]*       { mm r5, r6, 5, 7 ; cmpne r15, r16, r17 }
1899     3b08:       [0-9a-f]*       { cmpne r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 }
1900     3b10:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; cmpne r15, r16, r17 }
1901     3b18:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 }
1902     3b20:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; cmpne r15, r16, r17 }
1903     3b28:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; st2 r25, r26 }
1904     3b30:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpne r15, r16, r17 ; st4 r25, r26 }
1905     3b38:       [0-9a-f]*       { cmpne r15, r16, r17 ; nop ; ld r25, r26 }
1906     3b40:       [0-9a-f]*       { cmpne r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 }
1907     3b48:       [0-9a-f]*       { cmpne r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 }
1908     3b50:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
1909     3b58:       [0-9a-f]*       { cmpne r15, r16, r17 ; info 19 ; prefetch r25 }
1910     3b60:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpne r15, r16, r17 ; prefetch r25 }
1911     3b68:       [0-9a-f]*       { cmpne r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
1912     3b70:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
1913     3b78:       [0-9a-f]*       { cmpne r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2 r25 }
1914     3b80:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2_fault r25 }
1915     3b88:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
1916     3b90:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
1917     3b98:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
1918     3ba0:       [0-9a-f]*       { revbits r5, r6 ; cmpne r15, r16, r17 ; ld1u r25, r26 }
1919     3ba8:       [0-9a-f]*       { cmpne r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 }
1920     3bb0:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 }
1921     3bb8:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
1922     3bc0:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
1923     3bc8:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
1924     3bd0:       [0-9a-f]*       { cmpne r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 }
1925     3bd8:       [0-9a-f]*       { cmpne r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
1926     3be0:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
1927     3be8:       [0-9a-f]*       { cmpne r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
1928     3bf0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; st1 r25, r26 }
1929     3bf8:       [0-9a-f]*       { clz r5, r6 ; cmpne r15, r16, r17 ; st2 r25, r26 }
1930     3c00:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
1931     3c08:       [0-9a-f]*       { cmpne r15, r16, r17 ; movei r5, 5 ; st4 r25, r26 }
1932     3c10:       [0-9a-f]*       { cmpne r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
1933     3c18:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
1934     3c20:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld2s r25, r26 }
1935     3c28:       [0-9a-f]*       { cmpne r15, r16, r17 ; v1cmpeq r5, r6, r7 }
1936     3c30:       [0-9a-f]*       { cmpne r15, r16, r17 ; v2add r5, r6, r7 }
1937     3c38:       [0-9a-f]*       { cmpne r15, r16, r17 ; v2shrui r5, r6, 5 }
1938     3c40:       [0-9a-f]*       { cmpne r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
1939     3c48:       [0-9a-f]*       { cmpne r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
1940     3c50:       [0-9a-f]*       { cmpne r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
1941     3c58:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
1942     3c60:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
1943     3c68:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
1944     3c70:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
1945     3c78:       [0-9a-f]*       { cmpne r5, r6, r7 ; finv r15 }
1946     3c80:       [0-9a-f]*       { cmpne r5, r6, r7 ; ill ; st4 r25, r26 }
1947     3c88:       [0-9a-f]*       { cmpne r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
1948     3c90:       [0-9a-f]*       { cmpne r5, r6, r7 ; jr r15 }
1949     3c98:       [0-9a-f]*       { cmpne r5, r6, r7 ; jr r15 ; ld r25, r26 }
1950     3ca0:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
1951     3ca8:       [0-9a-f]*       { cmpne r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
1952     3cb0:       [0-9a-f]*       { cmpne r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
1953     3cb8:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
1954     3cc0:       [0-9a-f]*       { cmpne r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
1955     3cc8:       [0-9a-f]*       { cmpne r5, r6, r7 ; ill ; ld4s r25, r26 }
1956     3cd0:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
1957     3cd8:       [0-9a-f]*       { cmpne r5, r6, r7 ; ld4u r25, r26 }
1958     3ce0:       [0-9a-f]*       { cmpne r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
1959     3ce8:       [0-9a-f]*       { cmpne r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
1960     3cf0:       [0-9a-f]*       { cmpne r5, r6, r7 ; nop ; ld1u r25, r26 }
1961     3cf8:       [0-9a-f]*       { cmpne r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
1962     3d00:       [0-9a-f]*       { cmpne r5, r6, r7 ; move r15, r16 ; prefetch r25 }
1963     3d08:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
1964     3d10:       [0-9a-f]*       { cmpne r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
1965     3d18:       [0-9a-f]*       { cmpne r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
1966     3d20:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
1967     3d28:       [0-9a-f]*       { cmpne r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
1968     3d30:       [0-9a-f]*       { cmpne r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
1969     3d38:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
1970     3d40:       [0-9a-f]*       { cmpne r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
1971     3d48:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
1972     3d50:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
1973     3d58:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
1974     3d60:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
1975     3d68:       [0-9a-f]*       { cmpne r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
1976     3d70:       [0-9a-f]*       { cmpne r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
1977     3d78:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
1978     3d80:       [0-9a-f]*       { cmpne r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
1979     3d88:       [0-9a-f]*       { cmpne r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
1980     3d90:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 }
1981     3d98:       [0-9a-f]*       { cmpne r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
1982     3da0:       [0-9a-f]*       { cmpne r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
1983     3da8:       [0-9a-f]*       { cmpne r5, r6, r7 ; v1cmplts r15, r16, r17 }
1984     3db0:       [0-9a-f]*       { cmpne r5, r6, r7 ; v2mz r15, r16, r17 }
1985     3db8:       [0-9a-f]*       { cmpne r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
1986     3dc0:       [0-9a-f]*       { cmul r5, r6, r7 ; flush r15 }
1987     3dc8:       [0-9a-f]*       { cmul r5, r6, r7 ; ldnt4u r15, r16 }
1988     3dd0:       [0-9a-f]*       { cmul r5, r6, r7 ; shli r15, r16, 5 }
1989     3dd8:       [0-9a-f]*       { cmul r5, r6, r7 ; v1int_h r15, r16, r17 }
1990     3de0:       [0-9a-f]*       { cmul r5, r6, r7 ; v2shli r15, r16, 5 }
1991     3de8:       [0-9a-f]*       { cmula r5, r6, r7 ; cmpltui r15, r16, 5 }
1992     3df0:       [0-9a-f]*       { cmula r5, r6, r7 ; ld4s_add r15, r16, 5 }
1993     3df8:       [0-9a-f]*       { cmula r5, r6, r7 ; prefetch r15 }
1994     3e00:       [0-9a-f]*       { cmula r5, r6, r7 ; stnt4_add r15, r16, 5 }
1995     3e08:       [0-9a-f]*       { cmula r5, r6, r7 ; v2cmplts r15, r16, r17 }
1996     3e10:       [0-9a-f]*       { cmulaf r5, r6, r7 ; addi r15, r16, 5 }
1997     3e18:       [0-9a-f]*       { cmulaf r5, r6, r7 ; infol 4660 }
1998     3e20:       [0-9a-f]*       { cmulaf r5, r6, r7 ; mnz r15, r16, r17 }
1999     3e28:       [0-9a-f]*       { cmulaf r5, r6, r7 ; shrui r15, r16, 5 }
2000     3e30:       [0-9a-f]*       { cmulaf r5, r6, r7 ; v1mnz r15, r16, r17 }
2001     3e38:       [0-9a-f]*       { cmulaf r5, r6, r7 ; v2sub r15, r16, r17 }
2002     3e40:       [0-9a-f]*       { cmulf r5, r6, r7 ; exch r15, r16, r17 }
2003     3e48:       [0-9a-f]*       { cmulf r5, r6, r7 ; ldnt r15, r16 }
2004     3e50:       [0-9a-f]*       { cmulf r5, r6, r7 ; raise }
2005     3e58:       [0-9a-f]*       { cmulf r5, r6, r7 ; v1addi r15, r16, 5 }
2006     3e60:       [0-9a-f]*       { cmulf r5, r6, r7 ; v2int_l r15, r16, r17 }
2007     3e68:       [0-9a-f]*       { cmulfr r5, r6, r7 ; and r15, r16, r17 }
2008     3e70:       [0-9a-f]*       { cmulfr r5, r6, r7 ; jrp r15 }
2009     3e78:       [0-9a-f]*       { cmulfr r5, r6, r7 ; nop }
2010     3e80:       [0-9a-f]*       { cmulfr r5, r6, r7 ; st2 r15, r16 }
2011     3e88:       [0-9a-f]*       { cmulfr r5, r6, r7 ; v1shru r15, r16, r17 }
2012     3e90:       [0-9a-f]*       { cmulfr r5, r6, r7 ; v4packsc r15, r16, r17 }
2013     3e98:       [0-9a-f]*       { cmulh r5, r6, r7 ; fetchand r15, r16, r17 }
2014     3ea0:       [0-9a-f]*       { cmulh r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
2015     3ea8:       [0-9a-f]*       { cmulh r5, r6, r7 ; shl1addx r15, r16, r17 }
2016     3eb0:       [0-9a-f]*       { cmulh r5, r6, r7 ; v1cmplts r15, r16, r17 }
2017     3eb8:       [0-9a-f]*       { cmulh r5, r6, r7 ; v2mz r15, r16, r17 }
2018     3ec0:       [0-9a-f]*       { cmulhr r5, r6, r7 ; cmples r15, r16, r17 }
2019     3ec8:       [0-9a-f]*       { cmulhr r5, r6, r7 ; ld2s r15, r16 }
2020     3ed0:       [0-9a-f]*       { cmulhr r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
2021     3ed8:       [0-9a-f]*       { cmulhr r5, r6, r7 ; stnt1 r15, r16 }
2022     3ee0:       [0-9a-f]*       { cmulhr r5, r6, r7 ; v2addsc r15, r16, r17 }
2023     3ee8:       [0-9a-f]*       { cmulhr r5, r6, r7 ; v4subsc r15, r16, r17 }
2024     3ef0:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; flushwb }
2025     3ef8:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
2026     3f00:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; shlx r15, r16, r17 }
2027     3f08:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; v1int_l r15, r16, r17 }
2028     3f10:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; v2shlsc r15, r16, r17 }
2029     3f18:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; cmpne r15, r16, r17 }
2030     3f20:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; ld4u r15, r16 }
2031     3f28:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; prefetch_l1_fault r15 }
2032     3f30:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; stnt_add r15, r16, 5 }
2033     3f38:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
2034     3f40:       [0-9a-f]*       { ctz r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
2035     3f48:       [0-9a-f]*       { ctz r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 }
2036     3f50:       [0-9a-f]*       { ctz r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
2037     3f58:       [0-9a-f]*       { ctz r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
2038     3f60:       [0-9a-f]*       { ctz r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
2039     3f68:       [0-9a-f]*       { ctz r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 }
2040     3f70:       [0-9a-f]*       { ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
2041     3f78:       [0-9a-f]*       { ctz r5, r6 ; fetchand r15, r16, r17 }
2042     3f80:       [0-9a-f]*       { ctz r5, r6 ; ill ; prefetch_l3_fault r25 }
2043     3f88:       [0-9a-f]*       { ctz r5, r6 ; jalr r15 ; prefetch_l3 r25 }
2044     3f90:       [0-9a-f]*       { ctz r5, r6 ; jr r15 ; st r25, r26 }
2045     3f98:       [0-9a-f]*       { ctz r5, r6 ; ill ; ld r25, r26 }
2046     3fa0:       [0-9a-f]*       { ctz r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
2047     3fa8:       [0-9a-f]*       { ctz r5, r6 ; ld1s_add r15, r16, 5 }
2048     3fb0:       [0-9a-f]*       { ctz r5, r6 ; shli r15, r16, 5 ; ld1u r25, r26 }
2049     3fb8:       [0-9a-f]*       { ctz r5, r6 ; rotl r15, r16, r17 ; ld2s r25, r26 }
2050     3fc0:       [0-9a-f]*       { ctz r5, r6 ; jrp r15 ; ld2u r25, r26 }
2051     3fc8:       [0-9a-f]*       { ctz r5, r6 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
2052     3fd0:       [0-9a-f]*       { ctz r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 }
2053     3fd8:       [0-9a-f]*       { ctz r5, r6 ; shrui r15, r16, 5 ; ld4u r25, r26 }
2054     3fe0:       [0-9a-f]*       { ctz r5, r6 ; lnk r15 ; st4 r25, r26 }
2055     3fe8:       [0-9a-f]*       { ctz r5, r6 ; move r15, r16 ; st4 r25, r26 }
2056     3ff0:       [0-9a-f]*       { ctz r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 }
2057     3ff8:       [0-9a-f]*       { ctz r5, r6 ; or r15, r16, r17 ; ld r25, r26 }
2058     4000:       [0-9a-f]*       { ctz r5, r6 ; jr r15 ; prefetch r25 }
2059     4008:       [0-9a-f]*       { ctz r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
2060     4010:       [0-9a-f]*       { ctz r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
2061     4018:       [0-9a-f]*       { ctz r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
2062     4020:       [0-9a-f]*       { ctz r5, r6 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
2063     4028:       [0-9a-f]*       { ctz r5, r6 ; lnk r15 ; prefetch_l2_fault r25 }
2064     4030:       [0-9a-f]*       { ctz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
2065     4038:       [0-9a-f]*       { ctz r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
2066     4040:       [0-9a-f]*       { ctz r5, r6 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
2067     4048:       [0-9a-f]*       { ctz r5, r6 ; rotli r15, r16, 5 }
2068     4050:       [0-9a-f]*       { ctz r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 }
2069     4058:       [0-9a-f]*       { ctz r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
2070     4060:       [0-9a-f]*       { ctz r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
2071     4068:       [0-9a-f]*       { ctz r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 }
2072     4070:       [0-9a-f]*       { ctz r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
2073     4078:       [0-9a-f]*       { ctz r5, r6 ; andi r15, r16, 5 ; st r25, r26 }
2074     4080:       [0-9a-f]*       { ctz r5, r6 ; xor r15, r16, r17 ; st r25, r26 }
2075     4088:       [0-9a-f]*       { ctz r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
2076     4090:       [0-9a-f]*       { ctz r5, r6 ; or r15, r16, r17 ; st2 r25, r26 }
2077     4098:       [0-9a-f]*       { ctz r5, r6 ; jr r15 ; st4 r25, r26 }
2078     40a0:       [0-9a-f]*       { ctz r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
2079     40a8:       [0-9a-f]*       { ctz r5, r6 ; v1cmpeq r15, r16, r17 }
2080     40b0:       [0-9a-f]*       { ctz r5, r6 ; v2maxsi r15, r16, 5 }
2081     40b8:       [0-9a-f]*       { ctz r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
2082     40c0:       [0-9a-f]*       { dblalign r5, r6, r7 ; fetchand4 r15, r16, r17 }
2083     40c8:       [0-9a-f]*       { dblalign r5, r6, r7 ; ldnt2u r15, r16 }
2084     40d0:       [0-9a-f]*       { dblalign r5, r6, r7 ; shl2add r15, r16, r17 }
2085     40d8:       [0-9a-f]*       { dblalign r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
2086     40e0:       [0-9a-f]*       { dblalign r5, r6, r7 ; v2packh r15, r16, r17 }
2087     40e8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; dblalign2 r15, r16, r17 }
2088     40f0:       [0-9a-f]*       { dblalign2 r15, r16, r17 ; info 19 }
2089     40f8:       [0-9a-f]*       { dblalign2 r15, r16, r17 ; shl16insli r5, r6, 4660 }
2090     4100:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; dblalign2 r15, r16, r17 }
2091     4108:       [0-9a-f]*       { dblalign2 r15, r16, r17 ; v2cmpltu r5, r6, r7 }
2092     4110:       [0-9a-f]*       { dblalign2 r15, r16, r17 ; v4shru r5, r6, r7 }
2093     4118:       [0-9a-f]*       { dblalign2 r5, r6, r7 ; flush r15 }
2094     4120:       [0-9a-f]*       { dblalign2 r5, r6, r7 ; ldnt4u r15, r16 }
2095     4128:       [0-9a-f]*       { dblalign2 r5, r6, r7 ; shli r15, r16, 5 }
2096     4130:       [0-9a-f]*       { dblalign2 r5, r6, r7 ; v1int_h r15, r16, r17 }
2097     4138:       [0-9a-f]*       { dblalign2 r5, r6, r7 ; v2shli r15, r16, 5 }
2098     4140:       [0-9a-f]*       { dblalign4 r15, r16, r17 ; cmpleu r5, r6, r7 }
2099     4148:       [0-9a-f]*       { dblalign4 r15, r16, r17 ; move r5, r6 }
2100     4150:       [0-9a-f]*       { dblalign4 r15, r16, r17 ; shl2addx r5, r6, r7 }
2101     4158:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; dblalign4 r15, r16, r17 }
2102     4160:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; dblalign4 r15, r16, r17 }
2103     4168:       [0-9a-f]*       { dblalign4 r15, r16, r17 ; xori r5, r6, 5 }
2104     4170:       [0-9a-f]*       { dblalign4 r5, r6, r7 ; ill }
2105     4178:       [0-9a-f]*       { dblalign4 r5, r6, r7 ; mf }
2106     4180:       [0-9a-f]*       { dblalign4 r5, r6, r7 ; shrsi r15, r16, 5 }
2107     4188:       [0-9a-f]*       { dblalign4 r5, r6, r7 ; v1minu r15, r16, r17 }
2108     4190:       [0-9a-f]*       { dblalign4 r5, r6, r7 ; v2shru r15, r16, r17 }
2109     4198:       [0-9a-f]*       { dblalign6 r15, r16, r17 ; cmpltui r5, r6, 5 }
2110     41a0:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; dblalign6 r15, r16, r17 }
2111     41a8:       [0-9a-f]*       { dblalign6 r15, r16, r17 ; shlx r5, r6, r7 }
2112     41b0:       [0-9a-f]*       { dblalign6 r15, r16, r17 ; v1int_h r5, r6, r7 }
2113     41b8:       [0-9a-f]*       { dblalign6 r15, r16, r17 ; v2maxsi r5, r6, 5 }
2114     41c0:       [0-9a-f]*       { dblalign6 r5, r6, r7 ; addx r15, r16, r17 }
2115     41c8:       [0-9a-f]*       { dblalign6 r5, r6, r7 ; iret }
2116     41d0:       [0-9a-f]*       { dblalign6 r5, r6, r7 ; movei r15, 5 }
2117     41d8:       [0-9a-f]*       { dblalign6 r5, r6, r7 ; shruxi r15, r16, 5 }
2118     41e0:       [0-9a-f]*       { dblalign6 r5, r6, r7 ; v1shl r15, r16, r17 }
2119     41e8:       [0-9a-f]*       { dblalign6 r5, r6, r7 ; v4add r15, r16, r17 }
2120     41f0:       [0-9a-f]*       { cmula r5, r6, r7 ; dtlbpr r15 }
2121     41f8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; dtlbpr r15 }
2122     4200:       [0-9a-f]*       { shrsi r5, r6, 5 ; dtlbpr r15 }
2123     4208:       [0-9a-f]*       { v1maxui r5, r6, 5 ; dtlbpr r15 }
2124     4210:       [0-9a-f]*       { v2mnz r5, r6, r7 ; dtlbpr r15 }
2125     4218:       [0-9a-f]*       { addxsc r5, r6, r7 ; exch r15, r16, r17 }
2126     4220:       [0-9a-f]*       { exch r15, r16, r17 }
2127     4228:       [0-9a-f]*       { or r5, r6, r7 ; exch r15, r16, r17 }
2128     4230:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; exch r15, r16, r17 }
2129     4238:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; exch r15, r16, r17 }
2130     4240:       [0-9a-f]*       { v4add r5, r6, r7 ; exch r15, r16, r17 }
2131     4248:       [0-9a-f]*       { cmulf r5, r6, r7 ; exch4 r15, r16, r17 }
2132     4250:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; exch4 r15, r16, r17 }
2133     4258:       [0-9a-f]*       { shrui r5, r6, 5 ; exch4 r15, r16, r17 }
2134     4260:       [0-9a-f]*       { v1minui r5, r6, 5 ; exch4 r15, r16, r17 }
2135     4268:       [0-9a-f]*       { v2muls r5, r6, r7 ; exch4 r15, r16, r17 }
2136     4270:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; andi r15, r16, 5 }
2137     4278:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; ld r15, r16 }
2138     4280:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; nor r15, r16, r17 }
2139     4288:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; st2_add r15, r16, 5 }
2140     4290:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; v1shrui r15, r16, 5 }
2141     4298:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; v4shl r15, r16, r17 }
2142     42a0:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; fetchand4 r15, r16, r17 }
2143     42a8:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; ldnt2u r15, r16 }
2144     42b0:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; shl2add r15, r16, r17 }
2145     42b8:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
2146     42c0:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; v2packh r15, r16, r17 }
2147     42c8:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; cmpleu r15, r16, r17 }
2148     42d0:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; ld2s_add r15, r16, 5 }
2149     42d8:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; prefetch_add_l2 r15, 5 }
2150     42e0:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; stnt1_add r15, r16, 5 }
2151     42e8:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; v2cmpeq r15, r16, r17 }
2152     42f0:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; wh64 r15 }
2153     42f8:       [0-9a-f]*       { fdouble_pack1 r5, r6, r7 }
2154     4300:       [0-9a-f]*       { fdouble_pack1 r5, r6, r7 ; ldnt_add r15, r16, 5 }
2155     4308:       [0-9a-f]*       { fdouble_pack1 r5, r6, r7 ; shlxi r15, r16, 5 }
2156     4310:       [0-9a-f]*       { fdouble_pack1 r5, r6, r7 ; v1maxu r15, r16, r17 }
2157     4318:       [0-9a-f]*       { fdouble_pack1 r5, r6, r7 ; v2shrs r15, r16, r17 }
2158     4320:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; dblalign2 r15, r16, r17 }
2159     4328:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; ld4u_add r15, r16, 5 }
2160     4330:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; prefetch_l2 r15 }
2161     4338:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; sub r15, r16, r17 }
2162     4340:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; v2cmpltu r15, r16, r17 }
2163     4348:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; addx r15, r16, r17 }
2164     4350:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; iret }
2165     4358:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; movei r15, 5 }
2166     4360:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; shruxi r15, r16, 5 }
2167     4368:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; v1shl r15, r16, r17 }
2168     4370:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; v4add r15, r16, r17 }
2169     4378:       [0-9a-f]*       { fdouble_unpack_max r5, r6, r7 ; fetchadd r15, r16, r17 }
2170     4380:       [0-9a-f]*       { fdouble_unpack_max r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
2171     4388:       [0-9a-f]*       { fdouble_unpack_max r5, r6, r7 ; rotli r15, r16, 5 }
2172     4390:       [0-9a-f]*       { fdouble_unpack_max r5, r6, r7 ; v1cmpeq r15, r16, r17 }
2173     4398:       [0-9a-f]*       { fdouble_unpack_max r5, r6, r7 ; v2maxsi r15, r16, 5 }
2174     43a0:       [0-9a-f]*       { fdouble_unpack_min r5, r6, r7 ; cmpeq r15, r16, r17 }
2175     43a8:       [0-9a-f]*       { fdouble_unpack_min r5, r6, r7 ; ld1s r15, r16 }
2176     43b0:       [0-9a-f]*       { fdouble_unpack_min r5, r6, r7 ; or r15, r16, r17 }
2177     43b8:       [0-9a-f]*       { fdouble_unpack_min r5, r6, r7 ; st4 r15, r16 }
2178     43c0:       [0-9a-f]*       { fdouble_unpack_min r5, r6, r7 ; v1sub r15, r16, r17 }
2179     43c8:       [0-9a-f]*       { fdouble_unpack_min r5, r6, r7 ; v4shlsc r15, r16, r17 }
2180     43d0:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; fetchadd r15, r16, r17 }
2181     43d8:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; fetchadd r15, r16, r17 }
2182     43e0:       [0-9a-f]*       { subx r5, r6, r7 ; fetchadd r15, r16, r17 }
2183     43e8:       [0-9a-f]*       { v1mz r5, r6, r7 ; fetchadd r15, r16, r17 }
2184     43f0:       [0-9a-f]*       { v2packuc r5, r6, r7 ; fetchadd r15, r16, r17 }
2185     43f8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; fetchadd4 r15, r16, r17 }
2186     4400:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; fetchadd4 r15, r16, r17 }
2187     4408:       [0-9a-f]*       { shl r5, r6, r7 ; fetchadd4 r15, r16, r17 }
2188     4410:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; fetchadd4 r15, r16, r17 }
2189     4418:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; fetchadd4 r15, r16, r17 }
2190     4420:       [0-9a-f]*       { v4shrs r5, r6, r7 ; fetchadd4 r15, r16, r17 }
2191     4428:       [0-9a-f]*       { dblalign r5, r6, r7 ; fetchaddgez r15, r16, r17 }
2192     4430:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; fetchaddgez r15, r16, r17 }
2193     4438:       [0-9a-f]*       { tblidxb0 r5, r6 ; fetchaddgez r15, r16, r17 }
2194     4440:       [0-9a-f]*       { v1sadu r5, r6, r7 ; fetchaddgez r15, r16, r17 }
2195     4448:       [0-9a-f]*       { v2sadau r5, r6, r7 ; fetchaddgez r15, r16, r17 }
2196     4450:       [0-9a-f]*       { cmpeq r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
2197     4458:       [0-9a-f]*       { infol 4660 ; fetchaddgez4 r15, r16, r17 }
2198     4460:       [0-9a-f]*       { shl1add r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
2199     4468:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
2200     4470:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; fetchaddgez4 r15, r16, r17 }
2201     4478:       [0-9a-f]*       { v4sub r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
2202     4480:       [0-9a-f]*       { dblalign4 r5, r6, r7 ; fetchand r15, r16, r17 }
2203     4488:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; fetchand r15, r16, r17 }
2204     4490:       [0-9a-f]*       { tblidxb2 r5, r6 ; fetchand r15, r16, r17 }
2205     4498:       [0-9a-f]*       { v1shli r5, r6, 5 ; fetchand r15, r16, r17 }
2206     44a0:       [0-9a-f]*       { v2sadu r5, r6, r7 ; fetchand r15, r16, r17 }
2207     44a8:       [0-9a-f]*       { cmples r5, r6, r7 ; fetchand4 r15, r16, r17 }
2208     44b0:       [0-9a-f]*       { mnz r5, r6, r7 ; fetchand4 r15, r16, r17 }
2209     44b8:       [0-9a-f]*       { shl2add r5, r6, r7 ; fetchand4 r15, r16, r17 }
2210     44c0:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; fetchand4 r15, r16, r17 }
2211     44c8:       [0-9a-f]*       { v2dotp r5, r6, r7 ; fetchand4 r15, r16, r17 }
2212     44d0:       [0-9a-f]*       { xor r5, r6, r7 ; fetchand4 r15, r16, r17 }
2213     44d8:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; fetchor r15, r16, r17 }
2214     44e0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; fetchor r15, r16, r17 }
2215     44e8:       [0-9a-f]*       { v1add r5, r6, r7 ; fetchor r15, r16, r17 }
2216     44f0:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; fetchor r15, r16, r17 }
2217     44f8:       [0-9a-f]*       { v2shli r5, r6, 5 ; fetchor r15, r16, r17 }
2218     4500:       [0-9a-f]*       { cmplts r5, r6, r7 ; fetchor4 r15, r16, r17 }
2219     4508:       [0-9a-f]*       { movei r5, 5 ; fetchor4 r15, r16, r17 }
2220     4510:       [0-9a-f]*       { shl3add r5, r6, r7 ; fetchor4 r15, r16, r17 }
2221     4518:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; fetchor4 r15, r16, r17 }
2222     4520:       [0-9a-f]*       { v2int_h r5, r6, r7 ; fetchor4 r15, r16, r17 }
2223     4528:       [0-9a-f]*       { add r5, r6, r7 ; finv r15 }
2224     4530:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; finv r15 }
2225     4538:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; finv r15 }
2226     4540:       [0-9a-f]*       { v1adduc r5, r6, r7 ; finv r15 }
2227     4548:       [0-9a-f]*       { v1shrui r5, r6, 5 ; finv r15 }
2228     4550:       [0-9a-f]*       { v2shrs r5, r6, r7 ; finv r15 }
2229     4558:       [0-9a-f]*       { cmpltu r5, r6, r7 ; flush r15 }
2230     4560:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; flush r15 }
2231     4568:       [0-9a-f]*       { shli r5, r6, 5 ; flush r15 }
2232     4570:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; flush r15 }
2233     4578:       [0-9a-f]*       { v2maxs r5, r6, r7 ; flush r15 }
2234     4580:       [0-9a-f]*       { addli r5, r6, 4660 ; flushwb }
2235     4588:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; flushwb }
2236     4590:       [0-9a-f]*       { mulx r5, r6, r7 ; flushwb }
2237     4598:       [0-9a-f]*       { v1avgu r5, r6, r7 ; flushwb }
2238     45a0:       [0-9a-f]*       { v1subuc r5, r6, r7 ; flushwb }
2239     45a8:       [0-9a-f]*       { v2shru r5, r6, r7 ; flushwb }
2240     45b0:       [0-9a-f]*       { add r5, r6, r7 ; ld2u r25, r26 }
2241     45b8:       [0-9a-f]*       { addi r5, r6, 5 ; ld4u r25, r26 }
2242     45c0:       [0-9a-f]*       { addx r5, r6, r7 ; ld4u r25, r26 }
2243     45c8:       [0-9a-f]*       { addxi r5, r6, 5 ; prefetch r25 }
2244     45d0:       [0-9a-f]*       { and r5, r6, r7 ; ld4u r25, r26 }
2245     45d8:       [0-9a-f]*       { andi r5, r6, 5 ; prefetch r25 }
2246     45e0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; prefetch r25 }
2247     45e8:       [0-9a-f]*       { cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
2248     45f0:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
2249     45f8:       [0-9a-f]*       { cmples r15, r16, r17 ; prefetch_l2_fault r25 }
2250     4600:       [0-9a-f]*       { cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
2251     4608:       [0-9a-f]*       { cmplts r15, r16, r17 ; st1 r25, r26 }
2252     4610:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; st4 r25, r26 }
2253     4618:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ld r25, r26 }
2254     4620:       [0-9a-f]*       { cmpne r5, r6, r7 ; ld r25, r26 }
2255     4628:       [0-9a-f]*       { ctz r5, r6 ; prefetch_l3 r25 }
2256     4630:       [0-9a-f]*       { ld2u r25, r26 }
2257     4638:       [0-9a-f]*       { icoh r15 }
2258     4640:       [0-9a-f]*       { inv r15 }
2259     4648:       [0-9a-f]*       { jr r15 ; ld r25, r26 }
2260     4650:       [0-9a-f]*       { add r5, r6, r7 ; ld r25, r26 }
2261     4658:       [0-9a-f]*       { mnz r15, r16, r17 ; ld r25, r26 }
2262     4660:       [0-9a-f]*       { shl3add r15, r16, r17 ; ld r25, r26 }
2263     4668:       [0-9a-f]*       { cmovnez r5, r6, r7 ; ld1s r25, r26 }
2264     4670:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; ld1s r25, r26 }
2265     4678:       [0-9a-f]*       { shrui r5, r6, 5 ; ld1s r25, r26 }
2266     4680:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; ld1u r25, r26 }
2267     4688:       [0-9a-f]*       { revbytes r5, r6 ; ld1u r25, r26 }
2268     4690:       [0-9a-f]*       { ld1u_add r15, r16, 5 }
2269     4698:       [0-9a-f]*       { jr r15 ; ld2s r25, r26 }
2270     46a0:       [0-9a-f]*       { shl2add r5, r6, r7 ; ld2s r25, r26 }
2271     46a8:       [0-9a-f]*       { andi r15, r16, 5 ; ld2u r25, r26 }
2272     46b0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ld2u r25, r26 }
2273     46b8:       [0-9a-f]*       { shrsi r5, r6, 5 ; ld2u r25, r26 }
2274     46c0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; ld4s r25, r26 }
2275     46c8:       [0-9a-f]*       { or r15, r16, r17 ; ld4s r25, r26 }
2276     46d0:       [0-9a-f]*       { tblidxb3 r5, r6 ; ld4s r25, r26 }
2277     46d8:       [0-9a-f]*       { ill ; ld4u r25, r26 }
2278     46e0:       [0-9a-f]*       { shl1add r5, r6, r7 ; ld4u r25, r26 }
2279     46e8:       [0-9a-f]*       { ldnt1u_add r15, r16, 5 }
2280     46f0:       [0-9a-f]*       { mnz r15, r16, r17 ; prefetch r25 }
2281     46f8:       [0-9a-f]*       { move r15, r16 ; prefetch_l2 r25 }
2282     4700:       [0-9a-f]*       { movei r15, 5 ; prefetch_l3 r25 }
2283     4708:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 }
2284     4710:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; prefetch r25 }
2285     4718:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 }
2286     4720:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; ld4u r25, r26 }
2287     4728:       [0-9a-f]*       { mulax r5, r6, r7 ; prefetch r25 }
2288     4730:       [0-9a-f]*       { mz r15, r16, r17 ; prefetch_l1_fault r25 }
2289     4738:       [0-9a-f]*       { nop ; prefetch_l2_fault r25 }
2290     4740:       [0-9a-f]*       { nor r5, r6, r7 ; prefetch_l3_fault r25 }
2291     4748:       [0-9a-f]*       { or r5, r6, r7 ; st1 r25, r26 }
2292     4750:       [0-9a-f]*       { cmovnez r5, r6, r7 ; prefetch r25 }
2293     4758:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; prefetch r25 }
2294     4760:       [0-9a-f]*       { shrui r5, r6, 5 ; prefetch r25 }
2295     4768:       [0-9a-f]*       { cmpleu r15, r16, r17 ; prefetch r25 }
2296     4770:       [0-9a-f]*       { nor r5, r6, r7 ; prefetch r25 }
2297     4778:       [0-9a-f]*       { tblidxb2 r5, r6 ; prefetch r25 }
2298     4780:       [0-9a-f]*       { ill ; prefetch_l1_fault r25 }
2299     4788:       [0-9a-f]*       { shl1add r5, r6, r7 ; prefetch_l1_fault r25 }
2300     4790:       [0-9a-f]*       { addxi r5, r6, 5 ; prefetch_l2 r25 }
2301     4798:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
2302     47a0:       [0-9a-f]*       { shrs r15, r16, r17 ; prefetch_l2 r25 }
2303     47a8:       [0-9a-f]*       { cmples r5, r6, r7 ; prefetch_l2_fault r25 }
2304     47b0:       [0-9a-f]*       { nor r15, r16, r17 ; prefetch_l2_fault r25 }
2305     47b8:       [0-9a-f]*       { tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
2306     47c0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; prefetch_l3 r25 }
2307     47c8:       [0-9a-f]*       { shl1add r15, r16, r17 ; prefetch_l3 r25 }
2308     47d0:       [0-9a-f]*       { addxi r15, r16, 5 ; prefetch_l3_fault r25 }
2309     47d8:       [0-9a-f]*       { movei r5, 5 ; prefetch_l3_fault r25 }
2310     47e0:       [0-9a-f]*       { shli r5, r6, 5 ; prefetch_l3_fault r25 }
2311     47e8:       [0-9a-f]*       { revbytes r5, r6 ; ld r25, r26 }
2312     47f0:       [0-9a-f]*       { rotl r5, r6, r7 ; ld1u r25, r26 }
2313     47f8:       [0-9a-f]*       { rotli r5, r6, 5 ; ld2u r25, r26 }
2314     4800:       [0-9a-f]*       { shl r5, r6, r7 ; ld4u r25, r26 }
2315     4808:       [0-9a-f]*       { shl1add r5, r6, r7 ; ld4u r25, r26 }
2316     4810:       [0-9a-f]*       { shl1addx r5, r6, r7 ; prefetch r25 }
2317     4818:       [0-9a-f]*       { shl2add r5, r6, r7 ; prefetch_l2 r25 }
2318     4820:       [0-9a-f]*       { shl2addx r5, r6, r7 ; prefetch_l3 r25 }
2319     4828:       [0-9a-f]*       { shl3add r5, r6, r7 ; st r25, r26 }
2320     4830:       [0-9a-f]*       { shl3addx r5, r6, r7 ; st2 r25, r26 }
2321     4838:       [0-9a-f]*       { shli r5, r6, 5 }
2322     4840:       [0-9a-f]*       { shrs r5, r6, r7 ; st2 r25, r26 }
2323     4848:       [0-9a-f]*       { shrsi r5, r6, 5 }
2324     4850:       [0-9a-f]*       { shrui r15, r16, 5 ; ld1s r25, r26 }
2325     4858:       [0-9a-f]*       { shruxi r5, r6, 5 }
2326     4860:       [0-9a-f]*       { jalrp r15 ; st r25, r26 }
2327     4868:       [0-9a-f]*       { shl2add r15, r16, r17 ; st r25, r26 }
2328     4870:       [0-9a-f]*       { andi r15, r16, 5 ; st1 r25, r26 }
2329     4878:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; st1 r25, r26 }
2330     4880:       [0-9a-f]*       { shrsi r5, r6, 5 ; st1 r25, r26 }
2331     4888:       [0-9a-f]*       { cmpleu r5, r6, r7 ; st2 r25, r26 }
2332     4890:       [0-9a-f]*       { or r15, r16, r17 ; st2 r25, r26 }
2333     4898:       [0-9a-f]*       { tblidxb3 r5, r6 ; st2 r25, r26 }
2334     48a0:       [0-9a-f]*       { ill ; st4 r25, r26 }
2335     48a8:       [0-9a-f]*       { shl1add r5, r6, r7 ; st4 r25, r26 }
2336     48b0:       [0-9a-f]*       { stnt4_add r15, r16, 5 }
2337     48b8:       [0-9a-f]*       { subx r15, r16, r17 ; ld r25, r26 }
2338     48c0:       [0-9a-f]*       { tblidxb0 r5, r6 ; ld r25, r26 }
2339     48c8:       [0-9a-f]*       { tblidxb2 r5, r6 ; ld1u r25, r26 }
2340     48d0:       [0-9a-f]*       { v1adduc r15, r16, r17 }
2341     48d8:       [0-9a-f]*       { v1minu r15, r16, r17 }
2342     48e0:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 }
2343     48e8:       [0-9a-f]*       { v2packuc r15, r16, r17 }
2344     48f0:       [0-9a-f]*       { v4shru r15, r16, r17 }
2345     48f8:       [0-9a-f]*       { xor r5, r6, r7 ; st r25, r26 }
2346     4900:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; fetchor4 r15, r16, r17 }
2347     4908:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; ldnt4s r15, r16 }
2348     4910:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; shl3add r15, r16, r17 }
2349     4918:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; v1cmpltui r15, r16, 5 }
2350     4920:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; v2packuc r15, r16, r17 }
2351     4928:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; cmpltsi r15, r16, 5 }
2352     4930:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; ld2u_add r15, r16, 5 }
2353     4938:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; prefetch_add_l3 r15, 5 }
2354     4940:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; stnt2_add r15, r16, 5 }
2355     4948:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; v2cmples r15, r16, r17 }
2356     4950:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; xori r15, r16, 5 }
2357     4958:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; ill }
2358     4960:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; mf }
2359     4968:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; shrsi r15, r16, 5 }
2360     4970:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; v1minu r15, r16, r17 }
2361     4978:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; v2shru r15, r16, r17 }
2362     4980:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; dblalign6 r15, r16, r17 }
2363     4988:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; ldna r15, r16 }
2364     4990:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; prefetch_l3 r15 }
2365     4998:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; subxsc r15, r16, r17 }
2366     49a0:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; v2cmpne r15, r16, r17 }
2367     49a8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; add r15, r16, r17 ; ld4s r25, r26 }
2368     49b0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 }
2369     49b8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; ld4u r25, r26 }
2370     49c0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch r25 }
2371     49c8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
2372     49d0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
2373     49d8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
2374     49e0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; fetchor4 r15, r16, r17 }
2375     49e8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; ill ; st2 r25, r26 }
2376     49f0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; jalr r15 ; st1 r25, r26 }
2377     49f8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; jr r15 ; st4 r25, r26 }
2378     4a00:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; jalrp r15 ; ld r25, r26 }
2379     4a08:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
2380     4a10:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; addi r15, r16, 5 ; ld1u r25, r26 }
2381     4a18:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shru r15, r16, r17 ; ld1u r25, r26 }
2382     4a20:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
2383     4a28:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; move r15, r16 ; ld2u r25, r26 }
2384     4a30:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; ld4s r25, r26 }
2385     4a38:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; ld4u r25, r26 }
2386     4a40:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; ld4u r25, r26 }
2387     4a48:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
2388     4a50:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; movei r15, 5 ; ld1s r25, r26 }
2389     4a58:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; nop ; ld1s r25, r26 }
2390     4a60:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 }
2391     4a68:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; prefetch r25 }
2392     4a70:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
2393     4a78:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
2394     4a80:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
2395     4a88:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
2396     4a90:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; movei r15, 5 ; prefetch_l2_fault r25 }
2397     4a98:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; info 19 ; prefetch_l3 r25 }
2398     4aa0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
2399     4aa8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; rotl r15, r16, r17 ; ld r25, r26 }
2400     4ab0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 }
2401     4ab8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
2402     4ac0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
2403     4ac8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch r25 }
2404     4ad0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
2405     4ad8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
2406     4ae0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; st r25, r26 }
2407     4ae8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; add r15, r16, r17 ; st1 r25, r26 }
2408     4af0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shrsi r15, r16, 5 ; st1 r25, r26 }
2409     4af8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; st2 r25, r26 }
2410     4b00:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; st4 r25, r26 }
2411     4b08:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld4s r25, r26 }
2412     4b10:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; v1cmpleu r15, r16, r17 }
2413     4b18:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; v2mnz r15, r16, r17 }
2414     4b20:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; st r25, r26 }
2415     4b28:       [0-9a-f]*       { fsingle_pack2 r5, r6, r7 ; finv r15 }
2416     4b30:       [0-9a-f]*       { fsingle_pack2 r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
2417     4b38:       [0-9a-f]*       { fsingle_pack2 r5, r6, r7 ; shl3addx r15, r16, r17 }
2418     4b40:       [0-9a-f]*       { fsingle_pack2 r5, r6, r7 ; v1cmpne r15, r16, r17 }
2419     4b48:       [0-9a-f]*       { fsingle_pack2 r5, r6, r7 ; v2shl r15, r16, r17 }
2420     4b50:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; cmpltu r15, r16, r17 }
2421     4b58:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; ld4s r15, r16 }
2422     4b60:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
2423     4b68:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; stnt4 r15, r16 }
2424     4b70:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; v2cmpleu r15, r16, r17 }
2425     4b78:       [0-9a-f]*       { add r5, r6, r7 ; icoh r15 }
2426     4b80:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; icoh r15 }
2427     4b88:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; icoh r15 }
2428     4b90:       [0-9a-f]*       { v1adduc r5, r6, r7 ; icoh r15 }
2429     4b98:       [0-9a-f]*       { v1shrui r5, r6, 5 ; icoh r15 }
2430     4ba0:       [0-9a-f]*       { v2shrs r5, r6, r7 ; icoh r15 }
2431     4ba8:       [0-9a-f]*       { addi r5, r6, 5 ; ill ; ld1u r25, r26 }
2432     4bb0:       [0-9a-f]*       { addxi r5, r6, 5 ; ill ; ld2s r25, r26 }
2433     4bb8:       [0-9a-f]*       { andi r5, r6, 5 ; ill ; ld2s r25, r26 }
2434     4bc0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; ill ; ld1u r25, r26 }
2435     4bc8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; ill ; ld2u r25, r26 }
2436     4bd0:       [0-9a-f]*       { cmples r5, r6, r7 ; ill ; ld4u r25, r26 }
2437     4bd8:       [0-9a-f]*       { cmplts r5, r6, r7 ; ill ; prefetch r25 }
2438     4be0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ill ; prefetch_l2 r25 }
2439     4be8:       [0-9a-f]*       { ctz r5, r6 ; ill ; ld1u r25, r26 }
2440     4bf0:       [0-9a-f]*       { ill ; prefetch_l2_fault r25 }
2441     4bf8:       [0-9a-f]*       { info 19 ; ill ; prefetch r25 }
2442     4c00:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ill ; ld r25, r26 }
2443     4c08:       [0-9a-f]*       { and r5, r6, r7 ; ill ; ld1s r25, r26 }
2444     4c10:       [0-9a-f]*       { shl1add r5, r6, r7 ; ill ; ld1s r25, r26 }
2445     4c18:       [0-9a-f]*       { mnz r5, r6, r7 ; ill ; ld1u r25, r26 }
2446     4c20:       [0-9a-f]*       { xor r5, r6, r7 ; ill ; ld1u r25, r26 }
2447     4c28:       [0-9a-f]*       { pcnt r5, r6 ; ill ; ld2s r25, r26 }
2448     4c30:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ill ; ld2u r25, r26 }
2449     4c38:       [0-9a-f]*       { sub r5, r6, r7 ; ill ; ld2u r25, r26 }
2450     4c40:       [0-9a-f]*       { mulax r5, r6, r7 ; ill ; ld4s r25, r26 }
2451     4c48:       [0-9a-f]*       { cmpeq r5, r6, r7 ; ill ; ld4u r25, r26 }
2452     4c50:       [0-9a-f]*       { shl3addx r5, r6, r7 ; ill ; ld4u r25, r26 }
2453     4c58:       [0-9a-f]*       { move r5, r6 ; ill ; ld4u r25, r26 }
2454     4c60:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; ill ; prefetch r25 }
2455     4c68:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; ill ; ld2u r25, r26 }
2456     4c70:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; ill ; ld4s r25, r26 }
2457     4c78:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; ill ; ld1u r25, r26 }
2458     4c80:       [0-9a-f]*       { mulax r5, r6, r7 ; ill ; ld2s r25, r26 }
2459     4c88:       [0-9a-f]*       { mz r5, r6, r7 ; ill ; ld4s r25, r26 }
2460     4c90:       [0-9a-f]*       { nor r5, r6, r7 ; ill ; prefetch r25 }
2461     4c98:       [0-9a-f]*       { pcnt r5, r6 ; ill ; prefetch r25 }
2462     4ca0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; ill ; prefetch r25 }
2463     4ca8:       [0-9a-f]*       { clz r5, r6 ; ill ; prefetch r25 }
2464     4cb0:       [0-9a-f]*       { shl2add r5, r6, r7 ; ill ; prefetch r25 }
2465     4cb8:       [0-9a-f]*       { movei r5, 5 ; ill ; prefetch_l1_fault r25 }
2466     4cc0:       [0-9a-f]*       { add r5, r6, r7 ; ill ; prefetch_l2 r25 }
2467     4cc8:       [0-9a-f]*       { revbytes r5, r6 ; ill ; prefetch_l2 r25 }
2468     4cd0:       [0-9a-f]*       { ctz r5, r6 ; ill ; prefetch_l2_fault r25 }
2469     4cd8:       [0-9a-f]*       { tblidxb0 r5, r6 ; ill ; prefetch_l2_fault r25 }
2470     4ce0:       [0-9a-f]*       { mz r5, r6, r7 ; ill ; prefetch_l3 r25 }
2471     4ce8:       [0-9a-f]*       { cmples r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
2472     4cf0:       [0-9a-f]*       { shrs r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
2473     4cf8:       [0-9a-f]*       { revbytes r5, r6 ; ill ; prefetch_l1_fault r25 }
2474     4d00:       [0-9a-f]*       { rotli r5, r6, 5 ; ill ; prefetch_l2_fault r25 }
2475     4d08:       [0-9a-f]*       { shl1add r5, r6, r7 ; ill ; prefetch_l3 r25 }
2476     4d10:       [0-9a-f]*       { shl2add r5, r6, r7 ; ill ; st r25, r26 }
2477     4d18:       [0-9a-f]*       { shl3add r5, r6, r7 ; ill ; st2 r25, r26 }
2478     4d20:       [0-9a-f]*       { shli r5, r6, 5 ; ill }
2479     4d28:       [0-9a-f]*       { shrsi r5, r6, 5 ; ill }
2480     4d30:       [0-9a-f]*       { shruxi r5, r6, 5 ; ill }
2481     4d38:       [0-9a-f]*       { pcnt r5, r6 ; ill ; st r25, r26 }
2482     4d40:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ill ; st1 r25, r26 }
2483     4d48:       [0-9a-f]*       { sub r5, r6, r7 ; ill ; st1 r25, r26 }
2484     4d50:       [0-9a-f]*       { mulax r5, r6, r7 ; ill ; st2 r25, r26 }
2485     4d58:       [0-9a-f]*       { cmpeq r5, r6, r7 ; ill ; st4 r25, r26 }
2486     4d60:       [0-9a-f]*       { shl3addx r5, r6, r7 ; ill ; st4 r25, r26 }
2487     4d68:       [0-9a-f]*       { subx r5, r6, r7 ; ill ; prefetch r25 }
2488     4d70:       [0-9a-f]*       { tblidxb1 r5, r6 ; ill ; prefetch r25 }
2489     4d78:       [0-9a-f]*       { tblidxb3 r5, r6 ; ill ; prefetch_l2 r25 }
2490     4d80:       [0-9a-f]*       { v1multu r5, r6, r7 ; ill }
2491     4d88:       [0-9a-f]*       { v2mz r5, r6, r7 ; ill }
2492     4d90:       [0-9a-f]*       { xor r5, r6, r7 ; ill ; prefetch_l3 r25 }
2493     4d98:       [0-9a-f]*       { info 19 ; add r5, r6, r7 ; prefetch_l3_fault r25 }
2494     4da0:       [0-9a-f]*       { info 19 ; addi r5, r6, 5 ; st1 r25, r26 }
2495     4da8:       [0-9a-f]*       { info 19 ; addx r5, r6, r7 ; st1 r25, r26 }
2496     4db0:       [0-9a-f]*       { info 19 ; addxi r5, r6, 5 ; st4 r25, r26 }
2497     4db8:       [0-9a-f]*       { info 19 ; and r5, r6, r7 ; st1 r25, r26 }
2498     4dc0:       [0-9a-f]*       { info 19 ; andi r5, r6, 5 ; st4 r25, r26 }
2499     4dc8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; info 19 ; st2 r25, r26 }
2500     4dd0:       [0-9a-f]*       { info 19 ; cmpeq r15, r16, r17 }
2501     4dd8:       [0-9a-f]*       { info 19 ; cmpeqi r5, r6, 5 ; ld1s r25, r26 }
2502     4de0:       [0-9a-f]*       { info 19 ; cmples r5, r6, r7 ; ld1s r25, r26 }
2503     4de8:       [0-9a-f]*       { info 19 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
2504     4df0:       [0-9a-f]*       { info 19 ; cmplts r5, r6, r7 ; ld4s r25, r26 }
2505     4df8:       [0-9a-f]*       { info 19 ; cmpltsi r5, r6, 5 ; prefetch r25 }
2506     4e00:       [0-9a-f]*       { info 19 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
2507     4e08:       [0-9a-f]*       { info 19 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 }
2508     4e10:       [0-9a-f]*       { info 19 ; dblalign2 r5, r6, r7 }
2509     4e18:       [0-9a-f]*       { info 19 ; prefetch_l3_fault r25 }
2510     4e20:       [0-9a-f]*       { info 19 ; ill ; prefetch r25 }
2511     4e28:       [0-9a-f]*       { info 19 ; jalr r15 ; prefetch r25 }
2512     4e30:       [0-9a-f]*       { info 19 ; jr r15 ; prefetch_l1_fault r25 }
2513     4e38:       [0-9a-f]*       { info 19 ; andi r15, r16, 5 ; ld r25, r26 }
2514     4e40:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; info 19 ; ld r25, r26 }
2515     4e48:       [0-9a-f]*       { info 19 ; shrsi r5, r6, 5 ; ld r25, r26 }
2516     4e50:       [0-9a-f]*       { info 19 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
2517     4e58:       [0-9a-f]*       { info 19 ; or r5, r6, r7 ; ld1s r25, r26 }
2518     4e60:       [0-9a-f]*       { info 19 ; xor r15, r16, r17 ; ld1s r25, r26 }
2519     4e68:       [0-9a-f]*       { info 19 ; info 19 ; ld1u r25, r26 }
2520     4e70:       [0-9a-f]*       { info 19 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
2521     4e78:       [0-9a-f]*       { info 19 ; addxi r5, r6, 5 ; ld2s r25, r26 }
2522     4e80:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; info 19 ; ld2s r25, r26 }
2523     4e88:       [0-9a-f]*       { info 19 ; shrs r15, r16, r17 ; ld2s r25, r26 }
2524     4e90:       [0-9a-f]*       { info 19 ; cmples r15, r16, r17 ; ld2u r25, r26 }
2525     4e98:       [0-9a-f]*       { info 19 ; nop ; ld2u r25, r26 }
2526     4ea0:       [0-9a-f]*       { tblidxb0 r5, r6 ; info 19 ; ld2u r25, r26 }
2527     4ea8:       [0-9a-f]*       { ctz r5, r6 ; info 19 ; ld4s r25, r26 }
2528     4eb0:       [0-9a-f]*       { info 19 ; shl r15, r16, r17 ; ld4s r25, r26 }
2529     4eb8:       [0-9a-f]*       { info 19 ; addi r5, r6, 5 ; ld4u r25, r26 }
2530     4ec0:       [0-9a-f]*       { info 19 ; move r15, r16 ; ld4u r25, r26 }
2531     4ec8:       [0-9a-f]*       { info 19 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
2532     4ed0:       [0-9a-f]*       { info 19 ; ldnt_add r15, r16, 5 }
2533     4ed8:       [0-9a-f]*       { info 19 ; mnz r15, r16, r17 ; st4 r25, r26 }
2534     4ee0:       [0-9a-f]*       { info 19 ; move r5, r6 ; ld r25, r26 }
2535     4ee8:       [0-9a-f]*       { info 19 ; movei r5, 5 ; ld1u r25, r26 }
2536     4ef0:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; info 19 }
2537     4ef8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; info 19 ; st4 r25, r26 }
2538     4f00:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; info 19 }
2539     4f08:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; info 19 ; st1 r25, r26 }
2540     4f10:       [0-9a-f]*       { mulax r5, r6, r7 ; info 19 ; st2 r25, r26 }
2541     4f18:       [0-9a-f]*       { info 19 ; mz r15, r16, r17 }
2542     4f20:       [0-9a-f]*       { info 19 ; nor r15, r16, r17 ; ld1s r25, r26 }
2543     4f28:       [0-9a-f]*       { info 19 ; or r15, r16, r17 ; ld2s r25, r26 }
2544     4f30:       [0-9a-f]*       { pcnt r5, r6 ; info 19 ; ld2s r25, r26 }
2545     4f38:       [0-9a-f]*       { info 19 ; cmplts r15, r16, r17 ; prefetch r25 }
2546     4f40:       [0-9a-f]*       { info 19 ; or r5, r6, r7 ; prefetch r25 }
2547     4f48:       [0-9a-f]*       { info 19 ; xor r15, r16, r17 ; prefetch r25 }
2548     4f50:       [0-9a-f]*       { info 19 ; cmpne r5, r6, r7 ; prefetch r25 }
2549     4f58:       [0-9a-f]*       { info 19 ; rotli r5, r6, 5 ; prefetch r25 }
2550     4f60:       [0-9a-f]*       { info 19 ; addi r5, r6, 5 ; prefetch_l1_fault r25 }
2551     4f68:       [0-9a-f]*       { info 19 ; move r15, r16 ; prefetch_l1_fault r25 }
2552     4f70:       [0-9a-f]*       { info 19 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
2553     4f78:       [0-9a-f]*       { info 19 ; cmpeq r5, r6, r7 ; prefetch_l2 r25 }
2554     4f80:       [0-9a-f]*       { mulx r5, r6, r7 ; info 19 ; prefetch_l2 r25 }
2555     4f88:       [0-9a-f]*       { info 19 ; sub r5, r6, r7 ; prefetch_l2 r25 }
2556     4f90:       [0-9a-f]*       { info 19 ; cmpne r15, r16, r17 ; prefetch_l2_fault r25 }
2557     4f98:       [0-9a-f]*       { info 19 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
2558     4fa0:       [0-9a-f]*       { info 19 ; addi r15, r16, 5 ; prefetch_l3 r25 }
2559     4fa8:       [0-9a-f]*       { info 19 ; mnz r5, r6, r7 ; prefetch_l3 r25 }
2560     4fb0:       [0-9a-f]*       { info 19 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
2561     4fb8:       [0-9a-f]*       { info 19 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
2562     4fc0:       [0-9a-f]*       { mulax r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
2563     4fc8:       [0-9a-f]*       { info 19 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
2564     4fd0:       [0-9a-f]*       { revbytes r5, r6 ; info 19 ; prefetch_l1_fault r25 }
2565     4fd8:       [0-9a-f]*       { info 19 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
2566     4fe0:       [0-9a-f]*       { info 19 ; rotli r5, r6, 5 ; prefetch_l3_fault r25 }
2567     4fe8:       [0-9a-f]*       { info 19 ; shl r5, r6, r7 ; st1 r25, r26 }
2568     4ff0:       [0-9a-f]*       { info 19 ; shl1add r5, r6, r7 ; st1 r25, r26 }
2569     4ff8:       [0-9a-f]*       { info 19 ; shl1addx r5, r6, r7 ; st4 r25, r26 }
2570     5000:       [0-9a-f]*       { info 19 ; shl2addx r15, r16, r17 ; ld r25, r26 }
2571     5008:       [0-9a-f]*       { info 19 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
2572     5010:       [0-9a-f]*       { info 19 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
2573     5018:       [0-9a-f]*       { info 19 ; shli r15, r16, 5 ; ld4u r25, r26 }
2574     5020:       [0-9a-f]*       { info 19 ; shrs r15, r16, r17 ; ld2u r25, r26 }
2575     5028:       [0-9a-f]*       { info 19 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
2576     5030:       [0-9a-f]*       { info 19 ; shru r15, r16, r17 ; prefetch r25 }
2577     5038:       [0-9a-f]*       { info 19 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
2578     5040:       [0-9a-f]*       { info 19 ; addxi r15, r16, 5 ; st r25, r26 }
2579     5048:       [0-9a-f]*       { info 19 ; movei r5, 5 ; st r25, r26 }
2580     5050:       [0-9a-f]*       { info 19 ; shli r5, r6, 5 ; st r25, r26 }
2581     5058:       [0-9a-f]*       { info 19 ; cmples r15, r16, r17 ; st1 r25, r26 }
2582     5060:       [0-9a-f]*       { info 19 ; nop ; st1 r25, r26 }
2583     5068:       [0-9a-f]*       { tblidxb0 r5, r6 ; info 19 ; st1 r25, r26 }
2584     5070:       [0-9a-f]*       { ctz r5, r6 ; info 19 ; st2 r25, r26 }
2585     5078:       [0-9a-f]*       { info 19 ; shl r15, r16, r17 ; st2 r25, r26 }
2586     5080:       [0-9a-f]*       { info 19 ; addi r5, r6, 5 ; st4 r25, r26 }
2587     5088:       [0-9a-f]*       { info 19 ; move r15, r16 ; st4 r25, r26 }
2588     5090:       [0-9a-f]*       { info 19 ; shl3addx r15, r16, r17 ; st4 r25, r26 }
2589     5098:       [0-9a-f]*       { info 19 ; sub r15, r16, r17 ; prefetch r25 }
2590     50a0:       [0-9a-f]*       { info 19 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
2591     50a8:       [0-9a-f]*       { tblidxb0 r5, r6 ; info 19 ; prefetch_l1_fault r25 }
2592     50b0:       [0-9a-f]*       { tblidxb2 r5, r6 ; info 19 ; prefetch_l2_fault r25 }
2593     50b8:       [0-9a-f]*       { info 19 ; v1cmples r5, r6, r7 }
2594     50c0:       [0-9a-f]*       { info 19 ; v1mz r15, r16, r17 }
2595     50c8:       [0-9a-f]*       { info 19 ; v2cmpltu r15, r16, r17 }
2596     50d0:       [0-9a-f]*       { info 19 ; v2shli r5, r6, 5 }
2597     50d8:       [0-9a-f]*       { info 19 ; xor r15, r16, r17 ; ld1u r25, r26 }
2598     50e0:       [0-9a-f]*       { infol 4660 ; addi r15, r16, 5 }
2599     50e8:       [0-9a-f]*       { infol 4660 ; cmpne r15, r16, r17 }
2600     50f0:       [0-9a-f]*       { infol 4660 ; flushwb }
2601     50f8:       [0-9a-f]*       { infol 4660 ; ldnt2s r15, r16 }
2602     5100:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; infol 4660 }
2603     5108:       [0-9a-f]*       { infol 4660 ; shl1addx r15, r16, r17 }
2604     5110:       [0-9a-f]*       { infol 4660 ; stnt2 r15, r16 }
2605     5118:       [0-9a-f]*       { infol 4660 ; v1cmpne r5, r6, r7 }
2606     5120:       [0-9a-f]*       { infol 4660 ; v1shru r15, r16, r17 }
2607     5128:       [0-9a-f]*       { infol 4660 ; v2maxs r15, r16, r17 }
2608     5130:       [0-9a-f]*       { infol 4660 ; v2sub r5, r6, r7 }
2609     5138:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; inv r15 }
2610     5140:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; inv r15 }
2611     5148:       [0-9a-f]*       { revbytes r5, r6 ; inv r15 }
2612     5150:       [0-9a-f]*       { v1cmpltui r5, r6, 5 ; inv r15 }
2613     5158:       [0-9a-f]*       { v2cmples r5, r6, r7 ; inv r15 }
2614     5160:       [0-9a-f]*       { v4packsc r5, r6, r7 ; inv r15 }
2615     5168:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; iret }
2616     5170:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; iret }
2617     5178:       [0-9a-f]*       { sub r5, r6, r7 ; iret }
2618     5180:       [0-9a-f]*       { v1mulus r5, r6, r7 ; iret }
2619     5188:       [0-9a-f]*       { v2packl r5, r6, r7 ; iret }
2620     5190:       [0-9a-f]*       { add r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
2621     5198:       [0-9a-f]*       { addx r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
2622     51a0:       [0-9a-f]*       { and r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
2623     51a8:       [0-9a-f]*       { clz r5, r6 ; jalr r15 ; prefetch_l3 r25 }
2624     51b0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jalr r15 ; st r25, r26 }
2625     51b8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jalr r15 ; st2 r25, r26 }
2626     51c0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jalr r15 }
2627     51c8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
2628     51d0:       [0-9a-f]*       { cmulaf r5, r6, r7 ; jalr r15 }
2629     51d8:       [0-9a-f]*       { jalr r15 ; ld1u r25, r26 }
2630     51e0:       [0-9a-f]*       { fsingle_pack2 r5, r6, r7 ; jalr r15 }
2631     51e8:       [0-9a-f]*       { jalr r15 ; ld r25, r26 }
2632     51f0:       [0-9a-f]*       { tblidxb1 r5, r6 ; jalr r15 ; ld r25, r26 }
2633     51f8:       [0-9a-f]*       { nop ; jalr r15 ; ld1s r25, r26 }
2634     5200:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jalr r15 ; ld1u r25, r26 }
2635     5208:       [0-9a-f]*       { shrsi r5, r6, 5 ; jalr r15 ; ld1u r25, r26 }
2636     5210:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
2637     5218:       [0-9a-f]*       { clz r5, r6 ; jalr r15 ; ld2u r25, r26 }
2638     5220:       [0-9a-f]*       { shl2add r5, r6, r7 ; jalr r15 ; ld2u r25, r26 }
2639     5228:       [0-9a-f]*       { movei r5, 5 ; jalr r15 ; ld4s r25, r26 }
2640     5230:       [0-9a-f]*       { add r5, r6, r7 ; jalr r15 ; ld4u r25, r26 }
2641     5238:       [0-9a-f]*       { revbytes r5, r6 ; jalr r15 ; ld4u r25, r26 }
2642     5240:       [0-9a-f]*       { mnz r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
2643     5248:       [0-9a-f]*       { movei r5, 5 ; jalr r15 }
2644     5250:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
2645     5258:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
2646     5260:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jalr r15 ; st r25, r26 }
2647     5268:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
2648     5270:       [0-9a-f]*       { mulx r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
2649     5278:       [0-9a-f]*       { nop ; jalr r15 ; st4 r25, r26 }
2650     5280:       [0-9a-f]*       { ori r5, r6, 5 ; jalr r15 }
2651     5288:       [0-9a-f]*       { info 19 ; jalr r15 ; prefetch r25 }
2652     5290:       [0-9a-f]*       { tblidxb3 r5, r6 ; jalr r15 ; prefetch r25 }
2653     5298:       [0-9a-f]*       { or r5, r6, r7 ; jalr r15 ; prefetch r25 }
2654     52a0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 }
2655     52a8:       [0-9a-f]*       { shrui r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 }
2656     52b0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
2657     52b8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
2658     52c0:       [0-9a-f]*       { shl3add r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
2659     52c8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
2660     52d0:       [0-9a-f]*       { addx r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
2661     52d8:       [0-9a-f]*       { rotli r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 }
2662     52e0:       [0-9a-f]*       { revbytes r5, r6 ; jalr r15 ; ld r25, r26 }
2663     52e8:       [0-9a-f]*       { rotli r5, r6, 5 ; jalr r15 ; ld1u r25, r26 }
2664     52f0:       [0-9a-f]*       { shl1add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
2665     52f8:       [0-9a-f]*       { shl2add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
2666     5300:       [0-9a-f]*       { shl3add r5, r6, r7 ; jalr r15 ; prefetch r25 }
2667     5308:       [0-9a-f]*       { shli r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 }
2668     5310:       [0-9a-f]*       { shrsi r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 }
2669     5318:       [0-9a-f]*       { shrui r5, r6, 5 ; jalr r15 ; prefetch_l2_fault r25 }
2670     5320:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jalr r15 ; st r25, r26 }
2671     5328:       [0-9a-f]*       { clz r5, r6 ; jalr r15 ; st1 r25, r26 }
2672     5330:       [0-9a-f]*       { shl2add r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
2673     5338:       [0-9a-f]*       { movei r5, 5 ; jalr r15 ; st2 r25, r26 }
2674     5340:       [0-9a-f]*       { add r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
2675     5348:       [0-9a-f]*       { revbytes r5, r6 ; jalr r15 ; st4 r25, r26 }
2676     5350:       [0-9a-f]*       { sub r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
2677     5358:       [0-9a-f]*       { tblidxb0 r5, r6 ; jalr r15 }
2678     5360:       [0-9a-f]*       { tblidxb3 r5, r6 ; jalr r15 ; ld1s r25, r26 }
2679     5368:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; jalr r15 }
2680     5370:       [0-9a-f]*       { v2int_l r5, r6, r7 ; jalr r15 }
2681     5378:       [0-9a-f]*       { xor r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
2682     5380:       [0-9a-f]*       { addi r5, r6, 5 ; jalrp r15 ; ld2u r25, r26 }
2683     5388:       [0-9a-f]*       { addxi r5, r6, 5 ; jalrp r15 ; ld4s r25, r26 }
2684     5390:       [0-9a-f]*       { andi r5, r6, 5 ; jalrp r15 ; ld4s r25, r26 }
2685     5398:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
2686     53a0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
2687     53a8:       [0-9a-f]*       { cmples r5, r6, r7 ; jalrp r15 ; prefetch r25 }
2688     53b0:       [0-9a-f]*       { cmplts r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
2689     53b8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
2690     53c0:       [0-9a-f]*       { ctz r5, r6 ; jalrp r15 ; ld2u r25, r26 }
2691     53c8:       [0-9a-f]*       { jalrp r15 ; prefetch_l3_fault r25 }
2692     53d0:       [0-9a-f]*       { info 19 ; jalrp r15 ; prefetch_l1_fault r25 }
2693     53d8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
2694     53e0:       [0-9a-f]*       { clz r5, r6 ; jalrp r15 ; ld1s r25, r26 }
2695     53e8:       [0-9a-f]*       { shl2add r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
2696     53f0:       [0-9a-f]*       { movei r5, 5 ; jalrp r15 ; ld1u r25, r26 }
2697     53f8:       [0-9a-f]*       { add r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
2698     5400:       [0-9a-f]*       { revbytes r5, r6 ; jalrp r15 ; ld2s r25, r26 }
2699     5408:       [0-9a-f]*       { ctz r5, r6 ; jalrp r15 ; ld2u r25, r26 }
2700     5410:       [0-9a-f]*       { tblidxb0 r5, r6 ; jalrp r15 ; ld2u r25, r26 }
2701     5418:       [0-9a-f]*       { mz r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 }
2702     5420:       [0-9a-f]*       { cmples r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
2703     5428:       [0-9a-f]*       { shrs r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
2704     5430:       [0-9a-f]*       { move r5, r6 ; jalrp r15 ; prefetch r25 }
2705     5438:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
2706     5440:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
2707     5448:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch r25 }
2708     5450:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
2709     5458:       [0-9a-f]*       { mulax r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 }
2710     5460:       [0-9a-f]*       { mz r5, r6, r7 ; jalrp r15 ; prefetch r25 }
2711     5468:       [0-9a-f]*       { nor r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
2712     5470:       [0-9a-f]*       { pcnt r5, r6 ; jalrp r15 ; prefetch_l2 r25 }
2713     5478:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; jalrp r15 ; prefetch r25 }
2714     5480:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jalrp r15 ; prefetch r25 }
2715     5488:       [0-9a-f]*       { shl3add r5, r6, r7 ; jalrp r15 ; prefetch r25 }
2716     5490:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
2717     5498:       [0-9a-f]*       { addx r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
2718     54a0:       [0-9a-f]*       { rotli r5, r6, 5 ; jalrp r15 ; prefetch_l2 r25 }
2719     54a8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
2720     54b0:       [0-9a-f]*       { tblidxb2 r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
2721     54b8:       [0-9a-f]*       { nor r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
2722     54c0:       [0-9a-f]*       { cmplts r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
2723     54c8:       [0-9a-f]*       { shru r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
2724     54d0:       [0-9a-f]*       { revbytes r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
2725     54d8:       [0-9a-f]*       { rotli r5, r6, 5 ; jalrp r15 ; prefetch_l3_fault r25 }
2726     54e0:       [0-9a-f]*       { shl1add r5, r6, r7 ; jalrp r15 ; st r25, r26 }
2727     54e8:       [0-9a-f]*       { shl2add r5, r6, r7 ; jalrp r15 ; st2 r25, r26 }
2728     54f0:       [0-9a-f]*       { shl3add r5, r6, r7 ; jalrp r15 }
2729     54f8:       [0-9a-f]*       { shlxi r5, r6, 5 ; jalrp r15 }
2730     5500:       [0-9a-f]*       { shru r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
2731     5508:       [0-9a-f]*       { add r5, r6, r7 ; jalrp r15 ; st r25, r26 }
2732     5510:       [0-9a-f]*       { revbytes r5, r6 ; jalrp r15 ; st r25, r26 }
2733     5518:       [0-9a-f]*       { ctz r5, r6 ; jalrp r15 ; st1 r25, r26 }
2734     5520:       [0-9a-f]*       { tblidxb0 r5, r6 ; jalrp r15 ; st1 r25, r26 }
2735     5528:       [0-9a-f]*       { mz r5, r6, r7 ; jalrp r15 ; st2 r25, r26 }
2736     5530:       [0-9a-f]*       { cmples r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
2737     5538:       [0-9a-f]*       { shrs r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
2738     5540:       [0-9a-f]*       { subx r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
2739     5548:       [0-9a-f]*       { tblidxb1 r5, r6 ; jalrp r15 ; prefetch_l2 r25 }
2740     5550:       [0-9a-f]*       { tblidxb3 r5, r6 ; jalrp r15 ; prefetch_l3 r25 }
2741     5558:       [0-9a-f]*       { v1mulus r5, r6, r7 ; jalrp r15 }
2742     5560:       [0-9a-f]*       { v2packl r5, r6, r7 ; jalrp r15 }
2743     5568:       [0-9a-f]*       { xor r5, r6, r7 ; jalrp r15 ; st r25, r26 }
2744     5570:       [0-9a-f]*       { addi r5, r6, 5 ; jr r15 ; st1 r25, r26 }
2745     5578:       [0-9a-f]*       { addxi r5, r6, 5 ; jr r15 ; st2 r25, r26 }
2746     5580:       [0-9a-f]*       { andi r5, r6, 5 ; jr r15 ; st2 r25, r26 }
2747     5588:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jr r15 ; st1 r25, r26 }
2748     5590:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jr r15 ; st4 r25, r26 }
2749     5598:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jr r15 ; ld r25, r26 }
2750     55a0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; jr r15 ; ld1u r25, r26 }
2751     55a8:       [0-9a-f]*       { cmpne r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
2752     55b0:       [0-9a-f]*       { ctz r5, r6 ; jr r15 ; st1 r25, r26 }
2753     55b8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; jr r15 ; ld1s r25, r26 }
2754     55c0:       [0-9a-f]*       { add r5, r6, r7 ; jr r15 ; ld r25, r26 }
2755     55c8:       [0-9a-f]*       { revbytes r5, r6 ; jr r15 ; ld r25, r26 }
2756     55d0:       [0-9a-f]*       { ctz r5, r6 ; jr r15 ; ld1s r25, r26 }
2757     55d8:       [0-9a-f]*       { tblidxb0 r5, r6 ; jr r15 ; ld1s r25, r26 }
2758     55e0:       [0-9a-f]*       { mz r5, r6, r7 ; jr r15 ; ld1u r25, r26 }
2759     55e8:       [0-9a-f]*       { cmples r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
2760     55f0:       [0-9a-f]*       { shrs r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
2761     55f8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
2762     5600:       [0-9a-f]*       { andi r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
2763     5608:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
2764     5610:       [0-9a-f]*       { move r5, r6 ; jr r15 ; ld4u r25, r26 }
2765     5618:       [0-9a-f]*       { jr r15 ; ld4u r25, r26 }
2766     5620:       [0-9a-f]*       { movei r5, 5 ; jr r15 ; ld r25, r26 }
2767     5628:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; jr r15 }
2768     5630:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jr r15 ; st4 r25, r26 }
2769     5638:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jr r15 }
2770     5640:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jr r15 ; st1 r25, r26 }
2771     5648:       [0-9a-f]*       { mulax r5, r6, r7 ; jr r15 ; st2 r25, r26 }
2772     5650:       [0-9a-f]*       { mz r5, r6, r7 ; jr r15 }
2773     5658:       [0-9a-f]*       { or r5, r6, r7 ; jr r15 ; ld1s r25, r26 }
2774     5660:       [0-9a-f]*       { addx r5, r6, r7 ; jr r15 ; prefetch r25 }
2775     5668:       [0-9a-f]*       { rotli r5, r6, 5 ; jr r15 ; prefetch r25 }
2776     5670:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; jr r15 ; prefetch r25 }
2777     5678:       [0-9a-f]*       { tblidxb2 r5, r6 ; jr r15 ; prefetch r25 }
2778     5680:       [0-9a-f]*       { nor r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
2779     5688:       [0-9a-f]*       { cmplts r5, r6, r7 ; jr r15 ; prefetch_l2 r25 }
2780     5690:       [0-9a-f]*       { shru r5, r6, r7 ; jr r15 ; prefetch_l2 r25 }
2781     5698:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
2782     56a0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
2783     56a8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
2784     56b0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 }
2785     56b8:       [0-9a-f]*       { revbits r5, r6 ; jr r15 ; ld1s r25, r26 }
2786     56c0:       [0-9a-f]*       { rotl r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
2787     56c8:       [0-9a-f]*       { shl r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
2788     56d0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jr r15 ; ld4u r25, r26 }
2789     56d8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; jr r15 ; prefetch r25 }
2790     56e0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; jr r15 ; prefetch_l2 r25 }
2791     56e8:       [0-9a-f]*       { shrs r5, r6, r7 ; jr r15 ; prefetch_l2 r25 }
2792     56f0:       [0-9a-f]*       { shru r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
2793     56f8:       [0-9a-f]*       { cmples r5, r6, r7 ; jr r15 ; st r25, r26 }
2794     5700:       [0-9a-f]*       { shrs r5, r6, r7 ; jr r15 ; st r25, r26 }
2795     5708:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jr r15 ; st1 r25, r26 }
2796     5710:       [0-9a-f]*       { andi r5, r6, 5 ; jr r15 ; st2 r25, r26 }
2797     5718:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jr r15 ; st2 r25, r26 }
2798     5720:       [0-9a-f]*       { move r5, r6 ; jr r15 ; st4 r25, r26 }
2799     5728:       [0-9a-f]*       { jr r15 ; st4 r25, r26 }
2800     5730:       [0-9a-f]*       { tblidxb0 r5, r6 ; jr r15 ; ld r25, r26 }
2801     5738:       [0-9a-f]*       { tblidxb2 r5, r6 ; jr r15 ; ld1u r25, r26 }
2802     5740:       [0-9a-f]*       { v1avgu r5, r6, r7 ; jr r15 }
2803     5748:       [0-9a-f]*       { v1subuc r5, r6, r7 ; jr r15 }
2804     5750:       [0-9a-f]*       { v2shru r5, r6, r7 ; jr r15 }
2805     5758:       [0-9a-f]*       { add r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
2806     5760:       [0-9a-f]*       { addx r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
2807     5768:       [0-9a-f]*       { and r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
2808     5770:       [0-9a-f]*       { clz r5, r6 ; jrp r15 ; ld4s r25, r26 }
2809     5778:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jrp r15 ; prefetch r25 }
2810     5780:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jrp r15 ; prefetch_l1_fault r25 }
2811     5788:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jrp r15 ; prefetch_l2_fault r25 }
2812     5790:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; jrp r15 ; prefetch_l3_fault r25 }
2813     5798:       [0-9a-f]*       { cmpne r5, r6, r7 ; jrp r15 ; st r25, r26 }
2814     57a0:       [0-9a-f]*       { fdouble_pack1 r5, r6, r7 ; jrp r15 }
2815     57a8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; jrp r15 ; prefetch_l3 r25 }
2816     57b0:       [0-9a-f]*       { cmples r5, r6, r7 ; jrp r15 ; ld r25, r26 }
2817     57b8:       [0-9a-f]*       { shrs r5, r6, r7 ; jrp r15 ; ld r25, r26 }
2818     57c0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jrp r15 ; ld1s r25, r26 }
2819     57c8:       [0-9a-f]*       { andi r5, r6, 5 ; jrp r15 ; ld1u r25, r26 }
2820     57d0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jrp r15 ; ld1u r25, r26 }
2821     57d8:       [0-9a-f]*       { move r5, r6 ; jrp r15 ; ld2s r25, r26 }
2822     57e0:       [0-9a-f]*       { jrp r15 ; ld2s r25, r26 }
2823     57e8:       [0-9a-f]*       { revbits r5, r6 ; jrp r15 ; ld2u r25, r26 }
2824     57f0:       [0-9a-f]*       { cmpne r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
2825     57f8:       [0-9a-f]*       { subx r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
2826     5800:       [0-9a-f]*       { mulx r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
2827     5808:       [0-9a-f]*       { mnz r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 }
2828     5810:       [0-9a-f]*       { movei r5, 5 ; jrp r15 ; prefetch_l2_fault r25 }
2829     5818:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 }
2830     5820:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; jrp r15 ; prefetch r25 }
2831     5828:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jrp r15 ; prefetch r25 }
2832     5830:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
2833     5838:       [0-9a-f]*       { mulx r5, r6, r7 ; jrp r15 ; prefetch r25 }
2834     5840:       [0-9a-f]*       { nop ; jrp r15 ; prefetch_l2 r25 }
2835     5848:       [0-9a-f]*       { or r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 }
2836     5850:       [0-9a-f]*       { cmplts r5, r6, r7 ; jrp r15 ; prefetch r25 }
2837     5858:       [0-9a-f]*       { shru r5, r6, r7 ; jrp r15 ; prefetch r25 }
2838     5860:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 }
2839     5868:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 }
2840     5870:       [0-9a-f]*       { shl2addx r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 }
2841     5878:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 }
2842     5880:       [0-9a-f]*       { addi r5, r6, 5 ; jrp r15 ; prefetch_l2_fault r25 }
2843     5888:       [0-9a-f]*       { rotl r5, r6, r7 ; jrp r15 ; prefetch_l2_fault r25 }
2844     5890:       [0-9a-f]*       { jrp r15 ; prefetch_l3 r25 }
2845     5898:       [0-9a-f]*       { tblidxb1 r5, r6 ; jrp r15 ; prefetch_l3 r25 }
2846     58a0:       [0-9a-f]*       { nop ; jrp r15 ; prefetch_l3_fault r25 }
2847     58a8:       [0-9a-f]*       { revbits r5, r6 ; jrp r15 ; prefetch_l3 r25 }
2848     58b0:       [0-9a-f]*       { rotl r5, r6, r7 ; jrp r15 ; st r25, r26 }
2849     58b8:       [0-9a-f]*       { shl r5, r6, r7 ; jrp r15 ; st2 r25, r26 }
2850     58c0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
2851     58c8:       [0-9a-f]*       { shl3add r5, r6, r7 ; jrp r15 ; ld r25, r26 }
2852     58d0:       [0-9a-f]*       { shli r5, r6, 5 ; jrp r15 ; ld1u r25, r26 }
2853     58d8:       [0-9a-f]*       { shrsi r5, r6, 5 ; jrp r15 ; ld1u r25, r26 }
2854     58e0:       [0-9a-f]*       { shrui r5, r6, 5 ; jrp r15 ; ld2u r25, r26 }
2855     58e8:       [0-9a-f]*       { move r5, r6 ; jrp r15 ; st r25, r26 }
2856     58f0:       [0-9a-f]*       { jrp r15 ; st r25, r26 }
2857     58f8:       [0-9a-f]*       { revbits r5, r6 ; jrp r15 ; st1 r25, r26 }
2858     5900:       [0-9a-f]*       { cmpne r5, r6, r7 ; jrp r15 ; st2 r25, r26 }
2859     5908:       [0-9a-f]*       { subx r5, r6, r7 ; jrp r15 ; st2 r25, r26 }
2860     5910:       [0-9a-f]*       { mulx r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
2861     5918:       [0-9a-f]*       { sub r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 }
2862     5920:       [0-9a-f]*       { tblidxb0 r5, r6 ; jrp r15 ; prefetch_l2_fault r25 }
2863     5928:       [0-9a-f]*       { tblidxb2 r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
2864     5930:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; jrp r15 }
2865     5938:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; jrp r15 }
2866     5940:       [0-9a-f]*       { v4shrs r5, r6, r7 ; jrp r15 }
2867     5948:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; ld r15, r16 }
2868     5950:       [0-9a-f]*       { mm r5, r6, 5, 7 ; ld r15, r16 }
2869     5958:       [0-9a-f]*       { shl1addx r5, r6, r7 ; ld r15, r16 }
2870     5960:       [0-9a-f]*       { v1dotp r5, r6, r7 ; ld r15, r16 }
2871     5968:       [0-9a-f]*       { v2cmpne r5, r6, r7 ; ld r15, r16 }
2872     5970:       [0-9a-f]*       { v4subsc r5, r6, r7 ; ld r15, r16 }
2873     5978:       [0-9a-f]*       { add r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
2874     5980:       [0-9a-f]*       { add r5, r6, r7 ; ld r25, r26 }
2875     5988:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 }
2876     5990:       [0-9a-f]*       { addi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 }
2877     5998:       [0-9a-f]*       { addi r5, r6, 5 ; movei r15, 5 ; ld r25, r26 }
2878     59a0:       [0-9a-f]*       { ctz r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
2879     59a8:       [0-9a-f]*       { tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
2880     59b0:       [0-9a-f]*       { addx r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 }
2881     59b8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
2882     59c0:       [0-9a-f]*       { addxi r5, r6, 5 ; and r15, r16, r17 ; ld r25, r26 }
2883     59c8:       [0-9a-f]*       { addxi r5, r6, 5 ; subx r15, r16, r17 ; ld r25, r26 }
2884     59d0:       [0-9a-f]*       { and r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
2885     59d8:       [0-9a-f]*       { and r5, r6, r7 ; ld r25, r26 }
2886     59e0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; ld r25, r26 }
2887     59e8:       [0-9a-f]*       { andi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 }
2888     59f0:       [0-9a-f]*       { andi r5, r6, 5 ; movei r15, 5 ; ld r25, r26 }
2889     59f8:       [0-9a-f]*       { clz r5, r6 ; jalr r15 ; ld r25, r26 }
2890     5a00:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
2891     5a08:       [0-9a-f]*       { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
2892     5a10:       [0-9a-f]*       { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
2893     5a18:       [0-9a-f]*       { cmpeq r15, r16, r17 ; nor r5, r6, r7 ; ld r25, r26 }
2894     5a20:       [0-9a-f]*       { cmpeq r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
2895     5a28:       [0-9a-f]*       { clz r5, r6 ; cmpeqi r15, r16, 5 ; ld r25, r26 }
2896     5a30:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 ; ld r25, r26 }
2897     5a38:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; move r15, r16 ; ld r25, r26 }
2898     5a40:       [0-9a-f]*       { cmples r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
2899     5a48:       [0-9a-f]*       { cmples r15, r16, r17 ; subx r5, r6, r7 ; ld r25, r26 }
2900     5a50:       [0-9a-f]*       { cmples r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
2901     5a58:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; ld r25, r26 }
2902     5a60:       [0-9a-f]*       { cmpleu r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
2903     5a68:       [0-9a-f]*       { cmpleu r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
2904     5a70:       [0-9a-f]*       { cmplts r15, r16, r17 ; nor r5, r6, r7 ; ld r25, r26 }
2905     5a78:       [0-9a-f]*       { cmplts r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
2906     5a80:       [0-9a-f]*       { clz r5, r6 ; cmpltsi r15, r16, 5 ; ld r25, r26 }
2907     5a88:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl2add r5, r6, r7 ; ld r25, r26 }
2908     5a90:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; move r15, r16 ; ld r25, r26 }
2909     5a98:       [0-9a-f]*       { cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
2910     5aa0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; subx r5, r6, r7 ; ld r25, r26 }
2911     5aa8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
2912     5ab0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
2913     5ab8:       [0-9a-f]*       { cmpne r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
2914     5ac0:       [0-9a-f]*       { cmpne r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
2915     5ac8:       [0-9a-f]*       { ctz r5, r6 ; shl3add r15, r16, r17 ; ld r25, r26 }
2916     5ad0:       [0-9a-f]*       { cmpne r15, r16, r17 ; ld r25, r26 }
2917     5ad8:       [0-9a-f]*       { rotli r15, r16, 5 ; ld r25, r26 }
2918     5ae0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; addxi r15, r16, 5 ; ld r25, r26 }
2919     5ae8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld r25, r26 }
2920     5af0:       [0-9a-f]*       { nor r5, r6, r7 ; ill ; ld r25, r26 }
2921     5af8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; info 19 ; ld r25, r26 }
2922     5b00:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; info 19 ; ld r25, r26 }
2923     5b08:       [0-9a-f]*       { info 19 ; shrui r15, r16, 5 ; ld r25, r26 }
2924     5b10:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; jalr r15 ; ld r25, r26 }
2925     5b18:       [0-9a-f]*       { and r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
2926     5b20:       [0-9a-f]*       { shl1add r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
2927     5b28:       [0-9a-f]*       { mnz r5, r6, r7 ; jr r15 ; ld r25, r26 }
2928     5b30:       [0-9a-f]*       { xor r5, r6, r7 ; jr r15 ; ld r25, r26 }
2929     5b38:       [0-9a-f]*       { pcnt r5, r6 ; jrp r15 ; ld r25, r26 }
2930     5b40:       [0-9a-f]*       { cmpltu r5, r6, r7 ; lnk r15 ; ld r25, r26 }
2931     5b48:       [0-9a-f]*       { sub r5, r6, r7 ; lnk r15 ; ld r25, r26 }
2932     5b50:       [0-9a-f]*       { mulax r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
2933     5b58:       [0-9a-f]*       { mnz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld r25, r26 }
2934     5b60:       [0-9a-f]*       { move r15, r16 ; addx r5, r6, r7 ; ld r25, r26 }
2935     5b68:       [0-9a-f]*       { move r15, r16 ; rotli r5, r6, 5 ; ld r25, r26 }
2936     5b70:       [0-9a-f]*       { move r5, r6 ; jr r15 ; ld r25, r26 }
2937     5b78:       [0-9a-f]*       { movei r15, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 }
2938     5b80:       [0-9a-f]*       { movei r15, 5 ; shrsi r5, r6, 5 ; ld r25, r26 }
2939     5b88:       [0-9a-f]*       { movei r5, 5 ; rotl r15, r16, r17 ; ld r25, r26 }
2940     5b90:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
2941     5b98:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; ill ; ld r25, r26 }
2942     5ba0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
2943     5ba8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 }
2944     5bb0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; ld r25, r26 }
2945     5bb8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 }
2946     5bc0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; ld r25, r26 }
2947     5bc8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jrp r15 ; ld r25, r26 }
2948     5bd0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
2949     5bd8:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 }
2950     5be0:       [0-9a-f]*       { mulax r5, r6, r7 ; ld r25, r26 }
2951     5be8:       [0-9a-f]*       { mulx r5, r6, r7 ; shrs r15, r16, r17 ; ld r25, r26 }
2952     5bf0:       [0-9a-f]*       { mulax r5, r6, r7 ; mz r15, r16, r17 ; ld r25, r26 }
2953     5bf8:       [0-9a-f]*       { mz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld r25, r26 }
2954     5c00:       [0-9a-f]*       { nop ; addi r15, r16, 5 ; ld r25, r26 }
2955     5c08:       [0-9a-f]*       { nop ; mnz r5, r6, r7 ; ld r25, r26 }
2956     5c10:       [0-9a-f]*       { nop ; shl3add r5, r6, r7 ; ld r25, r26 }
2957     5c18:       [0-9a-f]*       { nor r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
2958     5c20:       [0-9a-f]*       { nor r15, r16, r17 ; subx r5, r6, r7 ; ld r25, r26 }
2959     5c28:       [0-9a-f]*       { nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
2960     5c30:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
2961     5c38:       [0-9a-f]*       { or r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
2962     5c40:       [0-9a-f]*       { or r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
2963     5c48:       [0-9a-f]*       { pcnt r5, r6 ; shl3add r15, r16, r17 ; ld r25, r26 }
2964     5c50:       [0-9a-f]*       { revbits r5, r6 ; rotl r15, r16, r17 ; ld r25, r26 }
2965     5c58:       [0-9a-f]*       { revbytes r5, r6 ; mnz r15, r16, r17 ; ld r25, r26 }
2966     5c60:       [0-9a-f]*       { rotl r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 }
2967     5c68:       [0-9a-f]*       { rotl r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
2968     5c70:       [0-9a-f]*       { rotl r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
2969     5c78:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; rotli r15, r16, 5 ; ld r25, r26 }
2970     5c80:       [0-9a-f]*       { rotli r5, r6, 5 ; addx r15, r16, r17 ; ld r25, r26 }
2971     5c88:       [0-9a-f]*       { rotli r5, r6, 5 ; shrui r15, r16, 5 ; ld r25, r26 }
2972     5c90:       [0-9a-f]*       { shl r15, r16, r17 ; nop ; ld r25, r26 }
2973     5c98:       [0-9a-f]*       { shl r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
2974     5ca0:       [0-9a-f]*       { shl1add r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
2975     5ca8:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
2976     5cb0:       [0-9a-f]*       { shl1add r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
2977     5cb8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 }
2978     5cc0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
2979     5cc8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
2980     5cd0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 }
2981     5cd8:       [0-9a-f]*       { shl2add r5, r6, r7 ; addx r15, r16, r17 ; ld r25, r26 }
2982     5ce0:       [0-9a-f]*       { shl2add r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 }
2983     5ce8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; nop ; ld r25, r26 }
2984     5cf0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
2985     5cf8:       [0-9a-f]*       { shl3add r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
2986     5d00:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
2987     5d08:       [0-9a-f]*       { shl3add r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
2988     5d10:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 }
2989     5d18:       [0-9a-f]*       { shl3addx r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
2990     5d20:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
2991     5d28:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld r25, r26 }
2992     5d30:       [0-9a-f]*       { shli r5, r6, 5 ; addx r15, r16, r17 ; ld r25, r26 }
2993     5d38:       [0-9a-f]*       { shli r5, r6, 5 ; shrui r15, r16, 5 ; ld r25, r26 }
2994     5d40:       [0-9a-f]*       { shrs r15, r16, r17 ; nop ; ld r25, r26 }
2995     5d48:       [0-9a-f]*       { shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
2996     5d50:       [0-9a-f]*       { shrsi r15, r16, 5 ; andi r5, r6, 5 ; ld r25, r26 }
2997     5d58:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld r25, r26 }
2998     5d60:       [0-9a-f]*       { shrsi r5, r6, 5 ; mnz r15, r16, r17 ; ld r25, r26 }
2999     5d68:       [0-9a-f]*       { shru r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 }
3000     5d70:       [0-9a-f]*       { shru r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
3001     5d78:       [0-9a-f]*       { shru r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
3002     5d80:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 }
3003     5d88:       [0-9a-f]*       { shrui r5, r6, 5 ; addx r15, r16, r17 ; ld r25, r26 }
3004     5d90:       [0-9a-f]*       { shrui r5, r6, 5 ; shrui r15, r16, 5 ; ld r25, r26 }
3005     5d98:       [0-9a-f]*       { sub r15, r16, r17 ; nop ; ld r25, r26 }
3006     5da0:       [0-9a-f]*       { sub r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
3007     5da8:       [0-9a-f]*       { subx r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
3008     5db0:       [0-9a-f]*       { subx r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
3009     5db8:       [0-9a-f]*       { subx r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
3010     5dc0:       [0-9a-f]*       { tblidxb0 r5, r6 ; ill ; ld r25, r26 }
3011     5dc8:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmples r15, r16, r17 ; ld r25, r26 }
3012     5dd0:       [0-9a-f]*       { tblidxb2 r5, r6 ; addi r15, r16, 5 ; ld r25, r26 }
3013     5dd8:       [0-9a-f]*       { tblidxb2 r5, r6 ; shru r15, r16, r17 ; ld r25, r26 }
3014     5de0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl2add r15, r16, r17 ; ld r25, r26 }
3015     5de8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
3016     5df0:       [0-9a-f]*       { xor r5, r6, r7 ; and r15, r16, r17 ; ld r25, r26 }
3017     5df8:       [0-9a-f]*       { xor r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
3018     5e00:       [0-9a-f]*       { dblalign6 r5, r6, r7 ; ld1s r15, r16 }
3019     5e08:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; ld1s r15, r16 }
3020     5e10:       [0-9a-f]*       { tblidxb3 r5, r6 ; ld1s r15, r16 }
3021     5e18:       [0-9a-f]*       { v1shrs r5, r6, r7 ; ld1s r15, r16 }
3022     5e20:       [0-9a-f]*       { v2shl r5, r6, r7 ; ld1s r15, r16 }
3023     5e28:       [0-9a-f]*       { add r15, r16, r17 ; ld1s r25, r26 }
3024     5e30:       [0-9a-f]*       { tblidxb1 r5, r6 ; add r15, r16, r17 ; ld1s r25, r26 }
3025     5e38:       [0-9a-f]*       { add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 }
3026     5e40:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld1s r25, r26 }
3027     5e48:       [0-9a-f]*       { addi r5, r6, 5 ; andi r15, r16, 5 ; ld1s r25, r26 }
3028     5e50:       [0-9a-f]*       { addi r5, r6, 5 ; xor r15, r16, r17 ; ld1s r25, r26 }
3029     5e58:       [0-9a-f]*       { pcnt r5, r6 ; addx r15, r16, r17 ; ld1s r25, r26 }
3030     5e60:       [0-9a-f]*       { addx r5, r6, r7 ; ill ; ld1s r25, r26 }
3031     5e68:       [0-9a-f]*       { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
3032     5e70:       [0-9a-f]*       { addxi r15, r16, 5 ; shl3add r5, r6, r7 ; ld1s r25, r26 }
3033     5e78:       [0-9a-f]*       { addxi r5, r6, 5 ; mz r15, r16, r17 ; ld1s r25, r26 }
3034     5e80:       [0-9a-f]*       { and r15, r16, r17 ; ld1s r25, r26 }
3035     5e88:       [0-9a-f]*       { tblidxb1 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
3036     5e90:       [0-9a-f]*       { and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 }
3037     5e98:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
3038     5ea0:       [0-9a-f]*       { andi r5, r6, 5 ; andi r15, r16, 5 ; ld1s r25, r26 }
3039     5ea8:       [0-9a-f]*       { andi r5, r6, 5 ; xor r15, r16, r17 ; ld1s r25, r26 }
3040     5eb0:       [0-9a-f]*       { clz r5, r6 ; shli r15, r16, 5 ; ld1s r25, r26 }
3041     5eb8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
3042     5ec0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
3043     5ec8:       [0-9a-f]*       { ctz r5, r6 ; cmpeq r15, r16, r17 ; ld1s r25, r26 }
3044     5ed0:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld1s r25, r26 }
3045     5ed8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
3046     5ee0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
3047     5ee8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 }
3048     5ef0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; subx r15, r16, r17 ; ld1s r25, r26 }
3049     5ef8:       [0-9a-f]*       { cmples r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
3050     5f00:       [0-9a-f]*       { cmples r5, r6, r7 ; ld1s r25, r26 }
3051     5f08:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
3052     5f10:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
3053     5f18:       [0-9a-f]*       { cmpleu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
3054     5f20:       [0-9a-f]*       { ctz r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
3055     5f28:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
3056     5f30:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
3057     5f38:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
3058     5f40:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 }
3059     5f48:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; subx r15, r16, r17 ; ld1s r25, r26 }
3060     5f50:       [0-9a-f]*       { cmpltu r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
3061     5f58:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ld1s r25, r26 }
3062     5f60:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
3063     5f68:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
3064     5f70:       [0-9a-f]*       { cmpne r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
3065     5f78:       [0-9a-f]*       { ctz r5, r6 ; jalr r15 ; ld1s r25, r26 }
3066     5f80:       [0-9a-f]*       { andi r15, r16, 5 ; ld1s r25, r26 }
3067     5f88:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ld1s r25, r26 }
3068     5f90:       [0-9a-f]*       { shrsi r5, r6, 5 ; ld1s r25, r26 }
3069     5f98:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; movei r15, 5 ; ld1s r25, r26 }
3070     5fa0:       [0-9a-f]*       { ctz r5, r6 ; ill ; ld1s r25, r26 }
3071     5fa8:       [0-9a-f]*       { tblidxb0 r5, r6 ; ill ; ld1s r25, r26 }
3072     5fb0:       [0-9a-f]*       { info 19 ; ill ; ld1s r25, r26 }
3073     5fb8:       [0-9a-f]*       { info 19 ; shl1add r5, r6, r7 ; ld1s r25, r26 }
3074     5fc0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
3075     5fc8:       [0-9a-f]*       { shl3add r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
3076     5fd0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
3077     5fd8:       [0-9a-f]*       { addx r5, r6, r7 ; jr r15 ; ld1s r25, r26 }
3078     5fe0:       [0-9a-f]*       { rotli r5, r6, 5 ; jr r15 ; ld1s r25, r26 }
3079     5fe8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; jrp r15 ; ld1s r25, r26 }
3080     5ff0:       [0-9a-f]*       { tblidxb2 r5, r6 ; jrp r15 ; ld1s r25, r26 }
3081     5ff8:       [0-9a-f]*       { nor r5, r6, r7 ; lnk r15 ; ld1s r25, r26 }
3082     6000:       [0-9a-f]*       { mnz r15, r16, r17 ; cmplts r5, r6, r7 ; ld1s r25, r26 }
3083     6008:       [0-9a-f]*       { mnz r15, r16, r17 ; shru r5, r6, r7 ; ld1s r25, r26 }
3084     6010:       [0-9a-f]*       { mnz r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 }
3085     6018:       [0-9a-f]*       { move r15, r16 ; movei r5, 5 ; ld1s r25, r26 }
3086     6020:       [0-9a-f]*       { move r5, r6 ; add r15, r16, r17 ; ld1s r25, r26 }
3087     6028:       [0-9a-f]*       { move r5, r6 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
3088     6030:       [0-9a-f]*       { mulx r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
3089     6038:       [0-9a-f]*       { movei r5, 5 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
3090     6040:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
3091     6048:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
3092     6050:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
3093     6058:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
3094     6060:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld1s r25, r26 }
3095     6068:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; ill ; ld1s r25, r26 }
3096     6070:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; ld1s r25, r26 }
3097     6078:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld1s r25, r26 }
3098     6080:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 }
3099     6088:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
3100     6090:       [0-9a-f]*       { mulax r5, r6, r7 ; nor r15, r16, r17 ; ld1s r25, r26 }
3101     6098:       [0-9a-f]*       { mulx r5, r6, r7 ; jrp r15 ; ld1s r25, r26 }
3102     60a0:       [0-9a-f]*       { mz r15, r16, r17 ; cmplts r5, r6, r7 ; ld1s r25, r26 }
3103     60a8:       [0-9a-f]*       { mz r15, r16, r17 ; shru r5, r6, r7 ; ld1s r25, r26 }
3104     60b0:       [0-9a-f]*       { mz r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 }
3105     60b8:       [0-9a-f]*       { nop ; cmplts r15, r16, r17 ; ld1s r25, r26 }
3106     60c0:       [0-9a-f]*       { nop ; or r5, r6, r7 ; ld1s r25, r26 }
3107     60c8:       [0-9a-f]*       { nop ; xor r15, r16, r17 ; ld1s r25, r26 }
3108     60d0:       [0-9a-f]*       { nor r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
3109     60d8:       [0-9a-f]*       { nor r5, r6, r7 ; ld1s r25, r26 }
3110     60e0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 }
3111     60e8:       [0-9a-f]*       { or r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
3112     60f0:       [0-9a-f]*       { or r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
3113     60f8:       [0-9a-f]*       { pcnt r5, r6 ; jalr r15 ; ld1s r25, r26 }
3114     6100:       [0-9a-f]*       { revbits r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
3115     6108:       [0-9a-f]*       { revbytes r5, r6 ; addxi r15, r16, 5 ; ld1s r25, r26 }
3116     6110:       [0-9a-f]*       { revbytes r5, r6 ; sub r15, r16, r17 ; ld1s r25, r26 }
3117     6118:       [0-9a-f]*       { rotl r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 }
3118     6120:       [0-9a-f]*       { rotl r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
3119     6128:       [0-9a-f]*       { clz r5, r6 ; rotli r15, r16, 5 ; ld1s r25, r26 }
3120     6130:       [0-9a-f]*       { rotli r15, r16, 5 ; shl2add r5, r6, r7 ; ld1s r25, r26 }
3121     6138:       [0-9a-f]*       { rotli r5, r6, 5 ; move r15, r16 ; ld1s r25, r26 }
3122     6140:       [0-9a-f]*       { shl r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
3123     6148:       [0-9a-f]*       { shl r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
3124     6150:       [0-9a-f]*       { shl r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
3125     6158:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld1s r25, r26 }
3126     6160:       [0-9a-f]*       { shl1add r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
3127     6168:       [0-9a-f]*       { shl1add r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
3128     6170:       [0-9a-f]*       { shl1addx r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 }
3129     6178:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
3130     6180:       [0-9a-f]*       { clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
3131     6188:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl2add r5, r6, r7 ; ld1s r25, r26 }
3132     6190:       [0-9a-f]*       { shl2add r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 }
3133     6198:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
3134     61a0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
3135     61a8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
3136     61b0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
3137     61b8:       [0-9a-f]*       { shl3add r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
3138     61c0:       [0-9a-f]*       { shl3add r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
3139     61c8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 }
3140     61d0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
3141     61d8:       [0-9a-f]*       { clz r5, r6 ; shli r15, r16, 5 ; ld1s r25, r26 }
3142     61e0:       [0-9a-f]*       { shli r15, r16, 5 ; shl2add r5, r6, r7 ; ld1s r25, r26 }
3143     61e8:       [0-9a-f]*       { shli r5, r6, 5 ; move r15, r16 ; ld1s r25, r26 }
3144     61f0:       [0-9a-f]*       { shrs r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
3145     61f8:       [0-9a-f]*       { shrs r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
3146     6200:       [0-9a-f]*       { shrs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
3147     6208:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
3148     6210:       [0-9a-f]*       { shrsi r5, r6, 5 ; addxi r15, r16, 5 ; ld1s r25, r26 }
3149     6218:       [0-9a-f]*       { shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld1s r25, r26 }
3150     6220:       [0-9a-f]*       { shru r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 }
3151     6228:       [0-9a-f]*       { shru r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
3152     6230:       [0-9a-f]*       { clz r5, r6 ; shrui r15, r16, 5 ; ld1s r25, r26 }
3153     6238:       [0-9a-f]*       { shrui r15, r16, 5 ; shl2add r5, r6, r7 ; ld1s r25, r26 }
3154     6240:       [0-9a-f]*       { shrui r5, r6, 5 ; move r15, r16 ; ld1s r25, r26 }
3155     6248:       [0-9a-f]*       { sub r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
3156     6250:       [0-9a-f]*       { sub r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
3157     6258:       [0-9a-f]*       { sub r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
3158     6260:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; subx r15, r16, r17 ; ld1s r25, r26 }
3159     6268:       [0-9a-f]*       { subx r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
3160     6270:       [0-9a-f]*       { subx r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
3161     6278:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
3162     6280:       [0-9a-f]*       { tblidxb1 r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 }
3163     6288:       [0-9a-f]*       { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld1s r25, r26 }
3164     6290:       [0-9a-f]*       { tblidxb3 r5, r6 ; ill ; ld1s r25, r26 }
3165     6298:       [0-9a-f]*       { cmovnez r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
3166     62a0:       [0-9a-f]*       { xor r15, r16, r17 ; shl3add r5, r6, r7 ; ld1s r25, r26 }
3167     62a8:       [0-9a-f]*       { xor r5, r6, r7 ; mz r15, r16, r17 ; ld1s r25, r26 }
3168     62b0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; ld1s_add r15, r16, 5 }
3169     62b8:       [0-9a-f]*       { move r5, r6 ; ld1s_add r15, r16, 5 }
3170     62c0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; ld1s_add r15, r16, 5 }
3171     62c8:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; ld1s_add r15, r16, 5 }
3172     62d0:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; ld1s_add r15, r16, 5 }
3173     62d8:       [0-9a-f]*       { xori r5, r6, 5 ; ld1s_add r15, r16, 5 }
3174     62e0:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; ld1u r15, r16 }
3175     62e8:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; ld1u r15, r16 }
3176     62f0:       [0-9a-f]*       { v1addi r5, r6, 5 ; ld1u r15, r16 }
3177     62f8:       [0-9a-f]*       { v1shru r5, r6, r7 ; ld1u r15, r16 }
3178     6300:       [0-9a-f]*       { v2shlsc r5, r6, r7 ; ld1u r15, r16 }
3179     6308:       [0-9a-f]*       { add r15, r16, r17 ; info 19 ; ld1u r25, r26 }
3180     6310:       [0-9a-f]*       { tblidxb3 r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
3181     6318:       [0-9a-f]*       { add r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
3182     6320:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 }
3183     6328:       [0-9a-f]*       { addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
3184     6330:       [0-9a-f]*       { addx r15, r16, r17 ; add r5, r6, r7 ; ld1u r25, r26 }
3185     6338:       [0-9a-f]*       { revbytes r5, r6 ; addx r15, r16, r17 ; ld1u r25, r26 }
3186     6340:       [0-9a-f]*       { addx r5, r6, r7 ; jalr r15 ; ld1u r25, r26 }
3187     6348:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld1u r25, r26 }
3188     6350:       [0-9a-f]*       { addxi r15, r16, 5 ; shli r5, r6, 5 ; ld1u r25, r26 }
3189     6358:       [0-9a-f]*       { addxi r5, r6, 5 ; nor r15, r16, r17 ; ld1u r25, r26 }
3190     6360:       [0-9a-f]*       { and r15, r16, r17 ; info 19 ; ld1u r25, r26 }
3191     6368:       [0-9a-f]*       { tblidxb3 r5, r6 ; and r15, r16, r17 ; ld1u r25, r26 }
3192     6370:       [0-9a-f]*       { and r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
3193     6378:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
3194     6380:       [0-9a-f]*       { andi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
3195     6388:       [0-9a-f]*       { clz r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
3196     6390:       [0-9a-f]*       { clz r5, r6 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
3197     6398:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
3198     63a0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; nop ; ld1u r25, r26 }
3199     63a8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
3200     63b0:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
3201     63b8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
3202     63c0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
3203     63c8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
3204     63d0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; ld1u r25, r26 }
3205     63d8:       [0-9a-f]*       { revbits r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 }
3206     63e0:       [0-9a-f]*       { cmples r5, r6, r7 ; info 19 ; ld1u r25, r26 }
3207     63e8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1u r25, r26 }
3208     63f0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
3209     63f8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; nop ; ld1u r25, r26 }
3210     6400:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
3211     6408:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
3212     6410:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
3213     6418:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1u r25, r26 }
3214     6420:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
3215     6428:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; ld1u r25, r26 }
3216     6430:       [0-9a-f]*       { revbits r5, r6 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
3217     6438:       [0-9a-f]*       { cmpltu r5, r6, r7 ; info 19 ; ld1u r25, r26 }
3218     6440:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1u r25, r26 }
3219     6448:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
3220     6450:       [0-9a-f]*       { cmpne r5, r6, r7 ; nop ; ld1u r25, r26 }
3221     6458:       [0-9a-f]*       { ctz r5, r6 ; jr r15 ; ld1u r25, r26 }
3222     6460:       [0-9a-f]*       { clz r5, r6 ; ld1u r25, r26 }
3223     6468:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; ld1u r25, r26 }
3224     6470:       [0-9a-f]*       { shru r5, r6, r7 ; ld1u r25, r26 }
3225     6478:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; nop ; ld1u r25, r26 }
3226     6480:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; ill ; ld1u r25, r26 }
3227     6488:       [0-9a-f]*       { tblidxb2 r5, r6 ; ill ; ld1u r25, r26 }
3228     6490:       [0-9a-f]*       { info 19 ; jalr r15 ; ld1u r25, r26 }
3229     6498:       [0-9a-f]*       { info 19 ; shl1addx r5, r6, r7 ; ld1u r25, r26 }
3230     64a0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jalr r15 ; ld1u r25, r26 }
3231     64a8:       [0-9a-f]*       { shli r5, r6, 5 ; jalr r15 ; ld1u r25, r26 }
3232     64b0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 }
3233     64b8:       [0-9a-f]*       { and r5, r6, r7 ; jr r15 ; ld1u r25, r26 }
3234     64c0:       [0-9a-f]*       { shl1add r5, r6, r7 ; jr r15 ; ld1u r25, r26 }
3235     64c8:       [0-9a-f]*       { mnz r5, r6, r7 ; jrp r15 ; ld1u r25, r26 }
3236     64d0:       [0-9a-f]*       { xor r5, r6, r7 ; jrp r15 ; ld1u r25, r26 }
3237     64d8:       [0-9a-f]*       { pcnt r5, r6 ; lnk r15 ; ld1u r25, r26 }
3238     64e0:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1u r25, r26 }
3239     64e8:       [0-9a-f]*       { mnz r15, r16, r17 ; sub r5, r6, r7 ; ld1u r25, r26 }
3240     64f0:       [0-9a-f]*       { mnz r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 }
3241     64f8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 }
3242     6500:       [0-9a-f]*       { move r5, r6 ; addx r15, r16, r17 ; ld1u r25, r26 }
3243     6508:       [0-9a-f]*       { move r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 }
3244     6510:       [0-9a-f]*       { movei r15, 5 ; nop ; ld1u r25, r26 }
3245     6518:       [0-9a-f]*       { movei r5, 5 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
3246     6520:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
3247     6528:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
3248     6530:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
3249     6538:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
3250     6540:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
3251     6548:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jalr r15 ; ld1u r25, r26 }
3252     6550:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
3253     6558:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; ld1u r25, r26 }
3254     6560:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
3255     6568:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
3256     6570:       [0-9a-f]*       { mulax r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 }
3257     6578:       [0-9a-f]*       { mulx r5, r6, r7 ; mnz r15, r16, r17 ; ld1u r25, r26 }
3258     6580:       [0-9a-f]*       { mz r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1u r25, r26 }
3259     6588:       [0-9a-f]*       { mz r15, r16, r17 ; sub r5, r6, r7 ; ld1u r25, r26 }
3260     6590:       [0-9a-f]*       { mz r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 }
3261     6598:       [0-9a-f]*       { nop ; cmpltsi r15, r16, 5 ; ld1u r25, r26 }
3262     65a0:       [0-9a-f]*       { revbits r5, r6 ; nop ; ld1u r25, r26 }
3263     65a8:       [0-9a-f]*       { nop ; ld1u r25, r26 }
3264     65b0:       [0-9a-f]*       { revbits r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 }
3265     65b8:       [0-9a-f]*       { nor r5, r6, r7 ; info 19 ; ld1u r25, r26 }
3266     65c0:       [0-9a-f]*       { or r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1u r25, r26 }
3267     65c8:       [0-9a-f]*       { or r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
3268     65d0:       [0-9a-f]*       { or r5, r6, r7 ; nop ; ld1u r25, r26 }
3269     65d8:       [0-9a-f]*       { pcnt r5, r6 ; jr r15 ; ld1u r25, r26 }
3270     65e0:       [0-9a-f]*       { revbits r5, r6 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
3271     65e8:       [0-9a-f]*       { revbytes r5, r6 ; andi r15, r16, 5 ; ld1u r25, r26 }
3272     65f0:       [0-9a-f]*       { revbytes r5, r6 ; xor r15, r16, r17 ; ld1u r25, r26 }
3273     65f8:       [0-9a-f]*       { pcnt r5, r6 ; rotl r15, r16, r17 ; ld1u r25, r26 }
3274     6600:       [0-9a-f]*       { rotl r5, r6, r7 ; ill ; ld1u r25, r26 }
3275     6608:       [0-9a-f]*       { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 }
3276     6610:       [0-9a-f]*       { rotli r15, r16, 5 ; shl3add r5, r6, r7 ; ld1u r25, r26 }
3277     6618:       [0-9a-f]*       { rotli r5, r6, 5 ; mz r15, r16, r17 ; ld1u r25, r26 }
3278     6620:       [0-9a-f]*       { shl r15, r16, r17 ; ld1u r25, r26 }
3279     6628:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 }
3280     6630:       [0-9a-f]*       { shl r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
3281     6638:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 }
3282     6640:       [0-9a-f]*       { shl1add r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
3283     6648:       [0-9a-f]*       { shl1add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
3284     6650:       [0-9a-f]*       { pcnt r5, r6 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
3285     6658:       [0-9a-f]*       { shl1addx r5, r6, r7 ; ill ; ld1u r25, r26 }
3286     6660:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl2add r15, r16, r17 ; ld1u r25, r26 }
3287     6668:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl3add r5, r6, r7 ; ld1u r25, r26 }
3288     6670:       [0-9a-f]*       { shl2add r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 }
3289     6678:       [0-9a-f]*       { shl2addx r15, r16, r17 ; ld1u r25, r26 }
3290     6680:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
3291     6688:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
3292     6690:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
3293     6698:       [0-9a-f]*       { shl3add r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
3294     66a0:       [0-9a-f]*       { shl3add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
3295     66a8:       [0-9a-f]*       { pcnt r5, r6 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
3296     66b0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; ill ; ld1u r25, r26 }
3297     66b8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
3298     66c0:       [0-9a-f]*       { shli r15, r16, 5 ; shl3add r5, r6, r7 ; ld1u r25, r26 }
3299     66c8:       [0-9a-f]*       { shli r5, r6, 5 ; mz r15, r16, r17 ; ld1u r25, r26 }
3300     66d0:       [0-9a-f]*       { shrs r15, r16, r17 ; ld1u r25, r26 }
3301     66d8:       [0-9a-f]*       { tblidxb1 r5, r6 ; shrs r15, r16, r17 ; ld1u r25, r26 }
3302     66e0:       [0-9a-f]*       { shrs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
3303     66e8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
3304     66f0:       [0-9a-f]*       { shrsi r5, r6, 5 ; andi r15, r16, 5 ; ld1u r25, r26 }
3305     66f8:       [0-9a-f]*       { shrsi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 }
3306     6700:       [0-9a-f]*       { pcnt r5, r6 ; shru r15, r16, r17 ; ld1u r25, r26 }
3307     6708:       [0-9a-f]*       { shru r5, r6, r7 ; ill ; ld1u r25, r26 }
3308     6710:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
3309     6718:       [0-9a-f]*       { shrui r15, r16, 5 ; shl3add r5, r6, r7 ; ld1u r25, r26 }
3310     6720:       [0-9a-f]*       { shrui r5, r6, 5 ; mz r15, r16, r17 ; ld1u r25, r26 }
3311     6728:       [0-9a-f]*       { sub r15, r16, r17 ; ld1u r25, r26 }
3312     6730:       [0-9a-f]*       { tblidxb1 r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
3313     6738:       [0-9a-f]*       { sub r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
3314     6740:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; ld1u r25, r26 }
3315     6748:       [0-9a-f]*       { subx r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
3316     6750:       [0-9a-f]*       { subx r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
3317     6758:       [0-9a-f]*       { tblidxb0 r5, r6 ; shli r15, r16, 5 ; ld1u r25, r26 }
3318     6760:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 }
3319     6768:       [0-9a-f]*       { tblidxb2 r5, r6 ; movei r15, 5 ; ld1u r25, r26 }
3320     6770:       [0-9a-f]*       { tblidxb3 r5, r6 ; jalr r15 ; ld1u r25, r26 }
3321     6778:       [0-9a-f]*       { xor r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld1u r25, r26 }
3322     6780:       [0-9a-f]*       { xor r15, r16, r17 ; shli r5, r6, 5 ; ld1u r25, r26 }
3323     6788:       [0-9a-f]*       { xor r5, r6, r7 ; nor r15, r16, r17 ; ld1u r25, r26 }
3324     6790:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; ld1u_add r15, r16, 5 }
3325     6798:       [0-9a-f]*       { moveli r5, 4660 ; ld1u_add r15, r16, 5 }
3326     67a0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; ld1u_add r15, r16, 5 }
3327     67a8:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; ld1u_add r15, r16, 5 }
3328     67b0:       [0-9a-f]*       { v2int_l r5, r6, r7 ; ld1u_add r15, r16, 5 }
3329     67b8:       [0-9a-f]*       { addi r5, r6, 5 ; ld2s r15, r16 }
3330     67c0:       [0-9a-f]*       { fdouble_pack1 r5, r6, r7 ; ld2s r15, r16 }
3331     67c8:       [0-9a-f]*       { mulax r5, r6, r7 ; ld2s r15, r16 }
3332     67d0:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; ld2s r15, r16 }
3333     67d8:       [0-9a-f]*       { v1sub r5, r6, r7 ; ld2s r15, r16 }
3334     67e0:       [0-9a-f]*       { v2shrsi r5, r6, 5 ; ld2s r15, r16 }
3335     67e8:       [0-9a-f]*       { add r15, r16, r17 ; move r5, r6 ; ld2s r25, r26 }
3336     67f0:       [0-9a-f]*       { add r15, r16, r17 ; ld2s r25, r26 }
3337     67f8:       [0-9a-f]*       { add r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 }
3338     6800:       [0-9a-f]*       { mulax r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 }
3339     6808:       [0-9a-f]*       { addi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
3340     6810:       [0-9a-f]*       { addx r15, r16, r17 ; addx r5, r6, r7 ; ld2s r25, r26 }
3341     6818:       [0-9a-f]*       { addx r15, r16, r17 ; rotli r5, r6, 5 ; ld2s r25, r26 }
3342     6820:       [0-9a-f]*       { addx r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
3343     6828:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
3344     6830:       [0-9a-f]*       { addxi r15, r16, 5 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
3345     6838:       [0-9a-f]*       { addxi r5, r6, 5 ; rotl r15, r16, r17 ; ld2s r25, r26 }
3346     6840:       [0-9a-f]*       { and r15, r16, r17 ; move r5, r6 ; ld2s r25, r26 }
3347     6848:       [0-9a-f]*       { and r15, r16, r17 ; ld2s r25, r26 }
3348     6850:       [0-9a-f]*       { and r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 }
3349     6858:       [0-9a-f]*       { mulax r5, r6, r7 ; andi r15, r16, 5 ; ld2s r25, r26 }
3350     6860:       [0-9a-f]*       { andi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
3351     6868:       [0-9a-f]*       { clz r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 }
3352     6870:       [0-9a-f]*       { clz r5, r6 ; shrui r15, r16, 5 ; ld2s r25, r26 }
3353     6878:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
3354     6880:       [0-9a-f]*       { cmovnez r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
3355     6888:       [0-9a-f]*       { cmpeq r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
3356     6890:       [0-9a-f]*       { cmpeq r15, r16, r17 ; xor r5, r6, r7 ; ld2s r25, r26 }
3357     6898:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 }
3358     68a0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
3359     68a8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 }
3360     68b0:       [0-9a-f]*       { cmples r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
3361     68b8:       [0-9a-f]*       { cmples r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
3362     68c0:       [0-9a-f]*       { cmples r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
3363     68c8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 }
3364     68d0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 }
3365     68d8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
3366     68e0:       [0-9a-f]*       { cmplts r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
3367     68e8:       [0-9a-f]*       { cmplts r15, r16, r17 ; xor r5, r6, r7 ; ld2s r25, r26 }
3368     68f0:       [0-9a-f]*       { cmplts r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 }
3369     68f8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 }
3370     6900:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 }
3371     6908:       [0-9a-f]*       { cmpltu r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
3372     6910:       [0-9a-f]*       { cmpltu r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
3373     6918:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
3374     6920:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 }
3375     6928:       [0-9a-f]*       { cmpne r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 }
3376     6930:       [0-9a-f]*       { cmpne r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
3377     6938:       [0-9a-f]*       { ctz r5, r6 ; lnk r15 ; ld2s r25, r26 }
3378     6940:       [0-9a-f]*       { cmovnez r5, r6, r7 ; ld2s r25, r26 }
3379     6948:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; ld2s r25, r26 }
3380     6950:       [0-9a-f]*       { shrui r5, r6, 5 ; ld2s r25, r26 }
3381     6958:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 }
3382     6960:       [0-9a-f]*       { mnz r5, r6, r7 ; ill ; ld2s r25, r26 }
3383     6968:       [0-9a-f]*       { xor r5, r6, r7 ; ill ; ld2s r25, r26 }
3384     6970:       [0-9a-f]*       { info 19 ; jr r15 ; ld2s r25, r26 }
3385     6978:       [0-9a-f]*       { info 19 ; shl2add r5, r6, r7 ; ld2s r25, r26 }
3386     6980:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
3387     6988:       [0-9a-f]*       { shrsi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 }
3388     6990:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
3389     6998:       [0-9a-f]*       { clz r5, r6 ; jr r15 ; ld2s r25, r26 }
3390     69a0:       [0-9a-f]*       { shl2add r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
3391     69a8:       [0-9a-f]*       { movei r5, 5 ; jrp r15 ; ld2s r25, r26 }
3392     69b0:       [0-9a-f]*       { add r5, r6, r7 ; lnk r15 ; ld2s r25, r26 }
3393     69b8:       [0-9a-f]*       { revbytes r5, r6 ; lnk r15 ; ld2s r25, r26 }
3394     69c0:       [0-9a-f]*       { ctz r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 }
3395     69c8:       [0-9a-f]*       { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 }
3396     69d0:       [0-9a-f]*       { mnz r5, r6, r7 ; shl2add r15, r16, r17 ; ld2s r25, r26 }
3397     69d8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; move r15, r16 ; ld2s r25, r26 }
3398     69e0:       [0-9a-f]*       { move r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
3399     69e8:       [0-9a-f]*       { move r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 }
3400     69f0:       [0-9a-f]*       { movei r15, 5 ; or r5, r6, r7 ; ld2s r25, r26 }
3401     69f8:       [0-9a-f]*       { movei r5, 5 ; ld2s r25, r26 }
3402     6a00:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
3403     6a08:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
3404     6a10:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
3405     6a18:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
3406     6a20:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; nop ; ld2s r25, r26 }
3407     6a28:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
3408     6a30:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2s r25, r26 }
3409     6a38:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; ld2s r25, r26 }
3410     6a40:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld2s r25, r26 }
3411     6a48:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 }
3412     6a50:       [0-9a-f]*       { mulax r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
3413     6a58:       [0-9a-f]*       { mulx r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 }
3414     6a60:       [0-9a-f]*       { ctz r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 }
3415     6a68:       [0-9a-f]*       { tblidxb0 r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 }
3416     6a70:       [0-9a-f]*       { mz r5, r6, r7 ; shl2add r15, r16, r17 ; ld2s r25, r26 }
3417     6a78:       [0-9a-f]*       { nop ; cmpltu r15, r16, r17 ; ld2s r25, r26 }
3418     6a80:       [0-9a-f]*       { nop ; rotl r15, r16, r17 ; ld2s r25, r26 }
3419     6a88:       [0-9a-f]*       { nor r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
3420     6a90:       [0-9a-f]*       { nor r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
3421     6a98:       [0-9a-f]*       { nor r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
3422     6aa0:       [0-9a-f]*       { or r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 }
3423     6aa8:       [0-9a-f]*       { or r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 }
3424     6ab0:       [0-9a-f]*       { or r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
3425     6ab8:       [0-9a-f]*       { pcnt r5, r6 ; lnk r15 ; ld2s r25, r26 }
3426     6ac0:       [0-9a-f]*       { revbits r5, r6 ; ld2s r25, r26 }
3427     6ac8:       [0-9a-f]*       { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
3428     6ad0:       [0-9a-f]*       { rotl r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 }
3429     6ad8:       [0-9a-f]*       { revbytes r5, r6 ; rotl r15, r16, r17 ; ld2s r25, r26 }
3430     6ae0:       [0-9a-f]*       { rotl r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
3431     6ae8:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
3432     6af0:       [0-9a-f]*       { rotli r15, r16, 5 ; shli r5, r6, 5 ; ld2s r25, r26 }
3433     6af8:       [0-9a-f]*       { rotli r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 }
3434     6b00:       [0-9a-f]*       { shl r15, r16, r17 ; info 19 ; ld2s r25, r26 }
3435     6b08:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld2s r25, r26 }
3436     6b10:       [0-9a-f]*       { shl r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
3437     6b18:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
3438     6b20:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
3439     6b28:       [0-9a-f]*       { shl1addx r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 }
3440     6b30:       [0-9a-f]*       { revbytes r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
3441     6b38:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
3442     6b40:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
3443     6b48:       [0-9a-f]*       { shl2add r15, r16, r17 ; shli r5, r6, 5 ; ld2s r25, r26 }
3444     6b50:       [0-9a-f]*       { shl2add r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
3445     6b58:       [0-9a-f]*       { shl2addx r15, r16, r17 ; info 19 ; ld2s r25, r26 }
3446     6b60:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
3447     6b68:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
3448     6b70:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld2s r25, r26 }
3449     6b78:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
3450     6b80:       [0-9a-f]*       { shl3addx r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 }
3451     6b88:       [0-9a-f]*       { revbytes r5, r6 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
3452     6b90:       [0-9a-f]*       { shl3addx r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
3453     6b98:       [0-9a-f]*       { shli r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
3454     6ba0:       [0-9a-f]*       { shli r15, r16, 5 ; shli r5, r6, 5 ; ld2s r25, r26 }
3455     6ba8:       [0-9a-f]*       { shli r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 }
3456     6bb0:       [0-9a-f]*       { shrs r15, r16, r17 ; info 19 ; ld2s r25, r26 }
3457     6bb8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shrs r15, r16, r17 ; ld2s r25, r26 }
3458     6bc0:       [0-9a-f]*       { shrs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
3459     6bc8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
3460     6bd0:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
3461     6bd8:       [0-9a-f]*       { shru r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 }
3462     6be0:       [0-9a-f]*       { revbytes r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 }
3463     6be8:       [0-9a-f]*       { shru r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
3464     6bf0:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
3465     6bf8:       [0-9a-f]*       { shrui r15, r16, 5 ; shli r5, r6, 5 ; ld2s r25, r26 }
3466     6c00:       [0-9a-f]*       { shrui r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 }
3467     6c08:       [0-9a-f]*       { sub r15, r16, r17 ; info 19 ; ld2s r25, r26 }
3468     6c10:       [0-9a-f]*       { tblidxb3 r5, r6 ; sub r15, r16, r17 ; ld2s r25, r26 }
3469     6c18:       [0-9a-f]*       { sub r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
3470     6c20:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; subx r15, r16, r17 ; ld2s r25, r26 }
3471     6c28:       [0-9a-f]*       { subx r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
3472     6c30:       [0-9a-f]*       { tblidxb0 r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 }
3473     6c38:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
3474     6c40:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
3475     6c48:       [0-9a-f]*       { tblidxb2 r5, r6 ; nop ; ld2s r25, r26 }
3476     6c50:       [0-9a-f]*       { tblidxb3 r5, r6 ; jr r15 ; ld2s r25, r26 }
3477     6c58:       [0-9a-f]*       { xor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
3478     6c60:       [0-9a-f]*       { xor r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
3479     6c68:       [0-9a-f]*       { xor r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
3480     6c70:       [0-9a-f]*       { cmpltui r5, r6, 5 ; ld2s_add r15, r16, 5 }
3481     6c78:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; ld2s_add r15, r16, 5 }
3482     6c80:       [0-9a-f]*       { shlx r5, r6, r7 ; ld2s_add r15, r16, 5 }
3483     6c88:       [0-9a-f]*       { v1int_h r5, r6, r7 ; ld2s_add r15, r16, 5 }
3484     6c90:       [0-9a-f]*       { v2maxsi r5, r6, 5 ; ld2s_add r15, r16, 5 }
3485     6c98:       [0-9a-f]*       { addx r5, r6, r7 ; ld2u r15, r16 }
3486     6ca0:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; ld2u r15, r16 }
3487     6ca8:       [0-9a-f]*       { mz r5, r6, r7 ; ld2u r15, r16 }
3488     6cb0:       [0-9a-f]*       { v1cmpeq r5, r6, r7 ; ld2u r15, r16 }
3489     6cb8:       [0-9a-f]*       { v2add r5, r6, r7 ; ld2u r15, r16 }
3490     6cc0:       [0-9a-f]*       { v2shrui r5, r6, 5 ; ld2u r15, r16 }
3491     6cc8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
3492     6cd0:       [0-9a-f]*       { add r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 }
3493     6cd8:       [0-9a-f]*       { add r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
3494     6ce0:       [0-9a-f]*       { addi r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 }
3495     6ce8:       [0-9a-f]*       { addi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
3496     6cf0:       [0-9a-f]*       { addx r15, r16, r17 ; and r5, r6, r7 ; ld2u r25, r26 }
3497     6cf8:       [0-9a-f]*       { addx r15, r16, r17 ; shl1add r5, r6, r7 ; ld2u r25, r26 }
3498     6d00:       [0-9a-f]*       { addx r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
3499     6d08:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
3500     6d10:       [0-9a-f]*       { addxi r15, r16, 5 ; shrui r5, r6, 5 ; ld2u r25, r26 }
3501     6d18:       [0-9a-f]*       { addxi r5, r6, 5 ; shl r15, r16, r17 ; ld2u r25, r26 }
3502     6d20:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
3503     6d28:       [0-9a-f]*       { and r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 }
3504     6d30:       [0-9a-f]*       { and r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
3505     6d38:       [0-9a-f]*       { andi r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 }
3506     6d40:       [0-9a-f]*       { andi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
3507     6d48:       [0-9a-f]*       { clz r5, r6 ; and r15, r16, r17 ; ld2u r25, r26 }
3508     6d50:       [0-9a-f]*       { clz r5, r6 ; subx r15, r16, r17 ; ld2u r25, r26 }
3509     6d58:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
3510     6d60:       [0-9a-f]*       { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
3511     6d68:       [0-9a-f]*       { cmpeq r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 }
3512     6d70:       [0-9a-f]*       { cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
3513     6d78:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
3514     6d80:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2u r25, r26 }
3515     6d88:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
3516     6d90:       [0-9a-f]*       { cmples r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
3517     6d98:       [0-9a-f]*       { cmples r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 }
3518     6da0:       [0-9a-f]*       { cmples r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
3519     6da8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmplts r5, r6, r7 ; ld2u r25, r26 }
3520     6db0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
3521     6db8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
3522     6dc0:       [0-9a-f]*       { cmplts r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 }
3523     6dc8:       [0-9a-f]*       { cmplts r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
3524     6dd0:       [0-9a-f]*       { cmplts r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
3525     6dd8:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
3526     6de0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
3527     6de8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
3528     6df0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 }
3529     6df8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
3530     6e00:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmplts r5, r6, r7 ; ld2u r25, r26 }
3531     6e08:       [0-9a-f]*       { cmpne r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
3532     6e10:       [0-9a-f]*       { cmpne r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
3533     6e18:       [0-9a-f]*       { ctz r5, r6 ; move r15, r16 ; ld2u r25, r26 }
3534     6e20:       [0-9a-f]*       { cmpeq r5, r6, r7 ; ld2u r25, r26 }
3535     6e28:       [0-9a-f]*       { mulx r5, r6, r7 ; ld2u r25, r26 }
3536     6e30:       [0-9a-f]*       { sub r5, r6, r7 ; ld2u r25, r26 }
3537     6e38:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; rotli r15, r16, 5 ; ld2u r25, r26 }
3538     6e40:       [0-9a-f]*       { movei r5, 5 ; ill ; ld2u r25, r26 }
3539     6e48:       [0-9a-f]*       { info 19 ; add r15, r16, r17 ; ld2u r25, r26 }
3540     6e50:       [0-9a-f]*       { info 19 ; lnk r15 ; ld2u r25, r26 }
3541     6e58:       [0-9a-f]*       { info 19 ; shl2addx r5, r6, r7 ; ld2u r25, r26 }
3542     6e60:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; jalr r15 ; ld2u r25, r26 }
3543     6e68:       [0-9a-f]*       { shrui r5, r6, 5 ; jalr r15 ; ld2u r25, r26 }
3544     6e70:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
3545     6e78:       [0-9a-f]*       { cmovnez r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
3546     6e80:       [0-9a-f]*       { shl3add r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
3547     6e88:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
3548     6e90:       [0-9a-f]*       { addx r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
3549     6e98:       [0-9a-f]*       { rotli r5, r6, 5 ; lnk r15 ; ld2u r25, r26 }
3550     6ea0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; ld2u r25, r26 }
3551     6ea8:       [0-9a-f]*       { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld2u r25, r26 }
3552     6eb0:       [0-9a-f]*       { mnz r5, r6, r7 ; shl3add r15, r16, r17 ; ld2u r25, r26 }
3553     6eb8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
3554     6ec0:       [0-9a-f]*       { move r5, r6 ; cmpeq r15, r16, r17 ; ld2u r25, r26 }
3555     6ec8:       [0-9a-f]*       { move r5, r6 ; ld2u r25, r26 }
3556     6ed0:       [0-9a-f]*       { revbits r5, r6 ; movei r15, 5 ; ld2u r25, r26 }
3557     6ed8:       [0-9a-f]*       { movei r5, 5 ; info 19 ; ld2u r25, r26 }
3558     6ee0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
3559     6ee8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 }
3560     6ef0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 }
3561     6ef8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
3562     6f00:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
3563     6f08:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
3564     6f10:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; ld2u r25, r26 }
3565     6f18:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2u r25, r26 }
3566     6f20:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
3567     6f28:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
3568     6f30:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
3569     6f38:       [0-9a-f]*       { mulx r5, r6, r7 ; nop ; ld2u r25, r26 }
3570     6f40:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mz r15, r16, r17 ; ld2u r25, r26 }
3571     6f48:       [0-9a-f]*       { tblidxb2 r5, r6 ; mz r15, r16, r17 ; ld2u r25, r26 }
3572     6f50:       [0-9a-f]*       { mz r5, r6, r7 ; shl3add r15, r16, r17 ; ld2u r25, r26 }
3573     6f58:       [0-9a-f]*       { nop ; cmpne r15, r16, r17 ; ld2u r25, r26 }
3574     6f60:       [0-9a-f]*       { nop ; rotli r15, r16, 5 ; ld2u r25, r26 }
3575     6f68:       [0-9a-f]*       { nor r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
3576     6f70:       [0-9a-f]*       { nor r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 }
3577     6f78:       [0-9a-f]*       { nor r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
3578     6f80:       [0-9a-f]*       { or r15, r16, r17 ; cmplts r5, r6, r7 ; ld2u r25, r26 }
3579     6f88:       [0-9a-f]*       { or r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
3580     6f90:       [0-9a-f]*       { or r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
3581     6f98:       [0-9a-f]*       { pcnt r5, r6 ; move r15, r16 ; ld2u r25, r26 }
3582     6fa0:       [0-9a-f]*       { revbits r5, r6 ; info 19 ; ld2u r25, r26 }
3583     6fa8:       [0-9a-f]*       { revbytes r5, r6 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
3584     6fb0:       [0-9a-f]*       { rotl r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 }
3585     6fb8:       [0-9a-f]*       { rotl r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 }
3586     6fc0:       [0-9a-f]*       { rotl r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
3587     6fc8:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2u r25, r26 }
3588     6fd0:       [0-9a-f]*       { rotli r15, r16, 5 ; shrsi r5, r6, 5 ; ld2u r25, r26 }
3589     6fd8:       [0-9a-f]*       { rotli r5, r6, 5 ; rotl r15, r16, r17 ; ld2u r25, r26 }
3590     6fe0:       [0-9a-f]*       { shl r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 }
3591     6fe8:       [0-9a-f]*       { shl r15, r16, r17 ; ld2u r25, r26 }
3592     6ff0:       [0-9a-f]*       { shl r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
3593     6ff8:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 }
3594     7000:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
3595     7008:       [0-9a-f]*       { shl1addx r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 }
3596     7010:       [0-9a-f]*       { shl1addx r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 }
3597     7018:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
3598     7020:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2u r25, r26 }
3599     7028:       [0-9a-f]*       { shl2add r15, r16, r17 ; shrsi r5, r6, 5 ; ld2u r25, r26 }
3600     7030:       [0-9a-f]*       { shl2add r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 }
3601     7038:       [0-9a-f]*       { shl2addx r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 }
3602     7040:       [0-9a-f]*       { shl2addx r15, r16, r17 ; ld2u r25, r26 }
3603     7048:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
3604     7050:       [0-9a-f]*       { mulax r5, r6, r7 ; shl3add r15, r16, r17 ; ld2u r25, r26 }
3605     7058:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
3606     7060:       [0-9a-f]*       { shl3addx r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 }
3607     7068:       [0-9a-f]*       { shl3addx r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 }
3608     7070:       [0-9a-f]*       { shl3addx r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
3609     7078:       [0-9a-f]*       { shli r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2u r25, r26 }
3610     7080:       [0-9a-f]*       { shli r15, r16, 5 ; shrsi r5, r6, 5 ; ld2u r25, r26 }
3611     7088:       [0-9a-f]*       { shli r5, r6, 5 ; rotl r15, r16, r17 ; ld2u r25, r26 }
3612     7090:       [0-9a-f]*       { shrs r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 }
3613     7098:       [0-9a-f]*       { shrs r15, r16, r17 ; ld2u r25, r26 }
3614     70a0:       [0-9a-f]*       { shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
3615     70a8:       [0-9a-f]*       { mulax r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
3616     70b0:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
3617     70b8:       [0-9a-f]*       { shru r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 }
3618     70c0:       [0-9a-f]*       { shru r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 }
3619     70c8:       [0-9a-f]*       { shru r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
3620     70d0:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2u r25, r26 }
3621     70d8:       [0-9a-f]*       { shrui r15, r16, 5 ; shrsi r5, r6, 5 ; ld2u r25, r26 }
3622     70e0:       [0-9a-f]*       { shrui r5, r6, 5 ; rotl r15, r16, r17 ; ld2u r25, r26 }
3623     70e8:       [0-9a-f]*       { sub r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 }
3624     70f0:       [0-9a-f]*       { sub r15, r16, r17 ; ld2u r25, r26 }
3625     70f8:       [0-9a-f]*       { sub r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
3626     7100:       [0-9a-f]*       { mulax r5, r6, r7 ; subx r15, r16, r17 ; ld2u r25, r26 }
3627     7108:       [0-9a-f]*       { subx r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
3628     7110:       [0-9a-f]*       { tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld2u r25, r26 }
3629     7118:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; ld2u r25, r26 }
3630     7120:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
3631     7128:       [0-9a-f]*       { tblidxb2 r5, r6 ; or r15, r16, r17 ; ld2u r25, r26 }
3632     7130:       [0-9a-f]*       { tblidxb3 r5, r6 ; lnk r15 ; ld2u r25, r26 }
3633     7138:       [0-9a-f]*       { xor r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
3634     7140:       [0-9a-f]*       { xor r15, r16, r17 ; shrui r5, r6, 5 ; ld2u r25, r26 }
3635     7148:       [0-9a-f]*       { xor r5, r6, r7 ; shl r15, r16, r17 ; ld2u r25, r26 }
3636     7150:       [0-9a-f]*       { cmul r5, r6, r7 ; ld2u_add r15, r16, 5 }
3637     7158:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; ld2u_add r15, r16, 5 }
3638     7160:       [0-9a-f]*       { shrs r5, r6, r7 ; ld2u_add r15, r16, 5 }
3639     7168:       [0-9a-f]*       { v1maxu r5, r6, r7 ; ld2u_add r15, r16, 5 }
3640     7170:       [0-9a-f]*       { v2minsi r5, r6, 5 ; ld2u_add r15, r16, 5 }
3641     7178:       [0-9a-f]*       { addxli r5, r6, 4660 ; ld4s r15, r16 }
3642     7180:       [0-9a-f]*       { fdouble_unpack_min r5, r6, r7 ; ld4s r15, r16 }
3643     7188:       [0-9a-f]*       { nor r5, r6, r7 ; ld4s r15, r16 }
3644     7190:       [0-9a-f]*       { v1cmples r5, r6, r7 ; ld4s r15, r16 }
3645     7198:       [0-9a-f]*       { v2addsc r5, r6, r7 ; ld4s r15, r16 }
3646     71a0:       [0-9a-f]*       { v2subsc r5, r6, r7 ; ld4s r15, r16 }
3647     71a8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
3648     71b0:       [0-9a-f]*       { add r5, r6, r7 ; addxi r15, r16, 5 ; ld4s r25, r26 }
3649     71b8:       [0-9a-f]*       { add r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
3650     71c0:       [0-9a-f]*       { addi r15, r16, 5 ; nor r5, r6, r7 ; ld4s r25, r26 }
3651     71c8:       [0-9a-f]*       { addi r5, r6, 5 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
3652     71d0:       [0-9a-f]*       { clz r5, r6 ; addx r15, r16, r17 ; ld4s r25, r26 }
3653     71d8:       [0-9a-f]*       { addx r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 }
3654     71e0:       [0-9a-f]*       { addx r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
3655     71e8:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpne r5, r6, r7 ; ld4s r25, r26 }
3656     71f0:       [0-9a-f]*       { addxi r15, r16, 5 ; subx r5, r6, r7 ; ld4s r25, r26 }
3657     71f8:       [0-9a-f]*       { addxi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
3658     7200:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
3659     7208:       [0-9a-f]*       { and r5, r6, r7 ; addxi r15, r16, 5 ; ld4s r25, r26 }
3660     7210:       [0-9a-f]*       { and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
3661     7218:       [0-9a-f]*       { andi r15, r16, 5 ; nor r5, r6, r7 ; ld4s r25, r26 }
3662     7220:       [0-9a-f]*       { andi r5, r6, 5 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
3663     7228:       [0-9a-f]*       { clz r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
3664     7230:       [0-9a-f]*       { clz r5, r6 ; ld4s r25, r26 }
3665     7238:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
3666     7240:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
3667     7248:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
3668     7250:       [0-9a-f]*       { cmpeq r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
3669     7258:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 }
3670     7260:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; nop ; ld4s r25, r26 }
3671     7268:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
3672     7270:       [0-9a-f]*       { cmples r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 }
3673     7278:       [0-9a-f]*       { cmples r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
3674     7280:       [0-9a-f]*       { cmples r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
3675     7288:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpltu r5, r6, r7 ; ld4s r25, r26 }
3676     7290:       [0-9a-f]*       { cmpleu r15, r16, r17 ; sub r5, r6, r7 ; ld4s r25, r26 }
3677     7298:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
3678     72a0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
3679     72a8:       [0-9a-f]*       { cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
3680     72b0:       [0-9a-f]*       { cmplts r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 }
3681     72b8:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; nop ; ld4s r25, r26 }
3682     72c0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
3683     72c8:       [0-9a-f]*       { cmpltu r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 }
3684     72d0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
3685     72d8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
3686     72e0:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpltu r5, r6, r7 ; ld4s r25, r26 }
3687     72e8:       [0-9a-f]*       { cmpne r15, r16, r17 ; sub r5, r6, r7 ; ld4s r25, r26 }
3688     72f0:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
3689     72f8:       [0-9a-f]*       { ctz r5, r6 ; mz r15, r16, r17 ; ld4s r25, r26 }
3690     7300:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; ld4s r25, r26 }
3691     7308:       [0-9a-f]*       { mz r5, r6, r7 ; ld4s r25, r26 }
3692     7310:       [0-9a-f]*       { subx r5, r6, r7 ; ld4s r25, r26 }
3693     7318:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
3694     7320:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; ill ; ld4s r25, r26 }
3695     7328:       [0-9a-f]*       { info 19 ; addi r15, r16, 5 ; ld4s r25, r26 }
3696     7330:       [0-9a-f]*       { info 19 ; mnz r5, r6, r7 ; ld4s r25, r26 }
3697     7338:       [0-9a-f]*       { info 19 ; shl3add r5, r6, r7 ; ld4s r25, r26 }
3698     7340:       [0-9a-f]*       { cmpne r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
3699     7348:       [0-9a-f]*       { subx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
3700     7350:       [0-9a-f]*       { mulx r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 }
3701     7358:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
3702     7360:       [0-9a-f]*       { shli r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
3703     7368:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
3704     7370:       [0-9a-f]*       { and r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
3705     7378:       [0-9a-f]*       { shl1add r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
3706     7380:       [0-9a-f]*       { mnz r15, r16, r17 ; mnz r5, r6, r7 ; ld4s r25, r26 }
3707     7388:       [0-9a-f]*       { mnz r15, r16, r17 ; xor r5, r6, r7 ; ld4s r25, r26 }
3708     7390:       [0-9a-f]*       { mnz r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 }
3709     7398:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
3710     73a0:       [0-9a-f]*       { move r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
3711     73a8:       [0-9a-f]*       { movei r15, 5 ; addi r5, r6, 5 ; ld4s r25, r26 }
3712     73b0:       [0-9a-f]*       { movei r15, 5 ; rotl r5, r6, r7 ; ld4s r25, r26 }
3713     73b8:       [0-9a-f]*       { movei r5, 5 ; jalrp r15 ; ld4s r25, r26 }
3714     73c0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
3715     73c8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
3716     73d0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
3717     73d8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
3718     73e0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld4s r25, r26 }
3719     73e8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
3720     73f0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; info 19 ; ld4s r25, r26 }
3721     73f8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
3722     7400:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
3723     7408:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 }
3724     7410:       [0-9a-f]*       { mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
3725     7418:       [0-9a-f]*       { mulx r5, r6, r7 ; or r15, r16, r17 ; ld4s r25, r26 }
3726     7420:       [0-9a-f]*       { mz r15, r16, r17 ; mnz r5, r6, r7 ; ld4s r25, r26 }
3727     7428:       [0-9a-f]*       { mz r15, r16, r17 ; xor r5, r6, r7 ; ld4s r25, r26 }
3728     7430:       [0-9a-f]*       { mz r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 }
3729     7438:       [0-9a-f]*       { ctz r5, r6 ; nop ; ld4s r25, r26 }
3730     7440:       [0-9a-f]*       { nop ; shl r15, r16, r17 ; ld4s r25, r26 }
3731     7448:       [0-9a-f]*       { nor r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 }
3732     7450:       [0-9a-f]*       { nor r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
3733     7458:       [0-9a-f]*       { nor r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
3734     7460:       [0-9a-f]*       { or r15, r16, r17 ; cmpltu r5, r6, r7 ; ld4s r25, r26 }
3735     7468:       [0-9a-f]*       { or r15, r16, r17 ; sub r5, r6, r7 ; ld4s r25, r26 }
3736     7470:       [0-9a-f]*       { or r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
3737     7478:       [0-9a-f]*       { pcnt r5, r6 ; mz r15, r16, r17 ; ld4s r25, r26 }
3738     7480:       [0-9a-f]*       { revbits r5, r6 ; jalrp r15 ; ld4s r25, r26 }
3739     7488:       [0-9a-f]*       { revbytes r5, r6 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
3740     7490:       [0-9a-f]*       { rotl r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
3741     7498:       [0-9a-f]*       { rotl r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
3742     74a0:       [0-9a-f]*       { rotl r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
3743     74a8:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 }
3744     74b0:       [0-9a-f]*       { rotli r15, r16, 5 ; shrui r5, r6, 5 ; ld4s r25, r26 }
3745     74b8:       [0-9a-f]*       { rotli r5, r6, 5 ; shl r15, r16, r17 ; ld4s r25, r26 }
3746     74c0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; ld4s r25, r26 }
3747     74c8:       [0-9a-f]*       { shl r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
3748     74d0:       [0-9a-f]*       { shl r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
3749     74d8:       [0-9a-f]*       { shl1add r15, r16, r17 ; mz r5, r6, r7 ; ld4s r25, r26 }
3750     74e0:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
3751     74e8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
3752     74f0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
3753     74f8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
3754     7500:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 }
3755     7508:       [0-9a-f]*       { shl2add r15, r16, r17 ; shrui r5, r6, 5 ; ld4s r25, r26 }
3756     7510:       [0-9a-f]*       { shl2add r5, r6, r7 ; shl r15, r16, r17 ; ld4s r25, r26 }
3757     7518:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
3758     7520:       [0-9a-f]*       { shl2addx r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
3759     7528:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
3760     7530:       [0-9a-f]*       { shl3add r15, r16, r17 ; mz r5, r6, r7 ; ld4s r25, r26 }
3761     7538:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
3762     7540:       [0-9a-f]*       { shl3addx r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
3763     7548:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
3764     7550:       [0-9a-f]*       { shl3addx r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
3765     7558:       [0-9a-f]*       { shli r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 }
3766     7560:       [0-9a-f]*       { shli r15, r16, 5 ; shrui r5, r6, 5 ; ld4s r25, r26 }
3767     7568:       [0-9a-f]*       { shli r5, r6, 5 ; shl r15, r16, r17 ; ld4s r25, r26 }
3768     7570:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
3769     7578:       [0-9a-f]*       { shrs r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
3770     7580:       [0-9a-f]*       { shrs r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
3771     7588:       [0-9a-f]*       { shrsi r15, r16, 5 ; mz r5, r6, r7 ; ld4s r25, r26 }
3772     7590:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
3773     7598:       [0-9a-f]*       { shru r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
3774     75a0:       [0-9a-f]*       { shru r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
3775     75a8:       [0-9a-f]*       { shru r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
3776     75b0:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 }
3777     75b8:       [0-9a-f]*       { shrui r15, r16, 5 ; shrui r5, r6, 5 ; ld4s r25, r26 }
3778     75c0:       [0-9a-f]*       { shrui r5, r6, 5 ; shl r15, r16, r17 ; ld4s r25, r26 }
3779     75c8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
3780     75d0:       [0-9a-f]*       { sub r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
3781     75d8:       [0-9a-f]*       { sub r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
3782     75e0:       [0-9a-f]*       { subx r15, r16, r17 ; mz r5, r6, r7 ; ld4s r25, r26 }
3783     75e8:       [0-9a-f]*       { subx r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
3784     75f0:       [0-9a-f]*       { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld4s r25, r26 }
3785     75f8:       [0-9a-f]*       { tblidxb0 r5, r6 ; subx r15, r16, r17 ; ld4s r25, r26 }
3786     7600:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
3787     7608:       [0-9a-f]*       { tblidxb2 r5, r6 ; rotli r15, r16, 5 ; ld4s r25, r26 }
3788     7610:       [0-9a-f]*       { tblidxb3 r5, r6 ; move r15, r16 ; ld4s r25, r26 }
3789     7618:       [0-9a-f]*       { xor r15, r16, r17 ; cmpne r5, r6, r7 ; ld4s r25, r26 }
3790     7620:       [0-9a-f]*       { xor r15, r16, r17 ; subx r5, r6, r7 ; ld4s r25, r26 }
3791     7628:       [0-9a-f]*       { xor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
3792     7630:       [0-9a-f]*       { cmulaf r5, r6, r7 ; ld4s_add r15, r16, 5 }
3793     7638:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; ld4s_add r15, r16, 5 }
3794     7640:       [0-9a-f]*       { shru r5, r6, r7 ; ld4s_add r15, r16, 5 }
3795     7648:       [0-9a-f]*       { v1minu r5, r6, r7 ; ld4s_add r15, r16, 5 }
3796     7650:       [0-9a-f]*       { v2mulfsc r5, r6, r7 ; ld4s_add r15, r16, 5 }
3797     7658:       [0-9a-f]*       { and r5, r6, r7 ; ld4u r15, r16 }
3798     7660:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; ld4u r15, r16 }
3799     7668:       [0-9a-f]*       { ori r5, r6, 5 ; ld4u r15, r16 }
3800     7670:       [0-9a-f]*       { v1cmplts r5, r6, r7 ; ld4u r15, r16 }
3801     7678:       [0-9a-f]*       { v2avgs r5, r6, r7 ; ld4u r15, r16 }
3802     7680:       [0-9a-f]*       { v4addsc r5, r6, r7 ; ld4u r15, r16 }
3803     7688:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
3804     7690:       [0-9a-f]*       { add r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 }
3805     7698:       [0-9a-f]*       { add r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
3806     76a0:       [0-9a-f]*       { pcnt r5, r6 ; addi r15, r16, 5 ; ld4u r25, r26 }
3807     76a8:       [0-9a-f]*       { addi r5, r6, 5 ; ill ; ld4u r25, r26 }
3808     76b0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
3809     76b8:       [0-9a-f]*       { addx r15, r16, r17 ; shl3add r5, r6, r7 ; ld4u r25, r26 }
3810     76c0:       [0-9a-f]*       { addx r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
3811     76c8:       [0-9a-f]*       { addxi r15, r16, 5 ; ld4u r25, r26 }
3812     76d0:       [0-9a-f]*       { tblidxb1 r5, r6 ; addxi r15, r16, 5 ; ld4u r25, r26 }
3813     76d8:       [0-9a-f]*       { addxi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
3814     76e0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
3815     76e8:       [0-9a-f]*       { and r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 }
3816     76f0:       [0-9a-f]*       { and r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
3817     76f8:       [0-9a-f]*       { pcnt r5, r6 ; andi r15, r16, 5 ; ld4u r25, r26 }
3818     7700:       [0-9a-f]*       { andi r5, r6, 5 ; ill ; ld4u r25, r26 }
3819     7708:       [0-9a-f]*       { clz r5, r6 ; cmples r15, r16, r17 ; ld4u r25, r26 }
3820     7710:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 }
3821     7718:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
3822     7720:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
3823     7728:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
3824     7730:       [0-9a-f]*       { cmpeq r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
3825     7738:       [0-9a-f]*       { cmpeq r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
3826     7740:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; or r5, r6, r7 ; ld4u r25, r26 }
3827     7748:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; ld4u r25, r26 }
3828     7750:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 }
3829     7758:       [0-9a-f]*       { cmples r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
3830     7760:       [0-9a-f]*       { cmples r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
3831     7768:       [0-9a-f]*       { ctz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
3832     7770:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
3833     7778:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
3834     7780:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
3835     7788:       [0-9a-f]*       { cmplts r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
3836     7790:       [0-9a-f]*       { cmplts r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
3837     7798:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; or r5, r6, r7 ; ld4u r25, r26 }
3838     77a0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; ld4u r25, r26 }
3839     77a8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
3840     77b0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
3841     77b8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
3842     77c0:       [0-9a-f]*       { ctz r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
3843     77c8:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
3844     77d0:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
3845     77d8:       [0-9a-f]*       { ctz r5, r6 ; nor r15, r16, r17 ; ld4u r25, r26 }
3846     77e0:       [0-9a-f]*       { cmples r5, r6, r7 ; ld4u r25, r26 }
3847     77e8:       [0-9a-f]*       { nor r15, r16, r17 ; ld4u r25, r26 }
3848     77f0:       [0-9a-f]*       { tblidxb1 r5, r6 ; ld4u r25, r26 }
3849     77f8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
3850     7800:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ill ; ld4u r25, r26 }
3851     7808:       [0-9a-f]*       { info 19 ; addx r15, r16, r17 ; ld4u r25, r26 }
3852     7810:       [0-9a-f]*       { info 19 ; move r5, r6 ; ld4u r25, r26 }
3853     7818:       [0-9a-f]*       { info 19 ; shl3addx r5, r6, r7 ; ld4u r25, r26 }
3854     7820:       [0-9a-f]*       { jalr r15 ; ld4u r25, r26 }
3855     7828:       [0-9a-f]*       { tblidxb1 r5, r6 ; jalr r15 ; ld4u r25, r26 }
3856     7830:       [0-9a-f]*       { nop ; jalrp r15 ; ld4u r25, r26 }
3857     7838:       [0-9a-f]*       { cmpleu r5, r6, r7 ; jr r15 ; ld4u r25, r26 }
3858     7840:       [0-9a-f]*       { shrsi r5, r6, 5 ; jr r15 ; ld4u r25, r26 }
3859     7848:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
3860     7850:       [0-9a-f]*       { clz r5, r6 ; lnk r15 ; ld4u r25, r26 }
3861     7858:       [0-9a-f]*       { shl2add r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
3862     7860:       [0-9a-f]*       { mnz r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
3863     7868:       [0-9a-f]*       { mnz r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
3864     7870:       [0-9a-f]*       { mnz r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
3865     7878:       [0-9a-f]*       { mulx r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
3866     7880:       [0-9a-f]*       { move r5, r6 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
3867     7888:       [0-9a-f]*       { movei r15, 5 ; addxi r5, r6, 5 ; ld4u r25, r26 }
3868     7890:       [0-9a-f]*       { movei r15, 5 ; shl r5, r6, r7 ; ld4u r25, r26 }
3869     7898:       [0-9a-f]*       { movei r5, 5 ; jrp r15 ; ld4u r25, r26 }
3870     78a0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
3871     78a8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
3872     78b0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; ld4u r25, r26 }
3873     78b8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
3874     78c0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; ld4u r25, r26 }
3875     78c8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
3876     78d0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
3877     78d8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 }
3878     78e0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
3879     78e8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
3880     78f0:       [0-9a-f]*       { mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
3881     78f8:       [0-9a-f]*       { mulx r5, r6, r7 ; rotli r15, r16, 5 ; ld4u r25, r26 }
3882     7900:       [0-9a-f]*       { mz r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
3883     7908:       [0-9a-f]*       { mz r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
3884     7910:       [0-9a-f]*       { mz r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
3885     7918:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; nop ; ld4u r25, r26 }
3886     7920:       [0-9a-f]*       { nop ; shl1add r15, r16, r17 ; ld4u r25, r26 }
3887     7928:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; nor r15, r16, r17 ; ld4u r25, r26 }
3888     7930:       [0-9a-f]*       { nor r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
3889     7938:       [0-9a-f]*       { nor r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
3890     7940:       [0-9a-f]*       { ctz r5, r6 ; or r15, r16, r17 ; ld4u r25, r26 }
3891     7948:       [0-9a-f]*       { tblidxb0 r5, r6 ; or r15, r16, r17 ; ld4u r25, r26 }
3892     7950:       [0-9a-f]*       { or r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
3893     7958:       [0-9a-f]*       { pcnt r5, r6 ; nor r15, r16, r17 ; ld4u r25, r26 }
3894     7960:       [0-9a-f]*       { revbits r5, r6 ; jrp r15 ; ld4u r25, r26 }
3895     7968:       [0-9a-f]*       { revbytes r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
3896     7970:       [0-9a-f]*       { clz r5, r6 ; rotl r15, r16, r17 ; ld4u r25, r26 }
3897     7978:       [0-9a-f]*       { rotl r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 }
3898     7980:       [0-9a-f]*       { rotl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
3899     7988:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpne r5, r6, r7 ; ld4u r25, r26 }
3900     7990:       [0-9a-f]*       { rotli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 }
3901     7998:       [0-9a-f]*       { rotli r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
3902     79a0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
3903     79a8:       [0-9a-f]*       { shl r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
3904     79b0:       [0-9a-f]*       { shl r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
3905     79b8:       [0-9a-f]*       { shl1add r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
3906     79c0:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
3907     79c8:       [0-9a-f]*       { clz r5, r6 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
3908     79d0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 }
3909     79d8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
3910     79e0:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpne r5, r6, r7 ; ld4u r25, r26 }
3911     79e8:       [0-9a-f]*       { shl2add r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 }
3912     79f0:       [0-9a-f]*       { shl2add r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
3913     79f8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
3914     7a00:       [0-9a-f]*       { shl2addx r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
3915     7a08:       [0-9a-f]*       { shl2addx r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
3916     7a10:       [0-9a-f]*       { shl3add r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
3917     7a18:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
3918     7a20:       [0-9a-f]*       { clz r5, r6 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
3919     7a28:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 }
3920     7a30:       [0-9a-f]*       { shl3addx r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
3921     7a38:       [0-9a-f]*       { shli r15, r16, 5 ; cmpne r5, r6, r7 ; ld4u r25, r26 }
3922     7a40:       [0-9a-f]*       { shli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 }
3923     7a48:       [0-9a-f]*       { shli r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
3924     7a50:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
3925     7a58:       [0-9a-f]*       { shrs r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
3926     7a60:       [0-9a-f]*       { shrs r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
3927     7a68:       [0-9a-f]*       { shrsi r15, r16, 5 ; nor r5, r6, r7 ; ld4u r25, r26 }
3928     7a70:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
3929     7a78:       [0-9a-f]*       { clz r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
3930     7a80:       [0-9a-f]*       { shru r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 }
3931     7a88:       [0-9a-f]*       { shru r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
3932     7a90:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpne r5, r6, r7 ; ld4u r25, r26 }
3933     7a98:       [0-9a-f]*       { shrui r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 }
3934     7aa0:       [0-9a-f]*       { shrui r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
3935     7aa8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
3936     7ab0:       [0-9a-f]*       { sub r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
3937     7ab8:       [0-9a-f]*       { sub r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
3938     7ac0:       [0-9a-f]*       { subx r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
3939     7ac8:       [0-9a-f]*       { subx r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
3940     7ad0:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
3941     7ad8:       [0-9a-f]*       { tblidxb0 r5, r6 ; ld4u r25, r26 }
3942     7ae0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 }
3943     7ae8:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl1add r15, r16, r17 ; ld4u r25, r26 }
3944     7af0:       [0-9a-f]*       { tblidxb3 r5, r6 ; mz r15, r16, r17 ; ld4u r25, r26 }
3945     7af8:       [0-9a-f]*       { xor r15, r16, r17 ; ld4u r25, r26 }
3946     7b00:       [0-9a-f]*       { tblidxb1 r5, r6 ; xor r15, r16, r17 ; ld4u r25, r26 }
3947     7b08:       [0-9a-f]*       { xor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
3948     7b10:       [0-9a-f]*       { cmulfr r5, r6, r7 ; ld4u_add r15, r16, 5 }
3949     7b18:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; ld4u_add r15, r16, 5 }
3950     7b20:       [0-9a-f]*       { shrux r5, r6, r7 ; ld4u_add r15, r16, 5 }
3951     7b28:       [0-9a-f]*       { v1mnz r5, r6, r7 ; ld4u_add r15, r16, 5 }
3952     7b30:       [0-9a-f]*       { v2mults r5, r6, r7 ; ld4u_add r15, r16, 5 }
3953     7b38:       [0-9a-f]*       { bfexts r5, r6, 5, 7 ; ld_add r15, r16, 5 }
3954     7b40:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; ld_add r15, r16, 5 }
3955     7b48:       [0-9a-f]*       { revbits r5, r6 ; ld_add r15, r16, 5 }
3956     7b50:       [0-9a-f]*       { v1cmpltu r5, r6, r7 ; ld_add r15, r16, 5 }
3957     7b58:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 ; ld_add r15, r16, 5 }
3958     7b60:       [0-9a-f]*       { v4int_l r5, r6, r7 ; ld_add r15, r16, 5 }
3959     7b68:       [0-9a-f]*       { cmulhr r5, r6, r7 ; ldna r15, r16 }
3960     7b70:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ldna r15, r16 }
3961     7b78:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; ldna r15, r16 }
3962     7b80:       [0-9a-f]*       { v1mulu r5, r6, r7 ; ldna r15, r16 }
3963     7b88:       [0-9a-f]*       { v2packh r5, r6, r7 ; ldna r15, r16 }
3964     7b90:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; ldna_add r15, r16, 5 }
3965     7b98:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; ldna_add r15, r16, 5 }
3966     7ba0:       [0-9a-f]*       { rotl r5, r6, r7 ; ldna_add r15, r16, 5 }
3967     7ba8:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; ldna_add r15, r16, 5 }
3968     7bb0:       [0-9a-f]*       { v2cmpleu r5, r6, r7 ; ldna_add r15, r16, 5 }
3969     7bb8:       [0-9a-f]*       { v4shl r5, r6, r7 ; ldna_add r15, r16, 5 }
3970     7bc0:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; ldnt r15, r16 }
3971     7bc8:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; ldnt r15, r16 }
3972     7bd0:       [0-9a-f]*       { subx r5, r6, r7 ; ldnt r15, r16 }
3973     7bd8:       [0-9a-f]*       { v1mz r5, r6, r7 ; ldnt r15, r16 }
3974     7be0:       [0-9a-f]*       { v2packuc r5, r6, r7 ; ldnt r15, r16 }
3975     7be8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; ldnt1s r15, r16 }
3976     7bf0:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; ldnt1s r15, r16 }
3977     7bf8:       [0-9a-f]*       { shl r5, r6, r7 ; ldnt1s r15, r16 }
3978     7c00:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; ldnt1s r15, r16 }
3979     7c08:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; ldnt1s r15, r16 }
3980     7c10:       [0-9a-f]*       { v4shrs r5, r6, r7 ; ldnt1s r15, r16 }
3981     7c18:       [0-9a-f]*       { dblalign r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
3982     7c20:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
3983     7c28:       [0-9a-f]*       { tblidxb0 r5, r6 ; ldnt1s_add r15, r16, 5 }
3984     7c30:       [0-9a-f]*       { v1sadu r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
3985     7c38:       [0-9a-f]*       { v2sadau r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
3986     7c40:       [0-9a-f]*       { cmpeq r5, r6, r7 ; ldnt1u r15, r16 }
3987     7c48:       [0-9a-f]*       { infol 4660 ; ldnt1u r15, r16 }
3988     7c50:       [0-9a-f]*       { shl1add r5, r6, r7 ; ldnt1u r15, r16 }
3989     7c58:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; ldnt1u r15, r16 }
3990     7c60:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; ldnt1u r15, r16 }
3991     7c68:       [0-9a-f]*       { v4sub r5, r6, r7 ; ldnt1u r15, r16 }
3992     7c70:       [0-9a-f]*       { dblalign4 r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
3993     7c78:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
3994     7c80:       [0-9a-f]*       { tblidxb2 r5, r6 ; ldnt1u_add r15, r16, 5 }
3995     7c88:       [0-9a-f]*       { v1shli r5, r6, 5 ; ldnt1u_add r15, r16, 5 }
3996     7c90:       [0-9a-f]*       { v2sadu r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
3997     7c98:       [0-9a-f]*       { cmples r5, r6, r7 ; ldnt2s r15, r16 }
3998     7ca0:       [0-9a-f]*       { mnz r5, r6, r7 ; ldnt2s r15, r16 }
3999     7ca8:       [0-9a-f]*       { shl2add r5, r6, r7 ; ldnt2s r15, r16 }
4000     7cb0:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; ldnt2s r15, r16 }
4001     7cb8:       [0-9a-f]*       { v2dotp r5, r6, r7 ; ldnt2s r15, r16 }
4002     7cc0:       [0-9a-f]*       { xor r5, r6, r7 ; ldnt2s r15, r16 }
4003     7cc8:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
4004     7cd0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
4005     7cd8:       [0-9a-f]*       { v1add r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
4006     7ce0:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; ldnt2s_add r15, r16, 5 }
4007     7ce8:       [0-9a-f]*       { v2shli r5, r6, 5 ; ldnt2s_add r15, r16, 5 }
4008     7cf0:       [0-9a-f]*       { cmplts r5, r6, r7 ; ldnt2u r15, r16 }
4009     7cf8:       [0-9a-f]*       { movei r5, 5 ; ldnt2u r15, r16 }
4010     7d00:       [0-9a-f]*       { shl3add r5, r6, r7 ; ldnt2u r15, r16 }
4011     7d08:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; ldnt2u r15, r16 }
4012     7d10:       [0-9a-f]*       { v2int_h r5, r6, r7 ; ldnt2u r15, r16 }
4013     7d18:       [0-9a-f]*       { add r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
4014     7d20:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
4015     7d28:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
4016     7d30:       [0-9a-f]*       { v1adduc r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
4017     7d38:       [0-9a-f]*       { v1shrui r5, r6, 5 ; ldnt2u_add r15, r16, 5 }
4018     7d40:       [0-9a-f]*       { v2shrs r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
4019     7d48:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ldnt4s r15, r16 }
4020     7d50:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; ldnt4s r15, r16 }
4021     7d58:       [0-9a-f]*       { shli r5, r6, 5 ; ldnt4s r15, r16 }
4022     7d60:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; ldnt4s r15, r16 }
4023     7d68:       [0-9a-f]*       { v2maxs r5, r6, r7 ; ldnt4s r15, r16 }
4024     7d70:       [0-9a-f]*       { addli r5, r6, 4660 ; ldnt4s_add r15, r16, 5 }
4025     7d78:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
4026     7d80:       [0-9a-f]*       { mulx r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
4027     7d88:       [0-9a-f]*       { v1avgu r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
4028     7d90:       [0-9a-f]*       { v1subuc r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
4029     7d98:       [0-9a-f]*       { v2shru r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
4030     7da0:       [0-9a-f]*       { cmpne r5, r6, r7 ; ldnt4u r15, r16 }
4031     7da8:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; ldnt4u r15, r16 }
4032     7db0:       [0-9a-f]*       { shlxi r5, r6, 5 ; ldnt4u r15, r16 }
4033     7db8:       [0-9a-f]*       { v1int_l r5, r6, r7 ; ldnt4u r15, r16 }
4034     7dc0:       [0-9a-f]*       { v2mins r5, r6, r7 ; ldnt4u r15, r16 }
4035     7dc8:       [0-9a-f]*       { addxi r5, r6, 5 ; ldnt4u_add r15, r16, 5 }
4036     7dd0:       [0-9a-f]*       { fdouble_unpack_max r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
4037     7dd8:       [0-9a-f]*       { nop ; ldnt4u_add r15, r16, 5 }
4038     7de0:       [0-9a-f]*       { v1cmpeqi r5, r6, 5 ; ldnt4u_add r15, r16, 5 }
4039     7de8:       [0-9a-f]*       { v2addi r5, r6, 5 ; ldnt4u_add r15, r16, 5 }
4040     7df0:       [0-9a-f]*       { v2sub r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
4041     7df8:       [0-9a-f]*       { cmula r5, r6, r7 ; ldnt_add r15, r16, 5 }
4042     7e00:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; ldnt_add r15, r16, 5 }
4043     7e08:       [0-9a-f]*       { shrsi r5, r6, 5 ; ldnt_add r15, r16, 5 }
4044     7e10:       [0-9a-f]*       { v1maxui r5, r6, 5 ; ldnt_add r15, r16, 5 }
4045     7e18:       [0-9a-f]*       { v2mnz r5, r6, r7 ; ldnt_add r15, r16, 5 }
4046     7e20:       [0-9a-f]*       { add r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
4047     7e28:       [0-9a-f]*       { addx r5, r6, r7 ; lnk r15 ; prefetch r25 }
4048     7e30:       [0-9a-f]*       { and r5, r6, r7 ; lnk r15 ; prefetch r25 }
4049     7e38:       [0-9a-f]*       { clz r5, r6 ; lnk r15 ; ld4u r25, r26 }
4050     7e40:       [0-9a-f]*       { cmovnez r5, r6, r7 ; lnk r15 ; prefetch r25 }
4051     7e48:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; lnk r15 ; prefetch_l2 r25 }
4052     7e50:       [0-9a-f]*       { cmpleu r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
4053     7e58:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; lnk r15 ; st r25, r26 }
4054     7e60:       [0-9a-f]*       { cmpne r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
4055     7e68:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; lnk r15 }
4056     7e70:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; lnk r15 ; prefetch_l3_fault r25 }
4057     7e78:       [0-9a-f]*       { cmpleu r5, r6, r7 ; lnk r15 ; ld r25, r26 }
4058     7e80:       [0-9a-f]*       { shrsi r5, r6, 5 ; lnk r15 ; ld r25, r26 }
4059     7e88:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; lnk r15 ; ld1s r25, r26 }
4060     7e90:       [0-9a-f]*       { clz r5, r6 ; lnk r15 ; ld1u r25, r26 }
4061     7e98:       [0-9a-f]*       { shl2add r5, r6, r7 ; lnk r15 ; ld1u r25, r26 }
4062     7ea0:       [0-9a-f]*       { movei r5, 5 ; lnk r15 ; ld2s r25, r26 }
4063     7ea8:       [0-9a-f]*       { add r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
4064     7eb0:       [0-9a-f]*       { revbytes r5, r6 ; lnk r15 ; ld2u r25, r26 }
4065     7eb8:       [0-9a-f]*       { ctz r5, r6 ; lnk r15 ; ld4s r25, r26 }
4066     7ec0:       [0-9a-f]*       { tblidxb0 r5, r6 ; lnk r15 ; ld4s r25, r26 }
4067     7ec8:       [0-9a-f]*       { mz r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
4068     7ed0:       [0-9a-f]*       { mnz r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
4069     7ed8:       [0-9a-f]*       { movei r5, 5 ; lnk r15 ; prefetch_l3 r25 }
4070     7ee0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
4071     7ee8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
4072     7ef0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; lnk r15 ; prefetch r25 }
4073     7ef8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; lnk r15 ; prefetch r25 }
4074     7f00:       [0-9a-f]*       { mulx r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
4075     7f08:       [0-9a-f]*       { nop ; lnk r15 ; prefetch_l2_fault r25 }
4076     7f10:       [0-9a-f]*       { or r5, r6, r7 ; lnk r15 ; prefetch_l3_fault r25 }
4077     7f18:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; lnk r15 ; prefetch r25 }
4078     7f20:       [0-9a-f]*       { shrui r5, r6, 5 ; lnk r15 ; prefetch r25 }
4079     7f28:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; lnk r15 ; prefetch r25 }
4080     7f30:       [0-9a-f]*       { cmovnez r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
4081     7f38:       [0-9a-f]*       { shl3add r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
4082     7f40:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
4083     7f48:       [0-9a-f]*       { addx r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
4084     7f50:       [0-9a-f]*       { rotli r5, r6, 5 ; lnk r15 ; prefetch_l2_fault r25 }
4085     7f58:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; lnk r15 ; prefetch_l3 r25 }
4086     7f60:       [0-9a-f]*       { tblidxb2 r5, r6 ; lnk r15 ; prefetch_l3 r25 }
4087     7f68:       [0-9a-f]*       { nor r5, r6, r7 ; lnk r15 ; prefetch_l3_fault r25 }
4088     7f70:       [0-9a-f]*       { revbits r5, r6 ; lnk r15 ; prefetch_l3_fault r25 }
4089     7f78:       [0-9a-f]*       { rotl r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
4090     7f80:       [0-9a-f]*       { shl r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
4091     7f88:       [0-9a-f]*       { shl1addx r5, r6, r7 ; lnk r15 }
4092     7f90:       [0-9a-f]*       { shl3add r5, r6, r7 ; lnk r15 ; ld1s r25, r26 }
4093     7f98:       [0-9a-f]*       { shli r5, r6, 5 ; lnk r15 ; ld2s r25, r26 }
4094     7fa0:       [0-9a-f]*       { shrsi r5, r6, 5 ; lnk r15 ; ld2s r25, r26 }
4095     7fa8:       [0-9a-f]*       { shrui r5, r6, 5 ; lnk r15 ; ld4s r25, r26 }
4096     7fb0:       [0-9a-f]*       { movei r5, 5 ; lnk r15 ; st r25, r26 }
4097     7fb8:       [0-9a-f]*       { add r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
4098     7fc0:       [0-9a-f]*       { revbytes r5, r6 ; lnk r15 ; st1 r25, r26 }
4099     7fc8:       [0-9a-f]*       { ctz r5, r6 ; lnk r15 ; st2 r25, r26 }
4100     7fd0:       [0-9a-f]*       { tblidxb0 r5, r6 ; lnk r15 ; st2 r25, r26 }
4101     7fd8:       [0-9a-f]*       { mz r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
4102     7fe0:       [0-9a-f]*       { sub r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
4103     7fe8:       [0-9a-f]*       { tblidxb0 r5, r6 ; lnk r15 ; prefetch_l3 r25 }
4104     7ff0:       [0-9a-f]*       { tblidxb2 r5, r6 ; lnk r15 ; st r25, r26 }
4105     7ff8:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; lnk r15 }
4106     8000:       [0-9a-f]*       { v2cmpltu r5, r6, r7 ; lnk r15 }
4107     8008:       [0-9a-f]*       { v4shru r5, r6, r7 ; lnk r15 }
4108     8010:       [0-9a-f]*       { cmples r5, r6, r7 ; mf }
4109     8018:       [0-9a-f]*       { mnz r5, r6, r7 ; mf }
4110     8020:       [0-9a-f]*       { shl2add r5, r6, r7 ; mf }
4111     8028:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; mf }
4112     8030:       [0-9a-f]*       { v2dotp r5, r6, r7 ; mf }
4113     8038:       [0-9a-f]*       { xor r5, r6, r7 ; mf }
4114     8040:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
4115     8048:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
4116     8050:       [0-9a-f]*       { v1add r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
4117     8058:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
4118     8060:       [0-9a-f]*       { v2shli r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
4119     8068:       [0-9a-f]*       { mm r5, r6, 5, 7 ; cmpne r15, r16, r17 }
4120     8070:       [0-9a-f]*       { mm r5, r6, 5, 7 ; ld4u r15, r16 }
4121     8078:       [0-9a-f]*       { mm r5, r6, 5, 7 ; prefetch_l1_fault r15 }
4122     8080:       [0-9a-f]*       { mm r5, r6, 5, 7 ; stnt_add r15, r16, 5 }
4123     8088:       [0-9a-f]*       { mm r5, r6, 5, 7 ; v2cmpltsi r15, r16, 5 }
4124     8090:       [0-9a-f]*       { mnz r15, r16, r17 ; add r5, r6, r7 ; ld1u r25, r26 }
4125     8098:       [0-9a-f]*       { mnz r15, r16, r17 ; addx r5, r6, r7 ; ld2s r25, r26 }
4126     80a0:       [0-9a-f]*       { mnz r15, r16, r17 ; and r5, r6, r7 ; ld2s r25, r26 }
4127     80a8:       [0-9a-f]*       { clz r5, r6 ; mnz r15, r16, r17 ; ld1u r25, r26 }
4128     80b0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
4129     80b8:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
4130     80c0:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch r25 }
4131     80c8:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
4132     80d0:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
4133     80d8:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; mnz r15, r16, r17 }
4134     80e0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
4135     80e8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
4136     80f0:       [0-9a-f]*       { mnz r15, r16, r17 ; shl3add r5, r6, r7 ; ld r25, r26 }
4137     80f8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; ld1s r25, r26 }
4138     8100:       [0-9a-f]*       { mnz r15, r16, r17 ; addx r5, r6, r7 ; ld1u r25, r26 }
4139     8108:       [0-9a-f]*       { mnz r15, r16, r17 ; rotli r5, r6, 5 ; ld1u r25, r26 }
4140     8110:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 }
4141     8118:       [0-9a-f]*       { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 }
4142     8120:       [0-9a-f]*       { mnz r15, r16, r17 ; nor r5, r6, r7 ; ld2u r25, r26 }
4143     8128:       [0-9a-f]*       { mnz r15, r16, r17 ; cmplts r5, r6, r7 ; ld4s r25, r26 }
4144     8130:       [0-9a-f]*       { mnz r15, r16, r17 ; shru r5, r6, r7 ; ld4s r25, r26 }
4145     8138:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 }
4146     8140:       [0-9a-f]*       { mnz r15, r16, r17 ; mnz r5, r6, r7 ; ld4u r25, r26 }
4147     8148:       [0-9a-f]*       { mnz r15, r16, r17 ; movei r5, 5 ; prefetch r25 }
4148     8150:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 }
4149     8158:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
4150     8160:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
4151     8168:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
4152     8170:       [0-9a-f]*       { mulx r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
4153     8178:       [0-9a-f]*       { mnz r15, r16, r17 ; nop ; prefetch r25 }
4154     8180:       [0-9a-f]*       { mnz r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
4155     8188:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch r25 }
4156     8190:       [0-9a-f]*       { mnz r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
4157     8198:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
4158     81a0:       [0-9a-f]*       { mnz r15, r16, r17 ; and r5, r6, r7 ; prefetch_l1_fault r25 }
4159     81a8:       [0-9a-f]*       { mnz r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l1_fault r25 }
4160     81b0:       [0-9a-f]*       { mnz r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l2 r25 }
4161     81b8:       [0-9a-f]*       { mnz r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2 r25 }
4162     81c0:       [0-9a-f]*       { pcnt r5, r6 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
4163     81c8:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 }
4164     81d0:       [0-9a-f]*       { mnz r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l3 r25 }
4165     81d8:       [0-9a-f]*       { mulax r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 }
4166     81e0:       [0-9a-f]*       { revbits r5, r6 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
4167     81e8:       [0-9a-f]*       { mnz r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
4168     81f0:       [0-9a-f]*       { mnz r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l3_fault r25 }
4169     81f8:       [0-9a-f]*       { mnz r15, r16, r17 ; shl1addx r5, r6, r7 ; st r25, r26 }
4170     8200:       [0-9a-f]*       { mnz r15, r16, r17 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
4171     8208:       [0-9a-f]*       { mnz r15, r16, r17 ; shl3addx r5, r6, r7 }
4172     8210:       [0-9a-f]*       { mnz r15, r16, r17 ; shrs r5, r6, r7 }
4173     8218:       [0-9a-f]*       { mnz r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
4174     8220:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; st r25, r26 }
4175     8228:       [0-9a-f]*       { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; st r25, r26 }
4176     8230:       [0-9a-f]*       { mnz r15, r16, r17 ; nor r5, r6, r7 ; st1 r25, r26 }
4177     8238:       [0-9a-f]*       { mnz r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 }
4178     8240:       [0-9a-f]*       { mnz r15, r16, r17 ; shru r5, r6, r7 ; st2 r25, r26 }
4179     8248:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 }
4180     8250:       [0-9a-f]*       { mnz r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
4181     8258:       [0-9a-f]*       { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; prefetch r25 }
4182     8260:       [0-9a-f]*       { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
4183     8268:       [0-9a-f]*       { mnz r15, r16, r17 ; v1cmpltui r5, r6, 5 }
4184     8270:       [0-9a-f]*       { mnz r15, r16, r17 ; v2cmples r5, r6, r7 }
4185     8278:       [0-9a-f]*       { mnz r15, r16, r17 ; v4packsc r5, r6, r7 }
4186     8280:       [0-9a-f]*       { mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
4187     8288:       [0-9a-f]*       { mnz r5, r6, r7 ; addx r15, r16, r17 ; st r25, r26 }
4188     8290:       [0-9a-f]*       { mnz r5, r6, r7 ; and r15, r16, r17 ; st r25, r26 }
4189     8298:       [0-9a-f]*       { mnz r5, r6, r7 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
4190     82a0:       [0-9a-f]*       { mnz r5, r6, r7 ; cmples r15, r16, r17 ; st2 r25, r26 }
4191     82a8:       [0-9a-f]*       { mnz r5, r6, r7 ; cmplts r15, r16, r17 }
4192     82b0:       [0-9a-f]*       { mnz r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
4193     82b8:       [0-9a-f]*       { mnz r5, r6, r7 ; ld2u r25, r26 }
4194     82c0:       [0-9a-f]*       { mnz r5, r6, r7 ; info 19 ; ld4s r25, r26 }
4195     82c8:       [0-9a-f]*       { mnz r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
4196     82d0:       [0-9a-f]*       { mnz r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
4197     82d8:       [0-9a-f]*       { mnz r5, r6, r7 ; nop ; ld r25, r26 }
4198     82e0:       [0-9a-f]*       { mnz r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
4199     82e8:       [0-9a-f]*       { mnz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1u r25, r26 }
4200     82f0:       [0-9a-f]*       { mnz r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
4201     82f8:       [0-9a-f]*       { mnz r5, r6, r7 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
4202     8300:       [0-9a-f]*       { mnz r5, r6, r7 ; shl r15, r16, r17 ; ld2u r25, r26 }
4203     8308:       [0-9a-f]*       { mnz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
4204     8310:       [0-9a-f]*       { mnz r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
4205     8318:       [0-9a-f]*       { mnz r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
4206     8320:       [0-9a-f]*       { mnz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
4207     8328:       [0-9a-f]*       { mnz r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 }
4208     8330:       [0-9a-f]*       { mnz r5, r6, r7 ; nop ; prefetch_l1_fault r25 }
4209     8338:       [0-9a-f]*       { mnz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
4210     8340:       [0-9a-f]*       { mnz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
4211     8348:       [0-9a-f]*       { mnz r5, r6, r7 ; info 19 ; prefetch r25 }
4212     8350:       [0-9a-f]*       { mnz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
4213     8358:       [0-9a-f]*       { mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
4214     8360:       [0-9a-f]*       { mnz r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
4215     8368:       [0-9a-f]*       { mnz r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
4216     8370:       [0-9a-f]*       { mnz r5, r6, r7 ; movei r15, 5 ; prefetch_l3 r25 }
4217     8378:       [0-9a-f]*       { mnz r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
4218     8380:       [0-9a-f]*       { mnz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
4219     8388:       [0-9a-f]*       { mnz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 }
4220     8390:       [0-9a-f]*       { mnz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
4221     8398:       [0-9a-f]*       { mnz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
4222     83a0:       [0-9a-f]*       { mnz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
4223     83a8:       [0-9a-f]*       { mnz r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
4224     83b0:       [0-9a-f]*       { mnz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 }
4225     83b8:       [0-9a-f]*       { mnz r5, r6, r7 ; info 19 ; st r25, r26 }
4226     83c0:       [0-9a-f]*       { mnz r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
4227     83c8:       [0-9a-f]*       { mnz r5, r6, r7 ; st2 r15, r16 }
4228     83d0:       [0-9a-f]*       { mnz r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
4229     83d8:       [0-9a-f]*       { mnz r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 }
4230     83e0:       [0-9a-f]*       { mnz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
4231     83e8:       [0-9a-f]*       { mnz r5, r6, r7 ; v1maxu r15, r16, r17 }
4232     83f0:       [0-9a-f]*       { mnz r5, r6, r7 ; v2shrs r15, r16, r17 }
4233     83f8:       [0-9a-f]*       { move r15, r16 ; add r5, r6, r7 ; ld1u r25, r26 }
4234     8400:       [0-9a-f]*       { move r15, r16 ; addx r5, r6, r7 ; ld2s r25, r26 }
4235     8408:       [0-9a-f]*       { move r15, r16 ; and r5, r6, r7 ; ld2s r25, r26 }
4236     8410:       [0-9a-f]*       { clz r5, r6 ; move r15, r16 ; ld1u r25, r26 }
4237     8418:       [0-9a-f]*       { cmovnez r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
4238     8420:       [0-9a-f]*       { move r15, r16 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
4239     8428:       [0-9a-f]*       { move r15, r16 ; cmpleu r5, r6, r7 ; prefetch r25 }
4240     8430:       [0-9a-f]*       { move r15, r16 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
4241     8438:       [0-9a-f]*       { move r15, r16 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
4242     8440:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; move r15, r16 }
4243     8448:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 }
4244     8450:       [0-9a-f]*       { cmovnez r5, r6, r7 ; move r15, r16 ; ld r25, r26 }
4245     8458:       [0-9a-f]*       { move r15, r16 ; shl3add r5, r6, r7 ; ld r25, r26 }
4246     8460:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 }
4247     8468:       [0-9a-f]*       { move r15, r16 ; addx r5, r6, r7 ; ld1u r25, r26 }
4248     8470:       [0-9a-f]*       { move r15, r16 ; rotli r5, r6, 5 ; ld1u r25, r26 }
4249     8478:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; move r15, r16 ; ld2s r25, r26 }
4250     8480:       [0-9a-f]*       { tblidxb2 r5, r6 ; move r15, r16 ; ld2s r25, r26 }
4251     8488:       [0-9a-f]*       { move r15, r16 ; nor r5, r6, r7 ; ld2u r25, r26 }
4252     8490:       [0-9a-f]*       { move r15, r16 ; cmplts r5, r6, r7 ; ld4s r25, r26 }
4253     8498:       [0-9a-f]*       { move r15, r16 ; shru r5, r6, r7 ; ld4s r25, r26 }
4254     84a0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
4255     84a8:       [0-9a-f]*       { move r15, r16 ; mnz r5, r6, r7 ; ld4u r25, r26 }
4256     84b0:       [0-9a-f]*       { move r15, r16 ; movei r5, 5 ; prefetch r25 }
4257     84b8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
4258     84c0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
4259     84c8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
4260     84d0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld2s r25, r26 }
4261     84d8:       [0-9a-f]*       { mulx r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
4262     84e0:       [0-9a-f]*       { move r15, r16 ; nop ; prefetch r25 }
4263     84e8:       [0-9a-f]*       { move r15, r16 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
4264     84f0:       [0-9a-f]*       { move r15, r16 ; cmpeqi r5, r6, 5 ; prefetch r25 }
4265     84f8:       [0-9a-f]*       { move r15, r16 ; shli r5, r6, 5 ; prefetch r25 }
4266     8500:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; move r15, r16 ; prefetch r25 }
4267     8508:       [0-9a-f]*       { move r15, r16 ; and r5, r6, r7 ; prefetch_l1_fault r25 }
4268     8510:       [0-9a-f]*       { move r15, r16 ; shl1add r5, r6, r7 ; prefetch_l1_fault r25 }
4269     8518:       [0-9a-f]*       { move r15, r16 ; mnz r5, r6, r7 ; prefetch_l2 r25 }
4270     8520:       [0-9a-f]*       { move r15, r16 ; xor r5, r6, r7 ; prefetch_l2 r25 }
4271     8528:       [0-9a-f]*       { pcnt r5, r6 ; move r15, r16 ; prefetch_l2_fault r25 }
4272     8530:       [0-9a-f]*       { move r15, r16 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 }
4273     8538:       [0-9a-f]*       { move r15, r16 ; sub r5, r6, r7 ; prefetch_l3 r25 }
4274     8540:       [0-9a-f]*       { mulax r5, r6, r7 ; move r15, r16 ; prefetch_l3_fault r25 }
4275     8548:       [0-9a-f]*       { revbits r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 }
4276     8550:       [0-9a-f]*       { move r15, r16 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
4277     8558:       [0-9a-f]*       { move r15, r16 ; shl r5, r6, r7 ; prefetch_l3_fault r25 }
4278     8560:       [0-9a-f]*       { move r15, r16 ; shl1addx r5, r6, r7 ; st r25, r26 }
4279     8568:       [0-9a-f]*       { move r15, r16 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
4280     8570:       [0-9a-f]*       { move r15, r16 ; shl3addx r5, r6, r7 }
4281     8578:       [0-9a-f]*       { move r15, r16 ; shrs r5, r6, r7 }
4282     8580:       [0-9a-f]*       { move r15, r16 ; shrui r5, r6, 5 ; ld1s r25, r26 }
4283     8588:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; move r15, r16 ; st r25, r26 }
4284     8590:       [0-9a-f]*       { tblidxb2 r5, r6 ; move r15, r16 ; st r25, r26 }
4285     8598:       [0-9a-f]*       { move r15, r16 ; nor r5, r6, r7 ; st1 r25, r26 }
4286     85a0:       [0-9a-f]*       { move r15, r16 ; cmplts r5, r6, r7 ; st2 r25, r26 }
4287     85a8:       [0-9a-f]*       { move r15, r16 ; shru r5, r6, r7 ; st2 r25, r26 }
4288     85b0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
4289     85b8:       [0-9a-f]*       { move r15, r16 ; sub r5, r6, r7 ; prefetch r25 }
4290     85c0:       [0-9a-f]*       { tblidxb0 r5, r6 ; move r15, r16 ; prefetch r25 }
4291     85c8:       [0-9a-f]*       { tblidxb2 r5, r6 ; move r15, r16 ; prefetch_l2 r25 }
4292     85d0:       [0-9a-f]*       { move r15, r16 ; v1cmpltui r5, r6, 5 }
4293     85d8:       [0-9a-f]*       { move r15, r16 ; v2cmples r5, r6, r7 }
4294     85e0:       [0-9a-f]*       { move r15, r16 ; v4packsc r5, r6, r7 }
4295     85e8:       [0-9a-f]*       { move r5, r6 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
4296     85f0:       [0-9a-f]*       { move r5, r6 ; addx r15, r16, r17 ; st r25, r26 }
4297     85f8:       [0-9a-f]*       { move r5, r6 ; and r15, r16, r17 ; st r25, r26 }
4298     8600:       [0-9a-f]*       { move r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
4299     8608:       [0-9a-f]*       { move r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 }
4300     8610:       [0-9a-f]*       { move r5, r6 ; cmplts r15, r16, r17 }
4301     8618:       [0-9a-f]*       { move r5, r6 ; cmpne r15, r16, r17 ; ld r25, r26 }
4302     8620:       [0-9a-f]*       { move r5, r6 ; ld2u r25, r26 }
4303     8628:       [0-9a-f]*       { move r5, r6 ; info 19 ; ld4s r25, r26 }
4304     8630:       [0-9a-f]*       { move r5, r6 ; jalrp r15 ; ld2u r25, r26 }
4305     8638:       [0-9a-f]*       { move r5, r6 ; jrp r15 ; ld4u r25, r26 }
4306     8640:       [0-9a-f]*       { move r5, r6 ; nop ; ld r25, r26 }
4307     8648:       [0-9a-f]*       { move r5, r6 ; jalrp r15 ; ld1s r25, r26 }
4308     8650:       [0-9a-f]*       { move r5, r6 ; cmpleu r15, r16, r17 ; ld1u r25, r26 }
4309     8658:       [0-9a-f]*       { move r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 }
4310     8660:       [0-9a-f]*       { move r5, r6 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
4311     8668:       [0-9a-f]*       { move r5, r6 ; shl r15, r16, r17 ; ld2u r25, r26 }
4312     8670:       [0-9a-f]*       { move r5, r6 ; mnz r15, r16, r17 ; ld4s r25, r26 }
4313     8678:       [0-9a-f]*       { move r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
4314     8680:       [0-9a-f]*       { move r5, r6 ; ldnt1s_add r15, r16, 5 }
4315     8688:       [0-9a-f]*       { move r5, r6 ; mnz r15, r16, r17 ; prefetch r25 }
4316     8690:       [0-9a-f]*       { move r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 }
4317     8698:       [0-9a-f]*       { move r5, r6 ; nop ; prefetch_l1_fault r25 }
4318     86a0:       [0-9a-f]*       { move r5, r6 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
4319     86a8:       [0-9a-f]*       { move r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
4320     86b0:       [0-9a-f]*       { move r5, r6 ; info 19 ; prefetch r25 }
4321     86b8:       [0-9a-f]*       { move r5, r6 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
4322     86c0:       [0-9a-f]*       { move r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 }
4323     86c8:       [0-9a-f]*       { move r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
4324     86d0:       [0-9a-f]*       { move r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
4325     86d8:       [0-9a-f]*       { move r5, r6 ; movei r15, 5 ; prefetch_l3 r25 }
4326     86e0:       [0-9a-f]*       { move r5, r6 ; info 19 ; prefetch_l3_fault r25 }
4327     86e8:       [0-9a-f]*       { move r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
4328     86f0:       [0-9a-f]*       { move r5, r6 ; shl r15, r16, r17 ; prefetch_l2 r25 }
4329     86f8:       [0-9a-f]*       { move r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
4330     8700:       [0-9a-f]*       { move r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
4331     8708:       [0-9a-f]*       { move r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
4332     8710:       [0-9a-f]*       { move r5, r6 ; shrs r15, r16, r17 ; st1 r25, r26 }
4333     8718:       [0-9a-f]*       { move r5, r6 ; shru r15, r16, r17 ; st4 r25, r26 }
4334     8720:       [0-9a-f]*       { move r5, r6 ; info 19 ; st r25, r26 }
4335     8728:       [0-9a-f]*       { move r5, r6 ; cmples r15, r16, r17 ; st1 r25, r26 }
4336     8730:       [0-9a-f]*       { move r5, r6 ; st2 r15, r16 }
4337     8738:       [0-9a-f]*       { move r5, r6 ; shrs r15, r16, r17 ; st2 r25, r26 }
4338     8740:       [0-9a-f]*       { move r5, r6 ; rotli r15, r16, 5 ; st4 r25, r26 }
4339     8748:       [0-9a-f]*       { move r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
4340     8750:       [0-9a-f]*       { move r5, r6 ; v1maxu r15, r16, r17 }
4341     8758:       [0-9a-f]*       { move r5, r6 ; v2shrs r15, r16, r17 }
4342     8760:       [0-9a-f]*       { movei r15, 5 ; add r5, r6, r7 ; ld1u r25, r26 }
4343     8768:       [0-9a-f]*       { movei r15, 5 ; addx r5, r6, r7 ; ld2s r25, r26 }
4344     8770:       [0-9a-f]*       { movei r15, 5 ; and r5, r6, r7 ; ld2s r25, r26 }
4345     8778:       [0-9a-f]*       { clz r5, r6 ; movei r15, 5 ; ld1u r25, r26 }
4346     8780:       [0-9a-f]*       { cmovnez r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
4347     8788:       [0-9a-f]*       { movei r15, 5 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
4348     8790:       [0-9a-f]*       { movei r15, 5 ; cmpleu r5, r6, r7 ; prefetch r25 }
4349     8798:       [0-9a-f]*       { movei r15, 5 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
4350     87a0:       [0-9a-f]*       { movei r15, 5 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
4351     87a8:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; movei r15, 5 }
4352     87b0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 }
4353     87b8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
4354     87c0:       [0-9a-f]*       { movei r15, 5 ; shl3add r5, r6, r7 ; ld r25, r26 }
4355     87c8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
4356     87d0:       [0-9a-f]*       { movei r15, 5 ; addx r5, r6, r7 ; ld1u r25, r26 }
4357     87d8:       [0-9a-f]*       { movei r15, 5 ; rotli r5, r6, 5 ; ld1u r25, r26 }
4358     87e0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; movei r15, 5 ; ld2s r25, r26 }
4359     87e8:       [0-9a-f]*       { tblidxb2 r5, r6 ; movei r15, 5 ; ld2s r25, r26 }
4360     87f0:       [0-9a-f]*       { movei r15, 5 ; nor r5, r6, r7 ; ld2u r25, r26 }
4361     87f8:       [0-9a-f]*       { movei r15, 5 ; cmplts r5, r6, r7 ; ld4s r25, r26 }
4362     8800:       [0-9a-f]*       { movei r15, 5 ; shru r5, r6, r7 ; ld4s r25, r26 }
4363     8808:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
4364     8810:       [0-9a-f]*       { movei r15, 5 ; mnz r5, r6, r7 ; ld4u r25, r26 }
4365     8818:       [0-9a-f]*       { movei r15, 5 ; movei r5, 5 ; prefetch r25 }
4366     8820:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
4367     8828:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; movei r15, 5 ; ld4s r25, r26 }
4368     8830:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
4369     8838:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 }
4370     8840:       [0-9a-f]*       { mulx r5, r6, r7 ; movei r15, 5 ; ld4s r25, r26 }
4371     8848:       [0-9a-f]*       { movei r15, 5 ; nop ; prefetch r25 }
4372     8850:       [0-9a-f]*       { movei r15, 5 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
4373     8858:       [0-9a-f]*       { movei r15, 5 ; cmpeqi r5, r6, 5 ; prefetch r25 }
4374     8860:       [0-9a-f]*       { movei r15, 5 ; shli r5, r6, 5 ; prefetch r25 }
4375     8868:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
4376     8870:       [0-9a-f]*       { movei r15, 5 ; and r5, r6, r7 ; prefetch_l1_fault r25 }
4377     8878:       [0-9a-f]*       { movei r15, 5 ; shl1add r5, r6, r7 ; prefetch_l1_fault r25 }
4378     8880:       [0-9a-f]*       { movei r15, 5 ; mnz r5, r6, r7 ; prefetch_l2 r25 }
4379     8888:       [0-9a-f]*       { movei r15, 5 ; xor r5, r6, r7 ; prefetch_l2 r25 }
4380     8890:       [0-9a-f]*       { pcnt r5, r6 ; movei r15, 5 ; prefetch_l2_fault r25 }
4381     8898:       [0-9a-f]*       { movei r15, 5 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 }
4382     88a0:       [0-9a-f]*       { movei r15, 5 ; sub r5, r6, r7 ; prefetch_l3 r25 }
4383     88a8:       [0-9a-f]*       { mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l3_fault r25 }
4384     88b0:       [0-9a-f]*       { revbits r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 }
4385     88b8:       [0-9a-f]*       { movei r15, 5 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
4386     88c0:       [0-9a-f]*       { movei r15, 5 ; shl r5, r6, r7 ; prefetch_l3_fault r25 }
4387     88c8:       [0-9a-f]*       { movei r15, 5 ; shl1addx r5, r6, r7 ; st r25, r26 }
4388     88d0:       [0-9a-f]*       { movei r15, 5 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
4389     88d8:       [0-9a-f]*       { movei r15, 5 ; shl3addx r5, r6, r7 }
4390     88e0:       [0-9a-f]*       { movei r15, 5 ; shrs r5, r6, r7 }
4391     88e8:       [0-9a-f]*       { movei r15, 5 ; shrui r5, r6, 5 ; ld1s r25, r26 }
4392     88f0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; movei r15, 5 ; st r25, r26 }
4393     88f8:       [0-9a-f]*       { tblidxb2 r5, r6 ; movei r15, 5 ; st r25, r26 }
4394     8900:       [0-9a-f]*       { movei r15, 5 ; nor r5, r6, r7 ; st1 r25, r26 }
4395     8908:       [0-9a-f]*       { movei r15, 5 ; cmplts r5, r6, r7 ; st2 r25, r26 }
4396     8910:       [0-9a-f]*       { movei r15, 5 ; shru r5, r6, r7 ; st2 r25, r26 }
4397     8918:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
4398     8920:       [0-9a-f]*       { movei r15, 5 ; sub r5, r6, r7 ; prefetch r25 }
4399     8928:       [0-9a-f]*       { tblidxb0 r5, r6 ; movei r15, 5 ; prefetch r25 }
4400     8930:       [0-9a-f]*       { tblidxb2 r5, r6 ; movei r15, 5 ; prefetch_l2 r25 }
4401     8938:       [0-9a-f]*       { movei r15, 5 ; v1cmpltui r5, r6, 5 }
4402     8940:       [0-9a-f]*       { movei r15, 5 ; v2cmples r5, r6, r7 }
4403     8948:       [0-9a-f]*       { movei r15, 5 ; v4packsc r5, r6, r7 }
4404     8950:       [0-9a-f]*       { movei r5, 5 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
4405     8958:       [0-9a-f]*       { movei r5, 5 ; addx r15, r16, r17 ; st r25, r26 }
4406     8960:       [0-9a-f]*       { movei r5, 5 ; and r15, r16, r17 ; st r25, r26 }
4407     8968:       [0-9a-f]*       { movei r5, 5 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
4408     8970:       [0-9a-f]*       { movei r5, 5 ; cmples r15, r16, r17 ; st2 r25, r26 }
4409     8978:       [0-9a-f]*       { movei r5, 5 ; cmplts r15, r16, r17 }
4410     8980:       [0-9a-f]*       { movei r5, 5 ; cmpne r15, r16, r17 ; ld r25, r26 }
4411     8988:       [0-9a-f]*       { movei r5, 5 ; ld2u r25, r26 }
4412     8990:       [0-9a-f]*       { movei r5, 5 ; info 19 ; ld4s r25, r26 }
4413     8998:       [0-9a-f]*       { movei r5, 5 ; jalrp r15 ; ld2u r25, r26 }
4414     89a0:       [0-9a-f]*       { movei r5, 5 ; jrp r15 ; ld4u r25, r26 }
4415     89a8:       [0-9a-f]*       { movei r5, 5 ; nop ; ld r25, r26 }
4416     89b0:       [0-9a-f]*       { movei r5, 5 ; jalrp r15 ; ld1s r25, r26 }
4417     89b8:       [0-9a-f]*       { movei r5, 5 ; cmpleu r15, r16, r17 ; ld1u r25, r26 }
4418     89c0:       [0-9a-f]*       { movei r5, 5 ; add r15, r16, r17 ; ld2s r25, r26 }
4419     89c8:       [0-9a-f]*       { movei r5, 5 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
4420     89d0:       [0-9a-f]*       { movei r5, 5 ; shl r15, r16, r17 ; ld2u r25, r26 }
4421     89d8:       [0-9a-f]*       { movei r5, 5 ; mnz r15, r16, r17 ; ld4s r25, r26 }
4422     89e0:       [0-9a-f]*       { movei r5, 5 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
4423     89e8:       [0-9a-f]*       { movei r5, 5 ; ldnt1s_add r15, r16, 5 }
4424     89f0:       [0-9a-f]*       { movei r5, 5 ; mnz r15, r16, r17 ; prefetch r25 }
4425     89f8:       [0-9a-f]*       { movei r5, 5 ; movei r15, 5 ; prefetch_l1_fault r25 }
4426     8a00:       [0-9a-f]*       { movei r5, 5 ; nop ; prefetch_l1_fault r25 }
4427     8a08:       [0-9a-f]*       { movei r5, 5 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
4428     8a10:       [0-9a-f]*       { movei r5, 5 ; rotli r15, r16, 5 ; prefetch r25 }
4429     8a18:       [0-9a-f]*       { movei r5, 5 ; info 19 ; prefetch r25 }
4430     8a20:       [0-9a-f]*       { movei r5, 5 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
4431     8a28:       [0-9a-f]*       { movei r5, 5 ; add r15, r16, r17 ; prefetch_l2 r25 }
4432     8a30:       [0-9a-f]*       { movei r5, 5 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
4433     8a38:       [0-9a-f]*       { movei r5, 5 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
4434     8a40:       [0-9a-f]*       { movei r5, 5 ; movei r15, 5 ; prefetch_l3 r25 }
4435     8a48:       [0-9a-f]*       { movei r5, 5 ; info 19 ; prefetch_l3_fault r25 }
4436     8a50:       [0-9a-f]*       { movei r5, 5 ; rotl r15, r16, r17 ; prefetch r25 }
4437     8a58:       [0-9a-f]*       { movei r5, 5 ; shl r15, r16, r17 ; prefetch_l2 r25 }
4438     8a60:       [0-9a-f]*       { movei r5, 5 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
4439     8a68:       [0-9a-f]*       { movei r5, 5 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
4440     8a70:       [0-9a-f]*       { movei r5, 5 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
4441     8a78:       [0-9a-f]*       { movei r5, 5 ; shrs r15, r16, r17 ; st1 r25, r26 }
4442     8a80:       [0-9a-f]*       { movei r5, 5 ; shru r15, r16, r17 ; st4 r25, r26 }
4443     8a88:       [0-9a-f]*       { movei r5, 5 ; info 19 ; st r25, r26 }
4444     8a90:       [0-9a-f]*       { movei r5, 5 ; cmples r15, r16, r17 ; st1 r25, r26 }
4445     8a98:       [0-9a-f]*       { movei r5, 5 ; st2 r15, r16 }
4446     8aa0:       [0-9a-f]*       { movei r5, 5 ; shrs r15, r16, r17 ; st2 r25, r26 }
4447     8aa8:       [0-9a-f]*       { movei r5, 5 ; rotli r15, r16, 5 ; st4 r25, r26 }
4448     8ab0:       [0-9a-f]*       { movei r5, 5 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
4449     8ab8:       [0-9a-f]*       { movei r5, 5 ; v1maxu r15, r16, r17 }
4450     8ac0:       [0-9a-f]*       { movei r5, 5 ; v2shrs r15, r16, r17 }
4451     8ac8:       [0-9a-f]*       { moveli r15, 4660 ; addli r5, r6, 4660 }
4452     8ad0:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; moveli r15, 4660 }
4453     8ad8:       [0-9a-f]*       { mulx r5, r6, r7 ; moveli r15, 4660 }
4454     8ae0:       [0-9a-f]*       { v1avgu r5, r6, r7 ; moveli r15, 4660 }
4455     8ae8:       [0-9a-f]*       { moveli r15, 4660 ; v1subuc r5, r6, r7 }
4456     8af0:       [0-9a-f]*       { moveli r15, 4660 ; v2shru r5, r6, r7 }
4457     8af8:       [0-9a-f]*       { moveli r5, 4660 ; dtlbpr r15 }
4458     8b00:       [0-9a-f]*       { moveli r5, 4660 ; ldna_add r15, r16, 5 }
4459     8b08:       [0-9a-f]*       { moveli r5, 4660 ; prefetch_l3_fault r15 }
4460     8b10:       [0-9a-f]*       { moveli r5, 4660 ; v1add r15, r16, r17 }
4461     8b18:       [0-9a-f]*       { moveli r5, 4660 ; v2int_h r15, r16, r17 }
4462     8b20:       [0-9a-f]*       { addxsc r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
4463     8b28:       [0-9a-f]*       { mtspr MEM_ERROR_CBOX_ADDR, r16 }
4464     8b30:       [0-9a-f]*       { or r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
4465     8b38:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
4466     8b40:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
4467     8b48:       [0-9a-f]*       { v4add r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
4468     8b50:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
4469     8b58:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
4470     8b60:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 }
4471     8b68:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
4472     8b70:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 }
4473     8b78:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 }
4474     8b80:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
4475     8b88:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 }
4476     8b90:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; infol 4660 }
4477     8b98:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; jalrp r15 }
4478     8ba0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
4479     8ba8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; ld r25, r26 }
4480     8bb0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld1s r25, r26 }
4481     8bb8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 }
4482     8bc0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; ld2s r25, r26 }
4483     8bc8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld2u r25, r26 }
4484     8bd0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
4485     8bd8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; ld4s r25, r26 }
4486     8be0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; ld4u r25, r26 }
4487     8be8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; lnk r15 ; ld1u r25, r26 }
4488     8bf0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 }
4489     8bf8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 }
4490     8c00:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; ld2u r25, r26 }
4491     8c08:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
4492     8c10:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
4493     8c18:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
4494     8c20:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
4495     8c28:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
4496     8c30:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
4497     8c38:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 }
4498     8c40:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3 r25 }
4499     8c48:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
4500     8c50:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 }
4501     8c58:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 }
4502     8c60:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
4503     8c68:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
4504     8c70:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 }
4505     8c78:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
4506     8c80:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
4507     8c88:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; st r25, r26 }
4508     8c90:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; st1 r25, r26 }
4509     8c98:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; st2 r25, r26 }
4510     8ca0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
4511     8ca8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
4512     8cb0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
4513     8cb8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; v2add r15, r16, r17 }
4514     8cc0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; v4shru r15, r16, r17 }
4515     8cc8:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; cmpltsi r15, r16, 5 }
4516     8cd0:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; ld2u_add r15, r16, 5 }
4517     8cd8:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; prefetch_add_l3 r15, 5 }
4518     8ce0:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; stnt2_add r15, r16, 5 }
4519     8ce8:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; v2cmples r15, r16, r17 }
4520     8cf0:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; xori r15, r16, 5 }
4521     8cf8:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; ill }
4522     8d00:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; mf }
4523     8d08:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; shrsi r15, r16, 5 }
4524     8d10:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; v1minu r15, r16, r17 }
4525     8d18:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; v2shru r15, r16, r17 }
4526     8d20:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; dblalign6 r15, r16, r17 }
4527     8d28:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; ldna r15, r16 }
4528     8d30:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; prefetch_l3 r15 }
4529     8d38:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; subxsc r15, r16, r17 }
4530     8d40:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; v2cmpne r15, r16, r17 }
4531     8d48:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
4532     8d50:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
4533     8d58:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
4534     8d60:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
4535     8d68:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
4536     8d70:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
4537     8d78:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
4538     8d80:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; fetchor4 r15, r16, r17 }
4539     8d88:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; ill ; st2 r25, r26 }
4540     8d90:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
4541     8d98:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jr r15 ; st4 r25, r26 }
4542     8da0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
4543     8da8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
4544     8db0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 }
4545     8db8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 }
4546     8dc0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
4547     8dc8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
4548     8dd0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; ld4s r25, r26 }
4549     8dd8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 }
4550     8de0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
4551     8de8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
4552     8df0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
4553     8df8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; nop ; ld1s r25, r26 }
4554     8e00:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
4555     8e08:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
4556     8e10:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
4557     8e18:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
4558     8e20:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
4559     8e28:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
4560     8e30:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 }
4561     8e38:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
4562     8e40:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
4563     8e48:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 }
4564     8e50:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
4565     8e58:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
4566     8e60:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
4567     8e68:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
4568     8e70:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
4569     8e78:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
4570     8e80:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
4571     8e88:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
4572     8e90:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
4573     8e98:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
4574     8ea0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 }
4575     8ea8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
4576     8eb0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
4577     8eb8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; v2mnz r15, r16, r17 }
4578     8ec0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
4579     8ec8:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; finv r15 }
4580     8ed0:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
4581     8ed8:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; shl3addx r15, r16, r17 }
4582     8ee0:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; v1cmpne r15, r16, r17 }
4583     8ee8:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; v2shl r15, r16, r17 }
4584     8ef0:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; cmpltu r15, r16, r17 }
4585     8ef8:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; ld4s r15, r16 }
4586     8f00:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
4587     8f08:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; stnt4 r15, r16 }
4588     8f10:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; v2cmpleu r15, r16, r17 }
4589     8f18:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
4590     8f20:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
4591     8f28:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
4592     8f30:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
4593     8f38:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
4594     8f40:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
4595     8f48:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
4596     8f50:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; fetchaddgez r15, r16, r17 }
4597     8f58:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
4598     8f60:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
4599     8f68:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
4600     8f70:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
4601     8f78:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
4602     8f80:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
4603     8f88:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
4604     8f90:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
4605     8f98:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
4606     8fa0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
4607     8fa8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
4608     8fb0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
4609     8fb8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
4610     8fc0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
4611     8fc8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
4612     8fd0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
4613     8fd8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch r25 }
4614     8fe0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
4615     8fe8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
4616     8ff0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
4617     8ff8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
4618     9000:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
4619     9008:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
4620     9010:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
4621     9018:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
4622     9020:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
4623     9028:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
4624     9030:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
4625     9038:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
4626     9040:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
4627     9048:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
4628     9050:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 }
4629     9058:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 }
4630     9060:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
4631     9068:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; nop ; st2 r25, r26 }
4632     9070:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
4633     9078:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
4634     9080:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; v1addi r15, r16, 5 }
4635     9088:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; v2int_l r15, r16, r17 }
4636     9090:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
4637     9098:       [0-9a-f]*       { mul_ls_lu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
4638     90a0:       [0-9a-f]*       { mul_ls_lu r5, r6, r7 ; ldnt2s r15, r16 }
4639     90a8:       [0-9a-f]*       { mul_ls_lu r5, r6, r7 ; shl1add r15, r16, r17 }
4640     90b0:       [0-9a-f]*       { mul_ls_lu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
4641     90b8:       [0-9a-f]*       { mul_ls_lu r5, r6, r7 ; v2mnz r15, r16, r17 }
4642     90c0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3 r25 }
4643     90c8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
4644     90d0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 }
4645     90d8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 }
4646     90e0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
4647     90e8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 }
4648     90f0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpltui r15, r16, 5 }
4649     90f8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ld2s r25, r26 }
4650     9100:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; info 19 ; ld2u r25, r26 }
4651     9108:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
4652     9110:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
4653     9118:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld r25, r26 }
4654     9120:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
4655     9128:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; ld1u r25, r26 }
4656     9130:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ld2s r15, r16 }
4657     9138:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 }
4658     9140:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
4659     9148:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
4660     9150:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
4661     9158:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ldnt1s r15, r16 }
4662     9160:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 }
4663     9168:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
4664     9170:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; nop ; prefetch r25 }
4665     9178:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 }
4666     9180:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
4667     9188:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ill ; prefetch r25 }
4668     9190:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 }
4669     9198:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; prefetch_l2 r15 }
4670     91a0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l2 r25 }
4671     91a8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
4672     91b0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 }
4673     91b8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
4674     91c0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
4675     91c8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l1_fault r25 }
4676     91d0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
4677     91d8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
4678     91e0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; st r25, r26 }
4679     91e8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
4680     91f0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 }
4681     91f8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; ill ; st r25, r26 }
4682     9200:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
4683     9208:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; st1_add r15, r16, 5 }
4684     9210:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 }
4685     9218:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st4 r25, r26 }
4686     9220:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3 r25 }
4687     9228:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; v1int_l r15, r16, r17 }
4688     9230:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; v2shlsc r15, r16, r17 }
4689     9238:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
4690     9240:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
4691     9248:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld1u r25, r26 }
4692     9250:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2u r25, r26 }
4693     9258:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; ld2u r25, r26 }
4694     9260:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
4695     9268:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
4696     9270:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
4697     9278:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; ill ; prefetch_l3 r25 }
4698     9280:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
4699     9288:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 }
4700     9290:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; ld r25, r26 }
4701     9298:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1s r25, r26 }
4702     92a0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; ld1s r25, r26 }
4703     92a8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
4704     92b0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
4705     92b8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
4706     92c0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
4707     92c8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 }
4708     92d0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
4709     92d8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
4710     92e0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
4711     92e8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st2 r25, r26 }
4712     92f0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 }
4713     92f8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch r25 }
4714     9300:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
4715     9308:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
4716     9310:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 }
4717     9318:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 }
4718     9320:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jrp r15 ; prefetch_l2_fault r25 }
4719     9328:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
4720     9330:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 }
4721     9338:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 }
4722     9340:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 }
4723     9348:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 }
4724     9350:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 }
4725     9358:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
4726     9360:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 }
4727     9368:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
4728     9370:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st r25, r26 }
4729     9378:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 }
4730     9380:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; st1 r25, r26 }
4731     9388:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; st2 r25, r26 }
4732     9390:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
4733     9398:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
4734     93a0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; v1adduc r15, r16, r17 }
4735     93a8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; v2maxs r15, r16, r17 }
4736     93b0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 }
4737     93b8:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; fetchand r15, r16, r17 }
4738     93c0:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
4739     93c8:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; shl1addx r15, r16, r17 }
4740     93d0:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; v1cmplts r15, r16, r17 }
4741     93d8:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; v2mz r15, r16, r17 }
4742     93e0:       [0-9a-f]*       { mula_hs_ls r5, r6, r7 ; cmples r15, r16, r17 }
4743     93e8:       [0-9a-f]*       { mula_hs_ls r5, r6, r7 ; ld2s r15, r16 }
4744     93f0:       [0-9a-f]*       { mula_hs_ls r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
4745     93f8:       [0-9a-f]*       { mula_hs_ls r5, r6, r7 ; stnt1 r15, r16 }
4746     9400:       [0-9a-f]*       { mula_hs_ls r5, r6, r7 ; v2addsc r15, r16, r17 }
4747     9408:       [0-9a-f]*       { mula_hs_ls r5, r6, r7 ; v4subsc r15, r16, r17 }
4748     9410:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; flushwb }
4749     9418:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
4750     9420:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; shlx r15, r16, r17 }
4751     9428:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; v1int_l r15, r16, r17 }
4752     9430:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; v2shlsc r15, r16, r17 }
4753     9438:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 }
4754     9440:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
4755     9448:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
4756     9450:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
4757     9458:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
4758     9460:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
4759     9468:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
4760     9470:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 }
4761     9478:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 }
4762     9480:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
4763     9488:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 }
4764     9490:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
4765     9498:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
4766     94a0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; ill ; ld1u r25, r26 }
4767     94a8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
4768     94b0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; ld2s r25, r26 }
4769     94b8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
4770     94c0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld4s r25, r26 }
4771     94c8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jr r15 ; ld4u r25, r26 }
4772     94d0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
4773     94d8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 }
4774     94e0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; movei r15, 5 ; st1 r25, r26 }
4775     94e8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; nop ; st1 r25, r26 }
4776     94f0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 }
4777     94f8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
4778     9500:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
4779     9508:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 }
4780     9510:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
4781     9518:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 }
4782     9520:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
4783     9528:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 }
4784     9530:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 }
4785     9538:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
4786     9540:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
4787     9548:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 }
4788     9550:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; ld r25, r26 }
4789     9558:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
4790     9560:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
4791     9568:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 }
4792     9570:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; st r25, r26 }
4793     9578:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; st1 r25, r26 }
4794     9580:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 }
4795     9588:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st2 r25, r26 }
4796     9590:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; st4 r25, r26 }
4797     9598:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
4798     95a0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; v1shl r15, r16, r17 }
4799     95a8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; v4add r15, r16, r17 }
4800     95b0:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; andi r15, r16, 5 }
4801     95b8:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; ld r15, r16 }
4802     95c0:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; nor r15, r16, r17 }
4803     95c8:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; st2_add r15, r16, 5 }
4804     95d0:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; v1shrui r15, r16, 5 }
4805     95d8:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; v4shl r15, r16, r17 }
4806     95e0:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; fetchand4 r15, r16, r17 }
4807     95e8:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; ldnt2u r15, r16 }
4808     95f0:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; shl2add r15, r16, r17 }
4809     95f8:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
4810     9600:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; v2packh r15, r16, r17 }
4811     9608:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
4812     9610:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 }
4813     9618:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
4814     9620:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
4815     9628:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
4816     9630:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld r25, r26 }
4817     9638:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
4818     9640:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
4819     9648:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; info 19 ; ld4u r25, r26 }
4820     9650:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 }
4821     9658:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 }
4822     9660:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; ld r25, r26 }
4823     9668:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jr r15 ; ld1s r25, r26 }
4824     9670:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
4825     9678:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 }
4826     9680:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2s r25, r26 }
4827     9688:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 }
4828     9690:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
4829     9698:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; ld4u r25, r26 }
4830     96a0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; ldnt1u r15, r16 }
4831     96a8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
4832     96b0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; movei r15, 5 ; prefetch_l2 r25 }
4833     96b8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; nop ; prefetch_l2 r25 }
4834     96c0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 }
4835     96c8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
4836     96d0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jalr r15 ; prefetch r25 }
4837     96d8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
4838     96e0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l2 r25 }
4839     96e8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
4840     96f0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
4841     96f8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
4842     9700:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
4843     9708:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 }
4844     9710:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
4845     9718:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 }
4846     9720:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; st r25, r26 }
4847     9728:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; st2 r25, r26 }
4848     9730:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
4849     9738:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 }
4850     9740:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jalr r15 ; st r25, r26 }
4851     9748:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
4852     9750:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 }
4853     9758:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
4854     9760:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 }
4855     9768:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 }
4856     9770:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; v1maxui r15, r16, 5 }
4857     9778:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; v2shrsi r15, r16, 5 }
4858     9780:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; addx r15, r16, r17 }
4859     9788:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; iret }
4860     9790:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; movei r15, 5 }
4861     9798:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; shruxi r15, r16, 5 }
4862     97a0:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; v1shl r15, r16, r17 }
4863     97a8:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; v4add r15, r16, r17 }
4864     97b0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
4865     97b8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
4866     97c0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
4867     97c8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
4868     97d0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
4869     97d8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
4870     97e0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
4871     97e8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; st4 r25, r26 }
4872     97f0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; info 19 }
4873     97f8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
4874     9800:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; ld r15, r16 }
4875     9808:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; ld r25, r26 }
4876     9810:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
4877     9818:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld1u r25, r26 }
4878     9820:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; ld2s r25, r26 }
4879     9828:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
4880     9830:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld2u r25, r26 }
4881     9838:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
4882     9840:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; nop ; ld4u r25, r26 }
4883     9848:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; lnk r15 ; ld1s r25, r26 }
4884     9850:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 }
4885     9858:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld1s r25, r26 }
4886     9860:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
4887     9868:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
4888     9870:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
4889     9878:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
4890     9880:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
4891     9888:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
4892     9890:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
4893     9898:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
4894     98a0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
4895     98a8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l3_fault r25 }
4896     98b0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 }
4897     98b8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
4898     98c0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 }
4899     98c8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
4900     98d0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
4901     98d8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
4902     98e0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 }
4903     98e8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
4904     98f0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
4905     98f8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
4906     9900:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
4907     9908:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st4 r25, r26 }
4908     9910:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
4909     9918:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; v1subuc r15, r16, r17 }
4910     9920:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; v4shrs r15, r16, r17 }
4911     9928:       [0-9a-f]*       { mulax r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
4912     9930:       [0-9a-f]*       { mulax r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
4913     9938:       [0-9a-f]*       { mulax r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
4914     9940:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpeq r15, r16, r17 }
4915     9948:       [0-9a-f]*       { mulax r5, r6, r7 ; cmples r15, r16, r17 }
4916     9950:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
4917     9958:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpne r15, r16, r17 ; ld1u r25, r26 }
4918     9960:       [0-9a-f]*       { mulax r5, r6, r7 ; ld4u r25, r26 }
4919     9968:       [0-9a-f]*       { mulax r5, r6, r7 ; info 19 ; prefetch r25 }
4920     9970:       [0-9a-f]*       { mulax r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
4921     9978:       [0-9a-f]*       { mulax r5, r6, r7 ; jrp r15 ; prefetch r25 }
4922     9980:       [0-9a-f]*       { mulax r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
4923     9988:       [0-9a-f]*       { mulax r5, r6, r7 ; jrp r15 ; ld1s r25, r26 }
4924     9990:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1u r25, r26 }
4925     9998:       [0-9a-f]*       { mulax r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
4926     99a0:       [0-9a-f]*       { mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld2s r25, r26 }
4927     99a8:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
4928     99b0:       [0-9a-f]*       { mulax r5, r6, r7 ; movei r15, 5 ; ld4s r25, r26 }
4929     99b8:       [0-9a-f]*       { mulax r5, r6, r7 ; ill ; ld4u r25, r26 }
4930     99c0:       [0-9a-f]*       { mulax r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
4931     99c8:       [0-9a-f]*       { mulax r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
4932     99d0:       [0-9a-f]*       { mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 }
4933     99d8:       [0-9a-f]*       { mulax r5, r6, r7 ; nop ; prefetch_l2_fault r25 }
4934     99e0:       [0-9a-f]*       { mulax r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 }
4935     99e8:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
4936     99f0:       [0-9a-f]*       { mulax r5, r6, r7 ; jalrp r15 ; prefetch r25 }
4937     99f8:       [0-9a-f]*       { mulax r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
4938     9a00:       [0-9a-f]*       { mulax r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 }
4939     9a08:       [0-9a-f]*       { mulax r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
4940     9a10:       [0-9a-f]*       { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
4941     9a18:       [0-9a-f]*       { mulax r5, r6, r7 ; nop ; prefetch_l3 r25 }
4942     9a20:       [0-9a-f]*       { mulax r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
4943     9a28:       [0-9a-f]*       { mulax r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
4944     9a30:       [0-9a-f]*       { mulax r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l3 r25 }
4945     9a38:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
4946     9a40:       [0-9a-f]*       { mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
4947     9a48:       [0-9a-f]*       { mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; st4 r25, r26 }
4948     9a50:       [0-9a-f]*       { mulax r5, r6, r7 ; shrs r15, r16, r17 ; st4 r25, r26 }
4949     9a58:       [0-9a-f]*       { mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 }
4950     9a60:       [0-9a-f]*       { mulax r5, r6, r7 ; jalrp r15 ; st r25, r26 }
4951     9a68:       [0-9a-f]*       { mulax r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
4952     9a70:       [0-9a-f]*       { mulax r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
4953     9a78:       [0-9a-f]*       { mulax r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 }
4954     9a80:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
4955     9a88:       [0-9a-f]*       { mulax r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 }
4956     9a90:       [0-9a-f]*       { mulax r5, r6, r7 ; v1minu r15, r16, r17 }
4957     9a98:       [0-9a-f]*       { mulax r5, r6, r7 ; v2shru r15, r16, r17 }
4958     9aa0:       [0-9a-f]*       { mulx r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
4959     9aa8:       [0-9a-f]*       { mulx r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
4960     9ab0:       [0-9a-f]*       { mulx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
4961     9ab8:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
4962     9ac0:       [0-9a-f]*       { mulx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
4963     9ac8:       [0-9a-f]*       { mulx r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
4964     9ad0:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
4965     9ad8:       [0-9a-f]*       { mulx r5, r6, r7 ; fetchor r15, r16, r17 }
4966     9ae0:       [0-9a-f]*       { mulx r5, r6, r7 ; ill ; st1 r25, r26 }
4967     9ae8:       [0-9a-f]*       { mulx r5, r6, r7 ; jalr r15 ; st r25, r26 }
4968     9af0:       [0-9a-f]*       { mulx r5, r6, r7 ; jr r15 ; st2 r25, r26 }
4969     9af8:       [0-9a-f]*       { mulx r5, r6, r7 ; jalr r15 ; ld r25, r26 }
4970     9b00:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
4971     9b08:       [0-9a-f]*       { mulx r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
4972     9b10:       [0-9a-f]*       { mulx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
4973     9b18:       [0-9a-f]*       { mulx r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
4974     9b20:       [0-9a-f]*       { mulx r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
4975     9b28:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
4976     9b30:       [0-9a-f]*       { mulx r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
4977     9b38:       [0-9a-f]*       { mulx r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
4978     9b40:       [0-9a-f]*       { mulx r5, r6, r7 ; mf }
4979     9b48:       [0-9a-f]*       { mulx r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
4980     9b50:       [0-9a-f]*       { mulx r5, r6, r7 ; nop ; ld r25, r26 }
4981     9b58:       [0-9a-f]*       { mulx r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 }
4982     9b60:       [0-9a-f]*       { mulx r5, r6, r7 ; lnk r15 ; prefetch r25 }
4983     9b68:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch r25 }
4984     9b70:       [0-9a-f]*       { mulx r5, r6, r7 ; prefetch_l1_fault r15 }
4985     9b78:       [0-9a-f]*       { mulx r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1_fault r25 }
4986     9b80:       [0-9a-f]*       { mulx r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 }
4987     9b88:       [0-9a-f]*       { mulx r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 }
4988     9b90:       [0-9a-f]*       { mulx r5, r6, r7 ; ill ; prefetch_l3 r25 }
4989     9b98:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
4990     9ba0:       [0-9a-f]*       { mulx r5, r6, r7 ; raise }
4991     9ba8:       [0-9a-f]*       { mulx r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
4992     9bb0:       [0-9a-f]*       { mulx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
4993     9bb8:       [0-9a-f]*       { mulx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
4994     9bc0:       [0-9a-f]*       { mulx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
4995     9bc8:       [0-9a-f]*       { mulx r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
4996     9bd0:       [0-9a-f]*       { mulx r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
4997     9bd8:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; st r25, r26 }
4998     9be0:       [0-9a-f]*       { mulx r5, r6, r7 ; st1 r15, r16 }
4999     9be8:       [0-9a-f]*       { mulx r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
5000     9bf0:       [0-9a-f]*       { mulx r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
5001     9bf8:       [0-9a-f]*       { mulx r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
5002     9c00:       [0-9a-f]*       { mulx r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 }
5003     9c08:       [0-9a-f]*       { mulx r5, r6, r7 ; v1cmples r15, r16, r17 }
5004     9c10:       [0-9a-f]*       { mulx r5, r6, r7 ; v2minsi r15, r16, 5 }
5005     9c18:       [0-9a-f]*       { mulx r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
5006     9c20:       [0-9a-f]*       { mz r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
5007     9c28:       [0-9a-f]*       { mz r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
5008     9c30:       [0-9a-f]*       { mz r15, r16, r17 ; andi r5, r6, 5 ; st1 r25, r26 }
5009     9c38:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; mz r15, r16, r17 ; st r25, r26 }
5010     9c40:       [0-9a-f]*       { mz r15, r16, r17 ; cmpeq r5, r6, r7 ; st2 r25, r26 }
5011     9c48:       [0-9a-f]*       { mz r15, r16, r17 ; cmples r5, r6, r7 }
5012     9c50:       [0-9a-f]*       { mz r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
5013     9c58:       [0-9a-f]*       { mz r15, r16, r17 ; cmpne r5, r6, r7 ; ld1u r25, r26 }
5014     9c60:       [0-9a-f]*       { ctz r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
5015     9c68:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mz r15, r16, r17 ; ld r25, r26 }
5016     9c70:       [0-9a-f]*       { mz r15, r16, r17 ; infol 4660 }
5017     9c78:       [0-9a-f]*       { revbits r5, r6 ; mz r15, r16, r17 ; ld r25, r26 }
5018     9c80:       [0-9a-f]*       { mz r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
5019     9c88:       [0-9a-f]*       { mz r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
5020     9c90:       [0-9a-f]*       { mulx r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 }
5021     9c98:       [0-9a-f]*       { mz r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
5022     9ca0:       [0-9a-f]*       { mz r15, r16, r17 ; shli r5, r6, 5 ; ld2s r25, r26 }
5023     9ca8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld2u r25, r26 }
5024     9cb0:       [0-9a-f]*       { mz r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
5025     9cb8:       [0-9a-f]*       { mz r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
5026     9cc0:       [0-9a-f]*       { mz r15, r16, r17 ; mnz r5, r6, r7 ; ld4u r25, r26 }
5027     9cc8:       [0-9a-f]*       { mz r15, r16, r17 ; xor r5, r6, r7 ; ld4u r25, r26 }
5028     9cd0:       [0-9a-f]*       { mz r15, r16, r17 ; move r5, r6 }
5029     9cd8:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; mz r15, r16, r17 }
5030     9ce0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st2 r25, r26 }
5031     9ce8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
5032     9cf0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st r25, r26 }
5033     9cf8:       [0-9a-f]*       { mulax r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
5034     9d00:       [0-9a-f]*       { mz r15, r16, r17 ; mz r5, r6, r7 ; st4 r25, r26 }
5035     9d08:       [0-9a-f]*       { mz r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
5036     9d10:       [0-9a-f]*       { mz r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 }
5037     9d18:       [0-9a-f]*       { mz r15, r16, r17 ; rotl r5, r6, r7 ; prefetch r25 }
5038     9d20:       [0-9a-f]*       { mz r15, r16, r17 ; prefetch r25 }
5039     9d28:       [0-9a-f]*       { tblidxb1 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
5040     9d30:       [0-9a-f]*       { mz r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
5041     9d38:       [0-9a-f]*       { mz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l2 r25 }
5042     9d40:       [0-9a-f]*       { mz r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l2 r25 }
5043     9d48:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
5044     9d50:       [0-9a-f]*       { clz r5, r6 ; mz r15, r16, r17 ; prefetch_l3 r25 }
5045     9d58:       [0-9a-f]*       { mz r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3 r25 }
5046     9d60:       [0-9a-f]*       { mz r15, r16, r17 ; movei r5, 5 ; prefetch_l3_fault r25 }
5047     9d68:       [0-9a-f]*       { revbits r5, r6 ; mz r15, r16, r17 ; ld r25, r26 }
5048     9d70:       [0-9a-f]*       { mz r15, r16, r17 ; rotl r5, r6, r7 ; ld1u r25, r26 }
5049     9d78:       [0-9a-f]*       { mz r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 }
5050     9d80:       [0-9a-f]*       { mz r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
5051     9d88:       [0-9a-f]*       { mz r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
5052     9d90:       [0-9a-f]*       { mz r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l1_fault r25 }
5053     9d98:       [0-9a-f]*       { mz r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l1_fault r25 }
5054     9da0:       [0-9a-f]*       { mz r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2_fault r25 }
5055     9da8:       [0-9a-f]*       { mz r15, r16, r17 ; cmpeqi r5, r6, 5 ; st r25, r26 }
5056     9db0:       [0-9a-f]*       { mz r15, r16, r17 ; shli r5, r6, 5 ; st r25, r26 }
5057     9db8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
5058     9dc0:       [0-9a-f]*       { mz r15, r16, r17 ; and r5, r6, r7 ; st2 r25, r26 }
5059     9dc8:       [0-9a-f]*       { mz r15, r16, r17 ; shl1add r5, r6, r7 ; st2 r25, r26 }
5060     9dd0:       [0-9a-f]*       { mz r15, r16, r17 ; mnz r5, r6, r7 ; st4 r25, r26 }
5061     9dd8:       [0-9a-f]*       { mz r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 }
5062     9de0:       [0-9a-f]*       { mz r15, r16, r17 ; subxsc r5, r6, r7 }
5063     9de8:       [0-9a-f]*       { tblidxb2 r5, r6 ; mz r15, r16, r17 ; ld1s r25, r26 }
5064     9df0:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; mz r15, r16, r17 }
5065     9df8:       [0-9a-f]*       { mz r15, r16, r17 ; v1sub r5, r6, r7 }
5066     9e00:       [0-9a-f]*       { mz r15, r16, r17 ; v2shrsi r5, r6, 5 }
5067     9e08:       [0-9a-f]*       { mz r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
5068     9e10:       [0-9a-f]*       { mz r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
5069     9e18:       [0-9a-f]*       { mz r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
5070     9e20:       [0-9a-f]*       { mz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
5071     9e28:       [0-9a-f]*       { mz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
5072     9e30:       [0-9a-f]*       { mz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
5073     9e38:       [0-9a-f]*       { mz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
5074     9e40:       [0-9a-f]*       { mz r5, r6, r7 ; fetchor r15, r16, r17 }
5075     9e48:       [0-9a-f]*       { mz r5, r6, r7 ; ill ; st1 r25, r26 }
5076     9e50:       [0-9a-f]*       { mz r5, r6, r7 ; jalr r15 ; st r25, r26 }
5077     9e58:       [0-9a-f]*       { mz r5, r6, r7 ; jr r15 ; st2 r25, r26 }
5078     9e60:       [0-9a-f]*       { mz r5, r6, r7 ; jalr r15 ; ld r25, r26 }
5079     9e68:       [0-9a-f]*       { mz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
5080     9e70:       [0-9a-f]*       { mz r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
5081     9e78:       [0-9a-f]*       { mz r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
5082     9e80:       [0-9a-f]*       { mz r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
5083     9e88:       [0-9a-f]*       { mz r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
5084     9e90:       [0-9a-f]*       { mz r5, r6, r7 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
5085     9e98:       [0-9a-f]*       { mz r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
5086     9ea0:       [0-9a-f]*       { mz r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
5087     9ea8:       [0-9a-f]*       { mz r5, r6, r7 ; mf }
5088     9eb0:       [0-9a-f]*       { mz r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
5089     9eb8:       [0-9a-f]*       { mz r5, r6, r7 ; nop ; ld r25, r26 }
5090     9ec0:       [0-9a-f]*       { mz r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 }
5091     9ec8:       [0-9a-f]*       { mz r5, r6, r7 ; lnk r15 ; prefetch r25 }
5092     9ed0:       [0-9a-f]*       { mz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch r25 }
5093     9ed8:       [0-9a-f]*       { mz r5, r6, r7 ; prefetch_l1_fault r15 }
5094     9ee0:       [0-9a-f]*       { mz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1_fault r25 }
5095     9ee8:       [0-9a-f]*       { mz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 }
5096     9ef0:       [0-9a-f]*       { mz r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 }
5097     9ef8:       [0-9a-f]*       { mz r5, r6, r7 ; ill ; prefetch_l3 r25 }
5098     9f00:       [0-9a-f]*       { mz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
5099     9f08:       [0-9a-f]*       { mz r5, r6, r7 ; raise }
5100     9f10:       [0-9a-f]*       { mz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
5101     9f18:       [0-9a-f]*       { mz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
5102     9f20:       [0-9a-f]*       { mz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
5103     9f28:       [0-9a-f]*       { mz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
5104     9f30:       [0-9a-f]*       { mz r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
5105     9f38:       [0-9a-f]*       { mz r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
5106     9f40:       [0-9a-f]*       { mz r5, r6, r7 ; cmpeqi r15, r16, 5 ; st r25, r26 }
5107     9f48:       [0-9a-f]*       { mz r5, r6, r7 ; st1 r15, r16 }
5108     9f50:       [0-9a-f]*       { mz r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
5109     9f58:       [0-9a-f]*       { mz r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
5110     9f60:       [0-9a-f]*       { mz r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
5111     9f68:       [0-9a-f]*       { mz r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 }
5112     9f70:       [0-9a-f]*       { mz r5, r6, r7 ; v1cmples r15, r16, r17 }
5113     9f78:       [0-9a-f]*       { mz r5, r6, r7 ; v2minsi r15, r16, 5 }
5114     9f80:       [0-9a-f]*       { mz r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
5115     9f88:       [0-9a-f]*       { nop ; add r5, r6, r7 ; prefetch_l3_fault r25 }
5116     9f90:       [0-9a-f]*       { nop ; addi r5, r6, 5 ; st1 r25, r26 }
5117     9f98:       [0-9a-f]*       { nop ; addx r5, r6, r7 ; st1 r25, r26 }
5118     9fa0:       [0-9a-f]*       { nop ; addxi r5, r6, 5 ; st4 r25, r26 }
5119     9fa8:       [0-9a-f]*       { nop ; and r5, r6, r7 ; st1 r25, r26 }
5120     9fb0:       [0-9a-f]*       { nop ; andi r5, r6, 5 ; st4 r25, r26 }
5121     9fb8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; nop ; st1 r25, r26 }
5122     9fc0:       [0-9a-f]*       { nop ; cmpeq r15, r16, r17 ; st4 r25, r26 }
5123     9fc8:       [0-9a-f]*       { nop ; cmpeqi r5, r6, 5 ; ld r25, r26 }
5124     9fd0:       [0-9a-f]*       { nop ; cmples r5, r6, r7 ; ld r25, r26 }
5125     9fd8:       [0-9a-f]*       { nop ; cmpleu r5, r6, r7 ; ld1u r25, r26 }
5126     9fe0:       [0-9a-f]*       { nop ; cmplts r5, r6, r7 ; ld2u r25, r26 }
5127     9fe8:       [0-9a-f]*       { nop ; cmpltsi r5, r6, 5 ; ld4u r25, r26 }
5128     9ff0:       [0-9a-f]*       { nop ; cmpltu r5, r6, r7 ; prefetch r25 }
5129     9ff8:       [0-9a-f]*       { nop ; cmpne r5, r6, r7 ; prefetch r25 }
5130     a000:       [0-9a-f]*       { nop ; dblalign2 r15, r16, r17 }
5131     a008:       [0-9a-f]*       { nop ; prefetch_l2_fault r25 }
5132     a010:       [0-9a-f]*       { nop ; ill ; ld4u r25, r26 }
5133     a018:       [0-9a-f]*       { nop ; jalr r15 ; ld4s r25, r26 }
5134     a020:       [0-9a-f]*       { nop ; jr r15 ; prefetch r25 }
5135     a028:       [0-9a-f]*       { nop ; and r15, r16, r17 ; ld r25, r26 }
5136     a030:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; nop ; ld r25, r26 }
5137     a038:       [0-9a-f]*       { nop ; shrs r5, r6, r7 ; ld r25, r26 }
5138     a040:       [0-9a-f]*       { nop ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
5139     a048:       [0-9a-f]*       { nop ; nor r5, r6, r7 ; ld1s r25, r26 }
5140     a050:       [0-9a-f]*       { tblidxb2 r5, r6 ; nop ; ld1s r25, r26 }
5141     a058:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; nop ; ld1u r25, r26 }
5142     a060:       [0-9a-f]*       { nop ; shl1add r15, r16, r17 ; ld1u r25, r26 }
5143     a068:       [0-9a-f]*       { nop ; addx r5, r6, r7 ; ld2s r25, r26 }
5144     a070:       [0-9a-f]*       { nop ; movei r15, 5 ; ld2s r25, r26 }
5145     a078:       [0-9a-f]*       { nop ; shli r15, r16, 5 ; ld2s r25, r26 }
5146     a080:       [0-9a-f]*       { nop ; cmpeqi r15, r16, 5 ; ld2u r25, r26 }
5147     a088:       [0-9a-f]*       { nop ; mz r15, r16, r17 ; ld2u r25, r26 }
5148     a090:       [0-9a-f]*       { nop ; subx r15, r16, r17 ; ld2u r25, r26 }
5149     a098:       [0-9a-f]*       { nop ; cmpne r15, r16, r17 ; ld4s r25, r26 }
5150     a0a0:       [0-9a-f]*       { nop ; rotli r15, r16, 5 ; ld4s r25, r26 }
5151     a0a8:       [0-9a-f]*       { nop ; add r5, r6, r7 ; ld4u r25, r26 }
5152     a0b0:       [0-9a-f]*       { nop ; mnz r15, r16, r17 ; ld4u r25, r26 }
5153     a0b8:       [0-9a-f]*       { nop ; shl3add r15, r16, r17 ; ld4u r25, r26 }
5154     a0c0:       [0-9a-f]*       { nop ; ldnt4u r15, r16 }
5155     a0c8:       [0-9a-f]*       { nop ; mnz r15, r16, r17 ; st1 r25, r26 }
5156     a0d0:       [0-9a-f]*       { nop ; move r15, r16 ; st4 r25, r26 }
5157     a0d8:       [0-9a-f]*       { nop ; movei r5, 5 ; ld r25, r26 }
5158     a0e0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; nop }
5159     a0e8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; nop ; st1 r25, r26 }
5160     a0f0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; nop ; st2 r25, r26 }
5161     a0f8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; nop ; prefetch_l3_fault r25 }
5162     a100:       [0-9a-f]*       { mulax r5, r6, r7 ; nop ; st r25, r26 }
5163     a108:       [0-9a-f]*       { nop ; mz r15, r16, r17 ; st2 r25, r26 }
5164     a110:       [0-9a-f]*       { nop ; nop ; st4 r25, r26 }
5165     a118:       [0-9a-f]*       { nop ; or r15, r16, r17 ; ld r25, r26 }
5166     a120:       [0-9a-f]*       { pcnt r5, r6 ; nop ; ld r25, r26 }
5167     a128:       [0-9a-f]*       { nop ; cmples r5, r6, r7 ; prefetch r25 }
5168     a130:       [0-9a-f]*       { nop ; nor r15, r16, r17 ; prefetch r25 }
5169     a138:       [0-9a-f]*       { tblidxb1 r5, r6 ; nop ; prefetch r25 }
5170     a140:       [0-9a-f]*       { nop ; cmpltu r15, r16, r17 ; prefetch r25 }
5171     a148:       [0-9a-f]*       { nop ; rotl r15, r16, r17 ; prefetch r25 }
5172     a150:       [0-9a-f]*       { nop ; add r15, r16, r17 ; prefetch_l1_fault r25 }
5173     a158:       [0-9a-f]*       { nop ; lnk r15 ; prefetch_l1_fault r25 }
5174     a160:       [0-9a-f]*       { nop ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
5175     a168:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; nop ; prefetch_l2 r25 }
5176     a170:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; nop ; prefetch_l2 r25 }
5177     a178:       [0-9a-f]*       { nop ; shrui r15, r16, 5 ; prefetch_l2 r25 }
5178     a180:       [0-9a-f]*       { nop ; cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 }
5179     a188:       [0-9a-f]*       { revbytes r5, r6 ; nop ; prefetch_l2_fault r25 }
5180     a190:       [0-9a-f]*       { nop ; prefetch_l3 r15 }
5181     a198:       [0-9a-f]*       { nop ; jrp r15 ; prefetch_l3 r25 }
5182     a1a0:       [0-9a-f]*       { nop ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
5183     a1a8:       [0-9a-f]*       { clz r5, r6 ; nop ; prefetch_l3_fault r25 }
5184     a1b0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; nop ; prefetch_l3_fault r25 }
5185     a1b8:       [0-9a-f]*       { nop ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
5186     a1c0:       [0-9a-f]*       { revbytes r5, r6 ; nop ; ld4u r25, r26 }
5187     a1c8:       [0-9a-f]*       { nop ; rotl r5, r6, r7 ; prefetch r25 }
5188     a1d0:       [0-9a-f]*       { nop ; rotli r5, r6, 5 ; prefetch_l2 r25 }
5189     a1d8:       [0-9a-f]*       { nop ; shl r5, r6, r7 ; prefetch_l3 r25 }
5190     a1e0:       [0-9a-f]*       { nop ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
5191     a1e8:       [0-9a-f]*       { nop ; shl1addx r5, r6, r7 ; st r25, r26 }
5192     a1f0:       [0-9a-f]*       { nop ; shl2add r5, r6, r7 ; st2 r25, r26 }
5193     a1f8:       [0-9a-f]*       { nop ; shl2addx r5, r6, r7 }
5194     a200:       [0-9a-f]*       { nop ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
5195     a208:       [0-9a-f]*       { nop ; shli r15, r16, 5 ; ld2s r25, r26 }
5196     a210:       [0-9a-f]*       { nop ; shrs r15, r16, r17 ; ld1s r25, r26 }
5197     a218:       [0-9a-f]*       { nop ; shrsi r15, r16, 5 ; ld2s r25, r26 }
5198     a220:       [0-9a-f]*       { nop ; shru r15, r16, r17 ; ld4s r25, r26 }
5199     a228:       [0-9a-f]*       { nop ; shrui r15, r16, 5 ; prefetch r25 }
5200     a230:       [0-9a-f]*       { nop ; addi r5, r6, 5 ; st r25, r26 }
5201     a238:       [0-9a-f]*       { nop ; move r15, r16 ; st r25, r26 }
5202     a240:       [0-9a-f]*       { nop ; shl3addx r15, r16, r17 ; st r25, r26 }
5203     a248:       [0-9a-f]*       { nop ; cmpeq r5, r6, r7 ; st1 r25, r26 }
5204     a250:       [0-9a-f]*       { mulx r5, r6, r7 ; nop ; st1 r25, r26 }
5205     a258:       [0-9a-f]*       { nop ; sub r5, r6, r7 ; st1 r25, r26 }
5206     a260:       [0-9a-f]*       { nop ; cmpltu r5, r6, r7 ; st2 r25, r26 }
5207     a268:       [0-9a-f]*       { nop ; rotl r5, r6, r7 ; st2 r25, r26 }
5208     a270:       [0-9a-f]*       { nop ; add r15, r16, r17 ; st4 r25, r26 }
5209     a278:       [0-9a-f]*       { nop ; lnk r15 ; st4 r25, r26 }
5210     a280:       [0-9a-f]*       { nop ; shl2addx r5, r6, r7 ; st4 r25, r26 }
5211     a288:       [0-9a-f]*       { nop ; sub r15, r16, r17 ; ld2u r25, r26 }
5212     a290:       [0-9a-f]*       { nop ; subx r15, r16, r17 ; ld4u r25, r26 }
5213     a298:       [0-9a-f]*       { tblidxb0 r5, r6 ; nop ; ld1u r25, r26 }
5214     a2a0:       [0-9a-f]*       { tblidxb2 r5, r6 ; nop ; ld2u r25, r26 }
5215     a2a8:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; nop }
5216     a2b0:       [0-9a-f]*       { nop ; v1minui r15, r16, 5 }
5217     a2b8:       [0-9a-f]*       { nop ; v2cmples r5, r6, r7 }
5218     a2c0:       [0-9a-f]*       { v2sadas r5, r6, r7 ; nop }
5219     a2c8:       [0-9a-f]*       { nop ; v4sub r15, r16, r17 }
5220     a2d0:       [0-9a-f]*       { nop ; xor r5, r6, r7 ; st2 r25, r26 }
5221     a2d8:       [0-9a-f]*       { nor r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 }
5222     a2e0:       [0-9a-f]*       { nor r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 }
5223     a2e8:       [0-9a-f]*       { nor r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 }
5224     a2f0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; nor r15, r16, r17 ; st2 r25, r26 }
5225     a2f8:       [0-9a-f]*       { nor r15, r16, r17 ; cmpeq r5, r6, r7 }
5226     a300:       [0-9a-f]*       { nor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
5227     a308:       [0-9a-f]*       { nor r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 }
5228     a310:       [0-9a-f]*       { nor r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
5229     a318:       [0-9a-f]*       { ctz r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
5230     a320:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 }
5231     a328:       [0-9a-f]*       { nor r15, r16, r17 ; addi r5, r6, 5 ; ld r25, r26 }
5232     a330:       [0-9a-f]*       { nor r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
5233     a338:       [0-9a-f]*       { nor r15, r16, r17 ; ld1s r25, r26 }
5234     a340:       [0-9a-f]*       { tblidxb1 r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 }
5235     a348:       [0-9a-f]*       { nor r15, r16, r17 ; nop ; ld1u r25, r26 }
5236     a350:       [0-9a-f]*       { nor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
5237     a358:       [0-9a-f]*       { nor r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
5238     a360:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; ld2u r25, r26 }
5239     a368:       [0-9a-f]*       { clz r5, r6 ; nor r15, r16, r17 ; ld4s r25, r26 }
5240     a370:       [0-9a-f]*       { nor r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 }
5241     a378:       [0-9a-f]*       { nor r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
5242     a380:       [0-9a-f]*       { mm r5, r6, 5, 7 ; nor r15, r16, r17 }
5243     a388:       [0-9a-f]*       { nor r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 }
5244     a390:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; nor r15, r16, r17 }
5245     a398:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 }
5246     a3a0:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; nor r15, r16, r17 }
5247     a3a8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st2 r25, r26 }
5248     a3b0:       [0-9a-f]*       { mulax r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
5249     a3b8:       [0-9a-f]*       { nor r15, r16, r17 ; nop ; ld r25, r26 }
5250     a3c0:       [0-9a-f]*       { nor r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 }
5251     a3c8:       [0-9a-f]*       { nor r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 }
5252     a3d0:       [0-9a-f]*       { nor r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
5253     a3d8:       [0-9a-f]*       { nor r15, r16, r17 ; info 19 ; prefetch r25 }
5254     a3e0:       [0-9a-f]*       { tblidxb3 r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
5255     a3e8:       [0-9a-f]*       { nor r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
5256     a3f0:       [0-9a-f]*       { nor r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
5257     a3f8:       [0-9a-f]*       { nor r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2 r25 }
5258     a400:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2_fault r25 }
5259     a408:       [0-9a-f]*       { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
5260     a410:       [0-9a-f]*       { nor r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
5261     a418:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
5262     a420:       [0-9a-f]*       { revbits r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 }
5263     a428:       [0-9a-f]*       { nor r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 }
5264     a430:       [0-9a-f]*       { nor r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 }
5265     a438:       [0-9a-f]*       { nor r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
5266     a440:       [0-9a-f]*       { nor r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
5267     a448:       [0-9a-f]*       { nor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
5268     a450:       [0-9a-f]*       { nor r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 }
5269     a458:       [0-9a-f]*       { nor r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
5270     a460:       [0-9a-f]*       { nor r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
5271     a468:       [0-9a-f]*       { nor r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
5272     a470:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; st1 r25, r26 }
5273     a478:       [0-9a-f]*       { clz r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
5274     a480:       [0-9a-f]*       { nor r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
5275     a488:       [0-9a-f]*       { nor r15, r16, r17 ; movei r5, 5 ; st4 r25, r26 }
5276     a490:       [0-9a-f]*       { nor r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
5277     a498:       [0-9a-f]*       { tblidxb0 r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 }
5278     a4a0:       [0-9a-f]*       { tblidxb2 r5, r6 ; nor r15, r16, r17 ; ld2s r25, r26 }
5279     a4a8:       [0-9a-f]*       { nor r15, r16, r17 ; v1cmpeq r5, r6, r7 }
5280     a4b0:       [0-9a-f]*       { nor r15, r16, r17 ; v2add r5, r6, r7 }
5281     a4b8:       [0-9a-f]*       { nor r15, r16, r17 ; v2shrui r5, r6, 5 }
5282     a4c0:       [0-9a-f]*       { nor r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
5283     a4c8:       [0-9a-f]*       { nor r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
5284     a4d0:       [0-9a-f]*       { nor r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
5285     a4d8:       [0-9a-f]*       { nor r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
5286     a4e0:       [0-9a-f]*       { nor r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
5287     a4e8:       [0-9a-f]*       { nor r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
5288     a4f0:       [0-9a-f]*       { nor r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
5289     a4f8:       [0-9a-f]*       { nor r5, r6, r7 ; finv r15 }
5290     a500:       [0-9a-f]*       { nor r5, r6, r7 ; ill ; st4 r25, r26 }
5291     a508:       [0-9a-f]*       { nor r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
5292     a510:       [0-9a-f]*       { nor r5, r6, r7 ; jr r15 }
5293     a518:       [0-9a-f]*       { nor r5, r6, r7 ; jr r15 ; ld r25, r26 }
5294     a520:       [0-9a-f]*       { nor r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
5295     a528:       [0-9a-f]*       { nor r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
5296     a530:       [0-9a-f]*       { nor r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
5297     a538:       [0-9a-f]*       { nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
5298     a540:       [0-9a-f]*       { nor r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
5299     a548:       [0-9a-f]*       { nor r5, r6, r7 ; ill ; ld4s r25, r26 }
5300     a550:       [0-9a-f]*       { nor r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
5301     a558:       [0-9a-f]*       { nor r5, r6, r7 ; ld4u r25, r26 }
5302     a560:       [0-9a-f]*       { nor r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
5303     a568:       [0-9a-f]*       { nor r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
5304     a570:       [0-9a-f]*       { nor r5, r6, r7 ; nop ; ld1u r25, r26 }
5305     a578:       [0-9a-f]*       { nor r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
5306     a580:       [0-9a-f]*       { nor r5, r6, r7 ; move r15, r16 ; prefetch r25 }
5307     a588:       [0-9a-f]*       { nor r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
5308     a590:       [0-9a-f]*       { nor r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
5309     a598:       [0-9a-f]*       { nor r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
5310     a5a0:       [0-9a-f]*       { nor r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
5311     a5a8:       [0-9a-f]*       { nor r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
5312     a5b0:       [0-9a-f]*       { nor r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
5313     a5b8:       [0-9a-f]*       { nor r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
5314     a5c0:       [0-9a-f]*       { nor r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
5315     a5c8:       [0-9a-f]*       { nor r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
5316     a5d0:       [0-9a-f]*       { nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
5317     a5d8:       [0-9a-f]*       { nor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
5318     a5e0:       [0-9a-f]*       { nor r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
5319     a5e8:       [0-9a-f]*       { nor r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
5320     a5f0:       [0-9a-f]*       { nor r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
5321     a5f8:       [0-9a-f]*       { nor r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
5322     a600:       [0-9a-f]*       { nor r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
5323     a608:       [0-9a-f]*       { nor r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
5324     a610:       [0-9a-f]*       { nor r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 }
5325     a618:       [0-9a-f]*       { nor r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
5326     a620:       [0-9a-f]*       { nor r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
5327     a628:       [0-9a-f]*       { nor r5, r6, r7 ; v1cmplts r15, r16, r17 }
5328     a630:       [0-9a-f]*       { nor r5, r6, r7 ; v2mz r15, r16, r17 }
5329     a638:       [0-9a-f]*       { nor r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
5330     a640:       [0-9a-f]*       { or r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 }
5331     a648:       [0-9a-f]*       { or r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 }
5332     a650:       [0-9a-f]*       { or r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 }
5333     a658:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
5334     a660:       [0-9a-f]*       { or r15, r16, r17 ; cmpeq r5, r6, r7 }
5335     a668:       [0-9a-f]*       { or r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
5336     a670:       [0-9a-f]*       { or r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 }
5337     a678:       [0-9a-f]*       { or r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
5338     a680:       [0-9a-f]*       { ctz r5, r6 ; or r15, r16, r17 ; st2 r25, r26 }
5339     a688:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld1u r25, r26 }
5340     a690:       [0-9a-f]*       { or r15, r16, r17 ; addi r5, r6, 5 ; ld r25, r26 }
5341     a698:       [0-9a-f]*       { or r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
5342     a6a0:       [0-9a-f]*       { or r15, r16, r17 ; ld1s r25, r26 }
5343     a6a8:       [0-9a-f]*       { tblidxb1 r5, r6 ; or r15, r16, r17 ; ld1s r25, r26 }
5344     a6b0:       [0-9a-f]*       { or r15, r16, r17 ; nop ; ld1u r25, r26 }
5345     a6b8:       [0-9a-f]*       { or r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
5346     a6c0:       [0-9a-f]*       { or r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
5347     a6c8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
5348     a6d0:       [0-9a-f]*       { clz r5, r6 ; or r15, r16, r17 ; ld4s r25, r26 }
5349     a6d8:       [0-9a-f]*       { or r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 }
5350     a6e0:       [0-9a-f]*       { or r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
5351     a6e8:       [0-9a-f]*       { mm r5, r6, 5, 7 ; or r15, r16, r17 }
5352     a6f0:       [0-9a-f]*       { or r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 }
5353     a6f8:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; or r15, r16, r17 }
5354     a700:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; or r15, r16, r17 }
5355     a708:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; or r15, r16, r17 }
5356     a710:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
5357     a718:       [0-9a-f]*       { mulax r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 }
5358     a720:       [0-9a-f]*       { or r15, r16, r17 ; nop ; ld r25, r26 }
5359     a728:       [0-9a-f]*       { or r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 }
5360     a730:       [0-9a-f]*       { or r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 }
5361     a738:       [0-9a-f]*       { or r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
5362     a740:       [0-9a-f]*       { or r15, r16, r17 ; info 19 ; prefetch r25 }
5363     a748:       [0-9a-f]*       { tblidxb3 r5, r6 ; or r15, r16, r17 ; prefetch r25 }
5364     a750:       [0-9a-f]*       { or r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
5365     a758:       [0-9a-f]*       { or r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
5366     a760:       [0-9a-f]*       { or r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2 r25 }
5367     a768:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
5368     a770:       [0-9a-f]*       { cmovnez r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 }
5369     a778:       [0-9a-f]*       { or r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
5370     a780:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 }
5371     a788:       [0-9a-f]*       { revbits r5, r6 ; or r15, r16, r17 ; ld1u r25, r26 }
5372     a790:       [0-9a-f]*       { or r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 }
5373     a798:       [0-9a-f]*       { or r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 }
5374     a7a0:       [0-9a-f]*       { or r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
5375     a7a8:       [0-9a-f]*       { or r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
5376     a7b0:       [0-9a-f]*       { or r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
5377     a7b8:       [0-9a-f]*       { or r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 }
5378     a7c0:       [0-9a-f]*       { or r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
5379     a7c8:       [0-9a-f]*       { or r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
5380     a7d0:       [0-9a-f]*       { or r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
5381     a7d8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; st1 r25, r26 }
5382     a7e0:       [0-9a-f]*       { clz r5, r6 ; or r15, r16, r17 ; st2 r25, r26 }
5383     a7e8:       [0-9a-f]*       { or r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
5384     a7f0:       [0-9a-f]*       { or r15, r16, r17 ; movei r5, 5 ; st4 r25, r26 }
5385     a7f8:       [0-9a-f]*       { or r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
5386     a800:       [0-9a-f]*       { tblidxb0 r5, r6 ; or r15, r16, r17 ; ld1s r25, r26 }
5387     a808:       [0-9a-f]*       { tblidxb2 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 }
5388     a810:       [0-9a-f]*       { or r15, r16, r17 ; v1cmpeq r5, r6, r7 }
5389     a818:       [0-9a-f]*       { or r15, r16, r17 ; v2add r5, r6, r7 }
5390     a820:       [0-9a-f]*       { or r15, r16, r17 ; v2shrui r5, r6, 5 }
5391     a828:       [0-9a-f]*       { or r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
5392     a830:       [0-9a-f]*       { or r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
5393     a838:       [0-9a-f]*       { or r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
5394     a840:       [0-9a-f]*       { or r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
5395     a848:       [0-9a-f]*       { or r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
5396     a850:       [0-9a-f]*       { or r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
5397     a858:       [0-9a-f]*       { or r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
5398     a860:       [0-9a-f]*       { or r5, r6, r7 ; finv r15 }
5399     a868:       [0-9a-f]*       { or r5, r6, r7 ; ill ; st4 r25, r26 }
5400     a870:       [0-9a-f]*       { or r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
5401     a878:       [0-9a-f]*       { or r5, r6, r7 ; jr r15 }
5402     a880:       [0-9a-f]*       { or r5, r6, r7 ; jr r15 ; ld r25, r26 }
5403     a888:       [0-9a-f]*       { or r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
5404     a890:       [0-9a-f]*       { or r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
5405     a898:       [0-9a-f]*       { or r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
5406     a8a0:       [0-9a-f]*       { or r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
5407     a8a8:       [0-9a-f]*       { or r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
5408     a8b0:       [0-9a-f]*       { or r5, r6, r7 ; ill ; ld4s r25, r26 }
5409     a8b8:       [0-9a-f]*       { or r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
5410     a8c0:       [0-9a-f]*       { or r5, r6, r7 ; ld4u r25, r26 }
5411     a8c8:       [0-9a-f]*       { or r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
5412     a8d0:       [0-9a-f]*       { or r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
5413     a8d8:       [0-9a-f]*       { or r5, r6, r7 ; nop ; ld1u r25, r26 }
5414     a8e0:       [0-9a-f]*       { or r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
5415     a8e8:       [0-9a-f]*       { or r5, r6, r7 ; move r15, r16 ; prefetch r25 }
5416     a8f0:       [0-9a-f]*       { or r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
5417     a8f8:       [0-9a-f]*       { or r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
5418     a900:       [0-9a-f]*       { or r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
5419     a908:       [0-9a-f]*       { or r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
5420     a910:       [0-9a-f]*       { or r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
5421     a918:       [0-9a-f]*       { or r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
5422     a920:       [0-9a-f]*       { or r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
5423     a928:       [0-9a-f]*       { or r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
5424     a930:       [0-9a-f]*       { or r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
5425     a938:       [0-9a-f]*       { or r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
5426     a940:       [0-9a-f]*       { or r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
5427     a948:       [0-9a-f]*       { or r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
5428     a950:       [0-9a-f]*       { or r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
5429     a958:       [0-9a-f]*       { or r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
5430     a960:       [0-9a-f]*       { or r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
5431     a968:       [0-9a-f]*       { or r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
5432     a970:       [0-9a-f]*       { or r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
5433     a978:       [0-9a-f]*       { or r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 }
5434     a980:       [0-9a-f]*       { or r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
5435     a988:       [0-9a-f]*       { or r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
5436     a990:       [0-9a-f]*       { or r5, r6, r7 ; v1cmplts r15, r16, r17 }
5437     a998:       [0-9a-f]*       { or r5, r6, r7 ; v2mz r15, r16, r17 }
5438     a9a0:       [0-9a-f]*       { or r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
5439     a9a8:       [0-9a-f]*       { ori r15, r16, 5 ; dblalign2 r5, r6, r7 }
5440     a9b0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; ori r15, r16, 5 }
5441     a9b8:       [0-9a-f]*       { tblidxb1 r5, r6 ; ori r15, r16, 5 }
5442     a9c0:       [0-9a-f]*       { ori r15, r16, 5 ; v1shl r5, r6, r7 }
5443     a9c8:       [0-9a-f]*       { v2sads r5, r6, r7 ; ori r15, r16, 5 }
5444     a9d0:       [0-9a-f]*       { ori r5, r6, 5 ; cmpltsi r15, r16, 5 }
5445     a9d8:       [0-9a-f]*       { ori r5, r6, 5 ; ld2u_add r15, r16, 5 }
5446     a9e0:       [0-9a-f]*       { ori r5, r6, 5 ; prefetch_add_l3 r15, 5 }
5447     a9e8:       [0-9a-f]*       { ori r5, r6, 5 ; stnt2_add r15, r16, 5 }
5448     a9f0:       [0-9a-f]*       { ori r5, r6, 5 ; v2cmples r15, r16, r17 }
5449     a9f8:       [0-9a-f]*       { ori r5, r6, 5 ; xori r15, r16, 5 }
5450     aa00:       [0-9a-f]*       { pcnt r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
5451     aa08:       [0-9a-f]*       { pcnt r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
5452     aa10:       [0-9a-f]*       { pcnt r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
5453     aa18:       [0-9a-f]*       { pcnt r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 }
5454     aa20:       [0-9a-f]*       { pcnt r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
5455     aa28:       [0-9a-f]*       { pcnt r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
5456     aa30:       [0-9a-f]*       { pcnt r5, r6 ; fetchadd4 r15, r16, r17 }
5457     aa38:       [0-9a-f]*       { pcnt r5, r6 ; ill ; prefetch_l2 r25 }
5458     aa40:       [0-9a-f]*       { pcnt r5, r6 ; jalr r15 ; prefetch_l1_fault r25 }
5459     aa48:       [0-9a-f]*       { pcnt r5, r6 ; jr r15 ; prefetch_l2_fault r25 }
5460     aa50:       [0-9a-f]*       { pcnt r5, r6 ; cmpltu r15, r16, r17 ; ld r25, r26 }
5461     aa58:       [0-9a-f]*       { pcnt r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
5462     aa60:       [0-9a-f]*       { pcnt r5, r6 ; subx r15, r16, r17 ; ld1s r25, r26 }
5463     aa68:       [0-9a-f]*       { pcnt r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
5464     aa70:       [0-9a-f]*       { pcnt r5, r6 ; nop ; ld2s r25, r26 }
5465     aa78:       [0-9a-f]*       { pcnt r5, r6 ; jalr r15 ; ld2u r25, r26 }
5466     aa80:       [0-9a-f]*       { pcnt r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
5467     aa88:       [0-9a-f]*       { pcnt r5, r6 ; ld4u r15, r16 }
5468     aa90:       [0-9a-f]*       { pcnt r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 }
5469     aa98:       [0-9a-f]*       { pcnt r5, r6 ; lnk r15 ; st r25, r26 }
5470     aaa0:       [0-9a-f]*       { pcnt r5, r6 ; move r15, r16 ; st r25, r26 }
5471     aaa8:       [0-9a-f]*       { pcnt r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
5472     aab0:       [0-9a-f]*       { pcnt r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
5473     aab8:       [0-9a-f]*       { pcnt r5, r6 ; info 19 ; prefetch r25 }
5474     aac0:       [0-9a-f]*       { pcnt r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
5475     aac8:       [0-9a-f]*       { pcnt r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
5476     aad0:       [0-9a-f]*       { pcnt r5, r6 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
5477     aad8:       [0-9a-f]*       { pcnt r5, r6 ; nop ; prefetch_l2 r25 }
5478     aae0:       [0-9a-f]*       { pcnt r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
5479     aae8:       [0-9a-f]*       { pcnt r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
5480     aaf0:       [0-9a-f]*       { pcnt r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
5481     aaf8:       [0-9a-f]*       { pcnt r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
5482     ab00:       [0-9a-f]*       { pcnt r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 }
5483     ab08:       [0-9a-f]*       { pcnt r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 }
5484     ab10:       [0-9a-f]*       { pcnt r5, r6 ; shl2add r15, r16, r17 }
5485     ab18:       [0-9a-f]*       { pcnt r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
5486     ab20:       [0-9a-f]*       { pcnt r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 }
5487     ab28:       [0-9a-f]*       { pcnt r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 }
5488     ab30:       [0-9a-f]*       { pcnt r5, r6 ; addx r15, r16, r17 ; st r25, r26 }
5489     ab38:       [0-9a-f]*       { pcnt r5, r6 ; shrui r15, r16, 5 ; st r25, r26 }
5490     ab40:       [0-9a-f]*       { pcnt r5, r6 ; shl2add r15, r16, r17 ; st1 r25, r26 }
5491     ab48:       [0-9a-f]*       { pcnt r5, r6 ; mz r15, r16, r17 ; st2 r25, r26 }
5492     ab50:       [0-9a-f]*       { pcnt r5, r6 ; info 19 ; st4 r25, r26 }
5493     ab58:       [0-9a-f]*       { pcnt r5, r6 ; stnt_add r15, r16, 5 }
5494     ab60:       [0-9a-f]*       { pcnt r5, r6 ; v1add r15, r16, r17 }
5495     ab68:       [0-9a-f]*       { pcnt r5, r6 ; v2int_h r15, r16, r17 }
5496     ab70:       [0-9a-f]*       { pcnt r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
5497     ab78:       [0-9a-f]*       { cmulfr r5, r6, r7 ; prefetch r15 }
5498     ab80:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; prefetch r15 }
5499     ab88:       [0-9a-f]*       { shrux r5, r6, r7 ; prefetch r15 }
5500     ab90:       [0-9a-f]*       { v1mnz r5, r6, r7 ; prefetch r15 }
5501     ab98:       [0-9a-f]*       { v2mults r5, r6, r7 ; prefetch r15 }
5502     aba0:       [0-9a-f]*       { add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
5503     aba8:       [0-9a-f]*       { add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
5504     abb0:       [0-9a-f]*       { add r5, r6, r7 ; nop ; prefetch r25 }
5505     abb8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
5506     abc0:       [0-9a-f]*       { tblidxb2 r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
5507     abc8:       [0-9a-f]*       { addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 }
5508     abd0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
5509     abd8:       [0-9a-f]*       { addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
5510     abe0:       [0-9a-f]*       { addx r5, r6, r7 ; prefetch r25 }
5511     abe8:       [0-9a-f]*       { revbits r5, r6 ; addxi r15, r16, 5 ; prefetch r25 }
5512     abf0:       [0-9a-f]*       { addxi r5, r6, 5 ; info 19 ; prefetch r25 }
5513     abf8:       [0-9a-f]*       { and r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
5514     ac00:       [0-9a-f]*       { and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
5515     ac08:       [0-9a-f]*       { and r5, r6, r7 ; nop ; prefetch r25 }
5516     ac10:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
5517     ac18:       [0-9a-f]*       { tblidxb2 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
5518     ac20:       [0-9a-f]*       { andi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 }
5519     ac28:       [0-9a-f]*       { clz r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
5520     ac30:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
5521     ac38:       [0-9a-f]*       { cmovnez r5, r6, r7 ; ill ; prefetch r25 }
5522     ac40:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
5523     ac48:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch r25 }
5524     ac50:       [0-9a-f]*       { cmpeq r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
5525     ac58:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; prefetch r25 }
5526     ac60:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch r25 }
5527     ac68:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; prefetch r25 }
5528     ac70:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
5529     ac78:       [0-9a-f]*       { cmples r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
5530     ac80:       [0-9a-f]*       { cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
5531     ac88:       [0-9a-f]*       { pcnt r5, r6 ; cmpleu r15, r16, r17 ; prefetch r25 }
5532     ac90:       [0-9a-f]*       { cmpleu r5, r6, r7 ; ill ; prefetch r25 }
5533     ac98:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
5534     aca0:       [0-9a-f]*       { cmplts r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch r25 }
5535     aca8:       [0-9a-f]*       { cmplts r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
5536     acb0:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; prefetch r25 }
5537     acb8:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 }
5538     acc0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 ; prefetch r25 }
5539     acc8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
5540     acd0:       [0-9a-f]*       { cmpltu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
5541     acd8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
5542     ace0:       [0-9a-f]*       { pcnt r5, r6 ; cmpne r15, r16, r17 ; prefetch r25 }
5543     ace8:       [0-9a-f]*       { cmpne r5, r6, r7 ; ill ; prefetch r25 }
5544     acf0:       [0-9a-f]*       { ctz r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
5545     acf8:       [0-9a-f]*       { add r5, r6, r7 ; prefetch r25 }
5546     ad00:       [0-9a-f]*       { mnz r15, r16, r17 ; prefetch r25 }
5547     ad08:       [0-9a-f]*       { shl3add r15, r16, r17 ; prefetch r25 }
5548     ad10:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; ill ; prefetch r25 }
5549     ad18:       [0-9a-f]*       { cmovnez r5, r6, r7 ; ill ; prefetch r25 }
5550     ad20:       [0-9a-f]*       { shl3add r5, r6, r7 ; ill ; prefetch r25 }
5551     ad28:       [0-9a-f]*       { info 19 ; cmpltsi r15, r16, 5 ; prefetch r25 }
5552     ad30:       [0-9a-f]*       { revbits r5, r6 ; info 19 ; prefetch r25 }
5553     ad38:       [0-9a-f]*       { info 19 ; prefetch r25 }
5554     ad40:       [0-9a-f]*       { revbits r5, r6 ; jalr r15 ; prefetch r25 }
5555     ad48:       [0-9a-f]*       { cmpne r5, r6, r7 ; jalrp r15 ; prefetch r25 }
5556     ad50:       [0-9a-f]*       { subx r5, r6, r7 ; jalrp r15 ; prefetch r25 }
5557     ad58:       [0-9a-f]*       { mulx r5, r6, r7 ; jr r15 ; prefetch r25 }
5558     ad60:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; jrp r15 ; prefetch r25 }
5559     ad68:       [0-9a-f]*       { shli r5, r6, 5 ; jrp r15 ; prefetch r25 }
5560     ad70:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; lnk r15 ; prefetch r25 }
5561     ad78:       [0-9a-f]*       { mnz r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
5562     ad80:       [0-9a-f]*       { mnz r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
5563     ad88:       [0-9a-f]*       { mnz r5, r6, r7 ; lnk r15 ; prefetch r25 }
5564     ad90:       [0-9a-f]*       { move r15, r16 ; cmpltsi r5, r6, 5 ; prefetch r25 }
5565     ad98:       [0-9a-f]*       { move r15, r16 ; shrui r5, r6, 5 ; prefetch r25 }
5566     ada0:       [0-9a-f]*       { move r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
5567     ada8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
5568     adb0:       [0-9a-f]*       { movei r5, 5 ; addi r15, r16, 5 ; prefetch r25 }
5569     adb8:       [0-9a-f]*       { movei r5, 5 ; shru r15, r16, r17 ; prefetch r25 }
5570     adc0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
5571     adc8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
5572     add0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 }
5573     add8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
5574     ade0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
5575     ade8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; prefetch r25 }
5576     adf0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
5577     adf8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
5578     ae00:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
5579     ae08:       [0-9a-f]*       { mulax r5, r6, r7 ; jalrp r15 ; prefetch r25 }
5580     ae10:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
5581     ae18:       [0-9a-f]*       { mz r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
5582     ae20:       [0-9a-f]*       { mz r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
5583     ae28:       [0-9a-f]*       { mz r5, r6, r7 ; lnk r15 ; prefetch r25 }
5584     ae30:       [0-9a-f]*       { cmovnez r5, r6, r7 ; nop ; prefetch r25 }
5585     ae38:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; nop ; prefetch r25 }
5586     ae40:       [0-9a-f]*       { nop ; shrui r5, r6, 5 ; prefetch r25 }
5587     ae48:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
5588     ae50:       [0-9a-f]*       { nor r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
5589     ae58:       [0-9a-f]*       { nor r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
5590     ae60:       [0-9a-f]*       { pcnt r5, r6 ; or r15, r16, r17 ; prefetch r25 }
5591     ae68:       [0-9a-f]*       { or r5, r6, r7 ; ill ; prefetch r25 }
5592     ae70:       [0-9a-f]*       { pcnt r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
5593     ae78:       [0-9a-f]*       { revbits r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
5594     ae80:       [0-9a-f]*       { revbits r5, r6 ; shru r15, r16, r17 ; prefetch r25 }
5595     ae88:       [0-9a-f]*       { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 }
5596     ae90:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
5597     ae98:       [0-9a-f]*       { rotl r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
5598     aea0:       [0-9a-f]*       { rotl r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
5599     aea8:       [0-9a-f]*       { rotli r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 }
5600     aeb0:       [0-9a-f]*       { rotli r5, r6, 5 ; prefetch r25 }
5601     aeb8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
5602     aec0:       [0-9a-f]*       { shl r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
5603     aec8:       [0-9a-f]*       { shl r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
5604     aed0:       [0-9a-f]*       { ctz r5, r6 ; shl1add r15, r16, r17 ; prefetch r25 }
5605     aed8:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl1add r15, r16, r17 ; prefetch r25 }
5606     aee0:       [0-9a-f]*       { shl1add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
5607     aee8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
5608     aef0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
5609     aef8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
5610     af00:       [0-9a-f]*       { shl2add r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 }
5611     af08:       [0-9a-f]*       { shl2add r5, r6, r7 ; prefetch r25 }
5612     af10:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 }
5613     af18:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
5614     af20:       [0-9a-f]*       { shl2addx r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
5615     af28:       [0-9a-f]*       { ctz r5, r6 ; shl3add r15, r16, r17 ; prefetch r25 }
5616     af30:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl3add r15, r16, r17 ; prefetch r25 }
5617     af38:       [0-9a-f]*       { shl3add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
5618     af40:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
5619     af48:       [0-9a-f]*       { shl3addx r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
5620     af50:       [0-9a-f]*       { shl3addx r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
5621     af58:       [0-9a-f]*       { shli r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 }
5622     af60:       [0-9a-f]*       { shli r5, r6, 5 ; prefetch r25 }
5623     af68:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
5624     af70:       [0-9a-f]*       { shrs r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
5625     af78:       [0-9a-f]*       { shrs r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
5626     af80:       [0-9a-f]*       { ctz r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
5627     af88:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
5628     af90:       [0-9a-f]*       { shrsi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch r25 }
5629     af98:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
5630     afa0:       [0-9a-f]*       { shru r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
5631     afa8:       [0-9a-f]*       { shru r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
5632     afb0:       [0-9a-f]*       { shrui r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 }
5633     afb8:       [0-9a-f]*       { shrui r5, r6, 5 ; prefetch r25 }
5634     afc0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
5635     afc8:       [0-9a-f]*       { sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
5636     afd0:       [0-9a-f]*       { sub r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
5637     afd8:       [0-9a-f]*       { ctz r5, r6 ; subx r15, r16, r17 ; prefetch r25 }
5638     afe0:       [0-9a-f]*       { tblidxb0 r5, r6 ; subx r15, r16, r17 ; prefetch r25 }
5639     afe8:       [0-9a-f]*       { subx r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
5640     aff0:       [0-9a-f]*       { tblidxb0 r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
5641     aff8:       [0-9a-f]*       { tblidxb1 r5, r6 ; jrp r15 ; prefetch r25 }
5642     b000:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; prefetch r25 }
5643     b008:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch r25 }
5644     b010:       [0-9a-f]*       { tblidxb3 r5, r6 ; prefetch r25 }
5645     b018:       [0-9a-f]*       { revbits r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
5646     b020:       [0-9a-f]*       { xor r5, r6, r7 ; info 19 ; prefetch r25 }
5647     b028:       [0-9a-f]*       { bfexts r5, r6, 5, 7 ; prefetch_add_l1 r15, 5 }
5648     b030:       [0-9a-f]*       { fsingle_mul1 r5, r6, r7 ; prefetch_add_l1 r15, 5 }
5649     b038:       [0-9a-f]*       { revbits r5, r6 ; prefetch_add_l1 r15, 5 }
5650     b040:       [0-9a-f]*       { v1cmpltu r5, r6, r7 ; prefetch_add_l1 r15, 5 }
5651     b048:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 ; prefetch_add_l1 r15, 5 }
5652     b050:       [0-9a-f]*       { v4int_l r5, r6, r7 ; prefetch_add_l1 r15, 5 }
5653     b058:       [0-9a-f]*       { cmulhr r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
5654     b060:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
5655     b068:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
5656     b070:       [0-9a-f]*       { v1mulu r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
5657     b078:       [0-9a-f]*       { v2packh r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
5658     b080:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; prefetch_add_l2 r15, 5 }
5659     b088:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; prefetch_add_l2 r15, 5 }
5660     b090:       [0-9a-f]*       { rotl r5, r6, r7 ; prefetch_add_l2 r15, 5 }
5661     b098:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; prefetch_add_l2 r15, 5 }
5662     b0a0:       [0-9a-f]*       { v2cmpleu r5, r6, r7 ; prefetch_add_l2 r15, 5 }
5663     b0a8:       [0-9a-f]*       { v4shl r5, r6, r7 ; prefetch_add_l2 r15, 5 }
5664     b0b0:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
5665     b0b8:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
5666     b0c0:       [0-9a-f]*       { subx r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
5667     b0c8:       [0-9a-f]*       { v1mz r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
5668     b0d0:       [0-9a-f]*       { v2packuc r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
5669     b0d8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; prefetch_add_l3 r15, 5 }
5670     b0e0:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; prefetch_add_l3 r15, 5 }
5671     b0e8:       [0-9a-f]*       { shl r5, r6, r7 ; prefetch_add_l3 r15, 5 }
5672     b0f0:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; prefetch_add_l3 r15, 5 }
5673     b0f8:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; prefetch_add_l3 r15, 5 }
5674     b100:       [0-9a-f]*       { v4shrs r5, r6, r7 ; prefetch_add_l3 r15, 5 }
5675     b108:       [0-9a-f]*       { dblalign r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
5676     b110:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
5677     b118:       [0-9a-f]*       { tblidxb0 r5, r6 ; prefetch_add_l3_fault r15, 5 }
5678     b120:       [0-9a-f]*       { v1sadu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
5679     b128:       [0-9a-f]*       { v2sadau r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
5680     b130:       [0-9a-f]*       { cmpeq r5, r6, r7 ; prefetch r15 }
5681     b138:       [0-9a-f]*       { infol 4660 ; prefetch r15 }
5682     b140:       [0-9a-f]*       { shl1add r5, r6, r7 ; prefetch r15 }
5683     b148:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; prefetch r15 }
5684     b150:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; prefetch r15 }
5685     b158:       [0-9a-f]*       { v4sub r5, r6, r7 ; prefetch r15 }
5686     b160:       [0-9a-f]*       { add r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 }
5687     b168:       [0-9a-f]*       { add r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
5688     b170:       [0-9a-f]*       { clz r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
5689     b178:       [0-9a-f]*       { addi r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch r25 }
5690     b180:       [0-9a-f]*       { addi r5, r6, 5 ; move r15, r16 ; prefetch r25 }
5691     b188:       [0-9a-f]*       { addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
5692     b190:       [0-9a-f]*       { addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
5693     b198:       [0-9a-f]*       { addx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
5694     b1a0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
5695     b1a8:       [0-9a-f]*       { addxi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch r25 }
5696     b1b0:       [0-9a-f]*       { addxi r5, r6, 5 ; sub r15, r16, r17 ; prefetch r25 }
5697     b1b8:       [0-9a-f]*       { and r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 }
5698     b1c0:       [0-9a-f]*       { and r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
5699     b1c8:       [0-9a-f]*       { clz r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
5700     b1d0:       [0-9a-f]*       { andi r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch r25 }
5701     b1d8:       [0-9a-f]*       { andi r5, r6, 5 ; move r15, r16 ; prefetch r25 }
5702     b1e0:       [0-9a-f]*       { clz r5, r6 ; info 19 ; prefetch r25 }
5703     b1e8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
5704     b1f0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
5705     b1f8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
5706     b200:       [0-9a-f]*       { cmpeq r15, r16, r17 ; nop ; prefetch r25 }
5707     b208:       [0-9a-f]*       { cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
5708     b210:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
5709     b218:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch r25 }
5710     b220:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 }
5711     b228:       [0-9a-f]*       { cmples r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch r25 }
5712     b230:       [0-9a-f]*       { cmples r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
5713     b238:       [0-9a-f]*       { cmples r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
5714     b240:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
5715     b248:       [0-9a-f]*       { cmpleu r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
5716     b250:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
5717     b258:       [0-9a-f]*       { cmplts r15, r16, r17 ; nop ; prefetch r25 }
5718     b260:       [0-9a-f]*       { cmplts r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
5719     b268:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
5720     b270:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch r25 }
5721     b278:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 }
5722     b280:       [0-9a-f]*       { cmpltu r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch r25 }
5723     b288:       [0-9a-f]*       { cmpltu r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
5724     b290:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
5725     b298:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
5726     b2a0:       [0-9a-f]*       { cmpne r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
5727     b2a8:       [0-9a-f]*       { cmpne r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
5728     b2b0:       [0-9a-f]*       { ctz r5, r6 ; shl2addx r15, r16, r17 ; prefetch r25 }
5729     b2b8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; prefetch r25 }
5730     b2c0:       [0-9a-f]*       { rotl r5, r6, r7 ; prefetch r25 }
5731     b2c8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
5732     b2d0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
5733     b2d8:       [0-9a-f]*       { nop ; ill ; prefetch r25 }
5734     b2e0:       [0-9a-f]*       { clz r5, r6 ; info 19 ; prefetch r25 }
5735     b2e8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; info 19 ; prefetch r25 }
5736     b2f0:       [0-9a-f]*       { info 19 ; shru r5, r6, r7 ; prefetch r25 }
5737     b2f8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch r25 }
5738     b300:       [0-9a-f]*       { addxi r5, r6, 5 ; jalrp r15 ; prefetch r25 }
5739     b308:       [0-9a-f]*       { shl r5, r6, r7 ; jalrp r15 ; prefetch r25 }
5740     b310:       [0-9a-f]*       { info 19 ; jr r15 ; prefetch r25 }
5741     b318:       [0-9a-f]*       { tblidxb3 r5, r6 ; jr r15 ; prefetch r25 }
5742     b320:       [0-9a-f]*       { or r5, r6, r7 ; jrp r15 ; prefetch r25 }
5743     b328:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; lnk r15 ; prefetch r25 }
5744     b330:       [0-9a-f]*       { shrui r5, r6, 5 ; lnk r15 ; prefetch r25 }
5745     b338:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
5746     b340:       [0-9a-f]*       { mnz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
5747     b348:       [0-9a-f]*       { move r15, r16 ; addi r5, r6, 5 ; prefetch r25 }
5748     b350:       [0-9a-f]*       { move r15, r16 ; rotl r5, r6, r7 ; prefetch r25 }
5749     b358:       [0-9a-f]*       { move r5, r6 ; jalrp r15 ; prefetch r25 }
5750     b360:       [0-9a-f]*       { movei r15, 5 ; cmples r5, r6, r7 ; prefetch r25 }
5751     b368:       [0-9a-f]*       { movei r15, 5 ; shrs r5, r6, r7 ; prefetch r25 }
5752     b370:       [0-9a-f]*       { movei r5, 5 ; or r15, r16, r17 ; prefetch r25 }
5753     b378:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; lnk r15 ; prefetch r25 }
5754     b380:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; prefetch r25 }
5755     b388:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch r25 }
5756     b390:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
5757     b398:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch r25 }
5758     b3a0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
5759     b3a8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; nop ; prefetch r25 }
5760     b3b0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jr r15 ; prefetch r25 }
5761     b3b8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
5762     b3c0:       [0-9a-f]*       { mulax r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
5763     b3c8:       [0-9a-f]*       { mulax r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
5764     b3d0:       [0-9a-f]*       { mulx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
5765     b3d8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
5766     b3e0:       [0-9a-f]*       { mz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
5767     b3e8:       [0-9a-f]*       { nop ; add r5, r6, r7 ; prefetch r25 }
5768     b3f0:       [0-9a-f]*       { nop ; mnz r15, r16, r17 ; prefetch r25 }
5769     b3f8:       [0-9a-f]*       { nop ; shl3add r15, r16, r17 ; prefetch r25 }
5770     b400:       [0-9a-f]*       { nor r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch r25 }
5771     b408:       [0-9a-f]*       { nor r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
5772     b410:       [0-9a-f]*       { nor r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
5773     b418:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
5774     b420:       [0-9a-f]*       { or r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
5775     b428:       [0-9a-f]*       { or r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
5776     b430:       [0-9a-f]*       { pcnt r5, r6 ; shl2addx r15, r16, r17 ; prefetch r25 }
5777     b438:       [0-9a-f]*       { revbits r5, r6 ; or r15, r16, r17 ; prefetch r25 }
5778     b440:       [0-9a-f]*       { revbytes r5, r6 ; lnk r15 ; prefetch r25 }
5779     b448:       [0-9a-f]*       { rotl r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
5780     b450:       [0-9a-f]*       { rotl r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
5781     b458:       [0-9a-f]*       { rotl r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
5782     b460:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
5783     b468:       [0-9a-f]*       { rotli r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
5784     b470:       [0-9a-f]*       { rotli r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
5785     b478:       [0-9a-f]*       { shl r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
5786     b480:       [0-9a-f]*       { shl r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
5787     b488:       [0-9a-f]*       { shl1add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
5788     b490:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
5789     b498:       [0-9a-f]*       { shl1add r5, r6, r7 ; lnk r15 ; prefetch r25 }
5790     b4a0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
5791     b4a8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
5792     b4b0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
5793     b4b8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
5794     b4c0:       [0-9a-f]*       { shl2add r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
5795     b4c8:       [0-9a-f]*       { shl2add r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
5796     b4d0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
5797     b4d8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
5798     b4e0:       [0-9a-f]*       { shl3add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
5799     b4e8:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
5800     b4f0:       [0-9a-f]*       { shl3add r5, r6, r7 ; lnk r15 ; prefetch r25 }
5801     b4f8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
5802     b500:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
5803     b508:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
5804     b510:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
5805     b518:       [0-9a-f]*       { shli r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
5806     b520:       [0-9a-f]*       { shli r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
5807     b528:       [0-9a-f]*       { shrs r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
5808     b530:       [0-9a-f]*       { shrs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
5809     b538:       [0-9a-f]*       { shrsi r15, r16, 5 ; and r5, r6, r7 ; prefetch r25 }
5810     b540:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch r25 }
5811     b548:       [0-9a-f]*       { shrsi r5, r6, 5 ; lnk r15 ; prefetch r25 }
5812     b550:       [0-9a-f]*       { shru r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
5813     b558:       [0-9a-f]*       { shru r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
5814     b560:       [0-9a-f]*       { shru r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
5815     b568:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
5816     b570:       [0-9a-f]*       { shrui r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
5817     b578:       [0-9a-f]*       { shrui r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
5818     b580:       [0-9a-f]*       { sub r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
5819     b588:       [0-9a-f]*       { sub r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
5820     b590:       [0-9a-f]*       { subx r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
5821     b598:       [0-9a-f]*       { subx r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
5822     b5a0:       [0-9a-f]*       { subx r5, r6, r7 ; lnk r15 ; prefetch r25 }
5823     b5a8:       [0-9a-f]*       { tblidxb0 r5, r6 ; prefetch r25 }
5824     b5b0:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch r25 }
5825     b5b8:       [0-9a-f]*       { tblidxb2 r5, r6 ; add r15, r16, r17 ; prefetch r25 }
5826     b5c0:       [0-9a-f]*       { tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
5827     b5c8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch r25 }
5828     b5d0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
5829     b5d8:       [0-9a-f]*       { xor r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
5830     b5e0:       [0-9a-f]*       { xor r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
5831     b5e8:       [0-9a-f]*       { dblalign4 r5, r6, r7 ; prefetch_l1_fault r15 }
5832     b5f0:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; prefetch_l1_fault r15 }
5833     b5f8:       [0-9a-f]*       { tblidxb2 r5, r6 ; prefetch_l1_fault r15 }
5834     b600:       [0-9a-f]*       { v1shli r5, r6, 5 ; prefetch_l1_fault r15 }
5835     b608:       [0-9a-f]*       { v2sadu r5, r6, r7 ; prefetch_l1_fault r15 }
5836     b610:       [0-9a-f]*       { ctz r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
5837     b618:       [0-9a-f]*       { tblidxb0 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
5838     b620:       [0-9a-f]*       { add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
5839     b628:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
5840     b630:       [0-9a-f]*       { addi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l1_fault r25 }
5841     b638:       [0-9a-f]*       { addi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
5842     b640:       [0-9a-f]*       { addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
5843     b648:       [0-9a-f]*       { addx r5, r6, r7 ; prefetch_l1_fault r25 }
5844     b650:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
5845     b658:       [0-9a-f]*       { addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
5846     b660:       [0-9a-f]*       { addxi r5, r6, 5 ; movei r15, 5 ; prefetch_l1_fault r25 }
5847     b668:       [0-9a-f]*       { ctz r5, r6 ; and r15, r16, r17 ; prefetch_l1_fault r25 }
5848     b670:       [0-9a-f]*       { tblidxb0 r5, r6 ; and r15, r16, r17 ; prefetch_l1_fault r25 }
5849     b678:       [0-9a-f]*       { and r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
5850     b680:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 }
5851     b688:       [0-9a-f]*       { andi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l1_fault r25 }
5852     b690:       [0-9a-f]*       { andi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
5853     b698:       [0-9a-f]*       { clz r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
5854     b6a0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
5855     b6a8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 }
5856     b6b0:       [0-9a-f]*       { cmpeq r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 }
5857     b6b8:       [0-9a-f]*       { cmpeq r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l1_fault r25 }
5858     b6c0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
5859     b6c8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 }
5860     b6d0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
5861     b6d8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l1_fault r25 }
5862     b6e0:       [0-9a-f]*       { cmples r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
5863     b6e8:       [0-9a-f]*       { cmples r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
5864     b6f0:       [0-9a-f]*       { clz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
5865     b6f8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l1_fault r25 }
5866     b700:       [0-9a-f]*       { cmpleu r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 }
5867     b708:       [0-9a-f]*       { cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 }
5868     b710:       [0-9a-f]*       { cmplts r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l1_fault r25 }
5869     b718:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
5870     b720:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l1_fault r25 }
5871     b728:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
5872     b730:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l1_fault r25 }
5873     b738:       [0-9a-f]*       { cmpltu r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
5874     b740:       [0-9a-f]*       { cmpltu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
5875     b748:       [0-9a-f]*       { clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
5876     b750:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l1_fault r25 }
5877     b758:       [0-9a-f]*       { cmpne r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 }
5878     b760:       [0-9a-f]*       { ctz r5, r6 ; info 19 ; prefetch_l1_fault r25 }
5879     b768:       [0-9a-f]*       { and r5, r6, r7 ; prefetch_l1_fault r25 }
5880     b770:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 }
5881     b778:       [0-9a-f]*       { shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
5882     b780:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 }
5883     b788:       [0-9a-f]*       { cmpne r5, r6, r7 ; ill ; prefetch_l1_fault r25 }
5884     b790:       [0-9a-f]*       { subx r5, r6, r7 ; ill ; prefetch_l1_fault r25 }
5885     b798:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; info 19 ; prefetch_l1_fault r25 }
5886     b7a0:       [0-9a-f]*       { info 19 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
5887     b7a8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jalr r15 ; prefetch_l1_fault r25 }
5888     b7b0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; jalr r15 ; prefetch_l1_fault r25 }
5889     b7b8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
5890     b7c0:       [0-9a-f]*       { addi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 }
5891     b7c8:       [0-9a-f]*       { rotl r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
5892     b7d0:       [0-9a-f]*       { jrp r15 ; prefetch_l1_fault r25 }
5893     b7d8:       [0-9a-f]*       { tblidxb1 r5, r6 ; jrp r15 ; prefetch_l1_fault r25 }
5894     b7e0:       [0-9a-f]*       { nop ; lnk r15 ; prefetch_l1_fault r25 }
5895     b7e8:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l1_fault r25 }
5896     b7f0:       [0-9a-f]*       { mnz r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l1_fault r25 }
5897     b7f8:       [0-9a-f]*       { mnz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 }
5898     b800:       [0-9a-f]*       { move r15, r16 ; move r5, r6 ; prefetch_l1_fault r25 }
5899     b808:       [0-9a-f]*       { move r15, r16 ; prefetch_l1_fault r25 }
5900     b810:       [0-9a-f]*       { move r5, r6 ; shrs r15, r16, r17 ; prefetch_l1_fault r25 }
5901     b818:       [0-9a-f]*       { mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 }
5902     b820:       [0-9a-f]*       { movei r5, 5 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
5903     b828:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
5904     b830:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
5905     b838:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
5906     b840:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
5907     b848:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
5908     b850:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 }
5909     b858:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 }
5910     b860:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
5911     b868:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
5912     b870:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
5913     b878:       [0-9a-f]*       { mulax r5, r6, r7 ; nop ; prefetch_l1_fault r25 }
5914     b880:       [0-9a-f]*       { mulx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
5915     b888:       [0-9a-f]*       { mz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l1_fault r25 }
5916     b890:       [0-9a-f]*       { mz r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l1_fault r25 }
5917     b898:       [0-9a-f]*       { mz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 }
5918     b8a0:       [0-9a-f]*       { nop ; cmpleu r5, r6, r7 ; prefetch_l1_fault r25 }
5919     b8a8:       [0-9a-f]*       { nop ; or r15, r16, r17 ; prefetch_l1_fault r25 }
5920     b8b0:       [0-9a-f]*       { tblidxb3 r5, r6 ; nop ; prefetch_l1_fault r25 }
5921     b8b8:       [0-9a-f]*       { nor r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
5922     b8c0:       [0-9a-f]*       { nor r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
5923     b8c8:       [0-9a-f]*       { clz r5, r6 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
5924     b8d0:       [0-9a-f]*       { or r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l1_fault r25 }
5925     b8d8:       [0-9a-f]*       { or r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 }
5926     b8e0:       [0-9a-f]*       { pcnt r5, r6 ; info 19 ; prefetch_l1_fault r25 }
5927     b8e8:       [0-9a-f]*       { revbits r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
5928     b8f0:       [0-9a-f]*       { revbytes r5, r6 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
5929     b8f8:       [0-9a-f]*       { revbytes r5, r6 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
5930     b900:       [0-9a-f]*       { rotl r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
5931     b908:       [0-9a-f]*       { rotl r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
5932     b910:       [0-9a-f]*       { rotli r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1_fault r25 }
5933     b918:       [0-9a-f]*       { rotli r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 }
5934     b920:       [0-9a-f]*       { rotli r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
5935     b928:       [0-9a-f]*       { shl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
5936     b930:       [0-9a-f]*       { shl r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 }
5937     b938:       [0-9a-f]*       { shl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
5938     b940:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
5939     b948:       [0-9a-f]*       { shl1add r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
5940     b950:       [0-9a-f]*       { shl1add r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
5941     b958:       [0-9a-f]*       { shl1addx r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
5942     b960:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
5943     b968:       [0-9a-f]*       { shl2add r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l1_fault r25 }
5944     b970:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 }
5945     b978:       [0-9a-f]*       { shl2add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
5946     b980:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
5947     b988:       [0-9a-f]*       { shl2addx r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 }
5948     b990:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
5949     b998:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 }
5950     b9a0:       [0-9a-f]*       { shl3add r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
5951     b9a8:       [0-9a-f]*       { shl3add r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
5952     b9b0:       [0-9a-f]*       { shl3addx r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
5953     b9b8:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
5954     b9c0:       [0-9a-f]*       { shli r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1_fault r25 }
5955     b9c8:       [0-9a-f]*       { shli r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 }
5956     b9d0:       [0-9a-f]*       { shli r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
5957     b9d8:       [0-9a-f]*       { shrs r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
5958     b9e0:       [0-9a-f]*       { shrs r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 }
5959     b9e8:       [0-9a-f]*       { shrs r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
5960     b9f0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
5961     b9f8:       [0-9a-f]*       { shrsi r5, r6, 5 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
5962     ba00:       [0-9a-f]*       { shrsi r5, r6, 5 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
5963     ba08:       [0-9a-f]*       { shru r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
5964     ba10:       [0-9a-f]*       { shru r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
5965     ba18:       [0-9a-f]*       { shrui r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1_fault r25 }
5966     ba20:       [0-9a-f]*       { shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 }
5967     ba28:       [0-9a-f]*       { shrui r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
5968     ba30:       [0-9a-f]*       { sub r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
5969     ba38:       [0-9a-f]*       { sub r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 }
5970     ba40:       [0-9a-f]*       { sub r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
5971     ba48:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
5972     ba50:       [0-9a-f]*       { subx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
5973     ba58:       [0-9a-f]*       { subx r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
5974     ba60:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
5975     ba68:       [0-9a-f]*       { tblidxb1 r5, r6 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
5976     ba70:       [0-9a-f]*       { tblidxb2 r5, r6 ; lnk r15 ; prefetch_l1_fault r25 }
5977     ba78:       [0-9a-f]*       { tblidxb3 r5, r6 ; prefetch_l1_fault r25 }
5978     ba80:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
5979     ba88:       [0-9a-f]*       { xor r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
5980     ba90:       [0-9a-f]*       { xor r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 }
5981     ba98:       [0-9a-f]*       { cmples r5, r6, r7 ; prefetch_l2 r15 }
5982     baa0:       [0-9a-f]*       { mnz r5, r6, r7 ; prefetch_l2 r15 }
5983     baa8:       [0-9a-f]*       { shl2add r5, r6, r7 ; prefetch_l2 r15 }
5984     bab0:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; prefetch_l2 r15 }
5985     bab8:       [0-9a-f]*       { v2dotp r5, r6, r7 ; prefetch_l2 r15 }
5986     bac0:       [0-9a-f]*       { xor r5, r6, r7 ; prefetch_l2 r15 }
5987     bac8:       [0-9a-f]*       { pcnt r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 }
5988     bad0:       [0-9a-f]*       { add r5, r6, r7 ; ill ; prefetch_l2 r25 }
5989     bad8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l2 r25 }
5990     bae0:       [0-9a-f]*       { addi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l2 r25 }
5991     bae8:       [0-9a-f]*       { addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 }
5992     baf0:       [0-9a-f]*       { addx r15, r16, r17 ; prefetch_l2 r25 }
5993     baf8:       [0-9a-f]*       { tblidxb1 r5, r6 ; addx r15, r16, r17 ; prefetch_l2 r25 }
5994     bb00:       [0-9a-f]*       { addx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
5995     bb08:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
5996     bb10:       [0-9a-f]*       { addxi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l2 r25 }
5997     bb18:       [0-9a-f]*       { addxi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2 r25 }
5998     bb20:       [0-9a-f]*       { pcnt r5, r6 ; and r15, r16, r17 ; prefetch_l2 r25 }
5999     bb28:       [0-9a-f]*       { and r5, r6, r7 ; ill ; prefetch_l2 r25 }
6000     bb30:       [0-9a-f]*       { cmovnez r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2 r25 }
6001     bb38:       [0-9a-f]*       { andi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l2 r25 }
6002     bb40:       [0-9a-f]*       { andi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 }
6003     bb48:       [0-9a-f]*       { clz r5, r6 ; jalrp r15 ; prefetch_l2 r25 }
6004     bb50:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2 r25 }
6005     bb58:       [0-9a-f]*       { cmovnez r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 }
6006     bb60:       [0-9a-f]*       { cmovnez r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 }
6007     bb68:       [0-9a-f]*       { cmpeq r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2 r25 }
6008     bb70:       [0-9a-f]*       { cmpeq r5, r6, r7 ; prefetch_l2 r25 }
6009     bb78:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
6010     bb80:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2 r25 }
6011     bb88:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 }
6012     bb90:       [0-9a-f]*       { ctz r5, r6 ; cmples r15, r16, r17 ; prefetch_l2 r25 }
6013     bb98:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmples r15, r16, r17 ; prefetch_l2 r25 }
6014     bba0:       [0-9a-f]*       { cmples r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
6015     bba8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
6016     bbb0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 }
6017     bbb8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 }
6018     bbc0:       [0-9a-f]*       { cmplts r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2 r25 }
6019     bbc8:       [0-9a-f]*       { cmplts r5, r6, r7 ; prefetch_l2 r25 }
6020     bbd0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2 r25 }
6021     bbd8:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2 r25 }
6022     bbe0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 }
6023     bbe8:       [0-9a-f]*       { ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
6024     bbf0:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
6025     bbf8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
6026     bc00:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
6027     bc08:       [0-9a-f]*       { cmpne r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 }
6028     bc10:       [0-9a-f]*       { cmpne r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 }
6029     bc18:       [0-9a-f]*       { ctz r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
6030     bc20:       [0-9a-f]*       { cmpne r5, r6, r7 ; prefetch_l2 r25 }
6031     bc28:       [0-9a-f]*       { rotli r5, r6, 5 ; prefetch_l2 r25 }
6032     bc30:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch_l2 r25 }
6033     bc38:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 }
6034     bc40:       [0-9a-f]*       { or r5, r6, r7 ; ill ; prefetch_l2 r25 }
6035     bc48:       [0-9a-f]*       { cmovnez r5, r6, r7 ; info 19 ; prefetch_l2 r25 }
6036     bc50:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; info 19 ; prefetch_l2 r25 }
6037     bc58:       [0-9a-f]*       { info 19 ; shrui r5, r6, 5 ; prefetch_l2 r25 }
6038     bc60:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
6039     bc68:       [0-9a-f]*       { andi r5, r6, 5 ; jalrp r15 ; prefetch_l2 r25 }
6040     bc70:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
6041     bc78:       [0-9a-f]*       { move r5, r6 ; jr r15 ; prefetch_l2 r25 }
6042     bc80:       [0-9a-f]*       { jr r15 ; prefetch_l2 r25 }
6043     bc88:       [0-9a-f]*       { revbits r5, r6 ; jrp r15 ; prefetch_l2 r25 }
6044     bc90:       [0-9a-f]*       { cmpne r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
6045     bc98:       [0-9a-f]*       { subx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
6046     bca0:       [0-9a-f]*       { mulx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
6047     bca8:       [0-9a-f]*       { mnz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
6048     bcb0:       [0-9a-f]*       { move r15, r16 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
6049     bcb8:       [0-9a-f]*       { move r15, r16 ; shl r5, r6, r7 ; prefetch_l2 r25 }
6050     bcc0:       [0-9a-f]*       { move r5, r6 ; jrp r15 ; prefetch_l2 r25 }
6051     bcc8:       [0-9a-f]*       { movei r15, 5 ; cmplts r5, r6, r7 ; prefetch_l2 r25 }
6052     bcd0:       [0-9a-f]*       { movei r15, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
6053     bcd8:       [0-9a-f]*       { movei r5, 5 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
6054     bce0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
6055     bce8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; info 19 ; prefetch_l2 r25 }
6056     bcf0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
6057     bcf8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 }
6058     bd00:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
6059     bd08:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
6060     bd10:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 }
6061     bd18:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
6062     bd20:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; prefetch_l2 r25 }
6063     bd28:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
6064     bd30:       [0-9a-f]*       { mulx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
6065     bd38:       [0-9a-f]*       { mulx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
6066     bd40:       [0-9a-f]*       { mulx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
6067     bd48:       [0-9a-f]*       { mz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
6068     bd50:       [0-9a-f]*       { nop ; addi r5, r6, 5 ; prefetch_l2 r25 }
6069     bd58:       [0-9a-f]*       { nop ; move r15, r16 ; prefetch_l2 r25 }
6070     bd60:       [0-9a-f]*       { nop ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
6071     bd68:       [0-9a-f]*       { ctz r5, r6 ; nor r15, r16, r17 ; prefetch_l2 r25 }
6072     bd70:       [0-9a-f]*       { tblidxb0 r5, r6 ; nor r15, r16, r17 ; prefetch_l2 r25 }
6073     bd78:       [0-9a-f]*       { nor r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
6074     bd80:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 }
6075     bd88:       [0-9a-f]*       { or r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 }
6076     bd90:       [0-9a-f]*       { or r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 }
6077     bd98:       [0-9a-f]*       { pcnt r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
6078     bda0:       [0-9a-f]*       { revbits r5, r6 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
6079     bda8:       [0-9a-f]*       { revbytes r5, r6 ; move r15, r16 ; prefetch_l2 r25 }
6080     bdb0:       [0-9a-f]*       { rotl r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 }
6081     bdb8:       [0-9a-f]*       { rotl r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
6082     bdc0:       [0-9a-f]*       { rotl r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
6083     bdc8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
6084     bdd0:       [0-9a-f]*       { rotli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
6085     bdd8:       [0-9a-f]*       { rotli r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l2 r25 }
6086     bde0:       [0-9a-f]*       { shl r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
6087     bde8:       [0-9a-f]*       { shl r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
6088     bdf0:       [0-9a-f]*       { clz r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
6089     bdf8:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l2 r25 }
6090     be00:       [0-9a-f]*       { shl1add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
6091     be08:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 }
6092     be10:       [0-9a-f]*       { shl1addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
6093     be18:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
6094     be20:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
6095     be28:       [0-9a-f]*       { shl2add r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
6096     be30:       [0-9a-f]*       { shl2add r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 }
6097     be38:       [0-9a-f]*       { shl2addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
6098     be40:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
6099     be48:       [0-9a-f]*       { clz r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2 r25 }
6100     be50:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l2 r25 }
6101     be58:       [0-9a-f]*       { shl3add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
6102     be60:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 }
6103     be68:       [0-9a-f]*       { shl3addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
6104     be70:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
6105     be78:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 }
6106     be80:       [0-9a-f]*       { shli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
6107     be88:       [0-9a-f]*       { shli r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l2 r25 }
6108     be90:       [0-9a-f]*       { shrs r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
6109     be98:       [0-9a-f]*       { shrs r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
6110     bea0:       [0-9a-f]*       { clz r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
6111     bea8:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch_l2 r25 }
6112     beb0:       [0-9a-f]*       { shrsi r5, r6, 5 ; move r15, r16 ; prefetch_l2 r25 }
6113     beb8:       [0-9a-f]*       { shru r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 }
6114     bec0:       [0-9a-f]*       { shru r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
6115     bec8:       [0-9a-f]*       { shru r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
6116     bed0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
6117     bed8:       [0-9a-f]*       { shrui r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
6118     bee0:       [0-9a-f]*       { shrui r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l2 r25 }
6119     bee8:       [0-9a-f]*       { sub r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
6120     bef0:       [0-9a-f]*       { sub r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
6121     bef8:       [0-9a-f]*       { clz r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 }
6122     bf00:       [0-9a-f]*       { subx r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l2 r25 }
6123     bf08:       [0-9a-f]*       { subx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
6124     bf10:       [0-9a-f]*       { tblidxb0 r5, r6 ; info 19 ; prefetch_l2 r25 }
6125     bf18:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
6126     bf20:       [0-9a-f]*       { tblidxb2 r5, r6 ; addx r15, r16, r17 ; prefetch_l2 r25 }
6127     bf28:       [0-9a-f]*       { tblidxb2 r5, r6 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
6128     bf30:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
6129     bf38:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 }
6130     bf40:       [0-9a-f]*       { xor r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2 r25 }
6131     bf48:       [0-9a-f]*       { xor r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 }
6132     bf50:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; prefetch_l2_fault r15 }
6133     bf58:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; prefetch_l2_fault r15 }
6134     bf60:       [0-9a-f]*       { v1add r5, r6, r7 ; prefetch_l2_fault r15 }
6135     bf68:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; prefetch_l2_fault r15 }
6136     bf70:       [0-9a-f]*       { v2shli r5, r6, 5 ; prefetch_l2_fault r15 }
6137     bf78:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
6138     bf80:       [0-9a-f]*       { tblidxb2 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
6139     bf88:       [0-9a-f]*       { add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
6140     bf90:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
6141     bf98:       [0-9a-f]*       { addi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
6142     bfa0:       [0-9a-f]*       { addi r5, r6, 5 ; prefetch_l2_fault r25 }
6143     bfa8:       [0-9a-f]*       { revbits r5, r6 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
6144     bfb0:       [0-9a-f]*       { addx r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 }
6145     bfb8:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l2_fault r25 }
6146     bfc0:       [0-9a-f]*       { addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
6147     bfc8:       [0-9a-f]*       { addxi r5, r6, 5 ; nop ; prefetch_l2_fault r25 }
6148     bfd0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
6149     bfd8:       [0-9a-f]*       { tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
6150     bfe0:       [0-9a-f]*       { and r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
6151     bfe8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
6152     bff0:       [0-9a-f]*       { andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
6153     bff8:       [0-9a-f]*       { andi r5, r6, 5 ; prefetch_l2_fault r25 }
6154     c000:       [0-9a-f]*       { clz r5, r6 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 }
6155     c008:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
6156     c010:       [0-9a-f]*       { cmovnez r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
6157     c018:       [0-9a-f]*       { cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
6158     c020:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
6159     c028:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
6160     c030:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
6161     c038:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
6162     c040:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
6163     c048:       [0-9a-f]*       { pcnt r5, r6 ; cmples r15, r16, r17 ; prefetch_l2_fault r25 }
6164     c050:       [0-9a-f]*       { cmples r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
6165     c058:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 }
6166     c060:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2_fault r25 }
6167     c068:       [0-9a-f]*       { cmpleu r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
6168     c070:       [0-9a-f]*       { cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
6169     c078:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
6170     c080:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
6171     c088:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 }
6172     c090:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
6173     c098:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
6174     c0a0:       [0-9a-f]*       { pcnt r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
6175     c0a8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
6176     c0b0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2_fault r25 }
6177     c0b8:       [0-9a-f]*       { cmpne r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2_fault r25 }
6178     c0c0:       [0-9a-f]*       { cmpne r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
6179     c0c8:       [0-9a-f]*       { ctz r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
6180     c0d0:       [0-9a-f]*       { andi r5, r6, 5 ; prefetch_l2_fault r25 }
6181     c0d8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 }
6182     c0e0:       [0-9a-f]*       { shru r15, r16, r17 ; prefetch_l2_fault r25 }
6183     c0e8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
6184     c0f0:       [0-9a-f]*       { ill ; prefetch_l2_fault r25 }
6185     c0f8:       [0-9a-f]*       { tblidxb1 r5, r6 ; ill ; prefetch_l2_fault r25 }
6186     c100:       [0-9a-f]*       { info 19 ; info 19 ; prefetch_l2_fault r25 }
6187     c108:       [0-9a-f]*       { info 19 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
6188     c110:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
6189     c118:       [0-9a-f]*       { shl3addx r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
6190     c120:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jalrp r15 ; prefetch_l2_fault r25 }
6191     c128:       [0-9a-f]*       { addxi r5, r6, 5 ; jr r15 ; prefetch_l2_fault r25 }
6192     c130:       [0-9a-f]*       { shl r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
6193     c138:       [0-9a-f]*       { info 19 ; jrp r15 ; prefetch_l2_fault r25 }
6194     c140:       [0-9a-f]*       { tblidxb3 r5, r6 ; jrp r15 ; prefetch_l2_fault r25 }
6195     c148:       [0-9a-f]*       { or r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
6196     c150:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 }
6197     c158:       [0-9a-f]*       { mnz r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2_fault r25 }
6198     c160:       [0-9a-f]*       { mnz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
6199     c168:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 }
6200     c170:       [0-9a-f]*       { move r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
6201     c178:       [0-9a-f]*       { move r5, r6 ; shru r15, r16, r17 ; prefetch_l2_fault r25 }
6202     c180:       [0-9a-f]*       { movei r15, 5 ; mz r5, r6, r7 ; prefetch_l2_fault r25 }
6203     c188:       [0-9a-f]*       { movei r5, 5 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 }
6204     c190:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
6205     c198:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
6206     c1a0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
6207     c1a8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
6208     c1b0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 }
6209     c1b8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 }
6210     c1c0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 }
6211     c1c8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
6212     c1d0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 }
6213     c1d8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
6214     c1e0:       [0-9a-f]*       { mulax r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
6215     c1e8:       [0-9a-f]*       { mulx r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
6216     c1f0:       [0-9a-f]*       { mz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 }
6217     c1f8:       [0-9a-f]*       { mz r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2_fault r25 }
6218     c200:       [0-9a-f]*       { mz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
6219     c208:       [0-9a-f]*       { nop ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
6220     c210:       [0-9a-f]*       { pcnt r5, r6 ; nop ; prefetch_l2_fault r25 }
6221     c218:       [0-9a-f]*       { nop ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
6222     c220:       [0-9a-f]*       { pcnt r5, r6 ; nor r15, r16, r17 ; prefetch_l2_fault r25 }
6223     c228:       [0-9a-f]*       { nor r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
6224     c230:       [0-9a-f]*       { cmovnez r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
6225     c238:       [0-9a-f]*       { or r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2_fault r25 }
6226     c240:       [0-9a-f]*       { or r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
6227     c248:       [0-9a-f]*       { pcnt r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
6228     c250:       [0-9a-f]*       { revbits r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 }
6229     c258:       [0-9a-f]*       { revbytes r5, r6 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
6230     c260:       [0-9a-f]*       { revbytes r5, r6 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
6231     c268:       [0-9a-f]*       { rotl r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 }
6232     c270:       [0-9a-f]*       { rotl r5, r6, r7 ; prefetch_l2_fault r25 }
6233     c278:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
6234     c280:       [0-9a-f]*       { rotli r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
6235     c288:       [0-9a-f]*       { rotli r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 }
6236     c290:       [0-9a-f]*       { ctz r5, r6 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
6237     c298:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
6238     c2a0:       [0-9a-f]*       { shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
6239     c2a8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
6240     c2b0:       [0-9a-f]*       { shl1add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
6241     c2b8:       [0-9a-f]*       { shl1add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
6242     c2c0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 }
6243     c2c8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
6244     c2d0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
6245     c2d8:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
6246     c2e0:       [0-9a-f]*       { shl2add r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 }
6247     c2e8:       [0-9a-f]*       { ctz r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
6248     c2f0:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
6249     c2f8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
6250     c300:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
6251     c308:       [0-9a-f]*       { shl3add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
6252     c310:       [0-9a-f]*       { shl3add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
6253     c318:       [0-9a-f]*       { shl3addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 }
6254     c320:       [0-9a-f]*       { shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
6255     c328:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
6256     c330:       [0-9a-f]*       { shli r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
6257     c338:       [0-9a-f]*       { shli r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 }
6258     c340:       [0-9a-f]*       { ctz r5, r6 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 }
6259     c348:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 }
6260     c350:       [0-9a-f]*       { shrs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
6261     c358:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 }
6262     c360:       [0-9a-f]*       { shrsi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
6263     c368:       [0-9a-f]*       { shrsi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
6264     c370:       [0-9a-f]*       { shru r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 }
6265     c378:       [0-9a-f]*       { shru r5, r6, r7 ; prefetch_l2_fault r25 }
6266     c380:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 }
6267     c388:       [0-9a-f]*       { shrui r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
6268     c390:       [0-9a-f]*       { shrui r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 }
6269     c398:       [0-9a-f]*       { ctz r5, r6 ; sub r15, r16, r17 ; prefetch_l2_fault r25 }
6270     c3a0:       [0-9a-f]*       { tblidxb0 r5, r6 ; sub r15, r16, r17 ; prefetch_l2_fault r25 }
6271     c3a8:       [0-9a-f]*       { sub r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
6272     c3b0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
6273     c3b8:       [0-9a-f]*       { subx r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
6274     c3c0:       [0-9a-f]*       { subx r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
6275     c3c8:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
6276     c3d0:       [0-9a-f]*       { tblidxb1 r5, r6 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
6277     c3d8:       [0-9a-f]*       { tblidxb2 r5, r6 ; move r15, r16 ; prefetch_l2_fault r25 }
6278     c3e0:       [0-9a-f]*       { tblidxb3 r5, r6 ; info 19 ; prefetch_l2_fault r25 }
6279     c3e8:       [0-9a-f]*       { xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l2_fault r25 }
6280     c3f0:       [0-9a-f]*       { xor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
6281     c3f8:       [0-9a-f]*       { xor r5, r6, r7 ; nop ; prefetch_l2_fault r25 }
6282     c400:       [0-9a-f]*       { cmplts r5, r6, r7 ; prefetch_l3 r15 }
6283     c408:       [0-9a-f]*       { movei r5, 5 ; prefetch_l3 r15 }
6284     c410:       [0-9a-f]*       { shl3add r5, r6, r7 ; prefetch_l3 r15 }
6285     c418:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; prefetch_l3 r15 }
6286     c420:       [0-9a-f]*       { v2int_h r5, r6, r7 ; prefetch_l3 r15 }
6287     c428:       [0-9a-f]*       { add r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3 r25 }
6288     c430:       [0-9a-f]*       { revbytes r5, r6 ; add r15, r16, r17 ; prefetch_l3 r25 }
6289     c438:       [0-9a-f]*       { add r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
6290     c440:       [0-9a-f]*       { addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l3 r25 }
6291     c448:       [0-9a-f]*       { addi r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l3 r25 }
6292     c450:       [0-9a-f]*       { addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 }
6293     c458:       [0-9a-f]*       { addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 }
6294     c460:       [0-9a-f]*       { tblidxb3 r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 }
6295     c468:       [0-9a-f]*       { addx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
6296     c470:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3 r25 }
6297     c478:       [0-9a-f]*       { addxi r5, r6, 5 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 }
6298     c480:       [0-9a-f]*       { and r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3 r25 }
6299     c488:       [0-9a-f]*       { revbytes r5, r6 ; and r15, r16, r17 ; prefetch_l3 r25 }
6300     c490:       [0-9a-f]*       { and r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
6301     c498:       [0-9a-f]*       { andi r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l3 r25 }
6302     c4a0:       [0-9a-f]*       { andi r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l3 r25 }
6303     c4a8:       [0-9a-f]*       { andi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 }
6304     c4b0:       [0-9a-f]*       { clz r5, r6 ; jrp r15 ; prefetch_l3 r25 }
6305     c4b8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
6306     c4c0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
6307     c4c8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; prefetch_l3 r25 }
6308     c4d0:       [0-9a-f]*       { revbits r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
6309     c4d8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
6310     c4e0:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
6311     c4e8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3 r25 }
6312     c4f0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; nop ; prefetch_l3 r25 }
6313     c4f8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
6314     c500:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
6315     c508:       [0-9a-f]*       { cmples r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
6316     c510:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
6317     c518:       [0-9a-f]*       { cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
6318     c520:       [0-9a-f]*       { cmpleu r5, r6, r7 ; prefetch_l3 r25 }
6319     c528:       [0-9a-f]*       { revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
6320     c530:       [0-9a-f]*       { cmplts r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
6321     c538:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
6322     c540:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3 r25 }
6323     c548:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; nop ; prefetch_l3 r25 }
6324     c550:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
6325     c558:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
6326     c560:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
6327     c568:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
6328     c570:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
6329     c578:       [0-9a-f]*       { cmpne r5, r6, r7 ; prefetch_l3 r25 }
6330     c580:       [0-9a-f]*       { ctz r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
6331     c588:       [0-9a-f]*       { prefetch_l3 r25 }
6332     c590:       [0-9a-f]*       { shl r5, r6, r7 ; prefetch_l3 r25 }
6333     c598:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
6334     c5a0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; prefetch_l3 r25 }
6335     c5a8:       [0-9a-f]*       { revbits r5, r6 ; ill ; prefetch_l3 r25 }
6336     c5b0:       [0-9a-f]*       { info 19 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
6337     c5b8:       [0-9a-f]*       { mulx r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
6338     c5c0:       [0-9a-f]*       { info 19 ; sub r5, r6, r7 ; prefetch_l3 r25 }
6339     c5c8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
6340     c5d0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
6341     c5d8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
6342     c5e0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
6343     c5e8:       [0-9a-f]*       { addi r5, r6, 5 ; jrp r15 ; prefetch_l3 r25 }
6344     c5f0:       [0-9a-f]*       { rotl r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 }
6345     c5f8:       [0-9a-f]*       { lnk r15 ; prefetch_l3 r25 }
6346     c600:       [0-9a-f]*       { tblidxb1 r5, r6 ; lnk r15 ; prefetch_l3 r25 }
6347     c608:       [0-9a-f]*       { mnz r15, r16, r17 ; nop ; prefetch_l3 r25 }
6348     c610:       [0-9a-f]*       { mnz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
6349     c618:       [0-9a-f]*       { move r15, r16 ; andi r5, r6, 5 ; prefetch_l3 r25 }
6350     c620:       [0-9a-f]*       { move r15, r16 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
6351     c628:       [0-9a-f]*       { move r5, r6 ; mnz r15, r16, r17 ; prefetch_l3 r25 }
6352     c630:       [0-9a-f]*       { movei r15, 5 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 }
6353     c638:       [0-9a-f]*       { movei r15, 5 ; sub r5, r6, r7 ; prefetch_l3 r25 }
6354     c640:       [0-9a-f]*       { movei r5, 5 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
6355     c648:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
6356     c650:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
6357     c658:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
6358     c660:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
6359     c668:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
6360     c670:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
6361     c678:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 }
6362     c680:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 }
6363     c688:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
6364     c690:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
6365     c698:       [0-9a-f]*       { mulx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
6366     c6a0:       [0-9a-f]*       { mulx r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
6367     c6a8:       [0-9a-f]*       { mz r15, r16, r17 ; nop ; prefetch_l3 r25 }
6368     c6b0:       [0-9a-f]*       { mz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
6369     c6b8:       [0-9a-f]*       { nop ; addx r5, r6, r7 ; prefetch_l3 r25 }
6370     c6c0:       [0-9a-f]*       { nop ; movei r15, 5 ; prefetch_l3 r25 }
6371     c6c8:       [0-9a-f]*       { nop ; shli r15, r16, 5 ; prefetch_l3 r25 }
6372     c6d0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; nor r15, r16, r17 ; prefetch_l3 r25 }
6373     c6d8:       [0-9a-f]*       { tblidxb2 r5, r6 ; nor r15, r16, r17 ; prefetch_l3 r25 }
6374     c6e0:       [0-9a-f]*       { nor r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
6375     c6e8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 }
6376     c6f0:       [0-9a-f]*       { or r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
6377     c6f8:       [0-9a-f]*       { or r5, r6, r7 ; prefetch_l3 r25 }
6378     c700:       [0-9a-f]*       { pcnt r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
6379     c708:       [0-9a-f]*       { revbits r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
6380     c710:       [0-9a-f]*       { revbytes r5, r6 ; mz r15, r16, r17 ; prefetch_l3 r25 }
6381     c718:       [0-9a-f]*       { rotl r15, r16, r17 ; prefetch_l3 r25 }
6382     c720:       [0-9a-f]*       { tblidxb1 r5, r6 ; rotl r15, r16, r17 ; prefetch_l3 r25 }
6383     c728:       [0-9a-f]*       { rotl r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
6384     c730:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 }
6385     c738:       [0-9a-f]*       { rotli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3 r25 }
6386     c740:       [0-9a-f]*       { rotli r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
6387     c748:       [0-9a-f]*       { pcnt r5, r6 ; shl r15, r16, r17 ; prefetch_l3 r25 }
6388     c750:       [0-9a-f]*       { shl r5, r6, r7 ; ill ; prefetch_l3 r25 }
6389     c758:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
6390     c760:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
6391     c768:       [0-9a-f]*       { shl1add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
6392     c770:       [0-9a-f]*       { shl1addx r15, r16, r17 ; prefetch_l3 r25 }
6393     c778:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 }
6394     c780:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
6395     c788:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
6396     c790:       [0-9a-f]*       { shl2add r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3 r25 }
6397     c798:       [0-9a-f]*       { shl2add r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
6398     c7a0:       [0-9a-f]*       { pcnt r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
6399     c7a8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; ill ; prefetch_l3 r25 }
6400     c7b0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
6401     c7b8:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
6402     c7c0:       [0-9a-f]*       { shl3add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
6403     c7c8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; prefetch_l3 r25 }
6404     c7d0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
6405     c7d8:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
6406     c7e0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3 r25 }
6407     c7e8:       [0-9a-f]*       { shli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3 r25 }
6408     c7f0:       [0-9a-f]*       { shli r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
6409     c7f8:       [0-9a-f]*       { pcnt r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
6410     c800:       [0-9a-f]*       { shrs r5, r6, r7 ; ill ; prefetch_l3 r25 }
6411     c808:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3 r25 }
6412     c810:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
6413     c818:       [0-9a-f]*       { shrsi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 }
6414     c820:       [0-9a-f]*       { shru r15, r16, r17 ; prefetch_l3 r25 }
6415     c828:       [0-9a-f]*       { tblidxb1 r5, r6 ; shru r15, r16, r17 ; prefetch_l3 r25 }
6416     c830:       [0-9a-f]*       { shru r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
6417     c838:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
6418     c840:       [0-9a-f]*       { shrui r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3 r25 }
6419     c848:       [0-9a-f]*       { shrui r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
6420     c850:       [0-9a-f]*       { pcnt r5, r6 ; sub r15, r16, r17 ; prefetch_l3 r25 }
6421     c858:       [0-9a-f]*       { sub r5, r6, r7 ; ill ; prefetch_l3 r25 }
6422     c860:       [0-9a-f]*       { cmovnez r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
6423     c868:       [0-9a-f]*       { subx r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
6424     c870:       [0-9a-f]*       { subx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
6425     c878:       [0-9a-f]*       { tblidxb0 r5, r6 ; jalrp r15 ; prefetch_l3 r25 }
6426     c880:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
6427     c888:       [0-9a-f]*       { tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch_l3 r25 }
6428     c890:       [0-9a-f]*       { tblidxb2 r5, r6 ; subx r15, r16, r17 ; prefetch_l3 r25 }
6429     c898:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
6430     c8a0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
6431     c8a8:       [0-9a-f]*       { xor r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 }
6432     c8b0:       [0-9a-f]*       { add r5, r6, r7 ; prefetch_l3_fault r15 }
6433     c8b8:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; prefetch_l3_fault r15 }
6434     c8c0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; prefetch_l3_fault r15 }
6435     c8c8:       [0-9a-f]*       { v1adduc r5, r6, r7 ; prefetch_l3_fault r15 }
6436     c8d0:       [0-9a-f]*       { v1shrui r5, r6, 5 ; prefetch_l3_fault r15 }
6437     c8d8:       [0-9a-f]*       { v2shrs r5, r6, r7 ; prefetch_l3_fault r15 }
6438     c8e0:       [0-9a-f]*       { add r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
6439     c8e8:       [0-9a-f]*       { add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
6440     c8f0:       [0-9a-f]*       { add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
6441     c8f8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3_fault r25 }
6442     c900:       [0-9a-f]*       { addi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
6443     c908:       [0-9a-f]*       { addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
6444     c910:       [0-9a-f]*       { addx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l3_fault r25 }
6445     c918:       [0-9a-f]*       { addx r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
6446     c920:       [0-9a-f]*       { addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l3_fault r25 }
6447     c928:       [0-9a-f]*       { addxi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l3_fault r25 }
6448     c930:       [0-9a-f]*       { addxi r5, r6, 5 ; or r15, r16, r17 ; prefetch_l3_fault r25 }
6449     c938:       [0-9a-f]*       { and r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
6450     c940:       [0-9a-f]*       { and r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
6451     c948:       [0-9a-f]*       { and r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
6452     c950:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
6453     c958:       [0-9a-f]*       { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
6454     c960:       [0-9a-f]*       { clz r5, r6 ; addi r15, r16, 5 ; prefetch_l3_fault r25 }
6455     c968:       [0-9a-f]*       { clz r5, r6 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
6456     c970:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
6457     c978:       [0-9a-f]*       { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
6458     c980:       [0-9a-f]*       { cmpeq r15, r16, r17 ; info 19 ; prefetch_l3_fault r25 }
6459     c988:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
6460     c990:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
6461     c998:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
6462     c9a0:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
6463     c9a8:       [0-9a-f]*       { cmples r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3_fault r25 }
6464     c9b0:       [0-9a-f]*       { revbytes r5, r6 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
6465     c9b8:       [0-9a-f]*       { cmples r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
6466     c9c0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
6467     c9c8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
6468     c9d0:       [0-9a-f]*       { cmpleu r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
6469     c9d8:       [0-9a-f]*       { cmplts r15, r16, r17 ; info 19 ; prefetch_l3_fault r25 }
6470     c9e0:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3_fault r25 }
6471     c9e8:       [0-9a-f]*       { cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
6472     c9f0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 }
6473     c9f8:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
6474     ca00:       [0-9a-f]*       { cmpltu r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3_fault r25 }
6475     ca08:       [0-9a-f]*       { revbytes r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
6476     ca10:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
6477     ca18:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
6478     ca20:       [0-9a-f]*       { cmpne r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
6479     ca28:       [0-9a-f]*       { cmpne r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
6480     ca30:       [0-9a-f]*       { ctz r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
6481     ca38:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 }
6482     ca40:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 }
6483     ca48:       [0-9a-f]*       { shrui r15, r16, 5 ; prefetch_l3_fault r25 }
6484     ca50:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
6485     ca58:       [0-9a-f]*       { info 19 ; ill ; prefetch_l3_fault r25 }
6486     ca60:       [0-9a-f]*       { tblidxb3 r5, r6 ; ill ; prefetch_l3_fault r25 }
6487     ca68:       [0-9a-f]*       { info 19 ; jalrp r15 ; prefetch_l3_fault r25 }
6488     ca70:       [0-9a-f]*       { info 19 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
6489     ca78:       [0-9a-f]*       { cmples r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
6490     ca80:       [0-9a-f]*       { shrs r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
6491     ca88:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
6492     ca90:       [0-9a-f]*       { andi r5, r6, 5 ; jr r15 ; prefetch_l3_fault r25 }
6493     ca98:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 }
6494     caa0:       [0-9a-f]*       { move r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
6495     caa8:       [0-9a-f]*       { jrp r15 ; prefetch_l3_fault r25 }
6496     cab0:       [0-9a-f]*       { revbits r5, r6 ; lnk r15 ; prefetch_l3_fault r25 }
6497     cab8:       [0-9a-f]*       { mnz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 }
6498     cac0:       [0-9a-f]*       { mnz r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 }
6499     cac8:       [0-9a-f]*       { mnz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
6500     cad0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; move r15, r16 ; prefetch_l3_fault r25 }
6501     cad8:       [0-9a-f]*       { move r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
6502     cae0:       [0-9a-f]*       { move r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
6503     cae8:       [0-9a-f]*       { movei r15, 5 ; nor r5, r6, r7 ; prefetch_l3_fault r25 }
6504     caf0:       [0-9a-f]*       { movei r5, 5 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
6505     caf8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
6506     cb00:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 }
6507     cb08:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
6508     cb10:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 }
6509     cb18:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3_fault r25 }
6510     cb20:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
6511     cb28:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 }
6512     cb30:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 }
6513     cb38:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 }
6514     cb40:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
6515     cb48:       [0-9a-f]*       { mulax r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
6516     cb50:       [0-9a-f]*       { mulx r5, r6, r7 ; move r15, r16 ; prefetch_l3_fault r25 }
6517     cb58:       [0-9a-f]*       { mz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 }
6518     cb60:       [0-9a-f]*       { mz r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 }
6519     cb68:       [0-9a-f]*       { mz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
6520     cb70:       [0-9a-f]*       { nop ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
6521     cb78:       [0-9a-f]*       { revbytes r5, r6 ; nop ; prefetch_l3_fault r25 }
6522     cb80:       [0-9a-f]*       { nor r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3_fault r25 }
6523     cb88:       [0-9a-f]*       { revbytes r5, r6 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
6524     cb90:       [0-9a-f]*       { nor r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
6525     cb98:       [0-9a-f]*       { or r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
6526     cba0:       [0-9a-f]*       { or r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
6527     cba8:       [0-9a-f]*       { or r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
6528     cbb0:       [0-9a-f]*       { pcnt r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
6529     cbb8:       [0-9a-f]*       { revbits r5, r6 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
6530     cbc0:       [0-9a-f]*       { revbytes r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
6531     cbc8:       [0-9a-f]*       { revbytes r5, r6 ; prefetch_l3_fault r25 }
6532     cbd0:       [0-9a-f]*       { revbits r5, r6 ; rotl r15, r16, r17 ; prefetch_l3_fault r25 }
6533     cbd8:       [0-9a-f]*       { rotl r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
6534     cbe0:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 }
6535     cbe8:       [0-9a-f]*       { rotli r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 }
6536     cbf0:       [0-9a-f]*       { rotli r5, r6, 5 ; nop ; prefetch_l3_fault r25 }
6537     cbf8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; prefetch_l3_fault r25 }
6538     cc00:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl r15, r16, r17 ; prefetch_l3_fault r25 }
6539     cc08:       [0-9a-f]*       { shl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
6540     cc10:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 }
6541     cc18:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
6542     cc20:       [0-9a-f]*       { shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
6543     cc28:       [0-9a-f]*       { revbits r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
6544     cc30:       [0-9a-f]*       { shl1addx r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
6545     cc38:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 }
6546     cc40:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 }
6547     cc48:       [0-9a-f]*       { shl2add r5, r6, r7 ; nop ; prefetch_l3_fault r25 }
6548     cc50:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
6549     cc58:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
6550     cc60:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
6551     cc68:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
6552     cc70:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
6553     cc78:       [0-9a-f]*       { shl3add r5, r6, r7 ; prefetch_l3_fault r25 }
6554     cc80:       [0-9a-f]*       { revbits r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
6555     cc88:       [0-9a-f]*       { shl3addx r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
6556     cc90:       [0-9a-f]*       { shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 }
6557     cc98:       [0-9a-f]*       { shli r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 }
6558     cca0:       [0-9a-f]*       { shli r5, r6, 5 ; nop ; prefetch_l3_fault r25 }
6559     cca8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
6560     ccb0:       [0-9a-f]*       { tblidxb2 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
6561     ccb8:       [0-9a-f]*       { shrs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
6562     ccc0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
6563     ccc8:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
6564     ccd0:       [0-9a-f]*       { shrsi r5, r6, 5 ; prefetch_l3_fault r25 }
6565     ccd8:       [0-9a-f]*       { revbits r5, r6 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
6566     cce0:       [0-9a-f]*       { shru r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
6567     cce8:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 }
6568     ccf0:       [0-9a-f]*       { shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 }
6569     ccf8:       [0-9a-f]*       { shrui r5, r6, 5 ; nop ; prefetch_l3_fault r25 }
6570     cd00:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
6571     cd08:       [0-9a-f]*       { tblidxb2 r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
6572     cd10:       [0-9a-f]*       { sub r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
6573     cd18:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 }
6574     cd20:       [0-9a-f]*       { subx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
6575     cd28:       [0-9a-f]*       { subx r5, r6, r7 ; prefetch_l3_fault r25 }
6576     cd30:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
6577     cd38:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 }
6578     cd40:       [0-9a-f]*       { tblidxb2 r5, r6 ; mz r15, r16, r17 ; prefetch_l3_fault r25 }
6579     cd48:       [0-9a-f]*       { tblidxb3 r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 }
6580     cd50:       [0-9a-f]*       { xor r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l3_fault r25 }
6581     cd58:       [0-9a-f]*       { xor r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l3_fault r25 }
6582     cd60:       [0-9a-f]*       { xor r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 }
6583     cd68:       [0-9a-f]*       { cmpltu r5, r6, r7 ; raise }
6584     cd70:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; raise }
6585     cd78:       [0-9a-f]*       { shli r5, r6, 5 ; raise }
6586     cd80:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; raise }
6587     cd88:       [0-9a-f]*       { v2maxs r5, r6, r7 ; raise }
6588     cd90:       [0-9a-f]*       { revbits r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
6589     cd98:       [0-9a-f]*       { revbits r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 }
6590     cda0:       [0-9a-f]*       { revbits r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
6591     cda8:       [0-9a-f]*       { revbits r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
6592     cdb0:       [0-9a-f]*       { revbits r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
6593     cdb8:       [0-9a-f]*       { revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 }
6594     cdc0:       [0-9a-f]*       { revbits r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
6595     cdc8:       [0-9a-f]*       { revbits r5, r6 ; fetchand r15, r16, r17 }
6596     cdd0:       [0-9a-f]*       { revbits r5, r6 ; ill ; prefetch_l3_fault r25 }
6597     cdd8:       [0-9a-f]*       { revbits r5, r6 ; jalr r15 ; prefetch_l3 r25 }
6598     cde0:       [0-9a-f]*       { revbits r5, r6 ; jr r15 ; st r25, r26 }
6599     cde8:       [0-9a-f]*       { revbits r5, r6 ; ill ; ld r25, r26 }
6600     cdf0:       [0-9a-f]*       { revbits r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
6601     cdf8:       [0-9a-f]*       { revbits r5, r6 ; ld1s_add r15, r16, 5 }
6602     ce00:       [0-9a-f]*       { revbits r5, r6 ; shli r15, r16, 5 ; ld1u r25, r26 }
6603     ce08:       [0-9a-f]*       { revbits r5, r6 ; rotl r15, r16, r17 ; ld2s r25, r26 }
6604     ce10:       [0-9a-f]*       { revbits r5, r6 ; jrp r15 ; ld2u r25, r26 }
6605     ce18:       [0-9a-f]*       { revbits r5, r6 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
6606     ce20:       [0-9a-f]*       { revbits r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 }
6607     ce28:       [0-9a-f]*       { revbits r5, r6 ; shrui r15, r16, 5 ; ld4u r25, r26 }
6608     ce30:       [0-9a-f]*       { revbits r5, r6 ; lnk r15 ; st4 r25, r26 }
6609     ce38:       [0-9a-f]*       { revbits r5, r6 ; move r15, r16 ; st4 r25, r26 }
6610     ce40:       [0-9a-f]*       { revbits r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 }
6611     ce48:       [0-9a-f]*       { revbits r5, r6 ; or r15, r16, r17 ; ld r25, r26 }
6612     ce50:       [0-9a-f]*       { revbits r5, r6 ; jr r15 ; prefetch r25 }
6613     ce58:       [0-9a-f]*       { revbits r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
6614     ce60:       [0-9a-f]*       { revbits r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
6615     ce68:       [0-9a-f]*       { revbits r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
6616     ce70:       [0-9a-f]*       { revbits r5, r6 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
6617     ce78:       [0-9a-f]*       { revbits r5, r6 ; lnk r15 ; prefetch_l2_fault r25 }
6618     ce80:       [0-9a-f]*       { revbits r5, r6 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
6619     ce88:       [0-9a-f]*       { revbits r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
6620     ce90:       [0-9a-f]*       { revbits r5, r6 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
6621     ce98:       [0-9a-f]*       { revbits r5, r6 ; rotli r15, r16, 5 }
6622     cea0:       [0-9a-f]*       { revbits r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 }
6623     cea8:       [0-9a-f]*       { revbits r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
6624     ceb0:       [0-9a-f]*       { revbits r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
6625     ceb8:       [0-9a-f]*       { revbits r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 }
6626     cec0:       [0-9a-f]*       { revbits r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
6627     cec8:       [0-9a-f]*       { revbits r5, r6 ; andi r15, r16, 5 ; st r25, r26 }
6628     ced0:       [0-9a-f]*       { revbits r5, r6 ; xor r15, r16, r17 ; st r25, r26 }
6629     ced8:       [0-9a-f]*       { revbits r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
6630     cee0:       [0-9a-f]*       { revbits r5, r6 ; or r15, r16, r17 ; st2 r25, r26 }
6631     cee8:       [0-9a-f]*       { revbits r5, r6 ; jr r15 ; st4 r25, r26 }
6632     cef0:       [0-9a-f]*       { revbits r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
6633     cef8:       [0-9a-f]*       { revbits r5, r6 ; v1cmpeq r15, r16, r17 }
6634     cf00:       [0-9a-f]*       { revbits r5, r6 ; v2maxsi r15, r16, 5 }
6635     cf08:       [0-9a-f]*       { revbits r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
6636     cf10:       [0-9a-f]*       { revbytes r5, r6 ; addi r15, r16, 5 ; prefetch_l3 r25 }
6637     cf18:       [0-9a-f]*       { revbytes r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
6638     cf20:       [0-9a-f]*       { revbytes r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
6639     cf28:       [0-9a-f]*       { revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
6640     cf30:       [0-9a-f]*       { revbytes r5, r6 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
6641     cf38:       [0-9a-f]*       { revbytes r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
6642     cf40:       [0-9a-f]*       { revbytes r5, r6 ; cmpne r15, r16, r17 }
6643     cf48:       [0-9a-f]*       { revbytes r5, r6 ; ill ; ld1u r25, r26 }
6644     cf50:       [0-9a-f]*       { revbytes r5, r6 ; jalr r15 ; ld1s r25, r26 }
6645     cf58:       [0-9a-f]*       { revbytes r5, r6 ; jr r15 ; ld2s r25, r26 }
6646     cf60:       [0-9a-f]*       { revbytes r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
6647     cf68:       [0-9a-f]*       { revbytes r5, r6 ; subx r15, r16, r17 ; ld r25, r26 }
6648     cf70:       [0-9a-f]*       { revbytes r5, r6 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
6649     cf78:       [0-9a-f]*       { revbytes r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 }
6650     cf80:       [0-9a-f]*       { revbytes r5, r6 ; jalrp r15 ; ld2s r25, r26 }
6651     cf88:       [0-9a-f]*       { revbytes r5, r6 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
6652     cf90:       [0-9a-f]*       { revbytes r5, r6 ; add r15, r16, r17 ; ld4s r25, r26 }
6653     cf98:       [0-9a-f]*       { revbytes r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
6654     cfa0:       [0-9a-f]*       { revbytes r5, r6 ; shl r15, r16, r17 ; ld4u r25, r26 }
6655     cfa8:       [0-9a-f]*       { revbytes r5, r6 ; lnk r15 ; ld4u r25, r26 }
6656     cfb0:       [0-9a-f]*       { revbytes r5, r6 ; move r15, r16 ; ld4u r25, r26 }
6657     cfb8:       [0-9a-f]*       { revbytes r5, r6 ; mz r15, r16, r17 ; ld4u r25, r26 }
6658     cfc0:       [0-9a-f]*       { revbytes r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
6659     cfc8:       [0-9a-f]*       { revbytes r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
6660     cfd0:       [0-9a-f]*       { revbytes r5, r6 ; prefetch_add_l1_fault r15, 5 }
6661     cfd8:       [0-9a-f]*       { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 }
6662     cfe0:       [0-9a-f]*       { revbytes r5, r6 ; nop ; prefetch_l1_fault r25 }
6663     cfe8:       [0-9a-f]*       { revbytes r5, r6 ; jalrp r15 ; prefetch_l2 r25 }
6664     cff0:       [0-9a-f]*       { revbytes r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
6665     cff8:       [0-9a-f]*       { revbytes r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 }
6666     d000:       [0-9a-f]*       { revbytes r5, r6 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
6667     d008:       [0-9a-f]*       { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
6668     d010:       [0-9a-f]*       { revbytes r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
6669     d018:       [0-9a-f]*       { revbytes r5, r6 ; shl1add r15, r16, r17 ; prefetch r25 }
6670     d020:       [0-9a-f]*       { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
6671     d028:       [0-9a-f]*       { revbytes r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
6672     d030:       [0-9a-f]*       { revbytes r5, r6 ; shli r15, r16, 5 ; st r25, r26 }
6673     d038:       [0-9a-f]*       { revbytes r5, r6 ; shrsi r15, r16, 5 ; st r25, r26 }
6674     d040:       [0-9a-f]*       { revbytes r5, r6 ; shrui r15, r16, 5 ; st2 r25, r26 }
6675     d048:       [0-9a-f]*       { revbytes r5, r6 ; shl2add r15, r16, r17 ; st r25, r26 }
6676     d050:       [0-9a-f]*       { revbytes r5, r6 ; nop ; st1 r25, r26 }
6677     d058:       [0-9a-f]*       { revbytes r5, r6 ; jalr r15 ; st2 r25, r26 }
6678     d060:       [0-9a-f]*       { revbytes r5, r6 ; cmples r15, r16, r17 ; st4 r25, r26 }
6679     d068:       [0-9a-f]*       { revbytes r5, r6 ; st_add r15, r16, 5 }
6680     d070:       [0-9a-f]*       { revbytes r5, r6 ; subx r15, r16, r17 ; prefetch_l3 r25 }
6681     d078:       [0-9a-f]*       { revbytes r5, r6 ; v2cmpeqi r15, r16, 5 }
6682     d080:       [0-9a-f]*       { revbytes r5, r6 ; xor r15, r16, r17 ; ld r25, r26 }
6683     d088:       [0-9a-f]*       { rotl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 }
6684     d090:       [0-9a-f]*       { rotl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 }
6685     d098:       [0-9a-f]*       { rotl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 }
6686     d0a0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
6687     d0a8:       [0-9a-f]*       { rotl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
6688     d0b0:       [0-9a-f]*       { rotl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 }
6689     d0b8:       [0-9a-f]*       { rotl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 }
6690     d0c0:       [0-9a-f]*       { rotl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
6691     d0c8:       [0-9a-f]*       { ctz r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 }
6692     d0d0:       [0-9a-f]*       { rotl r15, r16, r17 ; prefetch_l2 r25 }
6693     d0d8:       [0-9a-f]*       { rotl r15, r16, r17 ; info 19 ; ld4u r25, r26 }
6694     d0e0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 }
6695     d0e8:       [0-9a-f]*       { rotl r15, r16, r17 ; addxi r5, r6, 5 ; ld1s r25, r26 }
6696     d0f0:       [0-9a-f]*       { rotl r15, r16, r17 ; shl r5, r6, r7 ; ld1s r25, r26 }
6697     d0f8:       [0-9a-f]*       { rotl r15, r16, r17 ; info 19 ; ld1u r25, r26 }
6698     d100:       [0-9a-f]*       { tblidxb3 r5, r6 ; rotl r15, r16, r17 ; ld1u r25, r26 }
6699     d108:       [0-9a-f]*       { rotl r15, r16, r17 ; or r5, r6, r7 ; ld2s r25, r26 }
6700     d110:       [0-9a-f]*       { rotl r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
6701     d118:       [0-9a-f]*       { rotl r15, r16, r17 ; shrui r5, r6, 5 ; ld2u r25, r26 }
6702     d120:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 }
6703     d128:       [0-9a-f]*       { cmovnez r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 }
6704     d130:       [0-9a-f]*       { rotl r15, r16, r17 ; shl3add r5, r6, r7 ; ld4u r25, r26 }
6705     d138:       [0-9a-f]*       { rotl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 }
6706     d140:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 }
6707     d148:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
6708     d150:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 }
6709     d158:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
6710     d160:       [0-9a-f]*       { mulax r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 }
6711     d168:       [0-9a-f]*       { rotl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 }
6712     d170:       [0-9a-f]*       { rotl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
6713     d178:       [0-9a-f]*       { pcnt r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
6714     d180:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
6715     d188:       [0-9a-f]*       { rotl r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
6716     d190:       [0-9a-f]*       { rotl r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
6717     d198:       [0-9a-f]*       { rotl r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
6718     d1a0:       [0-9a-f]*       { rotl r15, r16, r17 ; prefetch_l1_fault r25 }
6719     d1a8:       [0-9a-f]*       { revbits r5, r6 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
6720     d1b0:       [0-9a-f]*       { rotl r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
6721     d1b8:       [0-9a-f]*       { rotl r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2_fault r25 }
6722     d1c0:       [0-9a-f]*       { mulx r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l3 r25 }
6723     d1c8:       [0-9a-f]*       { rotl r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
6724     d1d0:       [0-9a-f]*       { rotl r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
6725     d1d8:       [0-9a-f]*       { revbytes r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
6726     d1e0:       [0-9a-f]*       { rotl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 }
6727     d1e8:       [0-9a-f]*       { rotl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
6728     d1f0:       [0-9a-f]*       { rotl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 }
6729     d1f8:       [0-9a-f]*       { rotl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 }
6730     d200:       [0-9a-f]*       { rotl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 }
6731     d208:       [0-9a-f]*       { rotl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
6732     d210:       [0-9a-f]*       { rotl r15, r16, r17 ; shrux r5, r6, r7 }
6733     d218:       [0-9a-f]*       { rotl r15, r16, r17 ; or r5, r6, r7 ; st r25, r26 }
6734     d220:       [0-9a-f]*       { rotl r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
6735     d228:       [0-9a-f]*       { rotl r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
6736     d230:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 }
6737     d238:       [0-9a-f]*       { cmovnez r5, r6, r7 ; rotl r15, r16, r17 ; st4 r25, r26 }
6738     d240:       [0-9a-f]*       { rotl r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
6739     d248:       [0-9a-f]*       { rotl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 }
6740     d250:       [0-9a-f]*       { tblidxb1 r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
6741     d258:       [0-9a-f]*       { tblidxb3 r5, r6 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 }
6742     d260:       [0-9a-f]*       { rotl r15, r16, r17 ; v1mnz r5, r6, r7 }
6743     d268:       [0-9a-f]*       { v2mults r5, r6, r7 ; rotl r15, r16, r17 }
6744     d270:       [0-9a-f]*       { rotl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
6745     d278:       [0-9a-f]*       { rotl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 }
6746     d280:       [0-9a-f]*       { rotl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
6747     d288:       [0-9a-f]*       { rotl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
6748     d290:       [0-9a-f]*       { rotl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
6749     d298:       [0-9a-f]*       { rotl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
6750     d2a0:       [0-9a-f]*       { rotl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
6751     d2a8:       [0-9a-f]*       { rotl r5, r6, r7 ; cmpne r15, r16, r17 }
6752     d2b0:       [0-9a-f]*       { rotl r5, r6, r7 ; ill ; ld1u r25, r26 }
6753     d2b8:       [0-9a-f]*       { rotl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
6754     d2c0:       [0-9a-f]*       { rotl r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
6755     d2c8:       [0-9a-f]*       { rotl r5, r6, r7 ; and r15, r16, r17 ; ld r25, r26 }
6756     d2d0:       [0-9a-f]*       { rotl r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
6757     d2d8:       [0-9a-f]*       { rotl r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
6758     d2e0:       [0-9a-f]*       { rotl r5, r6, r7 ; nor r15, r16, r17 ; ld1u r25, r26 }
6759     d2e8:       [0-9a-f]*       { rotl r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
6760     d2f0:       [0-9a-f]*       { rotl r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
6761     d2f8:       [0-9a-f]*       { rotl r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
6762     d300:       [0-9a-f]*       { rotl r5, r6, r7 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
6763     d308:       [0-9a-f]*       { rotl r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
6764     d310:       [0-9a-f]*       { rotl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
6765     d318:       [0-9a-f]*       { rotl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
6766     d320:       [0-9a-f]*       { rotl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
6767     d328:       [0-9a-f]*       { rotl r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
6768     d330:       [0-9a-f]*       { rotl r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
6769     d338:       [0-9a-f]*       { rotl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
6770     d340:       [0-9a-f]*       { rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
6771     d348:       [0-9a-f]*       { rotl r5, r6, r7 ; nop ; prefetch_l1_fault r25 }
6772     d350:       [0-9a-f]*       { rotl r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
6773     d358:       [0-9a-f]*       { rotl r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
6774     d360:       [0-9a-f]*       { rotl r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
6775     d368:       [0-9a-f]*       { rotl r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
6776     d370:       [0-9a-f]*       { rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
6777     d378:       [0-9a-f]*       { rotl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
6778     d380:       [0-9a-f]*       { rotl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
6779     d388:       [0-9a-f]*       { rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
6780     d390:       [0-9a-f]*       { rotl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
6781     d398:       [0-9a-f]*       { rotl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
6782     d3a0:       [0-9a-f]*       { rotl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
6783     d3a8:       [0-9a-f]*       { rotl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
6784     d3b0:       [0-9a-f]*       { rotl r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
6785     d3b8:       [0-9a-f]*       { rotl r5, r6, r7 ; nop ; st1 r25, r26 }
6786     d3c0:       [0-9a-f]*       { rotl r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
6787     d3c8:       [0-9a-f]*       { rotl r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
6788     d3d0:       [0-9a-f]*       { rotl r5, r6, r7 ; st_add r15, r16, 5 }
6789     d3d8:       [0-9a-f]*       { rotl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
6790     d3e0:       [0-9a-f]*       { rotl r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
6791     d3e8:       [0-9a-f]*       { rotl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
6792     d3f0:       [0-9a-f]*       { rotli r15, r16, 5 ; addi r5, r6, 5 ; ld1s r25, r26 }
6793     d3f8:       [0-9a-f]*       { rotli r15, r16, 5 ; addxi r5, r6, 5 ; ld1u r25, r26 }
6794     d400:       [0-9a-f]*       { rotli r15, r16, 5 ; andi r5, r6, 5 ; ld1u r25, r26 }
6795     d408:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 }
6796     d410:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
6797     d418:       [0-9a-f]*       { rotli r15, r16, 5 ; cmples r5, r6, r7 ; ld4s r25, r26 }
6798     d420:       [0-9a-f]*       { rotli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch r25 }
6799     d428:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
6800     d430:       [0-9a-f]*       { ctz r5, r6 ; rotli r15, r16, 5 ; ld1s r25, r26 }
6801     d438:       [0-9a-f]*       { rotli r15, r16, 5 ; prefetch_l2 r25 }
6802     d440:       [0-9a-f]*       { rotli r15, r16, 5 ; info 19 ; ld4u r25, r26 }
6803     d448:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; ld r25, r26 }
6804     d450:       [0-9a-f]*       { rotli r15, r16, 5 ; addxi r5, r6, 5 ; ld1s r25, r26 }
6805     d458:       [0-9a-f]*       { rotli r15, r16, 5 ; shl r5, r6, r7 ; ld1s r25, r26 }
6806     d460:       [0-9a-f]*       { rotli r15, r16, 5 ; info 19 ; ld1u r25, r26 }
6807     d468:       [0-9a-f]*       { tblidxb3 r5, r6 ; rotli r15, r16, 5 ; ld1u r25, r26 }
6808     d470:       [0-9a-f]*       { rotli r15, r16, 5 ; or r5, r6, r7 ; ld2s r25, r26 }
6809     d478:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
6810     d480:       [0-9a-f]*       { rotli r15, r16, 5 ; shrui r5, r6, 5 ; ld2u r25, r26 }
6811     d488:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld4s r25, r26 }
6812     d490:       [0-9a-f]*       { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; ld4u r25, r26 }
6813     d498:       [0-9a-f]*       { rotli r15, r16, 5 ; shl3add r5, r6, r7 ; ld4u r25, r26 }
6814     d4a0:       [0-9a-f]*       { rotli r15, r16, 5 ; move r5, r6 ; ld4s r25, r26 }
6815     d4a8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld4u r25, r26 }
6816     d4b0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 }
6817     d4b8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
6818     d4c0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 }
6819     d4c8:       [0-9a-f]*       { mulax r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 }
6820     d4d0:       [0-9a-f]*       { rotli r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 }
6821     d4d8:       [0-9a-f]*       { rotli r15, r16, 5 ; nor r5, r6, r7 ; ld4u r25, r26 }
6822     d4e0:       [0-9a-f]*       { pcnt r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
6823     d4e8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
6824     d4f0:       [0-9a-f]*       { rotli r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
6825     d4f8:       [0-9a-f]*       { rotli r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch r25 }
6826     d500:       [0-9a-f]*       { rotli r15, r16, 5 ; move r5, r6 ; prefetch_l1_fault r25 }
6827     d508:       [0-9a-f]*       { rotli r15, r16, 5 ; prefetch_l1_fault r25 }
6828     d510:       [0-9a-f]*       { revbits r5, r6 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
6829     d518:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
6830     d520:       [0-9a-f]*       { rotli r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l2_fault r25 }
6831     d528:       [0-9a-f]*       { mulx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 }
6832     d530:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
6833     d538:       [0-9a-f]*       { rotli r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
6834     d540:       [0-9a-f]*       { revbytes r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
6835     d548:       [0-9a-f]*       { rotli r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l2 r25 }
6836     d550:       [0-9a-f]*       { rotli r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
6837     d558:       [0-9a-f]*       { rotli r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 }
6838     d560:       [0-9a-f]*       { rotli r15, r16, 5 ; shl3add r5, r6, r7 ; st1 r25, r26 }
6839     d568:       [0-9a-f]*       { rotli r15, r16, 5 ; shli r5, r6, 5 ; st4 r25, r26 }
6840     d570:       [0-9a-f]*       { rotli r15, r16, 5 ; shrsi r5, r6, 5 ; st4 r25, r26 }
6841     d578:       [0-9a-f]*       { rotli r15, r16, 5 ; shrux r5, r6, r7 }
6842     d580:       [0-9a-f]*       { rotli r15, r16, 5 ; or r5, r6, r7 ; st r25, r26 }
6843     d588:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
6844     d590:       [0-9a-f]*       { rotli r15, r16, 5 ; shrui r5, r6, 5 ; st1 r25, r26 }
6845     d598:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
6846     d5a0:       [0-9a-f]*       { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 }
6847     d5a8:       [0-9a-f]*       { rotli r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 }
6848     d5b0:       [0-9a-f]*       { rotli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 }
6849     d5b8:       [0-9a-f]*       { tblidxb1 r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
6850     d5c0:       [0-9a-f]*       { tblidxb3 r5, r6 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
6851     d5c8:       [0-9a-f]*       { rotli r15, r16, 5 ; v1mnz r5, r6, r7 }
6852     d5d0:       [0-9a-f]*       { v2mults r5, r6, r7 ; rotli r15, r16, 5 }
6853     d5d8:       [0-9a-f]*       { rotli r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
6854     d5e0:       [0-9a-f]*       { rotli r5, r6, 5 ; addi r15, r16, 5 ; prefetch_l3 r25 }
6855     d5e8:       [0-9a-f]*       { rotli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
6856     d5f0:       [0-9a-f]*       { rotli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
6857     d5f8:       [0-9a-f]*       { rotli r5, r6, 5 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
6858     d600:       [0-9a-f]*       { rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
6859     d608:       [0-9a-f]*       { rotli r5, r6, 5 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
6860     d610:       [0-9a-f]*       { rotli r5, r6, 5 ; cmpne r15, r16, r17 }
6861     d618:       [0-9a-f]*       { rotli r5, r6, 5 ; ill ; ld1u r25, r26 }
6862     d620:       [0-9a-f]*       { rotli r5, r6, 5 ; jalr r15 ; ld1s r25, r26 }
6863     d628:       [0-9a-f]*       { rotli r5, r6, 5 ; jr r15 ; ld2s r25, r26 }
6864     d630:       [0-9a-f]*       { rotli r5, r6, 5 ; and r15, r16, r17 ; ld r25, r26 }
6865     d638:       [0-9a-f]*       { rotli r5, r6, 5 ; subx r15, r16, r17 ; ld r25, r26 }
6866     d640:       [0-9a-f]*       { rotli r5, r6, 5 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
6867     d648:       [0-9a-f]*       { rotli r5, r6, 5 ; nor r15, r16, r17 ; ld1u r25, r26 }
6868     d650:       [0-9a-f]*       { rotli r5, r6, 5 ; jalrp r15 ; ld2s r25, r26 }
6869     d658:       [0-9a-f]*       { rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
6870     d660:       [0-9a-f]*       { rotli r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 }
6871     d668:       [0-9a-f]*       { rotli r5, r6, 5 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
6872     d670:       [0-9a-f]*       { rotli r5, r6, 5 ; shl r15, r16, r17 ; ld4u r25, r26 }
6873     d678:       [0-9a-f]*       { rotli r5, r6, 5 ; lnk r15 ; ld4u r25, r26 }
6874     d680:       [0-9a-f]*       { rotli r5, r6, 5 ; move r15, r16 ; ld4u r25, r26 }
6875     d688:       [0-9a-f]*       { rotli r5, r6, 5 ; mz r15, r16, r17 ; ld4u r25, r26 }
6876     d690:       [0-9a-f]*       { rotli r5, r6, 5 ; nor r15, r16, r17 ; prefetch r25 }
6877     d698:       [0-9a-f]*       { rotli r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 }
6878     d6a0:       [0-9a-f]*       { rotli r5, r6, 5 ; prefetch_add_l1_fault r15, 5 }
6879     d6a8:       [0-9a-f]*       { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch r25 }
6880     d6b0:       [0-9a-f]*       { rotli r5, r6, 5 ; nop ; prefetch_l1_fault r25 }
6881     d6b8:       [0-9a-f]*       { rotli r5, r6, 5 ; jalrp r15 ; prefetch_l2 r25 }
6882     d6c0:       [0-9a-f]*       { rotli r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
6883     d6c8:       [0-9a-f]*       { rotli r5, r6, 5 ; addx r15, r16, r17 ; prefetch_l3 r25 }
6884     d6d0:       [0-9a-f]*       { rotli r5, r6, 5 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
6885     d6d8:       [0-9a-f]*       { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
6886     d6e0:       [0-9a-f]*       { rotli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch r25 }
6887     d6e8:       [0-9a-f]*       { rotli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch r25 }
6888     d6f0:       [0-9a-f]*       { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
6889     d6f8:       [0-9a-f]*       { rotli r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
6890     d700:       [0-9a-f]*       { rotli r5, r6, 5 ; shli r15, r16, 5 ; st r25, r26 }
6891     d708:       [0-9a-f]*       { rotli r5, r6, 5 ; shrsi r15, r16, 5 ; st r25, r26 }
6892     d710:       [0-9a-f]*       { rotli r5, r6, 5 ; shrui r15, r16, 5 ; st2 r25, r26 }
6893     d718:       [0-9a-f]*       { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; st r25, r26 }
6894     d720:       [0-9a-f]*       { rotli r5, r6, 5 ; nop ; st1 r25, r26 }
6895     d728:       [0-9a-f]*       { rotli r5, r6, 5 ; jalr r15 ; st2 r25, r26 }
6896     d730:       [0-9a-f]*       { rotli r5, r6, 5 ; cmples r15, r16, r17 ; st4 r25, r26 }
6897     d738:       [0-9a-f]*       { rotli r5, r6, 5 ; st_add r15, r16, 5 }
6898     d740:       [0-9a-f]*       { rotli r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l3 r25 }
6899     d748:       [0-9a-f]*       { rotli r5, r6, 5 ; v2cmpeqi r15, r16, 5 }
6900     d750:       [0-9a-f]*       { rotli r5, r6, 5 ; xor r15, r16, r17 ; ld r25, r26 }
6901     d758:       [0-9a-f]*       { shl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 }
6902     d760:       [0-9a-f]*       { shl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 }
6903     d768:       [0-9a-f]*       { shl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 }
6904     d770:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
6905     d778:       [0-9a-f]*       { shl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
6906     d780:       [0-9a-f]*       { shl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 }
6907     d788:       [0-9a-f]*       { shl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 }
6908     d790:       [0-9a-f]*       { shl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
6909     d798:       [0-9a-f]*       { ctz r5, r6 ; shl r15, r16, r17 ; ld1s r25, r26 }
6910     d7a0:       [0-9a-f]*       { shl r15, r16, r17 ; prefetch_l2 r25 }
6911     d7a8:       [0-9a-f]*       { shl r15, r16, r17 ; info 19 ; ld4u r25, r26 }
6912     d7b0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 }
6913     d7b8:       [0-9a-f]*       { shl r15, r16, r17 ; addxi r5, r6, 5 ; ld1s r25, r26 }
6914     d7c0:       [0-9a-f]*       { shl r15, r16, r17 ; shl r5, r6, r7 ; ld1s r25, r26 }
6915     d7c8:       [0-9a-f]*       { shl r15, r16, r17 ; info 19 ; ld1u r25, r26 }
6916     d7d0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 }
6917     d7d8:       [0-9a-f]*       { shl r15, r16, r17 ; or r5, r6, r7 ; ld2s r25, r26 }
6918     d7e0:       [0-9a-f]*       { shl r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
6919     d7e8:       [0-9a-f]*       { shl r15, r16, r17 ; shrui r5, r6, 5 ; ld2u r25, r26 }
6920     d7f0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; ld4s r25, r26 }
6921     d7f8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
6922     d800:       [0-9a-f]*       { shl r15, r16, r17 ; shl3add r5, r6, r7 ; ld4u r25, r26 }
6923     d808:       [0-9a-f]*       { shl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 }
6924     d810:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
6925     d818:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
6926     d820:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; ld2u r25, r26 }
6927     d828:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
6928     d830:       [0-9a-f]*       { mulax r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
6929     d838:       [0-9a-f]*       { shl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 }
6930     d840:       [0-9a-f]*       { shl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
6931     d848:       [0-9a-f]*       { pcnt r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
6932     d850:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
6933     d858:       [0-9a-f]*       { shl r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
6934     d860:       [0-9a-f]*       { shl r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
6935     d868:       [0-9a-f]*       { shl r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
6936     d870:       [0-9a-f]*       { shl r15, r16, r17 ; prefetch_l1_fault r25 }
6937     d878:       [0-9a-f]*       { revbits r5, r6 ; shl r15, r16, r17 ; prefetch_l2 r25 }
6938     d880:       [0-9a-f]*       { shl r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
6939     d888:       [0-9a-f]*       { shl r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2_fault r25 }
6940     d890:       [0-9a-f]*       { mulx r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l3 r25 }
6941     d898:       [0-9a-f]*       { shl r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
6942     d8a0:       [0-9a-f]*       { shl r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
6943     d8a8:       [0-9a-f]*       { revbytes r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
6944     d8b0:       [0-9a-f]*       { shl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 }
6945     d8b8:       [0-9a-f]*       { shl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
6946     d8c0:       [0-9a-f]*       { shl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 }
6947     d8c8:       [0-9a-f]*       { shl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 }
6948     d8d0:       [0-9a-f]*       { shl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 }
6949     d8d8:       [0-9a-f]*       { shl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
6950     d8e0:       [0-9a-f]*       { shl r15, r16, r17 ; shrux r5, r6, r7 }
6951     d8e8:       [0-9a-f]*       { shl r15, r16, r17 ; or r5, r6, r7 ; st r25, r26 }
6952     d8f0:       [0-9a-f]*       { shl r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
6953     d8f8:       [0-9a-f]*       { shl r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
6954     d900:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
6955     d908:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 }
6956     d910:       [0-9a-f]*       { shl r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
6957     d918:       [0-9a-f]*       { shl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 }
6958     d920:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
6959     d928:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl r15, r16, r17 ; prefetch_l1_fault r25 }
6960     d930:       [0-9a-f]*       { shl r15, r16, r17 ; v1mnz r5, r6, r7 }
6961     d938:       [0-9a-f]*       { v2mults r5, r6, r7 ; shl r15, r16, r17 }
6962     d940:       [0-9a-f]*       { shl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
6963     d948:       [0-9a-f]*       { shl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 }
6964     d950:       [0-9a-f]*       { shl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
6965     d958:       [0-9a-f]*       { shl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
6966     d960:       [0-9a-f]*       { shl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
6967     d968:       [0-9a-f]*       { shl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
6968     d970:       [0-9a-f]*       { shl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
6969     d978:       [0-9a-f]*       { shl r5, r6, r7 ; cmpne r15, r16, r17 }
6970     d980:       [0-9a-f]*       { shl r5, r6, r7 ; ill ; ld1u r25, r26 }
6971     d988:       [0-9a-f]*       { shl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
6972     d990:       [0-9a-f]*       { shl r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
6973     d998:       [0-9a-f]*       { shl r5, r6, r7 ; and r15, r16, r17 ; ld r25, r26 }
6974     d9a0:       [0-9a-f]*       { shl r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
6975     d9a8:       [0-9a-f]*       { shl r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
6976     d9b0:       [0-9a-f]*       { shl r5, r6, r7 ; nor r15, r16, r17 ; ld1u r25, r26 }
6977     d9b8:       [0-9a-f]*       { shl r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
6978     d9c0:       [0-9a-f]*       { shl r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
6979     d9c8:       [0-9a-f]*       { shl r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
6980     d9d0:       [0-9a-f]*       { shl r5, r6, r7 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
6981     d9d8:       [0-9a-f]*       { shl r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
6982     d9e0:       [0-9a-f]*       { shl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
6983     d9e8:       [0-9a-f]*       { shl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
6984     d9f0:       [0-9a-f]*       { shl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
6985     d9f8:       [0-9a-f]*       { shl r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
6986     da00:       [0-9a-f]*       { shl r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
6987     da08:       [0-9a-f]*       { shl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
6988     da10:       [0-9a-f]*       { shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
6989     da18:       [0-9a-f]*       { shl r5, r6, r7 ; nop ; prefetch_l1_fault r25 }
6990     da20:       [0-9a-f]*       { shl r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
6991     da28:       [0-9a-f]*       { shl r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
6992     da30:       [0-9a-f]*       { shl r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
6993     da38:       [0-9a-f]*       { shl r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
6994     da40:       [0-9a-f]*       { shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
6995     da48:       [0-9a-f]*       { shl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
6996     da50:       [0-9a-f]*       { shl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
6997     da58:       [0-9a-f]*       { shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
6998     da60:       [0-9a-f]*       { shl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
6999     da68:       [0-9a-f]*       { shl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
7000     da70:       [0-9a-f]*       { shl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
7001     da78:       [0-9a-f]*       { shl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
7002     da80:       [0-9a-f]*       { shl r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
7003     da88:       [0-9a-f]*       { shl r5, r6, r7 ; nop ; st1 r25, r26 }
7004     da90:       [0-9a-f]*       { shl r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
7005     da98:       [0-9a-f]*       { shl r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
7006     daa0:       [0-9a-f]*       { shl r5, r6, r7 ; st_add r15, r16, 5 }
7007     daa8:       [0-9a-f]*       { shl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
7008     dab0:       [0-9a-f]*       { shl r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
7009     dab8:       [0-9a-f]*       { shl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
7010     dac0:       [0-9a-f]*       { shl16insli r15, r16, 4660 ; cmpltsi r5, r6, 5 }
7011     dac8:       [0-9a-f]*       { shl16insli r15, r16, 4660 ; moveli r5, 4660 }
7012     dad0:       [0-9a-f]*       { shl16insli r15, r16, 4660 ; shl3addx r5, r6, r7 }
7013     dad8:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; shl16insli r15, r16, 4660 }
7014     dae0:       [0-9a-f]*       { shl16insli r15, r16, 4660 ; v2int_l r5, r6, r7 }
7015     dae8:       [0-9a-f]*       { shl16insli r5, r6, 4660 ; addi r15, r16, 5 }
7016     daf0:       [0-9a-f]*       { shl16insli r5, r6, 4660 ; infol 4660 }
7017     daf8:       [0-9a-f]*       { shl16insli r5, r6, 4660 ; mnz r15, r16, r17 }
7018     db00:       [0-9a-f]*       { shl16insli r5, r6, 4660 ; shrui r15, r16, 5 }
7019     db08:       [0-9a-f]*       { shl16insli r5, r6, 4660 ; v1mnz r15, r16, r17 }
7020     db10:       [0-9a-f]*       { shl16insli r5, r6, 4660 ; v2sub r15, r16, r17 }
7021     db18:       [0-9a-f]*       { shl1add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
7022     db20:       [0-9a-f]*       { shl1add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
7023     db28:       [0-9a-f]*       { shl1add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
7024     db30:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
7025     db38:       [0-9a-f]*       { shl1add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7026     db40:       [0-9a-f]*       { shl1add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
7027     db48:       [0-9a-f]*       { shl1add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
7028     db50:       [0-9a-f]*       { shl1add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
7029     db58:       [0-9a-f]*       { ctz r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
7030     db60:       [0-9a-f]*       { shl1add r15, r16, r17 ; st r25, r26 }
7031     db68:       [0-9a-f]*       { shl1add r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
7032     db70:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
7033     db78:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 ; ld1s r25, r26 }
7034     db80:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
7035     db88:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 }
7036     db90:       [0-9a-f]*       { shl1add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
7037     db98:       [0-9a-f]*       { shl1add r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
7038     dba0:       [0-9a-f]*       { shl1add r15, r16, r17 ; ld2u r25, r26 }
7039     dba8:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; ld2u r25, r26 }
7040     dbb0:       [0-9a-f]*       { shl1add r15, r16, r17 ; nop ; ld4s r25, r26 }
7041     dbb8:       [0-9a-f]*       { shl1add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
7042     dbc0:       [0-9a-f]*       { shl1add r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
7043     dbc8:       [0-9a-f]*       { shl1add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
7044     dbd0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
7045     dbd8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
7046     dbe0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
7047     dbe8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
7048     dbf0:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; ld4u r25, r26 }
7049     dbf8:       [0-9a-f]*       { shl1add r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
7050     dc00:       [0-9a-f]*       { shl1add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
7051     dc08:       [0-9a-f]*       { pcnt r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
7052     dc10:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
7053     dc18:       [0-9a-f]*       { shl1add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7054     dc20:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
7055     dc28:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
7056     dc30:       [0-9a-f]*       { shl1add r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
7057     dc38:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
7058     dc40:       [0-9a-f]*       { shl1add r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
7059     dc48:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
7060     dc50:       [0-9a-f]*       { shl1add r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
7061     dc58:       [0-9a-f]*       { shl1add r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
7062     dc60:       [0-9a-f]*       { shl1add r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
7063     dc68:       [0-9a-f]*       { revbytes r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
7064     dc70:       [0-9a-f]*       { shl1add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
7065     dc78:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
7066     dc80:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
7067     dc88:       [0-9a-f]*       { shl1add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
7068     dc90:       [0-9a-f]*       { shl1add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
7069     dc98:       [0-9a-f]*       { shl1add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
7070     dca0:       [0-9a-f]*       { shl1add r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
7071     dca8:       [0-9a-f]*       { shl1add r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
7072     dcb0:       [0-9a-f]*       { shl1add r15, r16, r17 ; st1 r25, r26 }
7073     dcb8:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; st1 r25, r26 }
7074     dcc0:       [0-9a-f]*       { shl1add r15, r16, r17 ; nop ; st2 r25, r26 }
7075     dcc8:       [0-9a-f]*       { shl1add r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
7076     dcd0:       [0-9a-f]*       { shl1add r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
7077     dcd8:       [0-9a-f]*       { shl1add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
7078     dce0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
7079     dce8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 }
7080     dcf0:       [0-9a-f]*       { shl1add r15, r16, r17 ; v1mz r5, r6, r7 }
7081     dcf8:       [0-9a-f]*       { shl1add r15, r16, r17 ; v2packuc r5, r6, r7 }
7082     dd00:       [0-9a-f]*       { shl1add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
7083     dd08:       [0-9a-f]*       { shl1add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
7084     dd10:       [0-9a-f]*       { shl1add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
7085     dd18:       [0-9a-f]*       { shl1add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
7086     dd20:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpexch r15, r16, r17 }
7087     dd28:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
7088     dd30:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
7089     dd38:       [0-9a-f]*       { shl1add r5, r6, r7 ; dtlbpr r15 }
7090     dd40:       [0-9a-f]*       { shl1add r5, r6, r7 ; ill ; ld4u r25, r26 }
7091     dd48:       [0-9a-f]*       { shl1add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
7092     dd50:       [0-9a-f]*       { shl1add r5, r6, r7 ; jr r15 ; prefetch r25 }
7093     dd58:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
7094     dd60:       [0-9a-f]*       { shl1add r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
7095     dd68:       [0-9a-f]*       { shl1add r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
7096     dd70:       [0-9a-f]*       { shl1add r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
7097     dd78:       [0-9a-f]*       { shl1add r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
7098     dd80:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
7099     dd88:       [0-9a-f]*       { shl1add r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
7100     dd90:       [0-9a-f]*       { shl1add r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
7101     dd98:       [0-9a-f]*       { shl1add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
7102     dda0:       [0-9a-f]*       { shl1add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
7103     dda8:       [0-9a-f]*       { shl1add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
7104     ddb0:       [0-9a-f]*       { shl1add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
7105     ddb8:       [0-9a-f]*       { shl1add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
7106     ddc0:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
7107     ddc8:       [0-9a-f]*       { shl1add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
7108     ddd0:       [0-9a-f]*       { shl1add r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
7109     ddd8:       [0-9a-f]*       { shl1add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
7110     dde0:       [0-9a-f]*       { shl1add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
7111     dde8:       [0-9a-f]*       { shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
7112     ddf0:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
7113     ddf8:       [0-9a-f]*       { shl1add r5, r6, r7 ; prefetch_l3 r25 }
7114     de00:       [0-9a-f]*       { shl1add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
7115     de08:       [0-9a-f]*       { shl1add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
7116     de10:       [0-9a-f]*       { shl1add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
7117     de18:       [0-9a-f]*       { shl1add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
7118     de20:       [0-9a-f]*       { shl1add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
7119     de28:       [0-9a-f]*       { shl1add r5, r6, r7 ; shli r15, r16, 5 }
7120     de30:       [0-9a-f]*       { shl1add r5, r6, r7 ; shrsi r15, r16, 5 }
7121     de38:       [0-9a-f]*       { shl1add r5, r6, r7 ; shruxi r15, r16, 5 }
7122     de40:       [0-9a-f]*       { shl1add r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
7123     de48:       [0-9a-f]*       { shl1add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
7124     de50:       [0-9a-f]*       { shl1add r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
7125     de58:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
7126     de60:       [0-9a-f]*       { shl1add r5, r6, r7 ; stnt2 r15, r16 }
7127     de68:       [0-9a-f]*       { shl1add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
7128     de70:       [0-9a-f]*       { shl1add r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
7129     de78:       [0-9a-f]*       { shl1add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
7130     de80:       [0-9a-f]*       { shl1addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
7131     de88:       [0-9a-f]*       { shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
7132     de90:       [0-9a-f]*       { shl1addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
7133     de98:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
7134     dea0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7135     dea8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
7136     deb0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
7137     deb8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
7138     dec0:       [0-9a-f]*       { ctz r5, r6 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
7139     dec8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; st r25, r26 }
7140     ded0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
7141     ded8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
7142     dee0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
7143     dee8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
7144     def0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
7145     def8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
7146     df00:       [0-9a-f]*       { shl1addx r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
7147     df08:       [0-9a-f]*       { shl1addx r15, r16, r17 ; ld2u r25, r26 }
7148     df10:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
7149     df18:       [0-9a-f]*       { shl1addx r15, r16, r17 ; nop ; ld4s r25, r26 }
7150     df20:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
7151     df28:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
7152     df30:       [0-9a-f]*       { shl1addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
7153     df38:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
7154     df40:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
7155     df48:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
7156     df50:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
7157     df58:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
7158     df60:       [0-9a-f]*       { shl1addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
7159     df68:       [0-9a-f]*       { shl1addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
7160     df70:       [0-9a-f]*       { pcnt r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
7161     df78:       [0-9a-f]*       { mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
7162     df80:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7163     df88:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
7164     df90:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
7165     df98:       [0-9a-f]*       { shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
7166     dfa0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
7167     dfa8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
7168     dfb0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
7169     dfb8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
7170     dfc0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
7171     dfc8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
7172     dfd0:       [0-9a-f]*       { revbytes r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 }
7173     dfd8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
7174     dfe0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
7175     dfe8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
7176     dff0:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
7177     dff8:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
7178     e000:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
7179     e008:       [0-9a-f]*       { shl1addx r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
7180     e010:       [0-9a-f]*       { shl1addx r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
7181     e018:       [0-9a-f]*       { shl1addx r15, r16, r17 ; st1 r25, r26 }
7182     e020:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; st1 r25, r26 }
7183     e028:       [0-9a-f]*       { shl1addx r15, r16, r17 ; nop ; st2 r25, r26 }
7184     e030:       [0-9a-f]*       { shl1addx r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
7185     e038:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
7186     e040:       [0-9a-f]*       { shl1addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
7187     e048:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
7188     e050:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
7189     e058:       [0-9a-f]*       { shl1addx r15, r16, r17 ; v1mz r5, r6, r7 }
7190     e060:       [0-9a-f]*       { shl1addx r15, r16, r17 ; v2packuc r5, r6, r7 }
7191     e068:       [0-9a-f]*       { shl1addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
7192     e070:       [0-9a-f]*       { shl1addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
7193     e078:       [0-9a-f]*       { shl1addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
7194     e080:       [0-9a-f]*       { shl1addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
7195     e088:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmpexch r15, r16, r17 }
7196     e090:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
7197     e098:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
7198     e0a0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; dtlbpr r15 }
7199     e0a8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; ill ; ld4u r25, r26 }
7200     e0b0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
7201     e0b8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jr r15 ; prefetch r25 }
7202     e0c0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
7203     e0c8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
7204     e0d0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
7205     e0d8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
7206     e0e0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
7207     e0e8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
7208     e0f0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
7209     e0f8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
7210     e100:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
7211     e108:       [0-9a-f]*       { shl1addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
7212     e110:       [0-9a-f]*       { shl1addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
7213     e118:       [0-9a-f]*       { shl1addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
7214     e120:       [0-9a-f]*       { shl1addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
7215     e128:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
7216     e130:       [0-9a-f]*       { shl1addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
7217     e138:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
7218     e140:       [0-9a-f]*       { shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
7219     e148:       [0-9a-f]*       { shl1addx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
7220     e150:       [0-9a-f]*       { shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
7221     e158:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
7222     e160:       [0-9a-f]*       { shl1addx r5, r6, r7 ; prefetch_l3 r25 }
7223     e168:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
7224     e170:       [0-9a-f]*       { shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
7225     e178:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
7226     e180:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
7227     e188:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
7228     e190:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shli r15, r16, 5 }
7229     e198:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shrsi r15, r16, 5 }
7230     e1a0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shruxi r15, r16, 5 }
7231     e1a8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
7232     e1b0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
7233     e1b8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
7234     e1c0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
7235     e1c8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; stnt2 r15, r16 }
7236     e1d0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
7237     e1d8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
7238     e1e0:       [0-9a-f]*       { shl1addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
7239     e1e8:       [0-9a-f]*       { shl2add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
7240     e1f0:       [0-9a-f]*       { shl2add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
7241     e1f8:       [0-9a-f]*       { shl2add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
7242     e200:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 }
7243     e208:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7244     e210:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
7245     e218:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
7246     e220:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
7247     e228:       [0-9a-f]*       { ctz r5, r6 ; shl2add r15, r16, r17 ; ld4s r25, r26 }
7248     e230:       [0-9a-f]*       { shl2add r15, r16, r17 ; st r25, r26 }
7249     e238:       [0-9a-f]*       { shl2add r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
7250     e240:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 }
7251     e248:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
7252     e250:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
7253     e258:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld1u r25, r26 }
7254     e260:       [0-9a-f]*       { shl2add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
7255     e268:       [0-9a-f]*       { shl2add r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
7256     e270:       [0-9a-f]*       { shl2add r15, r16, r17 ; ld2u r25, r26 }
7257     e278:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; ld2u r25, r26 }
7258     e280:       [0-9a-f]*       { shl2add r15, r16, r17 ; nop ; ld4s r25, r26 }
7259     e288:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
7260     e290:       [0-9a-f]*       { shl2add r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
7261     e298:       [0-9a-f]*       { shl2add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
7262     e2a0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
7263     e2a8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
7264     e2b0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
7265     e2b8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 }
7266     e2c0:       [0-9a-f]*       { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
7267     e2c8:       [0-9a-f]*       { shl2add r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
7268     e2d0:       [0-9a-f]*       { shl2add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
7269     e2d8:       [0-9a-f]*       { pcnt r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
7270     e2e0:       [0-9a-f]*       { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
7271     e2e8:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7272     e2f0:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
7273     e2f8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
7274     e300:       [0-9a-f]*       { shl2add r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
7275     e308:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
7276     e310:       [0-9a-f]*       { shl2add r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
7277     e318:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
7278     e320:       [0-9a-f]*       { shl2add r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
7279     e328:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
7280     e330:       [0-9a-f]*       { shl2add r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
7281     e338:       [0-9a-f]*       { revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
7282     e340:       [0-9a-f]*       { shl2add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
7283     e348:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
7284     e350:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
7285     e358:       [0-9a-f]*       { shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
7286     e360:       [0-9a-f]*       { shl2add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
7287     e368:       [0-9a-f]*       { shl2add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
7288     e370:       [0-9a-f]*       { shl2add r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
7289     e378:       [0-9a-f]*       { shl2add r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
7290     e380:       [0-9a-f]*       { shl2add r15, r16, r17 ; st1 r25, r26 }
7291     e388:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; st1 r25, r26 }
7292     e390:       [0-9a-f]*       { shl2add r15, r16, r17 ; nop ; st2 r25, r26 }
7293     e398:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
7294     e3a0:       [0-9a-f]*       { shl2add r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
7295     e3a8:       [0-9a-f]*       { shl2add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
7296     e3b0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
7297     e3b8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
7298     e3c0:       [0-9a-f]*       { shl2add r15, r16, r17 ; v1mz r5, r6, r7 }
7299     e3c8:       [0-9a-f]*       { shl2add r15, r16, r17 ; v2packuc r5, r6, r7 }
7300     e3d0:       [0-9a-f]*       { shl2add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
7301     e3d8:       [0-9a-f]*       { shl2add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
7302     e3e0:       [0-9a-f]*       { shl2add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
7303     e3e8:       [0-9a-f]*       { shl2add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
7304     e3f0:       [0-9a-f]*       { shl2add r5, r6, r7 ; cmpexch r15, r16, r17 }
7305     e3f8:       [0-9a-f]*       { shl2add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
7306     e400:       [0-9a-f]*       { shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
7307     e408:       [0-9a-f]*       { shl2add r5, r6, r7 ; dtlbpr r15 }
7308     e410:       [0-9a-f]*       { shl2add r5, r6, r7 ; ill ; ld4u r25, r26 }
7309     e418:       [0-9a-f]*       { shl2add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
7310     e420:       [0-9a-f]*       { shl2add r5, r6, r7 ; jr r15 ; prefetch r25 }
7311     e428:       [0-9a-f]*       { shl2add r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
7312     e430:       [0-9a-f]*       { shl2add r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
7313     e438:       [0-9a-f]*       { shl2add r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
7314     e440:       [0-9a-f]*       { shl2add r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
7315     e448:       [0-9a-f]*       { shl2add r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
7316     e450:       [0-9a-f]*       { shl2add r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
7317     e458:       [0-9a-f]*       { shl2add r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
7318     e460:       [0-9a-f]*       { shl2add r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
7319     e468:       [0-9a-f]*       { shl2add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
7320     e470:       [0-9a-f]*       { shl2add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
7321     e478:       [0-9a-f]*       { shl2add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
7322     e480:       [0-9a-f]*       { shl2add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
7323     e488:       [0-9a-f]*       { shl2add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
7324     e490:       [0-9a-f]*       { shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
7325     e498:       [0-9a-f]*       { shl2add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
7326     e4a0:       [0-9a-f]*       { shl2add r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
7327     e4a8:       [0-9a-f]*       { shl2add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
7328     e4b0:       [0-9a-f]*       { shl2add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
7329     e4b8:       [0-9a-f]*       { shl2add r5, r6, r7 ; prefetch_l2_fault r25 }
7330     e4c0:       [0-9a-f]*       { shl2add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
7331     e4c8:       [0-9a-f]*       { shl2add r5, r6, r7 ; prefetch_l3 r25 }
7332     e4d0:       [0-9a-f]*       { shl2add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
7333     e4d8:       [0-9a-f]*       { shl2add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
7334     e4e0:       [0-9a-f]*       { shl2add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
7335     e4e8:       [0-9a-f]*       { shl2add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
7336     e4f0:       [0-9a-f]*       { shl2add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
7337     e4f8:       [0-9a-f]*       { shl2add r5, r6, r7 ; shli r15, r16, 5 }
7338     e500:       [0-9a-f]*       { shl2add r5, r6, r7 ; shrsi r15, r16, 5 }
7339     e508:       [0-9a-f]*       { shl2add r5, r6, r7 ; shruxi r15, r16, 5 }
7340     e510:       [0-9a-f]*       { shl2add r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
7341     e518:       [0-9a-f]*       { shl2add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
7342     e520:       [0-9a-f]*       { shl2add r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
7343     e528:       [0-9a-f]*       { shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
7344     e530:       [0-9a-f]*       { shl2add r5, r6, r7 ; stnt2 r15, r16 }
7345     e538:       [0-9a-f]*       { shl2add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
7346     e540:       [0-9a-f]*       { shl2add r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
7347     e548:       [0-9a-f]*       { shl2add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
7348     e550:       [0-9a-f]*       { shl2addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
7349     e558:       [0-9a-f]*       { shl2addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
7350     e560:       [0-9a-f]*       { shl2addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
7351     e568:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
7352     e570:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7353     e578:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
7354     e580:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
7355     e588:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
7356     e590:       [0-9a-f]*       { ctz r5, r6 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
7357     e598:       [0-9a-f]*       { shl2addx r15, r16, r17 ; st r25, r26 }
7358     e5a0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
7359     e5a8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
7360     e5b0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 }
7361     e5b8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
7362     e5c0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
7363     e5c8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
7364     e5d0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
7365     e5d8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; ld2u r25, r26 }
7366     e5e0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
7367     e5e8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; nop ; ld4s r25, r26 }
7368     e5f0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
7369     e5f8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
7370     e600:       [0-9a-f]*       { shl2addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
7371     e608:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
7372     e610:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 }
7373     e618:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 }
7374     e620:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
7375     e628:       [0-9a-f]*       { mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
7376     e630:       [0-9a-f]*       { shl2addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
7377     e638:       [0-9a-f]*       { shl2addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
7378     e640:       [0-9a-f]*       { pcnt r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
7379     e648:       [0-9a-f]*       { mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 }
7380     e650:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7381     e658:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
7382     e660:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
7383     e668:       [0-9a-f]*       { shl2addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
7384     e670:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
7385     e678:       [0-9a-f]*       { shl2addx r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
7386     e680:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
7387     e688:       [0-9a-f]*       { shl2addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
7388     e690:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
7389     e698:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
7390     e6a0:       [0-9a-f]*       { revbytes r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
7391     e6a8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
7392     e6b0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
7393     e6b8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
7394     e6c0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
7395     e6c8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
7396     e6d0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
7397     e6d8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
7398     e6e0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
7399     e6e8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; st1 r25, r26 }
7400     e6f0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
7401     e6f8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; nop ; st2 r25, r26 }
7402     e700:       [0-9a-f]*       { shl2addx r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
7403     e708:       [0-9a-f]*       { shl2addx r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
7404     e710:       [0-9a-f]*       { shl2addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
7405     e718:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
7406     e720:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
7407     e728:       [0-9a-f]*       { shl2addx r15, r16, r17 ; v1mz r5, r6, r7 }
7408     e730:       [0-9a-f]*       { shl2addx r15, r16, r17 ; v2packuc r5, r6, r7 }
7409     e738:       [0-9a-f]*       { shl2addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
7410     e740:       [0-9a-f]*       { shl2addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
7411     e748:       [0-9a-f]*       { shl2addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
7412     e750:       [0-9a-f]*       { shl2addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
7413     e758:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmpexch r15, r16, r17 }
7414     e760:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
7415     e768:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
7416     e770:       [0-9a-f]*       { shl2addx r5, r6, r7 ; dtlbpr r15 }
7417     e778:       [0-9a-f]*       { shl2addx r5, r6, r7 ; ill ; ld4u r25, r26 }
7418     e780:       [0-9a-f]*       { shl2addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
7419     e788:       [0-9a-f]*       { shl2addx r5, r6, r7 ; jr r15 ; prefetch r25 }
7420     e790:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
7421     e798:       [0-9a-f]*       { shl2addx r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
7422     e7a0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
7423     e7a8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
7424     e7b0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
7425     e7b8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
7426     e7c0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
7427     e7c8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
7428     e7d0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
7429     e7d8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
7430     e7e0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
7431     e7e8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
7432     e7f0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
7433     e7f8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
7434     e800:       [0-9a-f]*       { shl2addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
7435     e808:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
7436     e810:       [0-9a-f]*       { shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
7437     e818:       [0-9a-f]*       { shl2addx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
7438     e820:       [0-9a-f]*       { shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
7439     e828:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
7440     e830:       [0-9a-f]*       { shl2addx r5, r6, r7 ; prefetch_l3 r25 }
7441     e838:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
7442     e840:       [0-9a-f]*       { shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
7443     e848:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
7444     e850:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
7445     e858:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
7446     e860:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shli r15, r16, 5 }
7447     e868:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shrsi r15, r16, 5 }
7448     e870:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shruxi r15, r16, 5 }
7449     e878:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
7450     e880:       [0-9a-f]*       { shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
7451     e888:       [0-9a-f]*       { shl2addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
7452     e890:       [0-9a-f]*       { shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
7453     e898:       [0-9a-f]*       { shl2addx r5, r6, r7 ; stnt2 r15, r16 }
7454     e8a0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
7455     e8a8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
7456     e8b0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
7457     e8b8:       [0-9a-f]*       { shl3add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
7458     e8c0:       [0-9a-f]*       { shl3add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
7459     e8c8:       [0-9a-f]*       { shl3add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
7460     e8d0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl3add r15, r16, r17 ; ld4s r25, r26 }
7461     e8d8:       [0-9a-f]*       { shl3add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7462     e8e0:       [0-9a-f]*       { shl3add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
7463     e8e8:       [0-9a-f]*       { shl3add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
7464     e8f0:       [0-9a-f]*       { shl3add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
7465     e8f8:       [0-9a-f]*       { ctz r5, r6 ; shl3add r15, r16, r17 ; ld4s r25, r26 }
7466     e900:       [0-9a-f]*       { shl3add r15, r16, r17 ; st r25, r26 }
7467     e908:       [0-9a-f]*       { shl3add r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
7468     e910:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld r25, r26 }
7469     e918:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
7470     e920:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
7471     e928:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
7472     e930:       [0-9a-f]*       { shl3add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
7473     e938:       [0-9a-f]*       { shl3add r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
7474     e940:       [0-9a-f]*       { shl3add r15, r16, r17 ; ld2u r25, r26 }
7475     e948:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; ld2u r25, r26 }
7476     e950:       [0-9a-f]*       { shl3add r15, r16, r17 ; nop ; ld4s r25, r26 }
7477     e958:       [0-9a-f]*       { shl3add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
7478     e960:       [0-9a-f]*       { shl3add r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
7479     e968:       [0-9a-f]*       { shl3add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
7480     e970:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2 r25 }
7481     e978:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
7482     e980:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
7483     e988:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld4s r25, r26 }
7484     e990:       [0-9a-f]*       { mulax r5, r6, r7 ; shl3add r15, r16, r17 ; ld4u r25, r26 }
7485     e998:       [0-9a-f]*       { shl3add r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
7486     e9a0:       [0-9a-f]*       { shl3add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
7487     e9a8:       [0-9a-f]*       { pcnt r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
7488     e9b0:       [0-9a-f]*       { mulax r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
7489     e9b8:       [0-9a-f]*       { shl3add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7490     e9c0:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
7491     e9c8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 }
7492     e9d0:       [0-9a-f]*       { shl3add r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
7493     e9d8:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
7494     e9e0:       [0-9a-f]*       { shl3add r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
7495     e9e8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
7496     e9f0:       [0-9a-f]*       { shl3add r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
7497     e9f8:       [0-9a-f]*       { shl3add r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
7498     ea00:       [0-9a-f]*       { shl3add r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
7499     ea08:       [0-9a-f]*       { revbytes r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
7500     ea10:       [0-9a-f]*       { shl3add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
7501     ea18:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
7502     ea20:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
7503     ea28:       [0-9a-f]*       { shl3add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
7504     ea30:       [0-9a-f]*       { shl3add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
7505     ea38:       [0-9a-f]*       { shl3add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
7506     ea40:       [0-9a-f]*       { shl3add r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
7507     ea48:       [0-9a-f]*       { shl3add r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
7508     ea50:       [0-9a-f]*       { shl3add r15, r16, r17 ; st1 r25, r26 }
7509     ea58:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; st1 r25, r26 }
7510     ea60:       [0-9a-f]*       { shl3add r15, r16, r17 ; nop ; st2 r25, r26 }
7511     ea68:       [0-9a-f]*       { shl3add r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
7512     ea70:       [0-9a-f]*       { shl3add r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
7513     ea78:       [0-9a-f]*       { shl3add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
7514     ea80:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
7515     ea88:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
7516     ea90:       [0-9a-f]*       { shl3add r15, r16, r17 ; v1mz r5, r6, r7 }
7517     ea98:       [0-9a-f]*       { shl3add r15, r16, r17 ; v2packuc r5, r6, r7 }
7518     eaa0:       [0-9a-f]*       { shl3add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
7519     eaa8:       [0-9a-f]*       { shl3add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
7520     eab0:       [0-9a-f]*       { shl3add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
7521     eab8:       [0-9a-f]*       { shl3add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
7522     eac0:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpexch r15, r16, r17 }
7523     eac8:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
7524     ead0:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
7525     ead8:       [0-9a-f]*       { shl3add r5, r6, r7 ; dtlbpr r15 }
7526     eae0:       [0-9a-f]*       { shl3add r5, r6, r7 ; ill ; ld4u r25, r26 }
7527     eae8:       [0-9a-f]*       { shl3add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
7528     eaf0:       [0-9a-f]*       { shl3add r5, r6, r7 ; jr r15 ; prefetch r25 }
7529     eaf8:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
7530     eb00:       [0-9a-f]*       { shl3add r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
7531     eb08:       [0-9a-f]*       { shl3add r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
7532     eb10:       [0-9a-f]*       { shl3add r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
7533     eb18:       [0-9a-f]*       { shl3add r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
7534     eb20:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
7535     eb28:       [0-9a-f]*       { shl3add r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
7536     eb30:       [0-9a-f]*       { shl3add r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
7537     eb38:       [0-9a-f]*       { shl3add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
7538     eb40:       [0-9a-f]*       { shl3add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
7539     eb48:       [0-9a-f]*       { shl3add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
7540     eb50:       [0-9a-f]*       { shl3add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
7541     eb58:       [0-9a-f]*       { shl3add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
7542     eb60:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
7543     eb68:       [0-9a-f]*       { shl3add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
7544     eb70:       [0-9a-f]*       { shl3add r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
7545     eb78:       [0-9a-f]*       { shl3add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
7546     eb80:       [0-9a-f]*       { shl3add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
7547     eb88:       [0-9a-f]*       { shl3add r5, r6, r7 ; prefetch_l2_fault r25 }
7548     eb90:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
7549     eb98:       [0-9a-f]*       { shl3add r5, r6, r7 ; prefetch_l3 r25 }
7550     eba0:       [0-9a-f]*       { shl3add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
7551     eba8:       [0-9a-f]*       { shl3add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
7552     ebb0:       [0-9a-f]*       { shl3add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
7553     ebb8:       [0-9a-f]*       { shl3add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
7554     ebc0:       [0-9a-f]*       { shl3add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
7555     ebc8:       [0-9a-f]*       { shl3add r5, r6, r7 ; shli r15, r16, 5 }
7556     ebd0:       [0-9a-f]*       { shl3add r5, r6, r7 ; shrsi r15, r16, 5 }
7557     ebd8:       [0-9a-f]*       { shl3add r5, r6, r7 ; shruxi r15, r16, 5 }
7558     ebe0:       [0-9a-f]*       { shl3add r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
7559     ebe8:       [0-9a-f]*       { shl3add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
7560     ebf0:       [0-9a-f]*       { shl3add r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
7561     ebf8:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
7562     ec00:       [0-9a-f]*       { shl3add r5, r6, r7 ; stnt2 r15, r16 }
7563     ec08:       [0-9a-f]*       { shl3add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
7564     ec10:       [0-9a-f]*       { shl3add r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
7565     ec18:       [0-9a-f]*       { shl3add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
7566     ec20:       [0-9a-f]*       { shl3addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
7567     ec28:       [0-9a-f]*       { shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
7568     ec30:       [0-9a-f]*       { shl3addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
7569     ec38:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
7570     ec40:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7571     ec48:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
7572     ec50:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
7573     ec58:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
7574     ec60:       [0-9a-f]*       { ctz r5, r6 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
7575     ec68:       [0-9a-f]*       { shl3addx r15, r16, r17 ; st r25, r26 }
7576     ec70:       [0-9a-f]*       { shl3addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
7577     ec78:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld r25, r26 }
7578     ec80:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
7579     ec88:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
7580     ec90:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
7581     ec98:       [0-9a-f]*       { shl3addx r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
7582     eca0:       [0-9a-f]*       { shl3addx r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
7583     eca8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; ld2u r25, r26 }
7584     ecb0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
7585     ecb8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; nop ; ld4s r25, r26 }
7586     ecc0:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
7587     ecc8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
7588     ecd0:       [0-9a-f]*       { shl3addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
7589     ecd8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
7590     ece0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
7591     ece8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
7592     ecf0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
7593     ecf8:       [0-9a-f]*       { mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
7594     ed00:       [0-9a-f]*       { shl3addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
7595     ed08:       [0-9a-f]*       { shl3addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
7596     ed10:       [0-9a-f]*       { pcnt r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
7597     ed18:       [0-9a-f]*       { mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
7598     ed20:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
7599     ed28:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
7600     ed30:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
7601     ed38:       [0-9a-f]*       { shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
7602     ed40:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
7603     ed48:       [0-9a-f]*       { shl3addx r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
7604     ed50:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
7605     ed58:       [0-9a-f]*       { shl3addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
7606     ed60:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
7607     ed68:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
7608     ed70:       [0-9a-f]*       { revbytes r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
7609     ed78:       [0-9a-f]*       { shl3addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
7610     ed80:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
7611     ed88:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
7612     ed90:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
7613     ed98:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
7614     eda0:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
7615     eda8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
7616     edb0:       [0-9a-f]*       { shl3addx r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
7617     edb8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; st1 r25, r26 }
7618     edc0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
7619     edc8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; nop ; st2 r25, r26 }
7620     edd0:       [0-9a-f]*       { shl3addx r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
7621     edd8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
7622     ede0:       [0-9a-f]*       { shl3addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
7623     ede8:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
7624     edf0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
7625     edf8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; v1mz r5, r6, r7 }
7626     ee00:       [0-9a-f]*       { shl3addx r15, r16, r17 ; v2packuc r5, r6, r7 }
7627     ee08:       [0-9a-f]*       { shl3addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
7628     ee10:       [0-9a-f]*       { shl3addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
7629     ee18:       [0-9a-f]*       { shl3addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
7630     ee20:       [0-9a-f]*       { shl3addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
7631     ee28:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmpexch r15, r16, r17 }
7632     ee30:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
7633     ee38:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
7634     ee40:       [0-9a-f]*       { shl3addx r5, r6, r7 ; dtlbpr r15 }
7635     ee48:       [0-9a-f]*       { shl3addx r5, r6, r7 ; ill ; ld4u r25, r26 }
7636     ee50:       [0-9a-f]*       { shl3addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
7637     ee58:       [0-9a-f]*       { shl3addx r5, r6, r7 ; jr r15 ; prefetch r25 }
7638     ee60:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
7639     ee68:       [0-9a-f]*       { shl3addx r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
7640     ee70:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
7641     ee78:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
7642     ee80:       [0-9a-f]*       { shl3addx r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
7643     ee88:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
7644     ee90:       [0-9a-f]*       { shl3addx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
7645     ee98:       [0-9a-f]*       { shl3addx r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
7646     eea0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
7647     eea8:       [0-9a-f]*       { shl3addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
7648     eeb0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
7649     eeb8:       [0-9a-f]*       { shl3addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
7650     eec0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
7651     eec8:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
7652     eed0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
7653     eed8:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
7654     eee0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
7655     eee8:       [0-9a-f]*       { shl3addx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
7656     eef0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
7657     eef8:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
7658     ef00:       [0-9a-f]*       { shl3addx r5, r6, r7 ; prefetch_l3 r25 }
7659     ef08:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
7660     ef10:       [0-9a-f]*       { shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
7661     ef18:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
7662     ef20:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
7663     ef28:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
7664     ef30:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shli r15, r16, 5 }
7665     ef38:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shrsi r15, r16, 5 }
7666     ef40:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shruxi r15, r16, 5 }
7667     ef48:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
7668     ef50:       [0-9a-f]*       { shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
7669     ef58:       [0-9a-f]*       { shl3addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
7670     ef60:       [0-9a-f]*       { shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
7671     ef68:       [0-9a-f]*       { shl3addx r5, r6, r7 ; stnt2 r15, r16 }
7672     ef70:       [0-9a-f]*       { shl3addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
7673     ef78:       [0-9a-f]*       { shl3addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
7674     ef80:       [0-9a-f]*       { shl3addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
7675     ef88:       [0-9a-f]*       { shli r15, r16, 5 ; addi r5, r6, 5 ; ld4s r25, r26 }
7676     ef90:       [0-9a-f]*       { shli r15, r16, 5 ; addxi r5, r6, 5 ; ld4u r25, r26 }
7677     ef98:       [0-9a-f]*       { shli r15, r16, 5 ; andi r5, r6, 5 ; ld4u r25, r26 }
7678     efa0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 }
7679     efa8:       [0-9a-f]*       { shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch r25 }
7680     efb0:       [0-9a-f]*       { shli r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
7681     efb8:       [0-9a-f]*       { shli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
7682     efc0:       [0-9a-f]*       { shli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
7683     efc8:       [0-9a-f]*       { ctz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 }
7684     efd0:       [0-9a-f]*       { shli r15, r16, 5 ; st r25, r26 }
7685     efd8:       [0-9a-f]*       { shli r15, r16, 5 ; info 19 ; prefetch_l2 r25 }
7686     efe0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; ld r25, r26 }
7687     efe8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld1s r25, r26 }
7688     eff0:       [0-9a-f]*       { shli r15, r16, 5 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
7689     eff8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
7690     f000:       [0-9a-f]*       { shli r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 }
7691     f008:       [0-9a-f]*       { shli r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 }
7692     f010:       [0-9a-f]*       { shli r15, r16, 5 ; ld2u r25, r26 }
7693     f018:       [0-9a-f]*       { tblidxb1 r5, r6 ; shli r15, r16, 5 ; ld2u r25, r26 }
7694     f020:       [0-9a-f]*       { shli r15, r16, 5 ; nop ; ld4s r25, r26 }
7695     f028:       [0-9a-f]*       { shli r15, r16, 5 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
7696     f030:       [0-9a-f]*       { shli r15, r16, 5 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
7697     f038:       [0-9a-f]*       { shli r15, r16, 5 ; move r5, r6 ; prefetch_l1_fault r25 }
7698     f040:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 }
7699     f048:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
7700     f050:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
7701     f058:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 }
7702     f060:       [0-9a-f]*       { mulax r5, r6, r7 ; shli r15, r16, 5 ; ld4u r25, r26 }
7703     f068:       [0-9a-f]*       { shli r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 }
7704     f070:       [0-9a-f]*       { shli r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l2 r25 }
7705     f078:       [0-9a-f]*       { pcnt r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
7706     f080:       [0-9a-f]*       { mulax r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
7707     f088:       [0-9a-f]*       { shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch r25 }
7708     f090:       [0-9a-f]*       { shli r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 }
7709     f098:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
7710     f0a0:       [0-9a-f]*       { shli r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
7711     f0a8:       [0-9a-f]*       { shli r15, r16, 5 ; shl r5, r6, r7 ; prefetch_l2 r25 }
7712     f0b0:       [0-9a-f]*       { shli r15, r16, 5 ; info 19 ; prefetch_l2_fault r25 }
7713     f0b8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
7714     f0c0:       [0-9a-f]*       { shli r15, r16, 5 ; or r5, r6, r7 ; prefetch_l3 r25 }
7715     f0c8:       [0-9a-f]*       { shli r15, r16, 5 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
7716     f0d0:       [0-9a-f]*       { shli r15, r16, 5 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
7717     f0d8:       [0-9a-f]*       { revbytes r5, r6 ; shli r15, r16, 5 ; prefetch_l3 r25 }
7718     f0e0:       [0-9a-f]*       { shli r15, r16, 5 ; rotli r5, r6, 5 ; st r25, r26 }
7719     f0e8:       [0-9a-f]*       { shli r15, r16, 5 ; shl1add r5, r6, r7 ; st1 r25, r26 }
7720     f0f0:       [0-9a-f]*       { shli r15, r16, 5 ; shl2add r5, r6, r7 ; st4 r25, r26 }
7721     f0f8:       [0-9a-f]*       { shli r15, r16, 5 ; shl3addx r5, r6, r7 ; ld r25, r26 }
7722     f100:       [0-9a-f]*       { shli r15, r16, 5 ; shrs r5, r6, r7 ; ld r25, r26 }
7723     f108:       [0-9a-f]*       { shli r15, r16, 5 ; shru r5, r6, r7 ; ld1u r25, r26 }
7724     f110:       [0-9a-f]*       { shli r15, r16, 5 ; addi r5, r6, 5 ; st r25, r26 }
7725     f118:       [0-9a-f]*       { shli r15, r16, 5 ; rotl r5, r6, r7 ; st r25, r26 }
7726     f120:       [0-9a-f]*       { shli r15, r16, 5 ; st1 r25, r26 }
7727     f128:       [0-9a-f]*       { tblidxb1 r5, r6 ; shli r15, r16, 5 ; st1 r25, r26 }
7728     f130:       [0-9a-f]*       { shli r15, r16, 5 ; nop ; st2 r25, r26 }
7729     f138:       [0-9a-f]*       { shli r15, r16, 5 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
7730     f140:       [0-9a-f]*       { shli r15, r16, 5 ; shrsi r5, r6, 5 ; st4 r25, r26 }
7731     f148:       [0-9a-f]*       { shli r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l2 r25 }
7732     f150:       [0-9a-f]*       { tblidxb1 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
7733     f158:       [0-9a-f]*       { tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
7734     f160:       [0-9a-f]*       { shli r15, r16, 5 ; v1mz r5, r6, r7 }
7735     f168:       [0-9a-f]*       { shli r15, r16, 5 ; v2packuc r5, r6, r7 }
7736     f170:       [0-9a-f]*       { shli r15, r16, 5 ; xor r5, r6, r7 ; st1 r25, r26 }
7737     f178:       [0-9a-f]*       { shli r5, r6, 5 ; addi r15, r16, 5 ; st2 r25, r26 }
7738     f180:       [0-9a-f]*       { shli r5, r6, 5 ; addxi r15, r16, 5 ; st4 r25, r26 }
7739     f188:       [0-9a-f]*       { shli r5, r6, 5 ; andi r15, r16, 5 ; st4 r25, r26 }
7740     f190:       [0-9a-f]*       { shli r5, r6, 5 ; cmpexch r15, r16, r17 }
7741     f198:       [0-9a-f]*       { shli r5, r6, 5 ; cmplts r15, r16, r17 ; ld r25, r26 }
7742     f1a0:       [0-9a-f]*       { shli r5, r6, 5 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
7743     f1a8:       [0-9a-f]*       { shli r5, r6, 5 ; dtlbpr r15 }
7744     f1b0:       [0-9a-f]*       { shli r5, r6, 5 ; ill ; ld4u r25, r26 }
7745     f1b8:       [0-9a-f]*       { shli r5, r6, 5 ; jalr r15 ; ld4s r25, r26 }
7746     f1c0:       [0-9a-f]*       { shli r5, r6, 5 ; jr r15 ; prefetch r25 }
7747     f1c8:       [0-9a-f]*       { shli r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 }
7748     f1d0:       [0-9a-f]*       { shli r5, r6, 5 ; add r15, r16, r17 ; ld1s r25, r26 }
7749     f1d8:       [0-9a-f]*       { shli r5, r6, 5 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
7750     f1e0:       [0-9a-f]*       { shli r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 }
7751     f1e8:       [0-9a-f]*       { shli r5, r6, 5 ; mnz r15, r16, r17 ; ld2s r25, r26 }
7752     f1f0:       [0-9a-f]*       { shli r5, r6, 5 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
7753     f1f8:       [0-9a-f]*       { shli r5, r6, 5 ; and r15, r16, r17 ; ld4s r25, r26 }
7754     f200:       [0-9a-f]*       { shli r5, r6, 5 ; subx r15, r16, r17 ; ld4s r25, r26 }
7755     f208:       [0-9a-f]*       { shli r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
7756     f210:       [0-9a-f]*       { shli r5, r6, 5 ; lnk r15 ; prefetch_l2 r25 }
7757     f218:       [0-9a-f]*       { shli r5, r6, 5 ; move r15, r16 ; prefetch_l2 r25 }
7758     f220:       [0-9a-f]*       { shli r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 }
7759     f228:       [0-9a-f]*       { shli r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 }
7760     f230:       [0-9a-f]*       { shli r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch r25 }
7761     f238:       [0-9a-f]*       { shli r5, r6, 5 ; prefetch_add_l3_fault r15, 5 }
7762     f240:       [0-9a-f]*       { shli r5, r6, 5 ; shli r15, r16, 5 ; prefetch r25 }
7763     f248:       [0-9a-f]*       { shli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
7764     f250:       [0-9a-f]*       { shli r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
7765     f258:       [0-9a-f]*       { shli r5, r6, 5 ; prefetch_l2_fault r25 }
7766     f260:       [0-9a-f]*       { shli r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
7767     f268:       [0-9a-f]*       { shli r5, r6, 5 ; prefetch_l3 r25 }
7768     f270:       [0-9a-f]*       { shli r5, r6, 5 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
7769     f278:       [0-9a-f]*       { shli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
7770     f280:       [0-9a-f]*       { shli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
7771     f288:       [0-9a-f]*       { shli r5, r6, 5 ; shl2add r15, r16, r17 ; st r25, r26 }
7772     f290:       [0-9a-f]*       { shli r5, r6, 5 ; shl3add r15, r16, r17 ; st2 r25, r26 }
7773     f298:       [0-9a-f]*       { shli r5, r6, 5 ; shli r15, r16, 5 }
7774     f2a0:       [0-9a-f]*       { shli r5, r6, 5 ; shrsi r15, r16, 5 }
7775     f2a8:       [0-9a-f]*       { shli r5, r6, 5 ; shruxi r15, r16, 5 }
7776     f2b0:       [0-9a-f]*       { shli r5, r6, 5 ; shli r15, r16, 5 ; st r25, r26 }
7777     f2b8:       [0-9a-f]*       { shli r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 }
7778     f2c0:       [0-9a-f]*       { shli r5, r6, 5 ; lnk r15 ; st2 r25, r26 }
7779     f2c8:       [0-9a-f]*       { shli r5, r6, 5 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
7780     f2d0:       [0-9a-f]*       { shli r5, r6, 5 ; stnt2 r15, r16 }
7781     f2d8:       [0-9a-f]*       { shli r5, r6, 5 ; subx r15, r16, r17 ; st2 r25, r26 }
7782     f2e0:       [0-9a-f]*       { shli r5, r6, 5 ; v2cmpltsi r15, r16, 5 }
7783     f2e8:       [0-9a-f]*       { shli r5, r6, 5 ; xor r15, r16, r17 ; ld2u r25, r26 }
7784     f2f0:       [0-9a-f]*       { cmul r5, r6, r7 ; shlx r15, r16, r17 }
7785     f2f8:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; shlx r15, r16, r17 }
7786     f300:       [0-9a-f]*       { shlx r15, r16, r17 ; shrs r5, r6, r7 }
7787     f308:       [0-9a-f]*       { shlx r15, r16, r17 ; v1maxu r5, r6, r7 }
7788     f310:       [0-9a-f]*       { shlx r15, r16, r17 ; v2minsi r5, r6, 5 }
7789     f318:       [0-9a-f]*       { shlx r5, r6, r7 ; addxli r15, r16, 4660 }
7790     f320:       [0-9a-f]*       { shlx r5, r6, r7 ; jalrp r15 }
7791     f328:       [0-9a-f]*       { shlx r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
7792     f330:       [0-9a-f]*       { shlx r5, r6, r7 ; st1 r15, r16 }
7793     f338:       [0-9a-f]*       { shlx r5, r6, r7 ; v1shrs r15, r16, r17 }
7794     f340:       [0-9a-f]*       { shlx r5, r6, r7 ; v4int_h r15, r16, r17 }
7795     f348:       [0-9a-f]*       { cmulfr r5, r6, r7 ; shlxi r15, r16, 5 }
7796     f350:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shlxi r15, r16, 5 }
7797     f358:       [0-9a-f]*       { shlxi r15, r16, 5 ; shrux r5, r6, r7 }
7798     f360:       [0-9a-f]*       { shlxi r15, r16, 5 ; v1mnz r5, r6, r7 }
7799     f368:       [0-9a-f]*       { v2mults r5, r6, r7 ; shlxi r15, r16, 5 }
7800     f370:       [0-9a-f]*       { shlxi r5, r6, 5 ; cmpeq r15, r16, r17 }
7801     f378:       [0-9a-f]*       { shlxi r5, r6, 5 ; ld1s r15, r16 }
7802     f380:       [0-9a-f]*       { shlxi r5, r6, 5 ; or r15, r16, r17 }
7803     f388:       [0-9a-f]*       { shlxi r5, r6, 5 ; st4 r15, r16 }
7804     f390:       [0-9a-f]*       { shlxi r5, r6, 5 ; v1sub r15, r16, r17 }
7805     f398:       [0-9a-f]*       { shlxi r5, r6, 5 ; v4shlsc r15, r16, r17 }
7806     f3a0:       [0-9a-f]*       { shrs r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
7807     f3a8:       [0-9a-f]*       { shrs r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
7808     f3b0:       [0-9a-f]*       { shrs r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 }
7809     f3b8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
7810     f3c0:       [0-9a-f]*       { shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
7811     f3c8:       [0-9a-f]*       { shrs r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 }
7812     f3d0:       [0-9a-f]*       { shrs r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
7813     f3d8:       [0-9a-f]*       { shrs r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
7814     f3e0:       [0-9a-f]*       { ctz r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
7815     f3e8:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; shrs r15, r16, r17 }
7816     f3f0:       [0-9a-f]*       { shrs r15, r16, r17 ; info 19 }
7817     f3f8:       [0-9a-f]*       { pcnt r5, r6 ; shrs r15, r16, r17 ; ld r25, r26 }
7818     f400:       [0-9a-f]*       { shrs r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1s r25, r26 }
7819     f408:       [0-9a-f]*       { shrs r15, r16, r17 ; sub r5, r6, r7 ; ld1s r25, r26 }
7820     f410:       [0-9a-f]*       { mulax r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
7821     f418:       [0-9a-f]*       { shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
7822     f420:       [0-9a-f]*       { shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; ld2s r25, r26 }
7823     f428:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
7824     f430:       [0-9a-f]*       { shrs r15, r16, r17 ; addxi r5, r6, 5 ; ld4s r25, r26 }
7825     f438:       [0-9a-f]*       { shrs r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 }
7826     f440:       [0-9a-f]*       { shrs r15, r16, r17 ; info 19 ; ld4u r25, r26 }
7827     f448:       [0-9a-f]*       { tblidxb3 r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 }
7828     f450:       [0-9a-f]*       { shrs r15, r16, r17 ; move r5, r6 ; st4 r25, r26 }
7829     f458:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shrs r15, r16, r17 }
7830     f460:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
7831     f468:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
7832     f470:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
7833     f478:       [0-9a-f]*       { mulax r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
7834     f480:       [0-9a-f]*       { shrs r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 }
7835     f488:       [0-9a-f]*       { shrs r15, r16, r17 ; nor r5, r6, r7 }
7836     f490:       [0-9a-f]*       { shrs r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 }
7837     f498:       [0-9a-f]*       { revbytes r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
7838     f4a0:       [0-9a-f]*       { ctz r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
7839     f4a8:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
7840     f4b0:       [0-9a-f]*       { shrs r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1_fault r25 }
7841     f4b8:       [0-9a-f]*       { shrs r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2 r25 }
7842     f4c0:       [0-9a-f]*       { shrs r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
7843     f4c8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 }
7844     f4d0:       [0-9a-f]*       { shrs r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3 r25 }
7845     f4d8:       [0-9a-f]*       { shrs r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
7846     f4e0:       [0-9a-f]*       { shrs r15, r16, r17 ; move r5, r6 ; prefetch_l3_fault r25 }
7847     f4e8:       [0-9a-f]*       { shrs r15, r16, r17 ; prefetch_l3_fault r25 }
7848     f4f0:       [0-9a-f]*       { shrs r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 }
7849     f4f8:       [0-9a-f]*       { shrs r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 }
7850     f500:       [0-9a-f]*       { shrs r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
7851     f508:       [0-9a-f]*       { shrs r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
7852     f510:       [0-9a-f]*       { shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
7853     f518:       [0-9a-f]*       { shrs r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
7854     f520:       [0-9a-f]*       { shrs r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 }
7855     f528:       [0-9a-f]*       { shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
7856     f530:       [0-9a-f]*       { shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; st r25, r26 }
7857     f538:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
7858     f540:       [0-9a-f]*       { shrs r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 }
7859     f548:       [0-9a-f]*       { shrs r15, r16, r17 ; shl r5, r6, r7 ; st2 r25, r26 }
7860     f550:       [0-9a-f]*       { shrs r15, r16, r17 ; info 19 ; st4 r25, r26 }
7861     f558:       [0-9a-f]*       { tblidxb3 r5, r6 ; shrs r15, r16, r17 ; st4 r25, r26 }
7862     f560:       [0-9a-f]*       { shrs r15, r16, r17 ; subx r5, r6, r7 }
7863     f568:       [0-9a-f]*       { tblidxb2 r5, r6 ; shrs r15, r16, r17 ; ld r25, r26 }
7864     f570:       [0-9a-f]*       { shrs r15, r16, r17 ; v1adduc r5, r6, r7 }
7865     f578:       [0-9a-f]*       { shrs r15, r16, r17 ; v1shrui r5, r6, 5 }
7866     f580:       [0-9a-f]*       { shrs r15, r16, r17 ; v2shrs r5, r6, r7 }
7867     f588:       [0-9a-f]*       { shrs r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
7868     f590:       [0-9a-f]*       { shrs r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 }
7869     f598:       [0-9a-f]*       { shrs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
7870     f5a0:       [0-9a-f]*       { shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
7871     f5a8:       [0-9a-f]*       { shrs r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 }
7872     f5b0:       [0-9a-f]*       { shrs r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
7873     f5b8:       [0-9a-f]*       { shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
7874     f5c0:       [0-9a-f]*       { shrs r5, r6, r7 ; fetchand4 r15, r16, r17 }
7875     f5c8:       [0-9a-f]*       { shrs r5, r6, r7 ; ill ; st r25, r26 }
7876     f5d0:       [0-9a-f]*       { shrs r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
7877     f5d8:       [0-9a-f]*       { shrs r5, r6, r7 ; jr r15 ; st1 r25, r26 }
7878     f5e0:       [0-9a-f]*       { shrs r5, r6, r7 ; info 19 ; ld r25, r26 }
7879     f5e8:       [0-9a-f]*       { shrs r5, r6, r7 ; cmples r15, r16, r17 ; ld1s r25, r26 }
7880     f5f0:       [0-9a-f]*       { shrs r5, r6, r7 ; ld1u r15, r16 }
7881     f5f8:       [0-9a-f]*       { shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
7882     f600:       [0-9a-f]*       { shrs r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 }
7883     f608:       [0-9a-f]*       { shrs r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
7884     f610:       [0-9a-f]*       { shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
7885     f618:       [0-9a-f]*       { shrs r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
7886     f620:       [0-9a-f]*       { shrs r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
7887     f628:       [0-9a-f]*       { shrs r5, r6, r7 ; lnk r15 }
7888     f630:       [0-9a-f]*       { shrs r5, r6, r7 ; move r15, r16 }
7889     f638:       [0-9a-f]*       { shrs r5, r6, r7 ; mz r15, r16, r17 }
7890     f640:       [0-9a-f]*       { shrs r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 }
7891     f648:       [0-9a-f]*       { shrs r5, r6, r7 ; jrp r15 ; prefetch r25 }
7892     f650:       [0-9a-f]*       { shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
7893     f658:       [0-9a-f]*       { shrs r5, r6, r7 ; prefetch r25 }
7894     f660:       [0-9a-f]*       { shrs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
7895     f668:       [0-9a-f]*       { shrs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
7896     f670:       [0-9a-f]*       { shrs r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
7897     f678:       [0-9a-f]*       { shrs r5, r6, r7 ; prefetch_l3 r25 }
7898     f680:       [0-9a-f]*       { shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
7899     f688:       [0-9a-f]*       { shrs r5, r6, r7 ; prefetch_l3_fault r25 }
7900     f690:       [0-9a-f]*       { shrs r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 }
7901     f698:       [0-9a-f]*       { shrs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
7902     f6a0:       [0-9a-f]*       { shrs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
7903     f6a8:       [0-9a-f]*       { shrs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
7904     f6b0:       [0-9a-f]*       { shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
7905     f6b8:       [0-9a-f]*       { shrs r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
7906     f6c0:       [0-9a-f]*       { shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
7907     f6c8:       [0-9a-f]*       { shrs r5, r6, r7 ; st r25, r26 }
7908     f6d0:       [0-9a-f]*       { shrs r5, r6, r7 ; shli r15, r16, 5 ; st1 r25, r26 }
7909     f6d8:       [0-9a-f]*       { shrs r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 }
7910     f6e0:       [0-9a-f]*       { shrs r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
7911     f6e8:       [0-9a-f]*       { shrs r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 }
7912     f6f0:       [0-9a-f]*       { shrs r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
7913     f6f8:       [0-9a-f]*       { shrs r5, r6, r7 ; v2mins r15, r16, r17 }
7914     f700:       [0-9a-f]*       { shrs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
7915     f708:       [0-9a-f]*       { shrsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
7916     f710:       [0-9a-f]*       { shrsi r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 }
7917     f718:       [0-9a-f]*       { shrsi r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 }
7918     f720:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
7919     f728:       [0-9a-f]*       { shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
7920     f730:       [0-9a-f]*       { shrsi r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 }
7921     f738:       [0-9a-f]*       { shrsi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
7922     f740:       [0-9a-f]*       { shrsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
7923     f748:       [0-9a-f]*       { ctz r5, r6 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
7924     f750:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; shrsi r15, r16, 5 }
7925     f758:       [0-9a-f]*       { shrsi r15, r16, 5 ; info 19 }
7926     f760:       [0-9a-f]*       { pcnt r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 }
7927     f768:       [0-9a-f]*       { shrsi r15, r16, 5 ; cmpltu r5, r6, r7 ; ld1s r25, r26 }
7928     f770:       [0-9a-f]*       { shrsi r15, r16, 5 ; sub r5, r6, r7 ; ld1s r25, r26 }
7929     f778:       [0-9a-f]*       { mulax r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
7930     f780:       [0-9a-f]*       { shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
7931     f788:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld2s r25, r26 }
7932     f790:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
7933     f798:       [0-9a-f]*       { shrsi r15, r16, 5 ; addxi r5, r6, 5 ; ld4s r25, r26 }
7934     f7a0:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 }
7935     f7a8:       [0-9a-f]*       { shrsi r15, r16, 5 ; info 19 ; ld4u r25, r26 }
7936     f7b0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
7937     f7b8:       [0-9a-f]*       { shrsi r15, r16, 5 ; move r5, r6 ; st4 r25, r26 }
7938     f7c0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 }
7939     f7c8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
7940     f7d0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
7941     f7d8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
7942     f7e0:       [0-9a-f]*       { mulax r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
7943     f7e8:       [0-9a-f]*       { shrsi r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 }
7944     f7f0:       [0-9a-f]*       { shrsi r15, r16, 5 ; nor r5, r6, r7 }
7945     f7f8:       [0-9a-f]*       { shrsi r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 }
7946     f800:       [0-9a-f]*       { revbytes r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
7947     f808:       [0-9a-f]*       { ctz r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
7948     f810:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
7949     f818:       [0-9a-f]*       { shrsi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l1_fault r25 }
7950     f820:       [0-9a-f]*       { shrsi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2 r25 }
7951     f828:       [0-9a-f]*       { shrsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
7952     f830:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 }
7953     f838:       [0-9a-f]*       { shrsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3 r25 }
7954     f840:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
7955     f848:       [0-9a-f]*       { shrsi r15, r16, 5 ; move r5, r6 ; prefetch_l3_fault r25 }
7956     f850:       [0-9a-f]*       { shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
7957     f858:       [0-9a-f]*       { shrsi r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 }
7958     f860:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 }
7959     f868:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
7960     f870:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
7961     f878:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 }
7962     f880:       [0-9a-f]*       { shrsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 }
7963     f888:       [0-9a-f]*       { shrsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
7964     f890:       [0-9a-f]*       { shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 }
7965     f898:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; st r25, r26 }
7966     f8a0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
7967     f8a8:       [0-9a-f]*       { shrsi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 }
7968     f8b0:       [0-9a-f]*       { shrsi r15, r16, 5 ; shl r5, r6, r7 ; st2 r25, r26 }
7969     f8b8:       [0-9a-f]*       { shrsi r15, r16, 5 ; info 19 ; st4 r25, r26 }
7970     f8c0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shrsi r15, r16, 5 ; st4 r25, r26 }
7971     f8c8:       [0-9a-f]*       { shrsi r15, r16, 5 ; subx r5, r6, r7 }
7972     f8d0:       [0-9a-f]*       { tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 }
7973     f8d8:       [0-9a-f]*       { shrsi r15, r16, 5 ; v1adduc r5, r6, r7 }
7974     f8e0:       [0-9a-f]*       { shrsi r15, r16, 5 ; v1shrui r5, r6, 5 }
7975     f8e8:       [0-9a-f]*       { shrsi r15, r16, 5 ; v2shrs r5, r6, r7 }
7976     f8f0:       [0-9a-f]*       { shrsi r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 }
7977     f8f8:       [0-9a-f]*       { shrsi r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 }
7978     f900:       [0-9a-f]*       { shrsi r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 }
7979     f908:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
7980     f910:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 }
7981     f918:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 }
7982     f920:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
7983     f928:       [0-9a-f]*       { shrsi r5, r6, 5 ; fetchand4 r15, r16, r17 }
7984     f930:       [0-9a-f]*       { shrsi r5, r6, 5 ; ill ; st r25, r26 }
7985     f938:       [0-9a-f]*       { shrsi r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 }
7986     f940:       [0-9a-f]*       { shrsi r5, r6, 5 ; jr r15 ; st1 r25, r26 }
7987     f948:       [0-9a-f]*       { shrsi r5, r6, 5 ; info 19 ; ld r25, r26 }
7988     f950:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmples r15, r16, r17 ; ld1s r25, r26 }
7989     f958:       [0-9a-f]*       { shrsi r5, r6, 5 ; ld1u r15, r16 }
7990     f960:       [0-9a-f]*       { shrsi r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 }
7991     f968:       [0-9a-f]*       { shrsi r5, r6, 5 ; rotli r15, r16, 5 ; ld2s r25, r26 }
7992     f970:       [0-9a-f]*       { shrsi r5, r6, 5 ; lnk r15 ; ld2u r25, r26 }
7993     f978:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
7994     f980:       [0-9a-f]*       { shrsi r5, r6, 5 ; addxi r15, r16, 5 ; ld4u r25, r26 }
7995     f988:       [0-9a-f]*       { shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld4u r25, r26 }
7996     f990:       [0-9a-f]*       { shrsi r5, r6, 5 ; lnk r15 }
7997     f998:       [0-9a-f]*       { shrsi r5, r6, 5 ; move r15, r16 }
7998     f9a0:       [0-9a-f]*       { shrsi r5, r6, 5 ; mz r15, r16, r17 }
7999     f9a8:       [0-9a-f]*       { shrsi r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 }
8000     f9b0:       [0-9a-f]*       { shrsi r5, r6, 5 ; jrp r15 ; prefetch r25 }
8001     f9b8:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 }
8002     f9c0:       [0-9a-f]*       { shrsi r5, r6, 5 ; prefetch r25 }
8003     f9c8:       [0-9a-f]*       { shrsi r5, r6, 5 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
8004     f9d0:       [0-9a-f]*       { shrsi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
8005     f9d8:       [0-9a-f]*       { shrsi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
8006     f9e0:       [0-9a-f]*       { shrsi r5, r6, 5 ; prefetch_l3 r25 }
8007     f9e8:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
8008     f9f0:       [0-9a-f]*       { shrsi r5, r6, 5 ; prefetch_l3_fault r25 }
8009     f9f8:       [0-9a-f]*       { shrsi r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 }
8010     fa00:       [0-9a-f]*       { shrsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
8011     fa08:       [0-9a-f]*       { shrsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
8012     fa10:       [0-9a-f]*       { shrsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
8013     fa18:       [0-9a-f]*       { shrsi r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 }
8014     fa20:       [0-9a-f]*       { shrsi r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
8015     fa28:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; st r25, r26 }
8016     fa30:       [0-9a-f]*       { shrsi r5, r6, 5 ; st r25, r26 }
8017     fa38:       [0-9a-f]*       { shrsi r5, r6, 5 ; shli r15, r16, 5 ; st1 r25, r26 }
8018     fa40:       [0-9a-f]*       { shrsi r5, r6, 5 ; rotl r15, r16, r17 ; st2 r25, r26 }
8019     fa48:       [0-9a-f]*       { shrsi r5, r6, 5 ; jrp r15 ; st4 r25, r26 }
8020     fa50:       [0-9a-f]*       { shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 }
8021     fa58:       [0-9a-f]*       { shrsi r5, r6, 5 ; v1cmpeqi r15, r16, 5 }
8022     fa60:       [0-9a-f]*       { shrsi r5, r6, 5 ; v2mins r15, r16, r17 }
8023     fa68:       [0-9a-f]*       { shrsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
8024     fa70:       [0-9a-f]*       { shru r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
8025     fa78:       [0-9a-f]*       { shru r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
8026     fa80:       [0-9a-f]*       { shru r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 }
8027     fa88:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
8028     fa90:       [0-9a-f]*       { shru r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
8029     fa98:       [0-9a-f]*       { shru r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 }
8030     faa0:       [0-9a-f]*       { shru r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
8031     faa8:       [0-9a-f]*       { shru r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
8032     fab0:       [0-9a-f]*       { ctz r5, r6 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
8033     fab8:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; shru r15, r16, r17 }
8034     fac0:       [0-9a-f]*       { shru r15, r16, r17 ; info 19 }
8035     fac8:       [0-9a-f]*       { pcnt r5, r6 ; shru r15, r16, r17 ; ld r25, r26 }
8036     fad0:       [0-9a-f]*       { shru r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1s r25, r26 }
8037     fad8:       [0-9a-f]*       { shru r15, r16, r17 ; sub r5, r6, r7 ; ld1s r25, r26 }
8038     fae0:       [0-9a-f]*       { mulax r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 }
8039     fae8:       [0-9a-f]*       { shru r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
8040     faf0:       [0-9a-f]*       { shru r15, r16, r17 ; shl3addx r5, r6, r7 ; ld2s r25, r26 }
8041     faf8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
8042     fb00:       [0-9a-f]*       { shru r15, r16, r17 ; addxi r5, r6, 5 ; ld4s r25, r26 }
8043     fb08:       [0-9a-f]*       { shru r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 }
8044     fb10:       [0-9a-f]*       { shru r15, r16, r17 ; info 19 ; ld4u r25, r26 }
8045     fb18:       [0-9a-f]*       { tblidxb3 r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
8046     fb20:       [0-9a-f]*       { shru r15, r16, r17 ; move r5, r6 ; st4 r25, r26 }
8047     fb28:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shru r15, r16, r17 }
8048     fb30:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
8049     fb38:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 }
8050     fb40:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
8051     fb48:       [0-9a-f]*       { mulax r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
8052     fb50:       [0-9a-f]*       { shru r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 }
8053     fb58:       [0-9a-f]*       { shru r15, r16, r17 ; nor r5, r6, r7 }
8054     fb60:       [0-9a-f]*       { shru r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 }
8055     fb68:       [0-9a-f]*       { revbytes r5, r6 ; shru r15, r16, r17 ; prefetch r25 }
8056     fb70:       [0-9a-f]*       { ctz r5, r6 ; shru r15, r16, r17 ; prefetch r25 }
8057     fb78:       [0-9a-f]*       { tblidxb0 r5, r6 ; shru r15, r16, r17 ; prefetch r25 }
8058     fb80:       [0-9a-f]*       { shru r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1_fault r25 }
8059     fb88:       [0-9a-f]*       { shru r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2 r25 }
8060     fb90:       [0-9a-f]*       { shru r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
8061     fb98:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2_fault r25 }
8062     fba0:       [0-9a-f]*       { shru r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3 r25 }
8063     fba8:       [0-9a-f]*       { shru r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
8064     fbb0:       [0-9a-f]*       { shru r15, r16, r17 ; move r5, r6 ; prefetch_l3_fault r25 }
8065     fbb8:       [0-9a-f]*       { shru r15, r16, r17 ; prefetch_l3_fault r25 }
8066     fbc0:       [0-9a-f]*       { shru r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 }
8067     fbc8:       [0-9a-f]*       { shru r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 }
8068     fbd0:       [0-9a-f]*       { shru r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
8069     fbd8:       [0-9a-f]*       { shru r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
8070     fbe0:       [0-9a-f]*       { shru r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
8071     fbe8:       [0-9a-f]*       { shru r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
8072     fbf0:       [0-9a-f]*       { shru r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 }
8073     fbf8:       [0-9a-f]*       { shru r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
8074     fc00:       [0-9a-f]*       { shru r15, r16, r17 ; shl3addx r5, r6, r7 ; st r25, r26 }
8075     fc08:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
8076     fc10:       [0-9a-f]*       { shru r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 }
8077     fc18:       [0-9a-f]*       { shru r15, r16, r17 ; shl r5, r6, r7 ; st2 r25, r26 }
8078     fc20:       [0-9a-f]*       { shru r15, r16, r17 ; info 19 ; st4 r25, r26 }
8079     fc28:       [0-9a-f]*       { tblidxb3 r5, r6 ; shru r15, r16, r17 ; st4 r25, r26 }
8080     fc30:       [0-9a-f]*       { shru r15, r16, r17 ; subx r5, r6, r7 }
8081     fc38:       [0-9a-f]*       { tblidxb2 r5, r6 ; shru r15, r16, r17 ; ld r25, r26 }
8082     fc40:       [0-9a-f]*       { shru r15, r16, r17 ; v1adduc r5, r6, r7 }
8083     fc48:       [0-9a-f]*       { shru r15, r16, r17 ; v1shrui r5, r6, 5 }
8084     fc50:       [0-9a-f]*       { shru r15, r16, r17 ; v2shrs r5, r6, r7 }
8085     fc58:       [0-9a-f]*       { shru r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
8086     fc60:       [0-9a-f]*       { shru r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 }
8087     fc68:       [0-9a-f]*       { shru r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
8088     fc70:       [0-9a-f]*       { shru r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
8089     fc78:       [0-9a-f]*       { shru r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 }
8090     fc80:       [0-9a-f]*       { shru r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
8091     fc88:       [0-9a-f]*       { shru r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
8092     fc90:       [0-9a-f]*       { shru r5, r6, r7 ; fetchand4 r15, r16, r17 }
8093     fc98:       [0-9a-f]*       { shru r5, r6, r7 ; ill ; st r25, r26 }
8094     fca0:       [0-9a-f]*       { shru r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
8095     fca8:       [0-9a-f]*       { shru r5, r6, r7 ; jr r15 ; st1 r25, r26 }
8096     fcb0:       [0-9a-f]*       { shru r5, r6, r7 ; info 19 ; ld r25, r26 }
8097     fcb8:       [0-9a-f]*       { shru r5, r6, r7 ; cmples r15, r16, r17 ; ld1s r25, r26 }
8098     fcc0:       [0-9a-f]*       { shru r5, r6, r7 ; ld1u r15, r16 }
8099     fcc8:       [0-9a-f]*       { shru r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
8100     fcd0:       [0-9a-f]*       { shru r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 }
8101     fcd8:       [0-9a-f]*       { shru r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
8102     fce0:       [0-9a-f]*       { shru r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
8103     fce8:       [0-9a-f]*       { shru r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
8104     fcf0:       [0-9a-f]*       { shru r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
8105     fcf8:       [0-9a-f]*       { shru r5, r6, r7 ; lnk r15 }
8106     fd00:       [0-9a-f]*       { shru r5, r6, r7 ; move r15, r16 }
8107     fd08:       [0-9a-f]*       { shru r5, r6, r7 ; mz r15, r16, r17 }
8108     fd10:       [0-9a-f]*       { shru r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 }
8109     fd18:       [0-9a-f]*       { shru r5, r6, r7 ; jrp r15 ; prefetch r25 }
8110     fd20:       [0-9a-f]*       { shru r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
8111     fd28:       [0-9a-f]*       { shru r5, r6, r7 ; prefetch r25 }
8112     fd30:       [0-9a-f]*       { shru r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
8113     fd38:       [0-9a-f]*       { shru r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
8114     fd40:       [0-9a-f]*       { shru r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
8115     fd48:       [0-9a-f]*       { shru r5, r6, r7 ; prefetch_l3 r25 }
8116     fd50:       [0-9a-f]*       { shru r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
8117     fd58:       [0-9a-f]*       { shru r5, r6, r7 ; prefetch_l3_fault r25 }
8118     fd60:       [0-9a-f]*       { shru r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 }
8119     fd68:       [0-9a-f]*       { shru r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
8120     fd70:       [0-9a-f]*       { shru r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
8121     fd78:       [0-9a-f]*       { shru r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
8122     fd80:       [0-9a-f]*       { shru r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
8123     fd88:       [0-9a-f]*       { shru r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
8124     fd90:       [0-9a-f]*       { shru r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
8125     fd98:       [0-9a-f]*       { shru r5, r6, r7 ; st r25, r26 }
8126     fda0:       [0-9a-f]*       { shru r5, r6, r7 ; shli r15, r16, 5 ; st1 r25, r26 }
8127     fda8:       [0-9a-f]*       { shru r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 }
8128     fdb0:       [0-9a-f]*       { shru r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
8129     fdb8:       [0-9a-f]*       { shru r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 }
8130     fdc0:       [0-9a-f]*       { shru r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
8131     fdc8:       [0-9a-f]*       { shru r5, r6, r7 ; v2mins r15, r16, r17 }
8132     fdd0:       [0-9a-f]*       { shru r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
8133     fdd8:       [0-9a-f]*       { shrui r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
8134     fde0:       [0-9a-f]*       { shrui r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 }
8135     fde8:       [0-9a-f]*       { shrui r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 }
8136     fdf0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
8137     fdf8:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
8138     fe00:       [0-9a-f]*       { shrui r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 }
8139     fe08:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
8140     fe10:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
8141     fe18:       [0-9a-f]*       { ctz r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
8142     fe20:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; shrui r15, r16, 5 }
8143     fe28:       [0-9a-f]*       { shrui r15, r16, 5 ; info 19 }
8144     fe30:       [0-9a-f]*       { pcnt r5, r6 ; shrui r15, r16, 5 ; ld r25, r26 }
8145     fe38:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpltu r5, r6, r7 ; ld1s r25, r26 }
8146     fe40:       [0-9a-f]*       { shrui r15, r16, 5 ; sub r5, r6, r7 ; ld1s r25, r26 }
8147     fe48:       [0-9a-f]*       { mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
8148     fe50:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
8149     fe58:       [0-9a-f]*       { shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; ld2s r25, r26 }
8150     fe60:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 }
8151     fe68:       [0-9a-f]*       { shrui r15, r16, 5 ; addxi r5, r6, 5 ; ld4s r25, r26 }
8152     fe70:       [0-9a-f]*       { shrui r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 }
8153     fe78:       [0-9a-f]*       { shrui r15, r16, 5 ; info 19 ; ld4u r25, r26 }
8154     fe80:       [0-9a-f]*       { tblidxb3 r5, r6 ; shrui r15, r16, 5 ; ld4u r25, r26 }
8155     fe88:       [0-9a-f]*       { shrui r15, r16, 5 ; move r5, r6 ; st4 r25, r26 }
8156     fe90:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 }
8157     fe98:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 }
8158     fea0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
8159     fea8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
8160     feb0:       [0-9a-f]*       { mulax r5, r6, r7 ; shrui r15, r16, 5 ; st r25, r26 }
8161     feb8:       [0-9a-f]*       { shrui r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 }
8162     fec0:       [0-9a-f]*       { shrui r15, r16, 5 ; nor r5, r6, r7 }
8163     fec8:       [0-9a-f]*       { shrui r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 }
8164     fed0:       [0-9a-f]*       { revbytes r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
8165     fed8:       [0-9a-f]*       { ctz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
8166     fee0:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
8167     fee8:       [0-9a-f]*       { shrui r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l1_fault r25 }
8168     fef0:       [0-9a-f]*       { shrui r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2 r25 }
8169     fef8:       [0-9a-f]*       { shrui r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
8170     ff00:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 }
8171     ff08:       [0-9a-f]*       { shrui r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3 r25 }
8172     ff10:       [0-9a-f]*       { shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
8173     ff18:       [0-9a-f]*       { shrui r15, r16, 5 ; move r5, r6 ; prefetch_l3_fault r25 }
8174     ff20:       [0-9a-f]*       { shrui r15, r16, 5 ; prefetch_l3_fault r25 }
8175     ff28:       [0-9a-f]*       { shrui r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 }
8176     ff30:       [0-9a-f]*       { shrui r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 }
8177     ff38:       [0-9a-f]*       { shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
8178     ff40:       [0-9a-f]*       { shrui r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
8179     ff48:       [0-9a-f]*       { shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 }
8180     ff50:       [0-9a-f]*       { shrui r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 }
8181     ff58:       [0-9a-f]*       { shrui r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
8182     ff60:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 }
8183     ff68:       [0-9a-f]*       { shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; st r25, r26 }
8184     ff70:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 }
8185     ff78:       [0-9a-f]*       { shrui r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 }
8186     ff80:       [0-9a-f]*       { shrui r15, r16, 5 ; shl r5, r6, r7 ; st2 r25, r26 }
8187     ff88:       [0-9a-f]*       { shrui r15, r16, 5 ; info 19 ; st4 r25, r26 }
8188     ff90:       [0-9a-f]*       { tblidxb3 r5, r6 ; shrui r15, r16, 5 ; st4 r25, r26 }
8189     ff98:       [0-9a-f]*       { shrui r15, r16, 5 ; subx r5, r6, r7 }
8190     ffa0:       [0-9a-f]*       { tblidxb2 r5, r6 ; shrui r15, r16, 5 ; ld r25, r26 }
8191     ffa8:       [0-9a-f]*       { shrui r15, r16, 5 ; v1adduc r5, r6, r7 }
8192     ffb0:       [0-9a-f]*       { shrui r15, r16, 5 ; v1shrui r5, r6, 5 }
8193     ffb8:       [0-9a-f]*       { shrui r15, r16, 5 ; v2shrs r5, r6, r7 }
8194     ffc0:       [0-9a-f]*       { shrui r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 }
8195     ffc8:       [0-9a-f]*       { shrui r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 }
8196     ffd0:       [0-9a-f]*       { shrui r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 }
8197     ffd8:       [0-9a-f]*       { shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
8198     ffe0:       [0-9a-f]*       { shrui r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 }
8199     ffe8:       [0-9a-f]*       { shrui r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 }
8200     fff0:       [0-9a-f]*       { shrui r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
8201     fff8:       [0-9a-f]*       { shrui r5, r6, 5 ; fetchand4 r15, r16, r17 }
8202    10000:       [0-9a-f]*       { shrui r5, r6, 5 ; ill ; st r25, r26 }
8203    10008:       [0-9a-f]*       { shrui r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 }
8204    10010:       [0-9a-f]*       { shrui r5, r6, 5 ; jr r15 ; st1 r25, r26 }
8205    10018:       [0-9a-f]*       { shrui r5, r6, 5 ; info 19 ; ld r25, r26 }
8206    10020:       [0-9a-f]*       { shrui r5, r6, 5 ; cmples r15, r16, r17 ; ld1s r25, r26 }
8207    10028:       [0-9a-f]*       { shrui r5, r6, 5 ; ld1u r15, r16 }
8208    10030:       [0-9a-f]*       { shrui r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 }
8209    10038:       [0-9a-f]*       { shrui r5, r6, 5 ; rotli r15, r16, 5 ; ld2s r25, r26 }
8210    10040:       [0-9a-f]*       { shrui r5, r6, 5 ; lnk r15 ; ld2u r25, r26 }
8211    10048:       [0-9a-f]*       { shrui r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
8212    10050:       [0-9a-f]*       { shrui r5, r6, 5 ; addxi r15, r16, 5 ; ld4u r25, r26 }
8213    10058:       [0-9a-f]*       { shrui r5, r6, 5 ; sub r15, r16, r17 ; ld4u r25, r26 }
8214    10060:       [0-9a-f]*       { shrui r5, r6, 5 ; lnk r15 }
8215    10068:       [0-9a-f]*       { shrui r5, r6, 5 ; move r15, r16 }
8216    10070:       [0-9a-f]*       { shrui r5, r6, 5 ; mz r15, r16, r17 }
8217    10078:       [0-9a-f]*       { shrui r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 }
8218    10080:       [0-9a-f]*       { shrui r5, r6, 5 ; jrp r15 ; prefetch r25 }
8219    10088:       [0-9a-f]*       { shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 }
8220    10090:       [0-9a-f]*       { shrui r5, r6, 5 ; prefetch r25 }
8221    10098:       [0-9a-f]*       { shrui r5, r6, 5 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
8222    100a0:       [0-9a-f]*       { shrui r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
8223    100a8:       [0-9a-f]*       { shrui r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
8224    100b0:       [0-9a-f]*       { shrui r5, r6, 5 ; prefetch_l3 r25 }
8225    100b8:       [0-9a-f]*       { shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
8226    100c0:       [0-9a-f]*       { shrui r5, r6, 5 ; prefetch_l3_fault r25 }
8227    100c8:       [0-9a-f]*       { shrui r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 }
8228    100d0:       [0-9a-f]*       { shrui r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
8229    100d8:       [0-9a-f]*       { shrui r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
8230    100e0:       [0-9a-f]*       { shrui r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
8231    100e8:       [0-9a-f]*       { shrui r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 }
8232    100f0:       [0-9a-f]*       { shrui r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
8233    100f8:       [0-9a-f]*       { shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; st r25, r26 }
8234    10100:       [0-9a-f]*       { shrui r5, r6, 5 ; st r25, r26 }
8235    10108:       [0-9a-f]*       { shrui r5, r6, 5 ; shli r15, r16, 5 ; st1 r25, r26 }
8236    10110:       [0-9a-f]*       { shrui r5, r6, 5 ; rotl r15, r16, r17 ; st2 r25, r26 }
8237    10118:       [0-9a-f]*       { shrui r5, r6, 5 ; jrp r15 ; st4 r25, r26 }
8238    10120:       [0-9a-f]*       { shrui r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 }
8239    10128:       [0-9a-f]*       { shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 }
8240    10130:       [0-9a-f]*       { shrui r5, r6, 5 ; v2mins r15, r16, r17 }
8241    10138:       [0-9a-f]*       { shrui r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
8242    10140:       [0-9a-f]*       { crc32_8 r5, r6, r7 ; shrux r15, r16, r17 }
8243    10148:       [0-9a-f]*       { mula_hs_hu r5, r6, r7 ; shrux r15, r16, r17 }
8244    10150:       [0-9a-f]*       { shrux r15, r16, r17 ; subx r5, r6, r7 }
8245    10158:       [0-9a-f]*       { shrux r15, r16, r17 ; v1mz r5, r6, r7 }
8246    10160:       [0-9a-f]*       { shrux r15, r16, r17 ; v2packuc r5, r6, r7 }
8247    10168:       [0-9a-f]*       { shrux r5, r6, r7 ; cmples r15, r16, r17 }
8248    10170:       [0-9a-f]*       { shrux r5, r6, r7 ; ld2s r15, r16 }
8249    10178:       [0-9a-f]*       { shrux r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
8250    10180:       [0-9a-f]*       { shrux r5, r6, r7 ; stnt1 r15, r16 }
8251    10188:       [0-9a-f]*       { shrux r5, r6, r7 ; v2addsc r15, r16, r17 }
8252    10190:       [0-9a-f]*       { shrux r5, r6, r7 ; v4subsc r15, r16, r17 }
8253    10198:       [0-9a-f]*       { shruxi r15, r16, 5 ; dblalign4 r5, r6, r7 }
8254    101a0:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; shruxi r15, r16, 5 }
8255    101a8:       [0-9a-f]*       { tblidxb2 r5, r6 ; shruxi r15, r16, 5 }
8256    101b0:       [0-9a-f]*       { shruxi r15, r16, 5 ; v1shli r5, r6, 5 }
8257    101b8:       [0-9a-f]*       { v2sadu r5, r6, r7 ; shruxi r15, r16, 5 }
8258    101c0:       [0-9a-f]*       { shruxi r5, r6, 5 ; cmpltu r15, r16, r17 }
8259    101c8:       [0-9a-f]*       { shruxi r5, r6, 5 ; ld4s r15, r16 }
8260    101d0:       [0-9a-f]*       { shruxi r5, r6, 5 ; prefetch_add_l3_fault r15, 5 }
8261    101d8:       [0-9a-f]*       { shruxi r5, r6, 5 ; stnt4 r15, r16 }
8262    101e0:       [0-9a-f]*       { shruxi r5, r6, 5 ; v2cmpleu r15, r16, r17 }
8263    101e8:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; add r15, r16, r17 }
8264    101f0:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; info 19 }
8265    101f8:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
8266    10200:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; shru r15, r16, r17 }
8267    10208:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; v1minui r15, r16, 5 }
8268    10210:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; v2shrui r15, r16, 5 }
8269    10218:       [0-9a-f]*       { cmpne r5, r6, r7 ; st r15, r16 }
8270    10220:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; st r15, r16 }
8271    10228:       [0-9a-f]*       { shlxi r5, r6, 5 ; st r15, r16 }
8272    10230:       [0-9a-f]*       { v1int_l r5, r6, r7 ; st r15, r16 }
8273    10238:       [0-9a-f]*       { v2mins r5, r6, r7 ; st r15, r16 }
8274    10240:       [0-9a-f]*       { add r15, r16, r17 ; and r5, r6, r7 ; st r25, r26 }
8275    10248:       [0-9a-f]*       { add r15, r16, r17 ; shl1add r5, r6, r7 ; st r25, r26 }
8276    10250:       [0-9a-f]*       { add r5, r6, r7 ; lnk r15 ; st r25, r26 }
8277    10258:       [0-9a-f]*       { addi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st r25, r26 }
8278    10260:       [0-9a-f]*       { addi r15, r16, 5 ; shrui r5, r6, 5 ; st r25, r26 }
8279    10268:       [0-9a-f]*       { addi r5, r6, 5 ; shl r15, r16, r17 ; st r25, r26 }
8280    10270:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; st r25, r26 }
8281    10278:       [0-9a-f]*       { addx r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 }
8282    10280:       [0-9a-f]*       { addx r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
8283    10288:       [0-9a-f]*       { addxi r15, r16, 5 ; mz r5, r6, r7 ; st r25, r26 }
8284    10290:       [0-9a-f]*       { addxi r5, r6, 5 ; cmpltsi r15, r16, 5 ; st r25, r26 }
8285    10298:       [0-9a-f]*       { and r15, r16, r17 ; and r5, r6, r7 ; st r25, r26 }
8286    102a0:       [0-9a-f]*       { and r15, r16, r17 ; shl1add r5, r6, r7 ; st r25, r26 }
8287    102a8:       [0-9a-f]*       { and r5, r6, r7 ; lnk r15 ; st r25, r26 }
8288    102b0:       [0-9a-f]*       { andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st r25, r26 }
8289    102b8:       [0-9a-f]*       { andi r15, r16, 5 ; shrui r5, r6, 5 ; st r25, r26 }
8290    102c0:       [0-9a-f]*       { andi r5, r6, 5 ; shl r15, r16, r17 ; st r25, r26 }
8291    102c8:       [0-9a-f]*       { clz r5, r6 ; movei r15, 5 ; st r25, r26 }
8292    102d0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; jalr r15 ; st r25, r26 }
8293    102d8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
8294    102e0:       [0-9a-f]*       { cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
8295    102e8:       [0-9a-f]*       { cmpeq r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 }
8296    102f0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jrp r15 ; st r25, r26 }
8297    102f8:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 ; st r25, r26 }
8298    10300:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; shru r5, r6, r7 ; st r25, r26 }
8299    10308:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; rotli r15, r16, 5 ; st r25, r26 }
8300    10310:       [0-9a-f]*       { cmples r15, r16, r17 ; movei r5, 5 ; st r25, r26 }
8301    10318:       [0-9a-f]*       { cmples r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
8302    10320:       [0-9a-f]*       { cmples r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
8303    10328:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
8304    10330:       [0-9a-f]*       { cmpleu r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
8305    10338:       [0-9a-f]*       { cmplts r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
8306    10340:       [0-9a-f]*       { cmplts r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 }
8307    10348:       [0-9a-f]*       { cmplts r5, r6, r7 ; jrp r15 ; st r25, r26 }
8308    10350:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 ; st r25, r26 }
8309    10358:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; shru r5, r6, r7 ; st r25, r26 }
8310    10360:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; rotli r15, r16, 5 ; st r25, r26 }
8311    10368:       [0-9a-f]*       { cmpltu r15, r16, r17 ; movei r5, 5 ; st r25, r26 }
8312    10370:       [0-9a-f]*       { cmpltu r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
8313    10378:       [0-9a-f]*       { cmpltu r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
8314    10380:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
8315    10388:       [0-9a-f]*       { cmpne r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
8316    10390:       [0-9a-f]*       { ctz r5, r6 ; addxi r15, r16, 5 ; st r25, r26 }
8317    10398:       [0-9a-f]*       { ctz r5, r6 ; sub r15, r16, r17 ; st r25, r26 }
8318    103a0:       [0-9a-f]*       { jalr r15 ; st r25, r26 }
8319    103a8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; st r25, r26 }
8320    103b0:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; st r25, r26 }
8321    103b8:       [0-9a-f]*       { addxi r5, r6, 5 ; ill ; st r25, r26 }
8322    103c0:       [0-9a-f]*       { shl r5, r6, r7 ; ill ; st r25, r26 }
8323    103c8:       [0-9a-f]*       { info 19 ; cmples r5, r6, r7 ; st r25, r26 }
8324    103d0:       [0-9a-f]*       { info 19 ; nor r15, r16, r17 ; st r25, r26 }
8325    103d8:       [0-9a-f]*       { tblidxb1 r5, r6 ; info 19 ; st r25, r26 }
8326    103e0:       [0-9a-f]*       { mz r5, r6, r7 ; jalr r15 ; st r25, r26 }
8327    103e8:       [0-9a-f]*       { cmples r5, r6, r7 ; jalrp r15 ; st r25, r26 }
8328    103f0:       [0-9a-f]*       { shrs r5, r6, r7 ; jalrp r15 ; st r25, r26 }
8329    103f8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jr r15 ; st r25, r26 }
8330    10400:       [0-9a-f]*       { andi r5, r6, 5 ; jrp r15 ; st r25, r26 }
8331    10408:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jrp r15 ; st r25, r26 }
8332    10410:       [0-9a-f]*       { move r5, r6 ; lnk r15 ; st r25, r26 }
8333    10418:       [0-9a-f]*       { lnk r15 ; st r25, r26 }
8334    10420:       [0-9a-f]*       { revbits r5, r6 ; mnz r15, r16, r17 ; st r25, r26 }
8335    10428:       [0-9a-f]*       { mnz r5, r6, r7 ; info 19 ; st r25, r26 }
8336    10430:       [0-9a-f]*       { move r15, r16 ; cmpeq r5, r6, r7 ; st r25, r26 }
8337    10438:       [0-9a-f]*       { move r15, r16 ; shl3addx r5, r6, r7 ; st r25, r26 }
8338    10440:       [0-9a-f]*       { move r5, r6 ; nop ; st r25, r26 }
8339    10448:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; movei r15, 5 ; st r25, r26 }
8340    10450:       [0-9a-f]*       { tblidxb2 r5, r6 ; movei r15, 5 ; st r25, r26 }
8341    10458:       [0-9a-f]*       { movei r5, 5 ; shl3add r15, r16, r17 ; st r25, r26 }
8342    10460:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
8343    10468:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; st r25, r26 }
8344    10470:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; ill ; st r25, r26 }
8345    10478:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
8346    10480:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 }
8347    10488:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
8348    10490:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
8349    10498:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 }
8350    104a0:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; jrp r15 ; st r25, r26 }
8351    104a8:       [0-9a-f]*       { mulax r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
8352    104b0:       [0-9a-f]*       { mulx r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
8353    104b8:       [0-9a-f]*       { mulx r5, r6, r7 ; st r25, r26 }
8354    104c0:       [0-9a-f]*       { revbits r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
8355    104c8:       [0-9a-f]*       { mz r5, r6, r7 ; info 19 ; st r25, r26 }
8356    104d0:       [0-9a-f]*       { nop ; and r5, r6, r7 ; st r25, r26 }
8357    104d8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; nop ; st r25, r26 }
8358    104e0:       [0-9a-f]*       { nop ; shrsi r15, r16, 5 ; st r25, r26 }
8359    104e8:       [0-9a-f]*       { nor r15, r16, r17 ; movei r5, 5 ; st r25, r26 }
8360    104f0:       [0-9a-f]*       { nor r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
8361    104f8:       [0-9a-f]*       { nor r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
8362    10500:       [0-9a-f]*       { mulx r5, r6, r7 ; or r15, r16, r17 ; st r25, r26 }
8363    10508:       [0-9a-f]*       { or r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
8364    10510:       [0-9a-f]*       { pcnt r5, r6 ; addxi r15, r16, 5 ; st r25, r26 }
8365    10518:       [0-9a-f]*       { pcnt r5, r6 ; sub r15, r16, r17 ; st r25, r26 }
8366    10520:       [0-9a-f]*       { revbits r5, r6 ; shl3add r15, r16, r17 ; st r25, r26 }
8367    10528:       [0-9a-f]*       { revbytes r5, r6 ; rotl r15, r16, r17 ; st r25, r26 }
8368    10530:       [0-9a-f]*       { rotl r15, r16, r17 ; move r5, r6 ; st r25, r26 }
8369    10538:       [0-9a-f]*       { rotl r15, r16, r17 ; st r25, r26 }
8370    10540:       [0-9a-f]*       { rotl r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
8371    10548:       [0-9a-f]*       { mulax r5, r6, r7 ; rotli r15, r16, 5 ; st r25, r26 }
8372    10550:       [0-9a-f]*       { rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; st r25, r26 }
8373    10558:       [0-9a-f]*       { shl r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 }
8374    10560:       [0-9a-f]*       { shl r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
8375    10568:       [0-9a-f]*       { shl r5, r6, r7 ; jr r15 ; st r25, r26 }
8376    10570:       [0-9a-f]*       { shl1add r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
8377    10578:       [0-9a-f]*       { shl1add r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
8378    10580:       [0-9a-f]*       { shl1add r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
8379    10588:       [0-9a-f]*       { shl1addx r15, r16, r17 ; move r5, r6 ; st r25, r26 }
8380    10590:       [0-9a-f]*       { shl1addx r15, r16, r17 ; st r25, r26 }
8381    10598:       [0-9a-f]*       { shl1addx r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
8382    105a0:       [0-9a-f]*       { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
8383    105a8:       [0-9a-f]*       { shl2add r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
8384    105b0:       [0-9a-f]*       { shl2addx r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 }
8385    105b8:       [0-9a-f]*       { shl2addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
8386    105c0:       [0-9a-f]*       { shl2addx r5, r6, r7 ; jr r15 ; st r25, r26 }
8387    105c8:       [0-9a-f]*       { shl3add r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
8388    105d0:       [0-9a-f]*       { shl3add r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
8389    105d8:       [0-9a-f]*       { shl3add r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
8390    105e0:       [0-9a-f]*       { shl3addx r15, r16, r17 ; move r5, r6 ; st r25, r26 }
8391    105e8:       [0-9a-f]*       { shl3addx r15, r16, r17 ; st r25, r26 }
8392    105f0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
8393    105f8:       [0-9a-f]*       { mulax r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
8394    10600:       [0-9a-f]*       { shli r5, r6, 5 ; cmpleu r15, r16, r17 ; st r25, r26 }
8395    10608:       [0-9a-f]*       { shrs r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 }
8396    10610:       [0-9a-f]*       { shrs r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
8397    10618:       [0-9a-f]*       { shrs r5, r6, r7 ; jr r15 ; st r25, r26 }
8398    10620:       [0-9a-f]*       { shrsi r15, r16, 5 ; cmpleu r5, r6, r7 ; st r25, r26 }
8399    10628:       [0-9a-f]*       { shrsi r15, r16, 5 ; shrsi r5, r6, 5 ; st r25, r26 }
8400    10630:       [0-9a-f]*       { shrsi r5, r6, 5 ; rotl r15, r16, r17 ; st r25, r26 }
8401    10638:       [0-9a-f]*       { shru r15, r16, r17 ; move r5, r6 ; st r25, r26 }
8402    10640:       [0-9a-f]*       { shru r15, r16, r17 ; st r25, r26 }
8403    10648:       [0-9a-f]*       { shru r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
8404    10650:       [0-9a-f]*       { mulax r5, r6, r7 ; shrui r15, r16, 5 ; st r25, r26 }
8405    10658:       [0-9a-f]*       { shrui r5, r6, 5 ; cmpleu r15, r16, r17 ; st r25, r26 }
8406    10660:       [0-9a-f]*       { sub r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 }
8407    10668:       [0-9a-f]*       { sub r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
8408    10670:       [0-9a-f]*       { sub r5, r6, r7 ; jr r15 ; st r25, r26 }
8409    10678:       [0-9a-f]*       { subx r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
8410    10680:       [0-9a-f]*       { subx r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
8411    10688:       [0-9a-f]*       { subx r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
8412    10690:       [0-9a-f]*       { tblidxb0 r5, r6 ; mnz r15, r16, r17 ; st r25, r26 }
8413    10698:       [0-9a-f]*       { tblidxb1 r5, r6 ; ill ; st r25, r26 }
8414    106a0:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmples r15, r16, r17 ; st r25, r26 }
8415    106a8:       [0-9a-f]*       { tblidxb3 r5, r6 ; addi r15, r16, 5 ; st r25, r26 }
8416    106b0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shru r15, r16, r17 ; st r25, r26 }
8417    106b8:       [0-9a-f]*       { xor r15, r16, r17 ; mz r5, r6, r7 ; st r25, r26 }
8418    106c0:       [0-9a-f]*       { xor r5, r6, r7 ; cmpltsi r15, r16, 5 ; st r25, r26 }
8419    106c8:       [0-9a-f]*       { addxi r5, r6, 5 ; st1 r15, r16 }
8420    106d0:       [0-9a-f]*       { fdouble_unpack_max r5, r6, r7 ; st1 r15, r16 }
8421    106d8:       [0-9a-f]*       { nop ; st1 r15, r16 }
8422    106e0:       [0-9a-f]*       { v1cmpeqi r5, r6, 5 ; st1 r15, r16 }
8423    106e8:       [0-9a-f]*       { v2addi r5, r6, 5 ; st1 r15, r16 }
8424    106f0:       [0-9a-f]*       { v2sub r5, r6, r7 ; st1 r15, r16 }
8425    106f8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
8426    10700:       [0-9a-f]*       { add r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 }
8427    10708:       [0-9a-f]*       { add r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 }
8428    10710:       [0-9a-f]*       { addi r15, r16, 5 ; nop ; st1 r25, r26 }
8429    10718:       [0-9a-f]*       { addi r5, r6, 5 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
8430    10720:       [0-9a-f]*       { addx r15, r16, r17 ; andi r5, r6, 5 ; st1 r25, r26 }
8431    10728:       [0-9a-f]*       { addx r15, r16, r17 ; shl1addx r5, r6, r7 ; st1 r25, r26 }
8432    10730:       [0-9a-f]*       { addx r5, r6, r7 ; mnz r15, r16, r17 ; st1 r25, r26 }
8433    10738:       [0-9a-f]*       { addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
8434    10740:       [0-9a-f]*       { addxi r15, r16, 5 ; sub r5, r6, r7 ; st1 r25, r26 }
8435    10748:       [0-9a-f]*       { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st1 r25, r26 }
8436    10750:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
8437    10758:       [0-9a-f]*       { and r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 }
8438    10760:       [0-9a-f]*       { and r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 }
8439    10768:       [0-9a-f]*       { andi r15, r16, 5 ; nop ; st1 r25, r26 }
8440    10770:       [0-9a-f]*       { andi r5, r6, 5 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
8441    10778:       [0-9a-f]*       { clz r5, r6 ; andi r15, r16, 5 ; st1 r25, r26 }
8442    10780:       [0-9a-f]*       { clz r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 }
8443    10788:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; st1 r25, r26 }
8444    10790:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 }
8445    10798:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 }
8446    107a0:       [0-9a-f]*       { cmpeq r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
8447    107a8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
8448    107b0:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 }
8449    107b8:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpltsi r15, r16, 5 ; st1 r25, r26 }
8450    107c0:       [0-9a-f]*       { cmples r15, r16, r17 ; and r5, r6, r7 ; st1 r25, r26 }
8451    107c8:       [0-9a-f]*       { cmples r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
8452    107d0:       [0-9a-f]*       { cmples r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
8453    107d8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
8454    107e0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
8455    107e8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 }
8456    107f0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
8457    107f8:       [0-9a-f]*       { cmplts r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
8458    10800:       [0-9a-f]*       { cmplts r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
8459    10808:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 }
8460    10810:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpltsi r15, r16, 5 ; st1 r25, r26 }
8461    10818:       [0-9a-f]*       { cmpltu r15, r16, r17 ; and r5, r6, r7 ; st1 r25, r26 }
8462    10820:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
8463    10828:       [0-9a-f]*       { cmpltu r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
8464    10830:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
8465    10838:       [0-9a-f]*       { cmpne r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
8466    10840:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 }
8467    10848:       [0-9a-f]*       { ctz r5, r6 ; movei r15, 5 ; st1 r25, r26 }
8468    10850:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; st1 r25, r26 }
8469    10858:       [0-9a-f]*       { mz r15, r16, r17 ; st1 r25, r26 }
8470    10860:       [0-9a-f]*       { subx r15, r16, r17 ; st1 r25, r26 }
8471    10868:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; st1 r25, r26 }
8472    10870:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; ill ; st1 r25, r26 }
8473    10878:       [0-9a-f]*       { info 19 ; add r5, r6, r7 ; st1 r25, r26 }
8474    10880:       [0-9a-f]*       { info 19 ; mnz r15, r16, r17 ; st1 r25, r26 }
8475    10888:       [0-9a-f]*       { info 19 ; shl3add r15, r16, r17 ; st1 r25, r26 }
8476    10890:       [0-9a-f]*       { cmpltu r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
8477    10898:       [0-9a-f]*       { sub r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
8478    108a0:       [0-9a-f]*       { mulax r5, r6, r7 ; jalrp r15 ; st1 r25, r26 }
8479    108a8:       [0-9a-f]*       { cmpeq r5, r6, r7 ; jr r15 ; st1 r25, r26 }
8480    108b0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; jr r15 ; st1 r25, r26 }
8481    108b8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
8482    108c0:       [0-9a-f]*       { addxi r5, r6, 5 ; lnk r15 ; st1 r25, r26 }
8483    108c8:       [0-9a-f]*       { shl r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
8484    108d0:       [0-9a-f]*       { mnz r15, r16, r17 ; info 19 ; st1 r25, r26 }
8485    108d8:       [0-9a-f]*       { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; st1 r25, r26 }
8486    108e0:       [0-9a-f]*       { mnz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
8487    108e8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
8488    108f0:       [0-9a-f]*       { move r5, r6 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
8489    108f8:       [0-9a-f]*       { movei r15, 5 ; add r5, r6, r7 ; st1 r25, r26 }
8490    10900:       [0-9a-f]*       { revbytes r5, r6 ; movei r15, 5 ; st1 r25, r26 }
8491    10908:       [0-9a-f]*       { movei r5, 5 ; jalr r15 ; st1 r25, r26 }
8492    10910:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
8493    10918:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 }
8494    10920:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 }
8495    10928:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; st1 r25, r26 }
8496    10930:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st1 r25, r26 }
8497    10938:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; st1 r25, r26 }
8498    10940:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; ill ; st1 r25, r26 }
8499    10948:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
8500    10950:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
8501    10958:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
8502    10960:       [0-9a-f]*       { mulax r5, r6, r7 ; shl2add r15, r16, r17 ; st1 r25, r26 }
8503    10968:       [0-9a-f]*       { mulx r5, r6, r7 ; nor r15, r16, r17 ; st1 r25, r26 }
8504    10970:       [0-9a-f]*       { mz r15, r16, r17 ; info 19 ; st1 r25, r26 }
8505    10978:       [0-9a-f]*       { tblidxb3 r5, r6 ; mz r15, r16, r17 ; st1 r25, r26 }
8506    10980:       [0-9a-f]*       { mz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
8507    10988:       [0-9a-f]*       { nop ; cmpne r5, r6, r7 ; st1 r25, r26 }
8508    10990:       [0-9a-f]*       { nop ; rotli r5, r6, 5 ; st1 r25, r26 }
8509    10998:       [0-9a-f]*       { nor r15, r16, r17 ; and r5, r6, r7 ; st1 r25, r26 }
8510    109a0:       [0-9a-f]*       { nor r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
8511    109a8:       [0-9a-f]*       { nor r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
8512    109b0:       [0-9a-f]*       { or r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
8513    109b8:       [0-9a-f]*       { or r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
8514    109c0:       [0-9a-f]*       { or r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 }
8515    109c8:       [0-9a-f]*       { pcnt r5, r6 ; movei r15, 5 ; st1 r25, r26 }
8516    109d0:       [0-9a-f]*       { revbits r5, r6 ; jalr r15 ; st1 r25, r26 }
8517    109d8:       [0-9a-f]*       { revbytes r5, r6 ; cmplts r15, r16, r17 ; st1 r25, r26 }
8518    109e0:       [0-9a-f]*       { rotl r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
8519    109e8:       [0-9a-f]*       { rotl r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 }
8520    109f0:       [0-9a-f]*       { rotl r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
8521    109f8:       [0-9a-f]*       { rotli r15, r16, 5 ; cmplts r5, r6, r7 ; st1 r25, r26 }
8522    10a00:       [0-9a-f]*       { rotli r15, r16, 5 ; shru r5, r6, r7 ; st1 r25, r26 }
8523    10a08:       [0-9a-f]*       { rotli r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 }
8524    10a10:       [0-9a-f]*       { shl r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
8525    10a18:       [0-9a-f]*       { shl r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
8526    10a20:       [0-9a-f]*       { shl r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
8527    10a28:       [0-9a-f]*       { mulx r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 }
8528    10a30:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
8529    10a38:       [0-9a-f]*       { shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
8530    10a40:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 }
8531    10a48:       [0-9a-f]*       { shl1addx r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
8532    10a50:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmplts r5, r6, r7 ; st1 r25, r26 }
8533    10a58:       [0-9a-f]*       { shl2add r15, r16, r17 ; shru r5, r6, r7 ; st1 r25, r26 }
8534    10a60:       [0-9a-f]*       { shl2add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
8535    10a68:       [0-9a-f]*       { shl2addx r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
8536    10a70:       [0-9a-f]*       { shl2addx r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
8537    10a78:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
8538    10a80:       [0-9a-f]*       { mulx r5, r6, r7 ; shl3add r15, r16, r17 ; st1 r25, r26 }
8539    10a88:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
8540    10a90:       [0-9a-f]*       { shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
8541    10a98:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 }
8542    10aa0:       [0-9a-f]*       { shl3addx r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
8543    10aa8:       [0-9a-f]*       { shli r15, r16, 5 ; cmplts r5, r6, r7 ; st1 r25, r26 }
8544    10ab0:       [0-9a-f]*       { shli r15, r16, 5 ; shru r5, r6, r7 ; st1 r25, r26 }
8545    10ab8:       [0-9a-f]*       { shli r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 }
8546    10ac0:       [0-9a-f]*       { shrs r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
8547    10ac8:       [0-9a-f]*       { shrs r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
8548    10ad0:       [0-9a-f]*       { shrs r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
8549    10ad8:       [0-9a-f]*       { mulx r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
8550    10ae0:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmplts r15, r16, r17 ; st1 r25, r26 }
8551    10ae8:       [0-9a-f]*       { shru r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
8552    10af0:       [0-9a-f]*       { shru r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 }
8553    10af8:       [0-9a-f]*       { shru r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
8554    10b00:       [0-9a-f]*       { shrui r15, r16, 5 ; cmplts r5, r6, r7 ; st1 r25, r26 }
8555    10b08:       [0-9a-f]*       { shrui r15, r16, 5 ; shru r5, r6, r7 ; st1 r25, r26 }
8556    10b10:       [0-9a-f]*       { shrui r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 }
8557    10b18:       [0-9a-f]*       { sub r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
8558    10b20:       [0-9a-f]*       { sub r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
8559    10b28:       [0-9a-f]*       { sub r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
8560    10b30:       [0-9a-f]*       { mulx r5, r6, r7 ; subx r15, r16, r17 ; st1 r25, r26 }
8561    10b38:       [0-9a-f]*       { subx r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
8562    10b40:       [0-9a-f]*       { tblidxb0 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 }
8563    10b48:       [0-9a-f]*       { tblidxb0 r5, r6 ; sub r15, r16, r17 ; st1 r25, r26 }
8564    10b50:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; st1 r25, r26 }
8565    10b58:       [0-9a-f]*       { tblidxb2 r5, r6 ; rotl r15, r16, r17 ; st1 r25, r26 }
8566    10b60:       [0-9a-f]*       { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; st1 r25, r26 }
8567    10b68:       [0-9a-f]*       { xor r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
8568    10b70:       [0-9a-f]*       { xor r15, r16, r17 ; sub r5, r6, r7 ; st1 r25, r26 }
8569    10b78:       [0-9a-f]*       { xor r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 }
8570    10b80:       [0-9a-f]*       { cmula r5, r6, r7 ; st1_add r15, r16, 5 }
8571    10b88:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; st1_add r15, r16, 5 }
8572    10b90:       [0-9a-f]*       { shrsi r5, r6, 5 ; st1_add r15, r16, 5 }
8573    10b98:       [0-9a-f]*       { v1maxui r5, r6, 5 ; st1_add r15, r16, 5 }
8574    10ba0:       [0-9a-f]*       { v2mnz r5, r6, r7 ; st1_add r15, r16, 5 }
8575    10ba8:       [0-9a-f]*       { addxsc r5, r6, r7 ; st2 r15, r16 }
8576    10bb0:       [0-9a-f]*       { st2 r15, r16 }
8577    10bb8:       [0-9a-f]*       { or r5, r6, r7 ; st2 r15, r16 }
8578    10bc0:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; st2 r15, r16 }
8579    10bc8:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; st2 r15, r16 }
8580    10bd0:       [0-9a-f]*       { v4add r5, r6, r7 ; st2 r15, r16 }
8581    10bd8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 }
8582    10be0:       [0-9a-f]*       { add r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
8583    10be8:       [0-9a-f]*       { add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
8584    10bf0:       [0-9a-f]*       { addi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 }
8585    10bf8:       [0-9a-f]*       { addi r5, r6, 5 ; st2 r25, r26 }
8586    10c00:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
8587    10c08:       [0-9a-f]*       { addx r15, r16, r17 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
8588    10c10:       [0-9a-f]*       { addx r5, r6, r7 ; movei r15, 5 ; st2 r25, r26 }
8589    10c18:       [0-9a-f]*       { ctz r5, r6 ; addxi r15, r16, 5 ; st2 r25, r26 }
8590    10c20:       [0-9a-f]*       { tblidxb0 r5, r6 ; addxi r15, r16, 5 ; st2 r25, r26 }
8591    10c28:       [0-9a-f]*       { addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 }
8592    10c30:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
8593    10c38:       [0-9a-f]*       { and r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
8594    10c40:       [0-9a-f]*       { and r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
8595    10c48:       [0-9a-f]*       { andi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 }
8596    10c50:       [0-9a-f]*       { andi r5, r6, 5 ; st2 r25, r26 }
8597    10c58:       [0-9a-f]*       { clz r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 }
8598    10c60:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 }
8599    10c68:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
8600    10c70:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
8601    10c78:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
8602    10c80:       [0-9a-f]*       { cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; st2 r25, r26 }
8603    10c88:       [0-9a-f]*       { cmpeq r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 }
8604    10c90:       [0-9a-f]*       { cmpeqi r15, r16, 5 ; nor r5, r6, r7 ; st2 r25, r26 }
8605    10c98:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; cmpne r15, r16, r17 ; st2 r25, r26 }
8606    10ca0:       [0-9a-f]*       { clz r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 }
8607    10ca8:       [0-9a-f]*       { cmples r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
8608    10cb0:       [0-9a-f]*       { cmples r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
8609    10cb8:       [0-9a-f]*       { cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; st2 r25, r26 }
8610    10cc0:       [0-9a-f]*       { cmpleu r15, r16, r17 ; subx r5, r6, r7 ; st2 r25, r26 }
8611    10cc8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
8612    10cd0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 }
8613    10cd8:       [0-9a-f]*       { cmplts r5, r6, r7 ; addxi r15, r16, 5 ; st2 r25, r26 }
8614    10ce0:       [0-9a-f]*       { cmplts r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 }
8615    10ce8:       [0-9a-f]*       { cmpltsi r15, r16, 5 ; nor r5, r6, r7 ; st2 r25, r26 }
8616    10cf0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; cmpne r15, r16, r17 ; st2 r25, r26 }
8617    10cf8:       [0-9a-f]*       { clz r5, r6 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
8618    10d00:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
8619    10d08:       [0-9a-f]*       { cmpltu r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
8620    10d10:       [0-9a-f]*       { cmpne r15, r16, r17 ; cmpne r5, r6, r7 ; st2 r25, r26 }
8621    10d18:       [0-9a-f]*       { cmpne r15, r16, r17 ; subx r5, r6, r7 ; st2 r25, r26 }
8622    10d20:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
8623    10d28:       [0-9a-f]*       { ctz r5, r6 ; nop ; st2 r25, r26 }
8624    10d30:       [0-9a-f]*       { cmples r15, r16, r17 ; st2 r25, r26 }
8625    10d38:       [0-9a-f]*       { nop ; st2 r25, r26 }
8626    10d40:       [0-9a-f]*       { tblidxb0 r5, r6 ; st2 r25, r26 }
8627    10d48:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
8628    10d50:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; ill ; st2 r25, r26 }
8629    10d58:       [0-9a-f]*       { info 19 ; addi r5, r6, 5 ; st2 r25, r26 }
8630    10d60:       [0-9a-f]*       { info 19 ; move r15, r16 ; st2 r25, r26 }
8631    10d68:       [0-9a-f]*       { info 19 ; shl3addx r15, r16, r17 ; st2 r25, r26 }
8632    10d70:       [0-9a-f]*       { ctz r5, r6 ; jalr r15 ; st2 r25, r26 }
8633    10d78:       [0-9a-f]*       { tblidxb0 r5, r6 ; jalr r15 ; st2 r25, r26 }
8634    10d80:       [0-9a-f]*       { mz r5, r6, r7 ; jalrp r15 ; st2 r25, r26 }
8635    10d88:       [0-9a-f]*       { cmples r5, r6, r7 ; jr r15 ; st2 r25, r26 }
8636    10d90:       [0-9a-f]*       { shrs r5, r6, r7 ; jr r15 ; st2 r25, r26 }
8637    10d98:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; jrp r15 ; st2 r25, r26 }
8638    10da0:       [0-9a-f]*       { andi r5, r6, 5 ; lnk r15 ; st2 r25, r26 }
8639    10da8:       [0-9a-f]*       { shl1addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
8640    10db0:       [0-9a-f]*       { mnz r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
8641    10db8:       [0-9a-f]*       { mnz r15, r16, r17 ; st2 r25, r26 }
8642    10dc0:       [0-9a-f]*       { mnz r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
8643    10dc8:       [0-9a-f]*       { mulax r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
8644    10dd0:       [0-9a-f]*       { move r5, r6 ; cmpleu r15, r16, r17 ; st2 r25, r26 }
8645    10dd8:       [0-9a-f]*       { movei r15, 5 ; addx r5, r6, r7 ; st2 r25, r26 }
8646    10de0:       [0-9a-f]*       { movei r15, 5 ; rotli r5, r6, 5 ; st2 r25, r26 }
8647    10de8:       [0-9a-f]*       { movei r5, 5 ; jr r15 ; st2 r25, r26 }
8648    10df0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
8649    10df8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 }
8650    10e00:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st2 r25, r26 }
8651    10e08:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 }
8652    10e10:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
8653    10e18:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; movei r15, 5 ; st2 r25, r26 }
8654    10e20:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
8655    10e28:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 }
8656    10e30:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; st2 r25, r26 }
8657    10e38:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 }
8658    10e40:       [0-9a-f]*       { mulax r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
8659    10e48:       [0-9a-f]*       { mulx r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 }
8660    10e50:       [0-9a-f]*       { mz r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
8661    10e58:       [0-9a-f]*       { mz r15, r16, r17 ; st2 r25, r26 }
8662    10e60:       [0-9a-f]*       { mz r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
8663    10e68:       [0-9a-f]*       { nop ; st2 r25, r26 }
8664    10e70:       [0-9a-f]*       { nop ; shl r5, r6, r7 ; st2 r25, r26 }
8665    10e78:       [0-9a-f]*       { clz r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
8666    10e80:       [0-9a-f]*       { nor r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
8667    10e88:       [0-9a-f]*       { nor r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
8668    10e90:       [0-9a-f]*       { or r15, r16, r17 ; cmpne r5, r6, r7 ; st2 r25, r26 }
8669    10e98:       [0-9a-f]*       { or r15, r16, r17 ; subx r5, r6, r7 ; st2 r25, r26 }
8670    10ea0:       [0-9a-f]*       { or r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
8671    10ea8:       [0-9a-f]*       { pcnt r5, r6 ; nop ; st2 r25, r26 }
8672    10eb0:       [0-9a-f]*       { revbits r5, r6 ; jr r15 ; st2 r25, r26 }
8673    10eb8:       [0-9a-f]*       { revbytes r5, r6 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
8674    10ec0:       [0-9a-f]*       { rotl r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
8675    10ec8:       [0-9a-f]*       { rotl r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
8676    10ed0:       [0-9a-f]*       { rotl r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 }
8677    10ed8:       [0-9a-f]*       { rotli r15, r16, 5 ; cmpltu r5, r6, r7 ; st2 r25, r26 }
8678    10ee0:       [0-9a-f]*       { rotli r15, r16, 5 ; sub r5, r6, r7 ; st2 r25, r26 }
8679    10ee8:       [0-9a-f]*       { rotli r5, r6, 5 ; shl1add r15, r16, r17 ; st2 r25, r26 }
8680    10ef0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
8681    10ef8:       [0-9a-f]*       { shl r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
8682    10f00:       [0-9a-f]*       { shl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
8683    10f08:       [0-9a-f]*       { shl1add r15, r16, r17 ; nop ; st2 r25, r26 }
8684    10f10:       [0-9a-f]*       { shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
8685    10f18:       [0-9a-f]*       { shl1addx r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
8686    10f20:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
8687    10f28:       [0-9a-f]*       { shl1addx r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 }
8688    10f30:       [0-9a-f]*       { shl2add r15, r16, r17 ; cmpltu r5, r6, r7 ; st2 r25, r26 }
8689    10f38:       [0-9a-f]*       { shl2add r15, r16, r17 ; sub r5, r6, r7 ; st2 r25, r26 }
8690    10f40:       [0-9a-f]*       { shl2add r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 }
8691    10f48:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; st2 r25, r26 }
8692    10f50:       [0-9a-f]*       { shl2addx r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
8693    10f58:       [0-9a-f]*       { shl2addx r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
8694    10f60:       [0-9a-f]*       { shl3add r15, r16, r17 ; nop ; st2 r25, r26 }
8695    10f68:       [0-9a-f]*       { shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
8696    10f70:       [0-9a-f]*       { shl3addx r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
8697    10f78:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
8698    10f80:       [0-9a-f]*       { shl3addx r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 }
8699    10f88:       [0-9a-f]*       { shli r15, r16, 5 ; cmpltu r5, r6, r7 ; st2 r25, r26 }
8700    10f90:       [0-9a-f]*       { shli r15, r16, 5 ; sub r5, r6, r7 ; st2 r25, r26 }
8701    10f98:       [0-9a-f]*       { shli r5, r6, 5 ; shl1add r15, r16, r17 ; st2 r25, r26 }
8702    10fa0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
8703    10fa8:       [0-9a-f]*       { shrs r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
8704    10fb0:       [0-9a-f]*       { shrs r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
8705    10fb8:       [0-9a-f]*       { shrsi r15, r16, 5 ; nop ; st2 r25, r26 }
8706    10fc0:       [0-9a-f]*       { shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
8707    10fc8:       [0-9a-f]*       { shru r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
8708    10fd0:       [0-9a-f]*       { shru r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
8709    10fd8:       [0-9a-f]*       { shru r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 }
8710    10fe0:       [0-9a-f]*       { shrui r15, r16, 5 ; cmpltu r5, r6, r7 ; st2 r25, r26 }
8711    10fe8:       [0-9a-f]*       { shrui r15, r16, 5 ; sub r5, r6, r7 ; st2 r25, r26 }
8712    10ff0:       [0-9a-f]*       { shrui r5, r6, 5 ; shl1add r15, r16, r17 ; st2 r25, r26 }
8713    10ff8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 }
8714    11000:       [0-9a-f]*       { sub r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
8715    11008:       [0-9a-f]*       { sub r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
8716    11010:       [0-9a-f]*       { subx r15, r16, r17 ; nop ; st2 r25, r26 }
8717    11018:       [0-9a-f]*       { subx r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
8718    11020:       [0-9a-f]*       { tblidxb0 r5, r6 ; andi r15, r16, 5 ; st2 r25, r26 }
8719    11028:       [0-9a-f]*       { tblidxb0 r5, r6 ; xor r15, r16, r17 ; st2 r25, r26 }
8720    11030:       [0-9a-f]*       { tblidxb1 r5, r6 ; shli r15, r16, 5 ; st2 r25, r26 }
8721    11038:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl r15, r16, r17 ; st2 r25, r26 }
8722    11040:       [0-9a-f]*       { tblidxb3 r5, r6 ; movei r15, 5 ; st2 r25, r26 }
8723    11048:       [0-9a-f]*       { ctz r5, r6 ; xor r15, r16, r17 ; st2 r25, r26 }
8724    11050:       [0-9a-f]*       { tblidxb0 r5, r6 ; xor r15, r16, r17 ; st2 r25, r26 }
8725    11058:       [0-9a-f]*       { xor r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 }
8726    11060:       [0-9a-f]*       { cmulf r5, r6, r7 ; st2_add r15, r16, 5 }
8727    11068:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; st2_add r15, r16, 5 }
8728    11070:       [0-9a-f]*       { shrui r5, r6, 5 ; st2_add r15, r16, 5 }
8729    11078:       [0-9a-f]*       { v1minui r5, r6, 5 ; st2_add r15, r16, 5 }
8730    11080:       [0-9a-f]*       { v2muls r5, r6, r7 ; st2_add r15, r16, 5 }
8731    11088:       [0-9a-f]*       { andi r5, r6, 5 ; st4 r15, r16 }
8732    11090:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; st4 r15, r16 }
8733    11098:       [0-9a-f]*       { pcnt r5, r6 ; st4 r15, r16 }
8734    110a0:       [0-9a-f]*       { v1cmpltsi r5, r6, 5 ; st4 r15, r16 }
8735    110a8:       [0-9a-f]*       { v2cmpeq r5, r6, r7 ; st4 r15, r16 }
8736    110b0:       [0-9a-f]*       { v4int_h r5, r6, r7 ; st4 r15, r16 }
8737    110b8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; add r15, r16, r17 ; st4 r25, r26 }
8738    110c0:       [0-9a-f]*       { add r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
8739    110c8:       [0-9a-f]*       { add r5, r6, r7 ; st4 r25, r26 }
8740    110d0:       [0-9a-f]*       { revbits r5, r6 ; addi r15, r16, 5 ; st4 r25, r26 }
8741    110d8:       [0-9a-f]*       { addi r5, r6, 5 ; info 19 ; st4 r25, r26 }
8742    110e0:       [0-9a-f]*       { addx r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
8743    110e8:       [0-9a-f]*       { addx r15, r16, r17 ; shl3addx r5, r6, r7 ; st4 r25, r26 }
8744    110f0:       [0-9a-f]*       { addx r5, r6, r7 ; nop ; st4 r25, r26 }
8745    110f8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; addxi r15, r16, 5 ; st4 r25, r26 }
8746    11100:       [0-9a-f]*       { tblidxb2 r5, r6 ; addxi r15, r16, 5 ; st4 r25, r26 }
8747    11108:       [0-9a-f]*       { addxi r5, r6, 5 ; shl3add r15, r16, r17 ; st4 r25, r26 }
8748    11110:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
8749    11118:       [0-9a-f]*       { and r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
8750    11120:       [0-9a-f]*       { and r5, r6, r7 ; st4 r25, r26 }
8751    11128:       [0-9a-f]*       { revbits r5, r6 ; andi r15, r16, 5 ; st4 r25, r26 }
8752    11130:       [0-9a-f]*       { andi r5, r6, 5 ; info 19 ; st4 r25, r26 }
8753    11138:       [0-9a-f]*       { clz r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
8754    11140:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; st4 r25, r26 }
8755    11148:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shrui r15, r16, 5 ; st4 r25, r26 }
8756    11150:       [0-9a-f]*       { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
8757    11158:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
8758    11160:       [0-9a-f]*       { cmpeq r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
8759    11168:       [0-9a-f]*       { cmpeq r5, r6, r7 ; xor r15, r16, r17 ; st4 r25, r26 }
8760    11170:       [0-9a-f]*       { pcnt r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
8761    11178:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; ill ; st4 r25, r26 }
8762    11180:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
8763    11188:       [0-9a-f]*       { cmples r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
8764    11190:       [0-9a-f]*       { cmples r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
8765    11198:       [0-9a-f]*       { cmpleu r15, r16, r17 ; st4 r25, r26 }
8766    111a0:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
8767    111a8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
8768    111b0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 }
8769    111b8:       [0-9a-f]*       { cmplts r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
8770    111c0:       [0-9a-f]*       { cmplts r5, r6, r7 ; xor r15, r16, r17 ; st4 r25, r26 }
8771    111c8:       [0-9a-f]*       { pcnt r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
8772    111d0:       [0-9a-f]*       { cmpltsi r5, r6, 5 ; ill ; st4 r25, r26 }
8773    111d8:       [0-9a-f]*       { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
8774    111e0:       [0-9a-f]*       { cmpltu r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
8775    111e8:       [0-9a-f]*       { cmpltu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
8776    111f0:       [0-9a-f]*       { cmpne r15, r16, r17 ; st4 r25, r26 }
8777    111f8:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; st4 r25, r26 }
8778    11200:       [0-9a-f]*       { cmpne r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
8779    11208:       [0-9a-f]*       { ctz r5, r6 ; or r15, r16, r17 ; st4 r25, r26 }
8780    11210:       [0-9a-f]*       { cmpleu r15, r16, r17 ; st4 r25, r26 }
8781    11218:       [0-9a-f]*       { nor r5, r6, r7 ; st4 r25, r26 }
8782    11220:       [0-9a-f]*       { tblidxb2 r5, r6 ; st4 r25, r26 }
8783    11228:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
8784    11230:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; ill ; st4 r25, r26 }
8785    11238:       [0-9a-f]*       { info 19 ; addx r5, r6, r7 ; st4 r25, r26 }
8786    11240:       [0-9a-f]*       { info 19 ; movei r15, 5 ; st4 r25, r26 }
8787    11248:       [0-9a-f]*       { info 19 ; shli r15, r16, 5 ; st4 r25, r26 }
8788    11250:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; jalr r15 ; st4 r25, r26 }
8789    11258:       [0-9a-f]*       { tblidxb2 r5, r6 ; jalr r15 ; st4 r25, r26 }
8790    11260:       [0-9a-f]*       { nor r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
8791    11268:       [0-9a-f]*       { cmplts r5, r6, r7 ; jr r15 ; st4 r25, r26 }
8792    11270:       [0-9a-f]*       { shru r5, r6, r7 ; jr r15 ; st4 r25, r26 }
8793    11278:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
8794    11280:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
8795    11288:       [0-9a-f]*       { shl2addx r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
8796    11290:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 }
8797    11298:       [0-9a-f]*       { mnz r5, r6, r7 ; addi r15, r16, 5 ; st4 r25, r26 }
8798    112a0:       [0-9a-f]*       { mnz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 }
8799    112a8:       [0-9a-f]*       { move r15, r16 ; mz r5, r6, r7 ; st4 r25, r26 }
8800    112b0:       [0-9a-f]*       { move r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
8801    112b8:       [0-9a-f]*       { movei r15, 5 ; and r5, r6, r7 ; st4 r25, r26 }
8802    112c0:       [0-9a-f]*       { movei r15, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 }
8803    112c8:       [0-9a-f]*       { movei r5, 5 ; lnk r15 ; st4 r25, r26 }
8804    112d0:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
8805    112d8:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
8806    112e0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st4 r25, r26 }
8807    112e8:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st4 r25, r26 }
8808    112f0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 }
8809    112f8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; nop ; st4 r25, r26 }
8810    11300:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; jr r15 ; st4 r25, r26 }
8811    11308:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
8812    11310:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
8813    11318:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; xor r15, r16, r17 ; st4 r25, r26 }
8814    11320:       [0-9a-f]*       { mulax r5, r6, r7 ; shli r15, r16, 5 ; st4 r25, r26 }
8815    11328:       [0-9a-f]*       { mulx r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 }
8816    11330:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
8817    11338:       [0-9a-f]*       { mz r5, r6, r7 ; addi r15, r16, 5 ; st4 r25, r26 }
8818    11340:       [0-9a-f]*       { mz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 }
8819    11348:       [0-9a-f]*       { nop ; ill ; st4 r25, r26 }
8820    11350:       [0-9a-f]*       { nop ; shl1add r5, r6, r7 ; st4 r25, r26 }
8821    11358:       [0-9a-f]*       { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
8822    11360:       [0-9a-f]*       { nor r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
8823    11368:       [0-9a-f]*       { nor r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
8824    11370:       [0-9a-f]*       { or r15, r16, r17 ; st4 r25, r26 }
8825    11378:       [0-9a-f]*       { tblidxb1 r5, r6 ; or r15, r16, r17 ; st4 r25, r26 }
8826    11380:       [0-9a-f]*       { or r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
8827    11388:       [0-9a-f]*       { pcnt r5, r6 ; or r15, r16, r17 ; st4 r25, r26 }
8828    11390:       [0-9a-f]*       { revbits r5, r6 ; lnk r15 ; st4 r25, r26 }
8829    11398:       [0-9a-f]*       { revbytes r5, r6 ; st4 r25, r26 }
8830    113a0:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; st4 r25, r26 }
8831    113a8:       [0-9a-f]*       { rotl r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 }
8832    113b0:       [0-9a-f]*       { rotl r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
8833    113b8:       [0-9a-f]*       { ctz r5, r6 ; rotli r15, r16, 5 ; st4 r25, r26 }
8834    113c0:       [0-9a-f]*       { tblidxb0 r5, r6 ; rotli r15, r16, 5 ; st4 r25, r26 }
8835    113c8:       [0-9a-f]*       { rotli r5, r6, 5 ; shl2add r15, r16, r17 ; st4 r25, r26 }
8836    113d0:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 }
8837    113d8:       [0-9a-f]*       { shl r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
8838    113e0:       [0-9a-f]*       { shl r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
8839    113e8:       [0-9a-f]*       { shl1add r15, r16, r17 ; or r5, r6, r7 ; st4 r25, r26 }
8840    113f0:       [0-9a-f]*       { shl1add r5, r6, r7 ; st4 r25, r26 }
8841    113f8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 }
8842    11400:       [0-9a-f]*       { shl1addx r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 }
8843    11408:       [0-9a-f]*       { shl1addx r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
8844    11410:       [0-9a-f]*       { ctz r5, r6 ; shl2add r15, r16, r17 ; st4 r25, r26 }
8845    11418:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl2add r15, r16, r17 ; st4 r25, r26 }
8846    11420:       [0-9a-f]*       { shl2add r5, r6, r7 ; shl2add r15, r16, r17 ; st4 r25, r26 }
8847    11428:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
8848    11430:       [0-9a-f]*       { shl2addx r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
8849    11438:       [0-9a-f]*       { shl2addx r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
8850    11440:       [0-9a-f]*       { shl3add r15, r16, r17 ; or r5, r6, r7 ; st4 r25, r26 }
8851    11448:       [0-9a-f]*       { shl3add r5, r6, r7 ; st4 r25, r26 }
8852    11450:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; st4 r25, r26 }
8853    11458:       [0-9a-f]*       { shl3addx r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 }
8854    11460:       [0-9a-f]*       { shl3addx r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
8855    11468:       [0-9a-f]*       { ctz r5, r6 ; shli r15, r16, 5 ; st4 r25, r26 }
8856    11470:       [0-9a-f]*       { tblidxb0 r5, r6 ; shli r15, r16, 5 ; st4 r25, r26 }
8857    11478:       [0-9a-f]*       { shli r5, r6, 5 ; shl2add r15, r16, r17 ; st4 r25, r26 }
8858    11480:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; st4 r25, r26 }
8859    11488:       [0-9a-f]*       { shrs r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
8860    11490:       [0-9a-f]*       { shrs r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
8861    11498:       [0-9a-f]*       { shrsi r15, r16, 5 ; or r5, r6, r7 ; st4 r25, r26 }
8862    114a0:       [0-9a-f]*       { shrsi r5, r6, 5 ; st4 r25, r26 }
8863    114a8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 }
8864    114b0:       [0-9a-f]*       { shru r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 }
8865    114b8:       [0-9a-f]*       { shru r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
8866    114c0:       [0-9a-f]*       { ctz r5, r6 ; shrui r15, r16, 5 ; st4 r25, r26 }
8867    114c8:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; st4 r25, r26 }
8868    114d0:       [0-9a-f]*       { shrui r5, r6, 5 ; shl2add r15, r16, r17 ; st4 r25, r26 }
8869    114d8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st4 r25, r26 }
8870    114e0:       [0-9a-f]*       { sub r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
8871    114e8:       [0-9a-f]*       { sub r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
8872    114f0:       [0-9a-f]*       { subx r15, r16, r17 ; or r5, r6, r7 ; st4 r25, r26 }
8873    114f8:       [0-9a-f]*       { subx r5, r6, r7 ; st4 r25, r26 }
8874    11500:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
8875    11508:       [0-9a-f]*       { tblidxb1 r5, r6 ; add r15, r16, r17 ; st4 r25, r26 }
8876    11510:       [0-9a-f]*       { tblidxb1 r5, r6 ; shrsi r15, r16, 5 ; st4 r25, r26 }
8877    11518:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl1addx r15, r16, r17 ; st4 r25, r26 }
8878    11520:       [0-9a-f]*       { tblidxb3 r5, r6 ; nop ; st4 r25, r26 }
8879    11528:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; st4 r25, r26 }
8880    11530:       [0-9a-f]*       { tblidxb2 r5, r6 ; xor r15, r16, r17 ; st4 r25, r26 }
8881    11538:       [0-9a-f]*       { xor r5, r6, r7 ; shl3add r15, r16, r17 ; st4 r25, r26 }
8882    11540:       [0-9a-f]*       { cmulh r5, r6, r7 ; st4_add r15, r16, 5 }
8883    11548:       [0-9a-f]*       { mul_ls_lu r5, r6, r7 ; st4_add r15, r16, 5 }
8884    11550:       [0-9a-f]*       { shruxi r5, r6, 5 ; st4_add r15, r16, 5 }
8885    11558:       [0-9a-f]*       { v1multu r5, r6, r7 ; st4_add r15, r16, 5 }
8886    11560:       [0-9a-f]*       { v2mz r5, r6, r7 ; st4_add r15, r16, 5 }
8887    11568:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; st_add r15, r16, 5 }
8888    11570:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; st_add r15, r16, 5 }
8889    11578:       [0-9a-f]*       { revbytes r5, r6 ; st_add r15, r16, 5 }
8890    11580:       [0-9a-f]*       { v1cmpltui r5, r6, 5 ; st_add r15, r16, 5 }
8891    11588:       [0-9a-f]*       { v2cmples r5, r6, r7 ; st_add r15, r16, 5 }
8892    11590:       [0-9a-f]*       { v4packsc r5, r6, r7 ; st_add r15, r16, 5 }
8893    11598:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; stnt r15, r16 }
8894    115a0:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; stnt r15, r16 }
8895    115a8:       [0-9a-f]*       { sub r5, r6, r7 ; stnt r15, r16 }
8896    115b0:       [0-9a-f]*       { v1mulus r5, r6, r7 ; stnt r15, r16 }
8897    115b8:       [0-9a-f]*       { v2packl r5, r6, r7 ; stnt r15, r16 }
8898    115c0:       [0-9a-f]*       { clz r5, r6 ; stnt1 r15, r16 }
8899    115c8:       [0-9a-f]*       { fsingle_pack2 r5, r6, r7 ; stnt1 r15, r16 }
8900    115d0:       [0-9a-f]*       { rotli r5, r6, 5 ; stnt1 r15, r16 }
8901    115d8:       [0-9a-f]*       { v1ddotpu r5, r6, r7 ; stnt1 r15, r16 }
8902    115e0:       [0-9a-f]*       { v2cmplts r5, r6, r7 ; stnt1 r15, r16 }
8903    115e8:       [0-9a-f]*       { v4shlsc r5, r6, r7 ; stnt1 r15, r16 }
8904    115f0:       [0-9a-f]*       { ctz r5, r6 ; stnt1_add r15, r16, 5 }
8905    115f8:       [0-9a-f]*       { mula_hs_ls r5, r6, r7 ; stnt1_add r15, r16, 5 }
8906    11600:       [0-9a-f]*       { subxsc r5, r6, r7 ; stnt1_add r15, r16, 5 }
8907    11608:       [0-9a-f]*       { v1sadau r5, r6, r7 ; stnt1_add r15, r16, 5 }
8908    11610:       [0-9a-f]*       { v2sadas r5, r6, r7 ; stnt1_add r15, r16, 5 }
8909    11618:       [0-9a-f]*       { cmovnez r5, r6, r7 ; stnt2 r15, r16 }
8910    11620:       [0-9a-f]*       { info 19 ; stnt2 r15, r16 }
8911    11628:       [0-9a-f]*       { shl16insli r5, r6, 4660 ; stnt2 r15, r16 }
8912    11630:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; stnt2 r15, r16 }
8913    11638:       [0-9a-f]*       { v2cmpltu r5, r6, r7 ; stnt2 r15, r16 }
8914    11640:       [0-9a-f]*       { v4shru r5, r6, r7 ; stnt2 r15, r16 }
8915    11648:       [0-9a-f]*       { dblalign2 r5, r6, r7 ; stnt2_add r15, r16, 5 }
8916    11650:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; stnt2_add r15, r16, 5 }
8917    11658:       [0-9a-f]*       { tblidxb1 r5, r6 ; stnt2_add r15, r16, 5 }
8918    11660:       [0-9a-f]*       { v1shl r5, r6, r7 ; stnt2_add r15, r16, 5 }
8919    11668:       [0-9a-f]*       { v2sads r5, r6, r7 ; stnt2_add r15, r16, 5 }
8920    11670:       [0-9a-f]*       { cmpeqi r5, r6, 5 ; stnt4 r15, r16 }
8921    11678:       [0-9a-f]*       { mm r5, r6, 5, 7 ; stnt4 r15, r16 }
8922    11680:       [0-9a-f]*       { shl1addx r5, r6, r7 ; stnt4 r15, r16 }
8923    11688:       [0-9a-f]*       { v1dotp r5, r6, r7 ; stnt4 r15, r16 }
8924    11690:       [0-9a-f]*       { v2cmpne r5, r6, r7 ; stnt4 r15, r16 }
8925    11698:       [0-9a-f]*       { v4subsc r5, r6, r7 ; stnt4 r15, r16 }
8926    116a0:       [0-9a-f]*       { dblalign6 r5, r6, r7 ; stnt4_add r15, r16, 5 }
8927    116a8:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; stnt4_add r15, r16, 5 }
8928    116b0:       [0-9a-f]*       { tblidxb3 r5, r6 ; stnt4_add r15, r16, 5 }
8929    116b8:       [0-9a-f]*       { v1shrs r5, r6, r7 ; stnt4_add r15, r16, 5 }
8930    116c0:       [0-9a-f]*       { v2shl r5, r6, r7 ; stnt4_add r15, r16, 5 }
8931    116c8:       [0-9a-f]*       { cmpleu r5, r6, r7 ; stnt_add r15, r16, 5 }
8932    116d0:       [0-9a-f]*       { move r5, r6 ; stnt_add r15, r16, 5 }
8933    116d8:       [0-9a-f]*       { shl2addx r5, r6, r7 ; stnt_add r15, r16, 5 }
8934    116e0:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; stnt_add r15, r16, 5 }
8935    116e8:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; stnt_add r15, r16, 5 }
8936    116f0:       [0-9a-f]*       { xori r5, r6, 5 ; stnt_add r15, r16, 5 }
8937    116f8:       [0-9a-f]*       { sub r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 }
8938    11700:       [0-9a-f]*       { sub r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 }
8939    11708:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; sub r15, r16, r17 }
8940    11710:       [0-9a-f]*       { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
8941    11718:       [0-9a-f]*       { sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
8942    11720:       [0-9a-f]*       { sub r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 }
8943    11728:       [0-9a-f]*       { sub r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
8944    11730:       [0-9a-f]*       { sub r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
8945    11738:       [0-9a-f]*       { sub r15, r16, r17 ; dblalign2 r5, r6, r7 }
8946    11740:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 }
8947    11748:       [0-9a-f]*       { sub r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
8948    11750:       [0-9a-f]*       { sub r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
8949    11758:       [0-9a-f]*       { sub r15, r16, r17 ; move r5, r6 ; ld1s r25, r26 }
8950    11760:       [0-9a-f]*       { sub r15, r16, r17 ; ld1s r25, r26 }
8951    11768:       [0-9a-f]*       { revbits r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
8952    11770:       [0-9a-f]*       { sub r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
8953    11778:       [0-9a-f]*       { sub r15, r16, r17 ; subx r5, r6, r7 ; ld2s r25, r26 }
8954    11780:       [0-9a-f]*       { mulx r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 }
8955    11788:       [0-9a-f]*       { sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4s r25, r26 }
8956    11790:       [0-9a-f]*       { sub r15, r16, r17 ; shli r5, r6, 5 ; ld4s r25, r26 }
8957    11798:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
8958    117a0:       [0-9a-f]*       { sub r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
8959    117a8:       [0-9a-f]*       { sub r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 }
8960    117b0:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 }
8961    117b8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
8962    117c0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
8963    117c8:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
8964    117d0:       [0-9a-f]*       { mulx r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
8965    117d8:       [0-9a-f]*       { sub r15, r16, r17 ; nop ; ld2u r25, r26 }
8966    117e0:       [0-9a-f]*       { sub r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 }
8967    117e8:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
8968    117f0:       [0-9a-f]*       { sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
8969    117f8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
8970    11800:       [0-9a-f]*       { sub r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l1_fault r25 }
8971    11808:       [0-9a-f]*       { sub r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1_fault r25 }
8972    11810:       [0-9a-f]*       { sub r15, r16, r17 ; prefetch_l2 r25 }
8973    11818:       [0-9a-f]*       { tblidxb1 r5, r6 ; sub r15, r16, r17 ; prefetch_l2 r25 }
8974    11820:       [0-9a-f]*       { sub r15, r16, r17 ; nop ; prefetch_l2_fault r25 }
8975    11828:       [0-9a-f]*       { sub r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3 r25 }
8976    11830:       [0-9a-f]*       { sub r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3 r25 }
8977    11838:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
8978    11840:       [0-9a-f]*       { revbits r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 }
8979    11848:       [0-9a-f]*       { sub r15, r16, r17 ; rotl r5, r6, r7 ; prefetch r25 }
8980    11850:       [0-9a-f]*       { sub r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
8981    11858:       [0-9a-f]*       { sub r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
8982    11860:       [0-9a-f]*       { sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 }
8983    11868:       [0-9a-f]*       { sub r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 }
8984    11870:       [0-9a-f]*       { sub r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 }
8985    11878:       [0-9a-f]*       { sub r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 }
8986    11880:       [0-9a-f]*       { sub r15, r16, r17 ; cmpne r5, r6, r7 ; st r25, r26 }
8987    11888:       [0-9a-f]*       { sub r15, r16, r17 ; subx r5, r6, r7 ; st r25, r26 }
8988    11890:       [0-9a-f]*       { mulx r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 }
8989    11898:       [0-9a-f]*       { sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; st2 r25, r26 }
8990    118a0:       [0-9a-f]*       { sub r15, r16, r17 ; shli r5, r6, 5 ; st2 r25, r26 }
8991    118a8:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st4 r25, r26 }
8992    118b0:       [0-9a-f]*       { sub r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 }
8993    118b8:       [0-9a-f]*       { tblidxb0 r5, r6 ; sub r15, r16, r17 ; ld4s r25, r26 }
8994    118c0:       [0-9a-f]*       { tblidxb2 r5, r6 ; sub r15, r16, r17 ; prefetch r25 }
8995    118c8:       [0-9a-f]*       { sub r15, r16, r17 ; v1cmplts r5, r6, r7 }
8996    118d0:       [0-9a-f]*       { v2avgs r5, r6, r7 ; sub r15, r16, r17 }
8997    118d8:       [0-9a-f]*       { sub r15, r16, r17 ; v4addsc r5, r6, r7 }
8998    118e0:       [0-9a-f]*       { sub r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
8999    118e8:       [0-9a-f]*       { sub r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
9000    118f0:       [0-9a-f]*       { sub r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
9001    118f8:       [0-9a-f]*       { sub r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
9002    11900:       [0-9a-f]*       { sub r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
9003    11908:       [0-9a-f]*       { sub r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
9004    11910:       [0-9a-f]*       { sub r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
9005    11918:       [0-9a-f]*       { sub r5, r6, r7 ; ld1s r25, r26 }
9006    11920:       [0-9a-f]*       { sub r5, r6, r7 ; info 19 ; ld1u r25, r26 }
9007    11928:       [0-9a-f]*       { sub r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
9008    11930:       [0-9a-f]*       { sub r5, r6, r7 ; jrp r15 ; ld2s r25, r26 }
9009    11938:       [0-9a-f]*       { sub r5, r6, r7 ; move r15, r16 ; ld r25, r26 }
9010    11940:       [0-9a-f]*       { sub r5, r6, r7 ; ill ; ld1s r25, r26 }
9011    11948:       [0-9a-f]*       { sub r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
9012    11950:       [0-9a-f]*       { sub r5, r6, r7 ; ld1u r25, r26 }
9013    11958:       [0-9a-f]*       { sub r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
9014    11960:       [0-9a-f]*       { sub r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
9015    11968:       [0-9a-f]*       { sub r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
9016    11970:       [0-9a-f]*       { sub r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
9017    11978:       [0-9a-f]*       { sub r5, r6, r7 ; ldna_add r15, r16, 5 }
9018    11980:       [0-9a-f]*       { sub r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
9019    11988:       [0-9a-f]*       { sub r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
9020    11990:       [0-9a-f]*       { sub r5, r6, r7 ; nop ; ld4u r25, r26 }
9021    11998:       [0-9a-f]*       { sub r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
9022    119a0:       [0-9a-f]*       { sub r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
9023    119a8:       [0-9a-f]*       { sub r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
9024    119b0:       [0-9a-f]*       { sub r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 }
9025    119b8:       [0-9a-f]*       { sub r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
9026    119c0:       [0-9a-f]*       { sub r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
9027    119c8:       [0-9a-f]*       { sub r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2_fault r25 }
9028    119d0:       [0-9a-f]*       { sub r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
9029    119d8:       [0-9a-f]*       { sub r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
9030    119e0:       [0-9a-f]*       { sub r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 }
9031    119e8:       [0-9a-f]*       { sub r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
9032    119f0:       [0-9a-f]*       { sub r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
9033    119f8:       [0-9a-f]*       { sub r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
9034    11a00:       [0-9a-f]*       { sub r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
9035    11a08:       [0-9a-f]*       { sub r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
9036    11a10:       [0-9a-f]*       { sub r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
9037    11a18:       [0-9a-f]*       { sub r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
9038    11a20:       [0-9a-f]*       { sub r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
9039    11a28:       [0-9a-f]*       { sub r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
9040    11a30:       [0-9a-f]*       { sub r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
9041    11a38:       [0-9a-f]*       { sub r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
9042    11a40:       [0-9a-f]*       { sub r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 }
9043    11a48:       [0-9a-f]*       { sub r5, r6, r7 ; v1cmpne r15, r16, r17 }
9044    11a50:       [0-9a-f]*       { sub r5, r6, r7 ; v2shl r15, r16, r17 }
9045    11a58:       [0-9a-f]*       { sub r5, r6, r7 ; xori r15, r16, 5 }
9046    11a60:       [0-9a-f]*       { subx r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 }
9047    11a68:       [0-9a-f]*       { subx r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 }
9048    11a70:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; subx r15, r16, r17 }
9049    11a78:       [0-9a-f]*       { cmovnez r5, r6, r7 ; subx r15, r16, r17 ; ld1s r25, r26 }
9050    11a80:       [0-9a-f]*       { subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
9051    11a88:       [0-9a-f]*       { subx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 }
9052    11a90:       [0-9a-f]*       { subx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
9053    11a98:       [0-9a-f]*       { subx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
9054    11aa0:       [0-9a-f]*       { subx r15, r16, r17 ; dblalign2 r5, r6, r7 }
9055    11aa8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; subx r15, r16, r17 ; ld4u r25, r26 }
9056    11ab0:       [0-9a-f]*       { subx r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
9057    11ab8:       [0-9a-f]*       { subx r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
9058    11ac0:       [0-9a-f]*       { subx r15, r16, r17 ; move r5, r6 ; ld1s r25, r26 }
9059    11ac8:       [0-9a-f]*       { subx r15, r16, r17 ; ld1s r25, r26 }
9060    11ad0:       [0-9a-f]*       { revbits r5, r6 ; subx r15, r16, r17 ; ld1u r25, r26 }
9061    11ad8:       [0-9a-f]*       { subx r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
9062    11ae0:       [0-9a-f]*       { subx r15, r16, r17 ; subx r5, r6, r7 ; ld2s r25, r26 }
9063    11ae8:       [0-9a-f]*       { mulx r5, r6, r7 ; subx r15, r16, r17 ; ld2u r25, r26 }
9064    11af0:       [0-9a-f]*       { subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4s r25, r26 }
9065    11af8:       [0-9a-f]*       { subx r15, r16, r17 ; shli r5, r6, 5 ; ld4s r25, r26 }
9066    11b00:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
9067    11b08:       [0-9a-f]*       { subx r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
9068    11b10:       [0-9a-f]*       { subx r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 }
9069    11b18:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld2s r25, r26 }
9070    11b20:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld1u r25, r26 }
9071    11b28:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld1s r25, r26 }
9072    11b30:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
9073    11b38:       [0-9a-f]*       { mulx r5, r6, r7 ; subx r15, r16, r17 ; ld1u r25, r26 }
9074    11b40:       [0-9a-f]*       { subx r15, r16, r17 ; nop ; ld2u r25, r26 }
9075    11b48:       [0-9a-f]*       { subx r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 }
9076    11b50:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
9077    11b58:       [0-9a-f]*       { subx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
9078    11b60:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
9079    11b68:       [0-9a-f]*       { subx r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l1_fault r25 }
9080    11b70:       [0-9a-f]*       { subx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1_fault r25 }
9081    11b78:       [0-9a-f]*       { subx r15, r16, r17 ; prefetch_l2 r25 }
9082    11b80:       [0-9a-f]*       { tblidxb1 r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 }
9083    11b88:       [0-9a-f]*       { subx r15, r16, r17 ; nop ; prefetch_l2_fault r25 }
9084    11b90:       [0-9a-f]*       { subx r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3 r25 }
9085    11b98:       [0-9a-f]*       { subx r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3 r25 }
9086    11ba0:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 }
9087    11ba8:       [0-9a-f]*       { revbits r5, r6 ; subx r15, r16, r17 ; ld4u r25, r26 }
9088    11bb0:       [0-9a-f]*       { subx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch r25 }
9089    11bb8:       [0-9a-f]*       { subx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
9090    11bc0:       [0-9a-f]*       { subx r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
9091    11bc8:       [0-9a-f]*       { subx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 }
9092    11bd0:       [0-9a-f]*       { subx r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 }
9093    11bd8:       [0-9a-f]*       { subx r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 }
9094    11be0:       [0-9a-f]*       { subx r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 }
9095    11be8:       [0-9a-f]*       { subx r15, r16, r17 ; cmpne r5, r6, r7 ; st r25, r26 }
9096    11bf0:       [0-9a-f]*       { subx r15, r16, r17 ; subx r5, r6, r7 ; st r25, r26 }
9097    11bf8:       [0-9a-f]*       { mulx r5, r6, r7 ; subx r15, r16, r17 ; st1 r25, r26 }
9098    11c00:       [0-9a-f]*       { subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; st2 r25, r26 }
9099    11c08:       [0-9a-f]*       { subx r15, r16, r17 ; shli r5, r6, 5 ; st2 r25, r26 }
9100    11c10:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
9101    11c18:       [0-9a-f]*       { subx r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 }
9102    11c20:       [0-9a-f]*       { tblidxb0 r5, r6 ; subx r15, r16, r17 ; ld4s r25, r26 }
9103    11c28:       [0-9a-f]*       { tblidxb2 r5, r6 ; subx r15, r16, r17 ; prefetch r25 }
9104    11c30:       [0-9a-f]*       { subx r15, r16, r17 ; v1cmplts r5, r6, r7 }
9105    11c38:       [0-9a-f]*       { v2avgs r5, r6, r7 ; subx r15, r16, r17 }
9106    11c40:       [0-9a-f]*       { subx r15, r16, r17 ; v4addsc r5, r6, r7 }
9107    11c48:       [0-9a-f]*       { subx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
9108    11c50:       [0-9a-f]*       { subx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
9109    11c58:       [0-9a-f]*       { subx r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
9110    11c60:       [0-9a-f]*       { subx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
9111    11c68:       [0-9a-f]*       { subx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
9112    11c70:       [0-9a-f]*       { subx r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
9113    11c78:       [0-9a-f]*       { subx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
9114    11c80:       [0-9a-f]*       { subx r5, r6, r7 ; ld1s r25, r26 }
9115    11c88:       [0-9a-f]*       { subx r5, r6, r7 ; info 19 ; ld1u r25, r26 }
9116    11c90:       [0-9a-f]*       { subx r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
9117    11c98:       [0-9a-f]*       { subx r5, r6, r7 ; jrp r15 ; ld2s r25, r26 }
9118    11ca0:       [0-9a-f]*       { subx r5, r6, r7 ; move r15, r16 ; ld r25, r26 }
9119    11ca8:       [0-9a-f]*       { subx r5, r6, r7 ; ill ; ld1s r25, r26 }
9120    11cb0:       [0-9a-f]*       { subx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
9121    11cb8:       [0-9a-f]*       { subx r5, r6, r7 ; ld1u r25, r26 }
9122    11cc0:       [0-9a-f]*       { subx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
9123    11cc8:       [0-9a-f]*       { subx r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
9124    11cd0:       [0-9a-f]*       { subx r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
9125    11cd8:       [0-9a-f]*       { subx r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
9126    11ce0:       [0-9a-f]*       { subx r5, r6, r7 ; ldna_add r15, r16, 5 }
9127    11ce8:       [0-9a-f]*       { subx r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
9128    11cf0:       [0-9a-f]*       { subx r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
9129    11cf8:       [0-9a-f]*       { subx r5, r6, r7 ; nop ; ld4u r25, r26 }
9130    11d00:       [0-9a-f]*       { subx r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
9131    11d08:       [0-9a-f]*       { subx r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
9132    11d10:       [0-9a-f]*       { subx r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
9133    11d18:       [0-9a-f]*       { subx r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 }
9134    11d20:       [0-9a-f]*       { subx r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
9135    11d28:       [0-9a-f]*       { subx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
9136    11d30:       [0-9a-f]*       { subx r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2_fault r25 }
9137    11d38:       [0-9a-f]*       { subx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
9138    11d40:       [0-9a-f]*       { subx r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
9139    11d48:       [0-9a-f]*       { subx r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 }
9140    11d50:       [0-9a-f]*       { subx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
9141    11d58:       [0-9a-f]*       { subx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
9142    11d60:       [0-9a-f]*       { subx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
9143    11d68:       [0-9a-f]*       { subx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
9144    11d70:       [0-9a-f]*       { subx r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
9145    11d78:       [0-9a-f]*       { subx r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
9146    11d80:       [0-9a-f]*       { subx r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
9147    11d88:       [0-9a-f]*       { subx r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
9148    11d90:       [0-9a-f]*       { subx r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
9149    11d98:       [0-9a-f]*       { subx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
9150    11da0:       [0-9a-f]*       { subx r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
9151    11da8:       [0-9a-f]*       { subx r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 }
9152    11db0:       [0-9a-f]*       { subx r5, r6, r7 ; v1cmpne r15, r16, r17 }
9153    11db8:       [0-9a-f]*       { subx r5, r6, r7 ; v2shl r15, r16, r17 }
9154    11dc0:       [0-9a-f]*       { subx r5, r6, r7 ; xori r15, r16, 5 }
9155    11dc8:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; subxsc r15, r16, r17 }
9156    11dd0:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; subxsc r15, r16, r17 }
9157    11dd8:       [0-9a-f]*       { subxsc r15, r16, r17 ; v1addi r5, r6, 5 }
9158    11de0:       [0-9a-f]*       { subxsc r15, r16, r17 ; v1shru r5, r6, r7 }
9159    11de8:       [0-9a-f]*       { subxsc r15, r16, r17 ; v2shlsc r5, r6, r7 }
9160    11df0:       [0-9a-f]*       { subxsc r5, r6, r7 ; dblalign2 r15, r16, r17 }
9161    11df8:       [0-9a-f]*       { subxsc r5, r6, r7 ; ld4u_add r15, r16, 5 }
9162    11e00:       [0-9a-f]*       { subxsc r5, r6, r7 ; prefetch_l2 r15 }
9163    11e08:       [0-9a-f]*       { subxsc r5, r6, r7 ; sub r15, r16, r17 }
9164    11e10:       [0-9a-f]*       { subxsc r5, r6, r7 ; v2cmpltu r15, r16, r17 }
9165    11e18:       [0-9a-f]*       { swint3 }
9166    11e20:       [0-9a-f]*       { tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
9167    11e28:       [0-9a-f]*       { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
9168    11e30:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
9169    11e38:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 }
9170    11e40:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
9171    11e48:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
9172    11e50:       [0-9a-f]*       { tblidxb0 r5, r6 ; fetchadd4 r15, r16, r17 }
9173    11e58:       [0-9a-f]*       { tblidxb0 r5, r6 ; ill ; prefetch_l2 r25 }
9174    11e60:       [0-9a-f]*       { tblidxb0 r5, r6 ; jalr r15 ; prefetch_l1_fault r25 }
9175    11e68:       [0-9a-f]*       { tblidxb0 r5, r6 ; jr r15 ; prefetch_l2_fault r25 }
9176    11e70:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; ld r25, r26 }
9177    11e78:       [0-9a-f]*       { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
9178    11e80:       [0-9a-f]*       { tblidxb0 r5, r6 ; subx r15, r16, r17 ; ld1s r25, r26 }
9179    11e88:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
9180    11e90:       [0-9a-f]*       { tblidxb0 r5, r6 ; nop ; ld2s r25, r26 }
9181    11e98:       [0-9a-f]*       { tblidxb0 r5, r6 ; jalr r15 ; ld2u r25, r26 }
9182    11ea0:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
9183    11ea8:       [0-9a-f]*       { tblidxb0 r5, r6 ; ld4u r15, r16 }
9184    11eb0:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 }
9185    11eb8:       [0-9a-f]*       { tblidxb0 r5, r6 ; lnk r15 ; st r25, r26 }
9186    11ec0:       [0-9a-f]*       { tblidxb0 r5, r6 ; move r15, r16 ; st r25, r26 }
9187    11ec8:       [0-9a-f]*       { tblidxb0 r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
9188    11ed0:       [0-9a-f]*       { tblidxb0 r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
9189    11ed8:       [0-9a-f]*       { tblidxb0 r5, r6 ; info 19 ; prefetch r25 }
9190    11ee0:       [0-9a-f]*       { tblidxb0 r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
9191    11ee8:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
9192    11ef0:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
9193    11ef8:       [0-9a-f]*       { tblidxb0 r5, r6 ; nop ; prefetch_l2 r25 }
9194    11f00:       [0-9a-f]*       { tblidxb0 r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
9195    11f08:       [0-9a-f]*       { tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
9196    11f10:       [0-9a-f]*       { tblidxb0 r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
9197    11f18:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
9198    11f20:       [0-9a-f]*       { tblidxb0 r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 }
9199    11f28:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 }
9200    11f30:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl2add r15, r16, r17 }
9201    11f38:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
9202    11f40:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 }
9203    11f48:       [0-9a-f]*       { tblidxb0 r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 }
9204    11f50:       [0-9a-f]*       { tblidxb0 r5, r6 ; addx r15, r16, r17 ; st r25, r26 }
9205    11f58:       [0-9a-f]*       { tblidxb0 r5, r6 ; shrui r15, r16, 5 ; st r25, r26 }
9206    11f60:       [0-9a-f]*       { tblidxb0 r5, r6 ; shl2add r15, r16, r17 ; st1 r25, r26 }
9207    11f68:       [0-9a-f]*       { tblidxb0 r5, r6 ; mz r15, r16, r17 ; st2 r25, r26 }
9208    11f70:       [0-9a-f]*       { tblidxb0 r5, r6 ; info 19 ; st4 r25, r26 }
9209    11f78:       [0-9a-f]*       { tblidxb0 r5, r6 ; stnt_add r15, r16, 5 }
9210    11f80:       [0-9a-f]*       { tblidxb0 r5, r6 ; v1add r15, r16, r17 }
9211    11f88:       [0-9a-f]*       { tblidxb0 r5, r6 ; v2int_h r15, r16, r17 }
9212    11f90:       [0-9a-f]*       { tblidxb0 r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
9213    11f98:       [0-9a-f]*       { tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
9214    11fa0:       [0-9a-f]*       { tblidxb1 r5, r6 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
9215    11fa8:       [0-9a-f]*       { tblidxb1 r5, r6 ; andi r15, r16, 5 ; prefetch_l2 r25 }
9216    11fb0:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 }
9217    11fb8:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
9218    11fc0:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; st r25, r26 }
9219    11fc8:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; st1 r25, r26 }
9220    11fd0:       [0-9a-f]*       { tblidxb1 r5, r6 ; icoh r15 }
9221    11fd8:       [0-9a-f]*       { tblidxb1 r5, r6 ; inv r15 }
9222    11fe0:       [0-9a-f]*       { tblidxb1 r5, r6 ; jr r15 ; ld r25, r26 }
9223    11fe8:       [0-9a-f]*       { tblidxb1 r5, r6 ; addi r15, r16, 5 ; ld r25, r26 }
9224    11ff0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shru r15, r16, r17 ; ld r25, r26 }
9225    11ff8:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
9226    12000:       [0-9a-f]*       { tblidxb1 r5, r6 ; movei r15, 5 ; ld1u r25, r26 }
9227    12008:       [0-9a-f]*       { tblidxb1 r5, r6 ; ill ; ld2s r25, r26 }
9228    12010:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpeq r15, r16, r17 ; ld2u r25, r26 }
9229    12018:       [0-9a-f]*       { tblidxb1 r5, r6 ; ld2u r25, r26 }
9230    12020:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
9231    12028:       [0-9a-f]*       { tblidxb1 r5, r6 ; or r15, r16, r17 ; ld4u r25, r26 }
9232    12030:       [0-9a-f]*       { tblidxb1 r5, r6 ; lnk r15 ; ld2s r25, r26 }
9233    12038:       [0-9a-f]*       { tblidxb1 r5, r6 ; move r15, r16 ; ld2s r25, r26 }
9234    12040:       [0-9a-f]*       { tblidxb1 r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 }
9235    12048:       [0-9a-f]*       { tblidxb1 r5, r6 ; nor r15, r16, r17 ; ld4s r25, r26 }
9236    12050:       [0-9a-f]*       { tblidxb1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
9237    12058:       [0-9a-f]*       { tblidxb1 r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
9238    12060:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
9239    12068:       [0-9a-f]*       { tblidxb1 r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 }
9240    12070:       [0-9a-f]*       { tblidxb1 r5, r6 ; ill ; prefetch_l2 r25 }
9241    12078:       [0-9a-f]*       { tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
9242    12080:       [0-9a-f]*       { tblidxb1 r5, r6 ; prefetch_l3 r15 }
9243    12088:       [0-9a-f]*       { tblidxb1 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
9244    12090:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl r15, r16, r17 ; prefetch_l3_fault r25 }
9245    12098:       [0-9a-f]*       { tblidxb1 r5, r6 ; rotli r15, r16, 5 ; ld2u r25, r26 }
9246    120a0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
9247    120a8:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 }
9248    120b0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 }
9249    120b8:       [0-9a-f]*       { tblidxb1 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
9250    120c0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 }
9251    120c8:       [0-9a-f]*       { tblidxb1 r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
9252    120d0:       [0-9a-f]*       { tblidxb1 r5, r6 ; shl r15, r16, r17 ; st r25, r26 }
9253    120d8:       [0-9a-f]*       { tblidxb1 r5, r6 ; move r15, r16 ; st1 r25, r26 }
9254    120e0:       [0-9a-f]*       { tblidxb1 r5, r6 ; st2 r25, r26 }
9255    120e8:       [0-9a-f]*       { tblidxb1 r5, r6 ; andi r15, r16, 5 ; st4 r25, r26 }
9256    120f0:       [0-9a-f]*       { tblidxb1 r5, r6 ; xor r15, r16, r17 ; st4 r25, r26 }
9257    120f8:       [0-9a-f]*       { tblidxb1 r5, r6 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
9258    12100:       [0-9a-f]*       { tblidxb1 r5, r6 ; v2addi r15, r16, 5 }
9259    12108:       [0-9a-f]*       { tblidxb1 r5, r6 ; v4sub r15, r16, r17 }
9260    12110:       [0-9a-f]*       { tblidxb2 r5, r6 ; add r15, r16, r17 ; st4 r25, r26 }
9261    12118:       [0-9a-f]*       { tblidxb2 r5, r6 ; addx r15, r16, r17 }
9262    12120:       [0-9a-f]*       { tblidxb2 r5, r6 ; and r15, r16, r17 }
9263    12128:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
9264    12130:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
9265    12138:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 }
9266    12140:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
9267    12148:       [0-9a-f]*       { tblidxb2 r5, r6 ; prefetch r25 }
9268    12150:       [0-9a-f]*       { tblidxb2 r5, r6 ; info 19 ; prefetch_l1_fault r25 }
9269    12158:       [0-9a-f]*       { tblidxb2 r5, r6 ; jalrp r15 ; prefetch r25 }
9270    12160:       [0-9a-f]*       { tblidxb2 r5, r6 ; jrp r15 ; prefetch_l2 r25 }
9271    12168:       [0-9a-f]*       { tblidxb2 r5, r6 ; rotli r15, r16, 5 ; ld r25, r26 }
9272    12170:       [0-9a-f]*       { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld1s r25, r26 }
9273    12178:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld1u r25, r26 }
9274    12180:       [0-9a-f]*       { tblidxb2 r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
9275    12188:       [0-9a-f]*       { tblidxb2 r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 }
9276    12190:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
9277    12198:       [0-9a-f]*       { tblidxb2 r5, r6 ; nop ; ld4s r25, r26 }
9278    121a0:       [0-9a-f]*       { tblidxb2 r5, r6 ; jalr r15 ; ld4u r25, r26 }
9279    121a8:       [0-9a-f]*       { tblidxb2 r5, r6 ; ldnt2s_add r15, r16, 5 }
9280    121b0:       [0-9a-f]*       { tblidxb2 r5, r6 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
9281    121b8:       [0-9a-f]*       { tblidxb2 r5, r6 ; movei r15, 5 ; prefetch_l3_fault r25 }
9282    121c0:       [0-9a-f]*       { tblidxb2 r5, r6 ; nop ; prefetch_l3_fault r25 }
9283    121c8:       [0-9a-f]*       { tblidxb2 r5, r6 ; or r15, r16, r17 ; st1 r25, r26 }
9284    121d0:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 }
9285    121d8:       [0-9a-f]*       { tblidxb2 r5, r6 ; jrp r15 ; prefetch r25 }
9286    121e0:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
9287    121e8:       [0-9a-f]*       { tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch_l2 r25 }
9288    121f0:       [0-9a-f]*       { tblidxb2 r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 }
9289    121f8:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
9290    12200:       [0-9a-f]*       { tblidxb2 r5, r6 ; or r15, r16, r17 ; prefetch_l3 r25 }
9291    12208:       [0-9a-f]*       { tblidxb2 r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
9292    12210:       [0-9a-f]*       { tblidxb2 r5, r6 ; rotl r15, r16, r17 ; prefetch_l3 r25 }
9293    12218:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl r15, r16, r17 ; st r25, r26 }
9294    12220:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl1addx r15, r16, r17 ; st1 r25, r26 }
9295    12228:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
9296    12230:       [0-9a-f]*       { tblidxb2 r5, r6 ; shli r15, r16, 5 ; ld r25, r26 }
9297    12238:       [0-9a-f]*       { tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 }
9298    12240:       [0-9a-f]*       { tblidxb2 r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 }
9299    12248:       [0-9a-f]*       { tblidxb2 r5, r6 ; jrp r15 ; st r25, r26 }
9300    12250:       [0-9a-f]*       { tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
9301    12258:       [0-9a-f]*       { tblidxb2 r5, r6 ; addxi r15, r16, 5 ; st2 r25, r26 }
9302    12260:       [0-9a-f]*       { tblidxb2 r5, r6 ; sub r15, r16, r17 ; st2 r25, r26 }
9303    12268:       [0-9a-f]*       { tblidxb2 r5, r6 ; shl2add r15, r16, r17 ; st4 r25, r26 }
9304    12270:       [0-9a-f]*       { tblidxb2 r5, r6 ; sub r15, r16, r17 ; st4 r25, r26 }
9305    12278:       [0-9a-f]*       { tblidxb2 r5, r6 ; v1mnz r15, r16, r17 }
9306    12280:       [0-9a-f]*       { tblidxb2 r5, r6 ; v2sub r15, r16, r17 }
9307    12288:       [0-9a-f]*       { tblidxb3 r5, r6 ; add r15, r16, r17 ; ld4u r25, r26 }
9308    12290:       [0-9a-f]*       { tblidxb3 r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
9309    12298:       [0-9a-f]*       { tblidxb3 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
9310    122a0:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
9311    122a8:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
9312    122b0:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
9313    122b8:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
9314    122c0:       [0-9a-f]*       { tblidxb3 r5, r6 ; finv r15 }
9315    122c8:       [0-9a-f]*       { tblidxb3 r5, r6 ; ill ; st4 r25, r26 }
9316    122d0:       [0-9a-f]*       { tblidxb3 r5, r6 ; jalr r15 ; st2 r25, r26 }
9317    122d8:       [0-9a-f]*       { tblidxb3 r5, r6 ; jr r15 }
9318    122e0:       [0-9a-f]*       { tblidxb3 r5, r6 ; jr r15 ; ld r25, r26 }
9319    122e8:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
9320    122f0:       [0-9a-f]*       { tblidxb3 r5, r6 ; addx r15, r16, r17 ; ld1u r25, r26 }
9321    122f8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 }
9322    12300:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
9323    12308:       [0-9a-f]*       { tblidxb3 r5, r6 ; movei r15, 5 ; ld2u r25, r26 }
9324    12310:       [0-9a-f]*       { tblidxb3 r5, r6 ; ill ; ld4s r25, r26 }
9325    12318:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
9326    12320:       [0-9a-f]*       { tblidxb3 r5, r6 ; ld4u r25, r26 }
9327    12328:       [0-9a-f]*       { tblidxb3 r5, r6 ; mnz r15, r16, r17 ; ld r25, r26 }
9328    12330:       [0-9a-f]*       { tblidxb3 r5, r6 ; movei r15, 5 ; ld1u r25, r26 }
9329    12338:       [0-9a-f]*       { tblidxb3 r5, r6 ; nop ; ld1u r25, r26 }
9330    12340:       [0-9a-f]*       { tblidxb3 r5, r6 ; or r15, r16, r17 ; ld2u r25, r26 }
9331    12348:       [0-9a-f]*       { tblidxb3 r5, r6 ; move r15, r16 ; prefetch r25 }
9332    12350:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpleu r15, r16, r17 ; prefetch r25 }
9333    12358:       [0-9a-f]*       { tblidxb3 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
9334    12360:       [0-9a-f]*       { tblidxb3 r5, r6 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
9335    12368:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
9336    12370:       [0-9a-f]*       { tblidxb3 r5, r6 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
9337    12378:       [0-9a-f]*       { tblidxb3 r5, r6 ; jalr r15 ; prefetch_l3 r25 }
9338    12380:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
9339    12388:       [0-9a-f]*       { tblidxb3 r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 }
9340    12390:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld2s r25, r26 }
9341    12398:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
9342    123a0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
9343    123a8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch r25 }
9344    123b0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
9345    123b8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shru r15, r16, r17 ; prefetch_l2 r25 }
9346    123c0:       [0-9a-f]*       { tblidxb3 r5, r6 ; cmpleu r15, r16, r17 ; st r25, r26 }
9347    123c8:       [0-9a-f]*       { tblidxb3 r5, r6 ; addi r15, r16, 5 ; st1 r25, r26 }
9348    123d0:       [0-9a-f]*       { tblidxb3 r5, r6 ; shru r15, r16, r17 ; st1 r25, r26 }
9349    123d8:       [0-9a-f]*       { tblidxb3 r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 }
9350    123e0:       [0-9a-f]*       { tblidxb3 r5, r6 ; move r15, r16 ; st4 r25, r26 }
9351    123e8:       [0-9a-f]*       { tblidxb3 r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 }
9352    123f0:       [0-9a-f]*       { tblidxb3 r5, r6 ; v1cmplts r15, r16, r17 }
9353    123f8:       [0-9a-f]*       { tblidxb3 r5, r6 ; v2mz r15, r16, r17 }
9354    12400:       [0-9a-f]*       { tblidxb3 r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 }
9355    12408:       [0-9a-f]*       { v1add r15, r16, r17 ; dblalign2 r5, r6, r7 }
9356    12410:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; v1add r15, r16, r17 }
9357    12418:       [0-9a-f]*       { tblidxb1 r5, r6 ; v1add r15, r16, r17 }
9358    12420:       [0-9a-f]*       { v1add r15, r16, r17 ; v1shl r5, r6, r7 }
9359    12428:       [0-9a-f]*       { v2sads r5, r6, r7 ; v1add r15, r16, r17 }
9360    12430:       [0-9a-f]*       { v1add r5, r6, r7 ; cmpltsi r15, r16, 5 }
9361    12438:       [0-9a-f]*       { v1add r5, r6, r7 ; ld2u_add r15, r16, 5 }
9362    12440:       [0-9a-f]*       { v1add r5, r6, r7 ; prefetch_add_l3 r15, 5 }
9363    12448:       [0-9a-f]*       { v1add r5, r6, r7 ; stnt2_add r15, r16, 5 }
9364    12450:       [0-9a-f]*       { v1add r5, r6, r7 ; v2cmples r15, r16, r17 }
9365    12458:       [0-9a-f]*       { v1add r5, r6, r7 ; xori r15, r16, 5 }
9366    12460:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; v1addi r15, r16, 5 }
9367    12468:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; v1addi r15, r16, 5 }
9368    12470:       [0-9a-f]*       { v1addi r15, r16, 5 ; v1addi r5, r6, 5 }
9369    12478:       [0-9a-f]*       { v1addi r15, r16, 5 ; v1shru r5, r6, r7 }
9370    12480:       [0-9a-f]*       { v1addi r15, r16, 5 ; v2shlsc r5, r6, r7 }
9371    12488:       [0-9a-f]*       { v1addi r5, r6, 5 ; dblalign2 r15, r16, r17 }
9372    12490:       [0-9a-f]*       { v1addi r5, r6, 5 ; ld4u_add r15, r16, 5 }
9373    12498:       [0-9a-f]*       { v1addi r5, r6, 5 ; prefetch_l2 r15 }
9374    124a0:       [0-9a-f]*       { v1addi r5, r6, 5 ; sub r15, r16, r17 }
9375    124a8:       [0-9a-f]*       { v1addi r5, r6, 5 ; v2cmpltu r15, r16, r17 }
9376    124b0:       [0-9a-f]*       { v1adduc r15, r16, r17 ; addx r5, r6, r7 }
9377    124b8:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; v1adduc r15, r16, r17 }
9378    124c0:       [0-9a-f]*       { v1adduc r15, r16, r17 ; mz r5, r6, r7 }
9379    124c8:       [0-9a-f]*       { v1adduc r15, r16, r17 ; v1cmpeq r5, r6, r7 }
9380    124d0:       [0-9a-f]*       { v1adduc r15, r16, r17 ; v2add r5, r6, r7 }
9381    124d8:       [0-9a-f]*       { v1adduc r15, r16, r17 ; v2shrui r5, r6, 5 }
9382    124e0:       [0-9a-f]*       { v1adduc r5, r6, r7 ; exch r15, r16, r17 }
9383    124e8:       [0-9a-f]*       { v1adduc r5, r6, r7 ; ldnt r15, r16 }
9384    124f0:       [0-9a-f]*       { v1adduc r5, r6, r7 ; raise }
9385    124f8:       [0-9a-f]*       { v1adduc r5, r6, r7 ; v1addi r15, r16, 5 }
9386    12500:       [0-9a-f]*       { v1adduc r5, r6, r7 ; v2int_l r15, r16, r17 }
9387    12508:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; and r15, r16, r17 }
9388    12510:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; jrp r15 }
9389    12518:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; nop }
9390    12520:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; st2 r15, r16 }
9391    12528:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; v1shru r15, r16, r17 }
9392    12530:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; v4packsc r15, r16, r17 }
9393    12538:       [0-9a-f]*       { v1avgu r5, r6, r7 ; fetchand r15, r16, r17 }
9394    12540:       [0-9a-f]*       { v1avgu r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
9395    12548:       [0-9a-f]*       { v1avgu r5, r6, r7 ; shl1addx r15, r16, r17 }
9396    12550:       [0-9a-f]*       { v1avgu r5, r6, r7 ; v1cmplts r15, r16, r17 }
9397    12558:       [0-9a-f]*       { v1avgu r5, r6, r7 ; v2mz r15, r16, r17 }
9398    12560:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; v1cmpeq r15, r16, r17 }
9399    12568:       [0-9a-f]*       { fsingle_sub1 r5, r6, r7 ; v1cmpeq r15, r16, r17 }
9400    12570:       [0-9a-f]*       { v1cmpeq r15, r16, r17 ; shl r5, r6, r7 }
9401    12578:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; v1cmpeq r15, r16, r17 }
9402    12580:       [0-9a-f]*       { v1cmpeq r15, r16, r17 ; v2cmpltsi r5, r6, 5 }
9403    12588:       [0-9a-f]*       { v1cmpeq r15, r16, r17 ; v4shrs r5, r6, r7 }
9404    12590:       [0-9a-f]*       { v1cmpeq r5, r6, r7 ; finv r15 }
9405    12598:       [0-9a-f]*       { v1cmpeq r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
9406    125a0:       [0-9a-f]*       { v1cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 }
9407    125a8:       [0-9a-f]*       { v1cmpeq r5, r6, r7 ; v1cmpne r15, r16, r17 }
9408    125b0:       [0-9a-f]*       { v1cmpeq r5, r6, r7 ; v2shl r15, r16, r17 }
9409    125b8:       [0-9a-f]*       { v1cmpeqi r15, r16, 5 ; cmples r5, r6, r7 }
9410    125c0:       [0-9a-f]*       { v1cmpeqi r15, r16, 5 ; mnz r5, r6, r7 }
9411    125c8:       [0-9a-f]*       { v1cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 }
9412    125d0:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
9413    125d8:       [0-9a-f]*       { v2dotp r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
9414    125e0:       [0-9a-f]*       { v1cmpeqi r15, r16, 5 ; xor r5, r6, r7 }
9415    125e8:       [0-9a-f]*       { v1cmpeqi r5, r6, 5 ; icoh r15 }
9416    125f0:       [0-9a-f]*       { v1cmpeqi r5, r6, 5 ; lnk r15 }
9417    125f8:       [0-9a-f]*       { v1cmpeqi r5, r6, 5 ; shrs r15, r16, r17 }
9418    12600:       [0-9a-f]*       { v1cmpeqi r5, r6, 5 ; v1maxui r15, r16, 5 }
9419    12608:       [0-9a-f]*       { v1cmpeqi r5, r6, 5 ; v2shrsi r15, r16, 5 }
9420    12610:       [0-9a-f]*       { v1cmples r15, r16, r17 ; cmpltu r5, r6, r7 }
9421    12618:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; v1cmples r15, r16, r17 }
9422    12620:       [0-9a-f]*       { v1cmples r15, r16, r17 ; shli r5, r6, 5 }
9423    12628:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; v1cmples r15, r16, r17 }
9424    12630:       [0-9a-f]*       { v1cmples r15, r16, r17 ; v2maxs r5, r6, r7 }
9425    12638:       [0-9a-f]*       { v1cmples r5, r6, r7 ; addli r15, r16, 4660 }
9426    12640:       [0-9a-f]*       { v1cmples r5, r6, r7 ; inv r15 }
9427    12648:       [0-9a-f]*       { v1cmples r5, r6, r7 ; move r15, r16 }
9428    12650:       [0-9a-f]*       { v1cmples r5, r6, r7 ; shrux r15, r16, r17 }
9429    12658:       [0-9a-f]*       { v1cmples r5, r6, r7 ; v1mz r15, r16, r17 }
9430    12660:       [0-9a-f]*       { v1cmples r5, r6, r7 ; v2subsc r15, r16, r17 }
9431    12668:       [0-9a-f]*       { cmula r5, r6, r7 ; v1cmpleu r15, r16, r17 }
9432    12670:       [0-9a-f]*       { mul_hu_hu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
9433    12678:       [0-9a-f]*       { v1cmpleu r15, r16, r17 ; shrsi r5, r6, 5 }
9434    12680:       [0-9a-f]*       { v1cmpleu r15, r16, r17 ; v1maxui r5, r6, 5 }
9435    12688:       [0-9a-f]*       { v1cmpleu r15, r16, r17 ; v2mnz r5, r6, r7 }
9436    12690:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; addxsc r15, r16, r17 }
9437    12698:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; jr r15 }
9438    126a0:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; mz r15, r16, r17 }
9439    126a8:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; st1_add r15, r16, 5 }
9440    126b0:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; v1shrsi r15, r16, 5 }
9441    126b8:       [0-9a-f]*       { v1cmpleu r5, r6, r7 ; v4int_l r15, r16, r17 }
9442    126c0:       [0-9a-f]*       { cmulh r5, r6, r7 ; v1cmplts r15, r16, r17 }
9443    126c8:       [0-9a-f]*       { mul_ls_lu r5, r6, r7 ; v1cmplts r15, r16, r17 }
9444    126d0:       [0-9a-f]*       { v1cmplts r15, r16, r17 ; shruxi r5, r6, 5 }
9445    126d8:       [0-9a-f]*       { v1multu r5, r6, r7 ; v1cmplts r15, r16, r17 }
9446    126e0:       [0-9a-f]*       { v1cmplts r15, r16, r17 ; v2mz r5, r6, r7 }
9447    126e8:       [0-9a-f]*       { v1cmplts r5, r6, r7 ; cmpeqi r15, r16, 5 }
9448    126f0:       [0-9a-f]*       { v1cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 }
9449    126f8:       [0-9a-f]*       { v1cmplts r5, r6, r7 ; ori r15, r16, 5 }
9450    12700:       [0-9a-f]*       { v1cmplts r5, r6, r7 ; st4_add r15, r16, 5 }
9451    12708:       [0-9a-f]*       { v1cmplts r5, r6, r7 ; v1subuc r15, r16, r17 }
9452    12710:       [0-9a-f]*       { v1cmplts r5, r6, r7 ; v4shrs r15, r16, r17 }
9453    12718:       [0-9a-f]*       { ctz r5, r6 ; v1cmpltsi r15, r16, 5 }
9454    12720:       [0-9a-f]*       { mula_hs_ls r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
9455    12728:       [0-9a-f]*       { v1cmpltsi r15, r16, 5 ; subxsc r5, r6, r7 }
9456    12730:       [0-9a-f]*       { v1sadau r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
9457    12738:       [0-9a-f]*       { v2sadas r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
9458    12740:       [0-9a-f]*       { v1cmpltsi r5, r6, 5 ; cmpleu r15, r16, r17 }
9459    12748:       [0-9a-f]*       { v1cmpltsi r5, r6, 5 ; ld2s_add r15, r16, 5 }
9460    12750:       [0-9a-f]*       { v1cmpltsi r5, r6, 5 ; prefetch_add_l2 r15, 5 }
9461    12758:       [0-9a-f]*       { v1cmpltsi r5, r6, 5 ; stnt1_add r15, r16, 5 }
9462    12760:       [0-9a-f]*       { v1cmpltsi r5, r6, 5 ; v2cmpeq r15, r16, r17 }
9463    12768:       [0-9a-f]*       { v1cmpltsi r5, r6, 5 ; wh64 r15 }
9464    12770:       [0-9a-f]*       { v1cmpltu r15, r16, r17 ; dblalign6 r5, r6, r7 }
9465    12778:       [0-9a-f]*       { mula_hu_lu r5, r6, r7 ; v1cmpltu r15, r16, r17 }
9466    12780:       [0-9a-f]*       { tblidxb3 r5, r6 ; v1cmpltu r15, r16, r17 }
9467    12788:       [0-9a-f]*       { v1cmpltu r15, r16, r17 ; v1shrs r5, r6, r7 }
9468    12790:       [0-9a-f]*       { v1cmpltu r15, r16, r17 ; v2shl r5, r6, r7 }
9469    12798:       [0-9a-f]*       { v1cmpltu r5, r6, r7 ; cmpltui r15, r16, 5 }
9470    127a0:       [0-9a-f]*       { v1cmpltu r5, r6, r7 ; ld4s_add r15, r16, 5 }
9471    127a8:       [0-9a-f]*       { v1cmpltu r5, r6, r7 ; prefetch r15 }
9472    127b0:       [0-9a-f]*       { v1cmpltu r5, r6, r7 ; stnt4_add r15, r16, 5 }
9473    127b8:       [0-9a-f]*       { v1cmpltu r5, r6, r7 ; v2cmplts r15, r16, r17 }
9474    127c0:       [0-9a-f]*       { v1cmpltui r15, r16, 5 ; addi r5, r6, 5 }
9475    127c8:       [0-9a-f]*       { fdouble_pack1 r5, r6, r7 ; v1cmpltui r15, r16, 5 }
9476    127d0:       [0-9a-f]*       { mulax r5, r6, r7 ; v1cmpltui r15, r16, 5 }
9477    127d8:       [0-9a-f]*       { v1adiffu r5, r6, r7 ; v1cmpltui r15, r16, 5 }
9478    127e0:       [0-9a-f]*       { v1cmpltui r15, r16, 5 ; v1sub r5, r6, r7 }
9479    127e8:       [0-9a-f]*       { v1cmpltui r15, r16, 5 ; v2shrsi r5, r6, 5 }
9480    127f0:       [0-9a-f]*       { v1cmpltui r5, r6, 5 ; dblalign6 r15, r16, r17 }
9481    127f8:       [0-9a-f]*       { v1cmpltui r5, r6, 5 ; ldna r15, r16 }
9482    12800:       [0-9a-f]*       { v1cmpltui r5, r6, 5 ; prefetch_l3 r15 }
9483    12808:       [0-9a-f]*       { v1cmpltui r5, r6, 5 ; subxsc r15, r16, r17 }
9484    12810:       [0-9a-f]*       { v1cmpltui r5, r6, 5 ; v2cmpne r15, r16, r17 }
9485    12818:       [0-9a-f]*       { v1cmpne r15, r16, r17 ; addxli r5, r6, 4660 }
9486    12820:       [0-9a-f]*       { fdouble_unpack_min r5, r6, r7 ; v1cmpne r15, r16, r17 }
9487    12828:       [0-9a-f]*       { v1cmpne r15, r16, r17 ; nor r5, r6, r7 }
9488    12830:       [0-9a-f]*       { v1cmpne r15, r16, r17 ; v1cmples r5, r6, r7 }
9489    12838:       [0-9a-f]*       { v1cmpne r15, r16, r17 ; v2addsc r5, r6, r7 }
9490    12840:       [0-9a-f]*       { v1cmpne r15, r16, r17 ; v2subsc r5, r6, r7 }
9491    12848:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; fetchadd r15, r16, r17 }
9492    12850:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
9493    12858:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; rotli r15, r16, 5 }
9494    12860:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; v1cmpeq r15, r16, r17 }
9495    12868:       [0-9a-f]*       { v1cmpne r5, r6, r7 ; v2maxsi r15, r16, 5 }
9496    12870:       [0-9a-f]*       { v1ddotpu r5, r6, r7 ; cmpeq r15, r16, r17 }
9497    12878:       [0-9a-f]*       { v1ddotpu r5, r6, r7 ; ld1s r15, r16 }
9498    12880:       [0-9a-f]*       { v1ddotpu r5, r6, r7 ; or r15, r16, r17 }
9499    12888:       [0-9a-f]*       { v1ddotpu r5, r6, r7 ; st4 r15, r16 }
9500    12890:       [0-9a-f]*       { v1ddotpu r5, r6, r7 ; v1sub r15, r16, r17 }
9501    12898:       [0-9a-f]*       { v1ddotpu r5, r6, r7 ; v4shlsc r15, r16, r17 }
9502    128a0:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; fetchor r15, r16, r17 }
9503    128a8:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
9504    128b0:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; shl2addx r15, r16, r17 }
9505    128b8:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; v1cmpltu r15, r16, r17 }
9506    128c0:       [0-9a-f]*       { v1ddotpua r5, r6, r7 ; v2packl r15, r16, r17 }
9507    128c8:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; cmplts r15, r16, r17 }
9508    128d0:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; ld2u r15, r16 }
9509    128d8:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
9510    128e0:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; stnt2 r15, r16 }
9511    128e8:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
9512    128f0:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; xor r15, r16, r17 }
9513    128f8:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; icoh r15 }
9514    12900:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; lnk r15 }
9515    12908:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; shrs r15, r16, r17 }
9516    12910:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; v1maxui r15, r16, 5 }
9517    12918:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; v2shrsi r15, r16, 5 }
9518    12920:       [0-9a-f]*       { v1dotp r5, r6, r7 ; dblalign4 r15, r16, r17 }
9519    12928:       [0-9a-f]*       { v1dotp r5, r6, r7 ; ld_add r15, r16, 5 }
9520    12930:       [0-9a-f]*       { v1dotp r5, r6, r7 ; prefetch_l2_fault r15 }
9521    12938:       [0-9a-f]*       { v1dotp r5, r6, r7 ; subx r15, r16, r17 }
9522    12940:       [0-9a-f]*       { v1dotp r5, r6, r7 ; v2cmpltui r15, r16, 5 }
9523    12948:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; addxi r15, r16, 5 }
9524    12950:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; jalr r15 }
9525    12958:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; moveli r15, 4660 }
9526    12960:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; st r15, r16 }
9527    12968:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; v1shli r15, r16, 5 }
9528    12970:       [0-9a-f]*       { v1dotpa r5, r6, r7 ; v4addsc r15, r16, r17 }
9529    12978:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; fetchadd4 r15, r16, r17 }
9530    12980:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; ldnt1u r15, r16 }
9531    12988:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; shl r15, r16, r17 }
9532    12990:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
9533    12998:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; v2mins r15, r16, r17 }
9534    129a0:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; cmpeqi r15, r16, 5 }
9535    129a8:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; ld1s_add r15, r16, 5 }
9536    129b0:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; ori r15, r16, 5 }
9537    129b8:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; st4_add r15, r16, 5 }
9538    129c0:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; v1subuc r15, r16, r17 }
9539    129c8:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; v4shrs r15, r16, r17 }
9540    129d0:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; fetchor4 r15, r16, r17 }
9541    129d8:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; ldnt4s r15, r16 }
9542    129e0:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; shl3add r15, r16, r17 }
9543    129e8:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; v1cmpltui r15, r16, 5 }
9544    129f0:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; v2packuc r15, r16, r17 }
9545    129f8:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; cmpltsi r15, r16, 5 }
9546    12a00:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; ld2u_add r15, r16, 5 }
9547    12a08:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; prefetch_add_l3 r15, 5 }
9548    12a10:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; stnt2_add r15, r16, 5 }
9549    12a18:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; v2cmples r15, r16, r17 }
9550    12a20:       [0-9a-f]*       { v1dotpusa r5, r6, r7 ; xori r15, r16, 5 }
9551    12a28:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; v1int_h r15, r16, r17 }
9552    12a30:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; v1int_h r15, r16, r17 }
9553    12a38:       [0-9a-f]*       { v1int_h r15, r16, r17 ; v1addi r5, r6, 5 }
9554    12a40:       [0-9a-f]*       { v1int_h r15, r16, r17 ; v1shru r5, r6, r7 }
9555    12a48:       [0-9a-f]*       { v1int_h r15, r16, r17 ; v2shlsc r5, r6, r7 }
9556    12a50:       [0-9a-f]*       { v1int_h r5, r6, r7 ; dblalign2 r15, r16, r17 }
9557    12a58:       [0-9a-f]*       { v1int_h r5, r6, r7 ; ld4u_add r15, r16, 5 }
9558    12a60:       [0-9a-f]*       { v1int_h r5, r6, r7 ; prefetch_l2 r15 }
9559    12a68:       [0-9a-f]*       { v1int_h r5, r6, r7 ; sub r15, r16, r17 }
9560    12a70:       [0-9a-f]*       { v1int_h r5, r6, r7 ; v2cmpltu r15, r16, r17 }
9561    12a78:       [0-9a-f]*       { v1int_l r15, r16, r17 ; addx r5, r6, r7 }
9562    12a80:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; v1int_l r15, r16, r17 }
9563    12a88:       [0-9a-f]*       { v1int_l r15, r16, r17 ; mz r5, r6, r7 }
9564    12a90:       [0-9a-f]*       { v1int_l r15, r16, r17 ; v1cmpeq r5, r6, r7 }
9565    12a98:       [0-9a-f]*       { v1int_l r15, r16, r17 ; v2add r5, r6, r7 }
9566    12aa0:       [0-9a-f]*       { v1int_l r15, r16, r17 ; v2shrui r5, r6, 5 }
9567    12aa8:       [0-9a-f]*       { v1int_l r5, r6, r7 ; exch r15, r16, r17 }
9568    12ab0:       [0-9a-f]*       { v1int_l r5, r6, r7 ; ldnt r15, r16 }
9569    12ab8:       [0-9a-f]*       { v1int_l r5, r6, r7 ; raise }
9570    12ac0:       [0-9a-f]*       { v1int_l r5, r6, r7 ; v1addi r15, r16, 5 }
9571    12ac8:       [0-9a-f]*       { v1int_l r5, r6, r7 ; v2int_l r15, r16, r17 }
9572    12ad0:       [0-9a-f]*       { v1maxu r15, r16, r17 ; and r5, r6, r7 }
9573    12ad8:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; v1maxu r15, r16, r17 }
9574    12ae0:       [0-9a-f]*       { v1maxu r15, r16, r17 ; ori r5, r6, 5 }
9575    12ae8:       [0-9a-f]*       { v1maxu r15, r16, r17 ; v1cmplts r5, r6, r7 }
9576    12af0:       [0-9a-f]*       { v2avgs r5, r6, r7 ; v1maxu r15, r16, r17 }
9577    12af8:       [0-9a-f]*       { v1maxu r15, r16, r17 ; v4addsc r5, r6, r7 }
9578    12b00:       [0-9a-f]*       { v1maxu r5, r6, r7 ; fetchaddgez r15, r16, r17 }
9579    12b08:       [0-9a-f]*       { v1maxu r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
9580    12b10:       [0-9a-f]*       { v1maxu r5, r6, r7 ; shl16insli r15, r16, 4660 }
9581    12b18:       [0-9a-f]*       { v1maxu r5, r6, r7 ; v1cmples r15, r16, r17 }
9582    12b20:       [0-9a-f]*       { v1maxu r5, r6, r7 ; v2minsi r15, r16, 5 }
9583    12b28:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; v1maxui r15, r16, 5 }
9584    12b30:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; v1maxui r15, r16, 5 }
9585    12b38:       [0-9a-f]*       { v1maxui r15, r16, 5 ; rotl r5, r6, r7 }
9586    12b40:       [0-9a-f]*       { v1maxui r15, r16, 5 ; v1cmpne r5, r6, r7 }
9587    12b48:       [0-9a-f]*       { v1maxui r15, r16, 5 ; v2cmpleu r5, r6, r7 }
9588    12b50:       [0-9a-f]*       { v1maxui r15, r16, 5 ; v4shl r5, r6, r7 }
9589    12b58:       [0-9a-f]*       { v1maxui r5, r6, 5 ; fetchor r15, r16, r17 }
9590    12b60:       [0-9a-f]*       { v1maxui r5, r6, 5 ; ldnt2u_add r15, r16, 5 }
9591    12b68:       [0-9a-f]*       { v1maxui r5, r6, 5 ; shl2addx r15, r16, r17 }
9592    12b70:       [0-9a-f]*       { v1maxui r5, r6, 5 ; v1cmpltu r15, r16, r17 }
9593    12b78:       [0-9a-f]*       { v1maxui r5, r6, 5 ; v2packl r15, r16, r17 }
9594    12b80:       [0-9a-f]*       { v1minu r15, r16, r17 ; cmpeq r5, r6, r7 }
9595    12b88:       [0-9a-f]*       { v1minu r15, r16, r17 ; infol 4660 }
9596    12b90:       [0-9a-f]*       { v1minu r15, r16, r17 ; shl1add r5, r6, r7 }
9597    12b98:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; v1minu r15, r16, r17 }
9598    12ba0:       [0-9a-f]*       { v1minu r15, r16, r17 ; v2cmpltui r5, r6, 5 }
9599    12ba8:       [0-9a-f]*       { v1minu r15, r16, r17 ; v4sub r5, r6, r7 }
9600    12bb0:       [0-9a-f]*       { v1minu r5, r6, r7 ; flushwb }
9601    12bb8:       [0-9a-f]*       { v1minu r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
9602    12bc0:       [0-9a-f]*       { v1minu r5, r6, r7 ; shlx r15, r16, r17 }
9603    12bc8:       [0-9a-f]*       { v1minu r5, r6, r7 ; v1int_l r15, r16, r17 }
9604    12bd0:       [0-9a-f]*       { v1minu r5, r6, r7 ; v2shlsc r15, r16, r17 }
9605    12bd8:       [0-9a-f]*       { v1minui r15, r16, 5 ; cmplts r5, r6, r7 }
9606    12be0:       [0-9a-f]*       { v1minui r15, r16, 5 ; movei r5, 5 }
9607    12be8:       [0-9a-f]*       { v1minui r15, r16, 5 ; shl3add r5, r6, r7 }
9608    12bf0:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; v1minui r15, r16, 5 }
9609    12bf8:       [0-9a-f]*       { v1minui r15, r16, 5 ; v2int_h r5, r6, r7 }
9610    12c00:       [0-9a-f]*       { v1minui r5, r6, 5 ; add r15, r16, r17 }
9611    12c08:       [0-9a-f]*       { v1minui r5, r6, 5 ; info 19 }
9612    12c10:       [0-9a-f]*       { v1minui r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
9613    12c18:       [0-9a-f]*       { v1minui r5, r6, 5 ; shru r15, r16, r17 }
9614    12c20:       [0-9a-f]*       { v1minui r5, r6, 5 ; v1minui r15, r16, 5 }
9615    12c28:       [0-9a-f]*       { v1minui r5, r6, 5 ; v2shrui r15, r16, 5 }
9616    12c30:       [0-9a-f]*       { v1mnz r15, r16, r17 ; cmpne r5, r6, r7 }
9617    12c38:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; v1mnz r15, r16, r17 }
9618    12c40:       [0-9a-f]*       { v1mnz r15, r16, r17 ; shlxi r5, r6, 5 }
9619    12c48:       [0-9a-f]*       { v1mnz r15, r16, r17 ; v1int_l r5, r6, r7 }
9620    12c50:       [0-9a-f]*       { v1mnz r15, r16, r17 ; v2mins r5, r6, r7 }
9621    12c58:       [0-9a-f]*       { v1mnz r5, r6, r7 ; addxi r15, r16, 5 }
9622    12c60:       [0-9a-f]*       { v1mnz r5, r6, r7 ; jalr r15 }
9623    12c68:       [0-9a-f]*       { v1mnz r5, r6, r7 ; moveli r15, 4660 }
9624    12c70:       [0-9a-f]*       { v1mnz r5, r6, r7 ; st r15, r16 }
9625    12c78:       [0-9a-f]*       { v1mnz r5, r6, r7 ; v1shli r15, r16, 5 }
9626    12c80:       [0-9a-f]*       { v1mnz r5, r6, r7 ; v4addsc r15, r16, r17 }
9627    12c88:       [0-9a-f]*       { v1multu r5, r6, r7 ; fetchadd4 r15, r16, r17 }
9628    12c90:       [0-9a-f]*       { v1multu r5, r6, r7 ; ldnt1u r15, r16 }
9629    12c98:       [0-9a-f]*       { v1multu r5, r6, r7 ; shl r15, r16, r17 }
9630    12ca0:       [0-9a-f]*       { v1multu r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
9631    12ca8:       [0-9a-f]*       { v1multu r5, r6, r7 ; v2mins r15, r16, r17 }
9632    12cb0:       [0-9a-f]*       { v1mulu r5, r6, r7 ; cmpeqi r15, r16, 5 }
9633    12cb8:       [0-9a-f]*       { v1mulu r5, r6, r7 ; ld1s_add r15, r16, 5 }
9634    12cc0:       [0-9a-f]*       { v1mulu r5, r6, r7 ; ori r15, r16, 5 }
9635    12cc8:       [0-9a-f]*       { v1mulu r5, r6, r7 ; st4_add r15, r16, 5 }
9636    12cd0:       [0-9a-f]*       { v1mulu r5, r6, r7 ; v1subuc r15, r16, r17 }
9637    12cd8:       [0-9a-f]*       { v1mulu r5, r6, r7 ; v4shrs r15, r16, r17 }
9638    12ce0:       [0-9a-f]*       { v1mulus r5, r6, r7 ; fetchor4 r15, r16, r17 }
9639    12ce8:       [0-9a-f]*       { v1mulus r5, r6, r7 ; ldnt4s r15, r16 }
9640    12cf0:       [0-9a-f]*       { v1mulus r5, r6, r7 ; shl3add r15, r16, r17 }
9641    12cf8:       [0-9a-f]*       { v1mulus r5, r6, r7 ; v1cmpltui r15, r16, 5 }
9642    12d00:       [0-9a-f]*       { v1mulus r5, r6, r7 ; v2packuc r15, r16, r17 }
9643    12d08:       [0-9a-f]*       { v1mz r15, r16, r17 ; cmpeqi r5, r6, 5 }
9644    12d10:       [0-9a-f]*       { mm r5, r6, 5, 7 ; v1mz r15, r16, r17 }
9645    12d18:       [0-9a-f]*       { v1mz r15, r16, r17 ; shl1addx r5, r6, r7 }
9646    12d20:       [0-9a-f]*       { v1dotp r5, r6, r7 ; v1mz r15, r16, r17 }
9647    12d28:       [0-9a-f]*       { v1mz r15, r16, r17 ; v2cmpne r5, r6, r7 }
9648    12d30:       [0-9a-f]*       { v1mz r15, r16, r17 ; v4subsc r5, r6, r7 }
9649    12d38:       [0-9a-f]*       { v1mz r5, r6, r7 }
9650    12d40:       [0-9a-f]*       { v1mz r5, r6, r7 ; ldnt_add r15, r16, 5 }
9651    12d48:       [0-9a-f]*       { v1mz r5, r6, r7 ; shlxi r15, r16, 5 }
9652    12d50:       [0-9a-f]*       { v1mz r5, r6, r7 ; v1maxu r15, r16, r17 }
9653    12d58:       [0-9a-f]*       { v1mz r5, r6, r7 ; v2shrs r15, r16, r17 }
9654    12d60:       [0-9a-f]*       { v1sadau r5, r6, r7 ; dblalign2 r15, r16, r17 }
9655    12d68:       [0-9a-f]*       { v1sadau r5, r6, r7 ; ld4u_add r15, r16, 5 }
9656    12d70:       [0-9a-f]*       { v1sadau r5, r6, r7 ; prefetch_l2 r15 }
9657    12d78:       [0-9a-f]*       { v1sadau r5, r6, r7 ; sub r15, r16, r17 }
9658    12d80:       [0-9a-f]*       { v1sadau r5, r6, r7 ; v2cmpltu r15, r16, r17 }
9659    12d88:       [0-9a-f]*       { v1sadu r5, r6, r7 ; addx r15, r16, r17 }
9660    12d90:       [0-9a-f]*       { v1sadu r5, r6, r7 ; iret }
9661    12d98:       [0-9a-f]*       { v1sadu r5, r6, r7 ; movei r15, 5 }
9662    12da0:       [0-9a-f]*       { v1sadu r5, r6, r7 ; shruxi r15, r16, 5 }
9663    12da8:       [0-9a-f]*       { v1sadu r5, r6, r7 ; v1shl r15, r16, r17 }
9664    12db0:       [0-9a-f]*       { v1sadu r5, r6, r7 ; v4add r15, r16, r17 }
9665    12db8:       [0-9a-f]*       { cmulaf r5, r6, r7 ; v1shl r15, r16, r17 }
9666    12dc0:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; v1shl r15, r16, r17 }
9667    12dc8:       [0-9a-f]*       { v1shl r15, r16, r17 ; shru r5, r6, r7 }
9668    12dd0:       [0-9a-f]*       { v1shl r15, r16, r17 ; v1minu r5, r6, r7 }
9669    12dd8:       [0-9a-f]*       { v2mulfsc r5, r6, r7 ; v1shl r15, r16, r17 }
9670    12de0:       [0-9a-f]*       { v1shl r5, r6, r7 ; and r15, r16, r17 }
9671    12de8:       [0-9a-f]*       { v1shl r5, r6, r7 ; jrp r15 }
9672    12df0:       [0-9a-f]*       { v1shl r5, r6, r7 ; nop }
9673    12df8:       [0-9a-f]*       { v1shl r5, r6, r7 ; st2 r15, r16 }
9674    12e00:       [0-9a-f]*       { v1shl r5, r6, r7 ; v1shru r15, r16, r17 }
9675    12e08:       [0-9a-f]*       { v1shl r5, r6, r7 ; v4packsc r15, r16, r17 }
9676    12e10:       [0-9a-f]*       { cmulhr r5, r6, r7 ; v1shli r15, r16, 5 }
9677    12e18:       [0-9a-f]*       { mul_lu_lu r5, r6, r7 ; v1shli r15, r16, 5 }
9678    12e20:       [0-9a-f]*       { shufflebytes r5, r6, r7 ; v1shli r15, r16, 5 }
9679    12e28:       [0-9a-f]*       { v1mulu r5, r6, r7 ; v1shli r15, r16, 5 }
9680    12e30:       [0-9a-f]*       { v1shli r15, r16, 5 ; v2packh r5, r6, r7 }
9681    12e38:       [0-9a-f]*       { v1shli r5, r6, 5 ; cmpexch r15, r16, r17 }
9682    12e40:       [0-9a-f]*       { v1shli r5, r6, 5 ; ld1u r15, r16 }
9683    12e48:       [0-9a-f]*       { v1shli r5, r6, 5 ; prefetch r15 }
9684    12e50:       [0-9a-f]*       { v1shli r5, r6, 5 ; st_add r15, r16, 5 }
9685    12e58:       [0-9a-f]*       { v1shli r5, r6, 5 ; v2add r15, r16, r17 }
9686    12e60:       [0-9a-f]*       { v1shli r5, r6, 5 ; v4shru r15, r16, r17 }
9687    12e68:       [0-9a-f]*       { dblalign r5, r6, r7 ; v1shrs r15, r16, r17 }
9688    12e70:       [0-9a-f]*       { mula_hs_lu r5, r6, r7 ; v1shrs r15, r16, r17 }
9689    12e78:       [0-9a-f]*       { tblidxb0 r5, r6 ; v1shrs r15, r16, r17 }
9690    12e80:       [0-9a-f]*       { v1sadu r5, r6, r7 ; v1shrs r15, r16, r17 }
9691    12e88:       [0-9a-f]*       { v2sadau r5, r6, r7 ; v1shrs r15, r16, r17 }
9692    12e90:       [0-9a-f]*       { v1shrs r5, r6, r7 ; cmplts r15, r16, r17 }
9693    12e98:       [0-9a-f]*       { v1shrs r5, r6, r7 ; ld2u r15, r16 }
9694    12ea0:       [0-9a-f]*       { v1shrs r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
9695    12ea8:       [0-9a-f]*       { v1shrs r5, r6, r7 ; stnt2 r15, r16 }
9696    12eb0:       [0-9a-f]*       { v1shrs r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
9697    12eb8:       [0-9a-f]*       { v1shrs r5, r6, r7 ; xor r15, r16, r17 }
9698    12ec0:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; v1shrsi r15, r16, 5 }
9699    12ec8:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; v1shrsi r15, r16, 5 }
9700    12ed0:       [0-9a-f]*       { v1shrsi r15, r16, 5 ; v1add r5, r6, r7 }
9701    12ed8:       [0-9a-f]*       { v1shrsi r15, r16, 5 ; v1shrsi r5, r6, 5 }
9702    12ee0:       [0-9a-f]*       { v1shrsi r15, r16, 5 ; v2shli r5, r6, 5 }
9703    12ee8:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; cmpne r15, r16, r17 }
9704    12ef0:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; ld4u r15, r16 }
9705    12ef8:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; prefetch_l1_fault r15 }
9706    12f00:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; stnt_add r15, r16, 5 }
9707    12f08:       [0-9a-f]*       { v1shrsi r5, r6, 5 ; v2cmpltsi r15, r16, 5 }
9708    12f10:       [0-9a-f]*       { v1shru r15, r16, r17 ; addli r5, r6, 4660 }
9709    12f18:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; v1shru r15, r16, r17 }
9710    12f20:       [0-9a-f]*       { mulx r5, r6, r7 ; v1shru r15, r16, r17 }
9711    12f28:       [0-9a-f]*       { v1avgu r5, r6, r7 ; v1shru r15, r16, r17 }
9712    12f30:       [0-9a-f]*       { v1shru r15, r16, r17 ; v1subuc r5, r6, r7 }
9713    12f38:       [0-9a-f]*       { v1shru r15, r16, r17 ; v2shru r5, r6, r7 }
9714    12f40:       [0-9a-f]*       { v1shru r5, r6, r7 ; dtlbpr r15 }
9715    12f48:       [0-9a-f]*       { v1shru r5, r6, r7 ; ldna_add r15, r16, 5 }
9716    12f50:       [0-9a-f]*       { v1shru r5, r6, r7 ; prefetch_l3_fault r15 }
9717    12f58:       [0-9a-f]*       { v1shru r5, r6, r7 ; v1add r15, r16, r17 }
9718    12f60:       [0-9a-f]*       { v1shru r5, r6, r7 ; v2int_h r15, r16, r17 }
9719    12f68:       [0-9a-f]*       { v1shrui r15, r16, 5 ; addxsc r5, r6, r7 }
9720    12f70:       [0-9a-f]*       { v1shrui r15, r16, 5 }
9721    12f78:       [0-9a-f]*       { v1shrui r15, r16, 5 ; or r5, r6, r7 }
9722    12f80:       [0-9a-f]*       { v1shrui r15, r16, 5 ; v1cmpleu r5, r6, r7 }
9723    12f88:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; v1shrui r15, r16, 5 }
9724    12f90:       [0-9a-f]*       { v1shrui r15, r16, 5 ; v4add r5, r6, r7 }
9725    12f98:       [0-9a-f]*       { v1shrui r5, r6, 5 ; fetchadd4 r15, r16, r17 }
9726    12fa0:       [0-9a-f]*       { v1shrui r5, r6, 5 ; ldnt1u r15, r16 }
9727    12fa8:       [0-9a-f]*       { v1shrui r5, r6, 5 ; shl r15, r16, r17 }
9728    12fb0:       [0-9a-f]*       { v1shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 }
9729    12fb8:       [0-9a-f]*       { v1shrui r5, r6, 5 ; v2mins r15, r16, r17 }
9730    12fc0:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; v1sub r15, r16, r17 }
9731    12fc8:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; v1sub r15, r16, r17 }
9732    12fd0:       [0-9a-f]*       { revbytes r5, r6 ; v1sub r15, r16, r17 }
9733    12fd8:       [0-9a-f]*       { v1sub r15, r16, r17 ; v1cmpltui r5, r6, 5 }
9734    12fe0:       [0-9a-f]*       { v1sub r15, r16, r17 ; v2cmples r5, r6, r7 }
9735    12fe8:       [0-9a-f]*       { v1sub r15, r16, r17 ; v4packsc r5, r6, r7 }
9736    12ff0:       [0-9a-f]*       { v1sub r5, r6, r7 ; fetchand4 r15, r16, r17 }
9737    12ff8:       [0-9a-f]*       { v1sub r5, r6, r7 ; ldnt2u r15, r16 }
9738    13000:       [0-9a-f]*       { v1sub r5, r6, r7 ; shl2add r15, r16, r17 }
9739    13008:       [0-9a-f]*       { v1sub r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
9740    13010:       [0-9a-f]*       { v1sub r5, r6, r7 ; v2packh r15, r16, r17 }
9741    13018:       [0-9a-f]*       { cmovnez r5, r6, r7 ; v1subuc r15, r16, r17 }
9742    13020:       [0-9a-f]*       { v1subuc r15, r16, r17 ; info 19 }
9743    13028:       [0-9a-f]*       { v1subuc r15, r16, r17 ; shl16insli r5, r6, 4660 }
9744    13030:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; v1subuc r15, r16, r17 }
9745    13038:       [0-9a-f]*       { v1subuc r15, r16, r17 ; v2cmpltu r5, r6, r7 }
9746    13040:       [0-9a-f]*       { v1subuc r15, r16, r17 ; v4shru r5, r6, r7 }
9747    13048:       [0-9a-f]*       { v1subuc r5, r6, r7 ; flush r15 }
9748    13050:       [0-9a-f]*       { v1subuc r5, r6, r7 ; ldnt4u r15, r16 }
9749    13058:       [0-9a-f]*       { v1subuc r5, r6, r7 ; shli r15, r16, 5 }
9750    13060:       [0-9a-f]*       { v1subuc r5, r6, r7 ; v1int_h r15, r16, r17 }
9751    13068:       [0-9a-f]*       { v1subuc r5, r6, r7 ; v2shli r15, r16, 5 }
9752    13070:       [0-9a-f]*       { v2add r15, r16, r17 ; cmpleu r5, r6, r7 }
9753    13078:       [0-9a-f]*       { v2add r15, r16, r17 ; move r5, r6 }
9754    13080:       [0-9a-f]*       { v2add r15, r16, r17 ; shl2addx r5, r6, r7 }
9755    13088:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; v2add r15, r16, r17 }
9756    13090:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; v2add r15, r16, r17 }
9757    13098:       [0-9a-f]*       { v2add r15, r16, r17 ; xori r5, r6, 5 }
9758    130a0:       [0-9a-f]*       { v2add r5, r6, r7 ; ill }
9759    130a8:       [0-9a-f]*       { v2add r5, r6, r7 ; mf }
9760    130b0:       [0-9a-f]*       { v2add r5, r6, r7 ; shrsi r15, r16, 5 }
9761    130b8:       [0-9a-f]*       { v2add r5, r6, r7 ; v1minu r15, r16, r17 }
9762    130c0:       [0-9a-f]*       { v2add r5, r6, r7 ; v2shru r15, r16, r17 }
9763    130c8:       [0-9a-f]*       { v2addi r15, r16, 5 ; cmpltui r5, r6, 5 }
9764    130d0:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; v2addi r15, r16, 5 }
9765    130d8:       [0-9a-f]*       { v2addi r15, r16, 5 ; shlx r5, r6, r7 }
9766    130e0:       [0-9a-f]*       { v2addi r15, r16, 5 ; v1int_h r5, r6, r7 }
9767    130e8:       [0-9a-f]*       { v2addi r15, r16, 5 ; v2maxsi r5, r6, 5 }
9768    130f0:       [0-9a-f]*       { v2addi r5, r6, 5 ; addx r15, r16, r17 }
9769    130f8:       [0-9a-f]*       { v2addi r5, r6, 5 ; iret }
9770    13100:       [0-9a-f]*       { v2addi r5, r6, 5 ; movei r15, 5 }
9771    13108:       [0-9a-f]*       { v2addi r5, r6, 5 ; shruxi r15, r16, 5 }
9772    13110:       [0-9a-f]*       { v2addi r5, r6, 5 ; v1shl r15, r16, r17 }
9773    13118:       [0-9a-f]*       { v2addi r5, r6, 5 ; v4add r15, r16, r17 }
9774    13120:       [0-9a-f]*       { cmulaf r5, r6, r7 ; v2addsc r15, r16, r17 }
9775    13128:       [0-9a-f]*       { mul_hu_ls r5, r6, r7 ; v2addsc r15, r16, r17 }
9776    13130:       [0-9a-f]*       { v2addsc r15, r16, r17 ; shru r5, r6, r7 }
9777    13138:       [0-9a-f]*       { v2addsc r15, r16, r17 ; v1minu r5, r6, r7 }
9778    13140:       [0-9a-f]*       { v2mulfsc r5, r6, r7 ; v2addsc r15, r16, r17 }
9779    13148:       [0-9a-f]*       { v2addsc r5, r6, r7 ; and r15, r16, r17 }
9780    13150:       [0-9a-f]*       { v2addsc r5, r6, r7 ; jrp r15 }
9781    13158:       [0-9a-f]*       { v2addsc r5, r6, r7 ; nop }
9782    13160:       [0-9a-f]*       { v2addsc r5, r6, r7 ; st2 r15, r16 }
9783    13168:       [0-9a-f]*       { v2addsc r5, r6, r7 ; v1shru r15, r16, r17 }
9784    13170:       [0-9a-f]*       { v2addsc r5, r6, r7 ; v4packsc r15, r16, r17 }
9785    13178:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; fetchand r15, r16, r17 }
9786    13180:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
9787    13188:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; shl1addx r15, r16, r17 }
9788    13190:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; v1cmplts r15, r16, r17 }
9789    13198:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; v2mz r15, r16, r17 }
9790    131a0:       [0-9a-f]*       { v2avgs r5, r6, r7 ; cmples r15, r16, r17 }
9791    131a8:       [0-9a-f]*       { v2avgs r5, r6, r7 ; ld2s r15, r16 }
9792    131b0:       [0-9a-f]*       { v2avgs r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
9793    131b8:       [0-9a-f]*       { v2avgs r5, r6, r7 ; stnt1 r15, r16 }
9794    131c0:       [0-9a-f]*       { v2avgs r5, r6, r7 ; v2addsc r15, r16, r17 }
9795    131c8:       [0-9a-f]*       { v2avgs r5, r6, r7 ; v4subsc r15, r16, r17 }
9796    131d0:       [0-9a-f]*       { v2cmpeq r15, r16, r17 ; dblalign4 r5, r6, r7 }
9797    131d8:       [0-9a-f]*       { mula_hu_ls r5, r6, r7 ; v2cmpeq r15, r16, r17 }
9798    131e0:       [0-9a-f]*       { tblidxb2 r5, r6 ; v2cmpeq r15, r16, r17 }
9799    131e8:       [0-9a-f]*       { v2cmpeq r15, r16, r17 ; v1shli r5, r6, 5 }
9800    131f0:       [0-9a-f]*       { v2sadu r5, r6, r7 ; v2cmpeq r15, r16, r17 }
9801    131f8:       [0-9a-f]*       { v2cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 }
9802    13200:       [0-9a-f]*       { v2cmpeq r5, r6, r7 ; ld4s r15, r16 }
9803    13208:       [0-9a-f]*       { v2cmpeq r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
9804    13210:       [0-9a-f]*       { v2cmpeq r5, r6, r7 ; stnt4 r15, r16 }
9805    13218:       [0-9a-f]*       { v2cmpeq r5, r6, r7 ; v2cmpleu r15, r16, r17 }
9806    13220:       [0-9a-f]*       { v2cmpeqi r15, r16, 5 ; add r5, r6, r7 }
9807    13228:       [0-9a-f]*       { fdouble_mul_flags r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
9808    13230:       [0-9a-f]*       { mula_lu_lu r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
9809    13238:       [0-9a-f]*       { v2cmpeqi r15, r16, 5 ; v1adduc r5, r6, r7 }
9810    13240:       [0-9a-f]*       { v2cmpeqi r15, r16, 5 ; v1shrui r5, r6, 5 }
9811    13248:       [0-9a-f]*       { v2cmpeqi r15, r16, 5 ; v2shrs r5, r6, r7 }
9812    13250:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 ; dblalign4 r15, r16, r17 }
9813    13258:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 ; ld_add r15, r16, 5 }
9814    13260:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 ; prefetch_l2_fault r15 }
9815    13268:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 ; subx r15, r16, r17 }
9816    13270:       [0-9a-f]*       { v2cmpeqi r5, r6, 5 ; v2cmpltui r15, r16, 5 }
9817    13278:       [0-9a-f]*       { v2cmples r15, r16, r17 ; addxi r5, r6, 5 }
9818    13280:       [0-9a-f]*       { fdouble_unpack_max r5, r6, r7 ; v2cmples r15, r16, r17 }
9819    13288:       [0-9a-f]*       { v2cmples r15, r16, r17 ; nop }
9820    13290:       [0-9a-f]*       { v2cmples r15, r16, r17 ; v1cmpeqi r5, r6, 5 }
9821    13298:       [0-9a-f]*       { v2cmples r15, r16, r17 ; v2addi r5, r6, 5 }
9822    132a0:       [0-9a-f]*       { v2cmples r15, r16, r17 ; v2sub r5, r6, r7 }
9823    132a8:       [0-9a-f]*       { v2cmples r5, r6, r7 ; exch4 r15, r16, r17 }
9824    132b0:       [0-9a-f]*       { v2cmples r5, r6, r7 ; ldnt1s r15, r16 }
9825    132b8:       [0-9a-f]*       { v2cmples r5, r6, r7 ; rotl r15, r16, r17 }
9826    132c0:       [0-9a-f]*       { v2cmples r5, r6, r7 ; v1adduc r15, r16, r17 }
9827    132c8:       [0-9a-f]*       { v2cmples r5, r6, r7 ; v2maxs r15, r16, r17 }
9828    132d0:       [0-9a-f]*       { v2cmpleu r15, r16, r17 ; andi r5, r6, 5 }
9829    132d8:       [0-9a-f]*       { fsingle_addsub2 r5, r6, r7 ; v2cmpleu r15, r16, r17 }
9830    132e0:       [0-9a-f]*       { pcnt r5, r6 ; v2cmpleu r15, r16, r17 }
9831    132e8:       [0-9a-f]*       { v2cmpleu r15, r16, r17 ; v1cmpltsi r5, r6, 5 }
9832    132f0:       [0-9a-f]*       { v2cmpleu r15, r16, r17 ; v2cmpeq r5, r6, r7 }
9833    132f8:       [0-9a-f]*       { v2cmpleu r15, r16, r17 ; v4int_h r5, r6, r7 }
9834    13300:       [0-9a-f]*       { v2cmpleu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
9835    13308:       [0-9a-f]*       { v2cmpleu r5, r6, r7 ; ldnt2s r15, r16 }
9836    13310:       [0-9a-f]*       { v2cmpleu r5, r6, r7 ; shl1add r15, r16, r17 }
9837    13318:       [0-9a-f]*       { v2cmpleu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
9838    13320:       [0-9a-f]*       { v2cmpleu r5, r6, r7 ; v2mnz r15, r16, r17 }
9839    13328:       [0-9a-f]*       { clz r5, r6 ; v2cmplts r15, r16, r17 }
9840    13330:       [0-9a-f]*       { fsingle_pack2 r5, r6, r7 ; v2cmplts r15, r16, r17 }
9841    13338:       [0-9a-f]*       { v2cmplts r15, r16, r17 ; rotli r5, r6, 5 }
9842    13340:       [0-9a-f]*       { v1ddotpu r5, r6, r7 ; v2cmplts r15, r16, r17 }
9843    13348:       [0-9a-f]*       { v2cmplts r15, r16, r17 ; v2cmplts r5, r6, r7 }
9844    13350:       [0-9a-f]*       { v2cmplts r15, r16, r17 ; v4shlsc r5, r6, r7 }
9845    13358:       [0-9a-f]*       { v2cmplts r5, r6, r7 ; fetchor4 r15, r16, r17 }
9846    13360:       [0-9a-f]*       { v2cmplts r5, r6, r7 ; ldnt4s r15, r16 }
9847    13368:       [0-9a-f]*       { v2cmplts r5, r6, r7 ; shl3add r15, r16, r17 }
9848    13370:       [0-9a-f]*       { v2cmplts r5, r6, r7 ; v1cmpltui r15, r16, 5 }
9849    13378:       [0-9a-f]*       { v2cmplts r5, r6, r7 ; v2packuc r15, r16, r17 }
9850    13380:       [0-9a-f]*       { v2cmpltsi r15, r16, 5 ; cmpeqi r5, r6, 5 }
9851    13388:       [0-9a-f]*       { mm r5, r6, 5, 7 ; v2cmpltsi r15, r16, 5 }
9852    13390:       [0-9a-f]*       { v2cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 }
9853    13398:       [0-9a-f]*       { v1dotp r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
9854    133a0:       [0-9a-f]*       { v2cmpltsi r15, r16, 5 ; v2cmpne r5, r6, r7 }
9855    133a8:       [0-9a-f]*       { v2cmpltsi r15, r16, 5 ; v4subsc r5, r6, r7 }
9856    133b0:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 }
9857    133b8:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; ldnt_add r15, r16, 5 }
9858    133c0:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; shlxi r15, r16, 5 }
9859    133c8:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; v1maxu r15, r16, r17 }
9860    133d0:       [0-9a-f]*       { v2cmpltsi r5, r6, 5 ; v2shrs r15, r16, r17 }
9861    133d8:       [0-9a-f]*       { v2cmpltu r15, r16, r17 ; cmpltsi r5, r6, 5 }
9862    133e0:       [0-9a-f]*       { v2cmpltu r15, r16, r17 ; moveli r5, 4660 }
9863    133e8:       [0-9a-f]*       { v2cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 }
9864    133f0:       [0-9a-f]*       { v1dotpus r5, r6, r7 ; v2cmpltu r15, r16, r17 }
9865    133f8:       [0-9a-f]*       { v2cmpltu r15, r16, r17 ; v2int_l r5, r6, r7 }
9866    13400:       [0-9a-f]*       { v2cmpltu r5, r6, r7 ; addi r15, r16, 5 }
9867    13408:       [0-9a-f]*       { v2cmpltu r5, r6, r7 ; infol 4660 }
9868    13410:       [0-9a-f]*       { v2cmpltu r5, r6, r7 ; mnz r15, r16, r17 }
9869    13418:       [0-9a-f]*       { v2cmpltu r5, r6, r7 ; shrui r15, r16, 5 }
9870    13420:       [0-9a-f]*       { v2cmpltu r5, r6, r7 ; v1mnz r15, r16, r17 }
9871    13428:       [0-9a-f]*       { v2cmpltu r5, r6, r7 ; v2sub r15, r16, r17 }
9872    13430:       [0-9a-f]*       { cmul r5, r6, r7 ; v2cmpltui r15, r16, 5 }
9873    13438:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; v2cmpltui r15, r16, 5 }
9874    13440:       [0-9a-f]*       { v2cmpltui r15, r16, 5 ; shrs r5, r6, r7 }
9875    13448:       [0-9a-f]*       { v2cmpltui r15, r16, 5 ; v1maxu r5, r6, r7 }
9876    13450:       [0-9a-f]*       { v2cmpltui r15, r16, 5 ; v2minsi r5, r6, 5 }
9877    13458:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; addxli r15, r16, 4660 }
9878    13460:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; jalrp r15 }
9879    13468:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
9880    13470:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; st1 r15, r16 }
9881    13478:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; v1shrs r15, r16, r17 }
9882    13480:       [0-9a-f]*       { v2cmpltui r5, r6, 5 ; v4int_h r15, r16, r17 }
9883    13488:       [0-9a-f]*       { cmulfr r5, r6, r7 ; v2cmpne r15, r16, r17 }
9884    13490:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; v2cmpne r15, r16, r17 }
9885    13498:       [0-9a-f]*       { v2cmpne r15, r16, r17 ; shrux r5, r6, r7 }
9886    134a0:       [0-9a-f]*       { v2cmpne r15, r16, r17 ; v1mnz r5, r6, r7 }
9887    134a8:       [0-9a-f]*       { v2mults r5, r6, r7 ; v2cmpne r15, r16, r17 }
9888    134b0:       [0-9a-f]*       { v2cmpne r5, r6, r7 ; cmpeq r15, r16, r17 }
9889    134b8:       [0-9a-f]*       { v2cmpne r5, r6, r7 ; ld1s r15, r16 }
9890    134c0:       [0-9a-f]*       { v2cmpne r5, r6, r7 ; or r15, r16, r17 }
9891    134c8:       [0-9a-f]*       { v2cmpne r5, r6, r7 ; st4 r15, r16 }
9892    134d0:       [0-9a-f]*       { v2cmpne r5, r6, r7 ; v1sub r15, r16, r17 }
9893    134d8:       [0-9a-f]*       { v2cmpne r5, r6, r7 ; v4shlsc r15, r16, r17 }
9894    134e0:       [0-9a-f]*       { v2dotp r5, r6, r7 ; fetchor r15, r16, r17 }
9895    134e8:       [0-9a-f]*       { v2dotp r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
9896    134f0:       [0-9a-f]*       { v2dotp r5, r6, r7 ; shl2addx r15, r16, r17 }
9897    134f8:       [0-9a-f]*       { v2dotp r5, r6, r7 ; v1cmpltu r15, r16, r17 }
9898    13500:       [0-9a-f]*       { v2dotp r5, r6, r7 ; v2packl r15, r16, r17 }
9899    13508:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; cmplts r15, r16, r17 }
9900    13510:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; ld2u r15, r16 }
9901    13518:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
9902    13520:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; stnt2 r15, r16 }
9903    13528:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
9904    13530:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; xor r15, r16, r17 }
9905    13538:       [0-9a-f]*       { fdouble_add_flags r5, r6, r7 ; v2int_h r15, r16, r17 }
9906    13540:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; v2int_h r15, r16, r17 }
9907    13548:       [0-9a-f]*       { v2int_h r15, r16, r17 ; v1add r5, r6, r7 }
9908    13550:       [0-9a-f]*       { v2int_h r15, r16, r17 ; v1shrsi r5, r6, 5 }
9909    13558:       [0-9a-f]*       { v2int_h r15, r16, r17 ; v2shli r5, r6, 5 }
9910    13560:       [0-9a-f]*       { v2int_h r5, r6, r7 ; cmpne r15, r16, r17 }
9911    13568:       [0-9a-f]*       { v2int_h r5, r6, r7 ; ld4u r15, r16 }
9912    13570:       [0-9a-f]*       { v2int_h r5, r6, r7 ; prefetch_l1_fault r15 }
9913    13578:       [0-9a-f]*       { v2int_h r5, r6, r7 ; stnt_add r15, r16, 5 }
9914    13580:       [0-9a-f]*       { v2int_h r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
9915    13588:       [0-9a-f]*       { v2int_l r15, r16, r17 ; addli r5, r6, 4660 }
9916    13590:       [0-9a-f]*       { fdouble_pack2 r5, r6, r7 ; v2int_l r15, r16, r17 }
9917    13598:       [0-9a-f]*       { mulx r5, r6, r7 ; v2int_l r15, r16, r17 }
9918    135a0:       [0-9a-f]*       { v1avgu r5, r6, r7 ; v2int_l r15, r16, r17 }
9919    135a8:       [0-9a-f]*       { v2int_l r15, r16, r17 ; v1subuc r5, r6, r7 }
9920    135b0:       [0-9a-f]*       { v2int_l r15, r16, r17 ; v2shru r5, r6, r7 }
9921    135b8:       [0-9a-f]*       { v2int_l r5, r6, r7 ; dtlbpr r15 }
9922    135c0:       [0-9a-f]*       { v2int_l r5, r6, r7 ; ldna_add r15, r16, 5 }
9923    135c8:       [0-9a-f]*       { v2int_l r5, r6, r7 ; prefetch_l3_fault r15 }
9924    135d0:       [0-9a-f]*       { v2int_l r5, r6, r7 ; v1add r15, r16, r17 }
9925    135d8:       [0-9a-f]*       { v2int_l r5, r6, r7 ; v2int_h r15, r16, r17 }
9926    135e0:       [0-9a-f]*       { v2maxs r15, r16, r17 ; addxsc r5, r6, r7 }
9927    135e8:       [0-9a-f]*       { v2maxs r15, r16, r17 }
9928    135f0:       [0-9a-f]*       { v2maxs r15, r16, r17 ; or r5, r6, r7 }
9929    135f8:       [0-9a-f]*       { v2maxs r15, r16, r17 ; v1cmpleu r5, r6, r7 }
9930    13600:       [0-9a-f]*       { v2adiffs r5, r6, r7 ; v2maxs r15, r16, r17 }
9931    13608:       [0-9a-f]*       { v2maxs r15, r16, r17 ; v4add r5, r6, r7 }
9932    13610:       [0-9a-f]*       { v2maxs r5, r6, r7 ; fetchadd4 r15, r16, r17 }
9933    13618:       [0-9a-f]*       { v2maxs r5, r6, r7 ; ldnt1u r15, r16 }
9934    13620:       [0-9a-f]*       { v2maxs r5, r6, r7 ; shl r15, r16, r17 }
9935    13628:       [0-9a-f]*       { v2maxs r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
9936    13630:       [0-9a-f]*       { v2maxs r5, r6, r7 ; v2mins r15, r16, r17 }
9937    13638:       [0-9a-f]*       { bfextu r5, r6, 5, 7 ; v2maxsi r15, r16, 5 }
9938    13640:       [0-9a-f]*       { fsingle_mul2 r5, r6, r7 ; v2maxsi r15, r16, 5 }
9939    13648:       [0-9a-f]*       { revbytes r5, r6 ; v2maxsi r15, r16, 5 }
9940    13650:       [0-9a-f]*       { v2maxsi r15, r16, 5 ; v1cmpltui r5, r6, 5 }
9941    13658:       [0-9a-f]*       { v2maxsi r15, r16, 5 ; v2cmples r5, r6, r7 }
9942    13660:       [0-9a-f]*       { v2maxsi r15, r16, 5 ; v4packsc r5, r6, r7 }
9943    13668:       [0-9a-f]*       { v2maxsi r5, r6, 5 ; fetchand4 r15, r16, r17 }
9944    13670:       [0-9a-f]*       { v2maxsi r5, r6, 5 ; ldnt2u r15, r16 }
9945    13678:       [0-9a-f]*       { v2maxsi r5, r6, 5 ; shl2add r15, r16, r17 }
9946    13680:       [0-9a-f]*       { v2maxsi r5, r6, 5 ; v1cmpltsi r15, r16, 5 }
9947    13688:       [0-9a-f]*       { v2maxsi r5, r6, 5 ; v2packh r15, r16, r17 }
9948    13690:       [0-9a-f]*       { cmovnez r5, r6, r7 ; v2mins r15, r16, r17 }
9949    13698:       [0-9a-f]*       { v2mins r15, r16, r17 ; info 19 }
9950    136a0:       [0-9a-f]*       { v2mins r15, r16, r17 ; shl16insli r5, r6, 4660 }
9951    136a8:       [0-9a-f]*       { v1ddotpus r5, r6, r7 ; v2mins r15, r16, r17 }
9952    136b0:       [0-9a-f]*       { v2mins r15, r16, r17 ; v2cmpltu r5, r6, r7 }
9953    136b8:       [0-9a-f]*       { v2mins r15, r16, r17 ; v4shru r5, r6, r7 }
9954    136c0:       [0-9a-f]*       { v2mins r5, r6, r7 ; flush r15 }
9955    136c8:       [0-9a-f]*       { v2mins r5, r6, r7 ; ldnt4u r15, r16 }
9956    136d0:       [0-9a-f]*       { v2mins r5, r6, r7 ; shli r15, r16, 5 }
9957    136d8:       [0-9a-f]*       { v2mins r5, r6, r7 ; v1int_h r15, r16, r17 }
9958    136e0:       [0-9a-f]*       { v2mins r5, r6, r7 ; v2shli r15, r16, 5 }
9959    136e8:       [0-9a-f]*       { v2minsi r15, r16, 5 ; cmpleu r5, r6, r7 }
9960    136f0:       [0-9a-f]*       { v2minsi r15, r16, 5 ; move r5, r6 }
9961    136f8:       [0-9a-f]*       { v2minsi r15, r16, 5 ; shl2addx r5, r6, r7 }
9962    13700:       [0-9a-f]*       { v1dotpu r5, r6, r7 ; v2minsi r15, r16, 5 }
9963    13708:       [0-9a-f]*       { v2dotpa r5, r6, r7 ; v2minsi r15, r16, 5 }
9964    13710:       [0-9a-f]*       { v2minsi r15, r16, 5 ; xori r5, r6, 5 }
9965    13718:       [0-9a-f]*       { v2minsi r5, r6, 5 ; ill }
9966    13720:       [0-9a-f]*       { v2minsi r5, r6, 5 ; mf }
9967    13728:       [0-9a-f]*       { v2minsi r5, r6, 5 ; shrsi r15, r16, 5 }
9968    13730:       [0-9a-f]*       { v2minsi r5, r6, 5 ; v1minu r15, r16, r17 }
9969    13738:       [0-9a-f]*       { v2minsi r5, r6, 5 ; v2shru r15, r16, r17 }
9970    13740:       [0-9a-f]*       { v2mnz r15, r16, r17 ; cmpltui r5, r6, 5 }
9971    13748:       [0-9a-f]*       { mul_hs_hu r5, r6, r7 ; v2mnz r15, r16, r17 }
9972    13750:       [0-9a-f]*       { v2mnz r15, r16, r17 ; shlx r5, r6, r7 }
9973    13758:       [0-9a-f]*       { v2mnz r15, r16, r17 ; v1int_h r5, r6, r7 }
9974    13760:       [0-9a-f]*       { v2mnz r15, r16, r17 ; v2maxsi r5, r6, 5 }
9975    13768:       [0-9a-f]*       { v2mnz r5, r6, r7 ; addx r15, r16, r17 }
9976    13770:       [0-9a-f]*       { v2mnz r5, r6, r7 ; iret }
9977    13778:       [0-9a-f]*       { v2mnz r5, r6, r7 ; movei r15, 5 }
9978    13780:       [0-9a-f]*       { v2mnz r5, r6, r7 ; shruxi r15, r16, 5 }
9979    13788:       [0-9a-f]*       { v2mnz r5, r6, r7 ; v1shl r15, r16, r17 }
9980    13790:       [0-9a-f]*       { v2mnz r5, r6, r7 ; v4add r15, r16, r17 }
9981    13798:       [0-9a-f]*       { v2mulfsc r5, r6, r7 ; fetchadd r15, r16, r17 }
9982    137a0:       [0-9a-f]*       { v2mulfsc r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
9983    137a8:       [0-9a-f]*       { v2mulfsc r5, r6, r7 ; rotli r15, r16, 5 }
9984    137b0:       [0-9a-f]*       { v2mulfsc r5, r6, r7 ; v1cmpeq r15, r16, r17 }
9985    137b8:       [0-9a-f]*       { v2mulfsc r5, r6, r7 ; v2maxsi r15, r16, 5 }
9986    137c0:       [0-9a-f]*       { v2muls r5, r6, r7 ; cmpeq r15, r16, r17 }
9987    137c8:       [0-9a-f]*       { v2muls r5, r6, r7 ; ld1s r15, r16 }
9988    137d0:       [0-9a-f]*       { v2muls r5, r6, r7 ; or r15, r16, r17 }
9989    137d8:       [0-9a-f]*       { v2muls r5, r6, r7 ; st4 r15, r16 }
9990    137e0:       [0-9a-f]*       { v2muls r5, r6, r7 ; v1sub r15, r16, r17 }
9991    137e8:       [0-9a-f]*       { v2muls r5, r6, r7 ; v4shlsc r15, r16, r17 }
9992    137f0:       [0-9a-f]*       { v2mults r5, r6, r7 ; fetchor r15, r16, r17 }
9993    137f8:       [0-9a-f]*       { v2mults r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
9994    13800:       [0-9a-f]*       { v2mults r5, r6, r7 ; shl2addx r15, r16, r17 }
9995    13808:       [0-9a-f]*       { v2mults r5, r6, r7 ; v1cmpltu r15, r16, r17 }
9996    13810:       [0-9a-f]*       { v2mults r5, r6, r7 ; v2packl r15, r16, r17 }
9997    13818:       [0-9a-f]*       { v2mz r15, r16, r17 ; cmpeq r5, r6, r7 }
9998    13820:       [0-9a-f]*       { v2mz r15, r16, r17 ; infol 4660 }
9999    13828:       [0-9a-f]*       { v2mz r15, r16, r17 ; shl1add r5, r6, r7 }
10000    13830:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; v2mz r15, r16, r17 }
10001    13838:       [0-9a-f]*       { v2mz r15, r16, r17 ; v2cmpltui r5, r6, 5 }
10002    13840:       [0-9a-f]*       { v2mz r15, r16, r17 ; v4sub r5, r6, r7 }
10003    13848:       [0-9a-f]*       { v2mz r5, r6, r7 ; flushwb }
10004    13850:       [0-9a-f]*       { v2mz r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
10005    13858:       [0-9a-f]*       { v2mz r5, r6, r7 ; shlx r15, r16, r17 }
10006    13860:       [0-9a-f]*       { v2mz r5, r6, r7 ; v1int_l r15, r16, r17 }
10007    13868:       [0-9a-f]*       { v2mz r5, r6, r7 ; v2shlsc r15, r16, r17 }
10008    13870:       [0-9a-f]*       { v2packh r15, r16, r17 ; cmplts r5, r6, r7 }
10009    13878:       [0-9a-f]*       { v2packh r15, r16, r17 ; movei r5, 5 }
10010    13880:       [0-9a-f]*       { v2packh r15, r16, r17 ; shl3add r5, r6, r7 }
10011    13888:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; v2packh r15, r16, r17 }
10012    13890:       [0-9a-f]*       { v2packh r15, r16, r17 ; v2int_h r5, r6, r7 }
10013    13898:       [0-9a-f]*       { v2packh r5, r6, r7 ; add r15, r16, r17 }
10014    138a0:       [0-9a-f]*       { v2packh r5, r6, r7 ; info 19 }
10015    138a8:       [0-9a-f]*       { v2packh r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
10016    138b0:       [0-9a-f]*       { v2packh r5, r6, r7 ; shru r15, r16, r17 }
10017    138b8:       [0-9a-f]*       { v2packh r5, r6, r7 ; v1minui r15, r16, 5 }
10018    138c0:       [0-9a-f]*       { v2packh r5, r6, r7 ; v2shrui r15, r16, 5 }
10019    138c8:       [0-9a-f]*       { v2packl r15, r16, r17 ; cmpne r5, r6, r7 }
10020    138d0:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; v2packl r15, r16, r17 }
10021    138d8:       [0-9a-f]*       { v2packl r15, r16, r17 ; shlxi r5, r6, 5 }
10022    138e0:       [0-9a-f]*       { v2packl r15, r16, r17 ; v1int_l r5, r6, r7 }
10023    138e8:       [0-9a-f]*       { v2packl r15, r16, r17 ; v2mins r5, r6, r7 }
10024    138f0:       [0-9a-f]*       { v2packl r5, r6, r7 ; addxi r15, r16, 5 }
10025    138f8:       [0-9a-f]*       { v2packl r5, r6, r7 ; jalr r15 }
10026    13900:       [0-9a-f]*       { v2packl r5, r6, r7 ; moveli r15, 4660 }
10027    13908:       [0-9a-f]*       { v2packl r5, r6, r7 ; st r15, r16 }
10028    13910:       [0-9a-f]*       { v2packl r5, r6, r7 ; v1shli r15, r16, 5 }
10029    13918:       [0-9a-f]*       { v2packl r5, r6, r7 ; v4addsc r15, r16, r17 }
10030    13920:       [0-9a-f]*       { cmulf r5, r6, r7 ; v2packuc r15, r16, r17 }
10031    13928:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; v2packuc r15, r16, r17 }
10032    13930:       [0-9a-f]*       { v2packuc r15, r16, r17 ; shrui r5, r6, 5 }
10033    13938:       [0-9a-f]*       { v2packuc r15, r16, r17 ; v1minui r5, r6, 5 }
10034    13940:       [0-9a-f]*       { v2muls r5, r6, r7 ; v2packuc r15, r16, r17 }
10035    13948:       [0-9a-f]*       { v2packuc r5, r6, r7 ; andi r15, r16, 5 }
10036    13950:       [0-9a-f]*       { v2packuc r5, r6, r7 ; ld r15, r16 }
10037    13958:       [0-9a-f]*       { v2packuc r5, r6, r7 ; nor r15, r16, r17 }
10038    13960:       [0-9a-f]*       { v2packuc r5, r6, r7 ; st2_add r15, r16, 5 }
10039    13968:       [0-9a-f]*       { v2packuc r5, r6, r7 ; v1shrui r15, r16, 5 }
10040    13970:       [0-9a-f]*       { v2packuc r5, r6, r7 ; v4shl r15, r16, r17 }
10041    13978:       [0-9a-f]*       { v2sadas r5, r6, r7 ; fetchand4 r15, r16, r17 }
10042    13980:       [0-9a-f]*       { v2sadas r5, r6, r7 ; ldnt2u r15, r16 }
10043    13988:       [0-9a-f]*       { v2sadas r5, r6, r7 ; shl2add r15, r16, r17 }
10044    13990:       [0-9a-f]*       { v2sadas r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
10045    13998:       [0-9a-f]*       { v2sadas r5, r6, r7 ; v2packh r15, r16, r17 }
10046    139a0:       [0-9a-f]*       { v2sadau r5, r6, r7 ; cmpleu r15, r16, r17 }
10047    139a8:       [0-9a-f]*       { v2sadau r5, r6, r7 ; ld2s_add r15, r16, 5 }
10048    139b0:       [0-9a-f]*       { v2sadau r5, r6, r7 ; prefetch_add_l2 r15, 5 }
10049    139b8:       [0-9a-f]*       { v2sadau r5, r6, r7 ; stnt1_add r15, r16, 5 }
10050    139c0:       [0-9a-f]*       { v2sadau r5, r6, r7 ; v2cmpeq r15, r16, r17 }
10051    139c8:       [0-9a-f]*       { v2sadau r5, r6, r7 ; wh64 r15 }
10052    139d0:       [0-9a-f]*       { v2sads r5, r6, r7 }
10053    139d8:       [0-9a-f]*       { v2sads r5, r6, r7 ; ldnt_add r15, r16, 5 }
10054    139e0:       [0-9a-f]*       { v2sads r5, r6, r7 ; shlxi r15, r16, 5 }
10055    139e8:       [0-9a-f]*       { v2sads r5, r6, r7 ; v1maxu r15, r16, r17 }
10056    139f0:       [0-9a-f]*       { v2sads r5, r6, r7 ; v2shrs r15, r16, r17 }
10057    139f8:       [0-9a-f]*       { v2sadu r5, r6, r7 ; dblalign2 r15, r16, r17 }
10058    13a00:       [0-9a-f]*       { v2sadu r5, r6, r7 ; ld4u_add r15, r16, 5 }
10059    13a08:       [0-9a-f]*       { v2sadu r5, r6, r7 ; prefetch_l2 r15 }
10060    13a10:       [0-9a-f]*       { v2sadu r5, r6, r7 ; sub r15, r16, r17 }
10061    13a18:       [0-9a-f]*       { v2sadu r5, r6, r7 ; v2cmpltu r15, r16, r17 }
10062    13a20:       [0-9a-f]*       { v2shl r15, r16, r17 ; addx r5, r6, r7 }
10063    13a28:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; v2shl r15, r16, r17 }
10064    13a30:       [0-9a-f]*       { v2shl r15, r16, r17 ; mz r5, r6, r7 }
10065    13a38:       [0-9a-f]*       { v2shl r15, r16, r17 ; v1cmpeq r5, r6, r7 }
10066    13a40:       [0-9a-f]*       { v2shl r15, r16, r17 ; v2add r5, r6, r7 }
10067    13a48:       [0-9a-f]*       { v2shl r15, r16, r17 ; v2shrui r5, r6, 5 }
10068    13a50:       [0-9a-f]*       { v2shl r5, r6, r7 ; exch r15, r16, r17 }
10069    13a58:       [0-9a-f]*       { v2shl r5, r6, r7 ; ldnt r15, r16 }
10070    13a60:       [0-9a-f]*       { v2shl r5, r6, r7 ; raise }
10071    13a68:       [0-9a-f]*       { v2shl r5, r6, r7 ; v1addi r15, r16, 5 }
10072    13a70:       [0-9a-f]*       { v2shl r5, r6, r7 ; v2int_l r15, r16, r17 }
10073    13a78:       [0-9a-f]*       { v2shli r15, r16, 5 ; and r5, r6, r7 }
10074    13a80:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; v2shli r15, r16, 5 }
10075    13a88:       [0-9a-f]*       { v2shli r15, r16, 5 ; ori r5, r6, 5 }
10076    13a90:       [0-9a-f]*       { v2shli r15, r16, 5 ; v1cmplts r5, r6, r7 }
10077    13a98:       [0-9a-f]*       { v2avgs r5, r6, r7 ; v2shli r15, r16, 5 }
10078    13aa0:       [0-9a-f]*       { v2shli r15, r16, 5 ; v4addsc r5, r6, r7 }
10079    13aa8:       [0-9a-f]*       { v2shli r5, r6, 5 ; fetchaddgez r15, r16, r17 }
10080    13ab0:       [0-9a-f]*       { v2shli r5, r6, 5 ; ldnt1u_add r15, r16, 5 }
10081    13ab8:       [0-9a-f]*       { v2shli r5, r6, 5 ; shl16insli r15, r16, 4660 }
10082    13ac0:       [0-9a-f]*       { v2shli r5, r6, 5 ; v1cmples r15, r16, r17 }
10083    13ac8:       [0-9a-f]*       { v2shli r5, r6, 5 ; v2minsi r15, r16, 5 }
10084    13ad0:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; v2shlsc r15, r16, r17 }
10085    13ad8:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; v2shlsc r15, r16, r17 }
10086    13ae0:       [0-9a-f]*       { v2shlsc r15, r16, r17 ; rotl r5, r6, r7 }
10087    13ae8:       [0-9a-f]*       { v2shlsc r15, r16, r17 ; v1cmpne r5, r6, r7 }
10088    13af0:       [0-9a-f]*       { v2shlsc r15, r16, r17 ; v2cmpleu r5, r6, r7 }
10089    13af8:       [0-9a-f]*       { v2shlsc r15, r16, r17 ; v4shl r5, r6, r7 }
10090    13b00:       [0-9a-f]*       { v2shlsc r5, r6, r7 ; fetchor r15, r16, r17 }
10091    13b08:       [0-9a-f]*       { v2shlsc r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
10092    13b10:       [0-9a-f]*       { v2shlsc r5, r6, r7 ; shl2addx r15, r16, r17 }
10093    13b18:       [0-9a-f]*       { v2shlsc r5, r6, r7 ; v1cmpltu r15, r16, r17 }
10094    13b20:       [0-9a-f]*       { v2shlsc r5, r6, r7 ; v2packl r15, r16, r17 }
10095    13b28:       [0-9a-f]*       { v2shrs r15, r16, r17 ; cmpeq r5, r6, r7 }
10096    13b30:       [0-9a-f]*       { v2shrs r15, r16, r17 ; infol 4660 }
10097    13b38:       [0-9a-f]*       { v2shrs r15, r16, r17 ; shl1add r5, r6, r7 }
10098    13b40:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; v2shrs r15, r16, r17 }
10099    13b48:       [0-9a-f]*       { v2shrs r15, r16, r17 ; v2cmpltui r5, r6, 5 }
10100    13b50:       [0-9a-f]*       { v2shrs r15, r16, r17 ; v4sub r5, r6, r7 }
10101    13b58:       [0-9a-f]*       { v2shrs r5, r6, r7 ; flushwb }
10102    13b60:       [0-9a-f]*       { v2shrs r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
10103    13b68:       [0-9a-f]*       { v2shrs r5, r6, r7 ; shlx r15, r16, r17 }
10104    13b70:       [0-9a-f]*       { v2shrs r5, r6, r7 ; v1int_l r15, r16, r17 }
10105    13b78:       [0-9a-f]*       { v2shrs r5, r6, r7 ; v2shlsc r15, r16, r17 }
10106    13b80:       [0-9a-f]*       { v2shrsi r15, r16, 5 ; cmplts r5, r6, r7 }
10107    13b88:       [0-9a-f]*       { v2shrsi r15, r16, 5 ; movei r5, 5 }
10108    13b90:       [0-9a-f]*       { v2shrsi r15, r16, 5 ; shl3add r5, r6, r7 }
10109    13b98:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; v2shrsi r15, r16, 5 }
10110    13ba0:       [0-9a-f]*       { v2shrsi r15, r16, 5 ; v2int_h r5, r6, r7 }
10111    13ba8:       [0-9a-f]*       { v2shrsi r5, r6, 5 ; add r15, r16, r17 }
10112    13bb0:       [0-9a-f]*       { v2shrsi r5, r6, 5 ; info 19 }
10113    13bb8:       [0-9a-f]*       { v2shrsi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
10114    13bc0:       [0-9a-f]*       { v2shrsi r5, r6, 5 ; shru r15, r16, r17 }
10115    13bc8:       [0-9a-f]*       { v2shrsi r5, r6, 5 ; v1minui r15, r16, 5 }
10116    13bd0:       [0-9a-f]*       { v2shrsi r5, r6, 5 ; v2shrui r15, r16, 5 }
10117    13bd8:       [0-9a-f]*       { v2shru r15, r16, r17 ; cmpne r5, r6, r7 }
10118    13be0:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; v2shru r15, r16, r17 }
10119    13be8:       [0-9a-f]*       { v2shru r15, r16, r17 ; shlxi r5, r6, 5 }
10120    13bf0:       [0-9a-f]*       { v2shru r15, r16, r17 ; v1int_l r5, r6, r7 }
10121    13bf8:       [0-9a-f]*       { v2shru r15, r16, r17 ; v2mins r5, r6, r7 }
10122    13c00:       [0-9a-f]*       { v2shru r5, r6, r7 ; addxi r15, r16, 5 }
10123    13c08:       [0-9a-f]*       { v2shru r5, r6, r7 ; jalr r15 }
10124    13c10:       [0-9a-f]*       { v2shru r5, r6, r7 ; moveli r15, 4660 }
10125    13c18:       [0-9a-f]*       { v2shru r5, r6, r7 ; st r15, r16 }
10126    13c20:       [0-9a-f]*       { v2shru r5, r6, r7 ; v1shli r15, r16, 5 }
10127    13c28:       [0-9a-f]*       { v2shru r5, r6, r7 ; v4addsc r15, r16, r17 }
10128    13c30:       [0-9a-f]*       { cmulf r5, r6, r7 ; v2shrui r15, r16, 5 }
10129    13c38:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; v2shrui r15, r16, 5 }
10130    13c40:       [0-9a-f]*       { v2shrui r15, r16, 5 ; shrui r5, r6, 5 }
10131    13c48:       [0-9a-f]*       { v2shrui r15, r16, 5 ; v1minui r5, r6, 5 }
10132    13c50:       [0-9a-f]*       { v2muls r5, r6, r7 ; v2shrui r15, r16, 5 }
10133    13c58:       [0-9a-f]*       { v2shrui r5, r6, 5 ; andi r15, r16, 5 }
10134    13c60:       [0-9a-f]*       { v2shrui r5, r6, 5 ; ld r15, r16 }
10135    13c68:       [0-9a-f]*       { v2shrui r5, r6, 5 ; nor r15, r16, r17 }
10136    13c70:       [0-9a-f]*       { v2shrui r5, r6, 5 ; st2_add r15, r16, 5 }
10137    13c78:       [0-9a-f]*       { v2shrui r5, r6, 5 ; v1shrui r15, r16, 5 }
10138    13c80:       [0-9a-f]*       { v2shrui r5, r6, 5 ; v4shl r15, r16, r17 }
10139    13c88:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; v2sub r15, r16, r17 }
10140    13c90:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; v2sub r15, r16, r17 }
10141    13c98:       [0-9a-f]*       { v2sub r15, r16, r17 ; sub r5, r6, r7 }
10142    13ca0:       [0-9a-f]*       { v1mulus r5, r6, r7 ; v2sub r15, r16, r17 }
10143    13ca8:       [0-9a-f]*       { v2sub r15, r16, r17 ; v2packl r5, r6, r7 }
10144    13cb0:       [0-9a-f]*       { v2sub r5, r6, r7 ; cmpexch4 r15, r16, r17 }
10145    13cb8:       [0-9a-f]*       { v2sub r5, r6, r7 ; ld1u_add r15, r16, 5 }
10146    13cc0:       [0-9a-f]*       { v2sub r5, r6, r7 ; prefetch_add_l1 r15, 5 }
10147    13cc8:       [0-9a-f]*       { v2sub r5, r6, r7 ; stnt r15, r16 }
10148    13cd0:       [0-9a-f]*       { v2sub r5, r6, r7 ; v2addi r15, r16, 5 }
10149    13cd8:       [0-9a-f]*       { v2sub r5, r6, r7 ; v4sub r15, r16, r17 }
10150    13ce0:       [0-9a-f]*       { v2subsc r15, r16, r17 ; dblalign2 r5, r6, r7 }
10151    13ce8:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; v2subsc r15, r16, r17 }
10152    13cf0:       [0-9a-f]*       { tblidxb1 r5, r6 ; v2subsc r15, r16, r17 }
10153    13cf8:       [0-9a-f]*       { v2subsc r15, r16, r17 ; v1shl r5, r6, r7 }
10154    13d00:       [0-9a-f]*       { v2sads r5, r6, r7 ; v2subsc r15, r16, r17 }
10155    13d08:       [0-9a-f]*       { v2subsc r5, r6, r7 ; cmpltsi r15, r16, 5 }
10156    13d10:       [0-9a-f]*       { v2subsc r5, r6, r7 ; ld2u_add r15, r16, 5 }
10157    13d18:       [0-9a-f]*       { v2subsc r5, r6, r7 ; prefetch_add_l3 r15, 5 }
10158    13d20:       [0-9a-f]*       { v2subsc r5, r6, r7 ; stnt2_add r15, r16, 5 }
10159    13d28:       [0-9a-f]*       { v2subsc r5, r6, r7 ; v2cmples r15, r16, r17 }
10160    13d30:       [0-9a-f]*       { v2subsc r5, r6, r7 ; xori r15, r16, 5 }
10161    13d38:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; v4add r15, r16, r17 }
10162    13d40:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; v4add r15, r16, r17 }
10163    13d48:       [0-9a-f]*       { v4add r15, r16, r17 ; v1addi r5, r6, 5 }
10164    13d50:       [0-9a-f]*       { v4add r15, r16, r17 ; v1shru r5, r6, r7 }
10165    13d58:       [0-9a-f]*       { v4add r15, r16, r17 ; v2shlsc r5, r6, r7 }
10166    13d60:       [0-9a-f]*       { v4add r5, r6, r7 ; dblalign2 r15, r16, r17 }
10167    13d68:       [0-9a-f]*       { v4add r5, r6, r7 ; ld4u_add r15, r16, 5 }
10168    13d70:       [0-9a-f]*       { v4add r5, r6, r7 ; prefetch_l2 r15 }
10169    13d78:       [0-9a-f]*       { v4add r5, r6, r7 ; sub r15, r16, r17 }
10170    13d80:       [0-9a-f]*       { v4add r5, r6, r7 ; v2cmpltu r15, r16, r17 }
10171    13d88:       [0-9a-f]*       { v4addsc r15, r16, r17 ; addx r5, r6, r7 }
10172    13d90:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; v4addsc r15, r16, r17 }
10173    13d98:       [0-9a-f]*       { v4addsc r15, r16, r17 ; mz r5, r6, r7 }
10174    13da0:       [0-9a-f]*       { v4addsc r15, r16, r17 ; v1cmpeq r5, r6, r7 }
10175    13da8:       [0-9a-f]*       { v4addsc r15, r16, r17 ; v2add r5, r6, r7 }
10176    13db0:       [0-9a-f]*       { v4addsc r15, r16, r17 ; v2shrui r5, r6, 5 }
10177    13db8:       [0-9a-f]*       { v4addsc r5, r6, r7 ; exch r15, r16, r17 }
10178    13dc0:       [0-9a-f]*       { v4addsc r5, r6, r7 ; ldnt r15, r16 }
10179    13dc8:       [0-9a-f]*       { v4addsc r5, r6, r7 ; raise }
10180    13dd0:       [0-9a-f]*       { v4addsc r5, r6, r7 ; v1addi r15, r16, 5 }
10181    13dd8:       [0-9a-f]*       { v4addsc r5, r6, r7 ; v2int_l r15, r16, r17 }
10182    13de0:       [0-9a-f]*       { v4int_h r15, r16, r17 ; and r5, r6, r7 }
10183    13de8:       [0-9a-f]*       { fsingle_add1 r5, r6, r7 ; v4int_h r15, r16, r17 }
10184    13df0:       [0-9a-f]*       { v4int_h r15, r16, r17 ; ori r5, r6, 5 }
10185    13df8:       [0-9a-f]*       { v4int_h r15, r16, r17 ; v1cmplts r5, r6, r7 }
10186    13e00:       [0-9a-f]*       { v2avgs r5, r6, r7 ; v4int_h r15, r16, r17 }
10187    13e08:       [0-9a-f]*       { v4int_h r15, r16, r17 ; v4addsc r5, r6, r7 }
10188    13e10:       [0-9a-f]*       { v4int_h r5, r6, r7 ; fetchaddgez r15, r16, r17 }
10189    13e18:       [0-9a-f]*       { v4int_h r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
10190    13e20:       [0-9a-f]*       { v4int_h r5, r6, r7 ; shl16insli r15, r16, 4660 }
10191    13e28:       [0-9a-f]*       { v4int_h r5, r6, r7 ; v1cmples r15, r16, r17 }
10192    13e30:       [0-9a-f]*       { v4int_h r5, r6, r7 ; v2minsi r15, r16, 5 }
10193    13e38:       [0-9a-f]*       { bfins r5, r6, 5, 7 ; v4int_l r15, r16, r17 }
10194    13e40:       [0-9a-f]*       { fsingle_pack1 r5, r6 ; v4int_l r15, r16, r17 }
10195    13e48:       [0-9a-f]*       { v4int_l r15, r16, r17 ; rotl r5, r6, r7 }
10196    13e50:       [0-9a-f]*       { v4int_l r15, r16, r17 ; v1cmpne r5, r6, r7 }
10197    13e58:       [0-9a-f]*       { v4int_l r15, r16, r17 ; v2cmpleu r5, r6, r7 }
10198    13e60:       [0-9a-f]*       { v4int_l r15, r16, r17 ; v4shl r5, r6, r7 }
10199    13e68:       [0-9a-f]*       { v4int_l r5, r6, r7 ; fetchor r15, r16, r17 }
10200    13e70:       [0-9a-f]*       { v4int_l r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
10201    13e78:       [0-9a-f]*       { v4int_l r5, r6, r7 ; shl2addx r15, r16, r17 }
10202    13e80:       [0-9a-f]*       { v4int_l r5, r6, r7 ; v1cmpltu r15, r16, r17 }
10203    13e88:       [0-9a-f]*       { v4int_l r5, r6, r7 ; v2packl r15, r16, r17 }
10204    13e90:       [0-9a-f]*       { v4packsc r15, r16, r17 ; cmpeq r5, r6, r7 }
10205    13e98:       [0-9a-f]*       { v4packsc r15, r16, r17 ; infol 4660 }
10206    13ea0:       [0-9a-f]*       { v4packsc r15, r16, r17 ; shl1add r5, r6, r7 }
10207    13ea8:       [0-9a-f]*       { v1ddotpusa r5, r6, r7 ; v4packsc r15, r16, r17 }
10208    13eb0:       [0-9a-f]*       { v4packsc r15, r16, r17 ; v2cmpltui r5, r6, 5 }
10209    13eb8:       [0-9a-f]*       { v4packsc r15, r16, r17 ; v4sub r5, r6, r7 }
10210    13ec0:       [0-9a-f]*       { v4packsc r5, r6, r7 ; flushwb }
10211    13ec8:       [0-9a-f]*       { v4packsc r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
10212    13ed0:       [0-9a-f]*       { v4packsc r5, r6, r7 ; shlx r15, r16, r17 }
10213    13ed8:       [0-9a-f]*       { v4packsc r5, r6, r7 ; v1int_l r15, r16, r17 }
10214    13ee0:       [0-9a-f]*       { v4packsc r5, r6, r7 ; v2shlsc r15, r16, r17 }
10215    13ee8:       [0-9a-f]*       { v4shl r15, r16, r17 ; cmplts r5, r6, r7 }
10216    13ef0:       [0-9a-f]*       { v4shl r15, r16, r17 ; movei r5, 5 }
10217    13ef8:       [0-9a-f]*       { v4shl r15, r16, r17 ; shl3add r5, r6, r7 }
10218    13f00:       [0-9a-f]*       { v1dotpua r5, r6, r7 ; v4shl r15, r16, r17 }
10219    13f08:       [0-9a-f]*       { v4shl r15, r16, r17 ; v2int_h r5, r6, r7 }
10220    13f10:       [0-9a-f]*       { v4shl r5, r6, r7 ; add r15, r16, r17 }
10221    13f18:       [0-9a-f]*       { v4shl r5, r6, r7 ; info 19 }
10222    13f20:       [0-9a-f]*       { v4shl r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
10223    13f28:       [0-9a-f]*       { v4shl r5, r6, r7 ; shru r15, r16, r17 }
10224    13f30:       [0-9a-f]*       { v4shl r5, r6, r7 ; v1minui r15, r16, 5 }
10225    13f38:       [0-9a-f]*       { v4shl r5, r6, r7 ; v2shrui r15, r16, 5 }
10226    13f40:       [0-9a-f]*       { v4shlsc r15, r16, r17 ; cmpne r5, r6, r7 }
10227    13f48:       [0-9a-f]*       { mul_hs_ls r5, r6, r7 ; v4shlsc r15, r16, r17 }
10228    13f50:       [0-9a-f]*       { v4shlsc r15, r16, r17 ; shlxi r5, r6, 5 }
10229    13f58:       [0-9a-f]*       { v4shlsc r15, r16, r17 ; v1int_l r5, r6, r7 }
10230    13f60:       [0-9a-f]*       { v4shlsc r15, r16, r17 ; v2mins r5, r6, r7 }
10231    13f68:       [0-9a-f]*       { v4shlsc r5, r6, r7 ; addxi r15, r16, 5 }
10232    13f70:       [0-9a-f]*       { v4shlsc r5, r6, r7 ; jalr r15 }
10233    13f78:       [0-9a-f]*       { v4shlsc r5, r6, r7 ; moveli r15, 4660 }
10234    13f80:       [0-9a-f]*       { v4shlsc r5, r6, r7 ; st r15, r16 }
10235    13f88:       [0-9a-f]*       { v4shlsc r5, r6, r7 ; v1shli r15, r16, 5 }
10236    13f90:       [0-9a-f]*       { v4shlsc r5, r6, r7 ; v4addsc r15, r16, r17 }
10237    13f98:       [0-9a-f]*       { cmulf r5, r6, r7 ; v4shrs r15, r16, r17 }
10238    13fa0:       [0-9a-f]*       { mul_hu_lu r5, r6, r7 ; v4shrs r15, r16, r17 }
10239    13fa8:       [0-9a-f]*       { v4shrs r15, r16, r17 ; shrui r5, r6, 5 }
10240    13fb0:       [0-9a-f]*       { v4shrs r15, r16, r17 ; v1minui r5, r6, 5 }
10241    13fb8:       [0-9a-f]*       { v2muls r5, r6, r7 ; v4shrs r15, r16, r17 }
10242    13fc0:       [0-9a-f]*       { v4shrs r5, r6, r7 ; andi r15, r16, 5 }
10243    13fc8:       [0-9a-f]*       { v4shrs r5, r6, r7 ; ld r15, r16 }
10244    13fd0:       [0-9a-f]*       { v4shrs r5, r6, r7 ; nor r15, r16, r17 }
10245    13fd8:       [0-9a-f]*       { v4shrs r5, r6, r7 ; st2_add r15, r16, 5 }
10246    13fe0:       [0-9a-f]*       { v4shrs r5, r6, r7 ; v1shrui r15, r16, 5 }
10247    13fe8:       [0-9a-f]*       { v4shrs r5, r6, r7 ; v4shl r15, r16, r17 }
10248    13ff0:       [0-9a-f]*       { crc32_32 r5, r6, r7 ; v4shru r15, r16, r17 }
10249    13ff8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; v4shru r15, r16, r17 }
10250    14000:       [0-9a-f]*       { v4shru r15, r16, r17 ; sub r5, r6, r7 }
10251    14008:       [0-9a-f]*       { v1mulus r5, r6, r7 ; v4shru r15, r16, r17 }
10252    14010:       [0-9a-f]*       { v4shru r15, r16, r17 ; v2packl r5, r6, r7 }
10253    14018:       [0-9a-f]*       { v4shru r5, r6, r7 ; cmpexch4 r15, r16, r17 }
10254    14020:       [0-9a-f]*       { v4shru r5, r6, r7 ; ld1u_add r15, r16, 5 }
10255    14028:       [0-9a-f]*       { v4shru r5, r6, r7 ; prefetch_add_l1 r15, 5 }
10256    14030:       [0-9a-f]*       { v4shru r5, r6, r7 ; stnt r15, r16 }
10257    14038:       [0-9a-f]*       { v4shru r5, r6, r7 ; v2addi r15, r16, 5 }
10258    14040:       [0-9a-f]*       { v4shru r5, r6, r7 ; v4sub r15, r16, r17 }
10259    14048:       [0-9a-f]*       { v4sub r15, r16, r17 ; dblalign2 r5, r6, r7 }
10260    14050:       [0-9a-f]*       { mula_hu_hu r5, r6, r7 ; v4sub r15, r16, r17 }
10261    14058:       [0-9a-f]*       { tblidxb1 r5, r6 ; v4sub r15, r16, r17 }
10262    14060:       [0-9a-f]*       { v4sub r15, r16, r17 ; v1shl r5, r6, r7 }
10263    14068:       [0-9a-f]*       { v2sads r5, r6, r7 ; v4sub r15, r16, r17 }
10264    14070:       [0-9a-f]*       { v4sub r5, r6, r7 ; cmpltsi r15, r16, 5 }
10265    14078:       [0-9a-f]*       { v4sub r5, r6, r7 ; ld2u_add r15, r16, 5 }
10266    14080:       [0-9a-f]*       { v4sub r5, r6, r7 ; prefetch_add_l3 r15, 5 }
10267    14088:       [0-9a-f]*       { v4sub r5, r6, r7 ; stnt2_add r15, r16, 5 }
10268    14090:       [0-9a-f]*       { v4sub r5, r6, r7 ; v2cmples r15, r16, r17 }
10269    14098:       [0-9a-f]*       { v4sub r5, r6, r7 ; xori r15, r16, 5 }
10270    140a0:       [0-9a-f]*       { fdouble_addsub r5, r6, r7 ; v4subsc r15, r16, r17 }
10271    140a8:       [0-9a-f]*       { mula_ls_lu r5, r6, r7 ; v4subsc r15, r16, r17 }
10272    140b0:       [0-9a-f]*       { v4subsc r15, r16, r17 ; v1addi r5, r6, 5 }
10273    140b8:       [0-9a-f]*       { v4subsc r15, r16, r17 ; v1shru r5, r6, r7 }
10274    140c0:       [0-9a-f]*       { v4subsc r15, r16, r17 ; v2shlsc r5, r6, r7 }
10275    140c8:       [0-9a-f]*       { v4subsc r5, r6, r7 ; dblalign2 r15, r16, r17 }
10276    140d0:       [0-9a-f]*       { v4subsc r5, r6, r7 ; ld4u_add r15, r16, 5 }
10277    140d8:       [0-9a-f]*       { v4subsc r5, r6, r7 ; prefetch_l2 r15 }
10278    140e0:       [0-9a-f]*       { v4subsc r5, r6, r7 ; sub r15, r16, r17 }
10279    140e8:       [0-9a-f]*       { v4subsc r5, r6, r7 ; v2cmpltu r15, r16, r17 }
10280    140f0:       [0-9a-f]*       { addx r5, r6, r7 ; wh64 r15 }
10281    140f8:       [0-9a-f]*       { fdouble_sub_flags r5, r6, r7 ; wh64 r15 }
10282    14100:       [0-9a-f]*       { mz r5, r6, r7 ; wh64 r15 }
10283    14108:       [0-9a-f]*       { v1cmpeq r5, r6, r7 ; wh64 r15 }
10284    14110:       [0-9a-f]*       { v2add r5, r6, r7 ; wh64 r15 }
10285    14118:       [0-9a-f]*       { v2shrui r5, r6, 5 ; wh64 r15 }
10286    14120:       [0-9a-f]*       { xor r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
10287    14128:       [0-9a-f]*       { xor r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
10288    14130:       [0-9a-f]*       { xor r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
10289    14138:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; xor r15, r16, r17 ; ld4s r25, r26 }
10290    14140:       [0-9a-f]*       { xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
10291    14148:       [0-9a-f]*       { xor r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
10292    14150:       [0-9a-f]*       { xor r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
10293    14158:       [0-9a-f]*       { xor r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
10294    14160:       [0-9a-f]*       { ctz r5, r6 ; xor r15, r16, r17 ; ld4s r25, r26 }
10295    14168:       [0-9a-f]*       { xor r15, r16, r17 ; st r25, r26 }
10296    14170:       [0-9a-f]*       { xor r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
10297    14178:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
10298    14180:       [0-9a-f]*       { cmoveqz r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
10299    14188:       [0-9a-f]*       { xor r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
10300    14190:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
10301    14198:       [0-9a-f]*       { xor r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
10302    141a0:       [0-9a-f]*       { xor r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
10303    141a8:       [0-9a-f]*       { xor r15, r16, r17 ; ld2u r25, r26 }
10304    141b0:       [0-9a-f]*       { tblidxb1 r5, r6 ; xor r15, r16, r17 ; ld2u r25, r26 }
10305    141b8:       [0-9a-f]*       { xor r15, r16, r17 ; nop ; ld4s r25, r26 }
10306    141c0:       [0-9a-f]*       { xor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
10307    141c8:       [0-9a-f]*       { xor r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
10308    141d0:       [0-9a-f]*       { xor r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
10309    141d8:       [0-9a-f]*       { mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 }
10310    141e0:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
10311    141e8:       [0-9a-f]*       { mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
10312    141f0:       [0-9a-f]*       { mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld4s r25, r26 }
10313    141f8:       [0-9a-f]*       { mulax r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
10314    14200:       [0-9a-f]*       { xor r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
10315    14208:       [0-9a-f]*       { xor r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
10316    14210:       [0-9a-f]*       { pcnt r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
10317    14218:       [0-9a-f]*       { mulax r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
10318    14220:       [0-9a-f]*       { xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
10319    14228:       [0-9a-f]*       { xor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
10320    14230:       [0-9a-f]*       { mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
10321    14238:       [0-9a-f]*       { xor r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
10322    14240:       [0-9a-f]*       { xor r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
10323    14248:       [0-9a-f]*       { xor r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
10324    14250:       [0-9a-f]*       { tblidxb3 r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
10325    14258:       [0-9a-f]*       { xor r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
10326    14260:       [0-9a-f]*       { xor r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
10327    14268:       [0-9a-f]*       { xor r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
10328    14270:       [0-9a-f]*       { revbytes r5, r6 ; xor r15, r16, r17 ; prefetch_l3 r25 }
10329    14278:       [0-9a-f]*       { xor r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
10330    14280:       [0-9a-f]*       { xor r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
10331    14288:       [0-9a-f]*       { xor r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
10332    14290:       [0-9a-f]*       { xor r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
10333    14298:       [0-9a-f]*       { xor r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
10334    142a0:       [0-9a-f]*       { xor r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
10335    142a8:       [0-9a-f]*       { xor r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
10336    142b0:       [0-9a-f]*       { xor r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
10337    142b8:       [0-9a-f]*       { xor r15, r16, r17 ; st1 r25, r26 }
10338    142c0:       [0-9a-f]*       { tblidxb1 r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 }
10339    142c8:       [0-9a-f]*       { xor r15, r16, r17 ; nop ; st2 r25, r26 }
10340    142d0:       [0-9a-f]*       { xor r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
10341    142d8:       [0-9a-f]*       { xor r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
10342    142e0:       [0-9a-f]*       { xor r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
10343    142e8:       [0-9a-f]*       { tblidxb1 r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
10344    142f0:       [0-9a-f]*       { tblidxb3 r5, r6 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
10345    142f8:       [0-9a-f]*       { xor r15, r16, r17 ; v1mz r5, r6, r7 }
10346    14300:       [0-9a-f]*       { xor r15, r16, r17 ; v2packuc r5, r6, r7 }
10347    14308:       [0-9a-f]*       { xor r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
10348    14310:       [0-9a-f]*       { xor r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
10349    14318:       [0-9a-f]*       { xor r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
10350    14320:       [0-9a-f]*       { xor r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
10351    14328:       [0-9a-f]*       { xor r5, r6, r7 ; cmpexch r15, r16, r17 }
10352    14330:       [0-9a-f]*       { xor r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
10353    14338:       [0-9a-f]*       { xor r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
10354    14340:       [0-9a-f]*       { xor r5, r6, r7 ; dtlbpr r15 }
10355    14348:       [0-9a-f]*       { xor r5, r6, r7 ; ill ; ld4u r25, r26 }
10356    14350:       [0-9a-f]*       { xor r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
10357    14358:       [0-9a-f]*       { xor r5, r6, r7 ; jr r15 ; prefetch r25 }
10358    14360:       [0-9a-f]*       { xor r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
10359    14368:       [0-9a-f]*       { xor r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
10360    14370:       [0-9a-f]*       { xor r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
10361    14378:       [0-9a-f]*       { xor r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
10362    14380:       [0-9a-f]*       { xor r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
10363    14388:       [0-9a-f]*       { xor r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
10364    14390:       [0-9a-f]*       { xor r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
10365    14398:       [0-9a-f]*       { xor r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
10366    143a0:       [0-9a-f]*       { xor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
10367    143a8:       [0-9a-f]*       { xor r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
10368    143b0:       [0-9a-f]*       { xor r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
10369    143b8:       [0-9a-f]*       { xor r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
10370    143c0:       [0-9a-f]*       { xor r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
10371    143c8:       [0-9a-f]*       { xor r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
10372    143d0:       [0-9a-f]*       { xor r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
10373    143d8:       [0-9a-f]*       { xor r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
10374    143e0:       [0-9a-f]*       { xor r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
10375    143e8:       [0-9a-f]*       { xor r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
10376    143f0:       [0-9a-f]*       { xor r5, r6, r7 ; prefetch_l2_fault r25 }
10377    143f8:       [0-9a-f]*       { xor r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
10378    14400:       [0-9a-f]*       { xor r5, r6, r7 ; prefetch_l3 r25 }
10379    14408:       [0-9a-f]*       { xor r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
10380    14410:       [0-9a-f]*       { xor r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
10381    14418:       [0-9a-f]*       { xor r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
10382    14420:       [0-9a-f]*       { xor r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
10383    14428:       [0-9a-f]*       { xor r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
10384    14430:       [0-9a-f]*       { xor r5, r6, r7 ; shli r15, r16, 5 }
10385    14438:       [0-9a-f]*       { xor r5, r6, r7 ; shrsi r15, r16, 5 }
10386    14440:       [0-9a-f]*       { xor r5, r6, r7 ; shruxi r15, r16, 5 }
10387    14448:       [0-9a-f]*       { xor r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
10388    14450:       [0-9a-f]*       { xor r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
10389    14458:       [0-9a-f]*       { xor r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
10390    14460:       [0-9a-f]*       { xor r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
10391    14468:       [0-9a-f]*       { xor r5, r6, r7 ; stnt2 r15, r16 }
10392    14470:       [0-9a-f]*       { xor r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
10393    14478:       [0-9a-f]*       { xor r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
10394    14480:       [0-9a-f]*       { xor r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
10395    14488:       [0-9a-f]*       { cmul r5, r6, r7 ; xori r15, r16, 5 }
10396    14490:       [0-9a-f]*       { mul_hs_lu r5, r6, r7 ; xori r15, r16, 5 }
10397    14498:       [0-9a-f]*       { xori r15, r16, 5 ; shrs r5, r6, r7 }
10398    144a0:       [0-9a-f]*       { xori r15, r16, 5 ; v1maxu r5, r6, r7 }
10399    144a8:       [0-9a-f]*       { xori r15, r16, 5 ; v2minsi r5, r6, 5 }
10400    144b0:       [0-9a-f]*       { xori r5, r6, 5 ; addxli r15, r16, 4660 }
10401    144b8:       [0-9a-f]*       { xori r5, r6, 5 ; jalrp r15 }
10402    144c0:       [0-9a-f]*       { xori r5, r6, 5 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
10403    144c8:       [0-9a-f]*       { xori r5, r6, 5 ; st1 r15, r16 }
10404    144d0:       [0-9a-f]*       { xori r5, r6, 5 ; v1shrs r15, r16, r17 }
10405    144d8:       [0-9a-f]*       { xori r5, r6, 5 ; v4int_h r15, r16, r17 }