3 * add.c <-> add! : register number must be in 0-15
4 * addc.c <-> addc! : register number must be in 0-15
5 * sub.c <-> sub! : register number must be in 0-15
6 * and.c <-> and! : register number must be in 0-15
7 * or.c <-> or! : register number must be in 0-15
8 * xor.c <-> xor! : register number must be in 0-15
9 * sra.c <-> sra! : register number must be in 0-15
10 * srl.c <-> srl! : register number must be in 0-15
11 * sll.c <-> sll! : register number must be in 0-15
17 /* This macro transform 32b instruction to 16b. */
18 .macro tran3216 insn32, insn16
21 \insn32 r0, r0, r2 #32b -> 16b
24 \insn32 r5, r5, r4 #32b -> 16b
27 \insn32 r15, r15, r4 #32b -> 16b
31 \insn32 r15, r15, r3 #32b -> 16b
33 \insn32 r8, r8, r3 #32b -> 16b
34 \insn32 r8, r8, r3 #32b -> 16b
36 \insn32 r15, r15, r6 #No transform
41 /* This macro transform 16b instruction to 32b. */
42 .macro tran1632 insn32, insn16
45 \insn16 r0, r2 #16b -> 32b
48 \insn16 r15, r4 #16b -> 32b
51 \insn16 r15, r3 #16b -> 32b
54 \insn16 r8, r7 #No transform
55 \insn16 r8, r7 #No transform
57 \insn16 r6, r4 #No transform
60 \insn32 r7, r7, r4 #32b -> 16b
61 \insn16 r7, r4 #No transform
67 tran3216 "add.c", "add!"
68 tran3216 "addc.c", "addc!"
69 tran3216 "sub.c", "sub!"
70 tran3216 "and.c", "and!"
71 tran3216 "or.c", "or!"
72 tran3216 "xor.c", "xor!"
73 tran3216 "sra.c", "sra!"
74 tran3216 "srl.c", "srl!"
75 tran3216 "sll.c", "sll!"
77 tran1632 "add.c", "add!"
78 tran1632 "addc.c", "addc!"
79 tran1632 "sub.c", "sub!"
80 tran1632 "and.c", "and!"
81 tran1632 "or.c", "or!"
82 tran1632 "xor.c", "xor!"
83 tran1632 "sra.c", "sra!"
84 tran1632 "srl.c", "srl!"
85 tran1632 "sll.c", "sll!"