2 * tests for load/store instruction relaxation
7 .include "relaxation_macro.h"
9 .macro _ls_op_pattern insn
11 insn_32 "\insn r0, [r0,0]"
12 insn_32 "\insn r15, [r0,0]"
13 insn_32 "\insn r0, [r7,0]"
14 insn_32 "\insn r15, [r7,0]"
15 /* NOTE: offset MUST be word aligned */
16 insn_32 "\insn r0, [r0,124]"
17 insn_32 "\insn r15, [r0,124]"
18 insn_32 "\insn r0, [r7,124]"
19 insn_32 "\insn r15, [r7,124]"
21 tran_16_32 "\insn! r0,[r0,124]", "\insn r0,[r0,124]"
24 insn_32 "\insn r16, [r0, 0]"
25 insn_32 "\insn r0, [r8, 124]"
26 insn_32 "\insn r16, [r8, 124]"
27 insn_32 "\insn r0, [r7, -1]"
28 insn_32 "\insn r0, [r7, 128]"
32 /* lw/sw rD,[rA,SImm15] -> lw!/sw! rD,[rA,Imm5] */
36 /* ldi rD,SImm16 -> ldiu! rD,Imm6 */
43 tran_16_32 "ldiu! r0, 0", "ldi r0, 0"
52 * lw rD,[rA]+,SImm12 -> pop! rD
54 * r0: stack pointer(sp)
56 insn_32 "lw r2, [r0]+, 4"
57 insn_32 "lw r15, [r0]+, 4"
60 insn_32 "lw r16, [r0]+, 4"
61 insn_32 "lw r4, [r2]+, 4"
62 insn_32 "lw r4, [r0]+, -4"
64 /* sw rD,[rA,SImm12]+ -> push! rD */
65 insn_32 "sw r2, [r0, -4]+"
66 insn_32 "sw r15, [r0, -4]+"
69 insn_32 "sw r16, [r0, -4]+"
70 insn_32 "sw r4, [r2, -4]+"
71 insn_32 "sw r4, [r0, 4]+"