1 #objdump: -drx -Mpower4
3 #name: Power4 instructions
5 .*: +file format elf64-powerpc
7 architecture: powerpc:common64, flags 0x0+11:
12 Idx Name +Size +VMA +LMA +File off +Algn
13 +0 \.text +0+c4 +0+ +0+ +.*
14 +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
15 +1 \.data +0+10 +0+ +0+ +.*
16 +CONTENTS, ALLOC, LOAD, DATA
17 +2 \.bss +0+ +0+ +0+ +.*
19 +3 \.toc +0+30 +0+ +0+ +.*
20 +CONTENTS, ALLOC, LOAD, RELOC, DATA
22 0+ l +d +\.text 0+ (|\.text)
23 0+ l +d +\.data 0+ (|\.data)
24 0+ l +d +\.bss 0+ (|\.bss)
26 0+8 l +\.data 0+ dsym1
27 0+ l +d +\.toc 0+ (|\.toc)
28 0+8 l +\.data 0+ usym0
29 0+10 l +\.data 0+ usym1
34 Disassembly of section \.text:
37 +0: e0 83 00 00 lq r4,0\(r3\)
38 2: R_PPC64_ADDR16_LO_DS \.data
39 +4: e0 83 00 00 lq r4,0\(r3\)
40 6: R_PPC64_ADDR16_LO_DS \.data\+0x8
41 +8: e0 83 00 00 lq r4,0\(r3\)
42 a: R_PPC64_ADDR16_LO_DS \.data\+0x8
43 +c: e0 83 00 10 lq r4,16\(r3\)
44 e: R_PPC64_ADDR16_LO_DS \.data\+0x10
45 +10: e0 83 00 00 lq r4,0\(r3\)
46 12: R_PPC64_ADDR16_LO_DS esym0
47 +14: e0 83 00 00 lq r4,0\(r3\)
48 16: R_PPC64_ADDR16_LO_DS esym1
49 +18: e0 82 00 00 lq r4,0\(r2\)
50 1a: R_PPC64_TOC16_DS \.toc
51 +1c: e0 82 00 00 lq r4,0\(r2\)
52 1e: R_PPC64_TOC16_DS \.toc\+0x8
53 +20: e0 82 00 10 lq r4,16\(r2\)
54 22: R_PPC64_TOC16_DS \.toc\+0x10
55 +24: e0 82 00 10 lq r4,16\(r2\)
56 26: R_PPC64_TOC16_DS \.toc\+0x18
57 +28: e0 82 00 20 lq r4,32\(r2\)
58 2a: R_PPC64_TOC16_DS \.toc\+0x20
59 +2c: e0 82 00 20 lq r4,32\(r2\)
60 2e: R_PPC64_TOC16_DS \.toc\+0x28
61 +30: e0 c2 00 20 lq r6,32\(r2\)
62 32: R_PPC64_TOC16_LO_DS \.toc\+0x28
63 +34: e0 80 00 00 lq r4,0\(0\)
64 36: R_PPC64_ADDR16_LO_DS \.text
65 +38: e0 c3 00 00 lq r6,0\(r3\)
66 3a: R_PPC64_GOT16_DS dsym0
67 +3c: e0 c3 00 00 lq r6,0\(r3\)
68 3e: R_PPC64_GOT16_LO_DS dsym0
69 +40: e0 c3 00 00 lq r6,0\(r3\)
70 42: R_PPC64_PLT16_LO_DS \.data
71 +44: e0 c3 00 00 lq r6,0\(r3\)
72 46: R_PPC64_SECTOFF_DS \.data\+0x8
73 +48: e0 c3 00 00 lq r6,0\(r3\)
74 4a: R_PPC64_SECTOFF_LO_DS \.data\+0x8
75 +4c: e0 c4 00 10 lq r6,16\(r4\)
76 +50: f8 c7 00 02 stq r6,0\(r7\)
77 +54: f8 c7 00 12 stq r6,16\(r7\)
78 +58: f8 c7 ff f2 stq r6,-16\(r7\)
79 +5c: f8 c7 80 02 stq r6,-32768\(r7\)
80 +60: f8 c7 7f f2 stq r6,32752\(r7\)
82 +68: 7c 6f f1 20 mtcr r3
83 +6c: 7c 6f f1 20 mtcr r3
84 +70: 7c 68 11 20 mtcrf 129,r3
85 +74: 7c 70 11 20 mtocrf 1,r3
86 +78: 7c 70 21 20 mtocrf 2,r3
87 +7c: 7c 70 41 20 mtocrf 4,r3
88 +80: 7c 70 81 20 mtocrf 8,r3
89 +84: 7c 71 01 20 mtocrf 16,r3
90 +88: 7c 72 01 20 mtocrf 32,r3
91 +8c: 7c 74 01 20 mtocrf 64,r3
92 +90: 7c 78 01 20 mtocrf 128,r3
93 +94: 7c 60 00 26 mfcr r3
94 +98: 7c 70 10 26 mfocrf r3,1
95 +9c: 7c 70 20 26 mfocrf r3,2
96 +a0: 7c 70 40 26 mfocrf r3,4
97 +a4: 7c 70 80 26 mfocrf r3,8
98 +a8: 7c 71 00 26 mfocrf r3,16
99 +ac: 7c 72 00 26 mfocrf r3,32
100 +b0: 7c 74 00 26 mfocrf r3,64
101 +b4: 7c 78 00 26 mfocrf r3,128
102 +b8: 7c 01 17 ec dcbz r1,r2
103 +bc: 7c 23 27 ec dcbzl r3,r4
104 +c0: 7c 05 37 ec dcbz r5,r6