8 Disassembly of section .text:
11 0: 00150004 move \$a0, \$zero
12 4: 02bffc04 li.w \$a0, -1
13 8: 00150004 move \$a0, \$zero
14 c: 02bffc04 li.w \$a0, -1
15 10: 1a000004 pcalau12i \$a0, 0
16 10: R_LARCH_GOT_PC_HI20 .L1
17 10: R_LARCH_RELAX \*ABS\*
18 14: 28800084 ld.w \$a0, \$a0, 0
19 14: R_LARCH_GOT_PC_LO12 .L1
20 14: R_LARCH_RELAX \*ABS\*
21 18: 1a000004 pcalau12i \$a0, 0
22 18: R_LARCH_GOT_PC_HI20 .L1
23 18: R_LARCH_RELAX \*ABS\*
24 1c: 28800084 ld.w \$a0, \$a0, 0
25 1c: R_LARCH_GOT_PC_LO12 .L1
26 1c: R_LARCH_RELAX \*ABS\*
27 20: 1a000004 pcalau12i \$a0, 0
28 20: R_LARCH_PCALA_HI20 .L1
29 20: R_LARCH_RELAX \*ABS\*
30 24: 02800084 addi.w \$a0, \$a0, 0
31 24: R_LARCH_PCALA_LO12 .L1
32 24: R_LARCH_RELAX \*ABS\*
33 28: 14000004 lu12i.w \$a0, 0
34 28: R_LARCH_MARK_LA \*ABS\*
35 28: R_LARCH_ABS_HI20 .L1
36 2c: 03800084 ori \$a0, \$a0, 0x0
37 2c: R_LARCH_ABS_LO12 .L1
38 30: 1a000004 pcalau12i \$a0, 0
39 30: R_LARCH_PCALA_HI20 .L1
40 30: R_LARCH_RELAX \*ABS\*
41 34: 02800084 addi.w \$a0, \$a0, 0
42 34: R_LARCH_PCALA_LO12 .L1
43 34: R_LARCH_RELAX \*ABS\*
44 38: 1a000004 pcalau12i \$a0, 0
45 38: R_LARCH_GOT_PC_HI20 .L1
46 38: R_LARCH_RELAX \*ABS\*
47 3c: 28800084 ld.w \$a0, \$a0, 0
48 3c: R_LARCH_GOT_PC_LO12 .L1
49 3c: R_LARCH_RELAX \*ABS\*
50 40: 14000004 lu12i.w \$a0, 0
51 40: R_LARCH_TLS_LE_HI20 TLS1
52 44: 03800084 ori \$a0, \$a0, 0x0
53 44: R_LARCH_TLS_LE_LO12 TLS1
54 48: 1a000004 pcalau12i \$a0, 0
55 48: R_LARCH_TLS_IE_PC_HI20 TLS1
56 48: R_LARCH_RELAX \*ABS\*
57 4c: 28800084 ld.w \$a0, \$a0, 0
58 4c: R_LARCH_TLS_IE_PC_LO12 TLS1
59 4c: R_LARCH_RELAX \*ABS\*
60 50: 1a000004 pcalau12i \$a0, 0
61 50: R_LARCH_TLS_LD_PC_HI20 TLS1
62 50: R_LARCH_RELAX \*ABS\*
63 54: 02800084 addi.w \$a0, \$a0, 0
64 54: R_LARCH_GOT_PC_LO12 TLS1
65 54: R_LARCH_RELAX \*ABS\*
66 58: 1a000004 pcalau12i \$a0, 0
67 58: R_LARCH_TLS_GD_PC_HI20 TLS1
68 58: R_LARCH_RELAX \*ABS\*
69 5c: 02800084 addi.w \$a0, \$a0, 0
70 5c: R_LARCH_GOT_PC_LO12 TLS1
71 5c: R_LARCH_RELAX \*ABS\*