1 #source: ../x86-64-stack.s
3 #name: x86-64 (ILP32) stack-related opcodes (Intel mode)
7 Disassembly of section .text:
10 [ ]*[a-f0-9]+: 50 push rax
11 [ ]*[a-f0-9]+: 66 50 push ax
12 [ ]*[a-f0-9]+: 66 48 50 data32 push rax
13 [ ]*[a-f0-9]+: 58 pop rax
14 [ ]*[a-f0-9]+: 66 58 pop ax
15 [ ]*[a-f0-9]+: 66 48 58 data32 pop rax
16 [ ]*[a-f0-9]+: 8f c0 pop rax
17 [ ]*[a-f0-9]+: 66 8f c0 pop ax
18 [ ]*[a-f0-9]+: 66 48 8f c0 data32 pop rax
19 [ ]*[a-f0-9]+: 8f 00 pop QWORD PTR \[rax\]
20 [ ]*[a-f0-9]+: 66 8f 00 pop WORD PTR \[rax\]
21 [ ]*[a-f0-9]+: 66 48 8f 00 data32 pop QWORD PTR \[rax\]
22 [ ]*[a-f0-9]+: ff d0 call rax
23 [ ]*[a-f0-9]+: 66 ff d0 call ax
24 [ ]*[a-f0-9]+: 66 48 ff d0 data32 call rax
25 [ ]*[a-f0-9]+: ff 10 call QWORD PTR \[rax\]
26 [ ]*[a-f0-9]+: 66 ff 10 call WORD PTR \[rax\]
27 [ ]*[a-f0-9]+: 66 48 ff 10 data32 call QWORD PTR \[rax\]
28 [ ]*[a-f0-9]+: ff e0 jmp rax
29 [ ]*[a-f0-9]+: 66 ff e0 jmp ax
30 [ ]*[a-f0-9]+: 66 48 ff e0 data32 jmp rax
31 [ ]*[a-f0-9]+: ff 20 jmp QWORD PTR \[rax\]
32 [ ]*[a-f0-9]+: 66 ff 20 jmp WORD PTR \[rax\]
33 [ ]*[a-f0-9]+: 66 48 ff 20 data32 jmp QWORD PTR \[rax\]
34 [ ]*[a-f0-9]+: ff f0 push rax
35 [ ]*[a-f0-9]+: 66 ff f0 push ax
36 [ ]*[a-f0-9]+: 66 48 ff f0 data32 push rax
37 [ ]*[a-f0-9]+: ff 30 push QWORD PTR \[rax\]
38 [ ]*[a-f0-9]+: 66 ff 30 push WORD PTR \[rax\]
39 [ ]*[a-f0-9]+: 66 48 ff 30 data32 push QWORD PTR \[rax\]