1 #source: ../x86-64-mem.s
4 #name: x86-64 (ILP32) mem
8 Disassembly of section .text:
11 [ ]*[a-f0-9]+: 0f 01 06 sgdt \(%rsi\)
12 [ ]*[a-f0-9]+: 0f 01 0e sidt \(%rsi\)
13 [ ]*[a-f0-9]+: 0f 01 16 lgdt \(%rsi\)
14 [ ]*[a-f0-9]+: 0f 01 1e lidt \(%rsi\)
15 [ ]*[a-f0-9]+: 0f 01 3e invlpg \(%rsi\)
16 [ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%rsi\)
17 [ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
18 [ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%rsi\)
19 [ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%rsi\)
20 [ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%rsi\)
21 [ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%rsi\)
22 [ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
23 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
24 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
25 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
26 [ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)
27 [ ]*[a-f0-9]+: 0f 01 06 sgdt \(%rsi\)
28 [ ]*[a-f0-9]+: 0f 01 0e sidt \(%rsi\)
29 [ ]*[a-f0-9]+: 0f 01 16 lgdt \(%rsi\)
30 [ ]*[a-f0-9]+: 0f 01 1e lidt \(%rsi\)
31 [ ]*[a-f0-9]+: 0f 01 3e invlpg \(%rsi\)
32 [ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%rsi\)
33 [ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
34 [ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%rsi\)
35 [ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%rsi\)
36 [ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%rsi\)
37 [ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%rsi\)
38 [ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
39 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
40 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
41 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
42 [ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)