7 @ Section A6.1.3 "Use of 0b1101 as a register specifier".
9 @ R13 as the source or destination register of a mov instruction.
10 @ only register to register transfers without shifts are supported,
11 @ with no flag setting
16 @ Using the following instructions to adjust r13 up or down by a
28 @ R13 as a base register <Rn> of any load/store instruction.
45 @ R13 as the first operand <Rn> in any add{s}, cmn, cmp, or sub{s} instruction.
49 add r0, sp, r0, lsl #1
50 adds r0, sp, r0, lsl #1
64 @ ADD (sp plus immediate).
76 @ ADD (sp plus register).
80 add r0, sp, r0, lsl #1
83 adds r0, sp, r0, lsl #1
86 add sp, sp, r0, lsl #1
88 adds sp, sp, r0, lsl #1
92 @ SUB (sp minus immediate).
102 @ SUB (sp minus register).
106 sub r0, sp, r0, lsl #1
107 subs r0, sp, r0, lsl #1
109 sub sp, sp, r0, lsl #1
110 subs sp, sp, r0, lsl #1
112 @ PC-related insns (equivalent to adr).
121 @ nops to pad the section out to an alignment boundary.