4 /* Copyright (C) 2000, 2003 Free Software Foundation
5 Contributed by Alexandre Oliva <aoliva@cygnus.com>
7 This file is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 /* This is a source file with infra-structure to test generators for
22 assemblers and disassemblers.
24 The strategy to generate testcases is as follows. We'll output to
25 two streams: one will get the assembly source, and the other will
26 get regexps that match the expected binary patterns.
28 To generate each instruction, the functions of a func[] are called,
29 each with the corresponding func_arg. Each function should set
30 members of insn_data, to decide what it's going to output to the
31 assembly source, the corresponding output for the disassembler
32 tester, and the bits to be set in the instruction word. The
33 strings to be output must have been allocated with strdup() or
34 malloc(), so that they can be freed. A function may also modify
35 insn_size. More details in test-gen.c
37 Because this would have generated too many tests, we have chosen to
38 define ``random'' sequences of numbers/registers, and simply
39 generate each instruction a couple of times, which should get us
42 In general, test generators should be compiled/run as follows:
45 % ./test > test.s 2 > test.d
47 Please note that this file contains a couple of GCC-isms, such as
48 macro varargs (also available in C99, but with a difference syntax)
49 and labeled elements in initializers (so that insn definitions are
52 It is assumed that the test generator #includes this file after
53 defining any of the preprocessor macros documented below. The test
54 generator is supposed to define instructions, at least one group of
55 instructions, optionally, a sequence of groups.
57 It should also define a main() function that outputs the initial
58 lines of the assembler input and of the test control file, that
59 also contains the disassembler output. The main() funcion may
60 optionally set skip_list too, before calling output_groups() or
63 /* Define to 1 to avoid repeating instructions and to use a simpler
64 register/constant generation mechanism. This makes it much easier
65 to verify that the generated bit patterns are correct. */
66 #ifndef SIMPLIFY_OUTPUT
67 #define SIMPLIFY_OUTPUT 0
70 /* Define to 0 to avoid generating disassembler tests. */
71 #ifndef DISASSEMBLER_TEST
72 #define DISASSEMBLER_TEST 1
75 /* Define to the number of times to repeat the generation of each
76 insn. It's best to use prime numbers, to improve randomization. */
81 /* Define in order to get randomization_counter printed, as a comment,
82 in the disassembler output, after each insn is emitted. */
83 #ifndef OUTPUT_RANDOMIZATION_COUNTER
84 #define OUTPUT_RANDOMIZATION_COUNTER 0
87 /* Other configuration macros are DEFINED_WORD and DEFINED_FUNC_ARG,
94 /* It is expected that the main program defines the type `word' before
97 typedef unsigned long long word;
100 /* This struct is used as the output area for each function. It
101 should store in as_in a pointer to the string to be output to the
102 assembler; in dis_out, the string to be expected in return from the
103 disassembler, and in bits the bits of the instruction word that are
104 enabled by the assembly fragment. */
112 #ifndef DEFINED_FUNC_ARG
113 /* This is the struct that feeds information to each function. You're
114 free to extend it, by `typedef'ing it before including this file,
115 and defining DEFINED_FUNC_ARG. You may even reorder the fields,
116 but do not remove any of the existing fields. */
128 /* This is the struct whose arrays define insns. Each func in the
129 array will be called, in sequence, being given a pointer to the
130 associated arg and a pointer to a zero-initialized output area,
131 that it may fill in. */
134 int (* func) (func_arg *, insn_data *);
138 /* Use this to group insns under a name. */
145 /* This is the size of each instruction. Use `insn_size_bits' instead
146 of `insn_bits' in an insn defition to modify it. */
149 /* The offset of the next insn, as expected in the disassembler
151 int current_offset = 0;
153 /* The offset and name of the last label to be emitted. */
154 int last_label_offset = 0;
155 const char * last_label_name = 0;
157 /* This variable may be initialized in main() to `argv+1', if
158 `argc>1', so that tests are emitted only for instructions that
159 match exactly one of the given command-line arguments. If it is
160 NULL, tests for all instructions are emitted. It must be a
161 NULL-terminated array of pointers to strings (just like
163 char ** skip_list = 0;
165 /* This is a counter used to walk the various arrays of ``random''
166 operand generation. In simplified output mode, it is zeroed after
167 each insn, otherwise it just keeps growing. */
168 unsigned randomization_counter = 0;
170 /* Use `define_insn' to create an array of funcs to define an insn,
171 then `insn' to refer to that insn when defining an insn group. */
172 #define define_insn(insname, funcs...) \
173 func i_ ## insname[] = { funcs, { 0 } }
174 #define insn(insname) (i_ ## insname)
176 /* Use these to output a comma followed by an optional space, a single
177 space, a plus sign, left and right square brackets and parentheses,
178 all of them properly quoted. */
179 #define comma literal_q (", ", ", ?")
180 #define space literal (" ")
181 #define tab literal ("\t")
182 #define plus literal_q ("+", "\\+")
183 #define lsqbkt literal_q ("[", "\\[")
184 #define rsqbkt literal_q ("]", "\\]")
185 #define lparen literal_q ("(", "\\(")
186 #define rparen literal_q (")", "\\)")
188 /* Use this as a placeholder when you define a macro that expects an
189 argument, but you don't have anything to output there. */
191 nothing (func_arg *arg, insn_data *data)
192 #define nothing { nothing }
197 /* This is to be used in the argument list of define_insn, causing a
198 string to be copied into both the assembly and the expected
199 disassembler output. It is assumed not to modify the binary
200 encoding of the insn. */
202 literal (func_arg *arg, insn_data *data)
203 #define literal(s) { literal, { p1: (s) } }
205 data->as_in = data->dis_out = strdup ((char *) arg->p1);
209 /* The characters `[', `]', `\\' and `^' must be quoted in the
210 disassembler-output matcher. If a literal string contains any of
211 these characters, use literal_q instead of literal, and specify the
212 unquoted version (for as input) as the first argument, and the
213 quoted version (for expected disassembler output) as the second
216 literal_q (func_arg *arg, insn_data *data)
217 #define literal_q(s,q) { literal_q, { p1: (s), p2: (q) } }
219 data->as_in = strdup ((char *) arg->p1);
220 data->dis_out = strdup ((char *) arg->p2);
224 /* Given an insn name, check whether it should be skipped or not,
225 depending on skip_list. Return non-zero if the insn is to be
228 skip_insn (char *name)
235 for (test = skip_list; * test; ++ test)
236 if (strcmp (name, * test) == 0)
242 /* Use this to emit the actual insn name, with its opcode, in
243 architectures with fixed-length instructions. */
245 insn_bits (func_arg *arg, insn_data *data)
246 #define insn_bits(name,bits) \
247 { insn_bits, { p1: # name, w: bits } }
249 if (skip_insn ((char *) arg->p1))
251 data->as_in = data->dis_out = strdup ((char *) arg->p1);
256 /* Use this to emit the insn name and its opcode in architectures
257 without a variable instruction length. */
259 insn_size_bits (func_arg *arg, insn_data *data)
260 #define insn_size_bits(name,size,bits) \
261 { insn_size_bits, { p1: # name, i1: size, w: bits } }
263 if (skip_insn ((char *) arg->p1))
265 data->as_in = data->dis_out = strdup ((char *) arg->p1);
271 /* Use this to advance the random generator by one, in case it is
272 generating repetitive patterns. It is usually good to arrange that
273 each insn consumes a prime number of ``random'' numbers, or, at
274 least, that it does not consume an exact power of two ``random''
277 tick_random (func_arg *arg, insn_data *data)
278 #define tick_random { tick_random }
280 ++ randomization_counter;
284 /* Select the next ``random'' number from the array V of size S, and
285 advance the counter. */
286 #define get_bits_from_size(V,S) \
287 ((V)[randomization_counter ++ % (S)])
289 /* Utility macros. `_get_bits_var', used in some macros below, assume
290 the names of the arrays used to define the ``random'' orders start
291 with `random_order_'. */
292 #define _get_bits_var(N) (random_order_ ## N)
293 #define _get_bits_size(V) (sizeof (V) / sizeof * (V))
295 /* Use this within a `func_arg' to select one of the arrays below (or
296 any other array that starts with random_order_N. */
297 #define mk_get_bits(N) \
298 p2: _get_bits_var (N), i3: _get_bits_size (_get_bits_var (N))
300 /* Simplified versions of get_bits_from_size for when you have access
301 to the array, so that its size can be implicitly calculated. */
302 #define get_bits_from(V) get_bits_from_size ((V),_get_bits_size ((V)))
303 #define get_bits(N) get_bits_from (_get_bits_var (N))
306 /* Use `2u' to generate 2-bit unsigned values. Good for selecting
307 registers randomly from a set of 4 registers. */
308 unsigned random_order_2u[] =
310 /* This sequence was generated by hand so that no digit appers more
311 than once in any horizontal or vertical line. */
318 /* Use `3u' to generate 3-bit unsigned values. Good for selecting
319 registers randomly from a set of 8 registers. */
320 unsigned random_order_3u[] =
322 /* This sequence was generated by:
324 except that the middle pairs were swapped. */
325 0, 6, 3, 1, 4, 2, 7, 5,
326 /* This sequence was generated by:
328 except that the middle pairs were swapped. */
329 0, 2, 5, 7, 4, 6, 1, 3,
332 /* Use `4u' to generate 4-bit unsigned values. Good for selecting
333 registers randomly from a set of 16 registers. */
334 unsigned random_order_4u[] =
336 /* This sequence was generated by:
338 except that the middle pairs were swapped. */
339 0, 5, 15, 10, 9, 4, 14, 3,
340 8, 13, 7, 2, 1, 12, 6, 11,
341 /* This sequence was generated by:
343 except that the middle pairs were swapped. */
344 0, 7, 5, 14, 3, 12, 10, 1,
345 8, 15, 13, 6, 11, 4, 2, 9,
348 /* Use `5u' to generate 5-bit unsigned values. Good for selecting
349 registers randomly from a set of 32 registers. */
350 unsigned random_order_5u[] =
352 /* This sequence was generated by:
354 except that the middle pairs were swapped. */
355 0, 26, 13, 7, 20, 14, 1, 27,
356 8, 2, 21, 15, 28, 22, 9, 3,
357 16, 10, 29, 23, 4, 30, 17, 11,
358 24, 18, 5, 31, 12, 6, 25, 19
361 /* Use `7s' to generate 7-bit signed values. Good for selecting
362 ``interesting'' constants from -64 to +63. */
363 int random_order_7s[] =
365 /* Sequence generated by hand, to explore limit values and a few
366 intermediate values selected by chance. Keep the number of
367 intermediate values low, to ensure that the limit values are
368 generated often enough. */
369 0, -1, -64, 63, -32, 32, 24, -20,
370 9, -27, -31, 33, 40, -2, -5, 1
373 /* Use `8s' to generate 8-bit signed values. Good for selecting
374 ``interesting'' constants from -128 to +127. */
375 int random_order_8s[] =
377 /* Sequence generated by hand, to explore limit values and a few
378 intermediate values selected by chance. Keep the number of
379 intermediate values low, to ensure that the limit values are
380 generated often enough. */
381 0, -1, -128, 127, -32, 32, 24, -20,
382 73, -27, -95, 33, 104, -2, -69, 1
385 /* Use `9s' to generate 9-bit signed values. Good for selecting
386 ``interesting'' constants from -256 to +255. */
387 int random_order_9s[] =
389 /* Sequence generated by hand, to explore limit values and a few
390 intermediate values selected by chance. Keep the number of
391 intermediate values low, to ensure that the limit values are
392 generated often enough. */
393 0, -1, -256, 255, -64, 64, 72, -40,
394 73, -137, -158, 37, 104, -240, -69, 1
397 /* Use `16s' to generate 16-bit signed values. Good for selecting
398 ``interesting'' constants from -32768 to +32767. */
399 int random_order_16s[] =
401 /* Sequence generated by hand, to explore limit values and a few
402 intermediate values selected by chance. Keep the number of
403 intermediate values low, to ensure that the limit values are
404 generated often enough. */
407 (-1 << 15) | (64 << 8) | 32,
415 /* Use `24s' to generate 24-bit signed values. Good for selecting
416 ``interesting'' constants from -2^23 to 2^23-1. */
417 int random_order_24s[] =
419 /* Sequence generated by hand, to explore limit values and a few
420 intermediate values selected by chance. Keep the number of
421 intermediate values low, to ensure that the limit values are
422 generated often enough. */
425 (-1 << 23) | (((64 << 8) | 32) << 8) | 16,
426 (((64 << 8) | 32) << 8) | 16,
428 (-1 << 23) | 0x876543,
430 (-1 << 23) | 0x80ff01
433 /* Use `32s' to generate 32-bit signed values. Good for selecting
434 ``interesting'' constants from -2^31 to 2^31-1. */
435 int random_order_32s[] =
437 /* Sequence generated by hand, to explore limit values and a few
438 intermediate values selected by chance. Keep the number of
439 intermediate values low, to ensure that the limit values are
440 generated often enough. */
443 (-1 << 31) | (((((64 << 8) | 32) << 8) | 16) << 8) | 8,
444 (((((64 << 8) | 32) << 8) | 16) << 8) | 8,
446 (-1 << 31) | 0x87654321,
448 (-1 << 31) | 0x80ffff01
451 /* This function computes the number of digits needed to represent a
454 ulen (unsigned long i, unsigned base)
460 for (; i > 0; ++ count)
465 /* Use this to generate a signed constant of the given size, shifted
466 by the given amount, with the specified endianness. */
468 signed_constant (func_arg * arg, insn_data * data)
469 #define signed_constant(bits, shift, revert) \
470 { signed_constant, { i1: shift, i2: bits * (revert ? -1 : 1), \
471 mk_get_bits (bits ## s) } }
473 long val = get_bits_from_size ((unsigned *) arg->p2, arg->i3);
474 int len = (val >= 0 ? ulen (val, 10) : (1 + ulen (-val, 10)));
475 int nbits = (arg->i2 >= 0 ? arg->i2 : -arg->i2);
476 word bits = ((word) val) & (((((word) 1) << (nbits - 1)) << 1) - 1);
478 data->as_in = data->dis_out = malloc (len + 1);
479 sprintf (data->as_in, "%ld", val);
487 rbits |= bits & 0xff;
495 data->bits = bits << arg->i1;
500 /* Use this to generate a unsigned constant of the given size, shifted
501 by the given amount, with the specified endianness. */
503 unsigned_constant (func_arg * arg, insn_data * data)
504 #define unsigned_constant(bits, shift, revert) \
505 { unsigned_constant, { i1: shift, i2: bits * (revert ? -1 : 1), \
506 mk_get_bits (bits ## s) } }
508 int nbits = (arg->i2 >= 0 ? arg->i2 : -arg->i2);
510 get_bits_from_size ((unsigned *) arg->p2, arg->i3)
511 & (((((word) 1) << (nbits - 1)) << 1) - 1);
512 int len = ulen (val, 10);
515 data->as_in = data->dis_out = malloc (len + 1);
516 sprintf (data->as_in, "%lu", val);
524 rbits |= bits & 0xff;
532 data->bits = bits << arg->i1;
537 /* Use this to generate an absolute address of the given size, shifted
538 by the given amount, with the specified endianness. */
540 absolute_address (func_arg *arg, insn_data *data)
541 #define absolute_address (bits, shift, revert) \
542 { absolute_address, { i1: shift, i2: bits * (revert ? -1 : 1), \
543 mk_get_bits (bits ## s) } }
545 int nbits = (arg->i2 >= 0 ? arg->i2 : -arg->i2);
547 get_bits_from_size ((unsigned *) arg->p2, arg->i3)
548 & (((((word) 1) << (nbits - 1)) << 1) - 1);
551 data->as_in = malloc (ulen (val, 10) + 1);
552 sprintf (data->as_in, "%lu", val);
553 data->dis_out = malloc (nbits / 4 + 11);
554 sprintf (data->dis_out, "0*%0*lx <[^>]*>", nbits / 4, val);
562 rbits |= bits & 0xff;
570 data->bits = bits << arg->i1;
575 /* Use this to generate a register name that starts with a given
576 prefix, and is followed by a number generated by `gen' (see
577 mk_get_bits below). The register number is shifted `shift' bits
578 left before being stored in the binary insn. */
580 reg_p (func_arg *arg, insn_data *data)
581 #define reg_p(prefix,shift,gen) \
582 { reg_p, { i1: (shift), p1: (prefix), gen } }
584 unsigned reg = get_bits_from_size ((unsigned *) arg->p2, arg->i3);
585 char *regname = (char *) arg->p1;
587 data->as_in = data->dis_out = malloc (strlen (regname) + ulen (reg, 10) + 1);
588 sprintf (data->as_in, "%s%u", regname, reg);
590 data->bits <<= arg->i1;
594 /* Use this to generate a register name taken from an array. The
595 index into the array `names' is to be produced by `gen', but `mask'
596 may be used to filter out some of the bits before choosing the
597 disassembler output and the bits for the binary insn, shifted left
598 by `shift'. For example, if registers have canonical names, but
599 can also be referred to by aliases, the array can be n times larger
600 than the actual number of registers, and the mask is then used to
601 pick the canonical name for the disassembler output, and to
602 eliminate the extra bits from the binary output. */
604 reg_r (func_arg *arg, insn_data *data)
605 #define reg_r(names,shift,mask,gen) \
606 { reg_r, { i1: (shift), i2: (mask), p1: (names), gen } }
608 unsigned reg = get_bits_from_size ((unsigned *) arg->p2, arg->i3);
610 data->as_in = strdup (((const char **) arg->p1)[reg]);
612 data->dis_out = strdup (((const char **) arg->p1)[reg]);
614 data->bits <<= arg->i1;
618 /* Given a NULL-terminated array of insns-definitions (pointers to
619 arrays of funcs), output test code for the insns to as_in (assembly
620 input) and dis_out (expected disassembler output). */
622 output_insns (func **insn, FILE *as_in, FILE *dis_out)
624 for (; *insn; ++insn)
628 int part_count = 0, r;
630 /* Figure out how many funcs have to be called. */
631 while (parts[part_count].func)
634 /* Allocate storage for the output area of each func. */
635 data = (insn_data*) malloc (part_count * sizeof (insn_data));
638 randomization_counter = 0;
640 /* Repeat each insn several times. */
641 for (r = 0; r < INSN_REPEAT; ++r)
644 unsigned saved_rc = randomization_counter;
648 for (part = 0; part < part_count; ++part)
650 /* Zero-initialize the storage. */
651 data[part].as_in = data[part].dis_out = 0;
653 /* If a func returns non-zero, skip this line. */
654 if (parts[part].func (&parts[part].arg, &data[part]))
656 /* Otherwise, get its output bit pattern into the total
658 bits |= data[part].bits;
663 /* Output the whole assembly line. */
665 for (part = 0; part < part_count; ++part)
666 if (data[part].as_in)
667 fputs (data[part].as_in, as_in);
673 /* Output the disassembler expected output line,
674 starting with the offset and the insn binary pattern,
675 just like objdump outputs. Because objdump sometimes
676 inserts spaces between each byte in the insn binary
677 pattern, make the space optional. */
678 fprintf (dis_out, "0*%x <", current_offset);
680 if (current_offset == last_label_offset)
681 fputs (last_label_name, dis_out);
683 fprintf (dis_out, "%s\\+0x%x", last_label_name,
684 current_offset - last_label_offset);
686 fputs ("[^>]*", dis_out);
687 fputs ("> ", dis_out);
688 for (part = insn_size; part-- > 0; )
689 fprintf (dis_out, "%02x ?", (int)(bits >> (part * 8)) & 0xff);
690 fputs (" *\t", dis_out);
692 #if DISASSEMBLER_TEST
693 for (part = 0; part < part_count; ++part)
694 if (data[part].dis_out)
695 fputs (data[part].dis_out, dis_out);
697 /* If we're not testing the DISASSEMBLER, just match
699 fputs (".*", dis_out);
701 fputc ('\n', dis_out);
702 #if OUTPUT_RANDOMIZATION_COUNTER
703 fprintf (dis_out, "# %i\n", randomization_counter);
707 /* Account for the insn_size bytes we've just output. */
708 current_offset += insn_size;
710 /* Release the memory that each func may have allocated. */
714 if (data[part].as_in)
715 free (data[part].as_in);
716 if (data[part].dis_out
717 && data[part].dis_out != data[part].as_in)
718 free (data[part].dis_out);
721 /* There's nothing random here, don't repeat this insn. */
722 if (randomization_counter == saved_rc)
730 /* For each group, output an asm label and the insns of the group. */
732 output_groups (group_t group[], FILE *as_in, FILE *dis_out)
734 for (; group->name; ++group)
736 fprintf (as_in, "%s:\n", group->name);
737 fprintf (dis_out, "# %s:\n", group->name);
738 last_label_offset = current_offset;
739 last_label_name = group->name;
740 output_insns (group->insns, as_in, dis_out);