1 @c Copyright (C) 1997 Free Software Foundation, Inc.
2 @c This is part of the GAS manual.
3 @c For copying conditions, see the file as.texinfo.
6 @chapter v850 Dependent Features
10 * V850 Options:: Options
11 * V850 Syntax:: Syntax
12 * V850 Floating Point:: Floating Point
13 * V850 Directives:: V850 Machine Directives
14 * V850 Opcodes:: Opcodes
19 @cindex V850 options (none)
20 @cindex options for V850 (none)
21 @code{@value{AS}} supports the following additional command-line options
22 for the V850 processor family:
24 @cindex command line options, V850
25 @cindex V850 command line options
28 @cindex @code{-wsigned_overflow} command line option, V850
29 @item -wsigned_overflow
30 Causes warnings to be produced when signed immediate values overflow the
31 space available for then within their opcodes. By default this option
32 is disabled as it is possible to receive spurious warnings due to using
33 exact bit patterns as immediate constants.
35 @cindex @code{-wunsigned_overflow} command line option, V850
36 @item -wunsigned_overflow
37 Causes warnings to be produced when unsigned immediate values overflow
38 the space available for then within their opcodes. By default this
39 option is disabled as it is possible to receive spurious warnings due to
40 using exact bit patterns as immediate constants.
42 @cindex @code{-mv850} command line option, V850
44 Specifies that the assembled code should be marked as being targeted at
45 the V850 processor. This allows the linker to detect attempts to link
46 such code with code assembled for other processors.
48 @c start-santize-v850e
49 @cindex @code{-mv850e} command line option, V850
51 Specifies that the assembled code should be marked as being targeted at
52 the V850E processor. This allows the linker to detect attempts to link
53 such code with code assembled for other processors.
56 @c start-santize-v850eq
57 @cindex @code{-mv850eq} command line option, V850
59 Specifies that the assembled code should be marked as being targeted at
60 the V850EQ processor. This allows the linker to detect attempts to link
61 such code with code assembled for other processors.
70 * V850-Chars:: Special Characters
71 * V850-Regs:: Register Names
75 @subsection Special Characters
77 @cindex line comment character, V850
78 @cindex V850 line comment character
79 @samp{#} is the line comment character.
81 @subsection Register Names
83 @cindex V850 register names
84 @cindex register names, V850
85 @code{@value{AS}} supports the following names for registers:
87 @cindex @code{zero} register, V850
88 @item general register 0
90 @item general register 1
92 @item general register 2
94 @cindex @code{sp} register, V850
95 @item general register 3
97 @cindex @code{gp} register, V850
98 @item general register 4
100 @cindex @code{tp} register, V850
101 @item general register 5
103 @item general register 6
105 @item general register 7
107 @item general register 8
109 @item general register 9
111 @item general register 10
113 @item general register 11
115 @item general register 12
117 @item general register 13
119 @item general register 14
121 @item general register 15
123 @item general register 16
125 @item general register 17
127 @item general register 18
129 @item general register 19
131 @item general register 20
133 @item general register 21
135 @item general register 22
137 @item general register 23
139 @item general register 24
141 @item general register 25
143 @item general register 26
145 @item general register 27
147 @item general register 28
149 @item general register 29
151 @cindex @code{ep} register, V850
152 @item general register 30
154 @cindex @code{lp} register, V850
155 @item general register 31
157 @cindex @code{eipc} register, V850
158 @item system register 0
160 @cindex @code{eipsw} register, V850
161 @item system register 1
163 @cindex @code{fepc} register, V850
164 @item system register 2
166 @cindex @code{fepsw} register, V850
167 @item system register 3
169 @cindex @code{ecr} register, V850
170 @item system register 4
172 @cindex @code{psw} register, V850
173 @item system register 5
175 @c start-santize-v850e
176 @cindex @code{ctpc} register, V850
177 @item system register 16
179 @cindex @code{ctpsw} register, V850
180 @item system register 17
182 @cindex @code{dbpc} register, V850
183 @item system register 18
185 @cindex @code{dbpsw} register, V850
186 @item system register 19
188 @cindex @code{ctbp} register, V850
189 @item system register 20
194 @node V850 Floating Point
195 @section Floating Point
197 @cindex floating point, V850 (@sc{ieee})
198 @cindex V850 floating point (@sc{ieee})
199 The V850 family uses @sc{ieee} floating-point numbers.
201 @node V850 Directives
202 @section V850 Machine Directives
204 @cindex machine directives, V850
205 @cindex V850 machine directives
207 @cindex @code{offset} directive, V850
208 @item .offset @var{<expression>}
209 Moves the offset into the current section to the specified amount.
211 @cindex @code{section} directive, V850
212 @item .section "name", <type>
213 This is an extension to the standard .section directive. It sets the
214 current section to be <type> and creates an alias for this section
217 @cindex @code{.v850} directive, V850
219 Specifies that the assembled code should be marked as being targeted at
220 the V850 processor. This allows the linker to detect attempts to link
221 such code with code assembled for other processors.
223 @c start-santize-v850e
224 @cindex @code{.v850e} directive, V850
226 Specifies that the assembled code should be marked as being targeted at
227 the V850E processor. This allows the linker to detect attempts to link
228 such code with code assembled for other processors.
231 @c start-santize-v850eq
232 @cindex @code{.v850eq} directive, V850
234 Specifies that the assembled code should be marked as being targeted at
235 the V850EQ processor. This allows the linker to detect attempts to link
236 such code with code assembled for other processors.
237 @c end-santize-v850eq
245 @cindex opcodes for V850
246 @code{@value{AS}} implements all the standard V850 opcodes.
248 @code{@value{AS}} also implements the following pseudo ops:
252 @cindex @code{hi0} pseudo-op, V850
254 Computes the higher 16 bits of the given expression and stores it into
255 the immediate operand field of the given instruction. For example:
257 @samp{mulhi hi0(here - there), r5, r6}
259 computes the difference between the address of labels 'here' and
260 'there', takes the upper 16 bits of this difference, shifts it down 16
261 bits and then mutliplies it by the lower 16 bits in register 5, putting
262 the result into register 6.
264 @cindex @code{lo} pseudo-op, V850
266 Computes the lower 16 bits of the given expression and stores it into
267 the immediate operand field of the given instruction. For example:
269 @samp{addi lo(here - there), r5, r6}
271 computes the difference between the address of labels 'here' and
272 'there', takes the lower 16 bits of this difference and adds it to
273 register 5, putting the result into register 6.
275 @cindex @code{hi} pseudo-op, V850
277 Computes the higher 16 bits of the given expression and then adds the
278 value of the most significant bit of the lower 16 bits of the expression
279 and stores the result into the immediate operand field of the given
280 instruction. For example the following code can be used to compute the
281 address of the label 'here' and store it into register 6:
283 @samp{movhi hi(here), r0, r6}
284 @samp{movea lo(here), r6, r6}
286 The reason for this special behaviour is that movea performs a sign
287 extention on its immediate operand. So for example if the address of
288 'here' was 0xFFFFFFFF then without the special behaviour of the hi()
289 pseudo-op the movhi instruction would put 0xFFFF0000 into r6, then the
290 movea instruction would takes its immediate operand, 0xFFFF, sign extend
291 it to 32 bits, 0xFFFFFFFF, and then add it into r6 giving 0xFFFEFFFF
292 which is wrong (the fifth nibble is E). With the hi() pseudo op adding
293 in the top bit of the lo() pseudo op, the movhi instruction actually
294 stores 0 into r6 (0xFFFF + 1 = 0x0000), so that the movea instruction
295 stores 0xFFFFFFFF into r6 - the right value.
297 @c start-santize-v850e
298 @cindex @code{hilo} pseudo-op, V850
300 Computes the 32 bit value of the given expression and stores it into
301 the immediate operand field of the given instruction (which must be a
302 mov instruction). For example:
304 @samp{mov hilo(here), r6}
306 computes the absolute address of label 'here' and puts the result into
310 @cindex @code{sdaoff} pseudo-op, V850
312 Computes the offset of the named variable from the start of the Small
313 Data Area (whoes address is held in register 4, the GP register) and
314 stores the result as a 16 bit signed value in the immediate operand
315 field of the given instruction. For example:
317 @samp{ld.w sdaoff(_a_variable)[gp],r6}
319 loads the contents of the location pointed to by the label '_a_variable'
320 into register 6, provided that the label is located somewhere within +/-
321 32K of the address held in the GP register. [Note the linker assumes
322 that the GP register contains a fixed address set to the address of the
323 label called '__gp'. This can either be set up automatically by the
324 linker, or specifically set by using the @samp{--defsym __gp=<value>}
325 command line option].
327 @cindex @code{tdaoff} pseudo-op, V850
329 Computes the offset of the named variable from the start of the Tiny
330 Data Area (whoes address is held in register 30, the EP register) and
331 stores the result as a
332 @c start-santize-v850e
335 7 or 8 bit unsigned value in the immediate
336 operand field of the given instruction. For example:
338 @samp{sld.w tdaoff(_a_variable)[ep],r6}
340 loads the contents of the location pointed to by the label '_a_variable'
341 into register 6, provided that the label is located somewhere within +256
342 bytes of the address held in the EP register. [Note the linker assumes
343 that the EP register contains a fixed address set to the address of the
344 label called '__ep'. This can either be set up automatically by the
345 linker, or specifically set by using the @samp{--defsym __ep=<value>}
346 command line option].
348 @cindex @code{zdaoff} pseudo-op, V850
350 Computes the offset of the named variable from address 0 and stores the
351 result as a 16 bit signed value in the immediate operand field of the
352 given instruction. For example:
354 @samp{movea zdaoff(_a_variable),zero,r6}
356 puts the address of the label '_a_variable' into register 6, assuming
357 that the label is somewhere within the first 32K of memory. (Strictly
358 speaking it also possible to access the last 32K of memory as well, as
359 the offsets are signed).
361 @c start-santize-v850e
362 @cindex @code{ctoff} pseudo-op, V850
364 Computes the offset of the named variable from the start of the Call
365 Table Area (whoes address is helg in system register 20, the CTBP
366 register) and stores the result a 6 or 16 bit unsigned value in the
367 immediate field of then given instruction or piece of data. For
370 @samp{callt ctoff(table_func1)}
372 will put the call the function whoes address is held in the call table
373 at the location labeled 'table_func1'.
379 For information on the V850 instruction set, see @cite{V850
380 Family 32-/16-Bit single-Chip Microcontroller Architecture Manual} from NEC.