1 @c Copyright (C) 2006-2017 Free Software Foundation, Inc.
2 @c This is part of the GAS manual.
3 @c For copying conditions, see the file as.texinfo.
8 @chapter AVR Dependent Features
12 @node Machine Dependencies
13 @chapter AVR Dependent Features
18 * AVR Options:: Options
20 * AVR Opcodes:: Opcodes
25 @cindex AVR options (none)
26 @cindex options for AVR (none)
30 @cindex @code{-mmcu=} command line option, AVR
32 Specify ATMEL AVR instruction set or MCU type.
34 Instruction set avr1 is for the minimal AVR core, not supported by the C
35 compiler, only for assembler programs (MCU types: at90s1200,
36 attiny11, attiny12, attiny15, attiny28).
38 Instruction set avr2 (default) is for the classic AVR core with up to
39 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
40 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
43 Instruction set avr25 is for the classic AVR core with up to 8K program memory
44 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
45 attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
46 attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461,
47 attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
48 attiny828, at86rf401, ata6289, ata5272).
50 Instruction set avr3 is for the classic AVR core with up to 128K program
51 memory space (MCU types: at43usb355, at76c711).
53 Instruction set avr31 is for the classic AVR core with exactly 128K program
54 memory space (MCU types: atmega103, at43usb320).
56 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
57 instructions (MCU types: attiny167, attiny1634, at90usb82, at90usb162,
58 atmega8u2, atmega16u2, atmega32u2, ata5505).
60 Instruction set avr4 is for the enhanced AVR core with up to 8K program
61 memory space (MCU types: atmega48, atmega48a, atmega48pa, atmega48p, atmega8,
62 atmega8a, atmega88, atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535,
63 atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81,
66 Instruction set avr5 is for the enhanced AVR core with up to 128K program
67 memory space (MCU types: at90pwm161, atmega16, atmega16a, atmega161, atmega162,
68 atmega163, atmega164a, atmega164p, atmega164pa, atmega165, atmega165a,
69 atmega165p, atmega165pa, atmega168, atmega168a, atmega168p, atmega168pa,
70 atmega169, atmega169a, atmega169p, atmega169pa, atmega32, atmega323, atmega324a,
71 atmega324p, atmega324pa, atmega325, atmega325a, atmega32, atmega32a, atmega323,
72 atmega324a, atmega324p, atmega324pa, atmega325, atmega325a, atmega325p,
73 atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa,
74 atmega328, atmega328p, atmega329, atmega329a, atmega329p, atmega329pa,
75 atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega64a,
76 atmega64rfr2, atmega644rfr2, atmega640, atmega644, atmega644a, atmega644p,
77 atmega644pa, atmega645, atmega645a, atmega645p, atmega6450, atmega6450a,
78 atmega6450p, atmega649, atmega649a, atmega649p, atmega6490, atmega6490a,
79 atmega6490p, atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb,
80 atmega32hvb, atmega32hvbrevb, atmega64hve, at90can32, at90can64, at90pwm161,
81 at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1,
82 atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k,
83 at90scr100, ata5790, ata5795).
85 Instruction set avr51 is for the enhanced AVR core with exactly 128K
86 program memory space (MCU types: atmega128, atmega128a, atmega1280,
87 atmega1281, atmega1284, atmega1284p, atmega128rfa1, atmega128rfr2,
88 atmega1284rfr2, at90can128, at90usb1286, at90usb1287, m3000).
90 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC
91 (MCU types: atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2).
93 Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K
94 program memory space and less than 64K data space (MCU types:
95 atxmega16a4, atxmega16a4u, atxmega16c4, atxmega16d4, atxmega16x1,
96 atxmega32a4, atxmega32a4u, atxmega32c4, atxmega32d4, atxmega16e5,
97 atxmega8e5, atxmega32e5, atxmega32x1).
99 Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K
100 program memory space and greater than 64K data space (MCU types:
103 Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K
104 program memory space and less than 64K data space (MCU types:
105 atxmega64a3, atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3,
106 atxmega64c3, atxmega64d3, atxmega64d4).
108 Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K
109 program memory space and greater than 64K data space (MCU types:
110 atxmega64a1, atxmega64a1u).
112 Instruction set avrxmega6 is for the XMEGA AVR core with larger than
113 64K program memory space and less than 64K data space (MCU types:
114 atxmega128a3, atxmega128a3u, atxmega128c3, atxmega128d3, atxmega128d4,
115 atxmega192a3, atxmega192a3u, atxmega128b1, atxmega128b3, atxmega192c3,
116 atxmega192d3, atxmega256a3, atxmega256a3u, atxmega256a3b,
117 atxmega256a3bu, atxmega256c3, atxmega256d3, atxmega384c3,
120 Instruction set avrxmega7 is for the XMEGA AVR core with larger than
121 64K program memory space and greater than 64K data space (MCU types:
122 atxmega128a1, atxmega128a1u, atxmega128a4u).
124 Instruction set avrtiny is for the ATtiny4/5/9/10/20/40
127 @cindex @code{-mall-opcodes} command line option, AVR
129 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
131 @cindex @code{-mno-skip-bug} command line option, AVR
133 This option disable warnings for skipping two-word instructions.
135 @cindex @code{-mno-wrap} command line option, AVR
137 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
139 @cindex @code{-mrmw} command line option, AVR
141 Accept Read-Modify-Write (@code{XCH,LAC,LAS,LAT}) instructions.
143 @cindex @code{-mlink-relax} command line option, AVR
145 Enable support for link-time relaxation. This is now on by default
146 and this flag no longer has any effect.
148 @cindex @code{-mno-link-relax} command line option, AVR
149 @item -mno-link-relax
150 Disable support for link-time relaxation. The assembler will resolve
151 relocations when it can, and may be able to better compress some debug
160 * AVR-Chars:: Special Characters
161 * AVR-Regs:: Register Names
162 * AVR-Modifiers:: Relocatable Expression Modifiers
166 @subsection Special Characters
168 @cindex line comment character, AVR
169 @cindex AVR line comment character
171 The presence of a @samp{;} anywhere on a line indicates the start of a
172 comment that extends to the end of that line.
174 If a @samp{#} appears as the first character of a line, the whole line
175 is treated as a comment, but in this case the line can also be a
176 logical line number directive (@pxref{Comments}) or a preprocessor
177 control command (@pxref{Preprocessing}).
179 @cindex line separator, AVR
180 @cindex statement separator, AVR
181 @cindex AVR line separator
183 The @samp{$} character can be used instead of a newline to separate
187 @subsection Register Names
189 @cindex AVR register names
190 @cindex register names, AVR
192 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
193 @samp{r1}, ... @samp{r31}.
194 Six of the 32 registers can be used as three 16-bit indirect address
195 register pointers for Data Space addressing. One of the these address
196 pointers can also be used as an address pointer for look up tables in
197 Flash program memory. These added function registers are the 16-bit
198 @samp{X}, @samp{Y} and @samp{Z} - registers.
207 @subsection Relocatable Expression Modifiers
209 @cindex AVR modifiers
212 The assembler supports several modifiers when using relocatable addresses
213 in AVR instruction operands. The general syntax is the following:
216 modifier(relocatable-expression)
220 @cindex symbol modifiers
224 This modifier allows you to use bits 0 through 7 of
225 an address expression as 8 bit relocatable expression.
229 This modifier allows you to use bits 7 through 15 of an address expression
230 as 8 bit relocatable expression. This is useful with, for example, the
231 AVR @samp{ldi} instruction and @samp{lo8} modifier.
242 This modifier allows you to use bits 16 through 23 of
243 an address expression as 8 bit relocatable expression.
244 Also, can be useful for loading 32 bit constants.
248 Synonym of @samp{hh8}.
252 This modifier allows you to use bits 24 through 31 of
253 an expression as 8 bit expression. This is useful with, for example, the
254 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
255 @samp{hhi8}, modifier.
260 ldi r26, lo8(285774925)
261 ldi r27, hi8(285774925)
262 ldi r28, hlo8(285774925)
263 ldi r29, hhi8(285774925)
264 ; r29,r28,r27,r26 = 285774925
269 This modifier allows you to use bits 0 through 7 of
270 an address expression as 8 bit relocatable expression.
271 This modifier useful for addressing data or code from
272 Flash/Program memory. The using of @samp{pm_lo8} similar
277 This modifier allows you to use bits 8 through 15 of
278 an address expression as 8 bit relocatable expression.
279 This modifier useful for addressing data or code from
280 Flash/Program memory.
284 This modifier allows you to use bits 15 through 23 of
285 an address expression as 8 bit relocatable expression.
286 This modifier useful for addressing data or code from
287 Flash/Program memory.
294 @cindex AVR opcode summary
295 @cindex opcode summary, AVR
296 @cindex mnemonics, AVR
297 @cindex instruction summary, AVR
298 For detailed information on the AVR machine instruction set, see
299 @url{www.atmel.com/products/AVR}.
301 @code{@value{AS}} implements all the standard AVR opcodes.
302 The following table summarizes the AVR opcodes, and their arguments.
307 d @r{`ldi' register (r16-r31)}
308 v @r{`movw' even register (r0, r2, ..., r28, r30)}
309 a @r{`fmul' register (r16-r23)}
310 w @r{`adiw' register (r24,r26,r28,r30)}
311 e @r{pointer registers (X,Y,Z)}
312 b @r{base pointer register and displacement ([YZ]+disp)}
313 z @r{Z pointer register (for [e]lpm Rd,Z[+])}
314 M @r{immediate value from 0 to 255}
315 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
316 s @r{immediate value from 0 to 7}
317 P @r{Port address value from 0 to 63. (in, out)}
318 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
319 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
320 i @r{immediate value}
321 l @r{signed pc relative offset from -64 to 63}
322 L @r{signed pc relative offset from -2048 to 2047}
323 h @r{absolute code address (call, jmp)}
324 S @r{immediate value from 0 to 7 (S = s << 4)}
325 ? @r{use this opcode entry if no parameters, else use next opcode entry}
343 100101001SSS1000 bclr S
344 100101000SSS1000 bset S
345 1001010100001001 icall
346 1001010000001001 ijmp
347 1001010111001000 lpm ?
348 1001000ddddd010+ lpm r,z
349 1001010111011000 elpm ?
350 1001000ddddd011+ elpm r,z
353 1001010100011000 reti
354 1001010110001000 sleep
355 1001010110011000 break
358 000111rdddddrrrr adc r,r
359 000011rdddddrrrr add r,r
360 001000rdddddrrrr and r,r
361 000101rdddddrrrr cp r,r
362 000001rdddddrrrr cpc r,r
363 000100rdddddrrrr cpse r,r
364 001001rdddddrrrr eor r,r
365 001011rdddddrrrr mov r,r
366 100111rdddddrrrr mul r,r
367 001010rdddddrrrr or r,r
368 000010rdddddrrrr sbc r,r
369 000110rdddddrrrr sub r,r
370 001001rdddddrrrr clr r
371 000011rdddddrrrr lsl r
372 000111rdddddrrrr rol r
373 001000rdddddrrrr tst r
374 0111KKKKddddKKKK andi d,M
375 0111KKKKddddKKKK cbr d,n
376 1110KKKKddddKKKK ldi d,M
377 11101111dddd1111 ser d
378 0110KKKKddddKKKK ori d,M
379 0110KKKKddddKKKK sbr d,M
380 0011KKKKddddKKKK cpi d,M
381 0100KKKKddddKKKK sbci d,M
382 0101KKKKddddKKKK subi d,M
383 1111110rrrrr0sss sbrc r,s
384 1111111rrrrr0sss sbrs r,s
385 1111100ddddd0sss bld r,s
386 1111101ddddd0sss bst r,s
387 10110PPdddddPPPP in r,P
388 10111PPrrrrrPPPP out P,r
389 10010110KKddKKKK adiw w,K
390 10010111KKddKKKK sbiw w,K
391 10011000pppppsss cbi p,s
392 10011010pppppsss sbi p,s
393 10011001pppppsss sbic p,s
394 10011011pppppsss sbis p,s
395 111101lllllll000 brcc l
396 111100lllllll000 brcs l
397 111100lllllll001 breq l
398 111101lllllll100 brge l
399 111101lllllll101 brhc l
400 111100lllllll101 brhs l
401 111101lllllll111 brid l
402 111100lllllll111 brie l
403 111100lllllll000 brlo l
404 111100lllllll100 brlt l
405 111100lllllll010 brmi l
406 111101lllllll001 brne l
407 111101lllllll010 brpl l
408 111101lllllll000 brsh l
409 111101lllllll110 brtc l
410 111100lllllll110 brts l
411 111101lllllll011 brvc l
412 111100lllllll011 brvs l
413 111101lllllllsss brbc s,l
414 111100lllllllsss brbs s,l
415 1101LLLLLLLLLLLL rcall L
416 1100LLLLLLLLLLLL rjmp L
417 1001010hhhhh111h call h
418 1001010hhhhh110h jmp h
419 1001010rrrrr0101 asr r
420 1001010rrrrr0000 com r
421 1001010rrrrr1010 dec r
422 1001010rrrrr0011 inc r
423 1001010rrrrr0110 lsr r
424 1001010rrrrr0001 neg r
425 1001000rrrrr1111 pop r
426 1001001rrrrr1111 push r
427 1001010rrrrr0111 ror r
428 1001010rrrrr0010 swap r
429 00000001ddddrrrr movw v,v
430 00000010ddddrrrr muls d,d
431 000000110ddd0rrr mulsu a,a
432 000000110ddd1rrr fmul a,a
433 000000111ddd0rrr fmuls a,a
434 000000111ddd1rrr fmulsu a,a
435 1001001ddddd0000 sts i,r
436 1001000ddddd0000 lds r,i
437 10o0oo0dddddbooo ldd r,b
438 100!000dddddee-+ ld r,e
439 10o0oo1rrrrrbooo std b,r
440 100!001rrrrree-+ st e,r
441 1001010100011001 eicall
442 1001010000011001 eijmp