2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
9 @chapter AVR Dependent Features
13 @node Machine Dependencies
14 @chapter AVR Dependent Features
19 * AVR Options:: Options
21 * AVR Opcodes:: Opcodes
26 @cindex AVR options (none)
27 @cindex options for AVR (none)
31 @cindex @code{-mmcu=} command line option, AVR
33 Specify ATMEL AVR instruction set or MCU type.
35 Instruction set avr1 is for the minimal AVR core, not supported by the C
36 compiler, only for assembler programs (MCU types: at90s1200,
37 attiny11, attiny12, attiny15, attiny28).
39 Instruction set avr2 (default) is for the classic AVR core with up to
40 8K program memory space (MCU types: at90s2313, at90s2323, attiny22,
41 attiny26, at90s2333, at90s2343, at90s4414, at90s4433, at90s4434,
42 at90s8515, at90c8534, at90s8535, at86rf401, attiny13, attiny2313,
43 attiny261, attiny461, attiny861, attiny24, attiny44, attiny84, attiny25,
44 attiny45, attiny85, attiny43u, attiny48, attiny88).
46 Instruction set avr3 is for the classic AVR core with up to 128K program
47 memory space (MCU types: atmega103, at43usb320, at43usb355, at76c711,
48 at90usb82, at90usb162).
50 Instruction set avr4 is for the enhanced AVR core with up to 8K program
51 memory space (MCU types: atmega48, atmega48p,atmega8, atmega88, atmega88p,
52 atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b,
55 Instruction set avr5 is for the enhanced AVR core with up to 128K program
56 memory space (MCU types: atmega16, atmega161, atmega162, atmega163,
57 atmega164p, atmega165, atmega165p, atmega168, atmega168p, atmega169,
58 atmega169p, atmega32, atmega323, atmega324p, atmega325, atmega325p,
59 atmega328p, atmega329, atmega329p, atmega3250, atmega3250p, atmega3290,
60 atmega3290p, atmega32hvb, atmega406, atmega64, atmega640, atmega644, atmega644p,
61 atmega128, atmega1280, atmega1281, atmega1284p, atmega645, atmega649,
62 atmega6450, atmega6490, atmega16hva, at90can32, at90can64, at90can128,
63 at90pwm216, at90pwm316, at90usb646, at90usb647, at90usb1286, at90usb1287,
66 Instruction set avr6 is for the enhanced AVR core with 256K program
67 memory space (MCU types: atmega2560, atmega2561).
69 @cindex @code{-mall-opcodes} command line option, AVR
71 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
73 @cindex @code{-mno-skip-bug} command line option, AVR
75 This option disable warnings for skipping two-word instructions.
77 @cindex @code{-mno-wrap} command line option, AVR
79 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
87 * AVR-Chars:: Special Characters
88 * AVR-Regs:: Register Names
89 * AVR-Modifiers:: Relocatable Expression Modifiers
93 @subsection Special Characters
95 @cindex line comment character, AVR
96 @cindex AVR line comment character
98 The presence of a @samp{;} on a line indicates the start of a comment
99 that extends to the end of the current line. If a @samp{#} appears as
100 the first character of a line, the whole line is treated as a comment.
102 @cindex line separator, AVR
103 @cindex statement separator, AVR
104 @cindex AVR line separator
106 The @samp{$} character can be used instead of a newline to separate
110 @subsection Register Names
112 @cindex AVR register names
113 @cindex register names, AVR
115 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
116 @samp{r1}, ... @samp{r31}.
117 Six of the 32 registers can be used as three 16-bit indirect address
118 register pointers for Data Space addressing. One of the these address
119 pointers can also be used as an address pointer for look up tables in
120 Flash program memory. These added function registers are the 16-bit
121 @samp{X}, @samp{Y} and @samp{Z} - registers.
130 @subsection Relocatable Expression Modifiers
132 @cindex AVR modifiers
135 The assembler supports several modifiers when using relocatable addresses
136 in AVR instruction operands. The general syntax is the following:
139 modifier(relocatable-expression)
143 @cindex symbol modifiers
147 This modifier allows you to use bits 0 through 7 of
148 an address expression as 8 bit relocatable expression.
152 This modifier allows you to use bits 7 through 15 of an address expression
153 as 8 bit relocatable expression. This is useful with, for example, the
154 AVR @samp{ldi} instruction and @samp{lo8} modifier.
165 This modifier allows you to use bits 16 through 23 of
166 an address expression as 8 bit relocatable expression.
167 Also, can be useful for loading 32 bit constants.
171 Synonym of @samp{hh8}.
175 This modifier allows you to use bits 24 through 31 of
176 an expression as 8 bit expression. This is useful with, for example, the
177 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
178 @samp{hhi8}, modifier.
183 ldi r26, lo8(285774925)
184 ldi r27, hi8(285774925)
185 ldi r28, hlo8(285774925)
186 ldi r29, hhi8(285774925)
187 ; r29,r28,r27,r26 = 285774925
192 This modifier allows you to use bits 0 through 7 of
193 an address expression as 8 bit relocatable expression.
194 This modifier useful for addressing data or code from
195 Flash/Program memory. The using of @samp{pm_lo8} similar
200 This modifier allows you to use bits 8 through 15 of
201 an address expression as 8 bit relocatable expression.
202 This modifier useful for addressing data or code from
203 Flash/Program memory.
207 This modifier allows you to use bits 15 through 23 of
208 an address expression as 8 bit relocatable expression.
209 This modifier useful for addressing data or code from
210 Flash/Program memory.
217 @cindex AVR opcode summary
218 @cindex opcode summary, AVR
219 @cindex mnemonics, AVR
220 @cindex instruction summary, AVR
221 For detailed information on the AVR machine instruction set, see
222 @url{www.atmel.com/products/AVR}.
224 @code{@value{AS}} implements all the standard AVR opcodes.
225 The following table summarizes the AVR opcodes, and their arguments.
230 d @r{`ldi' register (r16-r31)}
231 v @r{`movw' even register (r0, r2, ..., r28, r30)}
232 a @r{`fmul' register (r16-r23)}
233 w @r{`adiw' register (r24,r26,r28,r30)}
234 e @r{pointer registers (X,Y,Z)}
235 b @r{base pointer register and displacement ([YZ]+disp)}
236 z @r{Z pointer register (for [e]lpm Rd,Z[+])}
237 M @r{immediate value from 0 to 255}
238 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
239 s @r{immediate value from 0 to 7}
240 P @r{Port address value from 0 to 63. (in, out)}
241 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
242 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
243 i @r{immediate value}
244 l @r{signed pc relative offset from -64 to 63}
245 L @r{signed pc relative offset from -2048 to 2047}
246 h @r{absolute code address (call, jmp)}
247 S @r{immediate value from 0 to 7 (S = s << 4)}
248 ? @r{use this opcode entry if no parameters, else use next opcode entry}
266 100101001SSS1000 bclr S
267 100101000SSS1000 bset S
268 1001010100001001 icall
269 1001010000001001 ijmp
270 1001010111001000 lpm ?
271 1001000ddddd010+ lpm r,z
272 1001010111011000 elpm ?
273 1001000ddddd011+ elpm r,z
276 1001010100011000 reti
277 1001010110001000 sleep
278 1001010110011000 break
281 000111rdddddrrrr adc r,r
282 000011rdddddrrrr add r,r
283 001000rdddddrrrr and r,r
284 000101rdddddrrrr cp r,r
285 000001rdddddrrrr cpc r,r
286 000100rdddddrrrr cpse r,r
287 001001rdddddrrrr eor r,r
288 001011rdddddrrrr mov r,r
289 100111rdddddrrrr mul r,r
290 001010rdddddrrrr or r,r
291 000010rdddddrrrr sbc r,r
292 000110rdddddrrrr sub r,r
293 001001rdddddrrrr clr r
294 000011rdddddrrrr lsl r
295 000111rdddddrrrr rol r
296 001000rdddddrrrr tst r
297 0111KKKKddddKKKK andi d,M
298 0111KKKKddddKKKK cbr d,n
299 1110KKKKddddKKKK ldi d,M
300 11101111dddd1111 ser d
301 0110KKKKddddKKKK ori d,M
302 0110KKKKddddKKKK sbr d,M
303 0011KKKKddddKKKK cpi d,M
304 0100KKKKddddKKKK sbci d,M
305 0101KKKKddddKKKK subi d,M
306 1111110rrrrr0sss sbrc r,s
307 1111111rrrrr0sss sbrs r,s
308 1111100ddddd0sss bld r,s
309 1111101ddddd0sss bst r,s
310 10110PPdddddPPPP in r,P
311 10111PPrrrrrPPPP out P,r
312 10010110KKddKKKK adiw w,K
313 10010111KKddKKKK sbiw w,K
314 10011000pppppsss cbi p,s
315 10011010pppppsss sbi p,s
316 10011001pppppsss sbic p,s
317 10011011pppppsss sbis p,s
318 111101lllllll000 brcc l
319 111100lllllll000 brcs l
320 111100lllllll001 breq l
321 111101lllllll100 brge l
322 111101lllllll101 brhc l
323 111100lllllll101 brhs l
324 111101lllllll111 brid l
325 111100lllllll111 brie l
326 111100lllllll000 brlo l
327 111100lllllll100 brlt l
328 111100lllllll010 brmi l
329 111101lllllll001 brne l
330 111101lllllll010 brpl l
331 111101lllllll000 brsh l
332 111101lllllll110 brtc l
333 111100lllllll110 brts l
334 111101lllllll011 brvc l
335 111100lllllll011 brvs l
336 111101lllllllsss brbc s,l
337 111100lllllllsss brbs s,l
338 1101LLLLLLLLLLLL rcall L
339 1100LLLLLLLLLLLL rjmp L
340 1001010hhhhh111h call h
341 1001010hhhhh110h jmp h
342 1001010rrrrr0101 asr r
343 1001010rrrrr0000 com r
344 1001010rrrrr1010 dec r
345 1001010rrrrr0011 inc r
346 1001010rrrrr0110 lsr r
347 1001010rrrrr0001 neg r
348 1001000rrrrr1111 pop r
349 1001001rrrrr1111 push r
350 1001010rrrrr0111 ror r
351 1001010rrrrr0010 swap r
352 00000001ddddrrrr movw v,v
353 00000010ddddrrrr muls d,d
354 000000110ddd0rrr mulsu a,a
355 000000110ddd1rrr fmul a,a
356 000000111ddd0rrr fmuls a,a
357 000000111ddd1rrr fmulsu a,a
358 1001001ddddd0000 sts i,r
359 1001000ddddd0000 lds r,i
360 10o0oo0dddddbooo ldd r,b
361 100!000dddddee-+ ld r,e
362 10o0oo1rrrrrbooo std b,r
363 100!001rrrrree-+ st e,r
364 1001010100011001 eicall
365 1001010000011001 eijmp