1 This is as.info, produced by makeinfo version 4.8 from as.texinfo.
3 INFO-DIR-SECTION Software development
5 * As: (as). The GNU assembler.
6 * Gas: (as). The GNU assembler.
9 This file documents the GNU Assembler "as".
11 Copyright (C) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
12 2000, 2001, 2002, 2006, 2007, 2008, 2009, 2010, 2011 Free Software
15 Permission is granted to copy, distribute and/or modify this document
16 under the terms of the GNU Free Documentation License, Version 1.3 or
17 any later version published by the Free Software Foundation; with no
18 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
19 Texts. A copy of the license is included in the section entitled "GNU
20 Free Documentation License".
23 File: as.info, Node: Top, Next: Overview, Up: (dir)
28 This file is a user guide to the GNU assembler `as' (GNU Binutils)
31 This document is distributed under the terms of the GNU Free
32 Documentation License. A copy of the license is included in the
33 section entitled "GNU Free Documentation License".
38 * Invoking:: Command-Line Options
40 * Sections:: Sections and Relocation
42 * Expressions:: Expressions
43 * Pseudo Ops:: Assembler Directives
45 * Object Attributes:: Object Attributes
46 * Machine Dependencies:: Machine Dependent Features
47 * Reporting Bugs:: Reporting Bugs
48 * Acknowledgements:: Who Did What
49 * GNU Free Documentation License:: GNU Free Documentation License
53 File: as.info, Node: Overview, Next: Invoking, Prev: Top, Up: Top
58 Here is a brief summary of how to invoke `as'. For details, see *Note
59 Command-Line Options: Invoking.
61 as [-a[cdghlns][=FILE]] [-alternate] [-D]
62 [-compress-debug-sections] [-nocompress-debug-sections]
63 [-debug-prefix-map OLD=NEW]
64 [-defsym SYM=VAL] [-f] [-g] [-gstabs]
65 [-gstabs+] [-gdwarf-2] [-help] [-I DIR] [-J]
66 [-K] [-L] [-listing-lhs-width=NUM]
67 [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM]
68 [-listing-cont-lines=NUM] [-keep-locals] [-o
69 OBJFILE] [-R] [-reduce-memory-overheads] [-statistics]
70 [-v] [-version] [-version] [-W] [-warn]
71 [-fatal-warnings] [-w] [-x] [-Z] [@FILE]
72 [-size-check=[error|warning]]
73 [-target-help] [TARGET-OPTIONS]
76 _Target Alpha options:_
78 [-mdebug | -no-mdebug]
79 [-replace | -noreplace]
80 [-relax] [-g] [-GSIZE]
88 [-mcpu=PROCESSOR[+EXTENSION...]]
89 [-march=ARCHITECTURE[+EXTENSION...]]
90 [-mfpu=FLOATING-POINT-FORMAT]
95 [-mapcs-32|-mapcs-26|-mapcs-float|
97 [-mthumb-interwork] [-k]
99 _Target Blackfin options:_
100 [-mcpu=PROCESSOR[-SIREVISION]]
105 _Target CRIS options:_
106 [-underscore | -no-underscore]
108 [-emulation=criself | -emulation=crisaout]
109 [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32]
111 _Target D10V options:_
114 _Target D30V options:_
117 _Target H8/300 options:_
120 _Target i386 options:_
122 [-march=CPU[+EXTENSION...]] [-mtune=CPU]
124 _Target i960 options:_
125 [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
129 _Target IA-64 options:_
130 [-mconstant-gp|-mauto-pic]
131 [-milp32|-milp64|-mlp64|-mp64]
133 [-mtune=itanium1|-mtune=itanium2]
134 [-munwind-check=warning|-munwind-check=error]
135 [-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
136 [-x|-xexplicit] [-xauto] [-xdebug]
138 _Target IP2K options:_
139 [-mip2022|-mip2022ext]
141 _Target M32C options:_
142 [-m32c|-m16c] [-relax] [-h-tick-hex]
144 _Target M32R options:_
145 [-m32rx|-[no-]warn-explicit-parallel-conflicts|
148 _Target M680X0 options:_
149 [-l] [-m68000|-m68010|-m68020|...]
151 _Target M68HC11 options:_
152 [-m68hc11|-m68hc12|-m68hcs12]
154 [-mshort-double|-mlong-double]
155 [-force-long-branches] [-short-branches]
156 [-strict-direct-mode] [-print-insn-syntax]
157 [-print-opcodes] [-generate-example]
159 _Target MCORE options:_
160 [-jsri2bsr] [-sifilter] [-relax]
162 _Target MICROBLAZE options:_
164 _Target MIPS options:_
165 [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]]
166 [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared]
167 [-non_shared] [-xgot [-mvxworks-pic]
168 [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
169 [-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
170 [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
171 [-mips64] [-mips64r2]
172 [-construct-floats] [-no-construct-floats]
173 [-trap] [-no-break] [-break] [-no-trap]
174 [-mips16] [-no-mips16]
175 [-mmicromips] [-mno-micromips]
176 [-msmartmips] [-mno-smartmips]
177 [-mips3d] [-no-mips3d]
180 [-mdspr2] [-mno-dspr2]
183 [-mfix7000] [-mno-fix7000]
184 [-mfix-vr4120] [-mno-fix-vr4120]
185 [-mfix-vr4130] [-mno-fix-vr4130]
186 [-mdebug] [-no-mdebug]
189 _Target MMIX options:_
190 [-fixed-special-register-names] [-globalize-symbols]
191 [-gnu-syntax] [-relax] [-no-predefined-symbols]
192 [-no-expand] [-no-merge-gregs] [-x]
193 [-linker-allocated-gregs]
195 _Target PDP11 options:_
196 [-mpic|-mno-pic] [-mall] [-mno-extensions]
197 [-mEXTENSION|-mno-EXTENSION]
200 _Target picoJava options:_
203 _Target PowerPC options:_
205 [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|-m403|-m405|
206 -m440|-m464|-m476|-m7400|-m7410|-m7450|-m7455|-m750cl|-mppc64|
207 -m620|-me500|-e500x2|-me500mc|-me500mc64|-mppc64bridge|-mbooke|
208 -mpower4|-mpr4|-mpower5|-mpwr5|-mpwr5x|-mpower6|-mpwr6|
209 -mpower7|-mpw7|-ma2|-mcell|-mspe|-mtitan|-me300|-mcom]
210 [-many] [-maltivec|-mvsx]
211 [-mregnames|-mno-regnames]
212 [-mrelocatable|-mrelocatable-lib|-K PIC] [-memb]
213 [-mlittle|-mlittle-endian|-le|-mbig|-mbig-endian|-be]
214 [-msolaris|-mno-solaris]
218 [-mlittle-endian|-mbig-endian]
219 [-m32bit-ints|-m16bit-ints]
220 [-m32bit-doubles|-m64bit-doubles]
222 _Target s390 options:_
223 [-m31|-m64] [-mesa|-mzarch] [-march=CPU]
224 [-mregnames|-mno-regnames]
227 _Target SCORE options:_
228 [-EB][-EL][-FIXDD][-NWARN]
229 [-SCORE5][-SCORE5U][-SCORE7][-SCORE3]
230 [-march=score7][-march=score3]
231 [-USE_R1][-KPIC][-O0][-G NUM][-V]
233 _Target SPARC options:_
234 [-Av6|-Av7|-Av8|-Asparclet|-Asparclite
235 -Av8plus|-Av8plusa|-Av9|-Av9a]
236 [-xarch=v8plus|-xarch=v8plusa] [-bump]
239 _Target TIC54X options:_
240 [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
241 [-merrors-to-file <FILENAME>|-me <FILENAME>]
244 _Target TIC6X options:_
245 [-march=ARCH] [-mbig-endian|-mlittle-endian]
246 [-mdsbt|-mno-dsbt] [-mpid=no|-mpid=near|-mpid=far]
249 _Target TILE-Gx options:_
253 _Target Xtensa options:_
254 [-[no-]text-section-literals] [-[no-]absolute-literals]
255 [-[no-]target-align] [-[no-]longcalls]
257 [-rename-section OLDNAME=NEWNAME]
260 _Target Z80 options:_
262 [ -ignore-undocumented-instructions] [-Wnud]
263 [ -ignore-unportable-instructions] [-Wnup]
264 [ -warn-undocumented-instructions] [-Wud]
265 [ -warn-unportable-instructions] [-Wup]
266 [ -forbid-undocumented-instructions] [-Fud]
267 [ -forbid-unportable-instructions] [-Fup]
270 Read command-line options from FILE. The options read are
271 inserted in place of the original @FILE option. If FILE does not
272 exist, or cannot be read, then the option will be treated
273 literally, and not removed.
275 Options in FILE are separated by whitespace. A whitespace
276 character may be included in an option by surrounding the entire
277 option in either single or double quotes. Any character
278 (including a backslash) may be included by prefixing the character
279 to be included with a backslash. The FILE may itself contain
280 additional @FILE options; any such options will be processed
284 Turn on listings, in any of a variety of ways:
287 omit false conditionals
290 omit debugging directives
293 include general information, like as version and options
297 include high-level source
303 include macro expansions
306 omit forms processing
312 set the name of the listing file
314 You may combine these options; for example, use `-aln' for assembly
315 listing without forms processing. The `=file' option, if used,
316 must be the last one. By itself, `-a' defaults to `-ahls'.
319 Begin in alternate macro mode. *Note `.altmacro': Altmacro.
321 `--compress-debug-sections'
322 Compress DWARF debug sections using zlib. The debug sections are
323 renamed to begin with `.zdebug', and the resulting object file may
324 not be compatible with older linkers and object file utilities.
326 `--nocompress-debug-sections'
327 Do not compress DWARF debug sections. This is the default.
330 Ignored. This option is accepted for script compatibility with
331 calls to other assemblers.
333 `--debug-prefix-map OLD=NEW'
334 When assembling files in directory `OLD', record debugging
335 information describing them as in `NEW' instead.
338 Define the symbol SYM to be VALUE before assembling the input file.
339 VALUE must be an integer constant. As in C, a leading `0x'
340 indicates a hexadecimal value, and a leading `0' indicates an octal
341 value. The value of the symbol can be overridden inside a source
342 file via the use of a `.set' pseudo-op.
345 "fast"--skip whitespace and comment preprocessing (assume source is
350 Generate debugging information for each assembler source line
351 using whichever debug format is preferred by the target. This
352 currently means either STABS, ECOFF or DWARF2.
355 Generate stabs debugging information for each assembler line. This
356 may help debugging assembler code, if the debugger can handle it.
359 Generate stabs debugging information for each assembler line, with
360 GNU extensions that probably only gdb can handle, and that could
361 make other debuggers crash or refuse to read your program. This
362 may help debugging assembler code. Currently the only GNU
363 extension is the location of the current working directory at
367 Generate DWARF2 debugging information for each assembler line.
368 This may help debugging assembler code, if the debugger can handle
369 it. Note--this option is only supported by some targets, not all
373 `--size-check=warning'
374 Issue an error or warning for invalid ELF .size directive.
377 Print a summary of the command line options and exit.
380 Print a summary of all target specific options and exit.
383 Add directory DIR to the search list for `.include' directives.
386 Don't warn about signed overflow.
389 Issue warnings when difference tables altered for long
394 Keep (in the symbol table) local symbols. These symbols start with
395 system-specific local label prefixes, typically `.L' for ELF
396 systems or `L' for traditional a.out systems. *Note Symbol
399 `--listing-lhs-width=NUMBER'
400 Set the maximum width, in words, of the output data column for an
401 assembler listing to NUMBER.
403 `--listing-lhs-width2=NUMBER'
404 Set the maximum width, in words, of the output data column for
405 continuation lines in an assembler listing to NUMBER.
407 `--listing-rhs-width=NUMBER'
408 Set the maximum width of an input source line, as displayed in a
409 listing, to NUMBER bytes.
411 `--listing-cont-lines=NUMBER'
412 Set the maximum number of lines printed in a listing for a single
413 line of input to NUMBER + 1.
416 Name the object-file output from `as' OBJFILE.
419 Fold the data section into the text section.
421 Set the default size of GAS's hash tables to a prime number close
422 to NUMBER. Increasing this value can reduce the length of time it
423 takes the assembler to perform its tasks, at the expense of
424 increasing the assembler's memory requirements. Similarly
425 reducing this value can reduce the memory requirements at the
428 `--reduce-memory-overheads'
429 This option reduces GAS's memory requirements, at the expense of
430 making the assembly processes slower. Currently this switch is a
431 synonym for `--hash-size=4051', but in the future it may have
432 other effects as well.
435 Print the maximum space (in bytes) and total time (in seconds)
438 `--strip-local-absolute'
439 Remove local absolute symbols from the outgoing symbol table.
443 Print the `as' version.
446 Print the `as' version and exit.
450 Suppress warning messages.
453 Treat warnings as errors.
456 Don't suppress warning messages or treat them as errors.
465 Generate an object file even after errors.
468 Standard input, or source files to assemble.
471 *Note Alpha Options::, for the options available when as is
472 configured for an Alpha processor.
474 The following options are available when as is configured for an ARC
478 This option selects the core processor variant.
481 Select either big-endian (-EB) or little-endian (-EL) output.
483 The following options are available when as is configured for the ARM
486 `-mcpu=PROCESSOR[+EXTENSION...]'
487 Specify which ARM processor variant is the target.
489 `-march=ARCHITECTURE[+EXTENSION...]'
490 Specify which ARM architecture variant is used by the target.
492 `-mfpu=FLOATING-POINT-FORMAT'
493 Select which Floating Point architecture is the target.
496 Select which floating point ABI is in use.
499 Enable Thumb only instruction decoding.
501 `-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant'
502 Select which procedure calling convention is in use.
505 Select either big-endian (-EB) or little-endian (-EL) output.
508 Specify that the code has been generated with interworking between
509 Thumb and ARM code in mind.
512 Specify that PIC code has been generated.
514 *Note Blackfin Options::, for the options available when as is
515 configured for the Blackfin processor family.
517 See the info pages for documentation of the CRIS-specific options.
519 The following options are available when as is configured for a D10V
522 Optimize output by parallelizing instructions.
524 The following options are available when as is configured for a D30V
527 Optimize output by parallelizing instructions.
530 Warn when nops are generated.
533 Warn when a nop after a 32-bit multiply instruction is generated.
535 *Note i386-Options::, for the options available when as is
536 configured for an i386 processor.
538 The following options are available when as is configured for the
539 Intel 80960 processor.
541 `-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
542 Specify which variant of the 960 architecture is the target.
545 Add code to collect statistics about branches taken.
548 Do not alter compare-and-branch instructions for long
549 displacements; error if necessary.
552 The following options are available when as is configured for the
556 Specifies that the extended IP2022 instructions are allowed.
559 Restores the default behaviour, which restricts the permitted
560 instructions to just the basic IP2022 ones.
563 The following options are available when as is configured for the
564 Renesas M32C and M16C processors.
567 Assemble M32C instructions.
570 Assemble M16C instructions (the default).
573 Enable support for link-time relaxations.
576 Support H'00 style hex constants in addition to 0x00 style.
579 The following options are available when as is configured for the
580 Renesas M32R (formerly Mitsubishi M32R) series.
583 Specify which processor in the M32R family is the target. The
584 default is normally the M32R, but this option changes it to the
587 `--warn-explicit-parallel-conflicts or --Wp'
588 Produce warning messages when questionable parallel constructs are
591 `--no-warn-explicit-parallel-conflicts or --Wnp'
592 Do not produce warning messages when questionable parallel
593 constructs are encountered.
596 The following options are available when as is configured for the
597 Motorola 68000 series.
600 Shorten references to undefined symbols, to one word instead of
603 `-m68000 | -m68008 | -m68010 | -m68020 | -m68030'
604 `| -m68040 | -m68060 | -m68302 | -m68331 | -m68332'
605 `| -m68333 | -m68340 | -mcpu32 | -m5200'
606 Specify what processor in the 68000 family is the target. The
607 default is normally the 68020, but this can be changed at
610 `-m68881 | -m68882 | -mno-68881 | -mno-68882'
611 The target machine does (or does not) have a floating-point
612 coprocessor. The default is to assume a coprocessor for 68020,
613 68030, and cpu32. Although the basic 68000 is not compatible with
614 the 68881, a combination of the two can be specified, since it's
615 possible to do emulation of the coprocessor instructions with the
618 `-m68851 | -mno-68851'
619 The target machine does (or does not) have a memory-management
620 unit coprocessor. The default is to assume an MMU for 68020 and
624 For details about the PDP-11 machine dependent features options, see
625 *Note PDP-11-Options::.
628 Generate position-independent (or position-dependent) code. The
633 Enable all instruction set extensions. This is the default.
636 Disable all instruction set extensions.
638 `-mEXTENSION | -mno-EXTENSION'
639 Enable (or disable) a particular instruction set extension.
642 Enable the instruction set extensions supported by a particular
643 CPU, and disable all other extensions.
646 Enable the instruction set extensions supported by a particular
647 machine model, and disable all other extensions.
649 The following options are available when as is configured for a
653 Generate "big endian" format output.
656 Generate "little endian" format output.
659 The following options are available when as is configured for the
660 Motorola 68HC11 or 68HC12 series.
662 `-m68hc11 | -m68hc12 | -m68hcs12'
663 Specify what processor is the target. The default is defined by
664 the configuration option when building the assembler.
667 Specify to use the 16-bit integer ABI.
670 Specify to use the 32-bit integer ABI.
673 Specify to use the 32-bit double ABI.
676 Specify to use the 64-bit double ABI.
678 `--force-long-branches'
679 Relative branches are turned into absolute ones. This concerns
680 conditional branches, unconditional branches and branches to a sub
683 `-S | --short-branches'
684 Do not turn relative branches into absolute ones when the offset
687 `--strict-direct-mode'
688 Do not turn the direct addressing mode into extended addressing
689 mode when the instruction does not support direct addressing mode.
691 `--print-insn-syntax'
692 Print the syntax of instruction in case of error.
695 print the list of instructions with syntax and then exit.
698 print an example of instruction for each possible instruction and
699 then exit. This option is only useful for testing `as'.
702 The following options are available when `as' is configured for the
705 `-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
706 `-Av8plus | -Av8plusa | -Av9 | -Av9a'
707 Explicitly select a variant of the SPARC architecture.
709 `-Av8plus' and `-Av8plusa' select a 32 bit environment. `-Av9'
710 and `-Av9a' select a 64 bit environment.
712 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
713 UltraSPARC extensions.
715 `-xarch=v8plus | -xarch=v8plusa'
716 For compatibility with the Solaris v9 assembler. These options are
717 equivalent to -Av8plus and -Av8plusa, respectively.
720 Warn when the assembler switches to another architecture.
722 The following options are available when as is configured for the
726 Enable extended addressing mode. All addresses and relocations
727 will assume extended addressing (usually 23 bits).
730 Sets the CPU version being compiled for.
732 `-merrors-to-file FILENAME'
733 Redirect error output to a file, for broken systems which don't
734 support such behaviour in the shell.
736 The following options are available when as is configured for a MIPS
740 This option sets the largest size of an object that can be
741 referenced implicitly with the `gp' register. It is only accepted
742 for targets that use ECOFF format, such as a DECstation running
743 Ultrix. The default value is 8.
746 Generate "big endian" format output.
749 Generate "little endian" format output.
760 Generate code for a particular MIPS Instruction Set Architecture
761 level. `-mips1' is an alias for `-march=r3000', `-mips2' is an
762 alias for `-march=r6000', `-mips3' is an alias for `-march=r4000'
763 and `-mips4' is an alias for `-march=r8000'. `-mips5', `-mips32',
764 `-mips32r2', `-mips64', and `-mips64r2' correspond to generic
765 `MIPS V', `MIPS32', `MIPS32 Release 2', `MIPS64', and `MIPS64
766 Release 2' ISA processors, respectively.
769 Generate code for a particular MIPS cpu.
772 Schedule and tune for a particular MIPS cpu.
776 Cause nops to be inserted if the read of the destination register
777 of an mfhi or mflo instruction occurs in the following two
782 Cause stabs-style debugging output to go into an ECOFF-style
783 .mdebug section instead of the standard ELF .stabs sections.
787 Control generation of `.pdr' sections.
791 The register sizes are normally inferred from the ISA and ABI, but
792 these flags force a certain group of registers to be treated as 32
793 bits wide at all times. `-mgp32' controls the size of
794 general-purpose registers and `-mfp32' controls the size of
795 floating-point registers.
799 Generate code for the MIPS 16 processor. This is equivalent to
800 putting `.set mips16' at the start of the assembly file.
801 `-no-mips16' turns off this option.
805 Generate code for the microMIPS processor. This is equivalent to
806 putting `.set micromips' at the start of the assembly file.
807 `-mno-micromips' turns off this option. This is equivalent to
808 putting `.set nomicromips' at the start of the assembly file.
812 Enables the SmartMIPS extension to the MIPS32 instruction set.
813 This is equivalent to putting `.set smartmips' at the start of the
814 assembly file. `-mno-smartmips' turns off this option.
818 Generate code for the MIPS-3D Application Specific Extension.
819 This tells the assembler to accept MIPS-3D instructions.
820 `-no-mips3d' turns off this option.
824 Generate code for the MDMX Application Specific Extension. This
825 tells the assembler to accept MDMX instructions. `-no-mdmx' turns
830 Generate code for the DSP Release 1 Application Specific Extension.
831 This tells the assembler to accept DSP Release 1 instructions.
832 `-mno-dsp' turns off this option.
836 Generate code for the DSP Release 2 Application Specific Extension.
837 This option implies -mdsp. This tells the assembler to accept DSP
838 Release 2 instructions. `-mno-dspr2' turns off this option.
842 Generate code for the MT Application Specific Extension. This
843 tells the assembler to accept MT instructions. `-mno-mt' turns
848 Generate code for the MCU Application Specific Extension. This
849 tells the assembler to accept MCU instructions. `-mno-mcu' turns
853 `--no-construct-floats'
854 The `--no-construct-floats' option disables the construction of
855 double width floating point constants by loading the two halves of
856 the value into the two single width floating point registers that
857 make up the double width register. By default
858 `--construct-floats' is selected, allowing construction of these
859 floating point constants.
862 This option causes `as' to emulate `as' configured for some other
863 target, in all respects, including output format (choosing between
864 ELF and ECOFF only), handling of pseudo-opcodes which may generate
865 debugging information or store symbol table information, and
866 default endianness. The available configuration names are:
867 `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf',
868 `mipsbelf'. The first two do not alter the default endianness
869 from that of the primary target for which the assembler was
870 configured; the others change the default to little- or big-endian
871 as indicated by the `b' or `l' in the name. Using `-EB' or `-EL'
872 will override the endianness selection in any case.
874 This option is currently supported only when the primary target
875 `as' is configured for is a MIPS ELF or ECOFF target.
876 Furthermore, the primary target or others specified with
877 `--enable-targets=...' at configuration time must include support
878 for the other format, if both are to be available. For example,
879 the Irix 5 configuration includes support for both.
881 Eventually, this option will support more configurations, with more
882 fine-grained control over the assembler's behavior, and will be
883 supported for more processors.
886 `as' ignores this option. It is accepted for compatibility with
893 Control how to deal with multiplication overflow and division by
894 zero. `--trap' or `--no-break' (which are synonyms) take a trap
895 exception (and only work for Instruction Set Architecture level 2
896 and higher); `--break' or `--no-trap' (also synonyms, and the
897 default) take a break exception.
900 When this option is used, `as' will issue a warning every time it
901 generates a nop instruction from a macro.
903 The following options are available when as is configured for an
908 Enable or disable the JSRI to BSR transformation. By default this
909 is enabled. The command line option `-nojsri2bsr' can be used to
914 Enable or disable the silicon filter behaviour. By default this
915 is disabled. The default can be overridden by the `-sifilter'
919 Alter jump instructions for long displacements.
922 Select the cpu type on the target hardware. This controls which
923 instructions can be assembled.
926 Assemble for a big endian target.
929 Assemble for a little endian target.
932 See the info pages for documentation of the MMIX-specific options.
934 *Note PowerPC-Opts::, for the options available when as is configured
935 for a PowerPC processor.
937 See the info pages for documentation of the RX-specific options.
939 The following options are available when as is configured for the
940 s390 processor family.
944 Select the word size, either 31/32 bits or 64 bits.
949 Select the architecture mode, either the Enterprise System
950 Architecture (esa) or the z/Architecture mode (zarch).
953 Specify which s390 processor variant is the target, `g6', `g6',
954 `z900', `z990', `z9-109', `z9-ec', or `z10'.
958 Allow or disallow symbolic names for registers.
961 Warn whenever the operand for a base or index register has been
962 specified but evaluates to zero.
964 *Note TIC6X Options::, for the options available when as is
965 configured for a TMS320C6000 processor.
967 *Note TILE-Gx Options::, for the options available when as is
968 configured for a TILE-Gx processor.
970 *Note Xtensa Options::, for the options available when as is
971 configured for an Xtensa processor.
973 The following options are available when as is configured for a Z80
976 Assemble for Z80 processor.
979 Assemble for R800 processor.
981 `-ignore-undocumented-instructions'
983 Assemble undocumented Z80 instructions that also work on R800
986 `-ignore-unportable-instructions'
988 Assemble all undocumented Z80 instructions without warning.
990 `-warn-undocumented-instructions'
992 Issue a warning for undocumented Z80 instructions that also work
995 `-warn-unportable-instructions'
997 Issue a warning for undocumented Z80 instructions that do not work
1000 `-forbid-undocumented-instructions'
1002 Treat all undocumented instructions as errors.
1004 `-forbid-unportable-instructions'
1006 Treat undocumented Z80 instructions that do not work on R800 as
1011 * Manual:: Structure of this Manual
1012 * GNU Assembler:: The GNU Assembler
1013 * Object Formats:: Object File Formats
1014 * Command Line:: Command Line
1015 * Input Files:: Input Files
1016 * Object:: Output (Object) File
1017 * Errors:: Error and Warning Messages
1020 File: as.info, Node: Manual, Next: GNU Assembler, Up: Overview
1022 1.1 Structure of this Manual
1023 ============================
1025 This manual is intended to describe what you need to know to use GNU
1026 `as'. We cover the syntax expected in source files, including notation
1027 for symbols, constants, and expressions; the directives that `as'
1028 understands; and of course how to invoke `as'.
1030 This manual also describes some of the machine-dependent features of
1031 various flavors of the assembler.
1033 On the other hand, this manual is _not_ intended as an introduction
1034 to programming in assembly language--let alone programming in general!
1035 In a similar vein, we make no attempt to introduce the machine
1036 architecture; we do _not_ describe the instruction set, standard
1037 mnemonics, registers or addressing modes that are standard to a
1038 particular architecture. You may want to consult the manufacturer's
1039 machine architecture manual for this information.
1042 File: as.info, Node: GNU Assembler, Next: Object Formats, Prev: Manual, Up: Overview
1044 1.2 The GNU Assembler
1045 =====================
1047 GNU `as' is really a family of assemblers. If you use (or have used)
1048 the GNU assembler on one architecture, you should find a fairly similar
1049 environment when you use it on another architecture. Each version has
1050 much in common with the others, including object file formats, most
1051 assembler directives (often called "pseudo-ops") and assembler syntax.
1053 `as' is primarily intended to assemble the output of the GNU C
1054 compiler `gcc' for use by the linker `ld'. Nevertheless, we've tried
1055 to make `as' assemble correctly everything that other assemblers for
1056 the same machine would assemble. Any exceptions are documented
1057 explicitly (*note Machine Dependencies::). This doesn't mean `as'
1058 always uses the same syntax as another assembler for the same
1059 architecture; for example, we know of several incompatible versions of
1060 680x0 assembly language syntax.
1062 Unlike older assemblers, `as' is designed to assemble a source
1063 program in one pass of the source file. This has a subtle impact on the
1064 `.org' directive (*note `.org': Org.).
1067 File: as.info, Node: Object Formats, Next: Command Line, Prev: GNU Assembler, Up: Overview
1069 1.3 Object File Formats
1070 =======================
1072 The GNU assembler can be configured to produce several alternative
1073 object file formats. For the most part, this does not affect how you
1074 write assembly language programs; but directives for debugging symbols
1075 are typically different in different file formats. *Note Symbol
1076 Attributes: Symbol Attributes.
1079 File: as.info, Node: Command Line, Next: Input Files, Prev: Object Formats, Up: Overview
1084 After the program name `as', the command line may contain options and
1085 file names. Options may appear in any order, and may be before, after,
1086 or between file names. The order of file names is significant.
1088 `--' (two hyphens) by itself names the standard input file
1089 explicitly, as one of the files for `as' to assemble.
1091 Except for `--' any command line argument that begins with a hyphen
1092 (`-') is an option. Each option changes the behavior of `as'. No
1093 option changes the way another option works. An option is a `-'
1094 followed by one or more letters; the case of the letter is important.
1095 All options are optional.
1097 Some options expect exactly one file name to follow them. The file
1098 name may either immediately follow the option's letter (compatible with
1099 older assemblers) or it may be the next command argument (GNU
1100 standard). These two command lines are equivalent:
1102 as -o my-object-file.o mumble.s
1103 as -omy-object-file.o mumble.s
1106 File: as.info, Node: Input Files, Next: Object, Prev: Command Line, Up: Overview
1111 We use the phrase "source program", abbreviated "source", to describe
1112 the program input to one run of `as'. The program may be in one or
1113 more files; how the source is partitioned into files doesn't change the
1114 meaning of the source.
1116 The source program is a concatenation of the text in all the files,
1117 in the order specified.
1119 Each time you run `as' it assembles exactly one source program. The
1120 source program is made up of one or more files. (The standard input is
1123 You give `as' a command line that has zero or more input file names.
1124 The input files are read (from left file name to right). A command
1125 line argument (in any position) that has no special meaning is taken to
1126 be an input file name.
1128 If you give `as' no file names it attempts to read one input file
1129 from the `as' standard input, which is normally your terminal. You may
1130 have to type <ctl-D> to tell `as' there is no more program to assemble.
1132 Use `--' if you need to explicitly name the standard input file in
1135 If the source is empty, `as' produces a small, empty object file.
1137 Filenames and Line-numbers
1138 --------------------------
1140 There are two ways of locating a line in the input file (or files) and
1141 either may be used in reporting error messages. One way refers to a
1142 line number in a physical file; the other refers to a line number in a
1143 "logical" file. *Note Error and Warning Messages: Errors.
1145 "Physical files" are those files named in the command line given to
1148 "Logical files" are simply names declared explicitly by assembler
1149 directives; they bear no relation to physical files. Logical file
1150 names help error messages reflect the original source file, when `as'
1151 source is itself synthesized from other files. `as' understands the
1152 `#' directives emitted by the `gcc' preprocessor. See also *Note
1156 File: as.info, Node: Object, Next: Errors, Prev: Input Files, Up: Overview
1158 1.6 Output (Object) File
1159 ========================
1161 Every time you run `as' it produces an output file, which is your
1162 assembly language program translated into numbers. This file is the
1163 object file. Its default name is `a.out'. You can give it another
1164 name by using the `-o' option. Conventionally, object file names end
1165 with `.o'. The default name is used for historical reasons: older
1166 assemblers were capable of assembling self-contained programs directly
1167 into a runnable program. (For some formats, this isn't currently
1168 possible, but it can be done for the `a.out' format.)
1170 The object file is meant for input to the linker `ld'. It contains
1171 assembled program code, information to help `ld' integrate the
1172 assembled program into a runnable file, and (optionally) symbolic
1173 information for the debugger.
1176 File: as.info, Node: Errors, Prev: Object, Up: Overview
1178 1.7 Error and Warning Messages
1179 ==============================
1181 `as' may write warnings and error messages to the standard error file
1182 (usually your terminal). This should not happen when a compiler runs
1183 `as' automatically. Warnings report an assumption made so that `as'
1184 could keep assembling a flawed program; errors report a grave problem
1185 that stops the assembly.
1187 Warning messages have the format
1189 file_name:NNN:Warning Message Text
1191 (where NNN is a line number). If a logical file name has been given
1192 (*note `.file': File.) it is used for the filename, otherwise the name
1193 of the current input file is used. If a logical line number was given
1194 (*note `.line': Line.) then it is used to calculate the number printed,
1195 otherwise the actual line in the current source file is printed. The
1196 message text is intended to be self explanatory (in the grand Unix
1199 Error messages have the format
1200 file_name:NNN:FATAL:Error Message Text
1201 The file name and line number are derived as for warning messages.
1202 The actual message text may be rather less explanatory because many of
1203 them aren't supposed to happen.
1206 File: as.info, Node: Invoking, Next: Syntax, Prev: Overview, Up: Top
1208 2 Command-Line Options
1209 **********************
1211 This chapter describes command-line options available in _all_ versions
1212 of the GNU assembler; see *Note Machine Dependencies::, for options
1213 specific to particular machine architectures.
1215 If you are invoking `as' via the GNU C compiler, you can use the
1216 `-Wa' option to pass arguments through to the assembler. The assembler
1217 arguments must be separated from each other (and the `-Wa') by commas.
1220 gcc -c -g -O -Wa,-alh,-L file.c
1222 This passes two options to the assembler: `-alh' (emit a listing to
1223 standard output with high-level and assembly source) and `-L' (retain
1224 local symbols in the symbol table).
1226 Usually you do not need to use this `-Wa' mechanism, since many
1227 compiler command-line options are automatically passed to the assembler
1228 by the compiler. (You can call the GNU compiler driver with the `-v'
1229 option to see precisely what options it passes to each compilation
1230 pass, including the assembler.)
1234 * a:: -a[cdghlns] enable listings
1235 * alternate:: --alternate enable alternate macro syntax
1236 * D:: -D for compatibility
1237 * f:: -f to work faster
1238 * I:: -I for .include search path
1240 * K:: -K for difference tables
1242 * L:: -L to retain local symbols
1243 * listing:: --listing-XXX to configure listing output
1244 * M:: -M or --mri to assemble in MRI compatibility mode
1245 * MD:: --MD for dependency tracking
1246 * o:: -o to name the object file
1247 * R:: -R to join data and text sections
1248 * statistics:: --statistics to see statistics about assembly
1249 * traditional-format:: --traditional-format for compatible output
1250 * v:: -v to announce version
1251 * W:: -W, --no-warn, --warn, --fatal-warnings to control warnings
1252 * Z:: -Z to make object file even after errors
1255 File: as.info, Node: a, Next: alternate, Up: Invoking
1257 2.1 Enable Listings: `-a[cdghlns]'
1258 ==================================
1260 These options enable listing output from the assembler. By itself,
1261 `-a' requests high-level, assembly, and symbols listing. You can use
1262 other letters to select specific options for the list: `-ah' requests a
1263 high-level language listing, `-al' requests an output-program assembly
1264 listing, and `-as' requests a symbol table listing. High-level
1265 listings require that a compiler debugging option like `-g' be used,
1266 and that assembly listings (`-al') be requested also.
1268 Use the `-ag' option to print a first section with general assembly
1269 information, like as version, switches passed, or time stamp.
1271 Use the `-ac' option to omit false conditionals from a listing. Any
1272 lines which are not assembled because of a false `.if' (or `.ifdef', or
1273 any other conditional), or a true `.if' followed by an `.else', will be
1274 omitted from the listing.
1276 Use the `-ad' option to omit debugging directives from the listing.
1278 Once you have specified one of these options, you can further control
1279 listing output and its appearance using the directives `.list',
1280 `.nolist', `.psize', `.eject', `.title', and `.sbttl'. The `-an'
1281 option turns off all forms processing. If you do not request listing
1282 output with one of the `-a' options, the listing-control directives
1285 The letters after `-a' may be combined into one option, _e.g._,
1288 Note if the assembler source is coming from the standard input (e.g.,
1289 because it is being created by `gcc' and the `-pipe' command line switch
1290 is being used) then the listing will not contain any comments or
1291 preprocessor directives. This is because the listing code buffers
1292 input source lines from stdin only after they have been preprocessed by
1293 the assembler. This reduces memory usage and makes the code more
1297 File: as.info, Node: alternate, Next: D, Prev: a, Up: Invoking
1302 Begin in alternate macro mode, see *Note `.altmacro': Altmacro.
1305 File: as.info, Node: D, Next: f, Prev: alternate, Up: Invoking
1310 This option has no effect whatsoever, but it is accepted to make it more
1311 likely that scripts written for other assemblers also work with `as'.
1314 File: as.info, Node: f, Next: I, Prev: D, Up: Invoking
1316 2.4 Work Faster: `-f'
1317 =====================
1319 `-f' should only be used when assembling programs written by a
1320 (trusted) compiler. `-f' stops the assembler from doing whitespace and
1321 comment preprocessing on the input file(s) before assembling them.
1322 *Note Preprocessing: Preprocessing.
1324 _Warning:_ if you use `-f' when the files actually need to be
1325 preprocessed (if they contain comments, for example), `as' does
1329 File: as.info, Node: I, Next: K, Prev: f, Up: Invoking
1331 2.5 `.include' Search Path: `-I' PATH
1332 =====================================
1334 Use this option to add a PATH to the list of directories `as' searches
1335 for files specified in `.include' directives (*note `.include':
1336 Include.). You may use `-I' as many times as necessary to include a
1337 variety of paths. The current working directory is always searched
1338 first; after that, `as' searches any `-I' directories in the same order
1339 as they were specified (left to right) on the command line.
1342 File: as.info, Node: K, Next: L, Prev: I, Up: Invoking
1344 2.6 Difference Tables: `-K'
1345 ===========================
1347 `as' sometimes alters the code emitted for directives of the form
1348 `.word SYM1-SYM2'. *Note `.word': Word. You can use the `-K' option
1349 if you want a warning issued when this is done.
1352 File: as.info, Node: L, Next: listing, Prev: K, Up: Invoking
1354 2.7 Include Local Symbols: `-L'
1355 ===============================
1357 Symbols beginning with system-specific local label prefixes, typically
1358 `.L' for ELF systems or `L' for traditional a.out systems, are called
1359 "local symbols". *Note Symbol Names::. Normally you do not see such
1360 symbols when debugging, because they are intended for the use of
1361 programs (like compilers) that compose assembler programs, not for your
1362 notice. Normally both `as' and `ld' discard such symbols, so you do
1363 not normally debug with them.
1365 This option tells `as' to retain those local symbols in the object
1366 file. Usually if you do this you also tell the linker `ld' to preserve
1370 File: as.info, Node: listing, Next: M, Prev: L, Up: Invoking
1372 2.8 Configuring listing output: `--listing'
1373 ===========================================
1375 The listing feature of the assembler can be enabled via the command
1376 line switch `-a' (*note a::). This feature combines the input source
1377 file(s) with a hex dump of the corresponding locations in the output
1378 object file, and displays them as a listing file. The format of this
1379 listing can be controlled by directives inside the assembler source
1380 (i.e., `.list' (*note List::), `.title' (*note Title::), `.sbttl'
1381 (*note Sbttl::), `.psize' (*note Psize::), and `.eject' (*note Eject::)
1382 and also by the following switches:
1384 `--listing-lhs-width=`number''
1385 Sets the maximum width, in words, of the first line of the hex
1386 byte dump. This dump appears on the left hand side of the listing
1389 `--listing-lhs-width2=`number''
1390 Sets the maximum width, in words, of any further lines of the hex
1391 byte dump for a given input source line. If this value is not
1392 specified, it defaults to being the same as the value specified
1393 for `--listing-lhs-width'. If neither switch is used the default
1396 `--listing-rhs-width=`number''
1397 Sets the maximum width, in characters, of the source line that is
1398 displayed alongside the hex dump. The default value for this
1399 parameter is 100. The source line is displayed on the right hand
1400 side of the listing output.
1402 `--listing-cont-lines=`number''
1403 Sets the maximum number of continuation lines of hex dump that
1404 will be displayed for a given single line of source input. The
1408 File: as.info, Node: M, Next: MD, Prev: listing, Up: Invoking
1410 2.9 Assemble in MRI Compatibility Mode: `-M'
1411 ============================================
1413 The `-M' or `--mri' option selects MRI compatibility mode. This
1414 changes the syntax and pseudo-op handling of `as' to make it compatible
1415 with the `ASM68K' or the `ASM960' (depending upon the configured
1416 target) assembler from Microtec Research. The exact nature of the MRI
1417 syntax will not be documented here; see the MRI manuals for more
1418 information. Note in particular that the handling of macros and macro
1419 arguments is somewhat different. The purpose of this option is to
1420 permit assembling existing MRI assembler code using `as'.
1422 The MRI compatibility is not complete. Certain operations of the
1423 MRI assembler depend upon its object file format, and can not be
1424 supported using other object file formats. Supporting these would
1425 require enhancing each object file format individually. These are:
1427 * global symbols in common section
1429 The m68k MRI assembler supports common sections which are merged
1430 by the linker. Other object file formats do not support this.
1431 `as' handles common sections by treating them as a single common
1432 symbol. It permits local symbols to be defined within a common
1433 section, but it can not support global symbols, since it has no
1434 way to describe them.
1436 * complex relocations
1438 The MRI assemblers support relocations against a negated section
1439 address, and relocations which combine the start addresses of two
1440 or more sections. These are not support by other object file
1443 * `END' pseudo-op specifying start address
1445 The MRI `END' pseudo-op permits the specification of a start
1446 address. This is not supported by other object file formats. The
1447 start address may instead be specified using the `-e' option to
1448 the linker, or in a linker script.
1450 * `IDNT', `.ident' and `NAME' pseudo-ops
1452 The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module
1453 name to the output file. This is not supported by other object
1458 The m68k MRI `ORG' pseudo-op begins an absolute section at a given
1459 address. This differs from the usual `as' `.org' pseudo-op, which
1460 changes the location within the current section. Absolute
1461 sections are not supported by other object file formats. The
1462 address of a section may be assigned within a linker script.
1464 There are some other features of the MRI assembler which are not
1465 supported by `as', typically either because they are difficult or
1466 because they seem of little consequence. Some of these may be
1467 supported in future releases.
1471 EBCDIC strings are not supported.
1473 * packed binary coded decimal
1475 Packed binary coded decimal is not supported. This means that the
1476 `DC.P' and `DCB.P' pseudo-ops are not supported.
1480 The m68k `FEQU' pseudo-op is not supported.
1484 The m68k `NOOBJ' pseudo-op is not supported.
1486 * `OPT' branch control options
1488 The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL',
1489 and `BRW'--are ignored. `as' automatically relaxes all branches,
1490 whether forward or backward, to an appropriate size, so these
1491 options serve no purpose.
1493 * `OPT' list control options
1495 The following m68k `OPT' list control options are ignored: `C',
1496 `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'.
1498 * other `OPT' options
1500 The following m68k `OPT' options are ignored: `NEST', `O', `OLD',
1501 `OP', `P', `PCO', `PCR', `PCS', `R'.
1503 * `OPT' `D' option is default
1505 The m68k `OPT' `D' option is the default, unlike the MRI assembler.
1506 `OPT NOD' may be used to turn it off.
1510 The m68k `XREF' pseudo-op is ignored.
1512 * `.debug' pseudo-op
1514 The i960 `.debug' pseudo-op is not supported.
1516 * `.extended' pseudo-op
1518 The i960 `.extended' pseudo-op is not supported.
1520 * `.list' pseudo-op.
1522 The various options of the i960 `.list' pseudo-op are not
1525 * `.optimize' pseudo-op
1527 The i960 `.optimize' pseudo-op is not supported.
1529 * `.output' pseudo-op
1531 The i960 `.output' pseudo-op is not supported.
1533 * `.setreal' pseudo-op
1535 The i960 `.setreal' pseudo-op is not supported.
1539 File: as.info, Node: MD, Next: o, Prev: M, Up: Invoking
1541 2.10 Dependency Tracking: `--MD'
1542 ================================
1544 `as' can generate a dependency file for the file it creates. This file
1545 consists of a single rule suitable for `make' describing the
1546 dependencies of the main source file.
1548 The rule is written to the file named in its argument.
1550 This feature is used in the automatic updating of makefiles.
1553 File: as.info, Node: o, Next: R, Prev: MD, Up: Invoking
1555 2.11 Name the Object File: `-o'
1556 ===============================
1558 There is always one object file output when you run `as'. By default
1559 it has the name `a.out' (or `b.out', for Intel 960 targets only). You
1560 use this option (which takes exactly one filename) to give the object
1561 file a different name.
1563 Whatever the object file is called, `as' overwrites any existing
1564 file of the same name.
1567 File: as.info, Node: R, Next: statistics, Prev: o, Up: Invoking
1569 2.12 Join Data and Text Sections: `-R'
1570 ======================================
1572 `-R' tells `as' to write the object file as if all data-section data
1573 lives in the text section. This is only done at the very last moment:
1574 your binary data are the same, but data section parts are relocated
1575 differently. The data section part of your object file is zero bytes
1576 long because all its bytes are appended to the text section. (*Note
1577 Sections and Relocation: Sections.)
1579 When you specify `-R' it would be possible to generate shorter
1580 address displacements (because we do not have to cross between text and
1581 data section). We refrain from doing this simply for compatibility with
1582 older versions of `as'. In future, `-R' may work this way.
1584 When `as' is configured for COFF or ELF output, this option is only
1585 useful if you use sections named `.text' and `.data'.
1587 `-R' is not supported for any of the HPPA targets. Using `-R'
1588 generates a warning from `as'.
1591 File: as.info, Node: statistics, Next: traditional-format, Prev: R, Up: Invoking
1593 2.13 Display Assembly Statistics: `--statistics'
1594 ================================================
1596 Use `--statistics' to display two statistics about the resources used by
1597 `as': the maximum amount of space allocated during the assembly (in
1598 bytes), and the total execution time taken for the assembly (in CPU
1602 File: as.info, Node: traditional-format, Next: v, Prev: statistics, Up: Invoking
1604 2.14 Compatible Output: `--traditional-format'
1605 ==============================================
1607 For some targets, the output of `as' is different in some ways from the
1608 output of some existing assembler. This switch requests `as' to use
1609 the traditional format instead.
1611 For example, it disables the exception frame optimizations which
1612 `as' normally does by default on `gcc' output.
1615 File: as.info, Node: v, Next: W, Prev: traditional-format, Up: Invoking
1617 2.15 Announce Version: `-v'
1618 ===========================
1620 You can find out what version of as is running by including the option
1621 `-v' (which you can also spell as `-version') on the command line.
1624 File: as.info, Node: W, Next: Z, Prev: v, Up: Invoking
1626 2.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings'
1627 ======================================================================
1629 `as' should never give a warning or error message when assembling
1630 compiler output. But programs written by people often cause `as' to
1631 give a warning that a particular assumption was made. All such
1632 warnings are directed to the standard error file.
1634 If you use the `-W' and `--no-warn' options, no warnings are issued.
1635 This only affects the warning messages: it does not change any
1636 particular of how `as' assembles your file. Errors, which stop the
1637 assembly, are still reported.
1639 If you use the `--fatal-warnings' option, `as' considers files that
1640 generate warnings to be in error.
1642 You can switch these options off again by specifying `--warn', which
1643 causes warnings to be output as usual.
1646 File: as.info, Node: Z, Prev: W, Up: Invoking
1648 2.17 Generate Object File in Spite of Errors: `-Z'
1649 ==================================================
1651 After an error message, `as' normally produces no output. If for some
1652 reason you are interested in object file output even after `as' gives
1653 an error message on your program, use the `-Z' option. If there are
1654 any errors, `as' continues anyways, and writes an object file after a
1655 final warning message of the form `N errors, M warnings, generating bad
1659 File: as.info, Node: Syntax, Next: Sections, Prev: Invoking, Up: Top
1664 This chapter describes the machine-independent syntax allowed in a
1665 source file. `as' syntax is similar to what many other assemblers use;
1666 it is inspired by the BSD 4.2 assembler, except that `as' does not
1667 assemble Vax bit-fields.
1671 * Preprocessing:: Preprocessing
1672 * Whitespace:: Whitespace
1673 * Comments:: Comments
1674 * Symbol Intro:: Symbols
1675 * Statements:: Statements
1676 * Constants:: Constants
1679 File: as.info, Node: Preprocessing, Next: Whitespace, Up: Syntax
1684 The `as' internal preprocessor:
1685 * adjusts and removes extra whitespace. It leaves one space or tab
1686 before the keywords on a line, and turns any other whitespace on
1687 the line into a single space.
1689 * removes all comments, replacing them with a single space, or an
1690 appropriate number of newlines.
1692 * converts character constants into the appropriate numeric values.
1694 It does not do macro processing, include file handling, or anything
1695 else you may get from your C compiler's preprocessor. You can do
1696 include file processing with the `.include' directive (*note
1697 `.include': Include.). You can use the GNU C compiler driver to get
1698 other "CPP" style preprocessing by giving the input file a `.S' suffix.
1699 *Note Options Controlling the Kind of Output: (gcc.info)Overall
1702 Excess whitespace, comments, and character constants cannot be used
1703 in the portions of the input text that are not preprocessed.
1705 If the first line of an input file is `#NO_APP' or if you use the
1706 `-f' option, whitespace and comments are not removed from the input
1707 file. Within an input file, you can ask for whitespace and comment
1708 removal in specific portions of the by putting a line that says `#APP'
1709 before the text that may contain whitespace or comments, and putting a
1710 line that says `#NO_APP' after this text. This feature is mainly
1711 intend to support `asm' statements in compilers whose output is
1712 otherwise free of comments and whitespace.
1715 File: as.info, Node: Whitespace, Next: Comments, Prev: Preprocessing, Up: Syntax
1720 "Whitespace" is one or more blanks or tabs, in any order. Whitespace
1721 is used to separate symbols, and to make programs neater for people to
1722 read. Unless within character constants (*note Character Constants:
1723 Characters.), any whitespace means the same as exactly one space.
1726 File: as.info, Node: Comments, Next: Symbol Intro, Prev: Whitespace, Up: Syntax
1731 There are two ways of rendering comments to `as'. In both cases the
1732 comment is equivalent to one space.
1734 Anything from `/*' through the next `*/' is a comment. This means
1735 you may not nest these comments.
1738 The only way to include a newline ('\n') in a comment
1739 is to use this sort of comment.
1742 /* This sort of comment does not nest. */
1744 Anything from a "line comment" character up to the next newline is
1745 considered a comment and is ignored. The line comment character is
1746 target specific, and some targets multiple comment characters. Some
1747 targets also have line comment characters that only work if they are
1748 the first character on a line. Some targets use a sequence of two
1749 characters to introduce a line comment. Some targets can also change
1750 their line comment characters depending upon command line options that
1751 have been used. For more details see the _Syntax_ section in the
1752 documentation for individual targets.
1754 If the line comment character is the hash sign (`#') then it still
1755 has the special ability to enable and disable preprocessing (*note
1756 Preprocessing::) and to specify logical line numbers:
1758 To be compatible with past assemblers, lines that begin with `#'
1759 have a special interpretation. Following the `#' should be an absolute
1760 expression (*note Expressions::): the logical line number of the _next_
1761 line. Then a string (*note Strings: Strings.) is allowed: if present
1762 it is a new logical file name. The rest of the line, if any, should be
1765 If the first non-whitespace characters on the line are not numeric,
1766 the line is ignored. (Just like a comment.)
1768 # This is an ordinary comment.
1769 # 42-6 "new_file_name" # New logical file name
1770 # This is logical line # 36.
1771 This feature is deprecated, and may disappear from future versions
1775 File: as.info, Node: Symbol Intro, Next: Statements, Prev: Comments, Up: Syntax
1780 A "symbol" is one or more characters chosen from the set of all letters
1781 (both upper and lower case), digits and the three characters `_.$'. On
1782 most machines, you can also use `$' in symbol names; exceptions are
1783 noted in *Note Machine Dependencies::. No symbol may begin with a
1784 digit. Case is significant. There is no length limit: all characters
1785 are significant. Symbols are delimited by characters not in that set,
1786 or by the beginning of a file (since the source program must end with a
1787 newline, the end of a file is not a possible symbol delimiter). *Note
1791 File: as.info, Node: Statements, Next: Constants, Prev: Symbol Intro, Up: Syntax
1796 A "statement" ends at a newline character (`\n') or a "line separator
1797 character". The line separator character is target specific and
1798 described in the _Syntax_ section of each target's documentation. Not
1799 all targets support a line separator character. The newline or line
1800 separator character is considered to be part of the preceding
1801 statement. Newlines and separators within character constants are an
1802 exception: they do not end statements.
1804 It is an error to end any statement with end-of-file: the last
1805 character of any input file should be a newline.
1807 An empty statement is allowed, and may include whitespace. It is
1810 A statement begins with zero or more labels, optionally followed by a
1811 key symbol which determines what kind of statement it is. The key
1812 symbol determines the syntax of the rest of the statement. If the
1813 symbol begins with a dot `.' then the statement is an assembler
1814 directive: typically valid for any computer. If the symbol begins with
1815 a letter the statement is an assembly language "instruction": it
1816 assembles into a machine language instruction. Different versions of
1817 `as' for different computers recognize different instructions. In
1818 fact, the same symbol may represent a different instruction in a
1819 different computer's assembly language.
1821 A label is a symbol immediately followed by a colon (`:').
1822 Whitespace before a label or after a colon is permitted, but you may not
1823 have whitespace between a label's symbol and its colon. *Note Labels::.
1825 For HPPA targets, labels need not be immediately followed by a
1826 colon, but the definition of a label must begin in column zero. This
1827 also implies that only one label may be defined on each line.
1829 label: .directive followed by something
1830 another_label: # This is an empty statement.
1831 instruction operand_1, operand_2, ...
1834 File: as.info, Node: Constants, Prev: Statements, Up: Syntax
1839 A constant is a number, written so that its value is known by
1840 inspection, without knowing any context. Like this:
1841 .byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
1842 .ascii "Ring the bell\7" # A string constant.
1843 .octa 0x123456789abcdef0123456789ABCDEF0 # A bignum.
1844 .float 0f-314159265358979323846264338327\
1845 95028841971.693993751E-40 # - pi, a flonum.
1849 * Characters:: Character Constants
1850 * Numbers:: Number Constants
1853 File: as.info, Node: Characters, Next: Numbers, Up: Constants
1855 3.6.1 Character Constants
1856 -------------------------
1858 There are two kinds of character constants. A "character" stands for
1859 one character in one byte and its value may be used in numeric
1860 expressions. String constants (properly called string _literals_) are
1861 potentially many bytes and their values may not be used in arithmetic
1867 * Chars:: Characters
1870 File: as.info, Node: Strings, Next: Chars, Up: Characters
1875 A "string" is written between double-quotes. It may contain
1876 double-quotes or null characters. The way to get special characters
1877 into a string is to "escape" these characters: precede them with a
1878 backslash `\' character. For example `\\' represents one backslash:
1879 the first `\' is an escape which tells `as' to interpret the second
1880 character literally as a backslash (which prevents `as' from
1881 recognizing the second `\' as an escape character). The complete list
1885 Mnemonic for backspace; for ASCII this is octal code 010.
1888 Mnemonic for FormFeed; for ASCII this is octal code 014.
1891 Mnemonic for newline; for ASCII this is octal code 012.
1894 Mnemonic for carriage-Return; for ASCII this is octal code 015.
1897 Mnemonic for horizontal Tab; for ASCII this is octal code 011.
1899 `\ DIGIT DIGIT DIGIT'
1900 An octal character code. The numeric code is 3 octal digits. For
1901 compatibility with other Unix systems, 8 and 9 are accepted as
1902 digits: for example, `\008' has the value 010, and `\009' the
1905 `\`x' HEX-DIGITS...'
1906 A hex character code. All trailing hex digits are combined.
1907 Either upper or lower case `x' works.
1910 Represents one `\' character.
1913 Represents one `"' character. Needed in strings to represent this
1914 character, because an unescaped `"' would end the string.
1917 Any other character when escaped by `\' gives a warning, but
1918 assembles as if the `\' was not present. The idea is that if you
1919 used an escape sequence you clearly didn't want the literal
1920 interpretation of the following character. However `as' has no
1921 other interpretation, so `as' knows it is giving you the wrong
1922 code and warns you of the fact.
1924 Which characters are escapable, and what those escapes represent,
1925 varies widely among assemblers. The current set is what we think the
1926 BSD 4.2 assembler recognizes, and is a subset of what most C compilers
1927 recognize. If you are in doubt, do not use an escape sequence.
1930 File: as.info, Node: Chars, Prev: Strings, Up: Characters
1935 A single character may be written as a single quote immediately
1936 followed by that character. The same escapes apply to characters as to
1937 strings. So if you want to write the character backslash, you must
1938 write `'\\' where the first `\' escapes the second `\'. As you can
1939 see, the quote is an acute accent, not a grave accent. A newline
1940 immediately following an acute accent is taken as a literal character
1941 and does not count as the end of a statement. The value of a character
1942 constant in a numeric expression is the machine's byte-wide code for
1943 that character. `as' assumes your character code is ASCII: `'A' means
1944 65, `'B' means 66, and so on.
1947 File: as.info, Node: Numbers, Prev: Characters, Up: Constants
1949 3.6.2 Number Constants
1950 ----------------------
1952 `as' distinguishes three kinds of numbers according to how they are
1953 stored in the target machine. _Integers_ are numbers that would fit
1954 into an `int' in the C language. _Bignums_ are integers, but they are
1955 stored in more than 32 bits. _Flonums_ are floating point numbers,
1960 * Integers:: Integers
1965 File: as.info, Node: Integers, Next: Bignums, Up: Numbers
1970 A binary integer is `0b' or `0B' followed by zero or more of the binary
1973 An octal integer is `0' followed by zero or more of the octal digits
1976 A decimal integer starts with a non-zero digit followed by zero or
1977 more digits (`0123456789').
1979 A hexadecimal integer is `0x' or `0X' followed by one or more
1980 hexadecimal digits chosen from `0123456789abcdefABCDEF'.
1982 Integers have the usual values. To denote a negative integer, use
1983 the prefix operator `-' discussed under expressions (*note Prefix
1984 Operators: Prefix Ops.).
1987 File: as.info, Node: Bignums, Next: Flonums, Prev: Integers, Up: Numbers
1992 A "bignum" has the same syntax and semantics as an integer except that
1993 the number (or its negative) takes more than 32 bits to represent in
1994 binary. The distinction is made because in some places integers are
1995 permitted while bignums are not.
1998 File: as.info, Node: Flonums, Prev: Bignums, Up: Numbers
2003 A "flonum" represents a floating point number. The translation is
2004 indirect: a decimal floating point number from the text is converted by
2005 `as' to a generic binary floating point number of more than sufficient
2006 precision. This generic floating point number is converted to a
2007 particular computer's floating point format (or formats) by a portion
2008 of `as' specialized to that computer.
2010 A flonum is written by writing (in order)
2011 * The digit `0'. (`0' is optional on the HPPA.)
2013 * A letter, to tell `as' the rest of the number is a flonum. `e' is
2014 recommended. Case is not important.
2016 On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the
2017 letter must be one of the letters `DFPRSX' (in upper or lower
2020 On the ARC, the letter must be one of the letters `DFRS' (in upper
2023 On the Intel 960 architecture, the letter must be one of the
2024 letters `DFT' (in upper or lower case).
2026 On the HPPA architecture, the letter must be `E' (upper case only).
2028 * An optional sign: either `+' or `-'.
2030 * An optional "integer part": zero or more decimal digits.
2032 * An optional "fractional part": `.' followed by zero or more
2035 * An optional exponent, consisting of:
2039 * Optional sign: either `+' or `-'.
2041 * One or more decimal digits.
2044 At least one of the integer part or the fractional part must be
2045 present. The floating point number has the usual base-10 value.
2047 `as' does all processing using integers. Flonums are computed
2048 independently of any floating point hardware in the computer running
2052 File: as.info, Node: Sections, Next: Symbols, Prev: Syntax, Up: Top
2054 4 Sections and Relocation
2055 *************************
2059 * Secs Background:: Background
2060 * Ld Sections:: Linker Sections
2061 * As Sections:: Assembler Internal Sections
2062 * Sub-Sections:: Sub-Sections
2066 File: as.info, Node: Secs Background, Next: Ld Sections, Up: Sections
2071 Roughly, a section is a range of addresses, with no gaps; all data "in"
2072 those addresses is treated the same for some particular purpose. For
2073 example there may be a "read only" section.
2075 The linker `ld' reads many object files (partial programs) and
2076 combines their contents to form a runnable program. When `as' emits an
2077 object file, the partial program is assumed to start at address 0.
2078 `ld' assigns the final addresses for the partial program, so that
2079 different partial programs do not overlap. This is actually an
2080 oversimplification, but it suffices to explain how `as' uses sections.
2082 `ld' moves blocks of bytes of your program to their run-time
2083 addresses. These blocks slide to their run-time addresses as rigid
2084 units; their length does not change and neither does the order of bytes
2085 within them. Such a rigid unit is called a _section_. Assigning
2086 run-time addresses to sections is called "relocation". It includes the
2087 task of adjusting mentions of object-file addresses so they refer to
2088 the proper run-time addresses. For the H8/300, and for the Renesas /
2089 SuperH SH, `as' pads sections if needed to ensure they end on a word
2090 (sixteen bit) boundary.
2092 An object file written by `as' has at least three sections, any of
2093 which may be empty. These are named "text", "data" and "bss" sections.
2095 When it generates COFF or ELF output, `as' can also generate
2096 whatever other named sections you specify using the `.section'
2097 directive (*note `.section': Section.). If you do not use any
2098 directives that place output in the `.text' or `.data' sections, these
2099 sections still exist, but are empty.
2101 When `as' generates SOM or ELF output for the HPPA, `as' can also
2102 generate whatever other named sections you specify using the `.space'
2103 and `.subspace' directives. See `HP9000 Series 800 Assembly Language
2104 Reference Manual' (HP 92432-90001) for details on the `.space' and
2105 `.subspace' assembler directives.
2107 Additionally, `as' uses different names for the standard text, data,
2108 and bss sections when generating SOM output. Program text is placed
2109 into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'.
2111 Within the object file, the text section starts at address `0', the
2112 data section follows, and the bss section follows the data section.
2114 When generating either SOM or ELF output files on the HPPA, the text
2115 section starts at address `0', the data section at address `0x4000000',
2116 and the bss section follows the data section.
2118 To let `ld' know which data changes when the sections are relocated,
2119 and how to change that data, `as' also writes to the object file
2120 details of the relocation needed. To perform relocation `ld' must
2121 know, each time an address in the object file is mentioned:
2122 * Where in the object file is the beginning of this reference to an
2125 * How long (in bytes) is this reference?
2127 * Which section does the address refer to? What is the numeric
2129 (ADDRESS) - (START-ADDRESS OF SECTION)?
2131 * Is the reference to an address "Program-Counter relative"?
2133 In fact, every address `as' ever uses is expressed as
2134 (SECTION) + (OFFSET INTO SECTION)
2135 Further, most expressions `as' computes have this section-relative
2136 nature. (For some object formats, such as SOM for the HPPA, some
2137 expressions are symbol-relative instead.)
2139 In this manual we use the notation {SECNAME N} to mean "offset N
2140 into section SECNAME."
2142 Apart from text, data and bss sections you need to know about the
2143 "absolute" section. When `ld' mixes partial programs, addresses in the
2144 absolute section remain unchanged. For example, address `{absolute 0}'
2145 is "relocated" to run-time address 0 by `ld'. Although the linker
2146 never arranges two partial programs' data sections with overlapping
2147 addresses after linking, _by definition_ their absolute sections must
2148 overlap. Address `{absolute 239}' in one part of a program is always
2149 the same address when the program is running as address `{absolute
2150 239}' in any other part of the program.
2152 The idea of sections is extended to the "undefined" section. Any
2153 address whose section is unknown at assembly time is by definition
2154 rendered {undefined U}--where U is filled in later. Since numbers are
2155 always defined, the only way to generate an undefined address is to
2156 mention an undefined symbol. A reference to a named common block would
2157 be such a symbol: its value is unknown at assembly time so it has
2158 section _undefined_.
2160 By analogy the word _section_ is used to describe groups of sections
2161 in the linked program. `ld' puts all partial programs' text sections
2162 in contiguous addresses in the linked program. It is customary to
2163 refer to the _text section_ of a program, meaning all the addresses of
2164 all partial programs' text sections. Likewise for data and bss
2167 Some sections are manipulated by `ld'; others are invented for use
2168 of `as' and have no meaning except during assembly.
2171 File: as.info, Node: Ld Sections, Next: As Sections, Prev: Secs Background, Up: Sections
2176 `ld' deals with just four kinds of sections, summarized below.
2181 These sections hold your program. `as' and `ld' treat them as
2182 separate but equal sections. Anything you can say of one section
2183 is true of another. When the program is running, however, it is
2184 customary for the text section to be unalterable. The text
2185 section is often shared among processes: it contains instructions,
2186 constants and the like. The data section of a running program is
2187 usually alterable: for example, C variables would be stored in the
2191 This section contains zeroed bytes when your program begins
2192 running. It is used to hold uninitialized variables or common
2193 storage. The length of each partial program's bss section is
2194 important, but because it starts out containing zeroed bytes there
2195 is no need to store explicit zero bytes in the object file. The
2196 bss section was invented to eliminate those explicit zeros from
2200 Address 0 of this section is always "relocated" to runtime address
2201 0. This is useful if you want to refer to an address that `ld'
2202 must not change when relocating. In this sense we speak of
2203 absolute addresses being "unrelocatable": they do not change
2207 This "section" is a catch-all for address references to objects
2208 not in the preceding sections.
2210 An idealized example of three relocatable sections follows. The
2211 example uses the traditional section names `.text' and `.data'. Memory
2212 addresses are on the horizontal axis.
2215 partial program # 1: |ttttt|dddd|00|
2222 partial program # 2: |TTT|DDD|000|
2225 +--+---+-----+--+----+---+-----+~~
2226 linked program: | |TTT|ttttt| |dddd|DDD|00000|
2227 +--+---+-----+--+----+---+-----+~~
2232 File: as.info, Node: As Sections, Next: Sub-Sections, Prev: Ld Sections, Up: Sections
2234 4.3 Assembler Internal Sections
2235 ===============================
2237 These sections are meant only for the internal use of `as'. They have
2238 no meaning at run-time. You do not really need to know about these
2239 sections for most purposes; but they can be mentioned in `as' warning
2240 messages, so it might be helpful to have an idea of their meanings to
2241 `as'. These sections are used to permit the value of every expression
2242 in your assembly language program to be a section-relative address.
2244 ASSEMBLER-INTERNAL-LOGIC-ERROR!
2245 An internal assembler logic error has been found. This means
2246 there is a bug in the assembler.
2249 The assembler stores complex expression internally as combinations
2250 of symbols. When it needs to represent an expression as a symbol,
2251 it puts it in the expr section.
2254 File: as.info, Node: Sub-Sections, Next: bss, Prev: As Sections, Up: Sections
2259 Assembled bytes conventionally fall into two sections: text and data.
2260 You may have separate groups of data in named sections that you want to
2261 end up near to each other in the object file, even though they are not
2262 contiguous in the assembler source. `as' allows you to use
2263 "subsections" for this purpose. Within each section, there can be
2264 numbered subsections with values from 0 to 8192. Objects assembled
2265 into the same subsection go into the object file together with other
2266 objects in the same subsection. For example, a compiler might want to
2267 store constants in the text section, but might not want to have them
2268 interspersed with the program being assembled. In this case, the
2269 compiler could issue a `.text 0' before each section of code being
2270 output, and a `.text 1' before each group of constants being output.
2272 Subsections are optional. If you do not use subsections, everything
2273 goes in subsection number zero.
2275 Each subsection is zero-padded up to a multiple of four bytes.
2276 (Subsections may be padded a different amount on different flavors of
2279 Subsections appear in your object file in numeric order, lowest
2280 numbered to highest. (All this to be compatible with other people's
2281 assemblers.) The object file contains no representation of
2282 subsections; `ld' and other programs that manipulate object files see
2283 no trace of them. They just see all your text subsections as a text
2284 section, and all your data subsections as a data section.
2286 To specify which subsection you want subsequent statements assembled
2287 into, use a numeric argument to specify it, in a `.text EXPRESSION' or
2288 a `.data EXPRESSION' statement. When generating COFF output, you can
2289 also use an extra subsection argument with arbitrary named sections:
2290 `.section NAME, EXPRESSION'. When generating ELF output, you can also
2291 use the `.subsection' directive (*note SubSection::) to specify a
2292 subsection: `.subsection EXPRESSION'. EXPRESSION should be an absolute
2293 expression (*note Expressions::). If you just say `.text' then `.text
2294 0' is assumed. Likewise `.data' means `.data 0'. Assembly begins in
2295 `text 0'. For instance:
2296 .text 0 # The default subsection is text 0 anyway.
2297 .ascii "This lives in the first text subsection. *"
2299 .ascii "But this lives in the second text subsection."
2301 .ascii "This lives in the data section,"
2302 .ascii "in the first data subsection."
2304 .ascii "This lives in the first text section,"
2305 .ascii "immediately following the asterisk (*)."
2307 Each section has a "location counter" incremented by one for every
2308 byte assembled into that section. Because subsections are merely a
2309 convenience restricted to `as' there is no concept of a subsection
2310 location counter. There is no way to directly manipulate a location
2311 counter--but the `.align' directive changes it, and any label
2312 definition captures its current value. The location counter of the
2313 section where statements are being assembled is said to be the "active"
2317 File: as.info, Node: bss, Prev: Sub-Sections, Up: Sections
2322 The bss section is used for local common variable storage. You may
2323 allocate address space in the bss section, but you may not dictate data
2324 to load into it before your program executes. When your program starts
2325 running, all the contents of the bss section are zeroed bytes.
2327 The `.lcomm' pseudo-op defines a symbol in the bss section; see
2328 *Note `.lcomm': Lcomm.
2330 The `.comm' pseudo-op may be used to declare a common symbol, which
2331 is another form of uninitialized symbol; see *Note `.comm': Comm.
2333 When assembling for a target which supports multiple sections, such
2334 as ELF or COFF, you may switch into the `.bss' section and define
2335 symbols as usual; see *Note `.section': Section. You may only assemble
2336 zero values into the section. Typically the section will only contain
2337 symbol definitions and `.skip' directives (*note `.skip': Skip.).
2340 File: as.info, Node: Symbols, Next: Expressions, Prev: Sections, Up: Top
2345 Symbols are a central concept: the programmer uses symbols to name
2346 things, the linker uses symbols to link, and the debugger uses symbols
2349 _Warning:_ `as' does not place symbols in the object file in the
2350 same order they were declared. This may break some debuggers.
2355 * Setting Symbols:: Giving Symbols Other Values
2356 * Symbol Names:: Symbol Names
2357 * Dot:: The Special Dot Symbol
2358 * Symbol Attributes:: Symbol Attributes
2361 File: as.info, Node: Labels, Next: Setting Symbols, Up: Symbols
2366 A "label" is written as a symbol immediately followed by a colon `:'.
2367 The symbol then represents the current value of the active location
2368 counter, and is, for example, a suitable instruction operand. You are
2369 warned if you use the same symbol to represent two different locations:
2370 the first definition overrides any other definitions.
2372 On the HPPA, the usual form for a label need not be immediately
2373 followed by a colon, but instead must start in column zero. Only one
2374 label may be defined on a single line. To work around this, the HPPA
2375 version of `as' also provides a special directive `.label' for defining
2376 labels more flexibly.
2379 File: as.info, Node: Setting Symbols, Next: Symbol Names, Prev: Labels, Up: Symbols
2381 5.2 Giving Symbols Other Values
2382 ===============================
2384 A symbol can be given an arbitrary value by writing a symbol, followed
2385 by an equals sign `=', followed by an expression (*note Expressions::).
2386 This is equivalent to using the `.set' directive. *Note `.set': Set.
2387 In the same way, using a double equals sign `='`=' here represents an
2388 equivalent of the `.eqv' directive. *Note `.eqv': Eqv.
2390 Blackfin does not support symbol assignment with `='.
2393 File: as.info, Node: Symbol Names, Next: Dot, Prev: Setting Symbols, Up: Symbols
2398 Symbol names begin with a letter or with one of `._'. On most
2399 machines, you can also use `$' in symbol names; exceptions are noted in
2400 *Note Machine Dependencies::. That character may be followed by any
2401 string of digits, letters, dollar signs (unless otherwise noted for a
2402 particular target machine), and underscores.
2404 Case of letters is significant: `foo' is a different symbol name than
2407 Each symbol has exactly one name. Each name in an assembly language
2408 program refers to exactly one symbol. You may use that symbol name any
2409 number of times in a program.
2414 A local symbol is any symbol beginning with certain local label
2415 prefixes. By default, the local label prefix is `.L' for ELF systems or
2416 `L' for traditional a.out systems, but each target may have its own set
2417 of local label prefixes. On the HPPA local symbols begin with `L$'.
2419 Local symbols are defined and used within the assembler, but they are
2420 normally not saved in object files. Thus, they are not visible when
2421 debugging. You may use the `-L' option (*note Include Local Symbols:
2422 `-L': L.) to retain the local symbols in the object files.
2427 Local labels help compilers and programmers use names temporarily.
2428 They create symbols which are guaranteed to be unique over the entire
2429 scope of the input source code and which can be referred to by a simple
2430 notation. To define a local label, write a label of the form `N:'
2431 (where N represents any positive integer). To refer to the most recent
2432 previous definition of that label write `Nb', using the same number as
2433 when you defined the label. To refer to the next definition of a local
2434 label, write `Nf'--the `b' stands for "backwards" and the `f' stands
2437 There is no restriction on how you can use these labels, and you can
2438 reuse them too. So that it is possible to repeatedly define the same
2439 local label (using the same number `N'), although you can only refer to
2440 the most recently defined local label of that number (for a backwards
2441 reference) or the next definition of a specific local label for a
2442 forward reference. It is also worth noting that the first 10 local
2443 labels (`0:'...`9:') are implemented in a slightly more efficient
2444 manner than the others.
2453 Which is the equivalent of:
2455 label_1: branch label_3
2456 label_2: branch label_1
2457 label_3: branch label_4
2458 label_4: branch label_3
2460 Local label names are only a notational device. They are immediately
2461 transformed into more conventional symbol names before the assembler
2462 uses them. The symbol names are stored in the symbol table, appear in
2463 error messages, and are optionally emitted to the object file. The
2464 names are constructed using these parts:
2466 `_local label prefix_'
2467 All local symbols begin with the system-specific local label
2468 prefix. Normally both `as' and `ld' forget symbols that start
2469 with the local label prefix. These labels are used for symbols
2470 you are never intended to see. If you use the `-L' option then
2471 `as' retains these symbols in the object file. If you also
2472 instruct `ld' to retain these symbols, you may use them in
2476 This is the number that was used in the local label definition.
2477 So if the label is written `55:' then the number is `55'.
2480 This unusual character is included so you do not accidentally
2481 invent a symbol of the same name. The character has ASCII value
2482 of `\002' (control-B).
2485 This is a serial number to keep the labels distinct. The first
2486 definition of `0:' gets the number `1'. The 15th definition of
2487 `0:' gets the number `15', and so on. Likewise the first
2488 definition of `1:' gets the number `1' and its 15th definition
2491 So for example, the first `1:' may be named `.L1C-B1', and the 44th
2492 `3:' may be named `.L3C-B44'.
2497 `as' also supports an even more local form of local labels called
2498 dollar labels. These labels go out of scope (i.e., they become
2499 undefined) as soon as a non-local label is defined. Thus they remain
2500 valid for only a small region of the input source code. Normal local
2501 labels, by contrast, remain in scope for the entire file, or until they
2502 are redefined by another occurrence of the same local label.
2504 Dollar labels are defined in exactly the same way as ordinary local
2505 labels, except that they have a dollar sign suffix to their numeric
2506 value, e.g., `55$:'.
2508 They can also be distinguished from ordinary local labels by their
2509 transformed names which use ASCII character `\001' (control-A) as the
2510 magic character to distinguish them from ordinary labels. For example,
2511 the fifth definition of `6$' may be named `.L6C-A5'.
2514 File: as.info, Node: Dot, Next: Symbol Attributes, Prev: Symbol Names, Up: Symbols
2516 5.4 The Special Dot Symbol
2517 ==========================
2519 The special symbol `.' refers to the current address that `as' is
2520 assembling into. Thus, the expression `melvin: .long .' defines
2521 `melvin' to contain its own address. Assigning a value to `.' is
2522 treated the same as a `.org' directive. Thus, the expression `.=.+4'
2523 is the same as saying `.space 4'.
2526 File: as.info, Node: Symbol Attributes, Prev: Dot, Up: Symbols
2528 5.5 Symbol Attributes
2529 =====================
2531 Every symbol has, as well as its name, the attributes "Value" and
2532 "Type". Depending on output format, symbols can also have auxiliary
2535 If you use a symbol without defining it, `as' assumes zero for all
2536 these attributes, and probably won't warn you. This makes the symbol
2537 an externally defined symbol, which is generally what you would want.
2541 * Symbol Value:: Value
2542 * Symbol Type:: Type
2545 * a.out Symbols:: Symbol Attributes: `a.out'
2547 * COFF Symbols:: Symbol Attributes for COFF
2549 * SOM Symbols:: Symbol Attributes for SOM
2552 File: as.info, Node: Symbol Value, Next: Symbol Type, Up: Symbol Attributes
2557 The value of a symbol is (usually) 32 bits. For a symbol which labels a
2558 location in the text, data, bss or absolute sections the value is the
2559 number of addresses from the start of that section to the label.
2560 Naturally for text, data and bss sections the value of a symbol changes
2561 as `ld' changes section base addresses during linking. Absolute
2562 symbols' values do not change during linking: that is why they are
2565 The value of an undefined symbol is treated in a special way. If it
2566 is 0 then the symbol is not defined in this assembler source file, and
2567 `ld' tries to determine its value from other files linked into the same
2568 program. You make this kind of symbol simply by mentioning a symbol
2569 name without defining it. A non-zero value represents a `.comm' common
2570 declaration. The value is how much common storage to reserve, in bytes
2571 (addresses). The symbol refers to the first address of the allocated
2575 File: as.info, Node: Symbol Type, Next: a.out Symbols, Prev: Symbol Value, Up: Symbol Attributes
2580 The type attribute of a symbol contains relocation (section)
2581 information, any flag settings indicating that a symbol is external, and
2582 (optionally), other information for linkers and debuggers. The exact
2583 format depends on the object-code output format in use.
2586 File: as.info, Node: a.out Symbols, Next: COFF Symbols, Prev: Symbol Type, Up: Symbol Attributes
2588 5.5.3 Symbol Attributes: `a.out'
2589 --------------------------------
2593 * Symbol Desc:: Descriptor
2594 * Symbol Other:: Other
2597 File: as.info, Node: Symbol Desc, Next: Symbol Other, Up: a.out Symbols
2602 This is an arbitrary 16-bit value. You may establish a symbol's
2603 descriptor value by using a `.desc' statement (*note `.desc': Desc.).
2604 A descriptor value means nothing to `as'.
2607 File: as.info, Node: Symbol Other, Prev: Symbol Desc, Up: a.out Symbols
2612 This is an arbitrary 8-bit value. It means nothing to `as'.
2615 File: as.info, Node: COFF Symbols, Next: SOM Symbols, Prev: a.out Symbols, Up: Symbol Attributes
2617 5.5.4 Symbol Attributes for COFF
2618 --------------------------------
2620 The COFF format supports a multitude of auxiliary symbol attributes;
2621 like the primary symbol attributes, they are set between `.def' and
2622 `.endef' directives.
2624 5.5.4.1 Primary Attributes
2625 ..........................
2627 The symbol name is set with `.def'; the value and type, respectively,
2628 with `.val' and `.type'.
2630 5.5.4.2 Auxiliary Attributes
2631 ............................
2633 The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and
2634 `.weak' can generate auxiliary symbol table information for COFF.
2637 File: as.info, Node: SOM Symbols, Prev: COFF Symbols, Up: Symbol Attributes
2639 5.5.5 Symbol Attributes for SOM
2640 -------------------------------
2642 The SOM format for the HPPA supports a multitude of symbol attributes
2643 set with the `.EXPORT' and `.IMPORT' directives.
2645 The attributes are described in `HP9000 Series 800 Assembly Language
2646 Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT'
2647 assembler directive documentation.
2650 File: as.info, Node: Expressions, Next: Pseudo Ops, Prev: Symbols, Up: Top
2655 An "expression" specifies an address or numeric value. Whitespace may
2656 precede and/or follow an expression.
2658 The result of an expression must be an absolute number, or else an
2659 offset into a particular section. If an expression is not absolute,
2660 and there is not enough information when `as' sees the expression to
2661 know its section, a second pass over the source program might be
2662 necessary to interpret the expression--but the second pass is currently
2663 not implemented. `as' aborts with an error message in this situation.
2667 * Empty Exprs:: Empty Expressions
2668 * Integer Exprs:: Integer Expressions
2671 File: as.info, Node: Empty Exprs, Next: Integer Exprs, Up: Expressions
2673 6.1 Empty Expressions
2674 =====================
2676 An empty expression has no value: it is just whitespace or null.
2677 Wherever an absolute expression is required, you may omit the
2678 expression, and `as' assumes a value of (absolute) 0. This is
2679 compatible with other assemblers.
2682 File: as.info, Node: Integer Exprs, Prev: Empty Exprs, Up: Expressions
2684 6.2 Integer Expressions
2685 =======================
2687 An "integer expression" is one or more _arguments_ delimited by
2692 * Arguments:: Arguments
2693 * Operators:: Operators
2694 * Prefix Ops:: Prefix Operators
2695 * Infix Ops:: Infix Operators
2698 File: as.info, Node: Arguments, Next: Operators, Up: Integer Exprs
2703 "Arguments" are symbols, numbers or subexpressions. In other contexts
2704 arguments are sometimes called "arithmetic operands". In this manual,
2705 to avoid confusing them with the "instruction operands" of the machine
2706 language, we use the term "argument" to refer to parts of expressions
2707 only, reserving the word "operand" to refer only to machine instruction
2710 Symbols are evaluated to yield {SECTION NNN} where SECTION is one of
2711 text, data, bss, absolute, or undefined. NNN is a signed, 2's
2712 complement 32 bit integer.
2714 Numbers are usually integers.
2716 A number can be a flonum or bignum. In this case, you are warned
2717 that only the low order 32 bits are used, and `as' pretends these 32
2718 bits are an integer. You may write integer-manipulating instructions
2719 that act on exotic constants, compatible with other assemblers.
2721 Subexpressions are a left parenthesis `(' followed by an integer
2722 expression, followed by a right parenthesis `)'; or a prefix operator
2723 followed by an argument.
2726 File: as.info, Node: Operators, Next: Prefix Ops, Prev: Arguments, Up: Integer Exprs
2731 "Operators" are arithmetic functions, like `+' or `%'. Prefix
2732 operators are followed by an argument. Infix operators appear between
2733 their arguments. Operators may be preceded and/or followed by
2737 File: as.info, Node: Prefix Ops, Next: Infix Ops, Prev: Operators, Up: Integer Exprs
2739 6.2.3 Prefix Operator
2740 ---------------------
2742 `as' has the following "prefix operators". They each take one
2743 argument, which must be absolute.
2746 "Negation". Two's complement negation.
2749 "Complementation". Bitwise not.
2752 File: as.info, Node: Infix Ops, Prev: Prefix Ops, Up: Integer Exprs
2754 6.2.4 Infix Operators
2755 ---------------------
2757 "Infix operators" take two arguments, one on either side. Operators
2758 have precedence, but operations with equal precedence are performed left
2759 to right. Apart from `+' or `-', both arguments must be absolute, and
2760 the result is absolute.
2762 1. Highest Precedence
2768 "Division". Truncation is the same as the C operator `/'
2774 "Shift Left". Same as the C operator `<<'.
2777 "Shift Right". Same as the C operator `>>'.
2779 2. Intermediate precedence
2782 "Bitwise Inclusive Or".
2788 "Bitwise Exclusive Or".
2796 "Addition". If either argument is absolute, the result has
2797 the section of the other argument. You may not add together
2798 arguments from different sections.
2801 "Subtraction". If the right argument is absolute, the result
2802 has the section of the left argument. If both arguments are
2803 in the same section, the result is absolute. You may not
2804 subtract arguments from different sections.
2820 "Is Greater Than Or Equal To"
2823 "Is Less Than Or Equal To"
2825 The comparison operators can be used as infix operators. A
2826 true results has a value of -1 whereas a false result has a
2827 value of 0. Note, these operators perform signed
2830 4. Lowest Precedence
2838 These two logical operations can be used to combine the
2839 results of sub expressions. Note, unlike the comparison
2840 operators a true result returns a value of 1 but a false
2841 results does still return 0. Also note that the logical or
2842 operator has a slightly lower precedence than logical and.
2845 In short, it's only meaningful to add or subtract the _offsets_ in an
2846 address; you can only have a defined section in one of the two
2850 File: as.info, Node: Pseudo Ops, Next: Object Attributes, Prev: Expressions, Up: Top
2852 7 Assembler Directives
2853 **********************
2855 All assembler directives have names that begin with a period (`.').
2856 The rest of the name is letters, usually in lower case.
2858 This chapter discusses directives that are available regardless of
2859 the target machine configuration for the GNU assembler. Some machine
2860 configurations provide additional directives. *Note Machine
2867 * ABORT (COFF):: `.ABORT'
2869 * Align:: `.align ABS-EXPR , ABS-EXPR'
2870 * Altmacro:: `.altmacro'
2871 * Ascii:: `.ascii "STRING"'...
2872 * Asciz:: `.asciz "STRING"'...
2873 * Balign:: `.balign ABS-EXPR , ABS-EXPR'
2874 * Byte:: `.byte EXPRESSIONS'
2875 * CFI directives:: `.cfi_startproc [simple]', `.cfi_endproc', etc.
2876 * Comm:: `.comm SYMBOL , LENGTH '
2877 * Data:: `.data SUBSECTION'
2881 * Desc:: `.desc SYMBOL, ABS-EXPRESSION'
2885 * Double:: `.double FLONUMS'
2888 * Elseif:: `.elseif'
2893 * Endfunc:: `.endfunc'
2895 * Equ:: `.equ SYMBOL, EXPRESSION'
2896 * Equiv:: `.equiv SYMBOL, EXPRESSION'
2897 * Eqv:: `.eqv SYMBOL, EXPRESSION'
2899 * Error:: `.error STRING'
2901 * Extern:: `.extern'
2904 * Fill:: `.fill REPEAT , SIZE , VALUE'
2905 * Float:: `.float FLONUMS'
2907 * Global:: `.global SYMBOL', `.globl SYMBOL'
2909 * Gnu_attribute:: `.gnu_attribute TAG,VALUE'
2910 * Hidden:: `.hidden NAMES'
2912 * hword:: `.hword EXPRESSIONS'
2914 * If:: `.if ABSOLUTE EXPRESSION'
2915 * Incbin:: `.incbin "FILE"[,SKIP[,COUNT]]'
2916 * Include:: `.include "FILE"'
2917 * Int:: `.int EXPRESSIONS'
2919 * Internal:: `.internal NAMES'
2921 * Irp:: `.irp SYMBOL,VALUES'...
2922 * Irpc:: `.irpc SYMBOL,VALUES'...
2923 * Lcomm:: `.lcomm SYMBOL , LENGTH'
2924 * Lflags:: `.lflags'
2926 * Line:: `.line LINE-NUMBER'
2928 * Linkonce:: `.linkonce [TYPE]'
2930 * Ln:: `.ln LINE-NUMBER'
2931 * Loc:: `.loc FILENO LINENO'
2932 * Loc_mark_labels:: `.loc_mark_labels ENABLE'
2934 * Local:: `.local NAMES'
2936 * Long:: `.long EXPRESSIONS'
2938 * Macro:: `.macro NAME ARGS'...
2940 * Noaltmacro:: `.noaltmacro'
2941 * Nolist:: `.nolist'
2942 * Octa:: `.octa BIGNUMS'
2943 * Offset:: `.offset LOC'
2944 * Org:: `.org NEW-LC, FILL'
2945 * P2align:: `.p2align ABS-EXPR, ABS-EXPR, ABS-EXPR'
2947 * PopSection:: `.popsection'
2948 * Previous:: `.previous'
2950 * Print:: `.print STRING'
2952 * Protected:: `.protected NAMES'
2954 * Psize:: `.psize LINES, COLUMNS'
2955 * Purgem:: `.purgem NAME'
2957 * PushSection:: `.pushsection NAME'
2959 * Quad:: `.quad BIGNUMS'
2960 * Reloc:: `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
2961 * Rept:: `.rept COUNT'
2962 * Sbttl:: `.sbttl "SUBHEADING"'
2964 * Scl:: `.scl CLASS'
2966 * Section:: `.section NAME[, FLAGS]'
2968 * Set:: `.set SYMBOL, EXPRESSION'
2969 * Short:: `.short EXPRESSIONS'
2970 * Single:: `.single FLONUMS'
2972 * Size:: `.size [NAME , EXPRESSION]'
2974 * Skip:: `.skip SIZE , FILL'
2976 * Sleb128:: `.sleb128 EXPRESSIONS'
2978 * Space:: `.space SIZE , FILL'
2980 * Stab:: `.stabd, .stabn, .stabs'
2982 * String:: `.string "STR"', `.string8 "STR"', `.string16 "STR"', `.string32 "STR"', `.string64 "STR"'
2983 * Struct:: `.struct EXPRESSION'
2985 * SubSection:: `.subsection'
2986 * Symver:: `.symver NAME,NAME2@NODENAME'
2989 * Tag:: `.tag STRUCTNAME'
2991 * Text:: `.text SUBSECTION'
2992 * Title:: `.title "HEADING"'
2994 * Type:: `.type <INT | NAME , TYPE DESCRIPTION>'
2996 * Uleb128:: `.uleb128 EXPRESSIONS'
3001 * Version:: `.version "STRING"'
3002 * VTableEntry:: `.vtable_entry TABLE, OFFSET'
3003 * VTableInherit:: `.vtable_inherit CHILD, PARENT'
3005 * Warning:: `.warning STRING'
3006 * Weak:: `.weak NAMES'
3007 * Weakref:: `.weakref ALIAS, SYMBOL'
3008 * Word:: `.word EXPRESSIONS'
3009 * Deprecated:: Deprecated Directives
3012 File: as.info, Node: Abort, Next: ABORT (COFF), Up: Pseudo Ops
3017 This directive stops the assembly immediately. It is for compatibility
3018 with other assemblers. The original idea was that the assembly
3019 language source would be piped into the assembler. If the sender of
3020 the source quit, it could use this directive tells `as' to quit also.
3021 One day `.abort' will not be supported.
3024 File: as.info, Node: ABORT (COFF), Next: Align, Prev: Abort, Up: Pseudo Ops
3029 When producing COFF output, `as' accepts this directive as a synonym
3033 File: as.info, Node: Align, Next: Altmacro, Prev: ABORT (COFF), Up: Pseudo Ops
3035 7.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR'
3036 =========================================
3038 Pad the location counter (in the current subsection) to a particular
3039 storage boundary. The first expression (which must be absolute) is the
3040 alignment required, as described below.
3042 The second expression (also absolute) gives the fill value to be
3043 stored in the padding bytes. It (and the comma) may be omitted. If it
3044 is omitted, the padding bytes are normally zero. However, on some
3045 systems, if the section is marked as containing code and the fill value
3046 is omitted, the space is filled with no-op instructions.
3048 The third expression is also absolute, and is also optional. If it
3049 is present, it is the maximum number of bytes that should be skipped by
3050 this alignment directive. If doing the alignment would require
3051 skipping more bytes than the specified maximum, then the alignment is
3052 not done at all. You can omit the fill value (the second argument)
3053 entirely by simply using two commas after the required alignment; this
3054 can be useful if you want the alignment to be filled with no-op
3055 instructions when appropriate.
3057 The way the required alignment is specified varies from system to
3058 system. For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32,
3059 s390, sparc, tic4x, tic80 and xtensa, the first expression is the
3060 alignment request in bytes. For example `.align 8' advances the
3061 location counter until it is a multiple of 8. If the location counter
3062 is already a multiple of 8, no change is needed. For the tic54x, the
3063 first expression is the alignment request in words.
3065 For other systems, including ppc, i386 using a.out format, arm and
3066 strongarm, it is the number of low-order zero bits the location counter
3067 must have after advancement. For example `.align 3' advances the
3068 location counter until it a multiple of 8. If the location counter is
3069 already a multiple of 8, no change is needed.
3071 This inconsistency is due to the different behaviors of the various
3072 native assemblers for these systems which GAS must emulate. GAS also
3073 provides `.balign' and `.p2align' directives, described later, which
3074 have a consistent behavior across all architectures (but are specific
3078 File: as.info, Node: Altmacro, Next: Ascii, Prev: Align, Up: Pseudo Ops
3083 Enable alternate macro mode, enabling:
3085 `LOCAL NAME [ , ... ]'
3086 One additional directive, `LOCAL', is available. It is used to
3087 generate a string replacement for each of the NAME arguments, and
3088 replace any instances of NAME in each macro expansion. The
3089 replacement string is unique in the assembly, and different for
3090 each separate macro expansion. `LOCAL' allows you to write macros
3091 that define symbols, without fear of conflict between separate
3095 You can write strings delimited in these other ways besides
3099 You can delimit strings with single-quote characters.
3102 You can delimit strings with matching angle brackets.
3104 `single-character string escape'
3105 To include any single character literally in a string (even if the
3106 character would otherwise have some special meaning), you can
3107 prefix the character with `!' (an exclamation mark). For example,
3108 you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 >
3111 `Expression results as strings'
3112 You can write `%EXPR' to evaluate the expression EXPR and use the
3116 File: as.info, Node: Ascii, Next: Asciz, Prev: Altmacro, Up: Pseudo Ops
3118 7.5 `.ascii "STRING"'...
3119 ========================
3121 `.ascii' expects zero or more string literals (*note Strings::)
3122 separated by commas. It assembles each string (with no automatic
3123 trailing zero byte) into consecutive addresses.
3126 File: as.info, Node: Asciz, Next: Balign, Prev: Ascii, Up: Pseudo Ops
3128 7.6 `.asciz "STRING"'...
3129 ========================
3131 `.asciz' is just like `.ascii', but each string is followed by a zero
3132 byte. The "z" in `.asciz' stands for "zero".
3135 File: as.info, Node: Balign, Next: Byte, Prev: Asciz, Up: Pseudo Ops
3137 7.7 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
3138 ==============================================
3140 Pad the location counter (in the current subsection) to a particular
3141 storage boundary. The first expression (which must be absolute) is the
3142 alignment request in bytes. For example `.balign 8' advances the
3143 location counter until it is a multiple of 8. If the location counter
3144 is already a multiple of 8, no change is needed.
3146 The second expression (also absolute) gives the fill value to be
3147 stored in the padding bytes. It (and the comma) may be omitted. If it
3148 is omitted, the padding bytes are normally zero. However, on some
3149 systems, if the section is marked as containing code and the fill value
3150 is omitted, the space is filled with no-op instructions.
3152 The third expression is also absolute, and is also optional. If it
3153 is present, it is the maximum number of bytes that should be skipped by
3154 this alignment directive. If doing the alignment would require
3155 skipping more bytes than the specified maximum, then the alignment is
3156 not done at all. You can omit the fill value (the second argument)
3157 entirely by simply using two commas after the required alignment; this
3158 can be useful if you want the alignment to be filled with no-op
3159 instructions when appropriate.
3161 The `.balignw' and `.balignl' directives are variants of the
3162 `.balign' directive. The `.balignw' directive treats the fill pattern
3163 as a two byte word value. The `.balignl' directives treats the fill
3164 pattern as a four byte longword value. For example, `.balignw
3165 4,0x368d' will align to a multiple of 4. If it skips two bytes, they
3166 will be filled in with the value 0x368d (the exact placement of the
3167 bytes depends upon the endianness of the processor). If it skips 1 or
3168 3 bytes, the fill value is undefined.
3171 File: as.info, Node: Byte, Next: CFI directives, Prev: Balign, Up: Pseudo Ops
3173 7.8 `.byte EXPRESSIONS'
3174 =======================
3176 `.byte' expects zero or more expressions, separated by commas. Each
3177 expression is assembled into the next byte.
3180 File: as.info, Node: CFI directives, Next: Comm, Prev: Byte, Up: Pseudo Ops
3182 7.9 `.cfi_sections SECTION_LIST'
3183 ================================
3185 `.cfi_sections' may be used to specify whether CFI directives should
3186 emit `.eh_frame' section and/or `.debug_frame' section. If
3187 SECTION_LIST is `.eh_frame', `.eh_frame' is emitted, if SECTION_LIST is
3188 `.debug_frame', `.debug_frame' is emitted. To emit both use
3189 `.eh_frame, .debug_frame'. The default if this directive is not used
3190 is `.cfi_sections .eh_frame'.
3192 7.10 `.cfi_startproc [simple]'
3193 ==============================
3195 `.cfi_startproc' is used at the beginning of each function that should
3196 have an entry in `.eh_frame'. It initializes some internal data
3197 structures. Don't forget to close the function by `.cfi_endproc'.
3199 Unless `.cfi_startproc' is used along with parameter `simple' it
3200 also emits some architecture dependent initial CFI instructions.
3205 `.cfi_endproc' is used at the end of a function where it closes its
3206 unwind entry previously opened by `.cfi_startproc', and emits it to
3209 7.12 `.cfi_personality ENCODING [, EXP]'
3210 ========================================
3212 `.cfi_personality' defines personality routine and its encoding.
3213 ENCODING must be a constant determining how the personality should be
3214 encoded. If it is 255 (`DW_EH_PE_omit'), second argument is not
3215 present, otherwise second argument should be a constant or a symbol
3216 name. When using indirect encodings, the symbol provided should be the
3217 location where personality can be loaded from, not the personality
3218 routine itself. The default after `.cfi_startproc' is
3219 `.cfi_personality 0xff', no personality routine.
3221 7.13 `.cfi_lsda ENCODING [, EXP]'
3222 =================================
3224 `.cfi_lsda' defines LSDA and its encoding. ENCODING must be a constant
3225 determining how the LSDA should be encoded. If it is 255
3226 (`DW_EH_PE_omit'), second argument is not present, otherwise second
3227 argument should be a constant or a symbol name. The default after
3228 `.cfi_startproc' is `.cfi_lsda 0xff', no LSDA.
3230 7.14 `.cfi_def_cfa REGISTER, OFFSET'
3231 ====================================
3233 `.cfi_def_cfa' defines a rule for computing CFA as: take address from
3234 REGISTER and add OFFSET to it.
3236 7.15 `.cfi_def_cfa_register REGISTER'
3237 =====================================
3239 `.cfi_def_cfa_register' modifies a rule for computing CFA. From now on
3240 REGISTER will be used instead of the old one. Offset remains the same.
3242 7.16 `.cfi_def_cfa_offset OFFSET'
3243 =================================
3245 `.cfi_def_cfa_offset' modifies a rule for computing CFA. Register
3246 remains the same, but OFFSET is new. Note that it is the absolute
3247 offset that will be added to a defined register to compute CFA address.
3249 7.17 `.cfi_adjust_cfa_offset OFFSET'
3250 ====================================
3252 Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is
3253 added/substracted from the previous offset.
3255 7.18 `.cfi_offset REGISTER, OFFSET'
3256 ===================================
3258 Previous value of REGISTER is saved at offset OFFSET from CFA.
3260 7.19 `.cfi_rel_offset REGISTER, OFFSET'
3261 =======================================
3263 Previous value of REGISTER is saved at offset OFFSET from the current
3264 CFA register. This is transformed to `.cfi_offset' using the known
3265 displacement of the CFA register from the CFA. This is often easier to
3266 use, because the number will match the code it's annotating.
3268 7.20 `.cfi_register REGISTER1, REGISTER2'
3269 =========================================
3271 Previous value of REGISTER1 is saved in register REGISTER2.
3273 7.21 `.cfi_restore REGISTER'
3274 ============================
3276 `.cfi_restore' says that the rule for REGISTER is now the same as it
3277 was at the beginning of the function, after all initial instruction
3278 added by `.cfi_startproc' were executed.
3280 7.22 `.cfi_undefined REGISTER'
3281 ==============================
3283 From now on the previous value of REGISTER can't be restored anymore.
3285 7.23 `.cfi_same_value REGISTER'
3286 ===============================
3288 Current value of REGISTER is the same like in the previous frame, i.e.
3289 no restoration needed.
3291 7.24 `.cfi_remember_state',
3292 ===========================
3294 First save all current rules for all registers by `.cfi_remember_state',
3295 then totally screw them up by subsequent `.cfi_*' directives and when
3296 everything is hopelessly bad, use `.cfi_restore_state' to restore the
3297 previous saved state.
3299 7.25 `.cfi_return_column REGISTER'
3300 ==================================
3302 Change return column REGISTER, i.e. the return address is either
3303 directly in REGISTER or can be accessed by rules for REGISTER.
3305 7.26 `.cfi_signal_frame'
3306 ========================
3308 Mark current function as signal trampoline.
3310 7.27 `.cfi_window_save'
3311 =======================
3313 SPARC register window has been saved.
3315 7.28 `.cfi_escape' EXPRESSION[, ...]
3316 ====================================
3318 Allows the user to add arbitrary bytes to the unwind info. One might
3319 use this to add OS-specific CFI opcodes, or generic CFI opcodes that
3320 GAS does not yet support.
3322 7.29 `.cfi_val_encoded_addr REGISTER, ENCODING, LABEL'
3323 ======================================================
3325 The current value of REGISTER is LABEL. The value of LABEL will be
3326 encoded in the output file according to ENCODING; see the description
3327 of `.cfi_personality' for details on this encoding.
3329 The usefulness of equating a register to a fixed label is probably
3330 limited to the return address register. Here, it can be useful to mark
3331 a code segment that has only one return address which is reached by a
3332 direct branch and no copy of the return address exists in memory or
3336 File: as.info, Node: Comm, Next: Data, Prev: CFI directives, Up: Pseudo Ops
3338 7.30 `.comm SYMBOL , LENGTH '
3339 =============================
3341 `.comm' declares a common symbol named SYMBOL. When linking, a common
3342 symbol in one object file may be merged with a defined or common symbol
3343 of the same name in another object file. If `ld' does not see a
3344 definition for the symbol-just one or more common symbols-then it will
3345 allocate LENGTH bytes of uninitialized memory. LENGTH must be an
3346 absolute expression. If `ld' sees multiple common symbols with the
3347 same name, and they do not all have the same size, it will allocate
3348 space using the largest size.
3350 When using ELF or (as a GNU extension) PE, the `.comm' directive
3351 takes an optional third argument. This is the desired alignment of the
3352 symbol, specified for ELF as a byte boundary (for example, an alignment
3353 of 16 means that the least significant 4 bits of the address should be
3354 zero), and for PE as a power of two (for example, an alignment of 5
3355 means aligned to a 32-byte boundary). The alignment must be an
3356 absolute expression, and it must be a power of two. If `ld' allocates
3357 uninitialized memory for the common symbol, it will use the alignment
3358 when placing the symbol. If no alignment is specified, `as' will set
3359 the alignment to the largest power of two less than or equal to the
3360 size of the symbol, up to a maximum of 16 on ELF, or the default
3361 section alignment of 4 on PE(1).
3363 The syntax for `.comm' differs slightly on the HPPA. The syntax is
3364 `SYMBOL .comm, LENGTH'; SYMBOL is optional.
3366 ---------- Footnotes ----------
3368 (1) This is not the same as the executable image file alignment
3369 controlled by `ld''s `--section-alignment' option; image file sections
3370 in PE are aligned to multiples of 4096, which is far too large an
3371 alignment for ordinary variables. It is rather the default alignment
3372 for (non-debug) sections within object (`*.o') files, which are less
3376 File: as.info, Node: Data, Next: Def, Prev: Comm, Up: Pseudo Ops
3378 7.31 `.data SUBSECTION'
3379 =======================
3381 `.data' tells `as' to assemble the following statements onto the end of
3382 the data subsection numbered SUBSECTION (which is an absolute
3383 expression). If SUBSECTION is omitted, it defaults to zero.
3386 File: as.info, Node: Def, Next: Desc, Prev: Data, Up: Pseudo Ops
3391 Begin defining debugging information for a symbol NAME; the definition
3392 extends until the `.endef' directive is encountered.
3395 File: as.info, Node: Desc, Next: Dim, Prev: Def, Up: Pseudo Ops
3397 7.33 `.desc SYMBOL, ABS-EXPRESSION'
3398 ===================================
3400 This directive sets the descriptor of the symbol (*note Symbol
3401 Attributes::) to the low 16 bits of an absolute expression.
3403 The `.desc' directive is not available when `as' is configured for
3404 COFF output; it is only for `a.out' or `b.out' object format. For the
3405 sake of compatibility, `as' accepts it, but produces no output, when
3406 configured for COFF.
3409 File: as.info, Node: Dim, Next: Double, Prev: Desc, Up: Pseudo Ops
3414 This directive is generated by compilers to include auxiliary debugging
3415 information in the symbol table. It is only permitted inside
3416 `.def'/`.endef' pairs.
3419 File: as.info, Node: Double, Next: Eject, Prev: Dim, Up: Pseudo Ops
3421 7.35 `.double FLONUMS'
3422 ======================
3424 `.double' expects zero or more flonums, separated by commas. It
3425 assembles floating point numbers. The exact kind of floating point
3426 numbers emitted depends on how `as' is configured. *Note Machine
3430 File: as.info, Node: Eject, Next: Else, Prev: Double, Up: Pseudo Ops
3435 Force a page break at this point, when generating assembly listings.
3438 File: as.info, Node: Else, Next: Elseif, Prev: Eject, Up: Pseudo Ops
3443 `.else' is part of the `as' support for conditional assembly; see *Note
3444 `.if': If. It marks the beginning of a section of code to be assembled
3445 if the condition for the preceding `.if' was false.
3448 File: as.info, Node: Elseif, Next: End, Prev: Else, Up: Pseudo Ops
3453 `.elseif' is part of the `as' support for conditional assembly; see
3454 *Note `.if': If. It is shorthand for beginning a new `.if' block that
3455 would otherwise fill the entire `.else' section.
3458 File: as.info, Node: End, Next: Endef, Prev: Elseif, Up: Pseudo Ops
3463 `.end' marks the end of the assembly file. `as' does not process
3464 anything in the file past the `.end' directive.
3467 File: as.info, Node: Endef, Next: Endfunc, Prev: End, Up: Pseudo Ops
3472 This directive flags the end of a symbol definition begun with `.def'.
3475 File: as.info, Node: Endfunc, Next: Endif, Prev: Endef, Up: Pseudo Ops
3480 `.endfunc' marks the end of a function specified with `.func'.
3483 File: as.info, Node: Endif, Next: Equ, Prev: Endfunc, Up: Pseudo Ops
3488 `.endif' is part of the `as' support for conditional assembly; it marks
3489 the end of a block of code that is only assembled conditionally. *Note
3493 File: as.info, Node: Equ, Next: Equiv, Prev: Endif, Up: Pseudo Ops
3495 7.43 `.equ SYMBOL, EXPRESSION'
3496 ==============================
3498 This directive sets the value of SYMBOL to EXPRESSION. It is
3499 synonymous with `.set'; see *Note `.set': Set.
3501 The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'.
3503 The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'. On the
3504 Z80 it is an eror if SYMBOL is already defined, but the symbol is not
3505 protected from later redefinition. Compare *Note Equiv::.
3508 File: as.info, Node: Equiv, Next: Eqv, Prev: Equ, Up: Pseudo Ops
3510 7.44 `.equiv SYMBOL, EXPRESSION'
3511 ================================
3513 The `.equiv' directive is like `.equ' and `.set', except that the
3514 assembler will signal an error if SYMBOL is already defined. Note a
3515 symbol which has been referenced but not actually defined is considered
3518 Except for the contents of the error message, this is roughly
3524 plus it protects the symbol from later redefinition.
3527 File: as.info, Node: Eqv, Next: Err, Prev: Equiv, Up: Pseudo Ops
3529 7.45 `.eqv SYMBOL, EXPRESSION'
3530 ==============================
3532 The `.eqv' directive is like `.equiv', but no attempt is made to
3533 evaluate the expression or any part of it immediately. Instead each
3534 time the resulting symbol is used in an expression, a snapshot of its
3535 current value is taken.
3538 File: as.info, Node: Err, Next: Error, Prev: Eqv, Up: Pseudo Ops
3543 If `as' assembles a `.err' directive, it will print an error message
3544 and, unless the `-Z' option was used, it will not generate an object
3545 file. This can be used to signal an error in conditionally compiled
3549 File: as.info, Node: Error, Next: Exitm, Prev: Err, Up: Pseudo Ops
3551 7.47 `.error "STRING"'
3552 ======================
3554 Similarly to `.err', this directive emits an error, but you can specify
3555 a string that will be emitted as the error message. If you don't
3556 specify the message, it defaults to `".error directive invoked in
3557 source file"'. *Note Error and Warning Messages: Errors.
3559 .error "This code has not been assembled and tested."
3562 File: as.info, Node: Exitm, Next: Extern, Prev: Error, Up: Pseudo Ops
3567 Exit early from the current macro definition. *Note Macro::.
3570 File: as.info, Node: Extern, Next: Fail, Prev: Exitm, Up: Pseudo Ops
3575 `.extern' is accepted in the source program--for compatibility with
3576 other assemblers--but it is ignored. `as' treats all undefined symbols
3580 File: as.info, Node: Fail, Next: File, Prev: Extern, Up: Pseudo Ops
3582 7.50 `.fail EXPRESSION'
3583 =======================
3585 Generates an error or a warning. If the value of the EXPRESSION is 500
3586 or more, `as' will print a warning message. If the value is less than
3587 500, `as' will print an error message. The message will include the
3588 value of EXPRESSION. This can occasionally be useful inside complex
3589 nested macros or conditional assembly.
3592 File: as.info, Node: File, Next: Fill, Prev: Fail, Up: Pseudo Ops
3597 There are two different versions of the `.file' directive. Targets
3598 that support DWARF2 line number information use the DWARF2 version of
3599 `.file'. Other targets use the default version.
3604 This version of the `.file' directive tells `as' that we are about to
3605 start a new logical file. The syntax is:
3609 STRING is the new file name. In general, the filename is recognized
3610 whether or not it is surrounded by quotes `"'; but if you wish to
3611 specify an empty file name, you must give the quotes-`""'. This
3612 statement may go away in future: it is only recognized to be compatible
3613 with old `as' programs.
3618 When emitting DWARF2 line number information, `.file' assigns filenames
3619 to the `.debug_line' file name table. The syntax is:
3621 .file FILENO FILENAME
3623 The FILENO operand should be a unique positive integer to use as the
3624 index of the entry in the table. The FILENAME operand is a C string
3627 The detail of filename indices is exposed to the user because the
3628 filename table is shared with the `.debug_info' section of the DWARF2
3629 debugging information, and thus the user must know the exact indices
3630 that table entries will have.
3633 File: as.info, Node: Fill, Next: Float, Prev: File, Up: Pseudo Ops
3635 7.52 `.fill REPEAT , SIZE , VALUE'
3636 ==================================
3638 REPEAT, SIZE and VALUE are absolute expressions. This emits REPEAT
3639 copies of SIZE bytes. REPEAT may be zero or more. SIZE may be zero or
3640 more, but if it is more than 8, then it is deemed to have the value 8,
3641 compatible with other people's assemblers. The contents of each REPEAT
3642 bytes is taken from an 8-byte number. The highest order 4 bytes are
3643 zero. The lowest order 4 bytes are VALUE rendered in the byte-order of
3644 an integer on the computer `as' is assembling for. Each SIZE bytes in
3645 a repetition is taken from the lowest order SIZE bytes of this number.
3646 Again, this bizarre behavior is compatible with other people's
3649 SIZE and VALUE are optional. If the second comma and VALUE are
3650 absent, VALUE is assumed zero. If the first comma and following tokens
3651 are absent, SIZE is assumed to be 1.
3654 File: as.info, Node: Float, Next: Func, Prev: Fill, Up: Pseudo Ops
3656 7.53 `.float FLONUMS'
3657 =====================
3659 This directive assembles zero or more flonums, separated by commas. It
3660 has the same effect as `.single'. The exact kind of floating point
3661 numbers emitted depends on how `as' is configured. *Note Machine
3665 File: as.info, Node: Func, Next: Global, Prev: Float, Up: Pseudo Ops
3667 7.54 `.func NAME[,LABEL]'
3668 =========================
3670 `.func' emits debugging information to denote function NAME, and is
3671 ignored unless the file is assembled with debugging enabled. Only
3672 `--gstabs[+]' is currently supported. LABEL is the entry point of the
3673 function and if omitted NAME prepended with the `leading char' is used.
3674 `leading char' is usually `_' or nothing, depending on the target. All
3675 functions are currently defined to have `void' return type. The
3676 function must be terminated with `.endfunc'.
3679 File: as.info, Node: Global, Next: Gnu_attribute, Prev: Func, Up: Pseudo Ops
3681 7.55 `.global SYMBOL', `.globl SYMBOL'
3682 ======================================
3684 `.global' makes the symbol visible to `ld'. If you define SYMBOL in
3685 your partial program, its value is made available to other partial
3686 programs that are linked with it. Otherwise, SYMBOL takes its
3687 attributes from a symbol of the same name from another file linked into
3690 Both spellings (`.globl' and `.global') are accepted, for
3691 compatibility with other assemblers.
3693 On the HPPA, `.global' is not always enough to make it accessible to
3694 other partial programs. You may need the HPPA-only `.EXPORT' directive
3695 as well. *Note HPPA Assembler Directives: HPPA Directives.
3698 File: as.info, Node: Gnu_attribute, Next: Hidden, Prev: Global, Up: Pseudo Ops
3700 7.56 `.gnu_attribute TAG,VALUE'
3701 ===============================
3703 Record a GNU object attribute for this file. *Note Object Attributes::.
3706 File: as.info, Node: Hidden, Next: hword, Prev: Gnu_attribute, Up: Pseudo Ops
3708 7.57 `.hidden NAMES'
3709 ====================
3711 This is one of the ELF visibility directives. The other two are
3712 `.internal' (*note `.internal': Internal.) and `.protected' (*note
3713 `.protected': Protected.).
3715 This directive overrides the named symbols default visibility (which
3716 is set by their binding: local, global or weak). The directive sets
3717 the visibility to `hidden' which means that the symbols are not visible
3718 to other components. Such symbols are always considered to be
3719 `protected' as well.
3722 File: as.info, Node: hword, Next: Ident, Prev: Hidden, Up: Pseudo Ops
3724 7.58 `.hword EXPRESSIONS'
3725 =========================
3727 This expects zero or more EXPRESSIONS, and emits a 16 bit number for
3730 This directive is a synonym for `.short'; depending on the target
3731 architecture, it may also be a synonym for `.word'.
3734 File: as.info, Node: Ident, Next: If, Prev: hword, Up: Pseudo Ops
3739 This directive is used by some assemblers to place tags in object
3740 files. The behavior of this directive varies depending on the target.
3741 When using the a.out object file format, `as' simply accepts the
3742 directive for source-file compatibility with existing assemblers, but
3743 does not emit anything for it. When using COFF, comments are emitted
3744 to the `.comment' or `.rdata' section, depending on the target. When
3745 using ELF, comments are emitted to the `.comment' section.
3748 File: as.info, Node: If, Next: Incbin, Prev: Ident, Up: Pseudo Ops
3750 7.60 `.if ABSOLUTE EXPRESSION'
3751 ==============================
3753 `.if' marks the beginning of a section of code which is only considered
3754 part of the source program being assembled if the argument (which must
3755 be an ABSOLUTE EXPRESSION) is non-zero. The end of the conditional
3756 section of code must be marked by `.endif' (*note `.endif': Endif.);
3757 optionally, you may include code for the alternative condition, flagged
3758 by `.else' (*note `.else': Else.). If you have several conditions to
3759 check, `.elseif' may be used to avoid nesting blocks if/else within
3760 each subsequent `.else' block.
3762 The following variants of `.if' are also supported:
3764 Assembles the following section of code if the specified SYMBOL
3765 has been defined. Note a symbol which has been referenced but not
3766 yet defined is considered to be undefined.
3769 Assembles the following section of code if the operand is blank
3772 `.ifc STRING1,STRING2'
3773 Assembles the following section of code if the two strings are the
3774 same. The strings may be optionally quoted with single quotes.
3775 If they are not quoted, the first string stops at the first comma,
3776 and the second string stops at the end of the line. Strings which
3777 contain whitespace should be quoted. The string comparison is
3780 `.ifeq ABSOLUTE EXPRESSION'
3781 Assembles the following section of code if the argument is zero.
3783 `.ifeqs STRING1,STRING2'
3784 Another form of `.ifc'. The strings must be quoted using double
3787 `.ifge ABSOLUTE EXPRESSION'
3788 Assembles the following section of code if the argument is greater
3789 than or equal to zero.
3791 `.ifgt ABSOLUTE EXPRESSION'
3792 Assembles the following section of code if the argument is greater
3795 `.ifle ABSOLUTE EXPRESSION'
3796 Assembles the following section of code if the argument is less
3797 than or equal to zero.
3799 `.iflt ABSOLUTE EXPRESSION'
3800 Assembles the following section of code if the argument is less
3804 Like `.ifb', but the sense of the test is reversed: this assembles
3805 the following section of code if the operand is non-blank
3808 `.ifnc STRING1,STRING2.'
3809 Like `.ifc', but the sense of the test is reversed: this assembles
3810 the following section of code if the two strings are not the same.
3814 Assembles the following section of code if the specified SYMBOL
3815 has not been defined. Both spelling variants are equivalent.
3816 Note a symbol which has been referenced but not yet defined is
3817 considered to be undefined.
3819 `.ifne ABSOLUTE EXPRESSION'
3820 Assembles the following section of code if the argument is not
3821 equal to zero (in other words, this is equivalent to `.if').
3823 `.ifnes STRING1,STRING2'
3824 Like `.ifeqs', but the sense of the test is reversed: this
3825 assembles the following section of code if the two strings are not
3829 File: as.info, Node: Incbin, Next: Include, Prev: If, Up: Pseudo Ops
3831 7.61 `.incbin "FILE"[,SKIP[,COUNT]]'
3832 ====================================
3834 The `incbin' directive includes FILE verbatim at the current location.
3835 You can control the search paths used with the `-I' command-line option
3836 (*note Command-Line Options: Invoking.). Quotation marks are required
3839 The SKIP argument skips a number of bytes from the start of the
3840 FILE. The COUNT argument indicates the maximum number of bytes to
3841 read. Note that the data is not aligned in any way, so it is the user's
3842 responsibility to make sure that proper alignment is provided both
3843 before and after the `incbin' directive.
3846 File: as.info, Node: Include, Next: Int, Prev: Incbin, Up: Pseudo Ops
3848 7.62 `.include "FILE"'
3849 ======================
3851 This directive provides a way to include supporting files at specified
3852 points in your source program. The code from FILE is assembled as if
3853 it followed the point of the `.include'; when the end of the included
3854 file is reached, assembly of the original file continues. You can
3855 control the search paths used with the `-I' command-line option (*note
3856 Command-Line Options: Invoking.). Quotation marks are required around
3860 File: as.info, Node: Int, Next: Internal, Prev: Include, Up: Pseudo Ops
3862 7.63 `.int EXPRESSIONS'
3863 =======================
3865 Expect zero or more EXPRESSIONS, of any section, separated by commas.
3866 For each expression, emit a number that, at run time, is the value of
3867 that expression. The byte order and bit size of the number depends on
3868 what kind of target the assembly is for.
3871 File: as.info, Node: Internal, Next: Irp, Prev: Int, Up: Pseudo Ops
3873 7.64 `.internal NAMES'
3874 ======================
3876 This is one of the ELF visibility directives. The other two are
3877 `.hidden' (*note `.hidden': Hidden.) and `.protected' (*note
3878 `.protected': Protected.).
3880 This directive overrides the named symbols default visibility (which
3881 is set by their binding: local, global or weak). The directive sets
3882 the visibility to `internal' which means that the symbols are
3883 considered to be `hidden' (i.e., not visible to other components), and
3884 that some extra, processor specific processing must also be performed
3885 upon the symbols as well.
3888 File: as.info, Node: Irp, Next: Irpc, Prev: Internal, Up: Pseudo Ops
3890 7.65 `.irp SYMBOL,VALUES'...
3891 ============================
3893 Evaluate a sequence of statements assigning different values to SYMBOL.
3894 The sequence of statements starts at the `.irp' directive, and is
3895 terminated by an `.endr' directive. For each VALUE, SYMBOL is set to
3896 VALUE, and the sequence of statements is assembled. If no VALUE is
3897 listed, the sequence of statements is assembled once, with SYMBOL set
3898 to the null string. To refer to SYMBOL within the sequence of
3899 statements, use \SYMBOL.
3901 For example, assembling
3907 is equivalent to assembling
3913 For some caveats with the spelling of SYMBOL, see also *Note Macro::.
3916 File: as.info, Node: Irpc, Next: Lcomm, Prev: Irp, Up: Pseudo Ops
3918 7.66 `.irpc SYMBOL,VALUES'...
3919 =============================
3921 Evaluate a sequence of statements assigning different values to SYMBOL.
3922 The sequence of statements starts at the `.irpc' directive, and is
3923 terminated by an `.endr' directive. For each character in VALUE,
3924 SYMBOL is set to the character, and the sequence of statements is
3925 assembled. If no VALUE is listed, the sequence of statements is
3926 assembled once, with SYMBOL set to the null string. To refer to SYMBOL
3927 within the sequence of statements, use \SYMBOL.
3929 For example, assembling
3935 is equivalent to assembling
3941 For some caveats with the spelling of SYMBOL, see also the discussion
3945 File: as.info, Node: Lcomm, Next: Lflags, Prev: Irpc, Up: Pseudo Ops
3947 7.67 `.lcomm SYMBOL , LENGTH'
3948 =============================
3950 Reserve LENGTH (an absolute expression) bytes for a local common
3951 denoted by SYMBOL. The section and value of SYMBOL are those of the
3952 new local common. The addresses are allocated in the bss section, so
3953 that at run-time the bytes start off zeroed. SYMBOL is not declared
3954 global (*note `.global': Global.), so is normally not visible to `ld'.
3956 Some targets permit a third argument to be used with `.lcomm'. This
3957 argument specifies the desired alignment of the symbol in the bss
3960 The syntax for `.lcomm' differs slightly on the HPPA. The syntax is
3961 `SYMBOL .lcomm, LENGTH'; SYMBOL is optional.
3964 File: as.info, Node: Lflags, Next: Line, Prev: Lcomm, Up: Pseudo Ops
3969 `as' accepts this directive, for compatibility with other assemblers,
3973 File: as.info, Node: Line, Next: Linkonce, Prev: Lflags, Up: Pseudo Ops
3975 7.69 `.line LINE-NUMBER'
3976 ========================
3978 Change the logical line number. LINE-NUMBER must be an absolute
3979 expression. The next line has that logical line number. Therefore any
3980 other statements on the current line (after a statement separator
3981 character) are reported as on logical line number LINE-NUMBER - 1. One
3982 day `as' will no longer support this directive: it is recognized only
3983 for compatibility with existing assembler programs.
3985 Even though this is a directive associated with the `a.out' or `b.out'
3986 object-code formats, `as' still recognizes it when producing COFF
3987 output, and treats `.line' as though it were the COFF `.ln' _if_ it is
3988 found outside a `.def'/`.endef' pair.
3990 Inside a `.def', `.line' is, instead, one of the directives used by
3991 compilers to generate auxiliary symbol information for debugging.
3994 File: as.info, Node: Linkonce, Next: List, Prev: Line, Up: Pseudo Ops
3996 7.70 `.linkonce [TYPE]'
3997 =======================
3999 Mark the current section so that the linker only includes a single copy
4000 of it. This may be used to include the same section in several
4001 different object files, but ensure that the linker will only include it
4002 once in the final output file. The `.linkonce' pseudo-op must be used
4003 for each instance of the section. Duplicate sections are detected
4004 based on the section name, so it should be unique.
4006 This directive is only supported by a few object file formats; as of
4007 this writing, the only object file format which supports it is the
4008 Portable Executable format used on Windows NT.
4010 The TYPE argument is optional. If specified, it must be one of the
4011 following strings. For example:
4013 Not all types may be supported on all object file formats.
4016 Silently discard duplicate sections. This is the default.
4019 Warn if there are duplicate sections, but still keep only one copy.
4022 Warn if any of the duplicates have different sizes.
4025 Warn if any of the duplicates do not have exactly the same
4029 File: as.info, Node: List, Next: Ln, Prev: Linkonce, Up: Pseudo Ops
4034 Control (in conjunction with the `.nolist' directive) whether or not
4035 assembly listings are generated. These two directives maintain an
4036 internal counter (which is zero initially). `.list' increments the
4037 counter, and `.nolist' decrements it. Assembly listings are generated
4038 whenever the counter is greater than zero.
4040 By default, listings are disabled. When you enable them (with the
4041 `-a' command line option; *note Command-Line Options: Invoking.), the
4042 initial value of the listing counter is one.
4045 File: as.info, Node: Ln, Next: Loc, Prev: List, Up: Pseudo Ops
4047 7.72 `.ln LINE-NUMBER'
4048 ======================
4050 `.ln' is a synonym for `.line'.
4053 File: as.info, Node: Loc, Next: Loc_mark_labels, Prev: Ln, Up: Pseudo Ops
4055 7.73 `.loc FILENO LINENO [COLUMN] [OPTIONS]'
4056 ============================================
4058 When emitting DWARF2 line number information, the `.loc' directive will
4059 add a row to the `.debug_line' line number matrix corresponding to the
4060 immediately following assembly instruction. The FILENO, LINENO, and
4061 optional COLUMN arguments will be applied to the `.debug_line' state
4062 machine before the row is added.
4064 The OPTIONS are a sequence of the following tokens in any order:
4067 This option will set the `basic_block' register in the
4068 `.debug_line' state machine to `true'.
4071 This option will set the `prologue_end' register in the
4072 `.debug_line' state machine to `true'.
4075 This option will set the `epilogue_begin' register in the
4076 `.debug_line' state machine to `true'.
4079 This option will set the `is_stmt' register in the `.debug_line'
4080 state machine to `value', which must be either 0 or 1.
4083 This directive will set the `isa' register in the `.debug_line'
4084 state machine to VALUE, which must be an unsigned integer.
4086 `discriminator VALUE'
4087 This directive will set the `discriminator' register in the
4088 `.debug_line' state machine to VALUE, which must be an unsigned
4093 File: as.info, Node: Loc_mark_labels, Next: Local, Prev: Loc, Up: Pseudo Ops
4095 7.74 `.loc_mark_labels ENABLE'
4096 ==============================
4098 When emitting DWARF2 line number information, the `.loc_mark_labels'
4099 directive makes the assembler emit an entry to the `.debug_line' line
4100 number matrix with the `basic_block' register in the state machine set
4101 whenever a code label is seen. The ENABLE argument should be either 1
4102 or 0, to enable or disable this function respectively.
4105 File: as.info, Node: Local, Next: Long, Prev: Loc_mark_labels, Up: Pseudo Ops
4110 This directive, which is available for ELF targets, marks each symbol in
4111 the comma-separated list of `names' as a local symbol so that it will
4112 not be externally visible. If the symbols do not already exist, they
4115 For targets where the `.lcomm' directive (*note Lcomm::) does not
4116 accept an alignment argument, which is the case for most ELF targets,
4117 the `.local' directive can be used in combination with `.comm' (*note
4118 Comm::) to define aligned local common data.
4121 File: as.info, Node: Long, Next: Macro, Prev: Local, Up: Pseudo Ops
4123 7.76 `.long EXPRESSIONS'
4124 ========================
4126 `.long' is the same as `.int'. *Note `.int': Int.
4129 File: as.info, Node: Macro, Next: MRI, Prev: Long, Up: Pseudo Ops
4134 The commands `.macro' and `.endm' allow you to define macros that
4135 generate assembly output. For example, this definition specifies a
4136 macro `sum' that puts a sequence of numbers into memory:
4138 .macro sum from=0, to=5
4145 With that definition, `SUM 0,5' is equivalent to this assembly input:
4155 `.macro MACNAME MACARGS ...'
4156 Begin the definition of a macro called MACNAME. If your macro
4157 definition requires arguments, specify their names after the macro
4158 name, separated by commas or spaces. You can qualify the macro
4159 argument to indicate whether all invocations must specify a
4160 non-blank value (through `:`req''), or whether it takes all of the
4161 remaining arguments (through `:`vararg''). You can supply a
4162 default value for any macro argument by following the name with
4163 `=DEFLT'. You cannot define two macros with the same MACNAME
4164 unless it has been subject to the `.purgem' directive (*note
4165 Purgem::) between the two definitions. For example, these are all
4166 valid `.macro' statements:
4169 Begin the definition of a macro called `comm', which takes no
4172 `.macro plus1 p, p1'
4174 Either statement begins the definition of a macro called
4175 `plus1', which takes two arguments; within the macro
4176 definition, write `\p' or `\p1' to evaluate the arguments.
4178 `.macro reserve_str p1=0 p2'
4179 Begin the definition of a macro called `reserve_str', with two
4180 arguments. The first argument has a default value, but not
4181 the second. After the definition is complete, you can call
4182 the macro either as `reserve_str A,B' (with `\p1' evaluating
4183 to A and `\p2' evaluating to B), or as `reserve_str ,B' (with
4184 `\p1' evaluating as the default, in this case `0', and `\p2'
4187 `.macro m p1:req, p2=0, p3:vararg'
4188 Begin the definition of a macro called `m', with at least
4189 three arguments. The first argument must always have a value
4190 specified, but not the second, which instead has a default
4191 value. The third formal will get assigned all remaining
4192 arguments specified at invocation time.
4194 When you call a macro, you can specify the argument values
4195 either by position, or by keyword. For example, `sum 9,17'
4196 is equivalent to `sum to=17, from=9'.
4199 Note that since each of the MACARGS can be an identifier exactly
4200 as any other one permitted by the target architecture, there may be
4201 occasional problems if the target hand-crafts special meanings to
4202 certain characters when they occur in a special position. For
4203 example, if the colon (`:') is generally permitted to be part of a
4204 symbol name, but the architecture specific code special-cases it
4205 when occurring as the final character of a symbol (to denote a
4206 label), then the macro parameter replacement code will have no way
4207 of knowing that and consider the whole construct (including the
4208 colon) an identifier, and check only this identifier for being the
4209 subject to parameter substitution. So for example this macro
4216 might not work as expected. Invoking `label foo' might not create
4217 a label called `foo' but instead just insert the text `\l:' into
4218 the assembler source, probably generating an error about an
4219 unrecognised identifier.
4221 Similarly problems might occur with the period character (`.')
4222 which is often allowed inside opcode names (and hence identifier
4223 names). So for example constructing a macro to build an opcode
4224 from a base name and a length specifier like this:
4226 .macro opcode base length
4230 and invoking it as `opcode store l' will not create a `store.l'
4231 instruction but instead generate some kind of error as the
4232 assembler tries to interpret the text `\base.\length'.
4234 There are several possible ways around this problem:
4236 `Insert white space'
4237 If it is possible to use white space characters then this is
4238 the simplest solution. eg:
4245 The string `\()' can be used to separate the end of a macro
4246 argument from the following text. eg:
4248 .macro opcode base length
4252 `Use the alternate macro syntax mode'
4253 In the alternative macro syntax mode the ampersand character
4254 (`&') can be used as a separator. eg:
4261 Note: this problem of correctly identifying string parameters to
4262 pseudo ops also applies to the identifiers used in `.irp' (*note
4263 Irp::) and `.irpc' (*note Irpc::) as well.
4266 Mark the end of a macro definition.
4269 Exit early from the current macro definition.
4272 `as' maintains a counter of how many macros it has executed in
4273 this pseudo-variable; you can copy that number to your output with
4274 `\@', but _only within a macro definition_.
4276 `LOCAL NAME [ , ... ]'
4277 _Warning: `LOCAL' is only available if you select "alternate macro
4278 syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro':
4282 File: as.info, Node: MRI, Next: Noaltmacro, Prev: Macro, Up: Pseudo Ops
4287 If VAL is non-zero, this tells `as' to enter MRI mode. If VAL is zero,
4288 this tells `as' to exit MRI mode. This change affects code assembled
4289 until the next `.mri' directive, or until the end of the file. *Note
4293 File: as.info, Node: Noaltmacro, Next: Nolist, Prev: MRI, Up: Pseudo Ops
4298 Disable alternate macro mode. *Note Altmacro::.
4301 File: as.info, Node: Nolist, Next: Octa, Prev: Noaltmacro, Up: Pseudo Ops
4306 Control (in conjunction with the `.list' directive) whether or not
4307 assembly listings are generated. These two directives maintain an
4308 internal counter (which is zero initially). `.list' increments the
4309 counter, and `.nolist' decrements it. Assembly listings are generated
4310 whenever the counter is greater than zero.
4313 File: as.info, Node: Octa, Next: Offset, Prev: Nolist, Up: Pseudo Ops
4315 7.81 `.octa BIGNUMS'
4316 ====================
4318 This directive expects zero or more bignums, separated by commas. For
4319 each bignum, it emits a 16-byte integer.
4321 The term "octa" comes from contexts in which a "word" is two bytes;
4322 hence _octa_-word for 16 bytes.
4325 File: as.info, Node: Offset, Next: Org, Prev: Octa, Up: Pseudo Ops
4330 Set the location counter to LOC in the absolute section. LOC must be
4331 an absolute expression. This directive may be useful for defining
4332 symbols with absolute values. Do not confuse it with the `.org'
4336 File: as.info, Node: Org, Next: P2align, Prev: Offset, Up: Pseudo Ops
4338 7.83 `.org NEW-LC , FILL'
4339 =========================
4341 Advance the location counter of the current section to NEW-LC. NEW-LC
4342 is either an absolute expression or an expression with the same section
4343 as the current subsection. That is, you can't use `.org' to cross
4344 sections: if NEW-LC has the wrong section, the `.org' directive is
4345 ignored. To be compatible with former assemblers, if the section of
4346 NEW-LC is absolute, `as' issues a warning, then pretends the section of
4347 NEW-LC is the same as the current subsection.
4349 `.org' may only increase the location counter, or leave it
4350 unchanged; you cannot use `.org' to move the location counter backwards.
4352 Because `as' tries to assemble programs in one pass, NEW-LC may not
4353 be undefined. If you really detest this restriction we eagerly await a
4354 chance to share your improved assembler.
4356 Beware that the origin is relative to the start of the section, not
4357 to the start of the subsection. This is compatible with other people's
4360 When the location counter (of the current subsection) is advanced,
4361 the intervening bytes are filled with FILL which should be an absolute
4362 expression. If the comma and FILL are omitted, FILL defaults to zero.
4365 File: as.info, Node: P2align, Next: PopSection, Prev: Org, Up: Pseudo Ops
4367 7.84 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
4368 ================================================
4370 Pad the location counter (in the current subsection) to a particular
4371 storage boundary. The first expression (which must be absolute) is the
4372 number of low-order zero bits the location counter must have after
4373 advancement. For example `.p2align 3' advances the location counter
4374 until it a multiple of 8. If the location counter is already a
4375 multiple of 8, no change is needed.
4377 The second expression (also absolute) gives the fill value to be
4378 stored in the padding bytes. It (and the comma) may be omitted. If it
4379 is omitted, the padding bytes are normally zero. However, on some
4380 systems, if the section is marked as containing code and the fill value
4381 is omitted, the space is filled with no-op instructions.
4383 The third expression is also absolute, and is also optional. If it
4384 is present, it is the maximum number of bytes that should be skipped by
4385 this alignment directive. If doing the alignment would require
4386 skipping more bytes than the specified maximum, then the alignment is
4387 not done at all. You can omit the fill value (the second argument)
4388 entirely by simply using two commas after the required alignment; this
4389 can be useful if you want the alignment to be filled with no-op
4390 instructions when appropriate.
4392 The `.p2alignw' and `.p2alignl' directives are variants of the
4393 `.p2align' directive. The `.p2alignw' directive treats the fill
4394 pattern as a two byte word value. The `.p2alignl' directives treats the
4395 fill pattern as a four byte longword value. For example, `.p2alignw
4396 2,0x368d' will align to a multiple of 4. If it skips two bytes, they
4397 will be filled in with the value 0x368d (the exact placement of the
4398 bytes depends upon the endianness of the processor). If it skips 1 or
4399 3 bytes, the fill value is undefined.
4402 File: as.info, Node: PopSection, Next: Previous, Prev: P2align, Up: Pseudo Ops
4407 This is one of the ELF section stack manipulation directives. The
4408 others are `.section' (*note Section::), `.subsection' (*note
4409 SubSection::), `.pushsection' (*note PushSection::), and `.previous'
4412 This directive replaces the current section (and subsection) with
4413 the top section (and subsection) on the section stack. This section is
4414 popped off the stack.
4417 File: as.info, Node: Previous, Next: Print, Prev: PopSection, Up: Pseudo Ops
4422 This is one of the ELF section stack manipulation directives. The
4423 others are `.section' (*note Section::), `.subsection' (*note
4424 SubSection::), `.pushsection' (*note PushSection::), and `.popsection'
4425 (*note PopSection::).
4427 This directive swaps the current section (and subsection) with most
4428 recently referenced section/subsection pair prior to this one. Multiple
4429 `.previous' directives in a row will flip between two sections (and
4430 their subsections). For example:
4440 Will place 0x1234 and 0x9abc into subsection 1 and 0x5678 into
4441 subsection 2 of section A. Whilst:
4445 # Now in section A subsection 1
4449 # Now in section B subsection 0
4452 # Now in section B subsection 1
4455 # Now in section B subsection 0
4458 Will place 0x1234 into section A, 0x5678 and 0xdef0 into subsection
4459 0 of section B and 0x9abc into subsection 1 of section B.
4461 In terms of the section stack, this directive swaps the current
4462 section with the top section on the section stack.
4465 File: as.info, Node: Print, Next: Protected, Prev: Previous, Up: Pseudo Ops
4467 7.87 `.print STRING'
4468 ====================
4470 `as' will print STRING on the standard output during assembly. You
4471 must put STRING in double quotes.
4474 File: as.info, Node: Protected, Next: Psize, Prev: Print, Up: Pseudo Ops
4476 7.88 `.protected NAMES'
4477 =======================
4479 This is one of the ELF visibility directives. The other two are
4480 `.hidden' (*note Hidden::) and `.internal' (*note Internal::).
4482 This directive overrides the named symbols default visibility (which
4483 is set by their binding: local, global or weak). The directive sets
4484 the visibility to `protected' which means that any references to the
4485 symbols from within the components that defines them must be resolved
4486 to the definition in that component, even if a definition in another
4487 component would normally preempt this.
4490 File: as.info, Node: Psize, Next: Purgem, Prev: Protected, Up: Pseudo Ops
4492 7.89 `.psize LINES , COLUMNS'
4493 =============================
4495 Use this directive to declare the number of lines--and, optionally, the
4496 number of columns--to use for each page, when generating listings.
4498 If you do not use `.psize', listings use a default line-count of 60.
4499 You may omit the comma and COLUMNS specification; the default width is
4502 `as' generates formfeeds whenever the specified number of lines is
4503 exceeded (or whenever you explicitly request one, using `.eject').
4505 If you specify LINES as `0', no formfeeds are generated save those
4506 explicitly specified with `.eject'.
4509 File: as.info, Node: Purgem, Next: PushSection, Prev: Psize, Up: Pseudo Ops
4514 Undefine the macro NAME, so that later uses of the string will not be
4515 expanded. *Note Macro::.
4518 File: as.info, Node: PushSection, Next: Quad, Prev: Purgem, Up: Pseudo Ops
4520 7.91 `.pushsection NAME [, SUBSECTION] [, "FLAGS"[, @TYPE[,ARGUMENTS]]]'
4521 ========================================================================
4523 This is one of the ELF section stack manipulation directives. The
4524 others are `.section' (*note Section::), `.subsection' (*note
4525 SubSection::), `.popsection' (*note PopSection::), and `.previous'
4528 This directive pushes the current section (and subsection) onto the
4529 top of the section stack, and then replaces the current section and
4530 subsection with `name' and `subsection'. The optional `flags', `type'
4531 and `arguments' are treated the same as in the `.section' (*note
4532 Section::) directive.
4535 File: as.info, Node: Quad, Next: Reloc, Prev: PushSection, Up: Pseudo Ops
4537 7.92 `.quad BIGNUMS'
4538 ====================
4540 `.quad' expects zero or more bignums, separated by commas. For each
4541 bignum, it emits an 8-byte integer. If the bignum won't fit in 8
4542 bytes, it prints a warning message; and just takes the lowest order 8
4543 bytes of the bignum.
4545 The term "quad" comes from contexts in which a "word" is two bytes;
4546 hence _quad_-word for 8 bytes.
4549 File: as.info, Node: Reloc, Next: Rept, Prev: Quad, Up: Pseudo Ops
4551 7.93 `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
4552 ==============================================
4554 Generate a relocation at OFFSET of type RELOC_NAME with value
4555 EXPRESSION. If OFFSET is a number, the relocation is generated in the
4556 current section. If OFFSET is an expression that resolves to a symbol
4557 plus offset, the relocation is generated in the given symbol's section.
4558 EXPRESSION, if present, must resolve to a symbol plus addend or to an
4559 absolute value, but note that not all targets support an addend. e.g.
4560 ELF REL targets such as i386 store an addend in the section contents
4561 rather than in the relocation. This low level interface does not
4562 support addends stored in the section.
4565 File: as.info, Node: Rept, Next: Sbttl, Prev: Reloc, Up: Pseudo Ops
4570 Repeat the sequence of lines between the `.rept' directive and the next
4571 `.endr' directive COUNT times.
4573 For example, assembling
4579 is equivalent to assembling
4586 File: as.info, Node: Sbttl, Next: Scl, Prev: Rept, Up: Pseudo Ops
4588 7.95 `.sbttl "SUBHEADING"'
4589 ==========================
4591 Use SUBHEADING as the title (third line, immediately after the title
4592 line) when generating assembly listings.
4594 This directive affects subsequent pages, as well as the current page
4595 if it appears within ten lines of the top of a page.
4598 File: as.info, Node: Scl, Next: Section, Prev: Sbttl, Up: Pseudo Ops
4603 Set the storage-class value for a symbol. This directive may only be
4604 used inside a `.def'/`.endef' pair. Storage class may flag whether a
4605 symbol is static or external, or it may record further symbolic
4606 debugging information.
4609 File: as.info, Node: Section, Next: Set, Prev: Scl, Up: Pseudo Ops
4611 7.97 `.section NAME'
4612 ====================
4614 Use the `.section' directive to assemble the following code into a
4617 This directive is only supported for targets that actually support
4618 arbitrarily named sections; on `a.out' targets, for example, it is not
4619 accepted, even with a standard `a.out' section name.
4624 For COFF targets, the `.section' directive is used in one of the
4627 .section NAME[, "FLAGS"]
4628 .section NAME[, SUBSECTION]
4630 If the optional argument is quoted, it is taken as flags to use for
4631 the section. Each flag is a single character. The following flags are
4634 bss section (uninitialized data)
4637 section is not loaded
4652 shared section (meaningful for PE targets)
4655 ignored. (For compatibility with the ELF version)
4658 section is not readable (meaningful for PE targets)
4661 single-digit power-of-two section alignment (GNU extension)
4663 If no flags are specified, the default flags depend upon the section
4664 name. If the section name is not recognized, the default will be for
4665 the section to be loaded and writable. Note the `n' and `w' flags
4666 remove attributes from the section, rather than adding them, so if they
4667 are used on their own it will be as if no flags had been specified at
4670 If the optional argument to the `.section' directive is not quoted,
4671 it is taken as a subsection number (*note Sub-Sections::).
4676 This is one of the ELF section stack manipulation directives. The
4677 others are `.subsection' (*note SubSection::), `.pushsection' (*note
4678 PushSection::), `.popsection' (*note PopSection::), and `.previous'
4681 For ELF targets, the `.section' directive is used like this:
4683 .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]]
4685 The optional FLAGS argument is a quoted string which may contain any
4686 combination of the following characters:
4688 section is allocatable
4691 section is excluded from executable and shared library.
4697 section is executable
4700 section is mergeable
4703 section contains zero terminated strings
4706 section is a member of a section group
4709 section is used for thread-local-storage
4712 section is a member of the previously-current section's group, if
4715 The optional TYPE argument may contain one of the following
4718 section contains data
4721 section does not contain data (i.e., section only occupies space)
4724 section contains data which is used by things other than the
4728 section contains an array of pointers to init functions
4731 section contains an array of pointers to finish functions
4734 section contains an array of pointers to pre-init functions
4736 Many targets only support the first three section types.
4738 Note on targets where the `@' character is the start of a comment (eg
4739 ARM) then another character is used instead. For example the ARM port
4740 uses the `%' character.
4742 If FLAGS contains the `M' symbol then the TYPE argument must be
4743 specified as well as an extra argument--ENTSIZE--like this:
4745 .section NAME , "FLAGS"M, @TYPE, ENTSIZE
4747 Sections with the `M' flag but not `S' flag must contain fixed size
4748 constants, each ENTSIZE octets long. Sections with both `M' and `S'
4749 must contain zero terminated strings where each character is ENTSIZE
4750 bytes long. The linker may remove duplicates within sections with the
4751 same name, same entity size and same flags. ENTSIZE must be an
4752 absolute expression. For sections with both `M' and `S', a string
4753 which is a suffix of a larger string is considered a duplicate. Thus
4754 `"def"' will be merged with `"abcdef"'; A reference to the first
4755 `"def"' will be changed to a reference to `"abcdef"+3'.
4757 If FLAGS contains the `G' symbol then the TYPE argument must be
4758 present along with an additional field like this:
4760 .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE]
4762 The GROUPNAME field specifies the name of the section group to which
4763 this particular section belongs. The optional linkage field can
4766 indicates that only one copy of this section should be retained
4771 Note: if both the M and G flags are present then the fields for the
4772 Merge flag should come first, like this:
4774 .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE]
4776 If FLAGS contains the `?' symbol then it may not also contain the
4777 `G' symbol and the GROUPNAME or LINKAGE fields should not be present.
4778 Instead, `?' says to consider the section that's current before this
4779 directive. If that section used `G', then the new section will use `G'
4780 with those same GROUPNAME and LINKAGE fields implicitly. If not, then
4781 the `?' symbol has no effect.
4783 If no flags are specified, the default flags depend upon the section
4784 name. If the section name is not recognized, the default will be for
4785 the section to have none of the above flags: it will not be allocated
4786 in memory, nor writable, nor executable. The section will contain data.
4788 For ELF targets, the assembler supports another type of `.section'
4789 directive for compatibility with the Solaris assembler:
4791 .section "NAME"[, FLAGS...]
4793 Note that the section name is quoted. There may be a sequence of
4794 comma separated flags:
4796 section is allocatable
4802 section is executable
4805 section is excluded from executable and shared library.
4808 section is used for thread local storage
4810 This directive replaces the current section and subsection. See the
4811 contents of the gas testsuite directory `gas/testsuite/gas/elf' for
4812 some examples of how this directive and the other section stack
4816 File: as.info, Node: Set, Next: Short, Prev: Section, Up: Pseudo Ops
4818 7.98 `.set SYMBOL, EXPRESSION'
4819 ==============================
4821 Set the value of SYMBOL to EXPRESSION. This changes SYMBOL's value and
4822 type to conform to EXPRESSION. If SYMBOL was flagged as external, it
4823 remains flagged (*note Symbol Attributes::).
4825 You may `.set' a symbol many times in the same assembly.
4827 If you `.set' a global symbol, the value stored in the object file
4828 is the last value stored into it.
4830 On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION'
4834 File: as.info, Node: Short, Next: Single, Prev: Set, Up: Pseudo Ops
4836 7.99 `.short EXPRESSIONS'
4837 =========================
4839 `.short' is normally the same as `.word'. *Note `.word': Word.
4841 In some configurations, however, `.short' and `.word' generate
4842 numbers of different lengths. *Note Machine Dependencies::.
4845 File: as.info, Node: Single, Next: Size, Prev: Short, Up: Pseudo Ops
4847 7.100 `.single FLONUMS'
4848 =======================
4850 This directive assembles zero or more flonums, separated by commas. It
4851 has the same effect as `.float'. The exact kind of floating point
4852 numbers emitted depends on how `as' is configured. *Note Machine
4856 File: as.info, Node: Size, Next: Skip, Prev: Single, Up: Pseudo Ops
4861 This directive is used to set the size associated with a symbol.
4866 For COFF targets, the `.size' directive is only permitted inside
4867 `.def'/`.endef' pairs. It is used like this:
4874 For ELF targets, the `.size' directive is used like this:
4876 .size NAME , EXPRESSION
4878 This directive sets the size associated with a symbol NAME. The
4879 size in bytes is computed from EXPRESSION which can make use of label
4880 arithmetic. This directive is typically used to set the size of
4884 File: as.info, Node: Skip, Next: Sleb128, Prev: Size, Up: Pseudo Ops
4886 7.102 `.skip SIZE , FILL'
4887 =========================
4889 This directive emits SIZE bytes, each of value FILL. Both SIZE and
4890 FILL are absolute expressions. If the comma and FILL are omitted, FILL
4891 is assumed to be zero. This is the same as `.space'.
4894 File: as.info, Node: Sleb128, Next: Space, Prev: Skip, Up: Pseudo Ops
4896 7.103 `.sleb128 EXPRESSIONS'
4897 ============================
4899 SLEB128 stands for "signed little endian base 128." This is a compact,
4900 variable length representation of numbers used by the DWARF symbolic
4901 debugging format. *Note `.uleb128': Uleb128.
4904 File: as.info, Node: Space, Next: Stab, Prev: Sleb128, Up: Pseudo Ops
4906 7.104 `.space SIZE , FILL'
4907 ==========================
4909 This directive emits SIZE bytes, each of value FILL. Both SIZE and
4910 FILL are absolute expressions. If the comma and FILL are omitted, FILL
4911 is assumed to be zero. This is the same as `.skip'.
4913 _Warning:_ `.space' has a completely different meaning for HPPA
4914 targets; use `.block' as a substitute. See `HP9000 Series 800
4915 Assembly Language Reference Manual' (HP 92432-90001) for the
4916 meaning of the `.space' directive. *Note HPPA Assembler
4917 Directives: HPPA Directives, for a summary.
4920 File: as.info, Node: Stab, Next: String, Prev: Space, Up: Pseudo Ops
4922 7.105 `.stabd, .stabn, .stabs'
4923 ==============================
4925 There are three directives that begin `.stab'. All emit symbols (*note
4926 Symbols::), for use by symbolic debuggers. The symbols are not entered
4927 in the `as' hash table: they cannot be referenced elsewhere in the
4928 source file. Up to five fields are required:
4931 This is the symbol's name. It may contain any character except
4932 `\000', so is more general than ordinary symbol names. Some
4933 debuggers used to code arbitrarily complex structures into symbol
4934 names using this field.
4937 An absolute expression. The symbol's type is set to the low 8
4938 bits of this expression. Any bit pattern is permitted, but `ld'
4939 and debuggers choke on silly bit patterns.
4942 An absolute expression. The symbol's "other" attribute is set to
4943 the low 8 bits of this expression.
4946 An absolute expression. The symbol's descriptor is set to the low
4947 16 bits of this expression.
4950 An absolute expression which becomes the symbol's value.
4952 If a warning is detected while reading a `.stabd', `.stabn', or
4953 `.stabs' statement, the symbol has probably already been created; you
4954 get a half-formed symbol in your object file. This is compatible with
4957 `.stabd TYPE , OTHER , DESC'
4958 The "name" of the symbol generated is not even an empty string.
4959 It is a null pointer, for compatibility. Older assemblers used a
4960 null pointer so they didn't waste space in object files with empty
4963 The symbol's value is set to the location counter, relocatably.
4964 When your program is linked, the value of this symbol is the
4965 address of the location counter when the `.stabd' was assembled.
4967 `.stabn TYPE , OTHER , DESC , VALUE'
4968 The name of the symbol is set to the empty string `""'.
4970 `.stabs STRING , TYPE , OTHER , DESC , VALUE'
4971 All five fields are specified.
4974 File: as.info, Node: String, Next: Struct, Prev: Stab, Up: Pseudo Ops
4976 7.106 `.string' "STR", `.string8' "STR", `.string16'
4977 ====================================================
4979 "STR", `.string32' "STR", `.string64' "STR"
4981 Copy the characters in STR to the object file. You may specify more
4982 than one string to copy, separated by commas. Unless otherwise
4983 specified for a particular machine, the assembler marks the end of each
4984 string with a 0 byte. You can use any of the escape sequences
4985 described in *Note Strings: Strings.
4987 The variants `string16', `string32' and `string64' differ from the
4988 `string' pseudo opcode in that each 8-bit character from STR is copied
4989 and expanded to 16, 32 or 64 bits respectively. The expanded characters
4990 are stored in target endianness byte order.
4995 .string "B\0\0\0Y\0\0\0E\0\0\0" /* On little endian targets. */
4996 .string "\0\0\0B\0\0\0Y\0\0\0E" /* On big endian targets. */
4999 File: as.info, Node: Struct, Next: SubSection, Prev: String, Up: Pseudo Ops
5001 7.107 `.struct EXPRESSION'
5002 ==========================
5004 Switch to the absolute section, and set the section offset to
5005 EXPRESSION, which must be an absolute expression. You might use this
5013 This would define the symbol `field1' to have the value 0, the symbol
5014 `field2' to have the value 4, and the symbol `field3' to have the value
5015 8. Assembly would be left in the absolute section, and you would need
5016 to use a `.section' directive of some sort to change to some other
5017 section before further assembly.
5020 File: as.info, Node: SubSection, Next: Symver, Prev: Struct, Up: Pseudo Ops
5022 7.108 `.subsection NAME'
5023 ========================
5025 This is one of the ELF section stack manipulation directives. The
5026 others are `.section' (*note Section::), `.pushsection' (*note
5027 PushSection::), `.popsection' (*note PopSection::), and `.previous'
5030 This directive replaces the current subsection with `name'. The
5031 current section is not changed. The replaced subsection is put onto
5032 the section stack in place of the then current top of stack subsection.
5035 File: as.info, Node: Symver, Next: Tag, Prev: SubSection, Up: Pseudo Ops
5040 Use the `.symver' directive to bind symbols to specific version nodes
5041 within a source file. This is only supported on ELF platforms, and is
5042 typically used when assembling files to be linked into a shared library.
5043 There are cases where it may make sense to use this in objects to be
5044 bound into an application itself so as to override a versioned symbol
5045 from a shared library.
5047 For ELF targets, the `.symver' directive can be used like this:
5048 .symver NAME, NAME2@NODENAME
5049 If the symbol NAME is defined within the file being assembled, the
5050 `.symver' directive effectively creates a symbol alias with the name
5051 NAME2@NODENAME, and in fact the main reason that we just don't try and
5052 create a regular alias is that the @ character isn't permitted in
5053 symbol names. The NAME2 part of the name is the actual name of the
5054 symbol by which it will be externally referenced. The name NAME itself
5055 is merely a name of convenience that is used so that it is possible to
5056 have definitions for multiple versions of a function within a single
5057 source file, and so that the compiler can unambiguously know which
5058 version of a function is being mentioned. The NODENAME portion of the
5059 alias should be the name of a node specified in the version script
5060 supplied to the linker when building a shared library. If you are
5061 attempting to override a versioned symbol from a shared library, then
5062 NODENAME should correspond to the nodename of the symbol you are trying
5065 If the symbol NAME is not defined within the file being assembled,
5066 all references to NAME will be changed to NAME2@NODENAME. If no
5067 reference to NAME is made, NAME2@NODENAME will be removed from the
5070 Another usage of the `.symver' directive is:
5071 .symver NAME, NAME2@@NODENAME
5072 In this case, the symbol NAME must exist and be defined within the
5073 file being assembled. It is similar to NAME2@NODENAME. The difference
5074 is NAME2@@NODENAME will also be used to resolve references to NAME2 by
5077 The third usage of the `.symver' directive is:
5078 .symver NAME, NAME2@@@NODENAME
5079 When NAME is not defined within the file being assembled, it is
5080 treated as NAME2@NODENAME. When NAME is defined within the file being
5081 assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME.
5084 File: as.info, Node: Tag, Next: Text, Prev: Symver, Up: Pseudo Ops
5086 7.110 `.tag STRUCTNAME'
5087 =======================
5089 This directive is generated by compilers to include auxiliary debugging
5090 information in the symbol table. It is only permitted inside
5091 `.def'/`.endef' pairs. Tags are used to link structure definitions in
5092 the symbol table with instances of those structures.
5095 File: as.info, Node: Text, Next: Title, Prev: Tag, Up: Pseudo Ops
5097 7.111 `.text SUBSECTION'
5098 ========================
5100 Tells `as' to assemble the following statements onto the end of the
5101 text subsection numbered SUBSECTION, which is an absolute expression.
5102 If SUBSECTION is omitted, subsection number zero is used.
5105 File: as.info, Node: Title, Next: Type, Prev: Text, Up: Pseudo Ops
5107 7.112 `.title "HEADING"'
5108 ========================
5110 Use HEADING as the title (second line, immediately after the source
5111 file name and pagenumber) when generating assembly listings.
5113 This directive affects subsequent pages, as well as the current page
5114 if it appears within ten lines of the top of a page.
5117 File: as.info, Node: Type, Next: Uleb128, Prev: Title, Up: Pseudo Ops
5122 This directive is used to set the type of a symbol.
5127 For COFF targets, this directive is permitted only within
5128 `.def'/`.endef' pairs. It is used like this:
5132 This records the integer INT as the type attribute of a symbol table
5138 For ELF targets, the `.type' directive is used like this:
5140 .type NAME , TYPE DESCRIPTION
5142 This sets the type of symbol NAME to be either a function symbol or
5143 an object symbol. There are five different syntaxes supported for the
5144 TYPE DESCRIPTION field, in order to provide compatibility with various
5147 Because some of the characters used in these syntaxes (such as `@'
5148 and `#') are comment characters for some architectures, some of the
5149 syntaxes below do not work on all architectures. The first variant
5150 will be accepted by the GNU assembler on all architectures so that
5151 variant should be used for maximum portability, if you do not need to
5152 assemble your code with other assemblers.
5154 The syntaxes supported are:
5156 .type <name> STT_<TYPE_IN_UPPER_CASE>
5157 .type <name>,#<type>
5158 .type <name>,@<type>
5159 .type <name>,%<type>
5160 .type <name>,"<type>"
5162 The types supported are:
5166 Mark the symbol as being a function name.
5169 `gnu_indirect_function'
5170 Mark the symbol as an indirect function when evaluated during reloc
5171 processing. (This is only supported on assemblers targeting GNU
5176 Mark the symbol as being a data object.
5180 Mark the symbol as being a thead-local data object.
5184 Mark the symbol as being a common data object.
5188 Does not mark the symbol in any way. It is supported just for
5192 Marks the symbol as being a globally unique data object. The
5193 dynamic linker will make sure that in the entire process there is
5194 just one symbol with this name and type in use. (This is only
5195 supported on assemblers targeting GNU systems).
5198 Note: Some targets support extra types in addition to those listed
5202 File: as.info, Node: Uleb128, Next: Val, Prev: Type, Up: Pseudo Ops
5204 7.114 `.uleb128 EXPRESSIONS'
5205 ============================
5207 ULEB128 stands for "unsigned little endian base 128." This is a
5208 compact, variable length representation of numbers used by the DWARF
5209 symbolic debugging format. *Note `.sleb128': Sleb128.
5212 File: as.info, Node: Val, Next: Version, Prev: Uleb128, Up: Pseudo Ops
5217 This directive, permitted only within `.def'/`.endef' pairs, records
5218 the address ADDR as the value attribute of a symbol table entry.
5221 File: as.info, Node: Version, Next: VTableEntry, Prev: Val, Up: Pseudo Ops
5223 7.116 `.version "STRING"'
5224 =========================
5226 This directive creates a `.note' section and places into it an ELF
5227 formatted note of type NT_VERSION. The note's name is set to `string'.
5230 File: as.info, Node: VTableEntry, Next: VTableInherit, Prev: Version, Up: Pseudo Ops
5232 7.117 `.vtable_entry TABLE, OFFSET'
5233 ===================================
5235 This directive finds or creates a symbol `table' and creates a
5236 `VTABLE_ENTRY' relocation for it with an addend of `offset'.
5239 File: as.info, Node: VTableInherit, Next: Warning, Prev: VTableEntry, Up: Pseudo Ops
5241 7.118 `.vtable_inherit CHILD, PARENT'
5242 =====================================
5244 This directive finds the symbol `child' and finds or creates the symbol
5245 `parent' and then creates a `VTABLE_INHERIT' relocation for the parent
5246 whose addend is the value of the child symbol. As a special case the
5247 parent name of `0' is treated as referring to the `*ABS*' section.
5250 File: as.info, Node: Warning, Next: Weak, Prev: VTableInherit, Up: Pseudo Ops
5252 7.119 `.warning "STRING"'
5253 =========================
5255 Similar to the directive `.error' (*note `.error "STRING"': Error.),
5256 but just emits a warning.
5259 File: as.info, Node: Weak, Next: Weakref, Prev: Warning, Up: Pseudo Ops
5264 This directive sets the weak attribute on the comma separated list of
5265 symbol `names'. If the symbols do not already exist, they will be
5268 On COFF targets other than PE, weak symbols are a GNU extension.
5269 This directive sets the weak attribute on the comma separated list of
5270 symbol `names'. If the symbols do not already exist, they will be
5273 On the PE target, weak symbols are supported natively as weak
5274 aliases. When a weak symbol is created that is not an alias, GAS
5275 creates an alternate symbol to hold the default value.
5278 File: as.info, Node: Weakref, Next: Word, Prev: Weak, Up: Pseudo Ops
5280 7.121 `.weakref ALIAS, TARGET'
5281 ==============================
5283 This directive creates an alias to the target symbol that enables the
5284 symbol to be referenced with weak-symbol semantics, but without
5285 actually making it weak. If direct references or definitions of the
5286 symbol are present, then the symbol will not be weak, but if all
5287 references to it are through weak references, the symbol will be marked
5288 as weak in the symbol table.
5290 The effect is equivalent to moving all references to the alias to a
5291 separate assembly source file, renaming the alias to the symbol in it,
5292 declaring the symbol as weak there, and running a reloadable link to
5293 merge the object files resulting from the assembly of the new source
5294 file and the old source file that had the references to the alias
5297 The alias itself never makes to the symbol table, and is entirely
5298 handled within the assembler.
5301 File: as.info, Node: Word, Next: Deprecated, Prev: Weakref, Up: Pseudo Ops
5303 7.122 `.word EXPRESSIONS'
5304 =========================
5306 This directive expects zero or more EXPRESSIONS, of any section,
5307 separated by commas.
5309 The size of the number emitted, and its byte order, depend on what
5310 target computer the assembly is for.
5312 _Warning: Special Treatment to support Compilers_
5314 Machines with a 32-bit address space, but that do less than 32-bit
5315 addressing, require the following special treatment. If the machine of
5316 interest to you does 32-bit addressing (or doesn't require it; *note
5317 Machine Dependencies::), you can ignore this issue.
5319 In order to assemble compiler output into something that works, `as'
5320 occasionally does strange things to `.word' directives. Directives of
5321 the form `.word sym1-sym2' are often emitted by compilers as part of
5322 jump tables. Therefore, when `as' assembles a directive of the form
5323 `.word sym1-sym2', and the difference between `sym1' and `sym2' does
5324 not fit in 16 bits, `as' creates a "secondary jump table", immediately
5325 before the next label. This secondary jump table is preceded by a
5326 short-jump to the first byte after the secondary table. This
5327 short-jump prevents the flow of control from accidentally falling into
5328 the new table. Inside the table is a long-jump to `sym2'. The
5329 original `.word' contains `sym1' minus the address of the long-jump to
5332 If there were several occurrences of `.word sym1-sym2' before the
5333 secondary jump table, all of them are adjusted. If there was a `.word
5334 sym3-sym4', that also did not fit in sixteen bits, a long-jump to
5335 `sym4' is included in the secondary jump table, and the `.word'
5336 directives are adjusted to contain `sym3' minus the address of the
5337 long-jump to `sym4'; and so on, for as many entries in the original
5338 jump table as necessary.
5341 File: as.info, Node: Deprecated, Prev: Word, Up: Pseudo Ops
5343 7.123 Deprecated Directives
5344 ===========================
5346 One day these directives won't work. They are included for
5347 compatibility with older assemblers.
5353 File: as.info, Node: Object Attributes, Next: Machine Dependencies, Prev: Pseudo Ops, Up: Top
5358 `as' assembles source files written for a specific architecture into
5359 object files for that architecture. But not all object files are alike.
5360 Many architectures support incompatible variations. For instance,
5361 floating point arguments might be passed in floating point registers if
5362 the object file requires hardware floating point support--or floating
5363 point arguments might be passed in integer registers if the object file
5364 supports processors with no hardware floating point unit. Or, if two
5365 objects are built for different generations of the same architecture,
5366 the combination may require the newer generation at run-time.
5368 This information is useful during and after linking. At link time,
5369 `ld' can warn about incompatible object files. After link time, tools
5370 like `gdb' can use it to process the linked file correctly.
5372 Compatibility information is recorded as a series of object
5373 attributes. Each attribute has a "vendor", "tag", and "value". The
5374 vendor is a string, and indicates who sets the meaning of the tag. The
5375 tag is an integer, and indicates what property the attribute describes.
5376 The value may be a string or an integer, and indicates how the
5377 property affects this object. Missing attributes are the same as
5378 attributes with a zero value or empty string value.
5380 Object attributes were developed as part of the ABI for the ARM
5381 Architecture. The file format is documented in `ELF for the ARM
5386 * GNU Object Attributes:: GNU Object Attributes
5387 * Defining New Object Attributes:: Defining New Object Attributes
5390 File: as.info, Node: GNU Object Attributes, Next: Defining New Object Attributes, Up: Object Attributes
5392 8.1 GNU Object Attributes
5393 =========================
5395 The `.gnu_attribute' directive records an object attribute with vendor
5398 Except for `Tag_compatibility', which has both an integer and a
5399 string for its value, GNU attributes have a string value if the tag
5400 number is odd and an integer value if the tag number is even. The
5401 second bit (`TAG & 2' is set for architecture-independent attributes
5402 and clear for architecture-dependent ones.
5404 8.1.1 Common GNU attributes
5405 ---------------------------
5407 These attributes are valid on all architectures.
5409 Tag_compatibility (32)
5410 The compatibility attribute takes an integer flag value and a
5411 vendor name. If the flag value is 0, the file is compatible with
5412 other toolchains. If it is 1, then the file is only compatible
5413 with the named toolchain. If it is greater than 1, the file can
5414 only be processed by other toolchains under some private
5415 arrangement indicated by the flag value and the vendor name.
5417 8.1.2 MIPS Attributes
5418 ---------------------
5420 Tag_GNU_MIPS_ABI_FP (4)
5421 The floating-point ABI used by this object file. The value will
5424 * 0 for files not affected by the floating-point ABI.
5426 * 1 for files using the hardware floating-point with a standard
5427 double-precision FPU.
5429 * 2 for files using the hardware floating-point ABI with a
5430 single-precision FPU.
5432 * 3 for files using the software floating-point ABI.
5434 * 4 for files using the hardware floating-point ABI with 64-bit
5435 wide double-precision floating-point registers and 32-bit
5436 wide general purpose registers.
5438 8.1.3 PowerPC Attributes
5439 ------------------------
5441 Tag_GNU_Power_ABI_FP (4)
5442 The floating-point ABI used by this object file. The value will
5445 * 0 for files not affected by the floating-point ABI.
5447 * 1 for files using double-precision hardware floating-point
5450 * 2 for files using the software floating-point ABI.
5452 * 3 for files using single-precision hardware floating-point
5455 Tag_GNU_Power_ABI_Vector (8)
5456 The vector ABI used by this object file. The value will be:
5458 * 0 for files not affected by the vector ABI.
5460 * 1 for files using general purpose registers to pass vectors.
5462 * 2 for files using AltiVec registers to pass vectors.
5464 * 3 for files using SPE registers to pass vectors.
5467 File: as.info, Node: Defining New Object Attributes, Prev: GNU Object Attributes, Up: Object Attributes
5469 8.2 Defining New Object Attributes
5470 ==================================
5472 If you want to define a new GNU object attribute, here are the places
5473 you will need to modify. New attributes should be discussed on the
5474 `binutils' mailing list.
5476 * This manual, which is the official register of attributes.
5478 * The header for your architecture `include/elf', to define the tag.
5480 * The `bfd' support file for your architecture, to merge the
5481 attribute and issue any appropriate link warnings.
5483 * Test cases in `ld/testsuite' for merging and link warnings.
5485 * `binutils/readelf.c' to display your attribute.
5487 * GCC, if you want the compiler to mark the attribute automatically.
5490 File: as.info, Node: Machine Dependencies, Next: Reporting Bugs, Prev: Object Attributes, Up: Top
5492 9 Machine Dependent Features
5493 ****************************
5495 The machine instruction sets are (almost by definition) different on
5496 each machine where `as' runs. Floating point representations vary as
5497 well, and `as' often supports a few additional directives or
5498 command-line options for compatibility with other assemblers on a
5499 particular platform. Finally, some versions of `as' support special
5500 pseudo-instructions for branch optimization.
5502 This chapter discusses most of these differences, though it does not
5503 include details on any machine's instruction set. For details on that
5504 subject, see the hardware manufacturer's manual.
5509 * Alpha-Dependent:: Alpha Dependent Features
5511 * ARC-Dependent:: ARC Dependent Features
5513 * ARM-Dependent:: ARM Dependent Features
5515 * AVR-Dependent:: AVR Dependent Features
5517 * Blackfin-Dependent:: Blackfin Dependent Features
5519 * CR16-Dependent:: CR16 Dependent Features
5521 * CRIS-Dependent:: CRIS Dependent Features
5523 * D10V-Dependent:: D10V Dependent Features
5525 * D30V-Dependent:: D30V Dependent Features
5527 * H8/300-Dependent:: Renesas H8/300 Dependent Features
5529 * HPPA-Dependent:: HPPA Dependent Features
5531 * ESA/390-Dependent:: IBM ESA/390 Dependent Features
5533 * i386-Dependent:: Intel 80386 and AMD x86-64 Dependent Features
5535 * i860-Dependent:: Intel 80860 Dependent Features
5537 * i960-Dependent:: Intel 80960 Dependent Features
5539 * IA-64-Dependent:: Intel IA-64 Dependent Features
5541 * IP2K-Dependent:: IP2K Dependent Features
5543 * LM32-Dependent:: LM32 Dependent Features
5545 * M32C-Dependent:: M32C Dependent Features
5547 * M32R-Dependent:: M32R Dependent Features
5549 * M68K-Dependent:: M680x0 Dependent Features
5551 * M68HC11-Dependent:: M68HC11 and 68HC12 Dependent Features
5553 * MicroBlaze-Dependent:: MICROBLAZE Dependent Features
5555 * MIPS-Dependent:: MIPS Dependent Features
5557 * MMIX-Dependent:: MMIX Dependent Features
5559 * MSP430-Dependent:: MSP430 Dependent Features
5561 * NS32K-Dependent:: NS32K Dependent Features
5563 * SH-Dependent:: Renesas / SuperH SH Dependent Features
5564 * SH64-Dependent:: SuperH SH64 Dependent Features
5566 * PDP-11-Dependent:: PDP-11 Dependent Features
5568 * PJ-Dependent:: picoJava Dependent Features
5570 * PPC-Dependent:: PowerPC Dependent Features
5572 * RX-Dependent:: RX Dependent Features
5574 * S/390-Dependent:: IBM S/390 Dependent Features
5576 * SCORE-Dependent:: SCORE Dependent Features
5578 * Sparc-Dependent:: SPARC Dependent Features
5580 * TIC54X-Dependent:: TI TMS320C54x Dependent Features
5582 * TIC6X-Dependent :: TI TMS320C6x Dependent Features
5584 * TILE-Gx-Dependent :: Tilera TILE-Gx Dependent Features
5586 * TILEPro-Dependent :: Tilera TILEPro Dependent Features
5588 * V850-Dependent:: V850 Dependent Features
5590 * XSTORMY16-Dependent:: XStormy16 Dependent Features
5592 * Xtensa-Dependent:: Xtensa Dependent Features
5594 * Z80-Dependent:: Z80 Dependent Features
5596 * Z8000-Dependent:: Z8000 Dependent Features
5598 * Vax-Dependent:: VAX Dependent Features
5601 File: as.info, Node: Alpha-Dependent, Next: ARC-Dependent, Up: Machine Dependencies
5603 9.1 Alpha Dependent Features
5604 ============================
5608 * Alpha Notes:: Notes
5609 * Alpha Options:: Options
5610 * Alpha Syntax:: Syntax
5611 * Alpha Floating Point:: Floating Point
5612 * Alpha Directives:: Alpha Machine Directives
5613 * Alpha Opcodes:: Opcodes
5616 File: as.info, Node: Alpha Notes, Next: Alpha Options, Up: Alpha-Dependent
5621 The documentation here is primarily for the ELF object format. `as'
5622 also supports the ECOFF and EVAX formats, but features specific to
5623 these formats are not yet documented.
5626 File: as.info, Node: Alpha Options, Next: Alpha Syntax, Prev: Alpha Notes, Up: Alpha-Dependent
5632 This option specifies the target processor. If an attempt is made
5633 to assemble an instruction which will not execute on the target
5634 processor, the assembler may either expand the instruction as a
5635 macro or issue an error message. This option is equivalent to the
5638 The following processor names are recognized: `21064', `21064a',
5639 `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a',
5640 `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6',
5641 `ev67', `ev68'. The special name `all' may be used to allow the
5642 assembler to accept instructions valid for any Alpha processor.
5644 In order to support existing practice in OSF/1 with respect to
5645 `.arch', and existing practice within `MILO' (the Linux ARC
5646 bootloader), the numbered processor names (e.g. 21064) enable the
5647 processor-specific PALcode instructions, while the
5648 "electro-vlasic" names (e.g. `ev4') do not.
5652 Enables or disables the generation of `.mdebug' encapsulation for
5653 stabs directives and procedure descriptors. The default is to
5654 automatically enable `.mdebug' when the first stabs directive is
5658 This option forces all relocations to be put into the object file,
5659 instead of saving space and resolving some relocations at assembly
5660 time. Note that this option does not propagate all symbol
5661 arithmetic into the object file, because not all symbol arithmetic
5662 can be represented. However, the option can still be useful in
5663 specific applications.
5667 Enables or disables the optimization of procedure calls, both at
5668 assemblage and at link time. These options are only available for
5669 VMS targets and `-replace' is the default. See section 1.4.1 of
5670 the OpenVMS Linker Utility Manual.
5673 This option is used when the compiler generates debug information.
5674 When `gcc' is using `mips-tfile' to generate debug information
5675 for ECOFF, local labels must be passed through to the object file.
5676 Otherwise this option has no effect.
5679 A local common symbol larger than SIZE is placed in `.bss', while
5680 smaller symbols are placed in `.sbss'.
5684 These options are ignored for backward compatibility.
5687 File: as.info, Node: Alpha Syntax, Next: Alpha Floating Point, Prev: Alpha Options, Up: Alpha-Dependent
5692 The assembler syntax closely follow the Alpha Reference Manual;
5693 assembler directives and general syntax closely follow the OSF/1 and
5694 OpenVMS syntax, with a few differences for ELF.
5698 * Alpha-Chars:: Special Characters
5699 * Alpha-Regs:: Register Names
5700 * Alpha-Relocs:: Relocations
5703 File: as.info, Node: Alpha-Chars, Next: Alpha-Regs, Up: Alpha Syntax
5705 9.1.3.1 Special Characters
5706 ..........................
5708 `#' is the line comment character. Note that if `#' is the first
5709 character on a line then it can also be a logical line number directive
5710 (*note Comments::) or a preprocessor control command (*note
5713 `;' can be used instead of a newline to separate statements.
5716 File: as.info, Node: Alpha-Regs, Next: Alpha-Relocs, Prev: Alpha-Chars, Up: Alpha Syntax
5718 9.1.3.2 Register Names
5719 ......................
5721 The 32 integer registers are referred to as `$N' or `$rN'. In
5722 addition, registers 15, 28, 29, and 30 may be referred to by the
5723 symbols `$fp', `$at', `$gp', and `$sp' respectively.
5725 The 32 floating-point registers are referred to as `$fN'.
5728 File: as.info, Node: Alpha-Relocs, Prev: Alpha-Regs, Up: Alpha Syntax
5733 Some of these relocations are available for ECOFF, but mostly only for
5734 ELF. They are modeled after the relocation format introduced in
5735 Digital Unix 4.0, but there are additions.
5737 The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the
5738 relocation. In some cases NUMBER is used to relate specific
5741 The relocation is placed at the end of the instruction like so:
5743 ldah $0,a($29) !gprelhigh
5744 lda $0,a($0) !gprellow
5745 ldq $1,b($29) !literal!100
5746 ldl $2,0($1) !lituse_base!100
5750 Used with an `ldq' instruction to load the address of a symbol
5753 A sequence number N is optional, and if present is used to pair
5754 `lituse' relocations with this `literal' relocation. The `lituse'
5755 relocations are used by the linker to optimize the code based on
5756 the final location of the symbol.
5758 Note that these optimizations are dependent on the data flow of the
5759 program. Therefore, if _any_ `lituse' is paired with a `literal'
5760 relocation, then _all_ uses of the register set by the `literal'
5761 instruction must also be marked with `lituse' relocations. This
5762 is because the original `literal' instruction may be deleted or
5763 transformed into another instruction.
5765 Also note that there may be a one-to-many relationship between
5766 `literal' and `lituse', but not a many-to-one. That is, if there
5767 are two code paths that load up the same address and feed the
5768 value to a single use, then the use may not use a `lituse'
5772 Used with any memory format instruction (e.g. `ldl') to indicate
5773 that the literal is used for an address load. The offset field of
5774 the instruction must be zero. During relaxation, the code may be
5775 altered to use a gp-relative load.
5778 Used with a register branch format instruction (e.g. `jsr') to
5779 indicate that the literal is used for a call. During relaxation,
5780 the code may be altered to use a direct branch (e.g. `bsr').
5782 `!lituse_jsrdirect!N'
5783 Similar to `lituse_jsr', but also that this call cannot be vectored
5784 through a PLT entry. This is useful for functions with special
5785 calling conventions which do not allow the normal call-clobbered
5786 registers to be clobbered.
5789 Used with a byte mask instruction (e.g. `extbl') to indicate that
5790 only the low 3 bits of the address are relevant. During
5791 relaxation, the code may be altered to use an immediate instead of
5795 Used with any other instruction to indicate that the original
5796 address is in fact used, and the original `ldq' instruction may
5797 not be altered or deleted. This is useful in conjunction with
5798 `lituse_jsr' to test whether a weak symbol is defined.
5800 ldq $27,foo($29) !literal!1
5801 beq $27,is_undef !lituse_addr!1
5802 jsr $26,($27),foo !lituse_jsr!1
5805 Used with a register branch format instruction to indicate that the
5806 literal is the call to `__tls_get_addr' used to compute the
5807 address of the thread-local storage variable whose descriptor was
5808 loaded with `!tlsgd!N'.
5811 Used with a register branch format instruction to indicate that the
5812 literal is the call to `__tls_get_addr' used to compute the
5813 address of the base of the thread-local storage block for the
5814 current module. The descriptor for the module must have been
5815 loaded with `!tlsldm!N'.
5818 Used with `ldah' and `lda' to load the GP from the current
5819 address, a-la the `ldgp' macro. The source register for the
5820 `ldah' instruction must contain the address of the `ldah'
5821 instruction. There must be exactly one `lda' instruction paired
5822 with the `ldah' instruction, though it may appear anywhere in the
5823 instruction stream. The immediate operands must be zero.
5826 ldah $29,0($26) !gpdisp!1
5827 lda $29,0($29) !gpdisp!1
5830 Used with an `ldah' instruction to add the high 16 bits of a
5831 32-bit displacement from the GP.
5834 Used with any memory format instruction to add the low 16 bits of a
5835 32-bit displacement from the GP.
5838 Used with any memory format instruction to add a 16-bit
5839 displacement from the GP.
5842 Used with any branch format instruction to skip the GP load at the
5843 target address. The referenced symbol must have the same GP as the
5844 source object file, and it must be declared to either not use `$27'
5845 or perform a standard GP load in the first two instructions via the
5846 `.prologue' directive.
5850 Used with an `lda' instruction to load the address of a TLS
5851 descriptor for a symbol in the GOT.
5853 The sequence number N is optional, and if present it used to pair
5854 the descriptor load with both the `literal' loading the address of
5855 the `__tls_get_addr' function and the `lituse_tlsgd' marking the
5856 call to that function.
5858 For proper relaxation, both the `tlsgd', `literal' and `lituse'
5859 relocations must be in the same extended basic block. That is,
5860 the relocation with the lowest address must be executed first at
5865 Used with an `lda' instruction to load the address of a TLS
5866 descriptor for the current module in the GOT.
5868 Similar in other respects to `tlsgd'.
5871 Used with an `ldq' instruction to load the offset of the TLS
5872 symbol within its module's thread-local storage block. Also known
5873 as the dynamic thread pointer offset or dtp-relative offset.
5878 Like `gprel' relocations except they compute dtp-relative offsets.
5881 Used with an `ldq' instruction to load the offset of the TLS
5882 symbol from the thread pointer. Also known as the tp-relative
5888 Like `gprel' relocations except they compute tp-relative offsets.
5891 File: as.info, Node: Alpha Floating Point, Next: Alpha Directives, Prev: Alpha Syntax, Up: Alpha-Dependent
5893 9.1.4 Floating Point
5894 --------------------
5896 The Alpha family uses both IEEE and VAX floating-point numbers.
5899 File: as.info, Node: Alpha Directives, Next: Alpha Opcodes, Prev: Alpha Floating Point, Up: Alpha-Dependent
5901 9.1.5 Alpha Assembler Directives
5902 --------------------------------
5904 `as' for the Alpha supports many additional directives for
5905 compatibility with the native assembler. This section describes them
5908 These are the additional directives in `as' for the Alpha:
5911 Specifies the target processor. This is equivalent to the `-mCPU'
5912 command-line option. *Note Options: Alpha Options, for a list of
5915 `.ent FUNCTION[, N]'
5916 Mark the beginning of FUNCTION. An optional number may follow for
5917 compatibility with the OSF/1 assembler, but is ignored. When
5918 generating `.mdebug' information, this will create a procedure
5919 descriptor for the function. In ELF, it will mark the symbol as a
5920 function a-la the generic `.type' directive.
5923 Mark the end of FUNCTION. In ELF, it will set the size of the
5924 symbol a-la the generic `.size' directive.
5926 `.mask MASK, OFFSET'
5927 Indicate which of the integer registers are saved in the current
5928 function's stack frame. MASK is interpreted a bit mask in which
5929 bit N set indicates that register N is saved. The registers are
5930 saved in a block located OFFSET bytes from the "canonical frame
5931 address" (CFA) which is the value of the stack pointer on entry to
5932 the function. The registers are saved sequentially, except that
5933 the return address register (normally `$26') is saved first.
5935 This and the other directives that describe the stack frame are
5936 currently only used when generating `.mdebug' information. They
5937 may in the future be used to generate DWARF2 `.debug_frame' unwind
5938 information for hand written assembly.
5940 `.fmask MASK, OFFSET'
5941 Indicate which of the floating-point registers are saved in the
5942 current stack frame. The MASK and OFFSET parameters are
5943 interpreted as with `.mask'.
5945 `.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]'
5946 Describes the shape of the stack frame. The frame pointer in use
5947 is FRAMEREG; normally this is either `$fp' or `$sp'. The frame
5948 pointer is FRAMEOFFSET bytes below the CFA. The return address is
5949 initially located in RETREG until it is saved as indicated in
5950 `.mask'. For compatibility with OSF/1 an optional ARGOFFSET
5951 parameter is accepted and ignored. It is believed to indicate the
5952 offset from the CFA to the saved argument registers.
5955 Indicate that the stack frame is set up and all registers have been
5956 spilled. The argument N indicates whether and how the function
5957 uses the incoming "procedure vector" (the address of the called
5958 function) in `$27'. 0 indicates that `$27' is not used; 1
5959 indicates that the first two instructions of the function use `$27'
5960 to perform a load of the GP register; 2 indicates that `$27' is
5961 used in some non-standard way and so the linker cannot elide the
5962 load of the procedure vector during relaxation.
5964 `.usepv FUNCTION, WHICH'
5965 Used to indicate the use of the `$27' register, similar to
5966 `.prologue', but without the other semantics of needing to be
5967 inside an open `.ent'/`.end' block.
5969 The WHICH argument should be either `no', indicating that `$27' is
5970 not used, or `std', indicating that the first two instructions of
5971 the function perform a GP load.
5973 One might use this directive instead of `.prologue' if you are
5974 also using dwarf2 CFI directives.
5976 `.gprel32 EXPRESSION'
5977 Computes the difference between the address in EXPRESSION and the
5978 GP for the current object file, and stores it in 4 bytes. In
5979 addition to being smaller than a full 8 byte address, this also
5980 does not require a dynamic relocation when used in a shared
5983 `.t_floating EXPRESSION'
5984 Stores EXPRESSION as an IEEE double precision value.
5986 `.s_floating EXPRESSION'
5987 Stores EXPRESSION as an IEEE single precision value.
5989 `.f_floating EXPRESSION'
5990 Stores EXPRESSION as a VAX F format value.
5992 `.g_floating EXPRESSION'
5993 Stores EXPRESSION as a VAX G format value.
5995 `.d_floating EXPRESSION'
5996 Stores EXPRESSION as a VAX D format value.
5999 Enables or disables various assembler features. Using the positive
6000 name of the feature enables while using `noFEATURE' disables.
6003 Indicates that macro expansions may clobber the "assembler
6004 temporary" (`$at' or `$28') register. Some macros may not be
6005 expanded without this and will generate an error message if
6006 `noat' is in effect. When `at' is in effect, a warning will
6007 be generated if `$at' is used by the programmer.
6010 Enables the expansion of macro instructions. Note that
6011 variants of real instructions, such as `br label' vs `br
6012 $31,label' are considered alternate forms and not macros.
6017 These control whether and how the assembler may re-order
6018 instructions. Accepted for compatibility with the OSF/1
6019 assembler, but `as' does not do instruction scheduling, so
6020 these features are ignored.
6022 The following directives are recognized for compatibility with the
6023 OSF/1 assembler but are ignored.
6032 File: as.info, Node: Alpha Opcodes, Prev: Alpha Directives, Up: Alpha-Dependent
6037 For detailed information on the Alpha machine instruction set, see the
6038 Alpha Architecture Handbook
6039 (ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf).
6042 File: as.info, Node: ARC-Dependent, Next: ARM-Dependent, Prev: Alpha-Dependent, Up: Machine Dependencies
6044 9.2 ARC Dependent Features
6045 ==========================
6049 * ARC Options:: Options
6050 * ARC Syntax:: Syntax
6051 * ARC Floating Point:: Floating Point
6052 * ARC Directives:: ARC Machine Directives
6053 * ARC Opcodes:: Opcodes
6056 File: as.info, Node: ARC Options, Next: ARC Syntax, Up: ARC-Dependent
6062 This option selects the core processor variant. Using `-marc' is
6063 the same as `-marc6', which is also the default.
6066 Base instruction set.
6069 Jump-and-link (jl) instruction. No requirement of an
6070 instruction between setting flags and conditional jump. For
6077 Break (brk) and sleep (sleep) instructions.
6080 Software interrupt (swi) instruction.
6083 Note: the `.option' directive can to be used to select a core
6084 variant from within assembly code.
6087 This option specifies that the output generated by the assembler
6088 should be marked as being encoded for a big-endian processor.
6091 This option specifies that the output generated by the assembler
6092 should be marked as being encoded for a little-endian processor -
6093 this is the default.
6097 File: as.info, Node: ARC Syntax, Next: ARC Floating Point, Prev: ARC Options, Up: ARC-Dependent
6104 * ARC-Chars:: Special Characters
6105 * ARC-Regs:: Register Names
6108 File: as.info, Node: ARC-Chars, Next: ARC-Regs, Up: ARC Syntax
6110 9.2.2.1 Special Characters
6111 ..........................
6113 The presence of a `#' on a line indicates the start of a comment that
6114 extends to the end of the current line. Note that if a line starts
6115 with a `#' character then it can also be a logical line number
6116 directive (*note Comments::) or a preprocessor control command (*note
6119 The ARC assembler does not support a line separator character.
6122 File: as.info, Node: ARC-Regs, Prev: ARC-Chars, Up: ARC Syntax
6124 9.2.2.2 Register Names
6125 ......................
6130 File: as.info, Node: ARC Floating Point, Next: ARC Directives, Prev: ARC Syntax, Up: ARC-Dependent
6132 9.2.3 Floating Point
6133 --------------------
6135 The ARC core does not currently have hardware floating point support.
6136 Software floating point support is provided by `GCC' and uses IEEE
6137 floating-point numbers.
6140 File: as.info, Node: ARC Directives, Next: ARC Opcodes, Prev: ARC Floating Point, Up: ARC-Dependent
6142 9.2.4 ARC Machine Directives
6143 ----------------------------
6145 The ARC version of `as' supports the following additional machine
6148 `.2byte EXPRESSIONS'
6151 `.3byte EXPRESSIONS'
6154 `.4byte EXPRESSIONS'
6157 `.extAuxRegister NAME,ADDRESS,MODE'
6158 The ARCtangent A4 has extensible auxiliary register space. The
6159 auxiliary registers can be defined in the assembler source code by
6160 using this directive. The first parameter is the NAME of the new
6161 auxiallry register. The second parameter is the ADDRESS of the
6162 register in the auxiliary register memory map for the variant of
6163 the ARC. The third parameter specifies the MODE in which the
6164 register can be operated is and it can be one of:
6170 `r|w (read or write)'
6174 .extAuxRegister mulhi,0x12,w
6176 This specifies an extension auxiliary register called _mulhi_
6177 which is at address 0x12 in the memory space and which is only
6180 `.extCondCode SUFFIX,VALUE'
6181 The condition codes on the ARCtangent A4 are extensible and can be
6182 specified by means of this assembler directive. They are specified
6183 by the suffix and the value for the condition code. They can be
6184 used to specify extra condition codes with any values. For
6187 .extCondCode is_busy,0x14
6189 add.is_busy r1,r2,r3
6192 `.extCoreRegister NAME,REGNUM,MODE,SHORTCUT'
6193 Specifies an extension core register NAME for the application.
6194 This allows a register NAME with a valid REGNUM between 0 and 60,
6195 with the following as valid values for MODE
6201 `_r|w_ (read or write)'
6203 The other parameter gives a description of the register having a
6204 SHORTCUT in the pipeline. The valid values are:
6212 .extCoreRegister mlo,57,r,can_shortcut
6214 This defines an extension core register mlo with the value 57 which
6215 can shortcut the pipeline.
6217 `.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS'
6218 The ARCtangent A4 allows the user to specify extension
6219 instructions. The extension instructions are not macros. The
6220 assembler creates encodings for use of these instructions
6221 according to the specification by the user. The parameters are:
6224 Name of the extension instruction
6227 Opcode to be used. (Bits 27:31 in the encoding). Valid values
6231 Subopcode to be used. Valid values are from 0x09-0x3f.
6232 However the correct value also depends on SYNTAXCLASS
6235 Determines the kinds of suffixes to be allowed. Valid values
6236 are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG' which
6237 indicates the absence or presence of conditional suffixes and
6238 flag setting by the extension instruction. It is also
6239 possible to specify that an instruction sets the flags and is
6240 conditional by using `SUFFIX_CODE' | `SUFFIX_FLAG'.
6243 Determines the syntax class for the instruction. It can have
6244 the following values:
6247 2 Operand Instruction
6250 3 Operand Instruction
6252 In addition there could be modifiers for the syntax class as
6255 Syntax Class Modifiers are:
6257 - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP,
6258 specifying that the first operand of a three-operand
6259 instruction must be an immediate (i.e., the result is
6260 discarded). OP1_MUST_BE_IMM is used by bitwise ORing it
6261 with SYNTAX_3OP as given in the example below. This
6262 could usually be used to set the flags using specific
6263 instructions and not retain results.
6265 - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it
6266 specifies that there is an implied immediate destination
6267 operand which does not appear in the syntax. For
6268 example, if the source code contains an instruction like:
6272 it really means that the first argument is an implied
6273 immediate (that is, the result is discarded). This is
6274 the same as though the source code were: inst 0,r1,r2.
6275 You use OP1_IMM_IMPLIED by bitwise ORing it with
6279 For example, defining 64-bit multiplier with immediate operands:
6281 .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
6282 SYNTAX_3OP|OP1_MUST_BE_IMM
6284 The above specifies an extension instruction called mp64 which has
6285 3 operands, sets the flags, can be used with a condition code, for
6286 which the first operand is an immediate. (Equivalent to
6287 discarding the result of the operation).
6289 .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
6291 This describes a 2 operand instruction with an implicit first
6292 immediate operand. The result of this operation would be
6301 `.option ARC|ARC5|ARC6|ARC7|ARC8'
6302 The `.option' directive must be followed by the desired core
6303 version. Again `arc' is an alias for `arc6'.
6305 Note: the `.option' directive overrides the command line option
6306 `-marc'; a warning is emitted when the version is not consistent
6307 between the two - even for the implicit default core version
6310 `.short EXPRESSIONS'
6318 File: as.info, Node: ARC Opcodes, Prev: ARC Directives, Up: ARC-Dependent
6323 For information on the ARC instruction set, see `ARC Programmers
6324 Reference Manual', ARC International (www.arc.com)
6327 File: as.info, Node: ARM-Dependent, Next: AVR-Dependent, Prev: ARC-Dependent, Up: Machine Dependencies
6329 9.3 ARM Dependent Features
6330 ==========================
6334 * ARM Options:: Options
6335 * ARM Syntax:: Syntax
6336 * ARM Floating Point:: Floating Point
6337 * ARM Directives:: ARM Machine Directives
6338 * ARM Opcodes:: Opcodes
6339 * ARM Mapping Symbols:: Mapping Symbols
6340 * ARM Unwinding Tutorial:: Unwinding
6343 File: as.info, Node: ARM Options, Next: ARM Syntax, Up: ARM-Dependent
6348 `-mcpu=PROCESSOR[+EXTENSION...]'
6349 This option specifies the target processor. The assembler will
6350 issue an error message if an attempt is made to assemble an
6351 instruction which will not execute on the target processor. The
6352 following processor names are recognized: `arm1', `arm2', `arm250',
6353 `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
6354 `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
6355 `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t',
6356 `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi',
6357 `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1',
6358 `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920',
6359 `arm920t', `arm922t', `arm940t', `arm9tdmi', `fa526' (Faraday
6360 FA526 processor), `fa626' (Faraday FA626 processor), `arm9e',
6361 `arm926e', `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s',
6362 `arm966e-r0', `arm966e', `arm966e-s', `arm968e-s', `arm10t',
6363 `arm10tdmi', `arm10e', `arm1020', `arm1020t', `arm1020e',
6364 `arm1022e', `arm1026ej-s', `fa606te' (Faraday FA606TE processor),
6365 `fa616te' (Faraday FA616TE processor), `fa626te' (Faraday FA626TE
6366 processor), `fmp626' (Faraday FMP626 processor), `fa726te'
6367 (Faraday FA726TE processor), `arm1136j-s', `arm1136jf-s',
6368 `arm1156t2-s', `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s',
6369 `mpcore', `mpcorenovfp', `cortex-a5', `cortex-a7', `cortex-a8',
6370 `cortex-a9', `cortex-a15', `cortex-r4', `cortex-r4f', `cortex-m4',
6371 `cortex-m3', `cortex-m1', `cortex-m0', `ep9312' (ARM920 with
6372 Cirrus Maverick coprocessor), `i80200' (Intel XScale processor)
6373 `iwmmxt' (Intel(r) XScale processor with Wireless MMX(tm)
6374 technology coprocessor) and `xscale'. The special name `all' may
6375 be used to allow the assembler to accept instructions valid for
6378 In addition to the basic instruction set, the assembler can be
6379 told to accept various extension mnemonics that extend the
6380 processor using the co-processor instruction space. For example,
6381 `-mcpu=arm920+maverick' is equivalent to specifying `-mcpu=ep9312'.
6383 Multiple extensions may be specified, separated by a `+'. The
6384 extensions should be specified in ascending alphabetical order.
6386 Some extensions may be restricted to particular architectures;
6387 this is documented in the list of extensions below.
6389 Extension mnemonics may also be removed from those the assembler
6390 accepts. This is done be prepending `no' to the option that adds
6391 the extension. Extensions that are removed should be listed after
6392 all extensions which have been added, again in ascending
6393 alphabetical order. For example, `-mcpu=ep9312+nomaverick' is
6394 equivalent to specifying `-mcpu=arm920'.
6396 The following extensions are currently supported: `idiv', (Integer
6397 Divide Extensions for v7-A and v7-R architectures), `iwmmxt',
6398 `iwmmxt2', `maverick', `mp' (Multiprocessing Extensions for v7-A
6399 and v7-R architectures), `os' (Operating System for v6M
6400 architecture), `sec' (Security Extensions for v6K and v7-A
6401 architectures), `virt' (Virtualization Extensions for v7-A
6402 architecture, implies `idiv'), and `xscale'.
6404 `-march=ARCHITECTURE[+EXTENSION...]'
6405 This option specifies the target architecture. The assembler will
6406 issue an error message if an attempt is made to assemble an
6407 instruction which will not execute on the target architecture.
6408 The following architecture names are recognized: `armv1', `armv2',
6409 `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm',
6410 `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te',
6411 `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk',
6412 `armv6-m', `armv6s-m', `armv7', `armv7-a', `armv7-r', `armv7-m',
6413 `armv7e-m', `iwmmxt' and `xscale'. If both `-mcpu' and `-march'
6414 are specified, the assembler will use the setting for `-mcpu'.
6416 The architecture option can be extended with the same instruction
6417 set extension options as the `-mcpu' option.
6419 `-mfpu=FLOATING-POINT-FORMAT'
6420 This option specifies the floating point format to assemble for.
6421 The assembler will issue an error message if an attempt is made to
6422 assemble an instruction which will not execute on the target
6423 floating point unit. The following format options are recognized:
6424 `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11',
6425 `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0',
6426 `vfp9', `vfpxd', `vfpv2', `vfpv3', `vfpv3-fp16', `vfpv3-d16',
6427 `vfpv3-d16-fp16', `vfpv3xd', `vfpv3xd-d16', `vfpv4', `vfpv4-d16',
6428 `fpv4-sp-d16', `arm1020t', `arm1020e', `arm1136jf-s', `maverick',
6429 `neon', and `neon-vfpv4'.
6431 In addition to determining which instructions are assembled, this
6432 option also affects the way in which the `.double' assembler
6433 directive behaves when assembling little-endian code.
6435 The default is dependent on the processor selected. For
6436 Architecture 5 or later, the default is to assembler for VFP
6437 instructions; for earlier architectures the default is to assemble
6438 for FPA instructions.
6441 This option specifies that the assembler should start assembling
6442 Thumb instructions; that is, it should behave as though the file
6443 starts with a `.code 16' directive.
6446 This option specifies that the output generated by the assembler
6447 should be marked as supporting interworking.
6449 `-mimplicit-it=never'
6450 `-mimplicit-it=always'
6452 `-mimplicit-it=thumb'
6453 The `-mimplicit-it' option controls the behavior of the assembler
6454 when conditional instructions are not enclosed in IT blocks.
6455 There are four possible behaviors. If `never' is specified, such
6456 constructs cause a warning in ARM code and an error in Thumb-2
6457 code. If `always' is specified, such constructs are accepted in
6458 both ARM and Thumb-2 code, where the IT instruction is added
6459 implicitly. If `arm' is specified, such constructs are accepted
6460 in ARM code and cause an error in Thumb-2 code. If `thumb' is
6461 specified, such constructs cause a warning in ARM code and are
6462 accepted in Thumb-2 code. If you omit this option, the behavior
6463 is equivalent to `-mimplicit-it=arm'.
6467 These options specify that the output generated by the assembler
6468 should be marked as supporting the indicated version of the Arm
6469 Procedure. Calling Standard.
6472 This option specifies that the output generated by the assembler
6473 should be marked as supporting the Arm/Thumb Procedure Calling
6474 Standard. If enabled this option will cause the assembler to
6475 create an empty debugging section in the object file called
6476 .arm.atpcs. Debuggers can use this to determine the ABI being
6480 This indicates the floating point variant of the APCS should be
6481 used. In this variant floating point arguments are passed in FP
6482 registers rather than integer registers.
6485 This indicates that the reentrant variant of the APCS should be
6486 used. This variant supports position independent code.
6489 This option specifies that the output generated by the assembler
6490 should be marked as using specified floating point ABI. The
6491 following values are recognized: `soft', `softfp' and `hard'.
6494 This option specifies which EABI version the produced object files
6495 should conform to. The following values are recognized: `gnu', `4'
6499 This option specifies that the output generated by the assembler
6500 should be marked as being encoded for a big-endian processor.
6503 This option specifies that the output generated by the assembler
6504 should be marked as being encoded for a little-endian processor.
6507 This option specifies that the output of the assembler should be
6508 marked as position-independent code (PIC).
6511 Allow `BX' instructions in ARMv4 code. This is intended for use
6512 with the linker option of the same name.
6515 `-mno-warn-deprecated'
6516 Enable or disable warnings about using deprecated options or
6517 features. The default is to warn.
6521 File: as.info, Node: ARM Syntax, Next: ARM Floating Point, Prev: ARM Options, Up: ARM-Dependent
6528 * ARM-Instruction-Set:: Instruction Set
6529 * ARM-Chars:: Special Characters
6530 * ARM-Regs:: Register Names
6531 * ARM-Relocations:: Relocations
6532 * ARM-Neon-Alignment:: NEON Alignment Specifiers
6535 File: as.info, Node: ARM-Instruction-Set, Next: ARM-Chars, Up: ARM Syntax
6537 9.3.2.1 Instruction Set Syntax
6538 ..............................
6540 Two slightly different syntaxes are support for ARM and THUMB
6541 instructions. The default, `divided', uses the old style where ARM and
6542 THUMB instructions had their own, separate syntaxes. The new,
6543 `unified' syntax, which can be selected via the `.syntax' directive,
6544 and has the following main features:
6547 Immediate operands do not require a `#' prefix.
6550 The `IT' instruction may appear, and if it does it is validated
6551 against subsequent conditional affixes. In ARM mode it does not
6552 generate machine code, in THUMB mode it does.
6555 For ARM instructions the conditional affixes always appear at the
6556 end of the instruction. For THUMB instructions conditional
6557 affixes can be used, but only inside the scope of an `IT'
6561 All of the instructions new to the V6T2 architecture (and later)
6562 are available. (Only a few such instructions can be written in the
6566 The `.N' and `.W' suffixes are recognized and honored.
6569 All instructions set the flags if and only if they have an `s'
6573 File: as.info, Node: ARM-Chars, Next: ARM-Regs, Prev: ARM-Instruction-Set, Up: ARM Syntax
6575 9.3.2.2 Special Characters
6576 ..........................
6578 The presence of a `@' anywhere on a line indicates the start of a
6579 comment that extends to the end of that line.
6581 If a `#' appears as the first character of a line then the whole
6582 line is treated as a comment, but in this case the line could also be a
6583 logical line number directive (*note Comments::) or a preprocessor
6584 control command (*note Preprocessing::).
6586 The `;' character can be used instead of a newline to separate
6589 Either `#' or `$' can be used to indicate immediate operands.
6591 *TODO* Explain about /data modifier on symbols.
6594 File: as.info, Node: ARM-Regs, Next: ARM-Relocations, Prev: ARM-Chars, Up: ARM Syntax
6596 9.3.2.3 Register Names
6597 ......................
6599 *TODO* Explain about ARM register naming, and the predefined names.
6602 File: as.info, Node: ARM-Neon-Alignment, Prev: ARM-Relocations, Up: ARM Syntax
6604 9.3.2.4 NEON Alignment Specifiers
6605 .................................
6607 Some NEON load/store instructions allow an optional address alignment
6608 qualifier. The ARM documentation specifies that this is indicated by
6609 `@ ALIGN'. However GAS already interprets the `@' character as a "line
6610 comment" start, so `: ALIGN' is used instead. For example:
6612 vld1.8 {q0}, [r0, :128]
6615 File: as.info, Node: ARM Floating Point, Next: ARM Directives, Prev: ARM Syntax, Up: ARM-Dependent
6617 9.3.3 Floating Point
6618 --------------------
6620 The ARM family uses IEEE floating-point numbers.
6623 File: as.info, Node: ARM-Relocations, Next: ARM-Neon-Alignment, Prev: ARM-Regs, Up: ARM Syntax
6625 9.3.3.1 ARM relocation generation
6626 .................................
6628 Specific data relocations can be generated by putting the relocation
6629 name in parentheses after the symbol name. For example:
6633 This will generate an `R_ARM_TARGET1' relocation against the symbol
6634 FOO. The following relocations are supported: `GOT', `GOTOFF',
6635 `TARGET1', `TARGET2', `SBREL', `TLSGD', `TLSLDM', `TLSLDO', `TLSDESC',
6636 `TLSCALL', `GOTTPOFF', `GOT_PREL' and `TPOFF'.
6638 For compatibility with older toolchains the assembler also accepts
6639 `(PLT)' after branch targets. This will generate the deprecated
6640 `R_ARM_PLT32' relocation.
6642 Relocations for `MOVW' and `MOVT' instructions can be generated by
6643 prefixing the value with `#:lower16:' and `#:upper16' respectively.
6644 For example to load the 32-bit address of foo into r0:
6646 MOVW r0, #:lower16:foo
6647 MOVT r0, #:upper16:foo
6650 File: as.info, Node: ARM Directives, Next: ARM Opcodes, Prev: ARM Floating Point, Up: ARM-Dependent
6652 9.3.4 ARM Machine Directives
6653 ----------------------------
6655 `.2byte EXPRESSION [, EXPRESSION]*'
6656 `.4byte EXPRESSION [, EXPRESSION]*'
6657 `.8byte EXPRESSION [, EXPRESSION]*'
6658 These directives write 2, 4 or 8 byte values to the output section.
6660 `.align EXPRESSION [, EXPRESSION]'
6661 This is the generic .ALIGN directive. For the ARM however if the
6662 first argument is zero (ie no alignment is needed) the assembler
6663 will behave as if the argument had been 2 (ie pad to the next four
6664 byte boundary). This is for compatibility with ARM's own
6668 Select the target architecture. Valid values for NAME are the
6669 same as for the `-march' commandline option.
6671 Specifying `.arch' clears any previously selected architecture
6674 `.arch_extension NAME'
6675 Add or remove an architecture extension to the target
6676 architecture. Valid values for NAME are the same as those
6677 accepted as architectural extensions by the `-mcpu' commandline
6680 `.arch_extension' may be used multiple times to add or remove
6681 extensions incrementally to the architecture being compiled for.
6684 This performs the same action as .CODE 32.
6687 Generate unwinder annotations for a stack adjustment of COUNT
6688 bytes. A positive value indicates the function prologue allocated
6689 stack space by decrementing the stack pointer.
6692 This directive switches to the `.bss' section.
6695 Prevents unwinding through the current function. No personality
6696 routine or exception table data is required or permitted.
6699 This directive selects the instruction set being generated. The
6700 value 16 selects Thumb, with the value 32 selecting ARM.
6703 Select the target processor. Valid values for NAME are the same as
6704 for the `-mcpu' commandline option.
6706 Specifying `.cpu' clears any previously selected architecture
6709 `NAME .dn REGISTER NAME [.TYPE] [[INDEX]]'
6710 `NAME .qn REGISTER NAME [.TYPE] [[INDEX]]'
6711 The `dn' and `qn' directives are used to create typed and/or
6712 indexed register aliases for use in Advanced SIMD Extension (Neon)
6713 instructions. The former should be used to create aliases of
6714 double-precision registers, and the latter to create aliases of
6715 quad-precision registers.
6717 If these directives are used to create typed aliases, those
6718 aliases can be used in Neon instructions instead of writing types
6719 after the mnemonic or after each operand. For example:
6726 This is equivalent to writing the following:
6728 vmul.f32 d2,d3,d4[1]
6730 Aliases created using `dn' or `qn' can be destroyed using `unreq'.
6732 `.eabi_attribute TAG, VALUE'
6733 Set the EABI object attribute TAG to VALUE.
6735 The TAG is either an attribute number, or one of the following:
6736 `Tag_CPU_raw_name', `Tag_CPU_name', `Tag_CPU_arch',
6737 `Tag_CPU_arch_profile', `Tag_ARM_ISA_use', `Tag_THUMB_ISA_use',
6738 `Tag_FP_arch', `Tag_WMMX_arch', `Tag_Advanced_SIMD_arch',
6739 `Tag_PCS_config', `Tag_ABI_PCS_R9_use', `Tag_ABI_PCS_RW_data',
6740 `Tag_ABI_PCS_RO_data', `Tag_ABI_PCS_GOT_use',
6741 `Tag_ABI_PCS_wchar_t', `Tag_ABI_FP_rounding',
6742 `Tag_ABI_FP_denormal', `Tag_ABI_FP_exceptions',
6743 `Tag_ABI_FP_user_exceptions', `Tag_ABI_FP_number_model',
6744 `Tag_ABI_align_needed', `Tag_ABI_align_preserved',
6745 `Tag_ABI_enum_size', `Tag_ABI_HardFP_use', `Tag_ABI_VFP_args',
6746 `Tag_ABI_WMMX_args', `Tag_ABI_optimization_goals',
6747 `Tag_ABI_FP_optimization_goals', `Tag_compatibility',
6748 `Tag_CPU_unaligned_access', `Tag_FP_HP_extension',
6749 `Tag_ABI_FP_16bit_format', `Tag_MPextension_use', `Tag_DIV_use',
6750 `Tag_nodefaults', `Tag_also_compatible_with', `Tag_conformance',
6751 `Tag_T2EE_use', `Tag_Virtualization_use'
6753 The VALUE is either a `number', `"string"', or `number, "string"'
6754 depending on the tag.
6756 Note - the following legacy values are also accepted by TAG:
6757 `Tag_VFP_arch', `Tag_ABI_align8_needed',
6758 `Tag_ABI_align8_preserved', `Tag_VFP_HP_extension',
6761 This directive aligns to an even-numbered address.
6763 `.extend EXPRESSION [, EXPRESSION]*'
6764 `.ldouble EXPRESSION [, EXPRESSION]*'
6765 These directives write 12byte long double floating-point values to
6766 the output section. These are not compatible with current ARM
6770 Marks the end of a function with an unwind table entry. The
6771 unwind index table entry is created when this directive is
6774 If no personality routine has been specified then standard
6775 personality routine 0 or 1 will be used, depending on the number
6776 of unwind opcodes required.
6779 Marks the start of a function with an unwind table entry.
6782 This directive forces the selection of Thumb instructions, even if
6783 the target processor does not support those instructions
6786 Select the floating-point unit to assemble for. Valid values for
6787 NAME are the same as for the `-mfpu' commandline option.
6790 Marks the end of the current function, and the start of the
6791 exception table entry for that function. Anything between this
6792 directive and the `.fnend' directive will be added to the
6793 exception table entry.
6795 Must be preceded by a `.personality' or `.personalityindex'
6798 `.inst OPCODE [ , ... ]'
6799 `.inst.n OPCODE [ , ... ]'
6800 `.inst.w OPCODE [ , ... ]'
6801 Generates the instruction corresponding to the numerical value
6802 OPCODE. `.inst.n' and `.inst.w' allow the Thumb instruction size
6803 to be specified explicitly, overriding the normal encoding rules.
6805 `.ldouble EXPRESSION [, EXPRESSION]*'
6809 This directive causes the current contents of the literal pool to
6810 be dumped into the current section (which is assumed to be the
6811 .text section) at the current location (aligned to a word
6812 boundary). `GAS' maintains a separate literal pool for each
6813 section and each sub-section. The `.ltorg' directive will only
6814 affect the literal pool of the current section and sub-section.
6815 At the end of assembly all remaining, un-empty literal pools will
6816 automatically be dumped.
6818 Note - older versions of `GAS' would dump the current literal pool
6819 any time a section change occurred. This is no longer done, since
6820 it prevents accurate control of the placement of literal pools.
6822 `.movsp REG [, #OFFSET]'
6823 Tell the unwinder that REG contains an offset from the current
6824 stack pointer. If OFFSET is not specified then it is assumed to be
6828 Override the architecture recorded in the EABI object attribute
6829 section. Valid values for NAME are the same as for the `.arch'
6830 directive. Typically this is useful when code uses runtime
6831 detection of CPU features.
6833 `.packed EXPRESSION [, EXPRESSION]*'
6834 This directive writes 12-byte packed floating-point values to the
6835 output section. These are not compatible with current ARM
6839 Generate unwinder annotations for a stack adjustment of COUNT
6840 bytes. A positive value indicates the function prologue allocated
6841 stack space by decrementing the stack pointer.
6844 Sets the personality routine for the current function to NAME.
6846 `.personalityindex INDEX'
6847 Sets the personality routine for the current function to the EABI
6848 standard routine number INDEX
6851 This is a synonym for .ltorg.
6853 `NAME .req REGISTER NAME'
6854 This creates an alias for REGISTER NAME called NAME. For example:
6859 Generate unwinder annotations to restore the registers in REGLIST.
6860 The format of REGLIST is the same as the corresponding
6861 store-multiple instruction.
6864 .save {r4, r5, r6, lr}
6865 stmfd sp!, {r4, r5, r6, lr}
6871 fstmdx sp!, {d8, d9, d10}
6874 wstrd wr11, [sp, #-8]!
6875 wstrd wr10, [sp, #-8]!
6878 wstrd wr11, [sp, #-8]!
6880 wstrd wr10, [sp, #-8]!
6882 `.setfp FPREG, SPREG [, #OFFSET]'
6883 Make all unwinder annotations relative to a frame pointer.
6884 Without this the unwinder will use offsets from the stack pointer.
6886 The syntax of this directive is the same as the `add' or `mov'
6887 instruction used to set the frame pointer. SPREG must be either
6888 `sp' or mentioned in a previous `.movsp' directive.
6896 `.secrel32 EXPRESSION [, EXPRESSION]*'
6897 This directive emits relocations that evaluate to the
6898 section-relative offset of each expression's symbol. This
6899 directive is only supported for PE targets.
6901 `.syntax [`unified' | `divided']'
6902 This directive sets the Instruction Set Syntax as described in the
6903 *Note ARM-Instruction-Set:: section.
6906 This performs the same action as .CODE 16.
6909 This directive specifies that the following symbol is the name of a
6910 Thumb encoded function. This information is necessary in order to
6911 allow the assembler and linker to generate correct code for
6912 interworking between Arm and Thumb instructions and should be used
6913 even if interworking is not going to be performed. The presence
6914 of this directive also implies `.thumb'
6916 This directive is not neccessary when generating EABI objects. On
6917 these targets the encoding is implicit when generating Thumb code.
6920 This performs the equivalent of a `.set' directive in that it
6921 creates a symbol which is an alias for another symbol (possibly
6922 not yet defined). This directive also has the added property in
6923 that it marks the aliased symbol as being a thumb function entry
6924 point, in the same way that the `.thumb_func' directive does.
6926 `.tlsdescseq TLS-VARIABLE'
6927 This directive is used to annotate parts of an inlined TLS
6928 descriptor trampoline. Normally the trampoline is provided by the
6929 linker, and this directive is not needed.
6932 This undefines a register alias which was previously defined using
6933 the `req', `dn' or `qn' directives. For example:
6938 An error occurs if the name is undefined. Note - this pseudo op
6939 can be used to delete builtin in register name aliases (eg 'r0').
6940 This should only be done if it is really necessary.
6942 `.unwind_raw OFFSET, BYTE1, ...'
6943 Insert one of more arbitary unwind opcode bytes, which are known
6944 to adjust the stack pointer by OFFSET bytes.
6946 For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save
6949 `.vsave VFP-REGLIST'
6950 Generate unwinder annotations to restore the VFP registers in
6951 VFP-REGLIST using FLDMD. Also works for VFPv3 registers that are
6952 to be restored using VLDM. The format of VFP-REGLIST is the same
6953 as the corresponding store-multiple instruction.
6956 .vsave {d8, d9, d10}
6957 fstmdd sp!, {d8, d9, d10}
6959 .vsave {d15, d16, d17}
6960 vstm sp!, {d15, d16, d17}
6962 Since FLDMX and FSTMX are now deprecated, this directive should be
6963 used in favour of `.save' for saving VFP registers for ARMv6 and
6968 File: as.info, Node: ARM Opcodes, Next: ARM Mapping Symbols, Prev: ARM Directives, Up: ARM-Dependent
6973 `as' implements all the standard ARM opcodes. It also implements
6974 several pseudo opcodes, including several synthetic load instructions.
6979 This pseudo op will always evaluate to a legal ARM instruction
6980 that does nothing. Currently it will evaluate to MOV r0, r0.
6983 ldr <register> , = <expression>
6985 If expression evaluates to a numeric constant then a MOV or MVN
6986 instruction will be used in place of the LDR instruction, if the
6987 constant can be generated by either of these instructions.
6988 Otherwise the constant will be placed into the nearest literal
6989 pool (if it not already there) and a PC relative LDR instruction
6993 adr <register> <label>
6995 This instruction will load the address of LABEL into the indicated
6996 register. The instruction will evaluate to a PC relative ADD or
6997 SUB instruction depending upon where the label is located. If the
6998 label is out of range, or if it is not defined in the same file
6999 (and section) as the ADR instruction, then an error will be
7000 generated. This instruction will not make use of the literal pool.
7003 adrl <register> <label>
7005 This instruction will load the address of LABEL into the indicated
7006 register. The instruction will evaluate to one or two PC relative
7007 ADD or SUB instructions depending upon where the label is located.
7008 If a second instruction is not needed a NOP instruction will be
7009 generated in its place, so that this instruction is always 8 bytes
7012 If the label is out of range, or if it is not defined in the same
7013 file (and section) as the ADRL instruction, then an error will be
7014 generated. This instruction will not make use of the literal pool.
7017 For information on the ARM or Thumb instruction sets, see `ARM
7018 Software Development Toolkit Reference Manual', Advanced RISC Machines
7022 File: as.info, Node: ARM Mapping Symbols, Next: ARM Unwinding Tutorial, Prev: ARM Opcodes, Up: ARM-Dependent
7024 9.3.6 Mapping Symbols
7025 ---------------------
7027 The ARM ELF specification requires that special symbols be inserted
7028 into object files to mark certain features:
7031 At the start of a region of code containing ARM instructions.
7034 At the start of a region of code containing THUMB instructions.
7037 At the start of a region of data.
7040 The assembler will automatically insert these symbols for you - there
7041 is no need to code them yourself. Support for tagging symbols ($b, $f,
7042 $p and $m) which is also mentioned in the current ARM ELF specification
7043 is not implemented. This is because they have been dropped from the
7044 new EABI and so tools cannot rely upon their presence.
7047 File: as.info, Node: ARM Unwinding Tutorial, Prev: ARM Mapping Symbols, Up: ARM-Dependent
7052 The ABI for the ARM Architecture specifies a standard format for
7053 exception unwind information. This information is used when an
7054 exception is thrown to determine where control should be transferred.
7055 In particular, the unwind information is used to determine which
7056 function called the function that threw the exception, and which
7057 function called that one, and so forth. This information is also used
7058 to restore the values of callee-saved registers in the function
7059 catching the exception.
7061 If you are writing functions in assembly code, and those functions
7062 call other functions that throw exceptions, you must use assembly
7063 pseudo ops to ensure that appropriate exception unwind information is
7064 generated. Otherwise, if one of the functions called by your assembly
7065 code throws an exception, the run-time library will be unable to unwind
7066 the stack through your assembly code and your program will not behave
7069 To illustrate the use of these pseudo ops, we will examine the code
7070 that G++ generates for the following C++ input:
7073 void callee (int *);
7083 This example does not show how to throw or catch an exception from
7084 assembly code. That is a much more complex operation and should always
7085 be done in a high-level language, such as C++, that directly supports
7088 The code generated by one particular version of G++ when compiling
7089 the example above is:
7095 @ Function supports interworking.
7096 @ args = 0, pretend = 0, frame = 8
7097 @ frame_needed = 1, uses_anonymous_args = 0
7118 Of course, the sequence of instructions varies based on the options
7119 you pass to GCC and on the version of GCC in use. The exact
7120 instructions are not important since we are focusing on the pseudo ops
7121 that are used to generate unwind information.
7123 An important assumption made by the unwinder is that the stack frame
7124 does not change during the body of the function. In particular, since
7125 we assume that the assembly code does not itself throw an exception,
7126 the only point where an exception can be thrown is from a call, such as
7127 the `bl' instruction above. At each call site, the same saved
7128 registers (including `lr', which indicates the return address) must be
7129 located in the same locations relative to the frame pointer.
7131 The `.fnstart' (*note .fnstart pseudo op: arm_fnstart.) pseudo op
7132 appears immediately before the first instruction of the function while
7133 the `.fnend' (*note .fnend pseudo op: arm_fnend.) pseudo op appears
7134 immediately after the last instruction of the function. These pseudo
7135 ops specify the range of the function.
7137 Only the order of the other pseudos ops (e.g., `.setfp' or `.pad')
7138 matters; their exact locations are irrelevant. In the example above,
7139 the compiler emits the pseudo ops with particular instructions. That
7140 makes it easier to understand the code, but it is not required for
7141 correctness. It would work just as well to emit all of the pseudo ops
7142 other than `.fnend' in the same order, but immediately after `.fnstart'.
7144 The `.save' (*note .save pseudo op: arm_save.) pseudo op indicates
7145 registers that have been saved to the stack so that they can be
7146 restored before the function returns. The argument to the `.save'
7147 pseudo op is a list of registers to save. If a register is
7148 "callee-saved" (as specified by the ABI) and is modified by the
7149 function you are writing, then your code must save the value before it
7150 is modified and restore the original value before the function returns.
7151 If an exception is thrown, the run-time library restores the values of
7152 these registers from their locations on the stack before returning
7153 control to the exception handler. (Of course, if an exception is not
7154 thrown, the function that contains the `.save' pseudo op restores these
7155 registers in the function epilogue, as is done with the `ldmfd'
7158 You do not have to save callee-saved registers at the very beginning
7159 of the function and you do not need to use the `.save' pseudo op
7160 immediately following the point at which the registers are saved.
7161 However, if you modify a callee-saved register, you must save it on the
7162 stack before modifying it and before calling any functions which might
7163 throw an exception. And, you must use the `.save' pseudo op to
7164 indicate that you have done so.
7166 The `.pad' (*note .pad: arm_pad.) pseudo op indicates a modification
7167 of the stack pointer that does not save any registers. The argument is
7168 the number of bytes (in decimal) that are subtracted from the stack
7169 pointer. (On ARM CPUs, the stack grows downwards, so subtracting from
7170 the stack pointer increases the size of the stack.)
7172 The `.setfp' (*note .setfp pseudo op: arm_setfp.) pseudo op
7173 indicates the register that contains the frame pointer. The first
7174 argument is the register that is set, which is typically `fp'. The
7175 second argument indicates the register from which the frame pointer
7176 takes its value. The third argument, if present, is the value (in
7177 decimal) added to the register specified by the second argument to
7178 compute the value of the frame pointer. You should not modify the
7179 frame pointer in the body of the function.
7181 If you do not use a frame pointer, then you should not use the
7182 `.setfp' pseudo op. If you do not use a frame pointer, then you should
7183 avoid modifying the stack pointer outside of the function prologue.
7184 Otherwise, the run-time library will be unable to find saved registers
7185 when it is unwinding the stack.
7187 The pseudo ops described above are sufficient for writing assembly
7188 code that calls functions which may throw exceptions. If you need to
7189 know more about the object-file format used to represent unwind
7190 information, you may consult the `Exception Handling ABI for the ARM
7191 Architecture' available from `http://infocenter.arm.com'.
7194 File: as.info, Node: AVR-Dependent, Next: Blackfin-Dependent, Prev: ARM-Dependent, Up: Machine Dependencies
7196 9.4 AVR Dependent Features
7197 ==========================
7201 * AVR Options:: Options
7202 * AVR Syntax:: Syntax
7203 * AVR Opcodes:: Opcodes
7206 File: as.info, Node: AVR Options, Next: AVR Syntax, Up: AVR-Dependent
7212 Specify ATMEL AVR instruction set or MCU type.
7214 Instruction set avr1 is for the minimal AVR core, not supported by
7215 the C compiler, only for assembler programs (MCU types: at90s1200,
7216 attiny11, attiny12, attiny15, attiny28).
7218 Instruction set avr2 (default) is for the classic AVR core with up
7219 to 8K program memory space (MCU types: at90s2313, at90s2323,
7220 at90s2333, at90s2343, attiny22, attiny26, at90s4414, at90s4433,
7221 at90s4434, at90s8515, at90c8534, at90s8535).
7223 Instruction set avr25 is for the classic AVR core with up to 8K
7224 program memory space plus the MOVW instruction (MCU types:
7225 attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a,
7226 attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25,
7227 attiny45, attiny85, attiny261, attiny261a, attiny461, attiny461a,
7228 attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
7229 at86rf401, ata6289).
7231 Instruction set avr3 is for the classic AVR core with up to 128K
7232 program memory space (MCU types: at43usb355, at76c711).
7234 Instruction set avr31 is for the classic AVR core with exactly
7235 128K program memory space (MCU types: atmega103, at43usb320).
7237 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and
7238 JMP instructions (MCU types: attiny167, at90usb82, at90usb162,
7239 atmega8u2, atmega16u2, atmega32u2).
7241 Instruction set avr4 is for the enhanced AVR core with up to 8K
7242 program memory space (MCU types: atmega48, atmega48a, atmega48p,
7243 atmega8, atmega88, atmega88a, atmega88p, atmega88pa, atmega8515,
7244 atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3,
7245 at90pwm3b, at90pwm81).
7247 Instruction set avr5 is for the enhanced AVR core with up to 128K
7248 program memory space (MCU types: atmega16, atmega16a, atmega161,
7249 atmega162, atmega163, atmega164a, atmega164p, atmega165,
7250 atmega165a, atmega165p, atmega168, atmega168a, atmega168p,
7251 atmega169, atmega169a, atmega169p, atmega169pa, atmega32,
7252 atmega323, atmega324a, atmega324p, atmega325, atmega325a,
7253 atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p,
7254 atmega3250pa, atmega328, atmega328p, atmega329, atmega329a,
7255 atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p,
7256 atmega3290pa, atmega406, atmega64, atmega640, atmega644,
7257 atmega644a, atmega644p, atmega644pa, atmega645, atmega645a,
7258 atmega645p, atmega6450, atmega6450a, atmega6450p, atmega649,
7259 atmega649a, atmega649p, atmega6490, atmega6490a, atmega6490p,
7260 atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb,
7261 atmega32hvb, atmega32hvbrevb, atmega64hve, at90can32, at90can64,
7262 at90pwm161, at90pwm216, at90pwm316, atmega32c1, atmega64c1,
7263 atmega16m1, atmega32m1, atmega64m1, atmega16u4, atmega32u4,
7264 atmega32u6, at90usb646, at90usb647, at94k, at90scr100).
7266 Instruction set avr51 is for the enhanced AVR core with exactly
7267 128K program memory space (MCU types: atmega128, atmega1280,
7268 atmega1281, atmega1284p, atmega128rfa1, at90can128, at90usb1286,
7269 at90usb1287, m3000).
7271 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC
7272 (MCU types: atmega2560, atmega2561).
7274 Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K
7275 program memory space and less than 64K data space (MCU types:
7276 atxmega16a4, atxmega16d4, atxmega16x1, atxmega32a4, atxmega32d4,
7279 Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K
7280 program memory space and greater than 64K data space (MCU types:
7283 Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K
7284 program memory space and less than 64K data space (MCU types:
7285 atxmega64a3, atxmega64d3).
7287 Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K
7288 program memory space and greater than 64K data space (MCU types:
7289 atxmega64a1, atxmega64a1u).
7291 Instruction set avrxmega6 is for the XMEGA AVR core with up to
7292 256K program memory space and less than 64K data space (MCU types:
7293 atxmega128a3, atxmega128d3, atxmega192a3, atxmega128b1,
7294 atxmega192d3, atxmega256a3, atxmega256a3b, atxmega256a3bu,
7297 Instruction set avrxmega7 is for the XMEGA AVR core with up to
7298 256K program memory space and greater than 64K data space (MCU
7299 types: atxmega128a1, atxmega128a1u).
7302 Accept all AVR opcodes, even if not supported by `-mmcu'.
7305 This option disable warnings for skipping two-word instructions.
7308 This option reject `rjmp/rcall' instructions with 8K wrap-around.
7312 File: as.info, Node: AVR Syntax, Next: AVR Opcodes, Prev: AVR Options, Up: AVR-Dependent
7319 * AVR-Chars:: Special Characters
7320 * AVR-Regs:: Register Names
7321 * AVR-Modifiers:: Relocatable Expression Modifiers
7324 File: as.info, Node: AVR-Chars, Next: AVR-Regs, Up: AVR Syntax
7326 9.4.2.1 Special Characters
7327 ..........................
7329 The presence of a `;' anywhere on a line indicates the start of a
7330 comment that extends to the end of that line.
7332 If a `#' appears as the first character of a line, the whole line is
7333 treated as a comment, but in this case the line can also be a logical
7334 line number directive (*note Comments::) or a preprocessor control
7335 command (*note Preprocessing::).
7337 The `$' character can be used instead of a newline to separate
7341 File: as.info, Node: AVR-Regs, Next: AVR-Modifiers, Prev: AVR-Chars, Up: AVR Syntax
7343 9.4.2.2 Register Names
7344 ......................
7346 The AVR has 32 x 8-bit general purpose working registers `r0', `r1',
7347 ... `r31'. Six of the 32 registers can be used as three 16-bit
7348 indirect address register pointers for Data Space addressing. One of
7349 the these address pointers can also be used as an address pointer for
7350 look up tables in Flash program memory. These added function registers
7351 are the 16-bit `X', `Y' and `Z' - registers.
7358 File: as.info, Node: AVR-Modifiers, Prev: AVR-Regs, Up: AVR Syntax
7360 9.4.2.3 Relocatable Expression Modifiers
7361 ........................................
7363 The assembler supports several modifiers when using relocatable
7364 addresses in AVR instruction operands. The general syntax is the
7367 modifier(relocatable-expression)
7370 This modifier allows you to use bits 0 through 7 of an address
7371 expression as 8 bit relocatable expression.
7374 This modifier allows you to use bits 7 through 15 of an address
7375 expression as 8 bit relocatable expression. This is useful with,
7376 for example, the AVR `ldi' instruction and `lo8' modifier.
7380 ldi r26, lo8(sym+10)
7381 ldi r27, hi8(sym+10)
7384 This modifier allows you to use bits 16 through 23 of an address
7385 expression as 8 bit relocatable expression. Also, can be useful
7386 for loading 32 bit constants.
7392 This modifier allows you to use bits 24 through 31 of an
7393 expression as 8 bit expression. This is useful with, for example,
7394 the AVR `ldi' instruction and `lo8', `hi8', `hlo8', `hhi8',
7399 ldi r26, lo8(285774925)
7400 ldi r27, hi8(285774925)
7401 ldi r28, hlo8(285774925)
7402 ldi r29, hhi8(285774925)
7403 ; r29,r28,r27,r26 = 285774925
7406 This modifier allows you to use bits 0 through 7 of an address
7407 expression as 8 bit relocatable expression. This modifier useful
7408 for addressing data or code from Flash/Program memory. The using
7409 of `pm_lo8' similar to `lo8'.
7412 This modifier allows you to use bits 8 through 15 of an address
7413 expression as 8 bit relocatable expression. This modifier useful
7414 for addressing data or code from Flash/Program memory.
7417 This modifier allows you to use bits 15 through 23 of an address
7418 expression as 8 bit relocatable expression. This modifier useful
7419 for addressing data or code from Flash/Program memory.
7423 File: as.info, Node: AVR Opcodes, Prev: AVR Syntax, Up: AVR-Dependent
7428 For detailed information on the AVR machine instruction set, see
7429 `www.atmel.com/products/AVR'.
7431 `as' implements all the standard AVR opcodes. The following table
7432 summarizes the AVR opcodes, and their arguments.
7436 d `ldi' register (r16-r31)
7437 v `movw' even register (r0, r2, ..., r28, r30)
7438 a `fmul' register (r16-r23)
7439 w `adiw' register (r24,r26,r28,r30)
7440 e pointer registers (X,Y,Z)
7441 b base pointer register and displacement ([YZ]+disp)
7442 z Z pointer register (for [e]lpm Rd,Z[+])
7443 M immediate value from 0 to 255
7444 n immediate value from 0 to 255 ( n = ~M ). Relocation impossible
7445 s immediate value from 0 to 7
7446 P Port address value from 0 to 63. (in, out)
7447 p Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
7448 K immediate value from 0 to 63 (used in `adiw', `sbiw')
7450 l signed pc relative offset from -64 to 63
7451 L signed pc relative offset from -2048 to 2047
7452 h absolute code address (call, jmp)
7453 S immediate value from 0 to 7 (S = s << 4)
7454 ? use this opcode entry if no parameters, else use next opcode entry
7456 1001010010001000 clc
7457 1001010011011000 clh
7458 1001010011111000 cli
7459 1001010010101000 cln
7460 1001010011001000 cls
7461 1001010011101000 clt
7462 1001010010111000 clv
7463 1001010010011000 clz
7464 1001010000001000 sec
7465 1001010001011000 seh
7466 1001010001111000 sei
7467 1001010000101000 sen
7468 1001010001001000 ses
7469 1001010001101000 set
7470 1001010000111000 sev
7471 1001010000011000 sez
7472 100101001SSS1000 bclr S
7473 100101000SSS1000 bset S
7474 1001010100001001 icall
7475 1001010000001001 ijmp
7476 1001010111001000 lpm ?
7477 1001000ddddd010+ lpm r,z
7478 1001010111011000 elpm ?
7479 1001000ddddd011+ elpm r,z
7480 0000000000000000 nop
7481 1001010100001000 ret
7482 1001010100011000 reti
7483 1001010110001000 sleep
7484 1001010110011000 break
7485 1001010110101000 wdr
7486 1001010111101000 spm
7487 000111rdddddrrrr adc r,r
7488 000011rdddddrrrr add r,r
7489 001000rdddddrrrr and r,r
7490 000101rdddddrrrr cp r,r
7491 000001rdddddrrrr cpc r,r
7492 000100rdddddrrrr cpse r,r
7493 001001rdddddrrrr eor r,r
7494 001011rdddddrrrr mov r,r
7495 100111rdddddrrrr mul r,r
7496 001010rdddddrrrr or r,r
7497 000010rdddddrrrr sbc r,r
7498 000110rdddddrrrr sub r,r
7499 001001rdddddrrrr clr r
7500 000011rdddddrrrr lsl r
7501 000111rdddddrrrr rol r
7502 001000rdddddrrrr tst r
7503 0111KKKKddddKKKK andi d,M
7504 0111KKKKddddKKKK cbr d,n
7505 1110KKKKddddKKKK ldi d,M
7506 11101111dddd1111 ser d
7507 0110KKKKddddKKKK ori d,M
7508 0110KKKKddddKKKK sbr d,M
7509 0011KKKKddddKKKK cpi d,M
7510 0100KKKKddddKKKK sbci d,M
7511 0101KKKKddddKKKK subi d,M
7512 1111110rrrrr0sss sbrc r,s
7513 1111111rrrrr0sss sbrs r,s
7514 1111100ddddd0sss bld r,s
7515 1111101ddddd0sss bst r,s
7516 10110PPdddddPPPP in r,P
7517 10111PPrrrrrPPPP out P,r
7518 10010110KKddKKKK adiw w,K
7519 10010111KKddKKKK sbiw w,K
7520 10011000pppppsss cbi p,s
7521 10011010pppppsss sbi p,s
7522 10011001pppppsss sbic p,s
7523 10011011pppppsss sbis p,s
7524 111101lllllll000 brcc l
7525 111100lllllll000 brcs l
7526 111100lllllll001 breq l
7527 111101lllllll100 brge l
7528 111101lllllll101 brhc l
7529 111100lllllll101 brhs l
7530 111101lllllll111 brid l
7531 111100lllllll111 brie l
7532 111100lllllll000 brlo l
7533 111100lllllll100 brlt l
7534 111100lllllll010 brmi l
7535 111101lllllll001 brne l
7536 111101lllllll010 brpl l
7537 111101lllllll000 brsh l
7538 111101lllllll110 brtc l
7539 111100lllllll110 brts l
7540 111101lllllll011 brvc l
7541 111100lllllll011 brvs l
7542 111101lllllllsss brbc s,l
7543 111100lllllllsss brbs s,l
7544 1101LLLLLLLLLLLL rcall L
7545 1100LLLLLLLLLLLL rjmp L
7546 1001010hhhhh111h call h
7547 1001010hhhhh110h jmp h
7548 1001010rrrrr0101 asr r
7549 1001010rrrrr0000 com r
7550 1001010rrrrr1010 dec r
7551 1001010rrrrr0011 inc r
7552 1001010rrrrr0110 lsr r
7553 1001010rrrrr0001 neg r
7554 1001000rrrrr1111 pop r
7555 1001001rrrrr1111 push r
7556 1001010rrrrr0111 ror r
7557 1001010rrrrr0010 swap r
7558 00000001ddddrrrr movw v,v
7559 00000010ddddrrrr muls d,d
7560 000000110ddd0rrr mulsu a,a
7561 000000110ddd1rrr fmul a,a
7562 000000111ddd0rrr fmuls a,a
7563 000000111ddd1rrr fmulsu a,a
7564 1001001ddddd0000 sts i,r
7565 1001000ddddd0000 lds r,i
7566 10o0oo0dddddbooo ldd r,b
7567 100!000dddddee-+ ld r,e
7568 10o0oo1rrrrrbooo std b,r
7569 100!001rrrrree-+ st e,r
7570 1001010100011001 eicall
7571 1001010000011001 eijmp
7574 File: as.info, Node: Blackfin-Dependent, Next: CR16-Dependent, Prev: AVR-Dependent, Up: Machine Dependencies
7576 9.5 Blackfin Dependent Features
7577 ===============================
7581 * Blackfin Options:: Blackfin Options
7582 * Blackfin Syntax:: Blackfin Syntax
7583 * Blackfin Directives:: Blackfin Directives
7586 File: as.info, Node: Blackfin Options, Next: Blackfin Syntax, Up: Blackfin-Dependent
7591 `-mcpu=PROCESSOR[-SIREVISION]'
7592 This option specifies the target processor. The optional
7593 SIREVISION is not used in assembler. It's here such that GCC can
7594 easily pass down its `-mcpu=' option. The assembler will issue an
7595 error message if an attempt is made to assemble an instruction
7596 which will not execute on the target processor. The following
7597 processor names are recognized: `bf504', `bf506', `bf512', `bf514',
7598 `bf516', `bf518', `bf522', `bf523', `bf524', `bf525', `bf526',
7599 `bf527', `bf531', `bf532', `bf533', `bf534', `bf535' (not
7600 implemented yet), `bf536', `bf537', `bf538', `bf539', `bf542',
7601 `bf542m', `bf544', `bf544m', `bf547', `bf547m', `bf548', `bf548m',
7602 `bf549', `bf549m', `bf561', and `bf592'.
7605 Assemble for the FDPIC ABI.
7612 File: as.info, Node: Blackfin Syntax, Next: Blackfin Directives, Prev: Blackfin Options, Up: Blackfin-Dependent
7617 `Special Characters'
7618 Assembler input is free format and may appear anywhere on the line.
7619 One instruction may extend across multiple lines or more than one
7620 instruction may appear on the same line. White space (space, tab,
7621 comments or newline) may appear anywhere between tokens. A token
7622 must not have embedded spaces. Tokens include numbers, register
7623 names, keywords, user identifiers, and also some multicharacter
7624 special symbols like "+=", "/*" or "||".
7626 Comments are introduced by the `#' character and extend to the end
7627 of the current line. If the `#' appears as the first character of
7628 a line, the whole line is treated as a comment, but in this case
7629 the line can also be a logical line number directive (*note
7630 Comments::) or a preprocessor control command (*note
7633 `Instruction Delimiting'
7634 A semicolon must terminate every instruction. Sometimes a complete
7635 instruction will consist of more than one operation. There are two
7636 cases where this occurs. The first is when two general operations
7637 are combined. Normally a comma separates the different parts, as
7640 a0= r3.h * r2.l, a1 = r3.l * r2.h ;
7642 The second case occurs when a general instruction is combined with
7643 one or two memory references for joint issue. The latter portions
7644 are set off by a "||" token.
7646 a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++];
7648 Multiple instructions can occur on the same line. Each must be
7649 terminated by a semicolon character.
7652 The assembler treats register names and instruction keywords in a
7653 case insensitive manner. User identifiers are case sensitive.
7654 Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the
7657 Register names are reserved and may not be used as program
7660 Some operations (such as "Move Register") require a register pair.
7661 Register pairs are always data registers and are denoted using a
7662 colon, eg., R3:2. The larger number must be written firsts. Note
7663 that the hardware only supports odd-even pairs, eg., R7:6, R5:4,
7666 Some instructions (such as -SP (Push Multiple)) require a group of
7667 adjacent registers. Adjacent registers are denoted in the syntax
7668 by the range enclosed in parentheses and separated by a colon,
7669 eg., (R7:3). Again, the larger number appears first.
7671 Portions of a particular register may be individually specified.
7672 This is written with a dot (".") following the register name and
7673 then a letter denoting the desired portion. For 32-bit registers,
7674 ".H" denotes the most significant ("High") portion. ".L" denotes
7675 the least-significant portion. The subdivisions of the 40-bit
7676 registers are described later.
7679 The set of 40-bit registers A1 and A0 that normally contain data
7680 that is being manipulated. Each accumulator can be accessed in
7683 `one 40-bit register'
7684 The register will be referred to as A1 or A0.
7686 `one 32-bit register'
7687 The registers are designated as A1.W or A0.W.
7689 `two 16-bit registers'
7690 The registers are designated as A1.H, A1.L, A0.H or A0.L.
7692 `one 8-bit register'
7693 The registers are designated as A1.X or A0.X for the bits that
7694 extend beyond bit 31.
7697 The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7)
7698 that normally contain data for manipulation. These are
7699 abbreviated as D-register or Dreg. Data registers can be accessed
7700 as 32-bit registers or as two independent 16-bit registers. The
7701 least significant 16 bits of each register is called the "low"
7702 half and is designated with ".L" following the register name. The
7703 most significant 16 bits are called the "high" half and is
7704 designated with ".H" following the name.
7706 R7.L, r2.h, r4.L, R0.H
7709 The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP)
7710 that normally contain byte addresses of data structures. These are
7711 abbreviated as P-register or Preg.
7716 The stack pointer contains the 32-bit address of the last occupied
7717 byte location in the stack. The stack grows by decrementing the
7721 The frame pointer contains the 32-bit address of the previous frame
7722 pointer in the stack. It is located at the top of a frame.
7725 LT0 and LT1. These registers contain the 32-bit address of the
7726 top of a zero overhead loop.
7729 LC0 and LC1. These registers contain the 32-bit counter of the
7730 zero overhead loop executions.
7733 LB0 and LB1. These registers contain the 32-bit address of the
7734 bottom of a zero overhead loop.
7737 The set of 32-bit registers (I0, I1, I2, I3) that normally contain
7738 byte addresses of data structures. Abbreviated I-register or Ireg.
7741 The set of 32-bit registers (M0, M1, M2, M3) that normally contain
7742 offset values that are added and subtracted to one of the index
7743 registers. Abbreviated as Mreg.
7746 The set of 32-bit registers (L0, L1, L2, L3) that normally contain
7747 the length in bytes of the circular buffer. Abbreviated as Lreg.
7748 Clear the Lreg to disable circular addressing for the
7752 The set of 32-bit registers (B0, B1, B2, B3) that normally contain
7753 the base address in bytes of the circular buffer. Abbreviated as
7757 The Blackfin family has no hardware floating point but the .float
7758 directive generates ieee floating point numbers for use with
7759 software floating point libraries.
7762 For detailed information on the Blackfin machine instruction set,
7763 see the Blackfin(r) Processor Instruction Set Reference.
7767 File: as.info, Node: Blackfin Directives, Prev: Blackfin Syntax, Up: Blackfin-Dependent
7772 The following directives are provided for compatibility with the VDSP
7776 Initializes a two byte data object.
7778 This maps to the `.short' directive.
7781 Initializes a four byte data object.
7783 This maps to the `.int' directive.
7786 Initializes a single byte data object.
7788 This directive is a synonym for `.byte'.
7791 Initializes a two byte data object.
7793 This directive is a synonym for `.byte2'.
7796 Initializes a four byte data object.
7798 This directive is a synonym for `.byte4'.
7801 Define and initialize a 32 bit data object.
7804 File: as.info, Node: CR16-Dependent, Next: CRIS-Dependent, Prev: Blackfin-Dependent, Up: Machine Dependencies
7806 9.6 CR16 Dependent Features
7807 ===========================
7811 * CR16 Operand Qualifiers:: CR16 Machine Operand Qualifiers
7812 * CR16 Syntax:: Syntax for the CR16
7815 File: as.info, Node: CR16 Operand Qualifiers, Next: CR16 Syntax, Up: CR16-Dependent
7817 9.6.1 CR16 Operand Qualifiers
7818 -----------------------------
7820 The National Semiconductor CR16 target of `as' has a few machine
7821 dependent operand qualifiers.
7823 Operand expression type qualifier is an optional field in the
7824 instruction operand, to determines the type of the expression field of
7825 an operand. The `@' is required. CR16 architecture uses one of the
7826 following expression qualifiers:
7829 - `Specifies expression operand type as small'
7832 - `Specifies expression operand type as medium'
7835 - `Specifies expression operand type as large'
7838 - `Specifies the CR16 Assembler generates a relocation entry for
7839 the operand, where pc has implied bit, the expression is adjusted
7840 accordingly. The linker uses the relocation entry to update the
7841 operand address at link time.'
7844 - `Specifies the CR16 Assembler generates a relocation entry for
7845 the operand, offset from Global Offset Table. The linker uses this
7846 relocation entry to update the operand address at link time'
7849 - `Specifies the CompactRISC Assembler generates a relocation
7850 entry for the operand, where pc has implied bit, the expression is
7851 adjusted accordingly. The linker uses the relocation entry to
7852 update the operand address at link time.'
7854 CR16 target operand qualifiers and its size (in bits):
7860 - m --- 16 bits, for movb and movw instructions.
7863 - m --- 20 bits, movd instructions.
7869 - s --- Illegal specifier for this operand.
7872 - m --- 20 bits, movd instructions.
7874 `Displacement Operand'
7884 1 `movw $_myfun@c,r1'
7886 This loads the address of _myfun, shifted right by 1, into r1.
7888 2 `movd $_myfun@c,(r2,r1)'
7890 This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
7894 `loadd _myfun_ptr, (r1,r0)'
7897 This .long directive, the address of _myfunc, shifted right by 1 at link time.
7899 4 `loadd _data1@GOT(r12), (r1,r0)'
7901 This loads the address of _data1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r2-r1.
7903 5 `loadd _myfunc@cGOT(r12), (r1,r0)'
7905 This loads the address of _myfun, shifted right by 1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r1-r0.
7908 File: as.info, Node: CR16 Syntax, Prev: CR16 Operand Qualifiers, Up: CR16-Dependent
7915 * CR16-Chars:: Special Characters
7918 File: as.info, Node: CR16-Chars, Up: CR16 Syntax
7920 9.6.2.1 Special Characters
7921 ..........................
7923 The presence of a `#' on a line indicates the start of a comment that
7924 extends to the end of the current line. If the `#' appears as the
7925 first character of a line, the whole line is treated as a comment, but
7926 in this case the line can also be a logical line number directive
7927 (*note Comments::) or a preprocessor control command (*note
7930 The `;' character can be used to separate statements on the same
7934 File: as.info, Node: CRIS-Dependent, Next: D10V-Dependent, Prev: CR16-Dependent, Up: Machine Dependencies
7936 9.7 CRIS Dependent Features
7937 ===========================
7941 * CRIS-Opts:: Command-line Options
7942 * CRIS-Expand:: Instruction expansion
7943 * CRIS-Symbols:: Symbols
7944 * CRIS-Syntax:: Syntax
7947 File: as.info, Node: CRIS-Opts, Next: CRIS-Expand, Up: CRIS-Dependent
7949 9.7.1 Command-line Options
7950 --------------------------
7952 The CRIS version of `as' has these machine-dependent command-line
7955 The format of the generated object files can be either ELF or a.out,
7956 specified by the command-line options `--emulation=crisaout' and
7957 `--emulation=criself'. The default is ELF (criself), unless `as' has
7958 been configured specifically for a.out by using the configuration name
7961 There are two different link-incompatible ELF object file variants
7962 for CRIS, for use in environments where symbols are expected to be
7963 prefixed by a leading `_' character and for environments without such a
7964 symbol prefix. The variant used for GNU/Linux port has no symbol
7965 prefix. Which variant to produce is specified by either of the options
7966 `--underscore' and `--no-underscore'. The default is `--underscore'.
7967 Since symbols in CRIS a.out objects are expected to have a `_' prefix,
7968 specifying `--no-underscore' when generating a.out objects is an error.
7969 Besides the object format difference, the effect of this option is to
7970 parse register names differently (*note crisnous::). The
7971 `--no-underscore' option makes a `$' register prefix mandatory.
7973 The option `--pic' must be passed to `as' in order to recognize the
7974 symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note
7975 crispic::). This will also affect expansion of instructions. The
7976 expansion with `--pic' will use PC-relative rather than (slightly
7977 faster) absolute addresses in those expansions. This option is only
7978 valid when generating ELF format object files.
7980 The option `--march=ARCHITECTURE' specifies the recognized
7981 instruction set and recognized register names. It also controls the
7982 architecture type of the object file. Valid values for ARCHITECTURE
7985 All instructions and register names for any architecture variant
7986 in the set v0...v10 are recognized. This is the default if the
7987 target is configured as cris-*.
7990 Only instructions and register names for CRIS v10 (as found in
7991 ETRAX 100 LX) are recognized. This is the default if the target
7992 is configured as crisv10-*.
7995 Only instructions and register names for CRIS v32 (code name
7996 Guinness) are recognized. This is the default if the target is
7997 configured as crisv32-*. This value implies `--no-mul-bug-abort'.
7998 (A subsequent `--mul-bug-abort' will turn it back on.)
8001 Only instructions with register names and addressing modes with
8002 opcodes common to the v10 and v32 are recognized.
8004 When `-N' is specified, `as' will emit a warning when a 16-bit
8005 branch instruction is expanded into a 32-bit multiple-instruction
8006 construct (*note CRIS-Expand::).
8008 Some versions of the CRIS v10, for example in the Etrax 100 LX,
8009 contain a bug that causes destabilizing memory accesses when a multiply
8010 instruction is executed with certain values in the first operand just
8011 before a cache-miss. When the `--mul-bug-abort' command line option is
8012 active (the default value), `as' will refuse to assemble a file
8013 containing a multiply instruction at a dangerous offset, one that could
8014 be the last on a cache-line, or is in a section with insufficient
8015 alignment. This placement checking does not catch any case where the
8016 multiply instruction is dangerously placed because it is located in a
8017 delay-slot. The `--mul-bug-abort' command line option turns off the
8021 File: as.info, Node: CRIS-Expand, Next: CRIS-Symbols, Prev: CRIS-Opts, Up: CRIS-Dependent
8023 9.7.2 Instruction expansion
8024 ---------------------------
8026 `as' will silently choose an instruction that fits the operand size for
8027 `[register+constant]' operands. For example, the offset `127' in
8028 `move.d [r3+127],r4' fits in an instruction using a signed-byte offset.
8029 Similarly, `move.d [r2+32767],r1' will generate an instruction using a
8030 16-bit offset. For symbolic expressions and constants that do not fit
8031 in 16 bits including the sign bit, a 32-bit offset is generated.
8033 For branches, `as' will expand from a 16-bit branch instruction into
8034 a sequence of instructions that can reach a full 32-bit address. Since
8035 this does not correspond to a single instruction, such expansions can
8036 optionally be warned about. *Note CRIS-Opts::.
8038 If the operand is found to fit the range, a `lapc' mnemonic will
8039 translate to a `lapcq' instruction. Use `lapc.d' to force the 32-bit
8042 Similarly, the `addo' mnemonic will translate to the shortest
8043 fitting instruction of `addoq', `addo.w' and `addo.d', when used with a
8044 operand that is a constant known at assembly time.
8047 File: as.info, Node: CRIS-Symbols, Next: CRIS-Syntax, Prev: CRIS-Expand, Up: CRIS-Dependent
8052 Some symbols are defined by the assembler. They're intended to be used
8053 in conditional assembly, for example:
8054 .if ..asm.arch.cris.v32
8056 .elseif ..asm.arch.cris.common_v10_v32
8057 CODE COMMON TO CRIS V32 AND CRIS V10
8058 .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10
8061 .error "Code needs to be added here."
8064 These symbols are defined in the assembler, reflecting command-line
8065 options, either when specified or the default. They are always
8067 `..asm.arch.cris.any_v0_v10'
8068 This symbol is non-zero when `--march=v0_v10' is specified or the
8071 `..asm.arch.cris.common_v10_v32'
8072 Set according to the option `--march=common_v10_v32'.
8074 `..asm.arch.cris.v10'
8075 Reflects the option `--march=v10'.
8077 `..asm.arch.cris.v32'
8078 Corresponds to `--march=v10'.
8080 Speaking of symbols, when a symbol is used in code, it can have a
8081 suffix modifying its value for use in position-independent code. *Note
8085 File: as.info, Node: CRIS-Syntax, Prev: CRIS-Symbols, Up: CRIS-Dependent
8090 There are different aspects of the CRIS assembly syntax.
8094 * CRIS-Chars:: Special Characters
8095 * CRIS-Pic:: Position-Independent Code Symbols
8096 * CRIS-Regs:: Register Names
8097 * CRIS-Pseudos:: Assembler Directives
8100 File: as.info, Node: CRIS-Chars, Next: CRIS-Pic, Up: CRIS-Syntax
8102 9.7.4.1 Special Characters
8103 ..........................
8105 The character `#' is a line comment character. It starts a comment if
8106 and only if it is placed at the beginning of a line.
8108 A `;' character starts a comment anywhere on the line, causing all
8109 characters up to the end of the line to be ignored.
8111 A `@' character is handled as a line separator equivalent to a
8112 logical new-line character (except in a comment), so separate
8113 instructions can be specified on a single line.
8116 File: as.info, Node: CRIS-Pic, Next: CRIS-Regs, Prev: CRIS-Chars, Up: CRIS-Syntax
8118 9.7.4.2 Symbols in position-independent code
8119 ............................................
8121 When generating position-independent code (SVR4 PIC) for use in
8122 cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol
8123 suffixes are used to specify what kind of run-time symbol lookup will
8124 be used, expressed in the object as different _relocation types_.
8125 Usually, all absolute symbol values must be located in a table, the
8126 _global offset table_, leaving the code position-independent;
8127 independent of values of global symbols and independent of the address
8128 of the code. The suffix modifies the value of the symbol, into for
8129 example an index into the global offset table where the real symbol
8130 value is entered, or a PC-relative value, or a value relative to the
8131 start of the global offset table. All symbol suffixes start with the
8132 character `:' (omitted in the list below). Every symbol use in code or
8133 a read-only section must therefore have a PIC suffix to enable a useful
8134 shared library to be created. Usually, these constructs must not be
8135 used with an additive constant offset as is usually allowed, i.e. no 4
8136 as in `symbol + 4' is allowed. This restriction is checked at
8137 link-time, not at assembly-time.
8140 Attaching this suffix to a symbol in an instruction causes the
8141 symbol to be entered into the global offset table. The value is a
8142 32-bit index for that symbol into the global offset table. The
8143 name of the corresponding relocation is `R_CRIS_32_GOT'. Example:
8144 `move.d [$r0+extsym:GOT],$r9'
8147 Same as for `GOT', but the value is a 16-bit index into the global
8148 offset table. The corresponding relocation is `R_CRIS_16_GOT'.
8149 Example: `move.d [$r0+asymbol:GOT16],$r10'
8152 This suffix is used for function symbols. It causes a _procedure
8153 linkage table_, an array of code stubs, to be created at the time
8154 the shared object is created or linked against, together with a
8155 global offset table entry. The value is a pc-relative offset to
8156 the corresponding stub code in the procedure linkage table. This
8157 arrangement causes the run-time symbol resolver to be called to
8158 look up and set the value of the symbol the first time the
8159 function is called (at latest; depending environment variables).
8160 It is only safe to leave the symbol unresolved this way if all
8161 references are function calls. The name of the relocation is
8162 `R_CRIS_32_PLT_PCREL'. Example: `add.d fnname:PLT,$pc'
8165 Like PLT, but the value is relative to the beginning of the global
8166 offset table. The relocation is `R_CRIS_32_PLT_GOTREL'. Example:
8167 `move.d fnname:PLTG,$r3'
8170 Similar to `PLT', but the value of the symbol is a 32-bit index
8171 into the global offset table. This is somewhat of a mix between
8172 the effect of the `GOT' and the `PLT' suffix; the difference to
8173 `GOT' is that there will be a procedure linkage table entry
8174 created, and that the symbol is assumed to be a function entry and
8175 will be resolved by the run-time resolver as with `PLT'. The
8176 relocation is `R_CRIS_32_GOTPLT'. Example: `jsr
8177 [$r0+fnname:GOTPLT]'
8180 A variant of `GOTPLT' giving a 16-bit value. Its relocation name
8181 is `R_CRIS_16_GOTPLT'. Example: `jsr [$r0+fnname:GOTPLT16]'
8184 This suffix must only be attached to a local symbol, but may be
8185 used in an expression adding an offset. The value is the address
8186 of the symbol relative to the start of the global offset table.
8187 The relocation name is `R_CRIS_32_GOTREL'. Example: `move.d
8188 [$r0+localsym:GOTOFF],r3'
8191 File: as.info, Node: CRIS-Regs, Next: CRIS-Pseudos, Prev: CRIS-Pic, Up: CRIS-Syntax
8193 9.7.4.3 Register names
8194 ......................
8196 A `$' character may always prefix a general or special register name in
8197 an instruction operand but is mandatory when the option
8198 `--no-underscore' is specified or when the `.syntax register_prefix'
8199 directive is in effect (*note crisnous::). Register names are
8203 File: as.info, Node: CRIS-Pseudos, Prev: CRIS-Regs, Up: CRIS-Syntax
8205 9.7.4.4 Assembler Directives
8206 ............................
8208 There are a few CRIS-specific pseudo-directives in addition to the
8209 generic ones. *Note Pseudo Ops::. Constants emitted by
8210 pseudo-directives are in little-endian order for CRIS. There is no
8211 support for floating-point-specific directives for CRIS.
8213 `.dword EXPRESSIONS'
8214 The `.dword' directive is a synonym for `.int', expecting zero or
8215 more EXPRESSIONS, separated by commas. For each expression, a
8216 32-bit little-endian constant is emitted.
8219 The `.syntax' directive takes as ARGUMENT one of the following
8220 case-sensitive choices.
8222 `no_register_prefix'
8223 The `.syntax no_register_prefix' directive makes a `$'
8224 character prefix on all registers optional. It overrides a
8225 previous setting, including the corresponding effect of the
8226 option `--no-underscore'. If this directive is used when
8227 ordinary symbols do not have a `_' character prefix, care
8228 must be taken to avoid ambiguities whether an operand is a
8229 register or a symbol; using symbols with names the same as
8230 general or special registers then invoke undefined behavior.
8233 This directive makes a `$' character prefix on all registers
8234 mandatory. It overrides a previous setting, including the
8235 corresponding effect of the option `--underscore'.
8237 `leading_underscore'
8238 This is an assertion directive, emitting an error if the
8239 `--no-underscore' option is in effect.
8241 `no_leading_underscore'
8242 This is the opposite of the `.syntax leading_underscore'
8243 directive and emits an error if the option `--underscore' is
8247 This is an assertion directive, giving an error if the specified
8248 ARGUMENT is not the same as the specified or default value for the
8249 `--march=ARCHITECTURE' option (*note march-option::).
8253 File: as.info, Node: D10V-Dependent, Next: D30V-Dependent, Prev: CRIS-Dependent, Up: Machine Dependencies
8255 9.8 D10V Dependent Features
8256 ===========================
8260 * D10V-Opts:: D10V Options
8261 * D10V-Syntax:: Syntax
8262 * D10V-Float:: Floating Point
8263 * D10V-Opcodes:: Opcodes
8266 File: as.info, Node: D10V-Opts, Next: D10V-Syntax, Up: D10V-Dependent
8271 The Mitsubishi D10V version of `as' has a few machine dependent options.
8274 The D10V can often execute two sub-instructions in parallel. When
8275 this option is used, `as' will attempt to optimize its output by
8276 detecting when instructions can be executed in parallel.
8279 To optimize execution performance, `as' will sometimes swap the
8280 order of instructions. Normally this generates a warning. When
8281 this option is used, no warning will be generated when
8282 instructions are swapped.
8285 `--no-gstabs-packing'
8286 `as' packs adjacent short instructions into a single packed
8287 instruction. `--no-gstabs-packing' turns instruction packing off if
8288 `--gstabs' is specified as well; `--gstabs-packing' (the default)
8289 turns instruction packing on even when `--gstabs' is specified.
8292 File: as.info, Node: D10V-Syntax, Next: D10V-Float, Prev: D10V-Opts, Up: D10V-Dependent
8297 The D10V syntax is based on the syntax in Mitsubishi's D10V
8298 architecture manual. The differences are detailed below.
8302 * D10V-Size:: Size Modifiers
8303 * D10V-Subs:: Sub-Instructions
8304 * D10V-Chars:: Special Characters
8305 * D10V-Regs:: Register Names
8306 * D10V-Addressing:: Addressing Modes
8307 * D10V-Word:: @WORD Modifier
8310 File: as.info, Node: D10V-Size, Next: D10V-Subs, Up: D10V-Syntax
8312 9.8.2.1 Size Modifiers
8313 ......................
8315 The D10V version of `as' uses the instruction names in the D10V
8316 Architecture Manual. However, the names in the manual are sometimes
8317 ambiguous. There are instruction names that can assemble to a short or
8318 long form opcode. How does the assembler pick the correct form? `as'
8319 will always pick the smallest form if it can. When dealing with a
8320 symbol that is not defined yet when a line is being assembled, it will
8321 always use the long form. If you need to force the assembler to use
8322 either the short or long form of the instruction, you can append either
8323 `.s' (short) or `.l' (long) to it. For example, if you are writing an
8324 assembly program and you want to do a branch to a symbol that is
8325 defined later in your program, you can write `bra.s foo'. Objdump
8326 and GDB will always append `.s' or `.l' to instructions which have both
8327 short and long forms.
8330 File: as.info, Node: D10V-Subs, Next: D10V-Chars, Prev: D10V-Size, Up: D10V-Syntax
8332 9.8.2.2 Sub-Instructions
8333 ........................
8335 The D10V assembler takes as input a series of instructions, either
8336 one-per-line, or in the special two-per-line format described in the
8337 next section. Some of these instructions will be short-form or
8338 sub-instructions. These sub-instructions can be packed into a single
8339 instruction. The assembler will do this automatically. It will also
8340 detect when it should not pack instructions. For example, when a label
8341 is defined, the next instruction will never be packaged with the
8342 previous one. Whenever a branch and link instruction is called, it
8343 will not be packaged with the next instruction so the return address
8344 will be valid. Nops are automatically inserted when necessary.
8346 If you do not want the assembler automatically making these
8347 decisions, you can control the packaging and execution type (parallel
8348 or sequential) with the special execution symbols described in the next
8352 File: as.info, Node: D10V-Chars, Next: D10V-Regs, Prev: D10V-Subs, Up: D10V-Syntax
8354 9.8.2.3 Special Characters
8355 ..........................
8357 A semicolon (`;') can be used anywhere on a line to start a comment
8358 that extends to the end of the line.
8360 If a `#' appears as the first character of a line, the whole line is
8361 treated as a comment, but in this case the line could also be a logical
8362 line number directive (*note Comments::) or a preprocessor control
8363 command (*note Preprocessing::).
8365 Sub-instructions may be executed in order, in reverse-order, or in
8366 parallel. Instructions listed in the standard one-per-line format will
8367 be executed sequentially. To specify the executing order, use the
8370 Sequential with instruction on the left first.
8373 Sequential with instruction on the right first.
8377 The D10V syntax allows either one instruction per line, one
8378 instruction per line with the execution symbol, or two instructions per
8381 Execute these sequentially. The instruction on the right is in
8382 the right container and is executed second.
8385 Execute these reverse-sequentially. The instruction on the right
8386 is in the right container, and is executed first.
8388 `ld2w r2,@r8+ || mac a0,r0,r7'
8389 Execute these in parallel.
8393 Two-line format. Execute these in parallel.
8397 Two-line format. Execute these sequentially. Assembler will put
8398 them in the proper containers.
8402 Two-line format. Execute these sequentially. Same as above but
8403 second instruction will always go into right container.
8404 Since `$' has no special meaning, you may use it in symbol names.
8407 File: as.info, Node: D10V-Regs, Next: D10V-Addressing, Prev: D10V-Chars, Up: D10V-Syntax
8409 9.8.2.4 Register Names
8410 ......................
8412 You can use the predefined symbols `r0' through `r15' to refer to the
8413 D10V registers. You can also use `sp' as an alias for `r15'. The
8414 accumulators are `a0' and `a1'. There are special register-pair names
8415 that may optionally be used in opcodes that require even-numbered
8416 registers. Register names are not case sensitive.
8435 The D10V also has predefined symbols for these control registers and
8438 Processor Status Word
8441 Backup Processor Status Word
8447 Backup Program Counter
8453 Repeat Start address
8459 Modulo Start address
8465 Instruction Break Address
8477 File: as.info, Node: D10V-Addressing, Next: D10V-Word, Prev: D10V-Regs, Up: D10V-Syntax
8479 9.8.2.5 Addressing Modes
8480 ........................
8482 `as' understands the following addressing modes for the D10V. `RN' in
8483 the following refers to any of the numbered registers, but _not_ the
8492 Register indirect with post-increment
8495 Register indirect with post-decrement
8498 Register indirect with pre-decrement
8501 Register indirect with displacement
8504 PC relative address (for branch or rep).
8507 Immediate data (the `#' is optional and ignored)
8510 File: as.info, Node: D10V-Word, Prev: D10V-Addressing, Up: D10V-Syntax
8512 9.8.2.6 @WORD Modifier
8513 ......................
8515 Any symbol followed by `@word' will be replaced by the symbol's value
8516 shifted right by 2. This is used in situations such as loading a
8517 register with the address of a function (or any other code fragment).
8518 For example, if you want to load a register with the location of the
8519 function `main' then jump to that function, you could do it as follows:
8524 File: as.info, Node: D10V-Float, Next: D10V-Opcodes, Prev: D10V-Syntax, Up: D10V-Dependent
8526 9.8.3 Floating Point
8527 --------------------
8529 The D10V has no hardware floating point, but the `.float' and `.double'
8530 directives generates IEEE floating-point numbers for compatibility with
8531 other development tools.
8534 File: as.info, Node: D10V-Opcodes, Prev: D10V-Float, Up: D10V-Dependent
8539 For detailed information on the D10V machine instruction set, see `D10V
8540 Architecture: A VLIW Microprocessor for Multimedia Applications'
8541 (Mitsubishi Electric Corp.). `as' implements all the standard D10V
8542 opcodes. The only changes are those described in the section on size
8546 File: as.info, Node: D30V-Dependent, Next: H8/300-Dependent, Prev: D10V-Dependent, Up: Machine Dependencies
8548 9.9 D30V Dependent Features
8549 ===========================
8553 * D30V-Opts:: D30V Options
8554 * D30V-Syntax:: Syntax
8555 * D30V-Float:: Floating Point
8556 * D30V-Opcodes:: Opcodes
8559 File: as.info, Node: D30V-Opts, Next: D30V-Syntax, Up: D30V-Dependent
8564 The Mitsubishi D30V version of `as' has a few machine dependent options.
8567 The D30V can often execute two sub-instructions in parallel. When
8568 this option is used, `as' will attempt to optimize its output by
8569 detecting when instructions can be executed in parallel.
8572 When this option is used, `as' will issue a warning every time it
8573 adds a nop instruction.
8576 When this option is used, `as' will issue a warning if it needs to
8577 insert a nop after a 32-bit multiply before a load or 16-bit
8578 multiply instruction.
8581 File: as.info, Node: D30V-Syntax, Next: D30V-Float, Prev: D30V-Opts, Up: D30V-Dependent
8586 The D30V syntax is based on the syntax in Mitsubishi's D30V
8587 architecture manual. The differences are detailed below.
8591 * D30V-Size:: Size Modifiers
8592 * D30V-Subs:: Sub-Instructions
8593 * D30V-Chars:: Special Characters
8594 * D30V-Guarded:: Guarded Execution
8595 * D30V-Regs:: Register Names
8596 * D30V-Addressing:: Addressing Modes
8599 File: as.info, Node: D30V-Size, Next: D30V-Subs, Up: D30V-Syntax
8601 9.9.2.1 Size Modifiers
8602 ......................
8604 The D30V version of `as' uses the instruction names in the D30V
8605 Architecture Manual. However, the names in the manual are sometimes
8606 ambiguous. There are instruction names that can assemble to a short or
8607 long form opcode. How does the assembler pick the correct form? `as'
8608 will always pick the smallest form if it can. When dealing with a
8609 symbol that is not defined yet when a line is being assembled, it will
8610 always use the long form. If you need to force the assembler to use
8611 either the short or long form of the instruction, you can append either
8612 `.s' (short) or `.l' (long) to it. For example, if you are writing an
8613 assembly program and you want to do a branch to a symbol that is
8614 defined later in your program, you can write `bra.s foo'. Objdump and
8615 GDB will always append `.s' or `.l' to instructions which have both
8616 short and long forms.
8619 File: as.info, Node: D30V-Subs, Next: D30V-Chars, Prev: D30V-Size, Up: D30V-Syntax
8621 9.9.2.2 Sub-Instructions
8622 ........................
8624 The D30V assembler takes as input a series of instructions, either
8625 one-per-line, or in the special two-per-line format described in the
8626 next section. Some of these instructions will be short-form or
8627 sub-instructions. These sub-instructions can be packed into a single
8628 instruction. The assembler will do this automatically. It will also
8629 detect when it should not pack instructions. For example, when a label
8630 is defined, the next instruction will never be packaged with the
8631 previous one. Whenever a branch and link instruction is called, it
8632 will not be packaged with the next instruction so the return address
8633 will be valid. Nops are automatically inserted when necessary.
8635 If you do not want the assembler automatically making these
8636 decisions, you can control the packaging and execution type (parallel
8637 or sequential) with the special execution symbols described in the next
8641 File: as.info, Node: D30V-Chars, Next: D30V-Guarded, Prev: D30V-Subs, Up: D30V-Syntax
8643 9.9.2.3 Special Characters
8644 ..........................
8646 A semicolon (`;') can be used anywhere on a line to start a comment
8647 that extends to the end of the line.
8649 If a `#' appears as the first character of a line, the whole line is
8650 treated as a comment, but in this case the line could also be a logical
8651 line number directive (*note Comments::) or a preprocessor control
8652 command (*note Preprocessing::).
8654 Sub-instructions may be executed in order, in reverse-order, or in
8655 parallel. Instructions listed in the standard one-per-line format will
8656 be executed sequentially unless you use the `-O' option.
8658 To specify the executing order, use the following symbols:
8660 Sequential with instruction on the left first.
8663 Sequential with instruction on the right first.
8668 The D30V syntax allows either one instruction per line, one
8669 instruction per line with the execution symbol, or two instructions per
8671 `abs r2,r3 -> abs r4,r5'
8672 Execute these sequentially. The instruction on the right is in
8673 the right container and is executed second.
8675 `abs r2,r3 <- abs r4,r5'
8676 Execute these reverse-sequentially. The instruction on the right
8677 is in the right container, and is executed first.
8679 `abs r2,r3 || abs r4,r5'
8680 Execute these in parallel.
8682 `ldw r2,@(r3,r4) ||'
8684 Two-line format. Execute these in parallel.
8688 Two-line format. Execute these sequentially unless `-O' option is
8689 used. If the `-O' option is used, the assembler will determine if
8690 the instructions could be done in parallel (the above two
8691 instructions can be done in parallel), and if so, emit them as
8692 parallel instructions. The assembler will put them in the proper
8693 containers. In the above example, the assembler will put the
8694 `stw' instruction in left container and the `mulx' instruction in
8695 the right container.
8697 `stw r2,@(r3,r4) ->'
8699 Two-line format. Execute the `stw' instruction followed by the
8700 `mulx' instruction sequentially. The first instruction goes in the
8701 left container and the second instruction goes into right
8702 container. The assembler will give an error if the machine
8703 ordering constraints are violated.
8705 `stw r2,@(r3,r4) <-'
8707 Same as previous example, except that the `mulx' instruction is
8708 executed before the `stw' instruction.
8710 Since `$' has no special meaning, you may use it in symbol names.
8713 File: as.info, Node: D30V-Guarded, Next: D30V-Regs, Prev: D30V-Chars, Up: D30V-Syntax
8715 9.9.2.4 Guarded Execution
8716 .........................
8718 `as' supports the full range of guarded execution directives for each
8719 instruction. Just append the directive after the instruction proper.
8723 Execute the instruction if flag f0 is true.
8726 Execute the instruction if flag f0 is false.
8729 Execute the instruction if flag f1 is true.
8732 Execute the instruction if flag f1 is false.
8735 Execute the instruction if both flags f0 and f1 are true.
8738 Execute the instruction if flag f0 is true and flag f1 is false.
8741 File: as.info, Node: D30V-Regs, Next: D30V-Addressing, Prev: D30V-Guarded, Up: D30V-Syntax
8743 9.9.2.5 Register Names
8744 ......................
8746 You can use the predefined symbols `r0' through `r63' to refer to the
8747 D30V registers. You can also use `sp' as an alias for `r63' and `link'
8748 as an alias for `r62'. The accumulators are `a0' and `a1'.
8750 The D30V also has predefined symbols for these control registers and
8753 Processor Status Word
8756 Backup Processor Status Word
8762 Backup Program Counter
8768 Repeat Start address
8774 Modulo Start address
8780 Instruction Break Address
8807 Same as flag 4 (saturation flag)
8810 Same as flag 5 (overflow flag)
8813 Same as flag 6 (sticky overflow flag)
8816 Same as flag 7 (carry/borrow flag)
8819 Same as flag 7 (carry/borrow flag)
8822 File: as.info, Node: D30V-Addressing, Prev: D30V-Regs, Up: D30V-Syntax
8824 9.9.2.6 Addressing Modes
8825 ........................
8827 `as' understands the following addressing modes for the D30V. `RN' in
8828 the following refers to any of the numbered registers, but _not_ the
8837 Register indirect with post-increment
8840 Register indirect with post-decrement
8843 Register indirect with pre-decrement
8846 Register indirect with displacement
8849 PC relative address (for branch or rep).
8852 Immediate data (the `#' is optional and ignored)
8855 File: as.info, Node: D30V-Float, Next: D30V-Opcodes, Prev: D30V-Syntax, Up: D30V-Dependent
8857 9.9.3 Floating Point
8858 --------------------
8860 The D30V has no hardware floating point, but the `.float' and `.double'
8861 directives generates IEEE floating-point numbers for compatibility with
8862 other development tools.
8865 File: as.info, Node: D30V-Opcodes, Prev: D30V-Float, Up: D30V-Dependent
8870 For detailed information on the D30V machine instruction set, see `D30V
8871 Architecture: A VLIW Microprocessor for Multimedia Applications'
8872 (Mitsubishi Electric Corp.). `as' implements all the standard D30V
8873 opcodes. The only changes are those described in the section on size
8877 File: as.info, Node: H8/300-Dependent, Next: HPPA-Dependent, Prev: D30V-Dependent, Up: Machine Dependencies
8879 9.10 H8/300 Dependent Features
8880 ==============================
8884 * H8/300 Options:: Options
8885 * H8/300 Syntax:: Syntax
8886 * H8/300 Floating Point:: Floating Point
8887 * H8/300 Directives:: H8/300 Machine Directives
8888 * H8/300 Opcodes:: Opcodes
8891 File: as.info, Node: H8/300 Options, Next: H8/300 Syntax, Up: H8/300-Dependent
8896 The Renesas H8/300 version of `as' has one machine-dependent option:
8899 Support H'00 style hex constants in addition to 0x00 style.
8903 File: as.info, Node: H8/300 Syntax, Next: H8/300 Floating Point, Prev: H8/300 Options, Up: H8/300-Dependent
8910 * H8/300-Chars:: Special Characters
8911 * H8/300-Regs:: Register Names
8912 * H8/300-Addressing:: Addressing Modes
8915 File: as.info, Node: H8/300-Chars, Next: H8/300-Regs, Up: H8/300 Syntax
8917 9.10.2.1 Special Characters
8918 ...........................
8920 `;' is the line comment character.
8922 `$' can be used instead of a newline to separate statements.
8923 Therefore _you may not use `$' in symbol names_ on the H8/300.
8926 File: as.info, Node: H8/300-Regs, Next: H8/300-Addressing, Prev: H8/300-Chars, Up: H8/300 Syntax
8928 9.10.2.2 Register Names
8929 .......................
8931 You can use predefined symbols of the form `rNh' and `rNl' to refer to
8932 the H8/300 registers as sixteen 8-bit general-purpose registers. N is
8933 a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid
8936 You can also use the eight predefined symbols `rN' to refer to the
8937 H8/300 registers as 16-bit registers (you must use this form for
8940 On the H8/300H, you can also use the eight predefined symbols `erN'
8941 (`er0' ... `er7') to refer to the 32-bit general purpose registers.
8943 The two control registers are called `pc' (program counter; a 16-bit
8944 register, except on the H8/300H where it is 24 bits) and `ccr'
8945 (condition code register; an 8-bit register). `r7' is used as the
8946 stack pointer, and can also be called `sp'.
8949 File: as.info, Node: H8/300-Addressing, Prev: H8/300-Regs, Up: H8/300 Syntax
8951 9.10.2.3 Addressing Modes
8952 .........................
8954 as understands the following addressing modes for the H8/300:
8964 Register indirect: 16-bit or 24-bit displacement D from register
8965 N. (24-bit displacements are only meaningful on the H8/300H.)
8968 Register indirect with post-increment
8971 Register indirect with pre-decrement
8977 Absolute address `aa'. (The address size `:24' only makes sense
8984 Immediate data XX. You may specify the `:8', `:16', or `:32' for
8985 clarity, if you wish; but `as' neither requires this nor uses
8986 it--the data size required is taken from context.
8990 Memory indirect. You may specify the `:8' for clarity, if you
8991 wish; but `as' neither requires this nor uses it.
8994 File: as.info, Node: H8/300 Floating Point, Next: H8/300 Directives, Prev: H8/300 Syntax, Up: H8/300-Dependent
8996 9.10.3 Floating Point
8997 ---------------------
8999 The H8/300 family has no hardware floating point, but the `.float'
9000 directive generates IEEE floating-point numbers for compatibility with
9001 other development tools.
9004 File: as.info, Node: H8/300 Directives, Next: H8/300 Opcodes, Prev: H8/300 Floating Point, Up: H8/300-Dependent
9006 9.10.4 H8/300 Machine Directives
9007 --------------------------------
9009 `as' has the following machine-dependent directives for the H8/300:
9012 Recognize and emit additional instructions for the H8/300H
9013 variant, and also make `.int' emit 32-bit numbers rather than the
9014 usual (16-bit) for the H8/300 family.
9017 Recognize and emit additional instructions for the H8S variant, and
9018 also make `.int' emit 32-bit numbers rather than the usual (16-bit)
9019 for the H8/300 family.
9022 Recognize and emit additional instructions for the H8/300H variant
9023 in normal mode, and also make `.int' emit 32-bit numbers rather
9024 than the usual (16-bit) for the H8/300 family.
9027 Recognize and emit additional instructions for the H8S variant in
9028 normal mode, and also make `.int' emit 32-bit numbers rather than
9029 the usual (16-bit) for the H8/300 family.
9031 On the H8/300 family (including the H8/300H) `.word' directives
9032 generate 16-bit numbers.
9035 File: as.info, Node: H8/300 Opcodes, Prev: H8/300 Directives, Up: H8/300-Dependent
9040 For detailed information on the H8/300 machine instruction set, see
9041 `H8/300 Series Programming Manual'. For information specific to the
9042 H8/300H, see `H8/300H Series Programming Manual' (Renesas).
9044 `as' implements all the standard H8/300 opcodes. No additional
9045 pseudo-instructions are needed on this family.
9047 The following table summarizes the H8/300 opcodes, and their
9048 arguments. Entries marked `*' are opcodes used only on the H8/300H.
9052 Rd destination register
9053 abs absolute address
9055 disp:N N-bit displacement from a register
9056 pcrel:N N-bit displacement relative to program counter
9058 add.b #imm,rd * andc #imm,ccr
9059 add.b rs,rd band #imm,rd
9060 add.w rs,rd band #imm,@rd
9061 * add.w #imm,rd band #imm,@abs:8
9062 * add.l rs,rd bra pcrel:8
9063 * add.l #imm,rd * bra pcrel:16
9064 adds #imm,rd bt pcrel:8
9065 addx #imm,rd * bt pcrel:16
9066 addx rs,rd brn pcrel:8
9067 and.b #imm,rd * brn pcrel:16
9068 and.b rs,rd bf pcrel:8
9069 * and.w rs,rd * bf pcrel:16
9070 * and.w #imm,rd bhi pcrel:8
9071 * and.l #imm,rd * bhi pcrel:16
9072 * and.l rs,rd bls pcrel:8
9074 * bls pcrel:16 bld #imm,rd
9075 bcc pcrel:8 bld #imm,@rd
9076 * bcc pcrel:16 bld #imm,@abs:8
9077 bhs pcrel:8 bnot #imm,rd
9078 * bhs pcrel:16 bnot #imm,@rd
9079 bcs pcrel:8 bnot #imm,@abs:8
9080 * bcs pcrel:16 bnot rs,rd
9081 blo pcrel:8 bnot rs,@rd
9082 * blo pcrel:16 bnot rs,@abs:8
9083 bne pcrel:8 bor #imm,rd
9084 * bne pcrel:16 bor #imm,@rd
9085 beq pcrel:8 bor #imm,@abs:8
9086 * beq pcrel:16 bset #imm,rd
9087 bvc pcrel:8 bset #imm,@rd
9088 * bvc pcrel:16 bset #imm,@abs:8
9089 bvs pcrel:8 bset rs,rd
9090 * bvs pcrel:16 bset rs,@rd
9091 bpl pcrel:8 bset rs,@abs:8
9092 * bpl pcrel:16 bsr pcrel:8
9093 bmi pcrel:8 bsr pcrel:16
9094 * bmi pcrel:16 bst #imm,rd
9095 bge pcrel:8 bst #imm,@rd
9096 * bge pcrel:16 bst #imm,@abs:8
9097 blt pcrel:8 btst #imm,rd
9098 * blt pcrel:16 btst #imm,@rd
9099 bgt pcrel:8 btst #imm,@abs:8
9100 * bgt pcrel:16 btst rs,rd
9101 ble pcrel:8 btst rs,@rd
9102 * ble pcrel:16 btst rs,@abs:8
9103 bclr #imm,rd bxor #imm,rd
9104 bclr #imm,@rd bxor #imm,@rd
9105 bclr #imm,@abs:8 bxor #imm,@abs:8
9106 bclr rs,rd cmp.b #imm,rd
9107 bclr rs,@rd cmp.b rs,rd
9108 bclr rs,@abs:8 cmp.w rs,rd
9109 biand #imm,rd cmp.w rs,rd
9110 biand #imm,@rd * cmp.w #imm,rd
9111 biand #imm,@abs:8 * cmp.l #imm,rd
9112 bild #imm,rd * cmp.l rs,rd
9113 bild #imm,@rd daa rs
9114 bild #imm,@abs:8 das rs
9115 bior #imm,rd dec.b rs
9116 bior #imm,@rd * dec.w #imm,rd
9117 bior #imm,@abs:8 * dec.l #imm,rd
9118 bist #imm,rd divxu.b rs,rd
9119 bist #imm,@rd * divxu.w rs,rd
9120 bist #imm,@abs:8 * divxs.b rs,rd
9121 bixor #imm,rd * divxs.w rs,rd
9122 bixor #imm,@rd eepmov
9123 bixor #imm,@abs:8 * eepmovw
9125 * exts.w rd mov.w rs,@abs:16
9126 * exts.l rd * mov.l #imm,rd
9127 * extu.w rd * mov.l rs,rd
9128 * extu.l rd * mov.l @rs,rd
9129 inc rs * mov.l @(disp:16,rs),rd
9130 * inc.w #imm,rd * mov.l @(disp:24,rs),rd
9131 * inc.l #imm,rd * mov.l @rs+,rd
9132 jmp @rs * mov.l @abs:16,rd
9133 jmp abs * mov.l @abs:24,rd
9134 jmp @@abs:8 * mov.l rs,@rd
9135 jsr @rs * mov.l rs,@(disp:16,rd)
9136 jsr abs * mov.l rs,@(disp:24,rd)
9137 jsr @@abs:8 * mov.l rs,@-rd
9138 ldc #imm,ccr * mov.l rs,@abs:16
9139 ldc rs,ccr * mov.l rs,@abs:24
9140 * ldc @abs:16,ccr movfpe @abs:16,rd
9141 * ldc @abs:24,ccr movtpe rs,@abs:16
9142 * ldc @(disp:16,rs),ccr mulxu.b rs,rd
9143 * ldc @(disp:24,rs),ccr * mulxu.w rs,rd
9144 * ldc @rs+,ccr * mulxs.b rs,rd
9145 * ldc @rs,ccr * mulxs.w rs,rd
9146 * mov.b @(disp:24,rs),rd neg.b rs
9147 * mov.b rs,@(disp:24,rd) * neg.w rs
9148 mov.b @abs:16,rd * neg.l rs
9150 mov.b @abs:8,rd not.b rs
9151 mov.b rs,@abs:8 * not.w rs
9152 mov.b rs,rd * not.l rs
9153 mov.b #imm,rd or.b #imm,rd
9154 mov.b @rs,rd or.b rs,rd
9155 mov.b @(disp:16,rs),rd * or.w #imm,rd
9156 mov.b @rs+,rd * or.w rs,rd
9157 mov.b @abs:8,rd * or.l #imm,rd
9158 mov.b rs,@rd * or.l rs,rd
9159 mov.b rs,@(disp:16,rd) orc #imm,ccr
9160 mov.b rs,@-rd pop.w rs
9161 mov.b rs,@abs:8 * pop.l rs
9162 mov.w rs,@rd push.w rs
9163 * mov.w @(disp:24,rs),rd * push.l rs
9164 * mov.w rs,@(disp:24,rd) rotl.b rs
9165 * mov.w @abs:24,rd * rotl.w rs
9166 * mov.w rs,@abs:24 * rotl.l rs
9167 mov.w rs,rd rotr.b rs
9168 mov.w #imm,rd * rotr.w rs
9169 mov.w @rs,rd * rotr.l rs
9170 mov.w @(disp:16,rs),rd rotxl.b rs
9171 mov.w @rs+,rd * rotxl.w rs
9172 mov.w @abs:16,rd * rotxl.l rs
9173 mov.w rs,@(disp:16,rd) rotxr.b rs
9174 mov.w rs,@-rd * rotxr.w rs
9176 * rotxr.l rs * stc ccr,@(disp:24,rd)
9178 rte * stc ccr,@abs:16
9179 rts * stc ccr,@abs:24
9180 shal.b rs sub.b rs,rd
9181 * shal.w rs sub.w rs,rd
9182 * shal.l rs * sub.w #imm,rd
9183 shar.b rs * sub.l rs,rd
9184 * shar.w rs * sub.l #imm,rd
9185 * shar.l rs subs #imm,rd
9186 shll.b rs subx #imm,rd
9187 * shll.w rs subx rs,rd
9188 * shll.l rs * trapa #imm
9189 shlr.b rs xor #imm,rd
9190 * shlr.w rs xor rs,rd
9191 * shlr.l rs * xor.w #imm,rd
9193 stc ccr,rd * xor.l #imm,rd
9194 * stc ccr,@rs * xor.l rs,rd
9195 * stc ccr,@(disp:16,rd) xorc #imm,ccr
9197 Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined
9198 with variants using the suffixes `.b', `.w', and `.l' to specify the
9199 size of a memory operand. `as' supports these suffixes, but does not
9200 require them; since one of the operands is always a register, `as' can
9201 deduce the correct size.
9203 For example, since `r0' refers to a 16-bit register,
9208 If you use the size suffixes, `as' issues a warning when the suffix
9209 and the register size do not match.
9212 File: as.info, Node: HPPA-Dependent, Next: ESA/390-Dependent, Prev: H8/300-Dependent, Up: Machine Dependencies
9214 9.11 HPPA Dependent Features
9215 ============================
9219 * HPPA Notes:: Notes
9220 * HPPA Options:: Options
9221 * HPPA Syntax:: Syntax
9222 * HPPA Floating Point:: Floating Point
9223 * HPPA Directives:: HPPA Machine Directives
9224 * HPPA Opcodes:: Opcodes
9227 File: as.info, Node: HPPA Notes, Next: HPPA Options, Up: HPPA-Dependent
9232 As a back end for GNU CC `as' has been throughly tested and should work
9233 extremely well. We have tested it only minimally on hand written
9234 assembly code and no one has tested it much on the assembly output from
9237 The format of the debugging sections has changed since the original
9238 `as' port (version 1.3X) was released; therefore, you must rebuild all
9239 HPPA objects and libraries with the new assembler so that you can debug
9240 the final executable.
9242 The HPPA `as' port generates a small subset of the relocations
9243 available in the SOM and ELF object file formats. Additional relocation
9244 support will be added as it becomes necessary.
9247 File: as.info, Node: HPPA Options, Next: HPPA Syntax, Prev: HPPA Notes, Up: HPPA-Dependent
9252 `as' has no machine-dependent command-line options for the HPPA.
9255 File: as.info, Node: HPPA Syntax, Next: HPPA Floating Point, Prev: HPPA Options, Up: HPPA-Dependent
9260 The assembler syntax closely follows the HPPA instruction set reference
9261 manual; assembler directives and general syntax closely follow the HPPA
9262 assembly language reference manual, with a few noteworthy differences.
9264 First, a colon may immediately follow a label definition. This is
9265 simply for compatibility with how most assembly language programmers
9268 Some obscure expression parsing problems may affect hand written
9269 code which uses the `spop' instructions, or code which makes significant
9270 use of the `!' line separator.
9272 `as' is much less forgiving about missing arguments and other
9273 similar oversights than the HP assembler. `as' notifies you of missing
9274 arguments as syntax errors; this is regarded as a feature, not a bug.
9276 Finally, `as' allows you to use an external symbol without
9277 explicitly importing the symbol. _Warning:_ in the future this will be
9278 an error for HPPA targets.
9280 Special characters for HPPA targets include:
9282 `;' is the line comment character.
9284 `!' can be used instead of a newline to separate statements.
9286 Since `$' has no special meaning, you may use it in symbol names.
9289 File: as.info, Node: HPPA Floating Point, Next: HPPA Directives, Prev: HPPA Syntax, Up: HPPA-Dependent
9291 9.11.4 Floating Point
9292 ---------------------
9294 The HPPA family uses IEEE floating-point numbers.
9297 File: as.info, Node: HPPA Directives, Next: HPPA Opcodes, Prev: HPPA Floating Point, Up: HPPA-Dependent
9299 9.11.5 HPPA Assembler Directives
9300 --------------------------------
9302 `as' for the HPPA supports many additional directives for compatibility
9303 with the native assembler. This section describes them only briefly.
9304 For detailed information on HPPA-specific assembler directives, see
9305 `HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001).
9307 `as' does _not_ support the following assembler directives described
9315 Beyond those implemented for compatibility, `as' supports one
9316 additional assembler directive for the HPPA: `.param'. It conveys
9317 register argument locations for static functions. Its syntax closely
9318 follows the `.export' directive.
9320 These are the additional directives in `as' for the HPPA:
9324 Reserve N bytes of storage, and initialize them to zero.
9327 Mark the beginning of a procedure call. Only the special case
9328 with _no arguments_ is allowed.
9330 `.callinfo [ PARAM=VALUE, ... ] [ FLAG, ... ]'
9331 Specify a number of parameters and flags that define the
9332 environment for a procedure.
9334 PARAM may be any of `frame' (frame size), `entry_gr' (end of
9335 general register range), `entry_fr' (end of float register range),
9336 `entry_sr' (end of space register range).
9338 The values for FLAG are `calls' or `caller' (proc has
9339 subroutines), `no_calls' (proc does not call subroutines),
9340 `save_rp' (preserve return pointer), `save_sp' (proc preserves
9341 stack pointer), `no_unwind' (do not unwind this proc), `hpux_int'
9342 (proc is interrupt routine).
9345 Assemble into the standard section called `$TEXT$', subsection
9348 `.copyright "STRING"'
9349 In the SOM object format, insert STRING into the object code,
9350 marked as a copyright string.
9352 `.copyright "STRING"'
9353 In the ELF object format, insert STRING into the object code,
9354 marked as a version string.
9357 Not yet supported; the assembler rejects programs containing this
9361 Mark the beginning of a procedure.
9364 Mark the end of a procedure.
9366 `.export NAME [ ,TYP ] [ ,PARAM=R ]'
9367 Make a procedure NAME available to callers. TYP, if present, must
9368 be one of `absolute', `code' (ELF only, not SOM), `data', `entry',
9369 `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'.
9371 PARAM, if present, provides either relocation information for the
9372 procedure arguments and result, or a privilege level. PARAM may be
9373 `argwN' (where N ranges from `0' to `3', and indicates one of four
9374 one-word arguments); `rtnval' (the procedure's result); or
9375 `priv_lev' (privilege level). For arguments or the result, R
9376 specifies how to relocate, and must be one of `no' (not
9377 relocatable), `gr' (argument is in general register), `fr' (in
9378 floating point register), or `fu' (upper half of float register).
9379 For `priv_lev', R is an integer.
9382 Define a two-byte integer constant N; synonym for the portable
9383 `as' directive `.short'.
9385 `.import NAME [ ,TYP ]'
9386 Converse of `.export'; make a procedure available to call. The
9387 arguments use the same conventions as the first two arguments for
9391 Define NAME as a label for the current assembly location.
9394 Not yet supported; the assembler rejects programs containing this
9398 Advance location counter to LC. Synonym for the `as' portable
9401 `.param NAME [ ,TYP ] [ ,PARAM=R ]'
9402 Similar to `.export', but used for static procedures.
9405 Use preceding the first statement of a procedure.
9408 Use following the last statement of a procedure.
9411 Synonym for `.equ'; define LABEL with the absolute expression EXPR
9414 `.space SECNAME [ ,PARAMS ]'
9415 Switch to section SECNAME, creating a new section by that name if
9416 necessary. You may only use PARAMS when creating a new section,
9417 not when switching to an existing one. SECNAME may identify a
9418 section by number rather than by name.
9420 If specified, the list PARAMS declares attributes of the section,
9421 identified by keywords. The keywords recognized are `spnum=EXP'
9422 (identify this section by the number EXP, an absolute expression),
9423 `sort=EXP' (order sections according to this sort key when linking;
9424 EXP is an absolute expression), `unloadable' (section contains no
9425 loadable data), `notdefined' (this section defined elsewhere), and
9426 `private' (data in this section not available to other programs).
9429 Allocate four bytes of storage, and initialize them with the
9430 section number of the section named SECNAM. (You can define the
9431 section number with the HPPA `.space' directive.)
9434 Copy the characters in the string STR to the object file. *Note
9435 Strings: Strings, for information on escape sequences you can use
9438 _Warning!_ The HPPA version of `.string' differs from the usual
9439 `as' definition: it does _not_ write a zero byte after copying STR.
9442 Like `.string', but appends a zero byte after copying STR to object
9445 `.subspa NAME [ ,PARAMS ]'
9446 `.nsubspa NAME [ ,PARAMS ]'
9447 Similar to `.space', but selects a subsection NAME within the
9448 current section. You may only specify PARAMS when you create a
9449 subsection (in the first instance of `.subspa' for this NAME).
9451 If specified, the list PARAMS declares attributes of the
9452 subsection, identified by keywords. The keywords recognized are
9453 `quad=EXPR' ("quadrant" for this subsection), `align=EXPR'
9454 (alignment for beginning of this subsection; a power of two),
9455 `access=EXPR' (value for "access rights" field), `sort=EXPR'
9456 (sorting order for this subspace in link), `code_only' (subsection
9457 contains only code), `unloadable' (subsection cannot be loaded
9458 into memory), `comdat' (subsection is comdat), `common'
9459 (subsection is common block), `dup_comm' (subsection may have
9460 duplicate names), or `zero' (subsection is all zeros, do not write
9463 `.nsubspa' always creates a new subspace with the given name, even
9464 if one with the same name already exists.
9466 `comdat', `common' and `dup_comm' can be used to implement various
9467 flavors of one-only support when using the SOM linker. The SOM
9468 linker only supports specific combinations of these flags. The
9469 details are not documented. A brief description is provided here.
9471 `comdat' provides a form of linkonce support. It is useful for
9472 both code and data subspaces. A `comdat' subspace has a key symbol
9473 marked by the `is_comdat' flag or `ST_COMDAT'. Only the first
9474 subspace for any given key is selected. The key symbol becomes
9475 universal in shared links. This is similar to the behavior of
9476 `secondary_def' symbols.
9478 `common' provides Fortran named common support. It is only useful
9479 for data subspaces. Symbols with the flag `is_common' retain this
9480 flag in shared links. Referencing a `is_common' symbol in a shared
9481 library from outside the library doesn't work. Thus, `is_common'
9482 symbols must be output whenever they are needed.
9484 `common' and `dup_comm' together provide Cobol common support.
9485 The subspaces in this case must all be the same length.
9486 Otherwise, this support is similar to the Fortran common support.
9488 `dup_comm' by itself provides a type of one-only support for code.
9489 Only the first `dup_comm' subspace is selected. There is a rather
9490 complex algorithm to compare subspaces. Code symbols marked with
9491 the `dup_common' flag are hidden. This support was intended for
9492 "C++ duplicate inlines".
9494 A simplified technique is used to mark the flags of symbols based
9495 on the flags of their subspace. A symbol with the scope
9496 SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with
9497 the corresponding settings of `comdat', `common' and `dup_comm'
9498 from the subspace, respectively. This avoids having to introduce
9499 additional directives to mark these symbols. The HP assembler
9500 sets `is_common' from `common'. However, it doesn't set the
9501 `dup_common' from `dup_comm'. It doesn't have `comdat' support.
9504 Write STR as version identifier in object code.
9507 File: as.info, Node: HPPA Opcodes, Prev: HPPA Directives, Up: HPPA-Dependent
9512 For detailed information on the HPPA machine instruction set, see
9513 `PA-RISC Architecture and Instruction Set Reference Manual' (HP
9517 File: as.info, Node: ESA/390-Dependent, Next: i386-Dependent, Prev: HPPA-Dependent, Up: Machine Dependencies
9519 9.12 ESA/390 Dependent Features
9520 ===============================
9524 * ESA/390 Notes:: Notes
9525 * ESA/390 Options:: Options
9526 * ESA/390 Syntax:: Syntax
9527 * ESA/390 Floating Point:: Floating Point
9528 * ESA/390 Directives:: ESA/390 Machine Directives
9529 * ESA/390 Opcodes:: Opcodes
9532 File: as.info, Node: ESA/390 Notes, Next: ESA/390 Options, Up: ESA/390-Dependent
9537 The ESA/390 `as' port is currently intended to be a back-end for the
9538 GNU CC compiler. It is not HLASM compatible, although it does support
9539 a subset of some of the HLASM directives. The only supported binary
9540 file format is ELF; none of the usual MVS/VM/OE/USS object file
9541 formats, such as ESD or XSD, are supported.
9543 When used with the GNU CC compiler, the ESA/390 `as' will produce
9544 correct, fully relocated, functional binaries, and has been used to
9545 compile and execute large projects. However, many aspects should still
9546 be considered experimental; these include shared library support,
9547 dynamically loadable objects, and any relocation other than the 31-bit
9551 File: as.info, Node: ESA/390 Options, Next: ESA/390 Syntax, Prev: ESA/390 Notes, Up: ESA/390-Dependent
9556 `as' has no machine-dependent command-line options for the ESA/390.
9559 File: as.info, Node: ESA/390 Syntax, Next: ESA/390 Floating Point, Prev: ESA/390 Options, Up: ESA/390-Dependent
9564 The opcode/operand syntax follows the ESA/390 Principles of Operation
9565 manual; assembler directives and general syntax are loosely based on the
9566 prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives
9567 are _not_ supported for the most part, with the exception of those
9570 A leading dot in front of directives is optional, and the case of
9571 directives is ignored; thus for example, .using and USING have the same
9574 A colon may immediately follow a label definition. This is simply
9575 for compatibility with how most assembly language programmers write
9578 `#' is the line comment character.
9580 `;' can be used instead of a newline to separate statements.
9582 Since `$' has no special meaning, you may use it in symbol names.
9584 Registers can be given the symbolic names r0..r15, fp0, fp2, fp4,
9585 fp6. By using thesse symbolic names, `as' can detect simple syntax
9586 errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for
9587 r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
9588 for r3 and rpgt or r.pgt for r4.
9590 `*' is the current location counter. Unlike `.' it is always
9591 relative to the last USING directive. Note that this means that
9592 expressions cannot use multiplication, as any occurrence of `*' will be
9593 interpreted as a location counter.
9595 All labels are relative to the last USING. Thus, branches to a label
9596 always imply the use of base+displacement.
9598 Many of the usual forms of address constants / address literals are
9601 L r15,=A(some_routine)
9602 LM r6,r7,=V(some_longlong_extern)
9606 MD r6,=D'3.14159265358979'
9609 should all behave as expected: that is, an entry in the literal pool
9610 will be created (or reused if it already exists), and the instruction
9611 operands will be the displacement into the literal pool using the
9612 current base register (as last declared with the `.using' directive).
9615 File: as.info, Node: ESA/390 Floating Point, Next: ESA/390 Directives, Prev: ESA/390 Syntax, Up: ESA/390-Dependent
9617 9.12.4 Floating Point
9618 ---------------------
9620 The assembler generates only IEEE floating-point numbers. The older
9621 floating point formats are not supported.
9624 File: as.info, Node: ESA/390 Directives, Next: ESA/390 Opcodes, Prev: ESA/390 Floating Point, Up: ESA/390-Dependent
9626 9.12.5 ESA/390 Assembler Directives
9627 -----------------------------------
9629 `as' for the ESA/390 supports all of the standard ELF/SVR4 assembler
9630 directives that are documented in the main part of this documentation.
9631 Several additional directives are supported in order to implement the
9632 ESA/390 addressing model. The most important of these are `.using' and
9635 These are the additional directives in `as' for the ESA/390:
9638 A small subset of the usual DC directive is supported.
9641 Stop using REGNO as the base register. The REGNO must have been
9642 previously declared with a `.using' directive in the same section
9643 as the current section.
9646 Emit the EBCDIC equivalent of the indicated string. The emitted
9647 string will be null terminated. Note that the directives
9648 `.string' etc. emit ascii strings by default.
9651 The standard HLASM-style EQU directive is not supported; however,
9652 the standard `as' directive .equ can be used to the same effect.
9655 Dump the literal pool accumulated so far; begin a new literal pool.
9656 The literal pool will be written in the current section; in order
9657 to generate correct assembly, a `.using' must have been previously
9658 specified in the same section.
9661 Use REGNO as the base register for all subsequent RX, RS, and SS
9662 form instructions. The EXPR will be evaluated to obtain the base
9663 address; usually, EXPR will merely be `*'.
9665 This assembler allows two `.using' directives to be simultaneously
9666 outstanding, one in the `.text' section, and one in another section
9667 (typically, the `.data' section). This feature allows dynamically
9668 loaded objects to be implemented in a relatively straightforward
9669 way. A `.using' directive must always be specified in the `.text'
9670 section; this will specify the base register that will be used for
9671 branches in the `.text' section. A second `.using' may be
9672 specified in another section; this will specify the base register
9673 that is used for non-label address literals. When a second
9674 `.using' is specified, then the subsequent `.ltorg' must be put in
9675 the same section; otherwise an error will result.
9677 Thus, for example, the following code uses `r3' to address branch
9678 targets and `r4' to address the literal pool, which has been
9679 written to the `.data' section. The is, the constants
9680 `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in
9681 the `.data' section.
9692 L r15,=A(some_routine)
9702 Note that this dual-`.using' directive semantics extends and is
9703 not compatible with HLASM semantics. Note that this assembler
9704 directive does not support the full range of HLASM semantics.
9708 File: as.info, Node: ESA/390 Opcodes, Prev: ESA/390 Directives, Up: ESA/390-Dependent
9713 For detailed information on the ESA/390 machine instruction set, see
9714 `ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004).
9717 File: as.info, Node: i386-Dependent, Next: i860-Dependent, Prev: ESA/390-Dependent, Up: Machine Dependencies
9719 9.13 80386 Dependent Features
9720 =============================
9722 The i386 version `as' supports both the original Intel 386
9723 architecture in both 16 and 32-bit mode as well as AMD x86-64
9724 architecture extending the Intel architecture to 64-bits.
9728 * i386-Options:: Options
9729 * i386-Directives:: X86 specific directives
9730 * i386-Syntax:: Syntactical considerations
9731 * i386-Mnemonics:: Instruction Naming
9732 * i386-Regs:: Register Naming
9733 * i386-Prefixes:: Instruction Prefixes
9734 * i386-Memory:: Memory References
9735 * i386-Jumps:: Handling of Jump Instructions
9736 * i386-Float:: Floating Point
9737 * i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations
9738 * i386-LWP:: AMD's Lightweight Profiling Instructions
9739 * i386-BMI:: Bit Manipulation Instruction
9740 * i386-TBM:: AMD's Trailing Bit Manipulation Instructions
9741 * i386-16bit:: Writing 16-bit Code
9742 * i386-Arch:: Specifying an x86 CPU architecture
9743 * i386-Bugs:: AT&T Syntax bugs
9744 * i386-Notes:: Notes
9747 File: as.info, Node: i386-Options, Next: i386-Directives, Up: i386-Dependent
9752 The i386 version of `as' has a few machine dependent options:
9754 `--32 | --x32 | --64'
9755 Select the word size, either 32 bits or 64 bits. `--32' implies
9756 Intel i386 architecture, while `--x32' and `--64' imply AMD x86-64
9757 architecture with 32-bit or 64-bit word-size respectively.
9759 These options are only available with the ELF object file format,
9760 and require that the necessary BFD support has been included (on a
9761 32-bit platform you have to add -enable-64-bit-bfd to configure
9762 enable 64-bit usage and use x86-64 as target platform).
9765 By default, x86 GAS replaces multiple nop instructions used for
9766 alignment within code sections with multi-byte nop instructions
9767 such as leal 0(%esi,1),%esi. This switch disables the
9771 On SVR4-derived platforms, the character `/' is treated as a
9772 comment character, which means that it cannot be used in
9773 expressions. The `--divide' option turns `/' into a normal
9774 character. This does not disable `/' at the beginning of a line
9775 starting a comment, or affect using `#' for starting a comment.
9777 `-march=CPU[+EXTENSION...]'
9778 This option specifies the target processor. The assembler will
9779 issue an error message if an attempt is made to assemble an
9780 instruction which will not execute on the target processor. The
9781 following processor names are recognized: `i8086', `i186', `i286',
9782 `i386', `i486', `i586', `i686', `pentium', `pentiumpro',
9783 `pentiumii', `pentiumiii', `pentium4', `prescott', `nocona',
9784 `core', `core2', `corei7', `l1om', `k1om', `k6', `k6_2', `athlon',
9785 `opteron', `k8', `amdfam10', `bdver1', `bdver2', `generic32' and
9788 In addition to the basic instruction set, the assembler can be
9789 told to accept various extension mnemonics. For example,
9790 `-march=i686+sse4+vmx' extends I686 with SSE4 and VMX. The
9791 following extensions are currently supported: `8087', `287', `387',
9792 `no87', `mmx', `nommx', `sse', `sse2', `sse3', `ssse3', `sse4.1',
9793 `sse4.2', `sse4', `nosse', `avx', `avx2', `noavx', `vmx', `smx',
9794 `xsave', `xsaveopt', `aes', `pclmul', `fsgsbase', `rdrnd', `f16c',
9795 `bmi2', `fma', `movbe', `ept', `lzcnt', `invpcid', `clflush',
9796 `lwp', `fma4', `xop', `syscall', `rdtscp', `3dnow', `3dnowa',
9797 `sse4a', `sse5', `svme', `abm' and `padlock'. Note that rather
9798 than extending a basic instruction set, the extension mnemonics
9799 starting with `no' revoke the respective functionality.
9801 When the `.arch' directive is used with `-march', the `.arch'
9802 directive will take precedent.
9805 This option specifies a processor to optimize for. When used in
9806 conjunction with the `-march' option, only instructions of the
9807 processor specified by the `-march' option will be generated.
9809 Valid CPU values are identical to the processor list of
9813 This option specifies that the assembler should encode SSE
9814 instructions with VEX prefix.
9817 `-msse-check=WARNING'
9819 These options control if the assembler should check SSE
9820 intructions. `-msse-check=NONE' will make the assembler not to
9821 check SSE instructions, which is the default.
9822 `-msse-check=WARNING' will make the assembler issue a warning for
9823 any SSE intruction. `-msse-check=ERROR' will make the assembler
9824 issue an error for any SSE intruction.
9828 These options control how the assembler should encode scalar AVX
9829 instructions. `-mavxscalar=128' will encode scalar AVX
9830 instructions with 128bit vector length, which is the default.
9831 `-mavxscalar=256' will encode scalar AVX instructions with 256bit
9836 This option specifies instruction mnemonic for matching
9837 instructions. The `.att_mnemonic' and `.intel_mnemonic'
9838 directives will take precedent.
9842 This option specifies instruction syntax when processing
9843 instructions. The `.att_syntax' and `.intel_syntax' directives
9844 will take precedent.
9847 This opetion specifies that registers don't require a `%' prefix.
9848 The `.att_syntax' and `.intel_syntax' directives will take
9853 File: as.info, Node: i386-Directives, Next: i386-Syntax, Prev: i386-Options, Up: i386-Dependent
9855 9.13.2 x86 specific Directives
9856 ------------------------------
9858 `.lcomm SYMBOL , LENGTH[, ALIGNMENT]'
9859 Reserve LENGTH (an absolute expression) bytes for a local common
9860 denoted by SYMBOL. The section and value of SYMBOL are those of
9861 the new local common. The addresses are allocated in the bss
9862 section, so that at run-time the bytes start off zeroed. Since
9863 SYMBOL is not declared global, it is normally not visible to `ld'.
9864 The optional third parameter, ALIGNMENT, specifies the desired
9865 alignment of the symbol in the bss section.
9867 This directive is only available for COFF based x86 targets.
9871 File: as.info, Node: i386-Syntax, Next: i386-Mnemonics, Prev: i386-Directives, Up: i386-Dependent
9873 9.13.3 i386 Syntactical Considerations
9874 --------------------------------------
9878 * i386-Variations:: AT&T Syntax versus Intel Syntax
9879 * i386-Chars:: Special Characters
9882 File: as.info, Node: i386-Variations, Next: i386-Chars, Up: i386-Syntax
9884 9.13.3.1 AT&T Syntax versus Intel Syntax
9885 ........................................
9887 `as' now supports assembly using Intel assembler syntax.
9888 `.intel_syntax' selects Intel mode, and `.att_syntax' switches back to
9889 the usual AT&T mode for compatibility with the output of `gcc'. Either
9890 of these directives may have an optional argument, `prefix', or
9891 `noprefix' specifying whether registers require a `%' prefix. AT&T
9892 System V/386 assembler syntax is quite different from Intel syntax. We
9893 mention these differences because almost all 80386 documents use Intel
9894 syntax. Notable differences between the two syntaxes are:
9896 * AT&T immediate operands are preceded by `$'; Intel immediate
9897 operands are undelimited (Intel `push 4' is AT&T `pushl $4').
9898 AT&T register operands are preceded by `%'; Intel register operands
9899 are undelimited. AT&T absolute (as opposed to PC relative)
9900 jump/call operands are prefixed by `*'; they are undelimited in
9903 * AT&T and Intel syntax use the opposite order for source and
9904 destination operands. Intel `add eax, 4' is `addl $4, %eax'. The
9905 `source, dest' convention is maintained for compatibility with
9906 previous Unix assemblers. Note that `bound', `invlpga', and
9907 instructions with 2 immediate operands, such as the `enter'
9908 instruction, do _not_ have reversed order. *Note i386-Bugs::.
9910 * In AT&T syntax the size of memory operands is determined from the
9911 last character of the instruction mnemonic. Mnemonic suffixes of
9912 `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long
9913 (32-bit) and quadruple word (64-bit) memory references. Intel
9914 syntax accomplishes this by prefixing memory operands (_not_ the
9915 instruction mnemonics) with `byte ptr', `word ptr', `dword ptr'
9916 and `qword ptr'. Thus, Intel `mov al, byte ptr FOO' is `movb FOO,
9917 %al' in AT&T syntax.
9919 In 64-bit code, `movabs' can be used to encode the `mov'
9920 instruction with the 64-bit displacement or immediate operand.
9922 * Immediate form long jumps and calls are `lcall/ljmp $SECTION,
9923 $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far
9924 SECTION:OFFSET'. Also, the far return instruction is `lret
9925 $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far
9928 * The AT&T assembler does not provide support for multiple section
9929 programs. Unix style systems expect all programs to be single
9933 File: as.info, Node: i386-Chars, Prev: i386-Variations, Up: i386-Syntax
9935 9.13.3.2 Special Characters
9936 ...........................
9938 The presence of a `#' appearing anywhere on a line indicates the start
9939 of a comment that extends to the end of that line.
9941 If a `#' appears as the first character of a line then the whole
9942 line is treated as a comment, but in this case the line can also be a
9943 logical line number directive (*note Comments::) or a preprocessor
9944 control command (*note Preprocessing::).
9946 If the `--divide' command line option has not been specified then
9947 the `/' character appearing anywhere on a line also introduces a line
9950 The `;' character can be used to separate statements on the same
9954 File: as.info, Node: i386-Mnemonics, Next: i386-Regs, Prev: i386-Syntax, Up: i386-Dependent
9956 9.13.4 Instruction Naming
9957 -------------------------
9959 Instruction mnemonics are suffixed with one character modifiers which
9960 specify the size of operands. The letters `b', `w', `l' and `q'
9961 specify byte, word, long and quadruple word operands. If no suffix is
9962 specified by an instruction then `as' tries to fill in the missing
9963 suffix based on the destination register operand (the last one by
9964 convention). Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx';
9965 also, `mov $1, %bx' is equivalent to `movw $1, bx'. Note that this is
9966 incompatible with the AT&T Unix assembler which assumes that a missing
9967 mnemonic suffix implies long operand size. (This incompatibility does
9968 not affect compiler output since compilers always explicitly specify
9969 the mnemonic suffix.)
9971 Almost all instructions have the same names in AT&T and Intel format.
9972 There are a few exceptions. The sign extend and zero extend
9973 instructions need two sizes to specify them. They need a size to
9974 sign/zero extend _from_ and a size to zero extend _to_. This is
9975 accomplished by using two instruction mnemonic suffixes in AT&T syntax.
9976 Base names for sign extend and zero extend are `movs...' and `movz...'
9977 in AT&T syntax (`movsx' and `movzx' in Intel syntax). The instruction
9978 mnemonic suffixes are tacked on to this base name, the _from_ suffix
9979 before the _to_ suffix. Thus, `movsbl %al, %edx' is AT&T syntax for
9980 "move sign extend _from_ %al _to_ %edx." Possible suffixes, thus, are
9981 `bl' (from byte to long), `bw' (from byte to word), `wl' (from word to
9982 long), `bq' (from byte to quadruple word), `wq' (from word to quadruple
9983 word), and `lq' (from long to quadruple word).
9985 Different encoding options can be specified via optional mnemonic
9986 suffix. `.s' suffix swaps 2 register operands in encoding when moving
9987 from one register to another. `.d32' suffix forces 32bit displacement
9990 The Intel-syntax conversion instructions
9992 * `cbw' -- sign-extend byte in `%al' to word in `%ax',
9994 * `cwde' -- sign-extend word in `%ax' to long in `%eax',
9996 * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax',
9998 * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax',
10000 * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64
10003 * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax'
10006 are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T
10007 naming. `as' accepts either naming for these instructions.
10009 Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax,
10010 but are `call far' and `jump far' in Intel convention.
10012 9.13.5 AT&T Mnemonic versus Intel Mnemonic
10013 ------------------------------------------
10015 `as' supports assembly using Intel mnemonic. `.intel_mnemonic' selects
10016 Intel mnemonic with Intel syntax, and `.att_mnemonic' switches back to
10017 the usual AT&T mnemonic with AT&T syntax for compatibility with the
10018 output of `gcc'. Several x87 instructions, `fadd', `fdiv', `fdivp',
10019 `fdivr', `fdivrp', `fmul', `fsub', `fsubp', `fsubr' and `fsubrp', are
10020 implemented in AT&T System V/386 assembler with different mnemonics
10021 from those in Intel IA32 specification. `gcc' generates those
10022 instructions with AT&T mnemonic.
10025 File: as.info, Node: i386-Regs, Next: i386-Prefixes, Prev: i386-Mnemonics, Up: i386-Dependent
10027 9.13.6 Register Naming
10028 ----------------------
10030 Register operands are always prefixed with `%'. The 80386 registers
10033 * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx',
10034 `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp'
10035 (the stack pointer).
10037 * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di',
10038 `%si', `%bp', and `%sp'.
10040 * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl',
10041 `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax',
10042 `%bx', `%cx', and `%dx')
10044 * the 6 section registers `%cs' (code section), `%ds' (data
10045 section), `%ss' (stack section), `%es', `%fs', and `%gs'.
10047 * the 3 processor control registers `%cr0', `%cr2', and `%cr3'.
10049 * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and
10052 * the 2 test registers `%tr6' and `%tr7'.
10054 * the 8 floating point register stack `%st' or equivalently
10055 `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)',
10056 `%st(6)', and `%st(7)'. These registers are overloaded by 8 MMX
10057 registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6'
10060 * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3',
10061 `%xmm4', `%xmm5', `%xmm6' and `%xmm7'.
10063 The AMD x86-64 architecture extends the register set by:
10065 * enhancing the 8 32-bit registers to 64-bit: `%rax' (the
10066 accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the
10067 frame pointer), `%rsp' (the stack pointer)
10069 * the 8 extended registers `%r8'-`%r15'.
10071 * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d'
10073 * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w'
10075 * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b'
10077 * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'.
10079 * the 8 debug registers: `%db8'-`%db15'.
10081 * the 8 SSE registers: `%xmm8'-`%xmm15'.
10084 File: as.info, Node: i386-Prefixes, Next: i386-Memory, Prev: i386-Regs, Up: i386-Dependent
10086 9.13.7 Instruction Prefixes
10087 ---------------------------
10089 Instruction prefixes are used to modify the following instruction. They
10090 are used to repeat string instructions, to provide section overrides, to
10091 perform bus lock operations, and to change operand and address sizes.
10092 (Most instructions that normally operate on 32-bit operands will use
10093 16-bit operands if the instruction has an "operand size" prefix.)
10094 Instruction prefixes are best written on the same line as the
10095 instruction they act upon. For example, the `scas' (scan string)
10096 instruction is repeated with:
10098 repne scas %es:(%edi),%al
10100 You may also place prefixes on the lines immediately preceding the
10101 instruction, but this circumvents checks that `as' does with prefixes,
10102 and will not work with all prefixes.
10104 Here is a list of instruction prefixes:
10106 * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'.
10107 These are automatically added by specifying using the
10108 SECTION:MEMORY-OPERAND form for memory references.
10110 * Operand/Address size prefixes `data16' and `addr16' change 32-bit
10111 operands/addresses into 16-bit operands/addresses, while `data32'
10112 and `addr32' change 16-bit ones (in a `.code16' section) into
10113 32-bit operands/addresses. These prefixes _must_ appear on the
10114 same line of code as the instruction they modify. For example, in
10115 a 16-bit `.code16' section, you might write:
10117 addr32 jmpl *(%ebx)
10119 * The bus lock prefix `lock' inhibits interrupts during execution of
10120 the instruction it precedes. (This is only valid with certain
10121 instructions; see a 80386 manual for details).
10123 * The wait for coprocessor prefix `wait' waits for the coprocessor to
10124 complete the current instruction. This should never be needed for
10125 the 80386/80387 combination.
10127 * The `rep', `repe', and `repne' prefixes are added to string
10128 instructions to make them repeat `%ecx' times (`%cx' times if the
10129 current address size is 16-bits).
10131 * The `rex' family of prefixes is used by x86-64 to encode
10132 extensions to i386 instruction set. The `rex' prefix has four
10133 bits -- an operand size overwrite (`64') used to change operand
10134 size from 32-bit to 64-bit and X, Y and Z extensions bits used to
10135 extend the register set.
10137 You may write the `rex' prefixes directly. The `rex64xyz'
10138 instruction emits `rex' prefix with all the bits set. By omitting
10139 the `64', `x', `y' or `z' you may write other prefixes as well.
10140 Normally, there is no need to write the prefixes explicitly, since
10141 gas will automatically generate them based on the instruction
10145 File: as.info, Node: i386-Memory, Next: i386-Jumps, Prev: i386-Prefixes, Up: i386-Dependent
10147 9.13.8 Memory References
10148 ------------------------
10150 An Intel syntax indirect memory reference of the form
10152 SECTION:[BASE + INDEX*SCALE + DISP]
10154 is translated into the AT&T syntax
10156 SECTION:DISP(BASE, INDEX, SCALE)
10158 where BASE and INDEX are the optional 32-bit base and index registers,
10159 DISP is the optional displacement, and SCALE, taking the values 1, 2,
10160 4, and 8, multiplies INDEX to calculate the address of the operand. If
10161 no SCALE is specified, SCALE is taken to be 1. SECTION specifies the
10162 optional section register for the memory operand, and may override the
10163 default section register (see a 80386 manual for section register
10164 defaults). Note that section overrides in AT&T syntax _must_ be
10165 preceded by a `%'. If you specify a section override which coincides
10166 with the default section register, `as' does _not_ output any section
10167 register override prefixes to assemble the given instruction. Thus,
10168 section overrides can be specified to emphasize which section register
10169 is used for a given memory operand.
10171 Here are some examples of Intel and AT&T style memory references:
10173 AT&T: `-4(%ebp)', Intel: `[ebp - 4]'
10174 BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default
10175 section is used (`%ss' for addressing with `%ebp' as the base
10176 register). INDEX, SCALE are both missing.
10178 AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]'
10179 INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'. All other
10180 fields are missing. The section register here defaults to `%ds'.
10182 AT&T: `foo(,1)'; Intel `[foo]'
10183 This uses the value pointed to by `foo' as a memory operand. Note
10184 that BASE and INDEX are both missing, but there is only _one_ `,'.
10185 This is a syntactic exception.
10187 AT&T: `%gs:foo'; Intel `gs:foo'
10188 This selects the contents of the variable `foo' with section
10189 register SECTION being `%gs'.
10191 Absolute (as opposed to PC relative) call and jump operands must be
10192 prefixed with `*'. If no `*' is specified, `as' always chooses PC
10193 relative addressing for jump/call labels.
10195 Any instruction that has a memory operand, but no register operand,
10196 _must_ specify its size (byte, word, long, or quadruple) with an
10197 instruction mnemonic suffix (`b', `w', `l' or `q', respectively).
10199 The x86-64 architecture adds an RIP (instruction pointer relative)
10200 addressing. This addressing mode is specified by using `rip' as a base
10201 register. Only constant offsets are valid. For example:
10203 AT&T: `1234(%rip)', Intel: `[rip + 1234]'
10204 Points to the address 1234 bytes past the end of the current
10207 AT&T: `symbol(%rip)', Intel: `[rip + symbol]'
10208 Points to the `symbol' in RIP relative way, this is shorter than
10209 the default absolute addressing.
10211 Other addressing modes remain unchanged in x86-64 architecture,
10212 except registers used are 64-bit instead of 32-bit.
10215 File: as.info, Node: i386-Jumps, Next: i386-Float, Prev: i386-Memory, Up: i386-Dependent
10217 9.13.9 Handling of Jump Instructions
10218 ------------------------------------
10220 Jump instructions are always optimized to use the smallest possible
10221 displacements. This is accomplished by using byte (8-bit) displacement
10222 jumps whenever the target is sufficiently close. If a byte displacement
10223 is insufficient a long displacement is used. We do not support word
10224 (16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump
10225 instruction with the `data16' instruction prefix), since the 80386
10226 insists upon masking `%eip' to 16 bits after the word displacement is
10227 added. (See also *note i386-Arch::)
10229 Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz'
10230 and `loopne' instructions only come in byte displacements, so that if
10231 you use these instructions (`gcc' does not use them) you may get an
10232 error message (and incorrect code). The AT&T 80386 assembler tries to
10233 get around this problem by expanding `jcxz foo' to
10241 File: as.info, Node: i386-Float, Next: i386-SIMD, Prev: i386-Jumps, Up: i386-Dependent
10243 9.13.10 Floating Point
10244 ----------------------
10246 All 80387 floating point types except packed BCD are supported. (BCD
10247 support may be added without much difficulty). These data types are
10248 16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit),
10249 and extended (80-bit) precision floating point. Each supported type
10250 has an instruction mnemonic suffix and a constructor associated with
10251 it. Instruction mnemonic suffixes specify the operand's data type.
10252 Constructors build these data types into memory.
10254 * Floating point constructors are `.float' or `.single', `.double',
10255 and `.tfloat' for 32-, 64-, and 80-bit formats. These correspond
10256 to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for
10257 80-bit (ten byte) real. The 80387 only supports this format via
10258 the `fldt' (load 80-bit real to stack top) and `fstpt' (store
10259 80-bit real and pop stack) instructions.
10261 * Integer constructors are `.word', `.long' or `.int', and `.quad'
10262 for the 16-, 32-, and 64-bit integer formats. The corresponding
10263 instruction mnemonic suffixes are `s' (single), `l' (long), and
10264 `q' (quad). As with the 80-bit real format, the 64-bit `q' format
10265 is only present in the `fildq' (load quad integer to stack top)
10266 and `fistpq' (store quad integer and pop stack) instructions.
10268 Register to register operations should not use instruction mnemonic
10269 suffixes. `fstl %st, %st(1)' will give a warning, and be assembled as
10270 if you wrote `fst %st, %st(1)', since all register to register
10271 operations use 80-bit floating point operands. (Contrast this with
10272 `fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating
10273 point format, then stores the result in the 4 byte location `mem')
10276 File: as.info, Node: i386-SIMD, Next: i386-LWP, Prev: i386-Float, Up: i386-Dependent
10278 9.13.11 Intel's MMX and AMD's 3DNow! SIMD Operations
10279 ----------------------------------------------------
10281 `as' supports Intel's MMX instruction set (SIMD instructions for
10282 integer data), available on Intel's Pentium MMX processors and Pentium
10283 II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and
10284 probably others. It also supports AMD's 3DNow! instruction set (SIMD
10285 instructions for 32-bit floating point data) available on AMD's K6-2
10286 processor and possibly others in the future.
10288 Currently, `as' does not support Intel's floating point SIMD, Katmai
10291 The eight 64-bit MMX operands, also used by 3DNow!, are called
10292 `%mm0', `%mm1', ... `%mm7'. They contain eight 8-bit integers, four
10293 16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
10294 floating point values. The MMX registers cannot be used at the same
10295 time as the floating point stack.
10297 See Intel and AMD documentation, keeping in mind that the operand
10298 order in instructions is reversed from the Intel syntax.
10301 File: as.info, Node: i386-LWP, Next: i386-BMI, Prev: i386-SIMD, Up: i386-Dependent
10303 9.13.12 AMD's Lightweight Profiling Instructions
10304 ------------------------------------------------
10306 `as' supports AMD's Lightweight Profiling (LWP) instruction set,
10307 available on AMD's Family 15h (Orochi) processors.
10309 LWP enables applications to collect and manage performance data, and
10310 react to performance events. The collection of performance data
10311 requires no context switches. LWP runs in the context of a thread and
10312 so several counters can be used independently across multiple threads.
10313 LWP can be used in both 64-bit and legacy 32-bit modes.
10315 For detailed information on the LWP instruction set, see the `AMD
10316 Lightweight Profiling Specification' available at Lightweight Profiling
10317 Specification (http://developer.amd.com/cpu/LWP).
10320 File: as.info, Node: i386-BMI, Next: i386-TBM, Prev: i386-LWP, Up: i386-Dependent
10322 9.13.13 Bit Manipulation Instructions
10323 -------------------------------------
10325 `as' supports the Bit Manipulation (BMI) instruction set.
10327 BMI instructions provide several instructions implementing individual
10328 bit manipulation operations such as isolation, masking, setting, or
10332 File: as.info, Node: i386-TBM, Next: i386-16bit, Prev: i386-BMI, Up: i386-Dependent
10334 9.13.14 AMD's Trailing Bit Manipulation Instructions
10335 ----------------------------------------------------
10337 `as' supports AMD's Trailing Bit Manipulation (TBM) instruction set,
10338 available on AMD's BDVER2 processors (Trinity and Viperfish).
10340 TBM instructions provide instructions implementing individual bit
10341 manipulation operations such as isolating, masking, setting, resetting,
10342 complementing, and operations on trailing zeros and ones.
10345 File: as.info, Node: i386-16bit, Next: i386-Arch, Prev: i386-TBM, Up: i386-Dependent
10347 9.13.15 Writing 16-bit Code
10348 ---------------------------
10350 While `as' normally writes only "pure" 32-bit i386 code or 64-bit
10351 x86-64 code depending on the default configuration, it also supports
10352 writing code to run in real mode or in 16-bit protected mode code
10353 segments. To do this, put a `.code16' or `.code16gcc' directive before
10354 the assembly language instructions to be run in 16-bit mode. You can
10355 switch `as' to writing 32-bit code with the `.code32' directive or
10356 64-bit code with the `.code64' directive.
10358 `.code16gcc' provides experimental support for generating 16-bit
10359 code from gcc, and differs from `.code16' in that `call', `ret',
10360 `enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf'
10361 instructions default to 32-bit size. This is so that the stack pointer
10362 is manipulated in the same way over function calls, allowing access to
10363 function parameters at the same stack offsets as in 32-bit mode.
10364 `.code16gcc' also automatically adds address size prefixes where
10365 necessary to use the 32-bit addressing modes that gcc generates.
10367 The code which `as' generates in 16-bit mode will not necessarily
10368 run on a 16-bit pre-80386 processor. To write code that runs on such a
10369 processor, you must refrain from using _any_ 32-bit constructs which
10370 require `as' to output address or operand size prefixes.
10372 Note that writing 16-bit code instructions by explicitly specifying a
10373 prefix or an instruction mnemonic suffix within a 32-bit code section
10374 generates different machine instructions than those generated for a
10375 16-bit code segment. In a 32-bit code section, the following code
10376 generates the machine opcode bytes `66 6a 04', which pushes the value
10377 `4' onto the stack, decrementing `%esp' by 2.
10381 The same code in a 16-bit code section would generate the machine
10382 opcode bytes `6a 04' (i.e., without the operand size prefix), which is
10383 correct since the processor default operand size is assumed to be 16
10384 bits in a 16-bit code section.
10387 File: as.info, Node: i386-Bugs, Next: i386-Notes, Prev: i386-Arch, Up: i386-Dependent
10389 9.13.16 AT&T Syntax bugs
10390 ------------------------
10392 The UnixWare assembler, and probably other AT&T derived ix86 Unix
10393 assemblers, generate floating point instructions with reversed source
10394 and destination registers in certain cases. Unfortunately, gcc and
10395 possibly many other programs use this reversed syntax, so we're stuck
10401 results in `%st(3)' being updated to `%st - %st(3)' rather than the
10402 expected `%st(3) - %st'. This happens with all the non-commutative
10403 arithmetic floating point operations with two register operands where
10404 the source register is `%st' and the destination register is `%st(i)'.
10407 File: as.info, Node: i386-Arch, Next: i386-Bugs, Prev: i386-16bit, Up: i386-Dependent
10409 9.13.17 Specifying CPU Architecture
10410 -----------------------------------
10412 `as' may be told to assemble for a particular CPU (sub-)architecture
10413 with the `.arch CPU_TYPE' directive. This directive enables a warning
10414 when gas detects an instruction that is not supported on the CPU
10415 specified. The choices for CPU_TYPE are:
10417 `i8086' `i186' `i286' `i386'
10418 `i486' `i586' `i686' `pentium'
10419 `pentiumpro' `pentiumii' `pentiumiii' `pentium4'
10420 `prescott' `nocona' `core' `core2'
10421 `corei7' `l1om' `k1om'
10422 `k6' `k6_2' `athlon' `k8'
10423 `amdfam10' `bdver1' `bdver2'
10424 `generic32' `generic64'
10425 `.mmx' `.sse' `.sse2' `.sse3'
10426 `.ssse3' `.sse4.1' `.sse4.2' `.sse4'
10427 `.avx' `.vmx' `.smx' `.ept'
10428 `.clflush' `.movbe' `.xsave' `.xsaveopt'
10429 `.aes' `.pclmul' `.fma' `.fsgsbase'
10430 `.rdrnd' `.f16c' `.avx2' `.bmi2'
10431 `.lzcnt' `.invpcid'
10432 `.3dnow' `.3dnowa' `.sse4a' `.sse5'
10433 `.syscall' `.rdtscp' `.svme' `.abm'
10434 `.lwp' `.fma4' `.xop'
10437 Apart from the warning, there are only two other effects on `as'
10438 operation; Firstly, if you specify a CPU other than `i486', then shift
10439 by one instructions such as `sarl $1, %eax' will automatically use a
10440 two byte opcode sequence. The larger three byte opcode sequence is
10441 used on the 486 (and when no architecture is specified) because it
10442 executes faster on the 486. Note that you can explicitly request the
10443 two byte opcode by writing `sarl %eax'. Secondly, if you specify
10444 `i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte
10445 offset conditional jumps will be promoted when necessary to a two
10446 instruction sequence consisting of a conditional jump of the opposite
10447 sense around an unconditional jump to the target.
10449 Following the CPU architecture (but not a sub-architecture, which
10450 are those starting with a dot), you may specify `jumps' or `nojumps' to
10451 control automatic promotion of conditional jumps. `jumps' is the
10452 default, and enables jump promotion; All external jumps will be of the
10453 long variety, and file-local jumps will be promoted as necessary.
10454 (*note i386-Jumps::) `nojumps' leaves external conditional jumps as
10455 byte offset jumps, and warns about file-local conditional jumps that
10456 `as' promotes. Unconditional jumps are treated as for `jumps'.
10460 .arch i8086,nojumps
10463 File: as.info, Node: i386-Notes, Prev: i386-Bugs, Up: i386-Dependent
10468 There is some trickery concerning the `mul' and `imul' instructions
10469 that deserves mention. The 16-, 32-, 64- and 128-bit expanding
10470 multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul')
10471 can be output only in the one operand form. Thus, `imul %ebx, %eax'
10472 does _not_ select the expanding multiply; the expanding multiply would
10473 clobber the `%edx' register, and this would confuse `gcc' output. Use
10474 `imul %ebx' to get the 64-bit product in `%edx:%eax'.
10476 We have added a two operand form of `imul' when the first operand is
10477 an immediate mode expression and the second operand is a register.
10478 This is just a shorthand, so that, multiplying `%eax' by 69, for
10479 example, can be done with `imul $69, %eax' rather than `imul $69, %eax,
10483 File: as.info, Node: i860-Dependent, Next: i960-Dependent, Prev: i386-Dependent, Up: Machine Dependencies
10485 9.14 Intel i860 Dependent Features
10486 ==================================
10490 * Notes-i860:: i860 Notes
10491 * Options-i860:: i860 Command-line Options
10492 * Directives-i860:: i860 Machine Directives
10493 * Opcodes for i860:: i860 Opcodes
10494 * Syntax of i860:: i860 Syntax
10497 File: as.info, Node: Notes-i860, Next: Options-i860, Up: i860-Dependent
10502 This is a fairly complete i860 assembler which is compatible with the
10503 UNIX System V/860 Release 4 assembler. However, it does not currently
10504 support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT').
10506 Like the SVR4/860 assembler, the output object format is ELF32.
10507 Currently, this is the only supported object format. If there is
10508 sufficient interest, other formats such as COFF may be implemented.
10510 Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter
10511 being the default. One difference is that AT&T syntax requires the '%'
10512 prefix on register names while Intel syntax does not. Another
10513 difference is in the specification of relocatable expressions. The
10514 Intel syntax is `ha%expression' whereas the SVR4 syntax is
10515 `[expression]@ha' (and similarly for the "l" and "h" selectors).
10518 File: as.info, Node: Options-i860, Next: Directives-i860, Prev: Notes-i860, Up: i860-Dependent
10520 9.14.2 i860 Command-line Options
10521 --------------------------------
10523 9.14.2.1 SVR4 compatibility options
10524 ...................................
10527 Print assembler version.
10535 9.14.2.2 Other options
10536 ......................
10539 Select little endian output (this is the default).
10542 Select big endian output. Note that the i860 always reads
10543 instructions as little endian data, so this option only effects
10544 data and not instructions.
10547 Emit a warning message if any pseudo-instruction expansions
10548 occurred. For example, a `or' instruction with an immediate
10549 larger than 16-bits will be expanded into two instructions. This
10550 is a very undesirable feature to rely on, so this flag can help
10551 detect any code where it happens. One use of it, for instance, has
10552 been to find and eliminate any place where `gcc' may emit these
10553 pseudo-instructions.
10556 Enable support for the i860XP instructions and control registers.
10557 By default, this option is disabled so that only the base
10558 instruction set (i.e., i860XR) is supported.
10561 The i860 assembler defaults to AT&T/SVR4 syntax. This option
10562 enables the Intel syntax.
10565 File: as.info, Node: Directives-i860, Next: Opcodes for i860, Prev: Options-i860, Up: i860-Dependent
10567 9.14.3 i860 Machine Directives
10568 ------------------------------
10571 Enter dual instruction mode. While this directive is supported, the
10572 preferred way to use dual instruction mode is to explicitly code
10573 the dual bit with the `d.' prefix.
10576 Exit dual instruction mode. While this directive is supported, the
10577 preferred way to use dual instruction mode is to explicitly code
10578 the dual bit with the `d.' prefix.
10581 Change the temporary register used when expanding pseudo
10582 operations. The default register is `r31'.
10584 The `.dual', `.enddual', and `.atmp' directives are available only
10585 in the Intel syntax mode.
10587 Both syntaxes allow for the standard `.align' directive. However,
10588 the Intel syntax additionally allows keywords for the alignment
10589 parameter: "`.align type'", where `type' is one of `.short', `.long',
10590 `.quad', `.single', `.double' representing alignments of 2, 4, 16, 4,
10591 and 8, respectively.
10594 File: as.info, Node: Opcodes for i860, Next: Syntax of i860, Prev: Directives-i860, Up: i860-Dependent
10596 9.14.4 i860 Opcodes
10597 -------------------
10599 All of the Intel i860XR and i860XP machine instructions are supported.
10600 Please see either _i860 Microprocessor Programmer's Reference Manual_
10601 or _i860 Microprocessor Architecture_ for more information.
10603 9.14.4.1 Other instruction support (pseudo-instructions)
10604 ........................................................
10606 For compatibility with some other i860 assemblers, a number of
10607 pseudo-instructions are supported. While these are supported, they are
10608 a very undesirable feature that should be avoided - in particular, when
10609 they result in an expansion to multiple actual i860 instructions. Below
10610 are the pseudo-instructions that result in expansions.
10611 * Load large immediate into general register:
10613 The pseudo-instruction `mov imm,%rn' (where the immediate does not
10614 fit within a signed 16-bit field) will be expanded into:
10615 orh large_imm@h,%r0,%rn
10616 or large_imm@l,%rn,%rn
10618 * Load/store with relocatable address expression:
10620 For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will
10622 orh addr_exp@ha,%rx,%r31
10623 ld.l addr_exp@l(%r31),%rn
10625 The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x,
10626 fst.x', and `pst.x' as well.
10628 * Signed large immediate with add/subtract:
10630 If any of the arithmetic operations `adds, addu, subs, subu' are
10631 used with an immediate larger than 16-bits (signed), then they
10632 will be expanded. For instance, the pseudo-instruction `adds
10633 large_imm,%rx,%rn' expands to:
10634 orh large_imm@h,%r0,%r31
10635 or large_imm@l,%r31,%r31
10638 * Unsigned large immediate with logical operations:
10640 Logical operations (`or, andnot, or, xor') also result in
10641 expansions. The pseudo-instruction `or large_imm,%rx,%rn' results
10643 orh large_imm@h,%rx,%r31
10644 or large_imm@l,%r31,%rn
10646 Similarly for the others, except for `and' which expands to:
10647 andnot (-1 - large_imm)@h,%rx,%r31
10648 andnot (-1 - large_imm)@l,%r31,%rn
10651 File: as.info, Node: Syntax of i860, Prev: Opcodes for i860, Up: i860-Dependent
10658 * i860-Chars:: Special Characters
10661 File: as.info, Node: i860-Chars, Up: Syntax of i860
10663 9.14.5.1 Special Characters
10664 ...........................
10666 The presence of a `#' appearing anywhere on a line indicates the start
10667 of a comment that extends to the end of that line.
10669 If a `#' appears as the first character of a line then the whole
10670 line is treated as a comment, but in this case the line can also be a
10671 logical line number directive (*note Comments::) or a preprocessor
10672 control command (*note Preprocessing::).
10674 The `;' character can be used to separate statements on the same
10678 File: as.info, Node: i960-Dependent, Next: IA-64-Dependent, Prev: i860-Dependent, Up: Machine Dependencies
10680 9.15 Intel 80960 Dependent Features
10681 ===================================
10685 * Options-i960:: i960 Command-line Options
10686 * Floating Point-i960:: Floating Point
10687 * Directives-i960:: i960 Machine Directives
10688 * Opcodes for i960:: i960 Opcodes
10689 * Syntax of i960:: i960 Syntax
10692 File: as.info, Node: Options-i960, Next: Floating Point-i960, Up: i960-Dependent
10694 9.15.1 i960 Command-line Options
10695 --------------------------------
10697 `-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
10698 Select the 80960 architecture. Instructions or features not
10699 supported by the selected architecture cause fatal errors.
10701 `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'.
10702 Synonyms are provided for compatibility with other tools.
10704 If you do not specify any of these options, `as' generates code
10705 for any instruction or feature that is supported by _some_ version
10706 of the 960 (even if this means mixing architectures!). In
10707 principle, `as' attempts to deduce the minimal sufficient
10708 processor type if none is specified; depending on the object code
10709 format, the processor type may be recorded in the object file. If
10710 it is critical that the `as' output match a specific architecture,
10711 specify that architecture explicitly.
10714 Add code to collect information about conditional branches taken,
10715 for later optimization using branch prediction bits. (The
10716 conditional branch instructions have branch prediction bits in the
10717 CA, CB, and CC architectures.) If BR represents a conditional
10718 branch instruction, the following represents the code generated by
10719 the assembler when `-b' is specified:
10721 call INCREMENT ROUTINE
10722 .word 0 # pre-counter
10724 call INCREMENT ROUTINE
10725 .word 0 # post-counter
10727 The counter following a branch records the number of times that
10728 branch was _not_ taken; the difference between the two counters is
10729 the number of times the branch _was_ taken.
10731 A table of every such `Label' is also generated, so that the
10732 external postprocessor `gbr960' (supplied by Intel) can locate all
10733 the counters. This table is always labeled `__BRANCH_TABLE__';
10734 this is a local symbol to permit collecting statistics for many
10735 separate object files. The table is word aligned, and begins with
10736 a two-word header. The first word, initialized to 0, is used in
10737 maintaining linked lists of branch tables. The second word is a
10738 count of the number of entries in the table, which follow
10739 immediately: each is a word, pointing to one of the labels
10742 +------------+------------+------------+ ... +------------+
10744 | *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N |
10746 +------------+------------+------------+ ... +------------+
10748 __BRANCH_TABLE__ layout
10750 The first word of the header is used to locate multiple branch
10751 tables, since each object file may contain one. Normally the links
10752 are maintained with a call to an initialization routine, placed at
10753 the beginning of each function in the file. The GNU C compiler
10754 generates these calls automatically when you give it a `-b' option.
10755 For further details, see the documentation of `gbr960'.
10758 Normally, Compare-and-Branch instructions with targets that require
10759 displacements greater than 13 bits (or that have external targets)
10760 are replaced with the corresponding compare (or `chkbit') and
10761 branch instructions. You can use the `-no-relax' option to
10762 specify that `as' should generate errors instead, if the target
10763 displacement is larger than 13 bits.
10765 This option does not affect the Compare-and-Jump instructions; the
10766 code emitted for them is _always_ adjusted when necessary
10767 (depending on displacement size), regardless of whether you use
10771 File: as.info, Node: Floating Point-i960, Next: Directives-i960, Prev: Options-i960, Up: i960-Dependent
10773 9.15.2 Floating Point
10774 ---------------------
10776 `as' generates IEEE floating-point numbers for the directives `.float',
10777 `.double', `.extended', and `.single'.
10780 File: as.info, Node: Directives-i960, Next: Opcodes for i960, Prev: Floating Point-i960, Up: i960-Dependent
10782 9.15.3 i960 Machine Directives
10783 ------------------------------
10785 `.bss SYMBOL, LENGTH, ALIGN'
10786 Reserve LENGTH bytes in the bss section for a local SYMBOL,
10787 aligned to the power of two specified by ALIGN. LENGTH and ALIGN
10788 must be positive absolute expressions. This directive differs
10789 from `.lcomm' only in that it permits you to specify an alignment.
10790 *Note `.lcomm': Lcomm.
10792 `.extended FLONUMS'
10793 `.extended' expects zero or more flonums, separated by commas; for
10794 each flonum, `.extended' emits an IEEE extended-format (80-bit)
10795 floating-point number.
10797 `.leafproc CALL-LAB, BAL-LAB'
10798 You can use the `.leafproc' directive in conjunction with the
10799 optimized `callj' instruction to enable faster calls of leaf
10800 procedures. If a procedure is known to call no other procedures,
10801 you may define an entry point that skips procedure prolog code
10802 (and that does not depend on system-supplied saved context), and
10803 declare it as the BAL-LAB using `.leafproc'. If the procedure
10804 also has an entry point that goes through the normal prolog, you
10805 can specify that entry point as CALL-LAB.
10807 A `.leafproc' declaration is meant for use in conjunction with the
10808 optimized call instruction `callj'; the directive records the data
10809 needed later to choose between converting the `callj' into a `bal'
10812 CALL-LAB is optional; if only one argument is present, or if the
10813 two arguments are identical, the single argument is assumed to be
10814 the `bal' entry point.
10816 `.sysproc NAME, INDEX'
10817 The `.sysproc' directive defines a name for a system procedure.
10818 After you define it using `.sysproc', you can use NAME to refer to
10819 the system procedure identified by INDEX when calling procedures
10820 with the optimized call instruction `callj'.
10822 Both arguments are required; INDEX must be between 0 and 31
10826 File: as.info, Node: Opcodes for i960, Next: Syntax of i960, Prev: Directives-i960, Up: i960-Dependent
10828 9.15.4 i960 Opcodes
10829 -------------------
10831 All Intel 960 machine instructions are supported; *note i960
10832 Command-line Options: Options-i960. for a discussion of selecting the
10833 instruction subset for a particular 960 architecture.
10835 Some opcodes are processed beyond simply emitting a single
10836 corresponding instruction: `callj', and Compare-and-Branch or
10837 Compare-and-Jump instructions with target displacements larger than 13
10842 * callj-i960:: `callj'
10843 * Compare-and-branch-i960:: Compare-and-Branch
10846 File: as.info, Node: callj-i960, Next: Compare-and-branch-i960, Up: Opcodes for i960
10851 You can write `callj' to have the assembler or the linker determine the
10852 most appropriate form of subroutine call: `call', `bal', or `calls'.
10853 If the assembly source contains enough information--a `.leafproc' or
10854 `.sysproc' directive defining the operand--then `as' translates the
10855 `callj'; if not, it simply emits the `callj', leaving it for the linker
10859 File: as.info, Node: Compare-and-branch-i960, Prev: callj-i960, Up: Opcodes for i960
10861 9.15.4.2 Compare-and-Branch
10862 ...........................
10864 The 960 architectures provide combined Compare-and-Branch instructions
10865 that permit you to store the branch target in the lower 13 bits of the
10866 instruction word itself. However, if you specify a branch target far
10867 enough away that its address won't fit in 13 bits, the assembler can
10868 either issue an error, or convert your Compare-and-Branch instruction
10869 into separate instructions to do the compare and the branch.
10871 Whether `as' gives an error or expands the instruction depends on
10872 two choices you can make: whether you use the `-no-relax' option, and
10873 whether you use a "Compare and Branch" instruction or a "Compare and
10874 Jump" instruction. The "Jump" instructions are _always_ expanded if
10875 necessary; the "Branch" instructions are expanded when necessary
10876 _unless_ you specify `-no-relax'--in which case `as' gives an error
10879 These are the Compare-and-Branch instructions, their "Jump" variants,
10880 and the instruction pairs they may expand into:
10883 Branch Jump Expanded to
10884 ------ ------ ------------
10887 cmpibe cmpije cmpi; be
10888 cmpibg cmpijg cmpi; bg
10889 cmpibge cmpijge cmpi; bge
10890 cmpibl cmpijl cmpi; bl
10891 cmpible cmpijle cmpi; ble
10892 cmpibno cmpijno cmpi; bno
10893 cmpibne cmpijne cmpi; bne
10894 cmpibo cmpijo cmpi; bo
10895 cmpobe cmpoje cmpo; be
10896 cmpobg cmpojg cmpo; bg
10897 cmpobge cmpojge cmpo; bge
10898 cmpobl cmpojl cmpo; bl
10899 cmpoble cmpojle cmpo; ble
10900 cmpobne cmpojne cmpo; bne
10903 File: as.info, Node: Syntax of i960, Prev: Opcodes for i960, Up: i960-Dependent
10905 9.15.5 Syntax for the i960
10906 --------------------------
10910 * i960-Chars:: Special Characters
10913 File: as.info, Node: i960-Chars, Up: Syntax of i960
10915 9.15.5.1 Special Characters
10916 ...........................
10918 The presence of a `#' on a line indicates the start of a comment that
10919 extends to the end of the current line.
10921 If a `#' appears as the first character of a line, the whole line is
10922 treated as a comment, but in this case the line can also be a logical
10923 line number directive (*note Comments::) or a preprocessor control
10924 command (*note Preprocessing::).
10926 The `;' character can be used to separate statements on the same
10930 File: as.info, Node: IA-64-Dependent, Next: IP2K-Dependent, Prev: i960-Dependent, Up: Machine Dependencies
10932 9.16 IA-64 Dependent Features
10933 =============================
10937 * IA-64 Options:: Options
10938 * IA-64 Syntax:: Syntax
10939 * IA-64 Opcodes:: Opcodes
10942 File: as.info, Node: IA-64 Options, Next: IA-64 Syntax, Up: IA-64-Dependent
10948 This option instructs the assembler to mark the resulting object
10949 file as using the "constant GP" model. With this model, it is
10950 assumed that the entire program uses a single global pointer (GP)
10951 value. Note that this option does not in any fashion affect the
10952 machine code emitted by the assembler. All it does is turn on the
10953 EF_IA_64_CONS_GP flag in the ELF file header.
10956 This option instructs the assembler to mark the resulting object
10957 file as using the "constant GP without function descriptor" data
10958 model. This model is like the "constant GP" model, except that it
10959 additionally does away with function descriptors. What this means
10960 is that the address of a function refers directly to the
10961 function's code entry-point. Normally, such an address would
10962 refer to a function descriptor, which contains both the code
10963 entry-point and the GP-value needed by the function. Note that
10964 this option does not in any fashion affect the machine code
10965 emitted by the assembler. All it does is turn on the
10966 EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
10972 These options select the data model. The assembler defaults to
10973 `-mlp64' (LP64 data model).
10977 These options select the byte order. The `-mle' option selects
10978 little-endian byte order (default) and `-mbe' selects big-endian
10979 byte order. Note that IA-64 machine code always uses
10980 little-endian byte order.
10984 Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default
10987 `-munwind-check=warning'
10988 `-munwind-check=error'
10989 These options control what the assembler will do when performing
10990 consistency checks on unwind directives. `-munwind-check=warning'
10991 will make the assembler issue a warning when an unwind directive
10992 check fails. This is the default. `-munwind-check=error' will
10993 make the assembler issue an error when an unwind directive check
10999 These options control what the assembler will do when the `hint.b'
11000 instruction is used. `-mhint.b=ok' will make the assembler accept
11001 `hint.b'. `-mint.b=warning' will make the assembler issue a
11002 warning when `hint.b' is used. `-mhint.b=error' will make the
11003 assembler treat `hint.b' as an error, which is the default.
11007 These options turn on dependency violation checking.
11010 This option instructs the assembler to automatically insert stop
11011 bits where necessary to remove dependency violations. This is the
11015 This option turns off dependency violation checking.
11018 This turns on debug output intended to help tracking down bugs in
11019 the dependency violation checker.
11022 This is a shortcut for -xnone -xdebug.
11025 This is a shortcut for -xexplicit -xdebug.
11029 File: as.info, Node: IA-64 Syntax, Next: IA-64 Opcodes, Prev: IA-64 Options, Up: IA-64-Dependent
11034 The assembler syntax closely follows the IA-64 Assembly Language
11039 * IA-64-Chars:: Special Characters
11040 * IA-64-Regs:: Register Names
11041 * IA-64-Bits:: Bit Names
11042 * IA-64-Relocs:: Relocations
11045 File: as.info, Node: IA-64-Chars, Next: IA-64-Regs, Up: IA-64 Syntax
11047 9.16.2.1 Special Characters
11048 ...........................
11050 `//' is the line comment token.
11052 `;' can be used instead of a newline to separate statements.
11055 File: as.info, Node: IA-64-Regs, Next: IA-64-Bits, Prev: IA-64-Chars, Up: IA-64 Syntax
11057 9.16.2.2 Register Names
11058 .......................
11060 The 128 integer registers are referred to as `rN'. The 128
11061 floating-point registers are referred to as `fN'. The 128 application
11062 registers are referred to as `arN'. The 128 control registers are
11063 referred to as `crN'. The 64 one-bit predicate registers are referred
11064 to as `pN'. The 8 branch registers are referred to as `bN'. In
11065 addition, the assembler defines a number of aliases: `gp' (`r1'), `sp'
11066 (`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'),
11067 `ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N').
11069 For convenience, the assembler also defines aliases for all named
11070 application and control registers. For example, `ar.bsp' refers to the
11071 register backing store pointer (`ar17'). Similarly, `cr.eoi' refers to
11072 the end-of-interrupt register (`cr67').
11075 File: as.info, Node: IA-64-Bits, Next: IA-64-Relocs, Prev: IA-64-Regs, Up: IA-64 Syntax
11077 9.16.2.3 IA-64 Processor-Status-Register (PSR) Bit Names
11078 ........................................................
11080 The assembler defines bit masks for each of the bits in the IA-64
11081 processor status register. For example, `psr.ic' corresponds to a
11082 value of 0x2000. These masks are primarily intended for use with the
11083 `ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere
11084 else where an integer constant is expected.
11087 File: as.info, Node: IA-64-Relocs, Prev: IA-64-Bits, Up: IA-64 Syntax
11089 9.16.2.4 Relocations
11090 ....................
11092 In addition to the standard IA-64 relocations, the following
11093 relocations are implemented by `as':
11096 Convert the address offset V into a slot count. This pseudo
11097 function is available only on VMS. The expression V must be known
11098 at assembly time: it can't reference undefined symbols or symbols
11099 in different sections.
11102 File: as.info, Node: IA-64 Opcodes, Prev: IA-64 Syntax, Up: IA-64-Dependent
11107 For detailed information on the IA-64 machine instruction set, see the
11108 IA-64 Architecture Handbook
11109 (http://developer.intel.com/design/itanium/arch_spec.htm).
11112 File: as.info, Node: IP2K-Dependent, Next: LM32-Dependent, Prev: IA-64-Dependent, Up: Machine Dependencies
11114 9.17 IP2K Dependent Features
11115 ============================
11119 * IP2K-Opts:: IP2K Options
11120 * IP2K-Syntax:: IP2K Syntax
11123 File: as.info, Node: IP2K-Opts, Next: IP2K-Syntax, Up: IP2K-Dependent
11125 9.17.1 IP2K Options
11126 -------------------
11128 The Ubicom IP2K version of `as' has a few machine dependent options:
11131 `as' can assemble the extended IP2022 instructions, but it will
11132 only do so if this is specifically allowed via this command line
11136 This option restores the assembler's default behaviour of not
11137 permitting the extended IP2022 instructions to be assembled.
11141 File: as.info, Node: IP2K-Syntax, Prev: IP2K-Opts, Up: IP2K-Dependent
11148 * IP2K-Chars:: Special Characters
11151 File: as.info, Node: IP2K-Chars, Up: IP2K-Syntax
11153 9.17.2.1 Special Characters
11154 ...........................
11156 The presence of a `;' on a line indicates the start of a comment that
11157 extends to the end of the current line.
11159 If a `#' appears as the first character of a line, the whole line is
11160 treated as a comment, but in this case the line can also be a logical
11161 line number directive (*note Comments::) or a preprocessor control
11162 command (*note Preprocessing::).
11164 The IP2K assembler does not currently support a line separator
11168 File: as.info, Node: LM32-Dependent, Next: M32C-Dependent, Prev: IP2K-Dependent, Up: Machine Dependencies
11170 9.18 LM32 Dependent Features
11171 ============================
11175 * LM32 Options:: Options
11176 * LM32 Syntax:: Syntax
11177 * LM32 Opcodes:: Opcodes
11180 File: as.info, Node: LM32 Options, Next: LM32 Syntax, Up: LM32-Dependent
11185 `-mmultiply-enabled'
11186 Enable multiply instructions.
11189 Enable divide instructions.
11191 `-mbarrel-shift-enabled'
11192 Enable barrel-shift instructions.
11194 `-msign-extend-enabled'
11195 Enable sign extend instructions.
11198 Enable user defined instructions.
11201 Enable instruction cache related CSRs.
11204 Enable data cache related CSRs.
11207 Enable break instructions.
11210 Enable all instructions and CSRs.
11214 File: as.info, Node: LM32 Syntax, Next: LM32 Opcodes, Prev: LM32 Options, Up: LM32-Dependent
11221 * LM32-Regs:: Register Names
11222 * LM32-Modifiers:: Relocatable Expression Modifiers
11223 * LM32-Chars:: Special Characters
11226 File: as.info, Node: LM32-Regs, Next: LM32-Modifiers, Up: LM32 Syntax
11228 9.18.2.1 Register Names
11229 .......................
11231 LM32 has 32 x 32-bit general purpose registers `r0', `r1', ... `r31'.
11233 The following aliases are defined: `gp' - `r26', `fp' - `r27', `sp'
11234 - `r28', `ra' - `r29', `ea' - `r30', `ba' - `r31'.
11236 LM32 has the following Control and Status Registers (CSRs).
11248 Instruction cache control.
11251 Data cache control.
11260 Exception base address.
11266 Debug exception base address.
11299 File: as.info, Node: LM32-Modifiers, Next: LM32-Chars, Prev: LM32-Regs, Up: LM32 Syntax
11301 9.18.2.2 Relocatable Expression Modifiers
11302 .........................................
11304 The assembler supports several modifiers when using relocatable
11305 addresses in LM32 instruction operands. The general syntax is the
11308 modifier(relocatable-expression)
11311 This modifier allows you to use bits 0 through 15 of an address
11312 expression as 16 bit relocatable expression.
11315 This modifier allows you to use bits 16 through 23 of an address
11316 expression as 16 bit relocatable expression.
11320 ori r4, r4, lo(sym+10)
11321 orhi r4, r4, hi(sym+10)
11324 This modified creates a 16-bit relocatable expression that is the
11325 offset of the symbol from the global pointer.
11330 This modifier places a symbol in the GOT and creates a 16-bit
11331 relocatable expression that is the offset into the GOT of this
11334 lw r4, (gp+got(sym))
11337 This modifier allows you to use the bits 0 through 15 of an
11338 address which is an offset from the GOT.
11341 This modifier allows you to use the bits 16 through 31 of an
11342 address which is an offset from the GOT.
11344 orhi r4, r4, gotoffhi16(lsym)
11345 addi r4, r4, gotofflo16(lsym)
11349 File: as.info, Node: LM32-Chars, Prev: LM32-Modifiers, Up: LM32 Syntax
11351 9.18.2.3 Special Characters
11352 ...........................
11354 The presence of a `#' on a line indicates the start of a comment that
11355 extends to the end of the current line. Note that if a line starts
11356 with a `#' character then it can also be a logical line number
11357 directive (*note Comments::) or a preprocessor control command (*note
11360 A semicolon (`;') can be used to separate multiple statements on the
11364 File: as.info, Node: LM32 Opcodes, Prev: LM32 Syntax, Up: LM32-Dependent
11369 For detailed information on the LM32 machine instruction set, see
11370 `http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/'.
11372 `as' implements all the standard LM32 opcodes.
11375 File: as.info, Node: M32C-Dependent, Next: M32R-Dependent, Prev: LM32-Dependent, Up: Machine Dependencies
11377 9.19 M32C Dependent Features
11378 ============================
11380 `as' can assemble code for several different members of the Renesas
11381 M32C family. Normally the default is to assemble code for the M16C
11382 microprocessor. The `-m32c' option may be used to change the default
11383 to the M32C microprocessor.
11387 * M32C-Opts:: M32C Options
11388 * M32C-Syntax:: M32C Syntax
11391 File: as.info, Node: M32C-Opts, Next: M32C-Syntax, Up: M32C-Dependent
11393 9.19.1 M32C Options
11394 -------------------
11396 The Renesas M32C version of `as' has these machine-dependent options:
11399 Assemble M32C instructions.
11402 Assemble M16C instructions (default).
11405 Enable support for link-time relaxations.
11408 Support H'00 style hex constants in addition to 0x00 style.
11412 File: as.info, Node: M32C-Syntax, Prev: M32C-Opts, Up: M32C-Dependent
11419 * M32C-Modifiers:: Symbolic Operand Modifiers
11420 * M32C-Chars:: Special Characters
11423 File: as.info, Node: M32C-Modifiers, Next: M32C-Chars, Up: M32C-Syntax
11425 9.19.2.1 Symbolic Operand Modifiers
11426 ...................................
11428 The assembler supports several modifiers when using symbol addresses in
11429 M32C instruction operands. The general syntax is the following:
11435 These modifiers override the assembler's assumptions about how big
11436 a symbol's address is. Normally, when it sees an operand like
11437 `sym[a0]' it assumes `sym' may require the widest displacement
11438 field (16 bits for `-m16c', 24 bits for `-m32c'). These modifiers
11439 tell it to assume the address will fit in an 8 or 16 bit
11440 (respectively) unsigned displacement. Note that, of course, if it
11441 doesn't actually fit you will get linker errors. Example:
11443 mov.w %dsp8(sym)[a0],r1
11444 mov.b #0,%dsp8(sym)[a0]
11447 This modifier allows you to load bits 16 through 23 of a 24 bit
11448 address into an 8 bit register. This is useful with, for example,
11449 the M16C `smovf' instruction, which expects a 20 bit address in
11450 `r1h' and `a0'. Example:
11452 mov.b #%hi8(sym),r1h
11453 mov.w #%lo16(sym),a0
11457 Likewise, this modifier allows you to load bits 0 through 15 of a
11458 24 bit address into a 16 bit register.
11461 This modifier allows you to load bits 16 through 31 of a 32 bit
11462 address into a 16 bit register. While the M32C family only has 24
11463 bits of address space, it does support addresses in pairs of 16 bit
11464 registers (like `a1a0' for the `lde' instruction). This modifier
11465 is for loading the upper half in such cases. Example:
11467 mov.w #%hi16(sym),a1
11468 mov.w #%lo16(sym),a0
11474 File: as.info, Node: M32C-Chars, Prev: M32C-Modifiers, Up: M32C-Syntax
11476 9.19.2.2 Special Characters
11477 ...........................
11479 The presence of a `;' character on a line indicates the start of a
11480 comment that extends to the end of that line.
11482 If a `#' appears as the first character of a line, the whole line is
11483 treated as a comment, but in this case the line can also be a logical
11484 line number directive (*note Comments::) or a preprocessor control
11485 command (*note Preprocessing::).
11487 The `|' character can be used to separate statements on the same
11491 File: as.info, Node: M32R-Dependent, Next: M68K-Dependent, Prev: M32C-Dependent, Up: Machine Dependencies
11493 9.20 M32R Dependent Features
11494 ============================
11498 * M32R-Opts:: M32R Options
11499 * M32R-Directives:: M32R Directives
11500 * M32R-Warnings:: M32R Warnings
11503 File: as.info, Node: M32R-Opts, Next: M32R-Directives, Up: M32R-Dependent
11505 9.20.1 M32R Options
11506 -------------------
11508 The Renease M32R version of `as' has a few machine dependent options:
11511 `as' can assemble code for several different members of the
11512 Renesas M32R family. Normally the default is to assemble code for
11513 the M32R microprocessor. This option may be used to change the
11514 default to the M32RX microprocessor, which adds some more
11515 instructions to the basic M32R instruction set, and some
11516 additional parameters to some of the original instructions.
11519 This option changes the target processor to the the M32R2
11523 This option can be used to restore the assembler's default
11524 behaviour of assembling for the M32R microprocessor. This can be
11525 useful if the default has been changed by a previous command line
11529 This option tells the assembler to produce little-endian code and
11530 data. The default is dependent upon how the toolchain was
11534 This is a synonym for _-little_.
11537 This option tells the assembler to produce big-endian code and
11541 This is a synonum for _-big_.
11544 This option specifies that the output of the assembler should be
11545 marked as position-independent code (PIC).
11548 This option tells the assembler to attempts to combine two
11549 sequential instructions into a single, parallel instruction, where
11550 it is legal to do so.
11553 This option disables a previously enabled _-parallel_ option.
11556 This option disables the support for the extended bit-field
11557 instructions provided by the M32R2. If this support needs to be
11558 re-enabled the _-bitinst_ switch can be used to restore it.
11561 This option tells the assembler to attempt to optimize the
11562 instructions that it produces. This includes filling delay slots
11563 and converting sequential instructions into parallel ones. This
11564 option implies _-parallel_.
11566 `-warn-explicit-parallel-conflicts'
11567 Instructs `as' to produce warning messages when questionable
11568 parallel instructions are encountered. This option is enabled by
11569 default, but `gcc' disables it when it invokes `as' directly.
11570 Questionable instructions are those whose behaviour would be
11571 different if they were executed sequentially. For example the
11572 code fragment `mv r1, r2 || mv r3, r1' produces a different result
11573 from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3
11574 and then r2 into r1, whereas the later moves r2 into r1 and r3.
11577 This is a shorter synonym for the
11578 _-warn-explicit-parallel-conflicts_ option.
11580 `-no-warn-explicit-parallel-conflicts'
11581 Instructs `as' not to produce warning messages when questionable
11582 parallel instructions are encountered.
11585 This is a shorter synonym for the
11586 _-no-warn-explicit-parallel-conflicts_ option.
11588 `-ignore-parallel-conflicts'
11589 This option tells the assembler's to stop checking parallel
11590 instructions for constraint violations. This ability is provided
11591 for hardware vendors testing chip designs and should not be used
11592 under normal circumstances.
11594 `-no-ignore-parallel-conflicts'
11595 This option restores the assembler's default behaviour of checking
11596 parallel instructions to detect constraint violations.
11599 This is a shorter synonym for the _-ignore-parallel-conflicts_
11603 This is a shorter synonym for the _-no-ignore-parallel-conflicts_
11606 `-warn-unmatched-high'
11607 This option tells the assembler to produce a warning message if a
11608 `.high' pseudo op is encountered without a matching `.low' pseudo
11609 op. The presence of such an unmatched pseudo op usually indicates
11610 a programming error.
11612 `-no-warn-unmatched-high'
11613 Disables a previously enabled _-warn-unmatched-high_ option.
11616 This is a shorter synonym for the _-warn-unmatched-high_ option.
11619 This is a shorter synonym for the _-no-warn-unmatched-high_ option.
11623 File: as.info, Node: M32R-Directives, Next: M32R-Warnings, Prev: M32R-Opts, Up: M32R-Dependent
11625 9.20.2 M32R Directives
11626 ----------------------
11628 The Renease M32R version of `as' has a few architecture specific
11632 The `low' directive computes the value of its expression and
11633 places the lower 16-bits of the result into the immediate-field of
11634 the instruction. For example:
11636 or3 r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678
11637 add3, r0, r0, #low(fred) ; compute r0 = r0 + low 16-bits of address of fred
11640 The `high' directive computes the value of its expression and
11641 places the upper 16-bits of the result into the immediate-field of
11642 the instruction. For example:
11644 seth r0, #high(0x12345678) ; compute r0 = 0x12340000
11645 seth, r0, #high(fred) ; compute r0 = upper 16-bits of address of fred
11648 The `shigh' directive is very similar to the `high' directive. It
11649 also computes the value of its expression and places the upper
11650 16-bits of the result into the immediate-field of the instruction.
11651 The difference is that `shigh' also checks to see if the lower
11652 16-bits could be interpreted as a signed number, and if so it
11653 assumes that a borrow will occur from the upper-16 bits. To
11654 compensate for this the `shigh' directive pre-biases the upper 16
11655 bit value by adding one to it. For example:
11659 seth r0, #shigh(0x12345678) ; compute r0 = 0x12340000
11660 seth r0, #shigh(0x00008000) ; compute r0 = 0x00010000
11662 In the second example the lower 16-bits are 0x8000. If these are
11663 treated as a signed value and sign extended to 32-bits then the
11664 value becomes 0xffff8000. If this value is then added to
11665 0x00010000 then the result is 0x00008000.
11667 This behaviour is to allow for the different semantics of the
11668 `or3' and `add3' instructions. The `or3' instruction treats its
11669 16-bit immediate argument as unsigned whereas the `add3' treats
11670 its 16-bit immediate as a signed value. So for example:
11672 seth r0, #shigh(0x00008000)
11673 add3 r0, r0, #low(0x00008000)
11675 Produces the correct result in r0, whereas:
11677 seth r0, #shigh(0x00008000)
11678 or3 r0, r0, #low(0x00008000)
11680 Stores 0xffff8000 into r0.
11682 Note - the `shigh' directive does not know where in the assembly
11683 source code the lower 16-bits of the value are going set, so it
11684 cannot check to make sure that an `or3' instruction is being used
11685 rather than an `add3' instruction. It is up to the programmer to
11686 make sure that correct directives are used.
11689 The directive performs a similar thing as the _-m32r_ command line
11690 option. It tells the assembler to only accept M32R instructions
11691 from now on. An instructions from later M32R architectures are
11695 The directive performs a similar thing as the _-m32rx_ command
11696 line option. It tells the assembler to start accepting the extra
11697 instructions in the M32RX ISA as well as the ordinary M32R ISA.
11700 The directive performs a similar thing as the _-m32r2_ command
11701 line option. It tells the assembler to start accepting the extra
11702 instructions in the M32R2 ISA as well as the ordinary M32R ISA.
11705 The directive performs a similar thing as the _-little_ command
11706 line option. It tells the assembler to start producing
11707 little-endian code and data. This option should be used with care
11708 as producing mixed-endian binary files is fraught with danger.
11711 The directive performs a similar thing as the _-big_ command line
11712 option. It tells the assembler to start producing big-endian code
11713 and data. This option should be used with care as producing
11714 mixed-endian binary files is fraught with danger.
11718 File: as.info, Node: M32R-Warnings, Prev: M32R-Directives, Up: M32R-Dependent
11720 9.20.3 M32R Warnings
11721 --------------------
11723 There are several warning and error messages that can be produced by
11724 `as' which are specific to the M32R:
11726 `output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?'
11727 This message is only produced if warnings for explicit parallel
11728 conflicts have been enabled. It indicates that the assembler has
11729 encountered a parallel instruction in which the destination
11730 register of the left hand instruction is used as an input register
11731 in the right hand instruction. For example in this code fragment
11732 `mv r1, r2 || neg r3, r1' register r1 is the destination of the
11733 move instruction and the input to the neg instruction.
11735 `output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?'
11736 This message is only produced if warnings for explicit parallel
11737 conflicts have been enabled. It indicates that the assembler has
11738 encountered a parallel instruction in which the destination
11739 register of the right hand instruction is used as an input
11740 register in the left hand instruction. For example in this code
11741 fragment `mv r1, r2 || neg r2, r3' register r2 is the destination
11742 of the neg instruction and the input to the move instruction.
11744 `instruction `...' is for the M32RX only'
11745 This message is produced when the assembler encounters an
11746 instruction which is only supported by the M32Rx processor, and
11747 the `-m32rx' command line flag has not been specified to allow
11748 assembly of such instructions.
11750 `unknown instruction `...''
11751 This message is produced when the assembler encounters an
11752 instruction which it does not recognize.
11754 `only the NOP instruction can be issued in parallel on the m32r'
11755 This message is produced when the assembler encounters a parallel
11756 instruction which does not involve a NOP instruction and the
11757 `-m32rx' command line flag has not been specified. Only the M32Rx
11758 processor is able to execute two instructions in parallel.
11760 `instruction `...' cannot be executed in parallel.'
11761 This message is produced when the assembler encounters a parallel
11762 instruction which is made up of one or two instructions which
11763 cannot be executed in parallel.
11765 `Instructions share the same execution pipeline'
11766 This message is produced when the assembler encounters a parallel
11767 instruction whoes components both use the same execution pipeline.
11769 `Instructions write to the same destination register.'
11770 This message is produced when the assembler encounters a parallel
11771 instruction where both components attempt to modify the same
11772 register. For example these code fragments will produce this
11773 message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2,
11774 @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx
11775 r3, r4' (Both write to the condition bit)
11779 File: as.info, Node: M68K-Dependent, Next: M68HC11-Dependent, Prev: M32R-Dependent, Up: Machine Dependencies
11781 9.21 M680x0 Dependent Features
11782 ==============================
11786 * M68K-Opts:: M680x0 Options
11787 * M68K-Syntax:: Syntax
11788 * M68K-Moto-Syntax:: Motorola Syntax
11789 * M68K-Float:: Floating Point
11790 * M68K-Directives:: 680x0 Machine Directives
11791 * M68K-opcodes:: Opcodes
11794 File: as.info, Node: M68K-Opts, Next: M68K-Syntax, Up: M68K-Dependent
11796 9.21.1 M680x0 Options
11797 ---------------------
11799 The Motorola 680x0 version of `as' has a few machine dependent options:
11801 `-march=ARCHITECTURE'
11802 This option specifies a target architecture. The following
11803 architectures are recognized: `68000', `68010', `68020', `68030',
11804 `68040', `68060', `cpu32', `isaa', `isaaplus', `isab', `isac' and
11808 This option specifies a target cpu. When used in conjunction with
11809 the `-march' option, the cpu must be within the specified
11810 architecture. Also, the generic features of the architecture are
11811 used for instruction generation, rather than those of the specific
11821 Enable or disable various architecture specific features. If a
11822 chip or architecture by default supports an option (for instance
11823 `-march=isaaplus' includes the `-mdiv' option), explicitly
11824 disabling the option will override the default.
11827 You can use the `-l' option to shorten the size of references to
11828 undefined symbols. If you do not use the `-l' option, references
11829 to undefined symbols are wide enough for a full `long' (32 bits).
11830 (Since `as' cannot know where these symbols end up, `as' can only
11831 allocate space for the linker to fill in later. Since `as' does
11832 not know how far away these symbols are, it allocates as much
11833 space as it can.) If you use this option, the references are only
11834 one word wide (16 bits). This may be useful if you want the
11835 object file to be as small as possible, and you know that the
11836 relevant symbols are always less than 17 bits away.
11838 `--register-prefix-optional'
11839 For some configurations, especially those where the compiler
11840 normally does not prepend an underscore to the names of user
11841 variables, the assembler requires a `%' before any use of a
11842 register name. This is intended to let the assembler distinguish
11843 between C variables and functions named `a0' through `a7', and so
11844 on. The `%' is always accepted, but is not required for certain
11845 configurations, notably `sun3'. The `--register-prefix-optional'
11846 option may be used to permit omitting the `%' even for
11847 configurations for which it is normally required. If this is
11848 done, it will generally be impossible to refer to C variables and
11849 functions with the same names as register names.
11852 Normally the character `|' is treated as a comment character, which
11853 means that it can not be used in expressions. The `--bitwise-or'
11854 option turns `|' into a normal character. In this mode, you must
11855 either use C style comments, or start comments with a `#' character
11856 at the beginning of a line.
11858 `--base-size-default-16 --base-size-default-32'
11859 If you use an addressing mode with a base register without
11860 specifying the size, `as' will normally use the full 32 bit value.
11861 For example, the addressing mode `%a0@(%d0)' is equivalent to
11862 `%a0@(%d0:l)'. You may use the `--base-size-default-16' option to
11863 tell `as' to default to using the 16 bit value. In this case,
11864 `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'. You may use the
11865 `--base-size-default-32' option to restore the default behaviour.
11867 `--disp-size-default-16 --disp-size-default-32'
11868 If you use an addressing mode with a displacement, and the value
11869 of the displacement is not known, `as' will normally assume that
11870 the value is 32 bits. For example, if the symbol `disp' has not
11871 been defined, `as' will assemble the addressing mode
11872 `%a0@(disp,%d0)' as though `disp' is a 32 bit value. You may use
11873 the `--disp-size-default-16' option to tell `as' to instead assume
11874 that the displacement is 16 bits. In this case, `as' will
11875 assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value. You
11876 may use the `--disp-size-default-32' option to restore the default
11880 Always keep branches PC-relative. In the M680x0 architecture all
11881 branches are defined as PC-relative. However, on some processors
11882 they are limited to word displacements maximum. When `as' needs a
11883 long branch that is not available, it normally emits an absolute
11884 jump instead. This option disables this substitution. When this
11885 option is given and no long branches are available, only word
11886 branches will be emitted. An error message will be generated if a
11887 word branch cannot reach its target. This option has no effect on
11888 68020 and other processors that have long branches. *note Branch
11889 Improvement: M68K-Branch.
11892 `as' can assemble code for several different members of the
11893 Motorola 680x0 family. The default depends upon how `as' was
11894 configured when it was built; normally, the default is to assemble
11895 code for the 68020 microprocessor. The following options may be
11896 used to change the default. These options control which
11897 instructions and addressing modes are permitted. The members of
11898 the 680x0 family are very similar. For detailed information about
11899 the differences, see the Motorola manuals.
11911 Assemble for the 68000. `-m68008', `-m68302', and so on are
11912 synonyms for `-m68000', since the chips are the same from the
11913 point of view of the assembler.
11916 Assemble for the 68010.
11920 Assemble for the 68020. This is normally the default.
11924 Assemble for the 68030.
11928 Assemble for the 68040.
11932 Assemble for the 68060.
11945 Assemble for the CPU32 family of chips.
11961 Assemble for the ColdFire family of chips.
11965 Assemble 68881 floating point instructions. This is the
11966 default for the 68020, 68030, and the CPU32. The 68040 and
11967 68060 always support floating point instructions.
11970 Do not assemble 68881 floating point instructions. This is
11971 the default for 68000 and the 68010. The 68040 and 68060
11972 always support floating point instructions, even if this
11976 Assemble 68851 MMU instructions. This is the default for the
11977 68020, 68030, and 68060. The 68040 accepts a somewhat
11978 different set of MMU instructions; `-m68851' and `-m68040'
11979 should not be used together.
11982 Do not assemble 68851 MMU instructions. This is the default
11983 for the 68000, 68010, and the CPU32. The 68040 accepts a
11984 somewhat different set of MMU instructions.
11987 File: as.info, Node: M68K-Syntax, Next: M68K-Moto-Syntax, Prev: M68K-Opts, Up: M68K-Dependent
11992 This syntax for the Motorola 680x0 was developed at MIT.
11994 The 680x0 version of `as' uses instructions names and syntax
11995 compatible with the Sun assembler. Intervening periods are ignored;
11996 for example, `movl' is equivalent to `mov.l'.
11998 In the following table APC stands for any of the address registers
11999 (`%a0' through `%a7'), the program counter (`%pc'), the zero-address
12000 relative to the program counter (`%zpc'), a suppressed address register
12001 (`%za0' through `%za7'), or it may be omitted entirely. The use of
12002 SIZE means one of `w' or `l', and it may be omitted, along with the
12003 leading colon, unless a scale is also specified. The use of SCALE
12004 means one of `1', `2', `4', or `8', and it may always be omitted along
12005 with the leading colon.
12007 The following addressing modes are understood:
12012 `%d0' through `%d7'
12015 `%a0' through `%a7'
12016 `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is
12017 also known as `%fp', the Frame Pointer.
12019 "Address Register Indirect"
12020 `%a0@' through `%a7@'
12022 "Address Register Postincrement"
12023 `%a0@+' through `%a7@+'
12025 "Address Register Predecrement"
12026 `%a0@-' through `%a7@-'
12028 "Indirect Plus Offset"
12032 `APC@(NUMBER,REGISTER:SIZE:SCALE)'
12034 The NUMBER may be omitted.
12037 `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)'
12039 The ONUMBER or the REGISTER, but not both, may be omitted.
12042 `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)'
12044 The NUMBER may be omitted. Omitting the REGISTER produces the
12045 Postindex addressing mode.
12048 `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'.
12051 File: as.info, Node: M68K-Moto-Syntax, Next: M68K-Float, Prev: M68K-Syntax, Up: M68K-Dependent
12053 9.21.3 Motorola Syntax
12054 ----------------------
12056 The standard Motorola syntax for this chip differs from the syntax
12057 already discussed (*note Syntax: M68K-Syntax.). `as' can accept
12058 Motorola syntax for operands, even if MIT syntax is used for other
12059 operands in the same instruction. The two kinds of syntax are fully
12062 In the following table APC stands for any of the address registers
12063 (`%a0' through `%a7'), the program counter (`%pc'), the zero-address
12064 relative to the program counter (`%zpc'), or a suppressed address
12065 register (`%za0' through `%za7'). The use of SIZE means one of `w' or
12066 `l', and it may always be omitted along with the leading dot. The use
12067 of SCALE means one of `1', `2', `4', or `8', and it may always be
12068 omitted along with the leading asterisk.
12070 The following additional addressing modes are understood:
12072 "Address Register Indirect"
12073 `(%a0)' through `(%a7)'
12074 `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is
12075 also known as `%fp', the Frame Pointer.
12077 "Address Register Postincrement"
12078 `(%a0)+' through `(%a7)+'
12080 "Address Register Predecrement"
12081 `-(%a0)' through `-(%a7)'
12083 "Indirect Plus Offset"
12084 `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'.
12086 The NUMBER may also appear within the parentheses, as in
12087 `(NUMBER,%A0)'. When used with the PC, the NUMBER may be omitted
12088 (with an address register, omitting the NUMBER produces Address
12089 Register Indirect mode).
12092 `NUMBER(APC,REGISTER.SIZE*SCALE)'
12094 The NUMBER may be omitted, or it may appear within the
12095 parentheses. The APC may be omitted. The REGISTER and the APC
12096 may appear in either order. If both APC and REGISTER are address
12097 registers, and the SIZE and SCALE are omitted, then the first
12098 register is taken as the base register, and the second as the
12102 `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)'
12104 The ONUMBER, or the REGISTER, or both, may be omitted. Either the
12105 NUMBER or the APC may be omitted, but not both.
12108 `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)'
12110 The NUMBER, or the APC, or the REGISTER, or any two of them, may
12111 be omitted. The ONUMBER may be omitted. The REGISTER and the APC
12112 may appear in either order. If both APC and REGISTER are address
12113 registers, and the SIZE and SCALE are omitted, then the first
12114 register is taken as the base register, and the second as the
12118 File: as.info, Node: M68K-Float, Next: M68K-Directives, Prev: M68K-Moto-Syntax, Up: M68K-Dependent
12120 9.21.4 Floating Point
12121 ---------------------
12123 Packed decimal (P) format floating literals are not supported. Feel
12124 free to add the code!
12126 The floating point formats generated by directives are these.
12129 `Single' precision floating point constants.
12132 `Double' precision floating point constants.
12136 `Extended' precision (`long double') floating point constants.
12139 File: as.info, Node: M68K-Directives, Next: M68K-opcodes, Prev: M68K-Float, Up: M68K-Dependent
12141 9.21.5 680x0 Machine Directives
12142 -------------------------------
12144 In order to be compatible with the Sun assembler the 680x0 assembler
12145 understands the following directives.
12148 This directive is identical to a `.data 1' directive.
12151 This directive is identical to a `.data 2' directive.
12154 This directive is a special case of the `.align' directive; it
12155 aligns the output to an even byte boundary.
12158 This directive is identical to a `.space' directive.
12161 Select the target architecture and extension features. Valid
12162 values for NAME are the same as for the `-march' command line
12163 option. This directive cannot be specified after any instructions
12164 have been assembled. If it is given multiple times, or in
12165 conjunction with the `-march' option, all uses must be for the
12166 same architecture and extension set.
12169 Select the target cpu. Valid valuse for NAME are the same as for
12170 the `-mcpu' command line option. This directive cannot be
12171 specified after any instructions have been assembled. If it is
12172 given multiple times, or in conjunction with the `-mopt' option,
12173 all uses must be for the same cpu.
12177 File: as.info, Node: M68K-opcodes, Prev: M68K-Directives, Up: M68K-Dependent
12184 * M68K-Branch:: Branch Improvement
12185 * M68K-Chars:: Special Characters
12188 File: as.info, Node: M68K-Branch, Next: M68K-Chars, Up: M68K-opcodes
12190 9.21.6.1 Branch Improvement
12191 ...........................
12193 Certain pseudo opcodes are permitted for branch instructions. They
12194 expand to the shortest branch instruction that reach the target.
12195 Generally these mnemonics are made by substituting `j' for `b' at the
12196 start of a Motorola mnemonic.
12198 The following table summarizes the pseudo-operations. A `*' flags
12199 cases that are more fully described after the table:
12202 +------------------------------------------------------------
12203 | 68020 68000/10, not PC-relative OK
12204 Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP **
12205 +------------------------------------------------------------
12206 jbsr |bsrs bsrw bsrl jsr
12207 jra |bras braw bral jmp
12208 * jXX |bXXs bXXw bXXl bNXs;jmp
12209 * dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp
12210 fjXX | N/A fbXXw fbXXl N/A
12213 NX: negative of condition XX
12214 `*'--see full description below
12215 `**'--this expansion mode is disallowed by `--pcrel'
12219 These are the simplest jump pseudo-operations; they always map to
12220 one particular machine instruction, depending on the displacement
12221 to the branch target. This instruction will be a byte or word
12222 branch is that is sufficient. Otherwise, a long branch will be
12223 emitted if available. If no long branches are available and the
12224 `--pcrel' option is not given, an absolute long jump will be
12225 emitted instead. If no long branches are available, the `--pcrel'
12226 option is given, and a word branch cannot reach the target, an
12227 error message is generated.
12229 In addition to standard branch operands, `as' allows these
12230 pseudo-operations to have all operands that are allowed for jsr
12231 and jmp, substituting these instructions if the operand given is
12232 not valid for a branch instruction.
12235 Here, `jXX' stands for an entire family of pseudo-operations,
12236 where XX is a conditional branch or condition-code test. The full
12237 list of pseudo-ops in this family is:
12238 jhi jls jcc jcs jne jeq jvc
12239 jvs jpl jmi jge jlt jgt jle
12241 Usually, each of these pseudo-operations expands to a single branch
12242 instruction. However, if a word branch is not sufficient, no long
12243 branches are available, and the `--pcrel' option is not given, `as'
12244 issues a longer code fragment in terms of NX, the opposite
12245 condition to XX. For example, under these conditions:
12253 The full family of pseudo-operations covered here is
12254 dbhi dbls dbcc dbcs dbne dbeq dbvc
12255 dbvs dbpl dbmi dbge dblt dbgt dble
12258 Motorola `dbXX' instructions allow word displacements only. When
12259 a word displacement is sufficient, each of these pseudo-operations
12260 expands to the corresponding Motorola instruction. When a word
12261 displacement is not sufficient and long branches are available,
12262 when the source reads `dbXX foo', `as' emits
12268 If, however, long branches are not available and the `--pcrel'
12269 option is not given, `as' emits
12276 This family includes
12277 fjne fjeq fjge fjlt fjgt fjle fjf
12278 fjt fjgl fjgle fjnge fjngl fjngle fjngt
12279 fjnle fjnlt fjoge fjogl fjogt fjole fjolt
12280 fjor fjseq fjsf fjsne fjst fjueq fjuge
12281 fjugt fjule fjult fjun
12283 Each of these pseudo-operations always expands to a single Motorola
12284 coprocessor branch instruction, word or long. All Motorola
12285 coprocessor branch instructions allow both word and long
12290 File: as.info, Node: M68K-Chars, Prev: M68K-Branch, Up: M68K-opcodes
12292 9.21.6.2 Special Characters
12293 ...........................
12295 Line comments are introduced by the `|' character appearing anywhere on
12296 a line, unless the `--bitwise-or' command line option has been
12299 An asterisk (`*') as the first character on a line marks the start
12300 of a line comment as well.
12302 A hash character (`#') as the first character on a line also marks
12303 the start of a line comment, but in this case it could also be a
12304 logical line number directive (*note Comments::) or a preprocessor
12305 control command (*note Preprocessing::). If the hash character appears
12306 elsewhere on a line it is used to introduce an immediate value. (This
12307 is for compatibility with Sun's assembler).
12309 Multiple statements on the same line can appear if they are separated
12310 by the `;' character.
12313 File: as.info, Node: M68HC11-Dependent, Next: MicroBlaze-Dependent, Prev: M68K-Dependent, Up: Machine Dependencies
12315 9.22 M68HC11 and M68HC12 Dependent Features
12316 ===========================================
12320 * M68HC11-Opts:: M68HC11 and M68HC12 Options
12321 * M68HC11-Syntax:: Syntax
12322 * M68HC11-Modifiers:: Symbolic Operand Modifiers
12323 * M68HC11-Directives:: Assembler Directives
12324 * M68HC11-Float:: Floating Point
12325 * M68HC11-opcodes:: Opcodes
12328 File: as.info, Node: M68HC11-Opts, Next: M68HC11-Syntax, Up: M68HC11-Dependent
12330 9.22.1 M68HC11 and M68HC12 Options
12331 ----------------------------------
12333 The Motorola 68HC11 and 68HC12 version of `as' have a few machine
12337 This option switches the assembler in the M68HC11 mode. In this
12338 mode, the assembler only accepts 68HC11 operands and mnemonics. It
12339 produces code for the 68HC11.
12342 This option switches the assembler in the M68HC12 mode. In this
12343 mode, the assembler also accepts 68HC12 operands and mnemonics. It
12344 produces code for the 68HC12. A few 68HC11 instructions are
12345 replaced by some 68HC12 instructions as recommended by Motorola
12349 This option switches the assembler in the M68HCS12 mode. This
12350 mode is similar to `-m68hc12' but specifies to assemble for the
12351 68HCS12 series. The only difference is on the assembling of the
12352 `movb' and `movw' instruction when a PC-relative operand is used.
12355 This option controls the ABI and indicates to use a 16-bit integer
12356 ABI. It has no effect on the assembled instructions. This is the
12360 This option controls the ABI and indicates to use a 32-bit integer
12364 This option controls the ABI and indicates to use a 32-bit float
12365 ABI. This is the default.
12368 This option controls the ABI and indicates to use a 64-bit float
12371 `--strict-direct-mode'
12372 You can use the `--strict-direct-mode' option to disable the
12373 automatic translation of direct page mode addressing into extended
12374 mode when the instruction does not support direct mode. For
12375 example, the `clr' instruction does not support direct page mode
12376 addressing. When it is used with the direct page mode, `as' will
12377 ignore it and generate an absolute addressing. This option
12378 prevents `as' from doing this, and the wrong usage of the direct
12379 page mode will raise an error.
12382 The `--short-branches' option turns off the translation of
12383 relative branches into absolute branches when the branch offset is
12384 out of range. By default `as' transforms the relative branch
12385 (`bsr', `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc',
12386 `bls', `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch
12387 when the offset is out of the -128 .. 127 range. In that case,
12388 the `bsr' instruction is translated into a `jsr', the `bra'
12389 instruction is translated into a `jmp' and the conditional
12390 branches instructions are inverted and followed by a `jmp'. This
12391 option disables these translations and `as' will generate an error
12392 if a relative branch is out of range. This option does not affect
12393 the optimization associated to the `jbra', `jbsr' and `jbXX'
12396 `--force-long-branches'
12397 The `--force-long-branches' option forces the translation of
12398 relative branches into absolute branches. This option does not
12399 affect the optimization associated to the `jbra', `jbsr' and
12400 `jbXX' pseudo opcodes.
12402 `--print-insn-syntax'
12403 You can use the `--print-insn-syntax' option to obtain the syntax
12404 description of the instruction when an error is detected.
12407 The `--print-opcodes' option prints the list of all the
12408 instructions with their syntax. The first item of each line
12409 represents the instruction name and the rest of the line indicates
12410 the possible operands for that instruction. The list is printed in
12411 alphabetical order. Once the list is printed `as' exits.
12413 `--generate-example'
12414 The `--generate-example' option is similar to `--print-opcodes'
12415 but it generates an example for each instruction instead.
12418 File: as.info, Node: M68HC11-Syntax, Next: M68HC11-Modifiers, Prev: M68HC11-Opts, Up: M68HC11-Dependent
12423 In the M68HC11 syntax, the instruction name comes first and it may be
12424 followed by one or several operands (up to three). Operands are
12425 separated by comma (`,'). In the normal mode, `as' will complain if too
12426 many operands are specified for a given instruction. In the MRI mode
12427 (turned on with `-M' option), it will treat them as comments. Example:
12434 The presence of a `;' character or a `!' character anywhere on a
12435 line indicates the start of a comment that extends to the end of that
12438 A `*' or a `#' character at the start of a line also introduces a
12439 line comment, but these characters do not work elsewhere on the line.
12440 If the first character of the line is a `#' then as well as starting a
12441 comment, the line could also be logical line number directive (*note
12442 Comments::) or a preprocessor control command (*note Preprocessing::).
12444 The M68HC11 assembler does not currently support a line separator
12447 The following addressing modes are understood for 68HC11 and 68HC12:
12452 `NUMBER,X', `NUMBER,Y'
12454 The NUMBER may be omitted in which case 0 is assumed.
12456 "Direct Addressing mode"
12457 `*SYMBOL', or `*DIGITS'
12460 `SYMBOL', or `DIGITS'
12462 The M68HC12 has other more complex addressing modes. All of them are
12463 supported and they are represented below:
12465 "Constant Offset Indexed Addressing Mode"
12468 The NUMBER may be omitted in which case 0 is assumed. The
12469 register can be either `X', `Y', `SP' or `PC'. The assembler will
12470 use the smaller post-byte definition according to the constant
12471 value (5-bit constant offset, 9-bit constant offset or 16-bit
12472 constant offset). If the constant is not known by the assembler
12473 it will use the 16-bit constant offset post-byte and the value
12474 will be resolved at link time.
12476 "Offset Indexed Indirect"
12479 The register can be either `X', `Y', `SP' or `PC'.
12481 "Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement"
12482 `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+'
12484 The number must be in the range `-8'..`+8' and must not be 0. The
12485 register can be either `X', `Y', `SP' or `PC'.
12487 "Accumulator Offset"
12490 The accumulator register can be either `A', `B' or `D'. The
12491 register can be either `X', `Y', `SP' or `PC'.
12493 "Accumulator D offset indexed-indirect"
12496 The register can be either `X', `Y', `SP' or `PC'.
12509 File: as.info, Node: M68HC11-Modifiers, Next: M68HC11-Directives, Prev: M68HC11-Syntax, Up: M68HC11-Dependent
12511 9.22.3 Symbolic Operand Modifiers
12512 ---------------------------------
12514 The assembler supports several modifiers when using symbol addresses in
12515 68HC11 and 68HC12 instruction operands. The general syntax is the
12521 This modifier indicates to the assembler and linker to use the
12522 16-bit physical address corresponding to the symbol. This is
12523 intended to be used on memory window systems to map a symbol in
12524 the memory bank window. If the symbol is in a memory expansion
12525 part, the physical address corresponds to the symbol address
12526 within the memory bank window. If the symbol is not in a memory
12527 expansion part, this is the symbol address (using or not using the
12528 %addr modifier has no effect in that case).
12531 This modifier indicates to use the memory page number corresponding
12532 to the symbol. If the symbol is in a memory expansion part, its
12533 page number is computed by the linker as a number used to map the
12534 page containing the symbol in the memory bank window. If the
12535 symbol is not in a memory expansion part, the page number is 0.
12538 This modifier indicates to use the 8-bit high part of the physical
12539 address of the symbol.
12542 This modifier indicates to use the 8-bit low part of the physical
12543 address of the symbol.
12546 For example a 68HC12 call to a function `foo_example' stored in
12547 memory expansion part could be written as follows:
12549 call %addr(foo_example),%page(foo_example)
12551 and this is equivalent to
12555 And for 68HC11 it could be written as follows:
12557 ldab #%page(foo_example)
12559 jsr %addr(foo_example)
12562 File: as.info, Node: M68HC11-Directives, Next: M68HC11-Float, Prev: M68HC11-Modifiers, Up: M68HC11-Dependent
12564 9.22.4 Assembler Directives
12565 ---------------------------
12567 The 68HC11 and 68HC12 version of `as' have the following specific
12568 assembler directives:
12571 The relax directive is used by the `GNU Compiler' to emit a
12572 specific relocation to mark a group of instructions for linker
12573 relaxation. The sequence of instructions within the group must be
12574 known to the linker so that relaxation can be performed.
12576 `.mode [mshort|mlong|mshort-double|mlong-double]'
12577 This directive specifies the ABI. It overrides the `-mshort',
12578 `-mlong', `-mshort-double' and `-mlong-double' options.
12581 This directive marks the symbol as a `far' symbol meaning that it
12582 uses a `call/rtc' calling convention as opposed to `jsr/rts'.
12583 During a final link, the linker will identify references to the
12584 `far' symbol and will verify the proper calling convention.
12586 `.interrupt SYMBOL'
12587 This directive marks the symbol as an interrupt entry point. This
12588 information is then used by the debugger to correctly unwind the
12589 frame across interrupts.
12592 This directive is defined for compatibility with the
12593 `Specification for Motorola 8 and 16-Bit Assembly Language Input
12594 Standard' and is ignored.
12598 File: as.info, Node: M68HC11-Float, Next: M68HC11-opcodes, Prev: M68HC11-Directives, Up: M68HC11-Dependent
12600 9.22.5 Floating Point
12601 ---------------------
12603 Packed decimal (P) format floating literals are not supported. Feel
12604 free to add the code!
12606 The floating point formats generated by directives are these.
12609 `Single' precision floating point constants.
12612 `Double' precision floating point constants.
12616 `Extended' precision (`long double') floating point constants.
12619 File: as.info, Node: M68HC11-opcodes, Prev: M68HC11-Float, Up: M68HC11-Dependent
12626 * M68HC11-Branch:: Branch Improvement
12629 File: as.info, Node: M68HC11-Branch, Up: M68HC11-opcodes
12631 9.22.6.1 Branch Improvement
12632 ...........................
12634 Certain pseudo opcodes are permitted for branch instructions. They
12635 expand to the shortest branch instruction that reach the target.
12636 Generally these mnemonics are made by prepending `j' to the start of
12637 Motorola mnemonic. These pseudo opcodes are not affected by the
12638 `--short-branches' or `--force-long-branches' options.
12640 The following table summarizes the pseudo-operations.
12643 +-------------------------------------------------------------+
12645 | --short-branches --force-long-branches |
12646 +--------------------------+----------------------------------+
12647 Op |BYTE WORD | BYTE WORD |
12648 +--------------------------+----------------------------------+
12649 bsr | bsr <pc-rel> <error> | jsr <abs> |
12650 bra | bra <pc-rel> <error> | jmp <abs> |
12651 jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
12652 jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
12653 bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
12654 jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
12656 +--------------------------+----------------------------------+
12658 NX: negative of condition XX
12662 These are the simplest jump pseudo-operations; they always map to
12663 one particular machine instruction, depending on the displacement
12664 to the branch target.
12667 Here, `jbXX' stands for an entire family of pseudo-operations,
12668 where XX is a conditional branch or condition-code test. The full
12669 list of pseudo-ops in this family is:
12670 jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
12671 jbcs jbne jblt jble jbls jbvc jbmi
12673 For the cases of non-PC relative displacements and long
12674 displacements, `as' issues a longer code fragment in terms of NX,
12675 the opposite condition to XX. For example, for the non-PC
12685 File: as.info, Node: MicroBlaze-Dependent, Next: MIPS-Dependent, Prev: M68HC11-Dependent, Up: Machine Dependencies
12687 9.23 MicroBlaze Dependent Features
12688 ==================================
12690 The Xilinx MicroBlaze processor family includes several variants,
12691 all using the same core instruction set. This chapter covers features
12692 of the GNU assembler that are specific to the MicroBlaze architecture.
12693 For details about the MicroBlaze instruction set, please see the
12694 `MicroBlaze Processor Reference Guide (UG081)' available at
12699 * MicroBlaze Directives:: Directives for MicroBlaze Processors.
12700 * MicroBlaze Syntax:: Syntax for the MicroBlaze
12703 File: as.info, Node: MicroBlaze Directives, Next: MicroBlaze Syntax, Up: MicroBlaze-Dependent
12708 A number of assembler directives are available for MicroBlaze.
12710 `.data8 EXPRESSION,...'
12711 This directive is an alias for `.byte'. Each expression is
12712 assembled into an eight-bit value.
12714 `.data16 EXPRESSION,...'
12715 This directive is an alias for `.hword'. Each expression is
12716 assembled into an 16-bit value.
12718 `.data32 EXPRESSION,...'
12719 This directive is an alias for `.word'. Each expression is
12720 assembled into an 32-bit value.
12722 `.ent NAME[,LABEL]'
12723 This directive is an alias for `.func' denoting the start of
12724 function NAME at (optional) LABEL.
12726 `.end NAME[,LABEL]'
12727 This directive is an alias for `.endfunc' denoting the end of
12730 `.gpword LABEL,...'
12731 This directive is an alias for `.rva'. The resolved address of
12732 LABEL is stored in the data section.
12735 Declare that LABEL is a weak external symbol.
12738 Switch to .rodata section. Equivalent to `.section .rodata'
12741 Switch to .sdata2 section. Equivalent to `.section .sdata2'
12744 Switch to .sdata section. Equivalent to `.section .sdata'
12747 Switch to .bss section. Equivalent to `.section .bss'
12750 Switch to .sbss section. Equivalent to `.section .sbss'
12753 File: as.info, Node: MicroBlaze Syntax, Prev: MicroBlaze Directives, Up: MicroBlaze-Dependent
12755 9.23.2 Syntax for the MicroBlaze
12756 --------------------------------
12760 * MicroBlaze-Chars:: Special Characters
12763 File: as.info, Node: MicroBlaze-Chars, Up: MicroBlaze Syntax
12765 9.23.2.1 Special Characters
12766 ...........................
12768 The presence of a `#' on a line indicates the start of a comment that
12769 extends to the end of the current line.
12771 If a `#' appears as the first character of a line, the whole line is
12772 treated as a comment, but in this case the line can also be a logical
12773 line number directive (*note Comments::) or a preprocessor control
12774 command (*note Preprocessing::).
12776 The `;' character can be used to separate statements on the same
12780 File: as.info, Node: MIPS-Dependent, Next: MMIX-Dependent, Prev: MicroBlaze-Dependent, Up: Machine Dependencies
12782 9.24 MIPS Dependent Features
12783 ============================
12785 GNU `as' for MIPS architectures supports several different MIPS
12786 processors, and MIPS ISA levels I through V, MIPS32, and MIPS64. For
12787 information about the MIPS instruction set, see `MIPS RISC
12788 Architecture', by Kane and Heindrich (Prentice-Hall). For an overview
12789 of MIPS assembly conventions, see "Appendix D: Assembly Language
12790 Programming" in the same work.
12794 * MIPS Opts:: Assembler options
12795 * MIPS Object:: ECOFF object code
12796 * MIPS Stabs:: Directives for debugging information
12797 * MIPS ISA:: Directives to override the ISA level
12798 * MIPS symbol sizes:: Directives to override the size of symbols
12799 * MIPS autoextend:: Directives for extending MIPS 16 bit instructions
12800 * MIPS insn:: Directive to mark data as an instruction
12801 * MIPS option stack:: Directives to save and restore options
12802 * MIPS ASE instruction generation overrides:: Directives to control
12803 generation of MIPS ASE instructions
12804 * MIPS floating-point:: Directives to override floating-point options
12805 * MIPS Syntax:: MIPS specific syntactical considerations
12808 File: as.info, Node: MIPS Opts, Next: MIPS Object, Up: MIPS-Dependent
12810 9.24.1 Assembler options
12811 ------------------------
12813 The MIPS configurations of GNU `as' support these special options:
12816 This option sets the largest size of an object that can be
12817 referenced implicitly with the `gp' register. It is only accepted
12818 for targets that use ECOFF format. The default value is 8.
12822 Any MIPS configuration of `as' can select big-endian or
12823 little-endian output at run time (unlike the other GNU development
12824 tools, which must be configured for one or the other). Use `-EB'
12825 to select big-endian output, and `-EL' for little-endian.
12828 Generate SVR4-style PIC. This option tells the assembler to
12829 generate SVR4-style position-independent macro expansions. It
12830 also tells the assembler to mark the output file as PIC.
12833 Generate VxWorks PIC. This option tells the assembler to generate
12834 VxWorks-style position-independent macro expansions.
12845 Generate code for a particular MIPS Instruction Set Architecture
12846 level. `-mips1' corresponds to the R2000 and R3000 processors,
12847 `-mips2' to the R6000 processor, `-mips3' to the R4000 processor,
12848 and `-mips4' to the R8000 and R10000 processors. `-mips5',
12849 `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to
12850 generic MIPS V, MIPS32, MIPS32 RELEASE 2, MIPS64, and MIPS64
12851 RELEASE 2 ISA processors, respectively. You can also switch
12852 instruction sets during the assembly; see *Note Directives to
12853 override the ISA level: MIPS ISA.
12857 Some macros have different expansions for 32-bit and 64-bit
12858 registers. The register sizes are normally inferred from the ISA
12859 and ABI, but these flags force a certain group of registers to be
12860 treated as 32 bits wide at all times. `-mgp32' controls the size
12861 of general-purpose registers and `-mfp32' controls the size of
12862 floating-point registers.
12864 The `.set gp=32' and `.set fp=32' directives allow the size of
12865 registers to be changed for parts of an object. The default value
12866 is restored by `.set gp=default' and `.set fp=default'.
12868 On some MIPS variants there is a 32-bit mode flag; when this flag
12869 is set, 64-bit instructions generate a trap. Also, some 32-bit
12870 OSes only save the 32-bit registers on a context switch, so it is
12871 essential never to use the 64-bit registers.
12875 Assume that 64-bit registers are available. This is provided in
12876 the interests of symmetry with `-mgp32' and `-mfp32'.
12878 The `.set gp=64' and `.set fp=64' directives allow the size of
12879 registers to be changed for parts of an object. The default value
12880 is restored by `.set gp=default' and `.set fp=default'.
12884 Generate code for the MIPS 16 processor. This is equivalent to
12885 putting `.set mips16' at the start of the assembly file.
12886 `-no-mips16' turns off this option.
12890 Generate code for the microMIPS processor. This is equivalent to
12891 putting `.set micromips' at the start of the assembly file.
12892 `-mno-micromips' turns off this option. This is equivalent to
12893 putting `.set nomicromips' at the start of the assembly file.
12897 Enables the SmartMIPS extensions to the MIPS32 instruction set,
12898 which provides a number of new instructions which target smartcard
12899 and cryptographic applications. This is equivalent to putting
12900 `.set smartmips' at the start of the assembly file.
12901 `-mno-smartmips' turns off this option.
12905 Generate code for the MIPS-3D Application Specific Extension.
12906 This tells the assembler to accept MIPS-3D instructions.
12907 `-no-mips3d' turns off this option.
12911 Generate code for the MDMX Application Specific Extension. This
12912 tells the assembler to accept MDMX instructions. `-no-mdmx' turns
12917 Generate code for the DSP Release 1 Application Specific Extension.
12918 This tells the assembler to accept DSP Release 1 instructions.
12919 `-mno-dsp' turns off this option.
12923 Generate code for the DSP Release 2 Application Specific Extension.
12924 This option implies -mdsp. This tells the assembler to accept DSP
12925 Release 2 instructions. `-mno-dspr2' turns off this option.
12929 Generate code for the MT Application Specific Extension. This
12930 tells the assembler to accept MT instructions. `-mno-mt' turns
12935 Generate code for the MCU Application Specific Extension. This
12936 tells the assembler to accept MCU instructions. `-mno-mcu' turns
12941 Cause nops to be inserted if the read of the destination register
12942 of an mfhi or mflo instruction occurs in the following two
12945 `-mfix-loongson2f-jump'
12946 `-mno-fix-loongson2f-jump'
12947 Eliminate instruction fetch from outside 256M region to work
12948 around the Loongson2F `jump' instructions. Without it, under
12949 extreme cases, the kernel may crash. The issue has been solved in
12950 latest processor batches, but this fix has no side effect to them.
12952 `-mfix-loongson2f-nop'
12953 `-mno-fix-loongson2f-nop'
12954 Replace nops by `or at,at,zero' to work around the Loongson2F
12955 `nop' errata. Without it, under extreme cases, cpu might
12956 deadlock. The issue has been solved in latest loongson2f batches,
12957 but this fix has no side effect to them.
12961 Insert nops to work around certain VR4120 errata. This option is
12962 intended to be used on GCC-generated code: it is not designed to
12963 catch all problems in hand-written assembler code.
12967 Insert nops to work around the VR4130 `mflo'/`mfhi' errata.
12971 Insert nops to work around the 24K `eret'/`deret' errata.
12974 `-mno-fix-cn63xxp1'
12975 Replace `pref' hints 0 - 4 and 6 - 24 with hint 28 to work around
12976 certain CN63XXP1 errata.
12980 Generate code for the LSI R4010 chip. This tells the assembler to
12981 accept the R4010 specific instructions (`addciu', `ffc', etc.),
12982 and to not schedule `nop' instructions around accesses to the `HI'
12983 and `LO' registers. `-no-m4010' turns off this option.
12987 Generate code for the MIPS R4650 chip. This tells the assembler
12988 to accept the `mad' and `madu' instruction, and to not schedule
12989 `nop' instructions around accesses to the `HI' and `LO' registers.
12990 `-no-m4650' turns off this option.
12996 For each option `-mNNNN', generate code for the MIPS RNNNN chip.
12997 This tells the assembler to accept instructions specific to that
12998 chip, and to schedule for that chip's hazards.
13001 Generate code for a particular MIPS cpu. It is exactly equivalent
13002 to `-mCPU', except that there are more value of CPU understood.
13003 Valid CPU value are:
13005 2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130,
13006 vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231,
13007 rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000,
13008 10000, 12000, 14000, 16000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem,
13009 4kep, 4ksd, m4k, m4kp, m14k, m14kc, 24kc, 24kf2_1, 24kf,
13010 24kf1_1, 24kec, 24kef2_1, 24kef, 24kef1_1, 34kc, 34kf2_1,
13011 34kf, 34kf1_1, 74kc, 74kf2_1, 74kf, 74kf1_1, 74kf3_2, 1004kc,
13012 1004kf2_1, 1004kf, 1004kf1_1, 5kc, 5kf, 20kc, 25kf, sb1, sb1a,
13013 loongson2e, loongson2f, loongson3a, octeon, xlr
13015 For compatibility reasons, `Nx' and `Bfx' are accepted as synonyms
13016 for `Nf1_1'. These values are deprecated.
13019 Schedule and tune for a particular MIPS cpu. Valid CPU values are
13020 identical to `-march=CPU'.
13023 Record which ABI the source code uses. The recognized arguments
13024 are: `32', `n32', `o64', `64' and `eabi'.
13028 Equivalent to adding `.set sym32' or `.set nosym32' to the
13029 beginning of the assembler input. *Note MIPS symbol sizes::.
13032 This option is ignored. It is accepted for command-line
13033 compatibility with other assemblers, which use it to turn off C
13034 style preprocessing. With GNU `as', there is no need for
13035 `-nocpp', because the GNU assembler itself never runs the C
13040 Disable or enable floating-point instructions. Note that by
13041 default floating-point instructions are always allowed even with
13042 CPU targets that don't have support for these instructions.
13046 Disable or enable double-precision floating-point operations. Note
13047 that by default double-precision floating-point operations are
13048 always allowed even with CPU targets that don't have support for
13051 `--construct-floats'
13052 `--no-construct-floats'
13053 The `--no-construct-floats' option disables the construction of
13054 double width floating point constants by loading the two halves of
13055 the value into the two single width floating point registers that
13056 make up the double width register. This feature is useful if the
13057 processor support the FR bit in its status register, and this bit
13058 is known (by the programmer) to be set. This bit prevents the
13059 aliasing of the double width register by the single width
13062 By default `--construct-floats' is selected, allowing construction
13063 of these floating point constants.
13067 `as' automatically macro expands certain division and
13068 multiplication instructions to check for overflow and division by
13069 zero. This option causes `as' to generate code to take a trap
13070 exception rather than a break exception when an error is detected.
13071 The trap instructions are only supported at Instruction Set
13072 Architecture level 2 and higher.
13076 Generate code to take a break exception rather than a trap
13077 exception when an error is detected. This is the default.
13081 Control generation of `.pdr' sections. Off by default on IRIX, on
13086 When generating code using the Unix calling conventions (selected
13087 by `-KPIC' or `-mcall_shared'), gas will normally generate code
13088 which can go into a shared library. The `-mno-shared' option
13089 tells gas to generate code which uses the calling convention, but
13090 can not go into a shared library. The resulting code is slightly
13091 more efficient. This option only affects the handling of the
13092 `.cpload' and `.cpsetup' pseudo-ops.
13095 File: as.info, Node: MIPS Object, Next: MIPS Stabs, Prev: MIPS Opts, Up: MIPS-Dependent
13097 9.24.2 MIPS ECOFF object code
13098 -----------------------------
13100 Assembling for a MIPS ECOFF target supports some additional sections
13101 besides the usual `.text', `.data' and `.bss'. The additional sections
13102 are `.rdata', used for read-only data, `.sdata', used for small data,
13103 and `.sbss', used for small common objects.
13105 When assembling for ECOFF, the assembler uses the `$gp' (`$28')
13106 register to form the address of a "small object". Any object in the
13107 `.sdata' or `.sbss' sections is considered "small" in this sense. For
13108 external objects, or for objects in the `.bss' section, you can use the
13109 `gcc' `-G' option to control the size of objects addressed via `$gp';
13110 the default value is 8, meaning that a reference to any object eight
13111 bytes or smaller uses `$gp'. Passing `-G 0' to `as' prevents it from
13112 using the `$gp' register on the basis of object size (but the assembler
13113 uses `$gp' for objects in `.sdata' or `sbss' in any case). The size of
13114 an object in the `.bss' section is set by the `.comm' or `.lcomm'
13115 directive that defines it. The size of an external object may be set
13116 with the `.extern' directive. For example, `.extern sym,4' declares
13117 that the object at `sym' is 4 bytes in length, whie leaving `sym'
13118 otherwise undefined.
13120 Using small ECOFF objects requires linker support, and assumes that
13121 the `$gp' register is correctly initialized (normally done
13122 automatically by the startup code). MIPS ECOFF assembly code must not
13123 modify the `$gp' register.
13126 File: as.info, Node: MIPS Stabs, Next: MIPS ISA, Prev: MIPS Object, Up: MIPS-Dependent
13128 9.24.3 Directives for debugging information
13129 -------------------------------------------
13131 MIPS ECOFF `as' supports several directives used for generating
13132 debugging information which are not support by traditional MIPS
13133 assemblers. These are `.def', `.endef', `.dim', `.file', `.scl',
13134 `.size', `.tag', `.type', `.val', `.stabd', `.stabn', and `.stabs'.
13135 The debugging information generated by the three `.stab' directives can
13136 only be read by GDB, not by traditional MIPS debuggers (this
13137 enhancement is required to fully support C++ debugging). These
13138 directives are primarily used by compilers, not assembly language
13142 File: as.info, Node: MIPS symbol sizes, Next: MIPS autoextend, Prev: MIPS ISA, Up: MIPS-Dependent
13144 9.24.4 Directives to override the size of symbols
13145 -------------------------------------------------
13147 The n64 ABI allows symbols to have any 64-bit value. Although this
13148 provides a great deal of flexibility, it means that some macros have
13149 much longer expansions than their 32-bit counterparts. For example,
13150 the non-PIC expansion of `dla $4,sym' is usually:
13152 lui $4,%highest(sym)
13154 daddiu $4,$4,%higher(sym)
13155 daddiu $1,$1,%lo(sym)
13159 whereas the 32-bit expansion is simply:
13162 daddiu $4,$4,%lo(sym)
13164 n64 code is sometimes constructed in such a way that all symbolic
13165 constants are known to have 32-bit values, and in such cases, it's
13166 preferable to use the 32-bit expansion instead of the 64-bit expansion.
13168 You can use the `.set sym32' directive to tell the assembler that,
13169 from this point on, all expressions of the form `SYMBOL' or `SYMBOL +
13170 OFFSET' have 32-bit values. For example:
13175 sw $4,sym+0x8000($4)
13177 will cause the assembler to treat `sym', `sym+16' and `sym+0x8000'
13178 as 32-bit values. The handling of non-symbolic addresses is not
13181 The directive `.set nosym32' ends a `.set sym32' block and reverts
13182 to the normal behavior. It is also possible to change the symbol size
13183 using the command-line options `-msym32' and `-mno-sym32'.
13185 These options and directives are always accepted, but at present,
13186 they have no effect for anything other than n64.
13189 File: as.info, Node: MIPS ISA, Next: MIPS symbol sizes, Prev: MIPS Stabs, Up: MIPS-Dependent
13191 9.24.5 Directives to override the ISA level
13192 -------------------------------------------
13194 GNU `as' supports an additional directive to change the MIPS
13195 Instruction Set Architecture level on the fly: `.set mipsN'. N should
13196 be a number from 0 to 5, or 32, 32r2, 64 or 64r2. The values other
13197 than 0 make the assembler accept instructions for the corresponding ISA
13198 level, from that point on in the assembly. `.set mipsN' affects not
13199 only which instructions are permitted, but also how certain macros are
13200 expanded. `.set mips0' restores the ISA level to its original level:
13201 either the level you selected with command line options, or the default
13202 for your configuration. You can use this feature to permit specific
13203 MIPS3 instructions while assembling in 32 bit mode. Use this directive
13206 The `.set arch=CPU' directive provides even finer control. It
13207 changes the effective CPU target and allows the assembler to use
13208 instructions specific to a particular CPU. All CPUs supported by the
13209 `-march' command line option are also selectable by this directive.
13210 The original value is restored by `.set arch=default'.
13212 The directive `.set mips16' puts the assembler into MIPS 16 mode, in
13213 which it will assemble instructions for the MIPS 16 processor. Use
13214 `.set nomips16' to return to normal 32 bit mode.
13216 Traditional MIPS assemblers do not support this directive.
13218 The directive `.set micromips' puts the assembler into microMIPS
13219 mode, in which it will assemble instructions for the microMIPS
13220 processor. Use `.set nomicromips' to return to normal 32 bit mode.
13222 Traditional MIPS assemblers do not support this directive.
13225 File: as.info, Node: MIPS autoextend, Next: MIPS insn, Prev: MIPS symbol sizes, Up: MIPS-Dependent
13227 9.24.6 Directives for extending MIPS 16 bit instructions
13228 --------------------------------------------------------
13230 By default, MIPS 16 instructions are automatically extended to 32 bits
13231 when necessary. The directive `.set noautoextend' will turn this off.
13232 When `.set noautoextend' is in effect, any 32 bit instruction must be
13233 explicitly extended with the `.e' modifier (e.g., `li.e $4,1000'). The
13234 directive `.set autoextend' may be used to once again automatically
13235 extend instructions when necessary.
13237 This directive is only meaningful when in MIPS 16 mode. Traditional
13238 MIPS assemblers do not support this directive.
13241 File: as.info, Node: MIPS insn, Next: MIPS option stack, Prev: MIPS autoextend, Up: MIPS-Dependent
13243 9.24.7 Directive to mark data as an instruction
13244 -----------------------------------------------
13246 The `.insn' directive tells `as' that the following data is actually
13247 instructions. This makes a difference in MIPS 16 and microMIPS modes:
13248 when loading the address of a label which precedes instructions, `as'
13249 automatically adds 1 to the value, so that jumping to the loaded
13250 address will do the right thing.
13252 The `.global' and `.globl' directives supported by `as' will by
13253 default mark the symbol as pointing to a region of data not code. This
13254 means that, for example, any instructions following such a symbol will
13255 not be disassembled by `objdump' as it will regard them as data. To
13256 change this behaviour an optional section name can be placed after the
13257 symbol name in the `.global' directive. If this section exists and is
13258 known to be a code section, then the symbol will be marked as poiting at
13259 code not data. Ie the syntax for the directive is:
13261 `.global SYMBOL[ SECTION][, SYMBOL[ SECTION]] ...',
13263 Here is a short example:
13265 .global foo .text, bar, baz .data
13274 File: as.info, Node: MIPS option stack, Next: MIPS ASE instruction generation overrides, Prev: MIPS insn, Up: MIPS-Dependent
13276 9.24.8 Directives to save and restore options
13277 ---------------------------------------------
13279 The directives `.set push' and `.set pop' may be used to save and
13280 restore the current settings for all the options which are controlled
13281 by `.set'. The `.set push' directive saves the current settings on a
13282 stack. The `.set pop' directive pops the stack and restores the
13285 These directives can be useful inside an macro which must change an
13286 option such as the ISA level or instruction reordering but does not want
13287 to change the state of the code which invoked the macro.
13289 Traditional MIPS assemblers do not support these directives.
13292 File: as.info, Node: MIPS ASE instruction generation overrides, Next: MIPS floating-point, Prev: MIPS option stack, Up: MIPS-Dependent
13294 9.24.9 Directives to control generation of MIPS ASE instructions
13295 ----------------------------------------------------------------
13297 The directive `.set mips3d' makes the assembler accept instructions
13298 from the MIPS-3D Application Specific Extension from that point on in
13299 the assembly. The `.set nomips3d' directive prevents MIPS-3D
13300 instructions from being accepted.
13302 The directive `.set smartmips' makes the assembler accept
13303 instructions from the SmartMIPS Application Specific Extension to the
13304 MIPS32 ISA from that point on in the assembly. The `.set nosmartmips'
13305 directive prevents SmartMIPS instructions from being accepted.
13307 The directive `.set mdmx' makes the assembler accept instructions
13308 from the MDMX Application Specific Extension from that point on in the
13309 assembly. The `.set nomdmx' directive prevents MDMX instructions from
13312 The directive `.set dsp' makes the assembler accept instructions
13313 from the DSP Release 1 Application Specific Extension from that point
13314 on in the assembly. The `.set nodsp' directive prevents DSP Release 1
13315 instructions from being accepted.
13317 The directive `.set dspr2' makes the assembler accept instructions
13318 from the DSP Release 2 Application Specific Extension from that point
13319 on in the assembly. This dirctive implies `.set dsp'. The `.set
13320 nodspr2' directive prevents DSP Release 2 instructions from being
13323 The directive `.set mt' makes the assembler accept instructions from
13324 the MT Application Specific Extension from that point on in the
13325 assembly. The `.set nomt' directive prevents MT instructions from
13328 The directive `.set mcu' makes the assembler accept instructions
13329 from the MCU Application Specific Extension from that point on in the
13330 assembly. The `.set nomcu' directive prevents MCU instructions from
13333 Traditional MIPS assemblers do not support these directives.
13336 File: as.info, Node: MIPS floating-point, Next: MIPS Syntax, Prev: MIPS ASE instruction generation overrides, Up: MIPS-Dependent
13338 9.24.10 Directives to override floating-point options
13339 -----------------------------------------------------
13341 The directives `.set softfloat' and `.set hardfloat' provide finer
13342 control of disabling and enabling float-point instructions. These
13343 directives always override the default (that hard-float instructions
13344 are accepted) or the command-line options (`-msoft-float' and
13347 The directives `.set singlefloat' and `.set doublefloat' provide
13348 finer control of disabling and enabling double-precision float-point
13349 operations. These directives always override the default (that
13350 double-precision operations are accepted) or the command-line options
13351 (`-msingle-float' and `-mdouble-float').
13353 Traditional MIPS assemblers do not support these directives.
13356 File: as.info, Node: MIPS Syntax, Prev: MIPS floating-point, Up: MIPS-Dependent
13358 9.24.11 Syntactical considerations for the MIPS assembler
13359 ---------------------------------------------------------
13363 * MIPS-Chars:: Special Characters
13366 File: as.info, Node: MIPS-Chars, Up: MIPS Syntax
13368 9.24.11.1 Special Characters
13369 ............................
13371 The presence of a `#' on a line indicates the start of a comment that
13372 extends to the end of the current line.
13374 If a `#' appears as the first character of a line, the whole line is
13375 treated as a comment, but in this case the line can also be a logical
13376 line number directive (*note Comments::) or a preprocessor control
13377 command (*note Preprocessing::).
13379 The `;' character can be used to separate statements on the same
13383 File: as.info, Node: MMIX-Dependent, Next: MSP430-Dependent, Prev: MIPS-Dependent, Up: Machine Dependencies
13385 9.25 MMIX Dependent Features
13386 ============================
13390 * MMIX-Opts:: Command-line Options
13391 * MMIX-Expand:: Instruction expansion
13392 * MMIX-Syntax:: Syntax
13393 * MMIX-mmixal:: Differences to `mmixal' syntax and semantics
13396 File: as.info, Node: MMIX-Opts, Next: MMIX-Expand, Up: MMIX-Dependent
13398 9.25.1 Command-line Options
13399 ---------------------------
13401 The MMIX version of `as' has some machine-dependent options.
13403 When `--fixed-special-register-names' is specified, only the register
13404 names specified in *Note MMIX-Regs:: are recognized in the instructions
13407 You can use the `--globalize-symbols' to make all symbols global.
13408 This option is useful when splitting up a `mmixal' program into several
13411 The `--gnu-syntax' turns off most syntax compatibility with
13412 `mmixal'. Its usability is currently doubtful.
13414 The `--relax' option is not fully supported, but will eventually make
13415 the object file prepared for linker relaxation.
13417 If you want to avoid inadvertently calling a predefined symbol and
13418 would rather get an error, for example when using `as' with a compiler
13419 or other machine-generated code, specify `--no-predefined-syms'. This
13420 turns off built-in predefined definitions of all such symbols,
13421 including rounding-mode symbols, segment symbols, `BIT' symbols, and
13422 `TRAP' symbols used in `mmix' "system calls". It also turns off
13423 predefined special-register names, except when used in `PUT' and `GET'
13426 By default, some instructions are expanded to fit the size of the
13427 operand or an external symbol (*note MMIX-Expand::). By passing
13428 `--no-expand', no such expansion will be done, instead causing errors
13429 at link time if the operand does not fit.
13431 The `mmixal' documentation (*note mmixsite::) specifies that global
13432 registers allocated with the `GREG' directive (*note MMIX-greg::) and
13433 initialized to the same non-zero value, will refer to the same global
13434 register. This isn't strictly enforceable in `as' since the final
13435 addresses aren't known until link-time, but it will do an effort unless
13436 the `--no-merge-gregs' option is specified. (Register merging isn't
13437 yet implemented in `ld'.)
13439 `as' will warn every time it expands an instruction to fit an
13440 operand unless the option `-x' is specified. It is believed that this
13441 behaviour is more useful than just mimicking `mmixal''s behaviour, in
13442 which instructions are only expanded if the `-x' option is specified,
13443 and assembly fails otherwise, when an instruction needs to be expanded.
13444 It needs to be kept in mind that `mmixal' is both an assembler and
13445 linker, while `as' will expand instructions that at link stage can be
13446 contracted. (Though linker relaxation isn't yet implemented in `ld'.)
13447 The option `-x' also imples `--linker-allocated-gregs'.
13449 If instruction expansion is enabled, `as' can expand a `PUSHJ'
13450 instruction into a series of instructions. The shortest expansion is
13451 to not expand it, but just mark the call as redirectable to a stub,
13452 which `ld' creates at link-time, but only if the original `PUSHJ'
13453 instruction is found not to reach the target. The stub consists of the
13454 necessary instructions to form a jump to the target. This happens if
13455 `as' can assert that the `PUSHJ' instruction can reach such a stub.
13456 The option `--no-pushj-stubs' disables this shorter expansion, and the
13457 longer series of instructions is then created at assembly-time. The
13458 option `--no-stubs' is a synonym, intended for compatibility with
13459 future releases, where generation of stubs for other instructions may
13462 Usually a two-operand-expression (*note GREG-base::) without a
13463 matching `GREG' directive is treated as an error by `as'. When the
13464 option `--linker-allocated-gregs' is in effect, they are instead passed
13465 through to the linker, which will allocate as many global registers as
13469 File: as.info, Node: MMIX-Expand, Next: MMIX-Syntax, Prev: MMIX-Opts, Up: MMIX-Dependent
13471 9.25.2 Instruction expansion
13472 ----------------------------
13474 When `as' encounters an instruction with an operand that is either not
13475 known or does not fit the operand size of the instruction, `as' (and
13476 `ld') will expand the instruction into a sequence of instructions
13477 semantically equivalent to the operand fitting the instruction.
13478 Expansion will take place for the following instructions:
13481 Expands to a sequence of four instructions: `SETL', `INCML',
13482 `INCMH' and `INCH'. The operand must be a multiple of four.
13484 Conditional branches
13485 A branch instruction is turned into a branch with the complemented
13486 condition and prediction bit over five instructions; four
13487 instructions setting `$255' to the operand value, which like with
13488 `GETA' must be a multiple of four, and a final `GO $255,$255,0'.
13491 Similar to expansion for conditional branches; four instructions
13492 set `$255' to the operand value, followed by a `PUSHGO
13496 Similar to conditional branches and `PUSHJ'. The final instruction
13497 is `GO $255,$255,0'.
13499 The linker `ld' is expected to shrink these expansions for code
13500 assembled with `--relax' (though not currently implemented).
13503 File: as.info, Node: MMIX-Syntax, Next: MMIX-mmixal, Prev: MMIX-Expand, Up: MMIX-Dependent
13508 The assembly syntax is supposed to be upward compatible with that
13509 described in Sections 1.3 and 1.4 of `The Art of Computer Programming,
13510 Volume 1'. Draft versions of those chapters as well as other MMIX
13511 information is located at
13512 `http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'. Most code
13513 examples from the mmixal package located there should work unmodified
13514 when assembled and linked as single files, with a few noteworthy
13515 exceptions (*note MMIX-mmixal::).
13517 Before an instruction is emitted, the current location is aligned to
13518 the next four-byte boundary. If a label is defined at the beginning of
13519 the line, its value will be the aligned value.
13521 In addition to the traditional hex-prefix `0x', a hexadecimal number
13522 can also be specified by the prefix character `#'.
13524 After all operands to an MMIX instruction or directive have been
13525 specified, the rest of the line is ignored, treated as a comment.
13529 * MMIX-Chars:: Special Characters
13530 * MMIX-Symbols:: Symbols
13531 * MMIX-Regs:: Register Names
13532 * MMIX-Pseudos:: Assembler Directives
13535 File: as.info, Node: MMIX-Chars, Next: MMIX-Symbols, Up: MMIX-Syntax
13537 9.25.3.1 Special Characters
13538 ...........................
13540 The characters `*' and `#' are line comment characters; each start a
13541 comment at the beginning of a line, but only at the beginning of a
13542 line. A `#' prefixes a hexadecimal number if found elsewhere on a
13543 line. If a `#' appears at the start of a line the whole line is
13544 treated as a comment, but the line can also act as a logical line
13545 number directive (*note Comments::) or a preprocessor control command
13546 (*note Preprocessing::).
13548 Two other characters, `%' and `!', each start a comment anywhere on
13549 the line. Thus you can't use the `modulus' and `not' operators in
13550 expressions normally associated with these two characters.
13552 A `;' is a line separator, treated as a new-line, so separate
13553 instructions can be specified on a single line.
13556 File: as.info, Node: MMIX-Symbols, Next: MMIX-Regs, Prev: MMIX-Chars, Up: MMIX-Syntax
13561 The character `:' is permitted in identifiers. There are two
13562 exceptions to it being treated as any other symbol character: if a
13563 symbol begins with `:', it means that the symbol is in the global
13564 namespace and that the current prefix should not be prepended to that
13565 symbol (*note MMIX-prefix::). The `:' is then not considered part of
13566 the symbol. For a symbol in the label position (first on a line), a `:'
13567 at the end of a symbol is silently stripped off. A label is permitted,
13568 but not required, to be followed by a `:', as with many other assembly
13571 The character `@' in an expression, is a synonym for `.', the
13574 In addition to the common forward and backward local symbol formats
13575 (*note Symbol Names::), they can be specified with upper-case `B' and
13576 `F', as in `8B' and `9F'. A local label defined for the current
13577 position is written with a `H' appended to the number:
13579 This and traditional local-label formats cannot be mixed: a label
13580 must be defined and referred to using the same format.
13582 There's a minor caveat: just as for the ordinary local symbols, the
13583 local symbols are translated into ordinary symbols using control
13584 characters are to hide the ordinal number of the symbol.
13585 Unfortunately, these symbols are not translated back in error messages.
13586 Thus you may see confusing error messages when local symbols are used.
13587 Control characters `\003' (control-C) and `\004' (control-D) are used
13588 for the MMIX-specific local-symbol syntax.
13590 The symbol `Main' is handled specially; it is always global.
13592 By defining the symbols `__.MMIX.start..text' and
13593 `__.MMIX.start..data', the address of respectively the `.text' and
13594 `.data' segments of the final program can be defined, though when
13595 linking more than one object file, the code or data in the object file
13596 containing the symbol is not guaranteed to be start at that position;
13597 just the final executable. *Note MMIX-loc::.
13600 File: as.info, Node: MMIX-Regs, Next: MMIX-Pseudos, Prev: MMIX-Symbols, Up: MMIX-Syntax
13602 9.25.3.3 Register names
13603 .......................
13605 Local and global registers are specified as `$0' to `$255'. The
13606 recognized special register names are `rJ', `rA', `rB', `rC', `rD',
13607 `rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ',
13608 `rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT',
13609 `rWW', `rXX', `rYY' and `rZZ'. A leading `:' is optional for special
13612 Local and global symbols can be equated to register names and used in
13613 place of ordinary registers.
13615 Similarly for special registers, local and global symbols can be
13616 used. Also, symbols equated from numbers and constant expressions are
13617 allowed in place of a special register, except when either of the
13618 options `--no-predefined-syms' and `--fixed-special-register-names' are
13619 specified. Then only the special register names above are allowed for
13620 the instructions having a special register operand; `GET' and `PUT'.
13623 File: as.info, Node: MMIX-Pseudos, Prev: MMIX-Regs, Up: MMIX-Syntax
13625 9.25.3.4 Assembler Directives
13626 .............................
13629 The `LOC' directive sets the current location to the value of the
13630 operand field, which may include changing sections. If the
13631 operand is a constant, the section is set to either `.data' if the
13632 value is `0x2000000000000000' or larger, else it is set to `.text'.
13633 Within a section, the current location may only be changed to
13634 monotonically higher addresses. A LOC expression must be a
13635 previously defined symbol or a "pure" constant.
13637 An example, which sets the label PREV to the current location, and
13638 updates the current location to eight bytes forward:
13641 When a LOC has a constant as its operand, a symbol
13642 `__.MMIX.start..text' or `__.MMIX.start..data' is defined
13643 depending on the address as mentioned above. Each such symbol is
13644 interpreted as special by the linker, locating the section at that
13645 address. Note that if multiple files are linked, the first object
13646 file with that section will be mapped to that address (not
13647 necessarily the file with the LOC definition).
13651 LOCAL external_symbol
13655 This directive-operation generates a link-time assertion that the
13656 operand does not correspond to a global register. The operand is
13657 an expression that at link-time resolves to a register symbol or a
13658 number. A number is treated as the register having that number.
13659 There is one restriction on the use of this directive: the
13660 pseudo-directive must be placed in a section with contents, code
13664 The `IS' directive:
13665 asymbol IS an_expression
13666 sets the symbol `asymbol' to `an_expression'. A symbol may not be
13667 set more than once using this directive. Local labels may be set
13668 using this directive, for example:
13672 This directive reserves a global register, gives it an initial
13673 value and optionally gives it a symbolic name. Some examples:
13676 breg GREG data_value
13678 .greg creg, another_data_value
13680 The symbolic register name can be used in place of a (non-special)
13681 register. If a value isn't provided, it defaults to zero. Unless
13682 the option `--no-merge-gregs' is specified, non-zero registers
13683 allocated with this directive may be eliminated by `as'; another
13684 register with the same value used in its place. Any of the
13685 instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU',
13686 `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW',
13687 `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT',
13688 `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can
13689 have a value nearby an initial value in place of its second and
13690 third operands. Here, "nearby" is defined as within the range
13691 0...255 from the initial value of such an allocated register.
13693 buffer1 BYTE 0,0,0,0,0
13694 buffer2 BYTE 0,0,0,0,0
13698 In the example above, the `Y' field of the `LDOUI' instruction
13699 (LDOU with a constant Z) will be replaced with the global register
13700 allocated for `buffer1', and the `Z' field will have the value 5,
13701 the offset from `buffer1' to `buffer2'. The result is equivalent
13703 buffer1 BYTE 0,0,0,0,0
13704 buffer2 BYTE 0,0,0,0,0
13706 tmpreg GREG buffer1
13707 LDOU $42,tmpreg,(buffer2-buffer1)
13709 Global registers allocated with this directive are allocated in
13710 order higher-to-lower within a file. Other than that, the exact
13711 order of register allocation and elimination is undefined. For
13712 example, the order is undefined when more than one file with such
13713 directives are linked together. With the options `-x' and
13714 `--linker-allocated-gregs', `GREG' directives for two-operand
13715 cases like the one mentioned above can be omitted. Sufficient
13716 global registers will then be allocated by the linker.
13719 The `BYTE' directive takes a series of operands separated by a
13720 comma. If an operand is a string (*note Strings::), each
13721 character of that string is emitted as a byte. Other operands
13722 must be constant expressions without forward references, in the
13723 range 0...255. If you need operands having expressions with
13724 forward references, use `.byte' (*note Byte::). An operand can be
13725 omitted, defaulting to a zero value.
13730 The directives `WYDE', `TETRA' and `OCTA' emit constants of two,
13731 four and eight bytes size respectively. Before anything else
13732 happens for the directive, the current location is aligned to the
13733 respective constant-size boundary. If a label is defined at the
13734 beginning of the line, its value will be that after the alignment.
13735 A single operand can be omitted, defaulting to a zero value
13736 emitted for the directive. Operands can be expressed as strings
13737 (*note Strings::), in which case each character in the string is
13738 emitted as a separate constant of the size indicated by the
13742 The `PREFIX' directive sets a symbol name prefix to be prepended to
13743 all symbols (except local symbols, *note MMIX-Symbols::), that are
13744 not prefixed with `:', until the next `PREFIX' directive. Such
13745 prefixes accumulate. For example,
13749 defines a symbol `abc' with the value 0.
13753 A pair of `BSPEC' and `ESPEC' directives delimit a section of
13754 special contents (without specified semantics). Example:
13758 The single operand to `BSPEC' must be number in the range 0...255.
13759 The `BSPEC' number 80 is used by the GNU binutils implementation.
13762 File: as.info, Node: MMIX-mmixal, Prev: MMIX-Syntax, Up: MMIX-Dependent
13764 9.25.4 Differences to `mmixal'
13765 ------------------------------
13767 The binutils `as' and `ld' combination has a few differences in
13768 function compared to `mmixal' (*note mmixsite::).
13770 The replacement of a symbol with a GREG-allocated register (*note
13771 GREG-base::) is not handled the exactly same way in `as' as in
13772 `mmixal'. This is apparent in the `mmixal' example file `inout.mms',
13773 where different registers with different offsets, eventually yielding
13774 the same address, are used in the first instruction. This type of
13775 difference should however not affect the function of any program unless
13776 it has specific assumptions about the allocated register number.
13778 Line numbers (in the `mmo' object format) are currently not
13781 Expression operator precedence is not that of mmixal: operator
13782 precedence is that of the C programming language. It's recommended to
13783 use parentheses to explicitly specify wanted operator precedence
13784 whenever more than one type of operators are used.
13786 The serialize unary operator `&', the fractional division operator
13787 `//', the logical not operator `!' and the modulus operator `%' are not
13790 Symbols are not global by default, unless the option
13791 `--globalize-symbols' is passed. Use the `.global' directive to
13792 globalize symbols (*note Global::).
13794 Operand syntax is a bit stricter with `as' than `mmixal'. For
13795 example, you can't say `addu 1,2,3', instead you must write `addu
13798 You can't LOC to a lower address than those already visited (i.e.,
13801 A LOC directive must come before any emitted code.
13803 Predefined symbols are visible as file-local symbols after use. (In
13804 the ELF file, that is--the linked mmo file has no notion of a file-local
13807 Some mapping of constant expressions to sections in LOC expressions
13808 is attempted, but that functionality is easily confused and should be
13809 avoided unless compatibility with `mmixal' is required. A LOC
13810 expression to `0x2000000000000000' or higher, maps to the `.data'
13811 section and lower addresses map to the `.text' section (*note
13814 The code and data areas are each contiguous. Sparse programs with
13815 far-away LOC directives will take up the same amount of space as a
13816 contiguous program with zeros filled in the gaps between the LOC
13817 directives. If you need sparse programs, you might try and get the
13818 wanted effect with a linker script and splitting up the code parts into
13819 sections (*note Section::). Assembly code for this, to be compatible
13820 with `mmixal', would look something like:
13822 LOC away_expression
13826 `as' will not execute the LOC directive and `mmixal' ignores the
13827 lines with `.'. This construct can be used generally to help
13830 Symbols can't be defined twice-not even to the same value.
13832 Instruction mnemonics are recognized case-insensitive, though the
13833 `IS' and `GREG' pseudo-operations must be specified in upper-case
13836 There's no unicode support.
13838 The following is a list of programs in `mmix.tar.gz', available at
13839 `http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last
13840 checked with the version dated 2001-08-25 (md5sum
13841 c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do
13842 not assemble with `as':
13845 LOC to a previous address.
13848 Redefines symbol `Done'.
13851 Uses the serial operator `&'.
13854 File: as.info, Node: MSP430-Dependent, Next: NS32K-Dependent, Prev: MMIX-Dependent, Up: Machine Dependencies
13856 9.26 MSP 430 Dependent Features
13857 ===============================
13861 * MSP430 Options:: Options
13862 * MSP430 Syntax:: Syntax
13863 * MSP430 Floating Point:: Floating Point
13864 * MSP430 Directives:: MSP 430 Machine Directives
13865 * MSP430 Opcodes:: Opcodes
13866 * MSP430 Profiling Capability:: Profiling Capability
13869 File: as.info, Node: MSP430 Options, Next: MSP430 Syntax, Up: MSP430-Dependent
13875 select the mpu arch. Currently has no effect.
13878 enables polymorph instructions handler.
13881 enables relaxation at assembly time. DANGEROUS!
13885 File: as.info, Node: MSP430 Syntax, Next: MSP430 Floating Point, Prev: MSP430 Options, Up: MSP430-Dependent
13892 * MSP430-Macros:: Macros
13893 * MSP430-Chars:: Special Characters
13894 * MSP430-Regs:: Register Names
13895 * MSP430-Ext:: Assembler Extensions
13898 File: as.info, Node: MSP430-Macros, Next: MSP430-Chars, Up: MSP430 Syntax
13903 The macro syntax used on the MSP 430 is like that described in the MSP
13904 430 Family Assembler Specification. Normal `as' macros should still
13907 Additional built-in macros are:
13910 Extracts least significant word from 32-bit expression 'exp'.
13913 Extracts most significant word from 32-bit expression 'exp'.
13916 Extracts 3rd word from 64-bit expression 'exp'.
13919 Extracts 4rd word from 64-bit expression 'exp'.
13922 They normally being used as an immediate source operand.
13923 mov #llo(1), r10 ; == mov #1, r10
13924 mov #lhi(1), r10 ; == mov #0, r10
13927 File: as.info, Node: MSP430-Chars, Next: MSP430-Regs, Prev: MSP430-Macros, Up: MSP430 Syntax
13929 9.26.2.2 Special Characters
13930 ...........................
13932 A semicolon (`;') appearing anywhere on a line starts a comment that
13933 extends to the end of that line.
13935 If a `#' appears as the first character of a line then the whole
13936 line is treated as a comment, but it can also be a logical line number
13937 directive (*note Comments::) or a preprocessor control command (*note
13940 Multiple statements can appear on the same line provided that they
13941 are separated by the `{' character.
13943 The character `$' in jump instructions indicates current location and
13944 implemented only for TI syntax compatibility.
13947 File: as.info, Node: MSP430-Regs, Next: MSP430-Ext, Prev: MSP430-Chars, Up: MSP430 Syntax
13949 9.26.2.3 Register Names
13950 .......................
13952 General-purpose registers are represented by predefined symbols of the
13953 form `rN' (for global registers), where N represents a number between
13954 `0' and `15'. The leading letters may be in either upper or lower
13955 case; for example, `r13' and `R7' are both valid register names.
13957 Register names `PC', `SP' and `SR' cannot be used as register names
13958 and will be treated as variables. Use `r0', `r1', and `r2' instead.
13961 File: as.info, Node: MSP430-Ext, Prev: MSP430-Regs, Up: MSP430 Syntax
13963 9.26.2.4 Assembler Extensions
13964 .............................
13967 As destination operand being treated as `0(rn)'
13970 As source operand being treated as `@rn'
13973 Skips next N bytes followed by jump instruction and equivalent to
13977 Also, there are some instructions, which cannot be found in other
13978 assemblers. These are branch instructions, which has different opcodes
13979 upon jump distance. They all got PC relative addressing mode.
13982 A polymorph instruction which is `jeq label' in case if jump
13983 distance within allowed range for cpu's jump instruction. If not,
13984 this unrolls into a sequence of
13989 A polymorph instruction which is `jne label' or `jeq +4; br label'
13992 A polymorph instruction which is `jl label' or `jge +4; br label'
13995 A polymorph instruction which is `jn label' or `jn +2; jmp +4; br
13999 A polymorph instruction which is `jlo label' or `jhs +2; br label'
14002 A polymorph instruction which is `jge label' or `jl +4; br label'
14005 A polymorph instruction which is `jhs label' or `jlo +4; br label'
14008 A polymorph instruction which is `jeq +2; jge label' or `jeq +6;
14012 A polymorph instruction which is `jeq +2; jhs label' or `jeq +6;
14016 A polymorph instruction which is `jeq label; jlo label' or `jeq
14017 +2; jhs +4; br label'
14020 A polymorph instruction which is `jeq label; jl label' or `jeq
14021 +2; jge +4; br label'
14024 A polymorph instruction which is `jmp label' or `br label'
14027 File: as.info, Node: MSP430 Floating Point, Next: MSP430 Directives, Prev: MSP430 Syntax, Up: MSP430-Dependent
14029 9.26.3 Floating Point
14030 ---------------------
14032 The MSP 430 family uses IEEE 32-bit floating-point numbers.
14035 File: as.info, Node: MSP430 Directives, Next: MSP430 Opcodes, Prev: MSP430 Floating Point, Up: MSP430-Dependent
14037 9.26.4 MSP 430 Machine Directives
14038 ---------------------------------
14041 This directive is ignored; it is accepted for compatibility with
14042 other MSP 430 assemblers.
14044 _Warning:_ in other versions of the GNU assembler, `.file' is
14045 used for the directive called `.app-file' in the MSP 430
14049 This directive is ignored; it is accepted for compatibility with
14050 other MSP 430 assemblers.
14053 Currently this directive is ignored; it is accepted for
14054 compatibility with other MSP 430 assemblers.
14057 This directive instructs assembler to add new profile entry to the
14062 File: as.info, Node: MSP430 Opcodes, Next: MSP430 Profiling Capability, Prev: MSP430 Directives, Up: MSP430-Dependent
14067 `as' implements all the standard MSP 430 opcodes. No additional
14068 pseudo-instructions are needed on this family.
14070 For information on the 430 machine instruction set, see `MSP430
14071 User's Manual, document slau049d', Texas Instrument, Inc.
14074 File: as.info, Node: MSP430 Profiling Capability, Prev: MSP430 Opcodes, Up: MSP430-Dependent
14076 9.26.6 Profiling Capability
14077 ---------------------------
14079 It is a performance hit to use gcc's profiling approach for this tiny
14080 target. Even more - jtag hardware facility does not perform any
14081 profiling functions. However we've got gdb's built-in simulator where
14082 we can do anything.
14084 We define new section `.profiler' which holds all profiling
14085 information. We define new pseudo operation `.profiler' which will
14086 instruct assembler to add new profile entry to the object file. Profile
14087 should take place at the present address.
14089 Pseudo operation format:
14091 `.profiler flags,function_to_profile [, cycle_corrector, extra]'
14095 `flags' is a combination of the following characters:
14104 function is in init section
14107 function is in fini section
14119 interrupt service routine
14134 long jump / sjlj unwind
14137 an arbitrary code fragment
14140 extra parameter saved (a constant value like frame size)
14142 `function_to_profile'
14146 a value which should be added to the cycle counter, zero if
14150 any extra parameter, zero if omitted.
14155 .type fxx,@function
14157 .LFrameOffset_fxx=0x08
14158 .profiler "scdP", fxx ; function entry.
14159 ; we also demand stack value to be saved
14164 .profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point
14165 ; (this is a prologue end)
14166 ; note, that spare var filled with
14170 .profiler cdE,fxx ; check stack
14175 .profiler xcde,fxx,3 ; exit adds 3 to the cycle counter
14176 ret ; cause 'ret' insn takes 3 cycles
14179 File: as.info, Node: NS32K-Dependent, Next: SH-Dependent, Prev: MSP430-Dependent, Up: Machine Dependencies
14181 9.27 NS32K Dependent Features
14182 =============================
14186 * NS32K Syntax:: Syntax
14189 File: as.info, Node: NS32K Syntax, Up: NS32K-Dependent
14196 * NS32K-Chars:: Special Characters
14199 File: as.info, Node: NS32K-Chars, Up: NS32K Syntax
14201 9.27.1.1 Special Characters
14202 ...........................
14204 The presence of a `#' appearing anywhere on a line indicates the start
14205 of a comment that extends to the end of that line.
14207 If a `#' appears as the first character of a line then the whole
14208 line is treated as a comment, but in this case the line can also be a
14209 logical line number directive (*note Comments::) or a preprocessor
14210 control command (*note Preprocessing::).
14212 If Sequent compatibility has been configured into the assembler then
14213 the `|' character appearing as the first character on a line will also
14214 indicate the start of a line comment.
14216 The `;' character can be used to separate statements on the same
14220 File: as.info, Node: PDP-11-Dependent, Next: PJ-Dependent, Prev: SH64-Dependent, Up: Machine Dependencies
14222 9.28 PDP-11 Dependent Features
14223 ==============================
14227 * PDP-11-Options:: Options
14228 * PDP-11-Pseudos:: Assembler Directives
14229 * PDP-11-Syntax:: DEC Syntax versus BSD Syntax
14230 * PDP-11-Mnemonics:: Instruction Naming
14231 * PDP-11-Synthetic:: Synthetic Instructions
14234 File: as.info, Node: PDP-11-Options, Next: PDP-11-Pseudos, Up: PDP-11-Dependent
14239 The PDP-11 version of `as' has a rich set of machine dependent options.
14241 9.28.1.1 Code Generation Options
14242 ................................
14245 Generate position-independent (or position-dependent) code.
14247 The default is to generate position-independent code.
14249 9.28.1.2 Instruction Set Extension Options
14250 ..........................................
14252 These options enables or disables the use of extensions over the base
14253 line instruction set as introduced by the first PDP-11 CPU: the KA11.
14254 Most options come in two variants: a `-m'EXTENSION that enables
14255 EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION.
14257 The default is to enable all extensions.
14259 `-mall | -mall-extensions'
14260 Enable all instruction set extensions.
14263 Disable all instruction set extensions.
14266 Enable (or disable) the use of the commercial instruction set,
14267 which consists of these instructions: `ADDNI', `ADDN', `ADDPI',
14268 `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC',
14269 `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI',
14270 `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL',
14271 `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI',
14272 `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC',
14273 `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI',
14274 `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'.
14277 Enable (or disable) the use of the `CSM' instruction.
14280 Enable (or disable) the use of the extended instruction set, which
14281 consists of these instructions: `ASHC', `ASH', `DIV', `MARK',
14282 `MUL', `RTT', `SOB' `SXT', and `XOR'.
14285 `-mno-fis | -mno-kev11'
14286 Enable (or disable) the use of the KEV11 floating-point
14287 instructions: `FADD', `FDIV', `FMUL', and `FSUB'.
14289 `-mfpp | -mfpu | -mfp-11'
14290 `-mno-fpp | -mno-fpu | -mno-fp-11'
14291 Enable (or disable) the use of FP-11 floating-point instructions:
14292 `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF',
14293 `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF',
14294 `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST',
14295 `SUBF', and `TSTF'.
14297 `-mlimited-eis | -mno-limited-eis'
14298 Enable (or disable) the use of the limited extended instruction
14299 set: `MARK', `RTT', `SOB', `SXT', and `XOR'.
14301 The -mno-limited-eis options also implies -mno-eis.
14303 `-mmfpt | -mno-mfpt'
14304 Enable (or disable) the use of the `MFPT' instruction.
14306 `-mmultiproc | -mno-multiproc'
14307 Enable (or disable) the use of multiprocessor instructions:
14308 `TSTSET' and `WRTLCK'.
14310 `-mmxps | -mno-mxps'
14311 Enable (or disable) the use of the `MFPS' and `MTPS' instructions.
14314 Enable (or disable) the use of the `SPL' instruction.
14316 Enable (or disable) the use of the microcode instructions: `LDUB',
14319 9.28.1.3 CPU Model Options
14320 ..........................
14322 These options enable the instruction set extensions supported by a
14323 particular CPU, and disables all other extensions.
14326 KA11 CPU. Base line instruction set only.
14329 KB11 CPU. Enable extended instruction set and `SPL'.
14332 KD11-A CPU. Enable limited extended instruction set.
14335 KD11-B CPU. Base line instruction set only.
14338 KD11-D CPU. Base line instruction set only.
14341 KD11-E CPU. Enable extended instruction set, `MFPS', and `MTPS'.
14343 `-mkd11f | -mkd11h | -mkd11q'
14344 KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended
14345 instruction set, `MFPS', and `MTPS'.
14348 KD11-K CPU. Enable extended instruction set, `LDUB', `MED',
14349 `MFPS', `MFPT', `MTPS', and `XFC'.
14352 KD11-Z CPU. Enable extended instruction set, `CSM', `MFPS',
14353 `MFPT', `MTPS', and `SPL'.
14356 F11 CPU. Enable extended instruction set, `MFPS', `MFPT', and
14360 J11 CPU. Enable extended instruction set, `CSM', `MFPS', `MFPT',
14361 `MTPS', `SPL', `TSTSET', and `WRTLCK'.
14364 T11 CPU. Enable limited extended instruction set, `MFPS', and
14367 9.28.1.4 Machine Model Options
14368 ..............................
14370 These options enable the instruction set extensions supported by a
14371 particular machine model, and disables all other extensions.
14379 `-m11/05 | -m11/10'
14382 `-m11/15 | -m11/20'
14388 `-m11/23 | -m11/24'
14395 Ame as `-mkd11e' `-mfpp'.
14397 `-m11/35 | -m11/40'
14403 `-m11/45 | -m11/50 | -m11/55 | -m11/70'
14406 `-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94'
14413 File: as.info, Node: PDP-11-Pseudos, Next: PDP-11-Syntax, Prev: PDP-11-Options, Up: PDP-11-Dependent
14415 9.28.2 Assembler Directives
14416 ---------------------------
14418 The PDP-11 version of `as' has a few machine dependent assembler
14422 Switch to the `bss' section.
14425 Align the location counter to an even number.
14428 File: as.info, Node: PDP-11-Syntax, Next: PDP-11-Mnemonics, Prev: PDP-11-Pseudos, Up: PDP-11-Dependent
14430 9.28.3 PDP-11 Assembly Language Syntax
14431 --------------------------------------
14433 `as' supports both DEC syntax and BSD syntax. The only difference is
14434 that in DEC syntax, a `#' character is used to denote an immediate
14435 constants, while in BSD syntax the character for this purpose is `$'.
14437 general-purpose registers are named `r0' through `r7'. Mnemonic
14438 alternatives for `r6' and `r7' are `sp' and `pc', respectively.
14440 Floating-point registers are named `ac0' through `ac3', or
14441 alternatively `fr0' through `fr3'.
14443 Comments are started with a `#' or a `/' character, and extend to
14444 the end of the line. (FIXME: clash with immediates?)
14446 Multiple statements on the same line can be separated by the `;'
14450 File: as.info, Node: PDP-11-Mnemonics, Next: PDP-11-Synthetic, Prev: PDP-11-Syntax, Up: PDP-11-Dependent
14452 9.28.4 Instruction Naming
14453 -------------------------
14455 Some instructions have alternative names.
14473 File: as.info, Node: PDP-11-Synthetic, Prev: PDP-11-Mnemonics, Up: PDP-11-Dependent
14475 9.28.5 Synthetic Instructions
14476 -----------------------------
14478 The `JBR' and `J'CC synthetic instructions are not supported yet.
14481 File: as.info, Node: PJ-Dependent, Next: PPC-Dependent, Prev: PDP-11-Dependent, Up: Machine Dependencies
14483 9.29 picoJava Dependent Features
14484 ================================
14488 * PJ Options:: Options
14489 * PJ Syntax:: PJ Syntax
14492 File: as.info, Node: PJ Options, Next: PJ Syntax, Up: PJ-Dependent
14497 `as' has two additional command-line options for the picoJava
14500 This option selects little endian data output.
14503 This option selects big endian data output.
14506 File: as.info, Node: PJ Syntax, Prev: PJ Options, Up: PJ-Dependent
14513 * PJ-Chars:: Special Characters
14516 File: as.info, Node: PJ-Chars, Up: PJ Syntax
14518 9.29.2.1 Special Characters
14519 ...........................
14521 The presence of a `!' or `/' on a line indicates the start of a comment
14522 that extends to the end of the current line.
14524 If a `#' appears as the first character of a line then the whole
14525 line is treated as a comment, but in this case the line could also be a
14526 logical line number directive (*note Comments::) or a preprocessor
14527 control command (*note Preprocessing::).
14529 The `;' character can be used to separate statements on the same
14533 File: as.info, Node: PPC-Dependent, Next: RX-Dependent, Prev: PJ-Dependent, Up: Machine Dependencies
14535 9.30 PowerPC Dependent Features
14536 ===============================
14540 * PowerPC-Opts:: Options
14541 * PowerPC-Pseudo:: PowerPC Assembler Directives
14542 * PowerPC-Syntax:: PowerPC Syntax
14545 File: as.info, Node: PowerPC-Opts, Next: PowerPC-Pseudo, Up: PPC-Dependent
14550 The PowerPC chip family includes several successive levels, using the
14551 same core instruction set, but including a few additional instructions
14552 at each level. There are exceptions to this however. For details on
14553 what instructions each variant supports, please see the chip's
14554 architecture reference manual.
14556 The following table lists all available PowerPC options.
14559 Generate ELF32 or XCOFF32.
14562 Generate ELF64 or XCOFF64.
14565 Set EF_PPC_RELOCATABLE_LIB in ELF flags.
14568 Generate code for POWER/2 (RIOS2).
14571 Generate code for POWER (RIOS1)
14574 Generate code for PowerPC 601.
14576 `-mppc, -mppc32, -m603, -m604'
14577 Generate code for PowerPC 603/604.
14580 Generate code for PowerPC 403/405.
14583 Generate code for PowerPC 440. BookE and some 405 instructions.
14586 Generate code for PowerPC 464.
14589 Generate code for PowerPC 476.
14591 `-m7400, -m7410, -m7450, -m7455'
14592 Generate code for PowerPC 7400/7410/7450/7455.
14595 Generate code for PowerPC 750CL.
14598 Generate code for PowerPC 620/625/630.
14601 Generate code for Motorola e500 core complex.
14604 Generate code for Freescale e500mc core complex.
14607 Generate code for Freescale e500mc64 core complex.
14610 Generate code for Motorola SPE instructions.
14613 Generate code for AppliedMicro Titan core complex.
14616 Generate code for PowerPC 64, including bridge insns.
14619 Generate code for 32-bit BookE.
14622 Generate code for A2 architecture.
14625 Generate code for PowerPC e300 family.
14628 Generate code for processors with AltiVec instructions.
14631 Generate code for processors with Vector-Scalar (VSX) instructions.
14634 Generate code for Power4 architecture.
14636 `-mpower5, -mpwr5, -mpwr5x'
14637 Generate code for Power5 architecture.
14640 Generate code for Power6 architecture.
14643 Generate code for Power7 architecture.
14646 Generate code for Cell Broadband Engine architecture.
14649 Generate code Power/PowerPC common instructions.
14652 Generate code for any architecture (PWR/PWRX/PPC).
14655 Allow symbolic names for registers.
14658 Do not allow symbolic names for registers.
14661 Support for GCC's -mrelocatable option.
14663 `-mrelocatable-lib'
14664 Support for GCC's -mrelocatable-lib option.
14667 Set PPC_EMB bit in ELF flags.
14669 `-mlittle, -mlittle-endian, -le'
14670 Generate code for a little endian machine.
14672 `-mbig, -mbig-endian, -be'
14673 Generate code for a big endian machine.
14676 Generate code for Solaris.
14679 Do not generate code for Solaris.
14682 If an alignment directive inserts more than COUNT nops, put a
14683 branch at the beginning to skip execution of the nops.
14686 File: as.info, Node: PowerPC-Pseudo, Next: PowerPC-Syntax, Prev: PowerPC-Opts, Up: PPC-Dependent
14688 9.30.2 PowerPC Assembler Directives
14689 -----------------------------------
14691 A number of assembler directives are available for PowerPC. The
14692 following table is far from complete.
14694 `.machine "string"'
14695 This directive allows you to change the machine for which code is
14696 generated. `"string"' may be any of the -m cpu selection options
14697 (without the -m) enclosed in double quotes, `"push"', or `"pop"'.
14698 `.machine "push"' saves the currently selected cpu, which may be
14699 restored with `.machine "pop"'.
14702 File: as.info, Node: PowerPC-Syntax, Prev: PowerPC-Pseudo, Up: PPC-Dependent
14704 9.30.3 PowerPC Syntax
14705 ---------------------
14709 * PowerPC-Chars:: Special Characters
14712 File: as.info, Node: PowerPC-Chars, Up: PowerPC-Syntax
14714 9.30.3.1 Special Characters
14715 ...........................
14717 The presence of a `#' on a line indicates the start of a comment that
14718 extends to the end of the current line.
14720 If a `#' appears as the first character of a line then the whole
14721 line is treated as a comment, but in this case the line could also be a
14722 logical line number directive (*note Comments::) or a preprocessor
14723 control command (*note Preprocessing::).
14725 If the assembler has been configured for the ppc-*-solaris* target
14726 then the `!' character also acts as a line comment character. This can
14727 be disabled via the `-mno-solaris' command line option.
14729 The `;' character can be used to separate statements on the same
14733 File: as.info, Node: RX-Dependent, Next: S/390-Dependent, Prev: PPC-Dependent, Up: Machine Dependencies
14735 9.31 RX Dependent Features
14736 ==========================
14740 * RX-Opts:: RX Assembler Command Line Options
14741 * RX-Modifiers:: Symbolic Operand Modifiers
14742 * RX-Directives:: Assembler Directives
14743 * RX-Float:: Floating Point
14744 * RX-Syntax:: Syntax
14747 File: as.info, Node: RX-Opts, Next: RX-Modifiers, Up: RX-Dependent
14752 The Renesas RX port of `as' has a few target specfic command line
14756 This option controls the ABI and indicates to use a 32-bit float
14757 ABI. It has no effect on the assembled instructions, but it does
14758 influence the behaviour of the `.double' pseudo-op. This is the
14762 This option controls the ABI and indicates to use a 64-bit float
14763 ABI. It has no effect on the assembled instructions, but it does
14764 influence the behaviour of the `.double' pseudo-op.
14767 This option controls the ABI and indicates to use a big-endian data
14768 ABI. It has no effect on the assembled instructions, but it does
14769 influence the behaviour of the `.short', `.hword', `.int',
14770 `.word', `.long', `.quad' and `.octa' pseudo-ops.
14773 This option controls the ABI and indicates to use a little-endian
14774 data ABI. It has no effect on the assembled instructions, but it
14775 does influence the behaviour of the `.short', `.hword', `.int',
14776 `.word', `.long', `.quad' and `.octa' pseudo-ops. This is the
14779 `-muse-conventional-section-names'
14780 This option controls the default names given to the code (.text),
14781 initialised data (.data) and uninitialised data sections (.bss).
14783 `-muse-renesas-section-names'
14784 This option controls the default names given to the code (.P),
14785 initialised data (.D_1) and uninitialised data sections (.B_1).
14786 This is the default.
14788 `-msmall-data-limit'
14789 This option tells the assembler that the small data limit feature
14790 of the RX port of GCC is being used. This results in the assembler
14791 generating an undefined reference to a symbol called __gp for use
14792 by the relocations that are needed to support the small data limit
14793 feature. This option is not enabled by default as it would
14794 otherwise pollute the symbol table.
14798 File: as.info, Node: RX-Modifiers, Next: RX-Directives, Prev: RX-Opts, Up: RX-Dependent
14800 9.31.2 Symbolic Operand Modifiers
14801 ---------------------------------
14803 The assembler supports several modifiers when using symbol addresses in
14804 RX instruction operands. The general syntax is the following:
14811 File: as.info, Node: RX-Directives, Next: RX-Float, Prev: RX-Modifiers, Up: RX-Dependent
14813 9.31.3 Assembler Directives
14814 ---------------------------
14816 The RX version of `as' has the following specific assembler directives:
14819 Inserts a 3-byte value into the output file at the current
14824 File: as.info, Node: RX-Float, Next: RX-Syntax, Prev: RX-Directives, Up: RX-Dependent
14826 9.31.4 Floating Point
14827 ---------------------
14829 The floating point formats generated by directives are these.
14832 `Single' precision (32-bit) floating point constants.
14835 If the `-m64bit-doubles' command line option has been specified
14836 then then `double' directive generates `double' precision (64-bit)
14837 floating point constants, otherwise it generates `single'
14838 precision (32-bit) floating point constants. To force the
14839 generation of 64-bit floating point constants used the `dc.d'
14844 File: as.info, Node: RX-Syntax, Prev: RX-Float, Up: RX-Dependent
14846 9.31.5 Syntax for the RX
14847 ------------------------
14851 * RX-Chars:: Special Characters
14854 File: as.info, Node: RX-Chars, Up: RX-Syntax
14856 9.31.5.1 Special Characters
14857 ...........................
14859 The presence of a `;' appearing anywhere on a line indicates the start
14860 of a comment that extends to the end of that line.
14862 If a `#' appears as the first character of a line then the whole
14863 line is treated as a comment, but in this case the line can also be a
14864 logical line number directive (*note Comments::) or a preprocessor
14865 control command (*note Preprocessing::).
14867 The `!' character can be used to separate statements on the same
14871 File: as.info, Node: S/390-Dependent, Next: SCORE-Dependent, Prev: RX-Dependent, Up: Machine Dependencies
14873 9.32 IBM S/390 Dependent Features
14874 =================================
14876 The s390 version of `as' supports two architectures modes and seven
14877 chip levels. The architecture modes are the Enterprise System
14878 Architecture (ESA) and the newer z/Architecture mode. The chip levels
14879 are g5, g6, z900, z990, z9-109, z9-ec, z10 and z196.
14883 * s390 Options:: Command-line Options.
14884 * s390 Characters:: Special Characters.
14885 * s390 Syntax:: Assembler Instruction syntax.
14886 * s390 Directives:: Assembler Directives.
14887 * s390 Floating Point:: Floating Point.
14890 File: as.info, Node: s390 Options, Next: s390 Characters, Up: S/390-Dependent
14895 The following table lists all available s390 specific options:
14898 Select 31- or 64-bit ABI implying a word size of 32- or 64-bit.
14900 These options are only available with the ELF object file format,
14901 and require that the necessary BFD support has been included (on a
14902 31-bit platform you must add -enable-64-bit-bfd on the call to the
14903 configure script to enable 64-bit usage and use s390x as target
14907 Select the architecture mode, either the Enterprise System
14908 Architecture (esa) mode or the z/Architecture mode (zarch).
14910 The 64-bit instructions are only available with the z/Architecture
14911 mode. The combination of `-m64' and `-mesa' results in a warning
14915 This option specifies the target processor. The following
14916 processor names are recognized: `g5', `g6', `z900', `z990',
14917 `z9-109', `z9-ec', `z10' and `z196'. Assembling an instruction
14918 that is not supported on the target processor results in an error
14919 message. Do not specify `g5' or `g6' with `-mzarch'.
14922 Allow symbolic names for registers.
14925 Do not allow symbolic names for registers.
14928 Warn whenever the operand for a base or index register has been
14929 specified but evaluates to zero. This can indicate the misuse of
14930 general purpose register 0 as an address register.
14934 File: as.info, Node: s390 Characters, Next: s390 Syntax, Prev: s390 Options, Up: S/390-Dependent
14936 9.32.2 Special Characters
14937 -------------------------
14939 `#' is the line comment character.
14941 If a `#' appears as the first character of a line then the whole
14942 line is treated as a comment, but in this case the line could also be a
14943 logical line number directive (*note Comments::) or a preprocessor
14944 control command (*note Preprocessing::).
14946 The `;' character can be used instead of a newline to separate
14950 File: as.info, Node: s390 Syntax, Next: s390 Directives, Prev: s390 Characters, Up: S/390-Dependent
14952 9.32.3 Instruction syntax
14953 -------------------------
14955 The assembler syntax closely follows the syntax outlined in Enterprise
14956 Systems Architecture/390 Principles of Operation (SA22-7201) and the
14957 z/Architecture Principles of Operation (SA22-7832).
14959 Each instruction has two major parts, the instruction mnemonic and
14960 the instruction operands. The instruction format varies.
14964 * s390 Register:: Register Naming
14965 * s390 Mnemonics:: Instruction Mnemonics
14966 * s390 Operands:: Instruction Operands
14967 * s390 Formats:: Instruction Formats
14968 * s390 Aliases:: Instruction Aliases
14969 * s390 Operand Modifier:: Instruction Operand Modifier
14970 * s390 Instruction Marker:: Instruction Marker
14971 * s390 Literal Pool Entries:: Literal Pool Entries
14974 File: as.info, Node: s390 Register, Next: s390 Mnemonics, Up: s390 Syntax
14976 9.32.3.1 Register naming
14977 ........................
14979 The `as' recognizes a number of predefined symbols for the various
14980 processor registers. A register specification in one of the instruction
14981 formats is an unsigned integer between 0 and 15. The specific
14982 instruction and the position of the register in the instruction format
14983 denotes the type of the register. The register symbols are prefixed with
14986 %rN the 16 general purpose registers, 0 <= N <= 15
14987 %fN the 16 floating point registers, 0 <= N <= 15
14988 %aN the 16 access registers, 0 <= N <= 15
14989 %cN the 16 control registers, 0 <= N <= 15
14990 %lit an alias for the general purpose register %r13
14991 %sp an alias for the general purpose register %r15
14994 File: as.info, Node: s390 Mnemonics, Next: s390 Operands, Prev: s390 Register, Up: s390 Syntax
14996 9.32.3.2 Instruction Mnemonics
14997 ..............................
14999 All instructions documented in the Principles of Operation are supported
15000 with the mnemonic and order of operands as described. The instruction
15001 mnemonic identifies the instruction format (*Note s390 Formats::) and
15002 the specific operation code for the instruction. For example, the `lr'
15003 mnemonic denotes the instruction format `RR' with the operation code
15006 The definition of the various mnemonics follows a scheme, where the
15007 first character usually hint at the type of the instruction:
15009 a add instruction, for example `al' for add logical 32-bit
15010 b branch instruction, for example `bc' for branch on condition
15011 c compare or convert instruction, for example `cr' for compare
15013 d divide instruction, for example `dlr' devide logical register
15015 i insert instruction, for example `ic' insert character
15016 l load instruction, for example `ltr' load and test register
15017 mv move instruction, for example `mvc' move character
15018 m multiply instruction, for example `mh' multiply halfword
15019 n and instruction, for example `ni' and immediate
15020 o or instruction, for example `oc' or character
15021 sla, sll shift left single instruction
15022 sra, srl shift right single instruction
15023 st store instruction, for example `stm' store multiple
15024 s subtract instruction, for example `slr' subtract
15026 t test or translate instruction, of example `tm' test under mask
15027 x exclusive or instruction, for example `xc' exclusive or
15030 Certain characters at the end of the mnemonic may describe a property
15031 of the instruction:
15033 c the instruction uses a 8-bit character operand
15034 f the instruction extends a 32-bit operand to 64 bit
15035 g the operands are treated as 64-bit values
15036 h the operand uses a 16-bit halfword operand
15037 i the instruction uses an immediate operand
15038 l the instruction uses unsigned, logical operands
15039 m the instruction uses a mask or operates on multiple values
15040 r if r is the last character, the instruction operates on registers
15041 y the instruction uses 20-bit displacements
15043 There are many exceptions to the scheme outlined in the above lists,
15044 in particular for the priviledged instructions. For non-priviledged
15045 instruction it works quite well, for example the instruction `clgfr' c:
15046 compare instruction, l: unsigned operands, g: 64-bit operands, f: 32-
15047 to 64-bit extension, r: register operands. The instruction compares an
15048 64-bit value in a register with the zero extended 32-bit value from a
15049 second register. For a complete list of all mnemonics see appendix B
15050 in the Principles of Operation.
15053 File: as.info, Node: s390 Operands, Next: s390 Formats, Prev: s390 Mnemonics, Up: s390 Syntax
15055 9.32.3.3 Instruction Operands
15056 .............................
15058 Instruction operands can be grouped into three classes, operands located
15059 in registers, immediate operands, and operands in storage.
15061 A register operand can be located in general, floating-point, access,
15062 or control register. The register is identified by a four-bit field.
15063 The field containing the register operand is called the R field.
15065 Immediate operands are contained within the instruction and can have
15066 8, 16 or 32 bits. The field containing the immediate operand is called
15067 the I field. Dependent on the instruction the I field is either signed
15070 A storage operand consists of an address and a length. The address
15071 of a storage operands can be specified in any of these ways:
15073 * The content of a single general R
15075 * The sum of the content of a general register called the base
15076 register B plus the content of a displacement field D
15078 * The sum of the contents of two general registers called the index
15079 register X and the base register B plus the content of a
15082 * The sum of the current instruction address and a 32-bit signed
15083 immediate field multiplied by two.
15085 The length of a storage operand can be:
15087 * Implied by the instruction
15089 * Specified by a bitmask
15091 * Specified by a four-bit or eight-bit length field L
15093 * Specified by the content of a general register
15095 The notation for storage operand addresses formed from multiple
15096 fields is as follows:
15099 the address for operand number n is formed from the content of
15100 general register Bn called the base register and the displacement
15104 the address for operand number n is formed from the content of
15105 general register Xn called the index register, general register Bn
15106 called the base register and the displacement field Dn.
15109 the address for operand number n is formed from the content of
15110 general regiser Bn called the base register and the displacement
15111 field Dn. The length of the operand n is specified by the field
15114 The base registers Bn and the index registers Xn of a storage
15115 operand can be skipped. If Bn and Xn are skipped, a zero will be stored
15116 to the operand field. The notation changes as follows:
15118 full notation short notation
15119 ------------------------------------------
15126 File: as.info, Node: s390 Formats, Next: s390 Aliases, Prev: s390 Operands, Up: s390 Syntax
15128 9.32.3.4 Instruction Formats
15129 ............................
15131 The Principles of Operation manuals lists 26 instruction formats where
15132 some of the formats have multiple variants. For the `.insn' pseudo
15133 directive the assembler recognizes some of the formats. Typically, the
15134 most general variant of the instruction format is used by the `.insn'
15137 The following table lists the abbreviations used in the table of
15138 instruction formats:
15140 OpCode / OpCd Part of the op code.
15141 Bx Base register number for operand x.
15142 Dx Displacement for operand x.
15143 DLx Displacement lower 12 bits for operand x.
15144 DHx Displacement higher 8-bits for operand x.
15145 Rx Register number for operand x.
15146 Xx Index register number for operand x.
15147 Ix Signed immediate for operand x.
15148 Ux Unsigned immediate for operand x.
15150 An instruction is two, four, or six bytes in length and must be
15151 aligned on a 2 byte boundary. The first two bits of the instruction
15152 specify the length of the instruction, 00 indicates a two byte
15153 instruction, 01 and 10 indicates a four byte instruction, and 11
15154 indicates a six byte instruction.
15156 The following table lists the s390 instruction formats that are
15157 available with the `.insn' pseudo directive:
15166 `RI format: <insn> R1,I2'
15168 +--------+----+----+------------------+
15169 | OpCode | R1 |OpCd| I2 |
15170 +--------+----+----+------------------+
15173 `RIE format: <insn> R1,R3,I2'
15175 +--------+----+----+------------------+--------+--------+
15176 | OpCode | R1 | R3 | I2 |////////| OpCode |
15177 +--------+----+----+------------------+--------+--------+
15180 `RIL format: <insn> R1,I2'
15182 +--------+----+----+------------------------------------+
15183 | OpCode | R1 |OpCd| I2 |
15184 +--------+----+----+------------------------------------+
15187 `RILU format: <insn> R1,U2'
15189 +--------+----+----+------------------------------------+
15190 | OpCode | R1 |OpCd| U2 |
15191 +--------+----+----+------------------------------------+
15194 `RIS format: <insn> R1,I2,M3,D4(B4)'
15196 +--------+----+----+----+-------------+--------+--------+
15197 | OpCode | R1 | M3 | B4 | D4 | I2 | Opcode |
15198 +--------+----+----+----+-------------+--------+--------+
15199 0 8 12 16 20 32 36 47
15201 `RR format: <insn> R1,R2'
15203 +--------+----+----+
15204 | OpCode | R1 | R2 |
15205 +--------+----+----+
15208 `RRE format: <insn> R1,R2'
15210 +------------------+--------+----+----+
15211 | OpCode |////////| R1 | R2 |
15212 +------------------+--------+----+----+
15215 `RRF format: <insn> R1,R2,R3,M4'
15217 +------------------+----+----+----+----+
15218 | OpCode | R3 | M4 | R1 | R2 |
15219 +------------------+----+----+----+----+
15222 `RRS format: <insn> R1,R2,M3,D4(B4)'
15224 +--------+----+----+----+-------------+----+----+--------+
15225 | OpCode | R1 | R3 | B4 | D4 | M3 |////| OpCode |
15226 +--------+----+----+----+-------------+----+----+--------+
15227 0 8 12 16 20 32 36 40 47
15229 `RS format: <insn> R1,R3,D2(B2)'
15231 +--------+----+----+----+-------------+
15232 | OpCode | R1 | R3 | B2 | D2 |
15233 +--------+----+----+----+-------------+
15236 `RSE format: <insn> R1,R3,D2(B2)'
15238 +--------+----+----+----+-------------+--------+--------+
15239 | OpCode | R1 | R3 | B2 | D2 |////////| OpCode |
15240 +--------+----+----+----+-------------+--------+--------+
15241 0 8 12 16 20 32 40 47
15243 `RSI format: <insn> R1,R3,I2'
15245 +--------+----+----+------------------------------------+
15246 | OpCode | R1 | R3 | I2 |
15247 +--------+----+----+------------------------------------+
15250 `RSY format: <insn> R1,R3,D2(B2)'
15252 +--------+----+----+----+-------------+--------+--------+
15253 | OpCode | R1 | R3 | B2 | DL2 | DH2 | OpCode |
15254 +--------+----+----+----+-------------+--------+--------+
15255 0 8 12 16 20 32 40 47
15257 `RX format: <insn> R1,D2(X2,B2)'
15259 +--------+----+----+----+-------------+
15260 | OpCode | R1 | X2 | B2 | D2 |
15261 +--------+----+----+----+-------------+
15264 `RXE format: <insn> R1,D2(X2,B2)'
15266 +--------+----+----+----+-------------+--------+--------+
15267 | OpCode | R1 | X2 | B2 | D2 |////////| OpCode |
15268 +--------+----+----+----+-------------+--------+--------+
15269 0 8 12 16 20 32 40 47
15271 `RXF format: <insn> R1,R3,D2(X2,B2)'
15273 +--------+----+----+----+-------------+----+---+--------+
15274 | OpCode | R3 | X2 | B2 | D2 | R1 |///| OpCode |
15275 +--------+----+----+----+-------------+----+---+--------+
15276 0 8 12 16 20 32 36 40 47
15278 `RXY format: <insn> R1,D2(X2,B2)'
15280 +--------+----+----+----+-------------+--------+--------+
15281 | OpCode | R1 | X2 | B2 | DL2 | DH2 | OpCode |
15282 +--------+----+----+----+-------------+--------+--------+
15283 0 8 12 16 20 32 36 40 47
15285 `S format: <insn> D2(B2)'
15287 +------------------+----+-------------+
15288 | OpCode | B2 | D2 |
15289 +------------------+----+-------------+
15292 `SI format: <insn> D1(B1),I2'
15294 +--------+---------+----+-------------+
15295 | OpCode | I2 | B1 | D1 |
15296 +--------+---------+----+-------------+
15299 `SIY format: <insn> D1(B1),U2'
15301 +--------+---------+----+-------------+--------+--------+
15302 | OpCode | I2 | B1 | DL1 | DH1 | OpCode |
15303 +--------+---------+----+-------------+--------+--------+
15304 0 8 16 20 32 36 40 47
15306 `SIL format: <insn> D1(B1),I2'
15308 +------------------+----+-------------+-----------------+
15309 | OpCode | B1 | D1 | I2 |
15310 +------------------+----+-------------+-----------------+
15313 `SS format: <insn> D1(R1,B1),D2(B3),R3'
15315 +--------+----+----+----+-------------+----+------------+
15316 | OpCode | R1 | R3 | B1 | D1 | B2 | D2 |
15317 +--------+----+----+----+-------------+----+------------+
15318 0 8 12 16 20 32 36 47
15320 `SSE format: <insn> D1(B1),D2(B2)'
15322 +------------------+----+-------------+----+------------+
15323 | OpCode | B1 | D1 | B2 | D2 |
15324 +------------------+----+-------------+----+------------+
15325 0 8 12 16 20 32 36 47
15327 `SSF format: <insn> D1(B1),D2(B2),R3'
15329 +--------+----+----+----+-------------+----+------------+
15330 | OpCode | R3 |OpCd| B1 | D1 | B2 | D2 |
15331 +--------+----+----+----+-------------+----+------------+
15332 0 8 12 16 20 32 36 47
15335 For the complete list of all instruction format variants see the
15336 Principles of Operation manuals.
15339 File: as.info, Node: s390 Aliases, Next: s390 Operand Modifier, Prev: s390 Formats, Up: s390 Syntax
15341 9.32.3.5 Instruction Aliases
15342 ............................
15344 A specific bit pattern can have multiple mnemonics, for example the bit
15345 pattern `0xa7000000' has the mnemonics `tmh' and `tmlh'. In addition,
15346 there are a number of mnemonics recognized by `as' that are not present
15347 in the Principles of Operation. These are the short forms of the
15348 branch instructions, where the condition code mask operand is encoded
15349 in the mnemonic. This is relevant for the branch instructions, the
15350 compare and branch instructions, and the compare and trap instructions.
15352 For the branch instructions there are 20 condition code strings that
15353 can be used as part of the mnemonic in place of a mask operand in the
15354 instruction format:
15356 instruction short form
15357 ------------------------------------------
15359 bc M1,D2(X2,B2) b<m> D2(X2,B2)
15361 brcl M1,I2 jg<m> I2
15363 In the mnemonic for a branch instruction the condition code string
15364 <m> can be any of the following:
15366 o jump on overflow / if ones
15369 nle jump on not low or equal
15372 nhe jump on not high or equal
15373 lh jump on low or high
15374 ne jump on A not equal B
15375 nz jump on not zero / if not zeros
15376 e jump on A equal B
15377 z jump on zero / if zeroes
15378 nlh jump on not low or high
15379 he jump on high or equal
15380 nl jump on A not low
15381 nm jump on not minus / if not mixed
15382 le jump on low or equal
15383 nh jump on A not high
15384 np jump on not plus
15385 no jump on not overflow / if not ones
15387 For the compare and branch, and compare and trap instructions there
15388 are 12 condition code strings that can be used as part of the mnemonic
15389 in place of a mask operand in the instruction format:
15391 instruction short form
15392 --------------------------------------------------------
15393 crb R1,R2,M3,D4(B4) crb<m> R1,R2,D4(B4)
15394 cgrb R1,R2,M3,D4(B4) cgrb<m> R1,R2,D4(B4)
15395 crj R1,R2,M3,I4 crj<m> R1,R2,I4
15396 cgrj R1,R2,M3,I4 cgrj<m> R1,R2,I4
15397 cib R1,I2,M3,D4(B4) cib<m> R1,I2,D4(B4)
15398 cgib R1,I2,M3,D4(B4) cgib<m> R1,I2,D4(B4)
15399 cij R1,I2,M3,I4 cij<m> R1,I2,I4
15400 cgij R1,I2,M3,I4 cgij<m> R1,I2,I4
15401 crt R1,R2,M3 crt<m> R1,R2
15402 cgrt R1,R2,M3 cgrt<m> R1,R2
15403 cit R1,I2,M3 cit<m> R1,I2
15404 cgit R1,I2,M3 cgit<m> R1,I2
15405 clrb R1,R2,M3,D4(B4) clrb<m> R1,R2,D4(B4)
15406 clgrb R1,R2,M3,D4(B4) clgrb<m> R1,R2,D4(B4)
15407 clrj R1,R2,M3,I4 clrj<m> R1,R2,I4
15408 clgrj R1,R2,M3,I4 clgrj<m> R1,R2,I4
15409 clib R1,I2,M3,D4(B4) clib<m> R1,I2,D4(B4)
15410 clgib R1,I2,M3,D4(B4) clgib<m> R1,I2,D4(B4)
15411 clij R1,I2,M3,I4 clij<m> R1,I2,I4
15412 clgij R1,I2,M3,I4 clgij<m> R1,I2,I4
15413 clrt R1,R2,M3 clrt<m> R1,R2
15414 clgrt R1,R2,M3 clgrt<m> R1,R2
15415 clfit R1,I2,M3 clfit<m> R1,I2
15416 clgit R1,I2,M3 clgit<m> R1,I2
15418 In the mnemonic for a compare and branch and compare and trap
15419 instruction the condition code string <m> can be any of the following:
15422 nle jump on not low or equal
15424 nhe jump on not high or equal
15425 ne jump on A not equal B
15426 lh jump on low or high
15427 e jump on A equal B
15428 nlh jump on not low or high
15429 nl jump on A not low
15430 he jump on high or equal
15431 nh jump on A not high
15432 le jump on low or equal
15435 File: as.info, Node: s390 Operand Modifier, Next: s390 Instruction Marker, Prev: s390 Aliases, Up: s390 Syntax
15437 9.32.3.6 Instruction Operand Modifier
15438 .....................................
15440 If a symbol modifier is attached to a symbol in an expression for an
15441 instruction operand field, the symbol term is replaced with a reference
15442 to an object in the global offset table (GOT) or the procedure linkage
15443 table (PLT). The following expressions are allowed: `symbol@modifier +
15444 constant', `symbol@modifier + label + constant', and `symbol@modifier -
15445 label + constant'. The term `symbol' is the symbol that will be
15446 entered into the GOT or PLT, `label' is a local label, and `constant'
15447 is an arbitrary expression that the assembler can evaluate to a
15450 The term `(symbol + constant1)@modifier +/- label + constant2' is
15451 also accepted but a warning message is printed and the term is
15452 converted to `symbol@modifier +/- label + constant1 + constant2'.
15456 The @got modifier can be used for displacement fields, 16-bit
15457 immediate fields and 32-bit pc-relative immediate fields. The
15458 @got12 modifier is synonym to @got. The symbol is added to the
15459 GOT. For displacement fields and 16-bit immediate fields the
15460 symbol term is replaced with the offset from the start of the GOT
15461 to the GOT slot for the symbol. For a 32-bit pc-relative field
15462 the pc-relative offset to the GOT slot from the current
15463 instruction address is used.
15466 The @gotent modifier can be used for 32-bit pc-relative immediate
15467 fields. The symbol is added to the GOT and the symbol term is
15468 replaced with the pc-relative offset from the current instruction
15469 to the GOT slot for the symbol.
15472 The @gotoff modifier can be used for 16-bit immediate fields. The
15473 symbol term is replaced with the offset from the start of the GOT
15474 to the address of the symbol.
15477 The @gotplt modifier can be used for displacement fields, 16-bit
15478 immediate fields, and 32-bit pc-relative immediate fields. A
15479 procedure linkage table entry is generated for the symbol and a
15480 jump slot for the symbol is added to the GOT. For displacement
15481 fields and 16-bit immediate fields the symbol term is replaced
15482 with the offset from the start of the GOT to the jump slot for the
15483 symbol. For a 32-bit pc-relative field the pc-relative offset to
15484 the jump slot from the current instruction address is used.
15487 The @plt modifier can be used for 16-bit and 32-bit pc-relative
15488 immediate fields. A procedure linkage table entry is generated for
15489 the symbol. The symbol term is replaced with the relative offset
15490 from the current instruction to the PLT entry for the symbol.
15493 The @pltoff modifier can be used for 16-bit immediate fields. The
15494 symbol term is replaced with the offset from the start of the PLT
15495 to the address of the symbol.
15498 The @gotntpoff modifier can be used for displacement fields. The
15499 symbol is added to the static TLS block and the negated offset to
15500 the symbol in the static TLS block is added to the GOT. The symbol
15501 term is replaced with the offset to the GOT slot from the start of
15505 The @indntpoff modifier can be used for 32-bit pc-relative
15506 immediate fields. The symbol is added to the static TLS block and
15507 the negated offset to the symbol in the static TLS block is added
15508 to the GOT. The symbol term is replaced with the pc-relative
15509 offset to the GOT slot from the current instruction address.
15511 For more information about the thread local storage modifiers
15512 `gotntpoff' and `indntpoff' see the ELF extension documentation `ELF
15513 Handling For Thread-Local Storage'.
15516 File: as.info, Node: s390 Instruction Marker, Next: s390 Literal Pool Entries, Prev: s390 Operand Modifier, Up: s390 Syntax
15518 9.32.3.7 Instruction Marker
15519 ...........................
15521 The thread local storage instruction markers are used by the linker to
15522 perform code optimization.
15525 The :tls_load marker is used to flag the load instruction in the
15526 initial exec TLS model that retrieves the offset from the thread
15527 pointer to a thread local storage variable from the GOT.
15530 The :tls_gdcall marker is used to flag the branch-and-save
15531 instruction to the __tls_get_offset function in the global dynamic
15535 The :tls_ldcall marker is used to flag the branch-and-save
15536 instruction to the __tls_get_offset function in the local dynamic
15539 For more information about the thread local storage instruction
15540 marker and the linker optimizations see the ELF extension documentation
15541 `ELF Handling For Thread-Local Storage'.
15544 File: as.info, Node: s390 Literal Pool Entries, Prev: s390 Instruction Marker, Up: s390 Syntax
15546 9.32.3.8 Literal Pool Entries
15547 .............................
15549 A literal pool is a collection of values. To access the values a pointer
15550 to the literal pool is loaded to a register, the literal pool register.
15551 Usually, register %r13 is used as the literal pool register (*Note s390
15552 Register::). Literal pool entries are created by adding the suffix
15553 :lit1, :lit2, :lit4, or :lit8 to the end of an expression for an
15554 instruction operand. The expression is added to the literal pool and the
15555 operand is replaced with the offset to the literal in the literal pool.
15558 The literal pool entry is created as an 8-bit value. An operand
15559 modifier must not be used for the original expression.
15562 The literal pool entry is created as a 16 bit value. The operand
15563 modifier @got may be used in the original expression. The term
15564 `x@got:lit2' will put the got offset for the global symbol x to
15565 the literal pool as 16 bit value.
15568 The literal pool entry is created as a 32-bit value. The operand
15569 modifier @got and @plt may be used in the original expression. The
15570 term `x@got:lit4' will put the got offset for the global symbol x
15571 to the literal pool as a 32-bit value. The term `x@plt:lit4' will
15572 put the plt offset for the global symbol x to the literal pool as
15576 The literal pool entry is created as a 64-bit value. The operand
15577 modifier @got and @plt may be used in the original expression. The
15578 term `x@got:lit8' will put the got offset for the global symbol x
15579 to the literal pool as a 64-bit value. The term `x@plt:lit8' will
15580 put the plt offset for the global symbol x to the literal pool as
15583 The assembler directive `.ltorg' is used to emit all literal pool
15584 entries to the current position.
15587 File: as.info, Node: s390 Directives, Next: s390 Floating Point, Prev: s390 Syntax, Up: S/390-Dependent
15589 9.32.4 Assembler Directives
15590 ---------------------------
15592 `as' for s390 supports all of the standard ELF assembler directives as
15593 outlined in the main part of this document. Some directives have been
15594 extended and there are some additional directives, which are only
15595 available for the s390 `as'.
15598 This directive permits the numeric representation of an
15599 instructions and makes the assembler insert the operands according
15600 to one of the instructions formats for `.insn' (*Note s390
15601 Formats::). For example, the instruction `l %r1,24(%r15)' could
15602 be written as `.insn rx,0x58000000,%r1,24(%r15)'.
15607 This directive places one or more 16-bit (.short), 32-bit (.long),
15608 or 64-bit (.quad) values into the current section. If an ELF or
15609 TLS modifier is used only the following expressions are allowed:
15610 `symbol@modifier + constant', `symbol@modifier + label +
15611 constant', and `symbol@modifier - label + constant'. The
15612 following modifiers are available:
15615 The @got modifier can be used for .short, .long and .quad.
15616 The @got12 modifier is synonym to @got. The symbol is added
15617 to the GOT. The symbol term is replaced with offset from the
15618 start of the GOT to the GOT slot for the symbol.
15621 The @gotoff modifier can be used for .short, .long and .quad.
15622 The symbol term is replaced with the offset from the start of
15623 the GOT to the address of the symbol.
15626 The @gotplt modifier can be used for .long and .quad. A
15627 procedure linkage table entry is generated for the symbol and
15628 a jump slot for the symbol is added to the GOT. The symbol
15629 term is replaced with the offset from the start of the GOT to
15630 the jump slot for the symbol.
15633 The @plt modifier can be used for .long and .quad. A
15634 procedure linkage table entry us generated for the symbol.
15635 The symbol term is replaced with the address of the PLT entry
15639 The @pltoff modifier can be used for .short, .long and .quad.
15640 The symbol term is replaced with the offset from the start of
15641 the PLT to the address of the symbol.
15645 The @tlsgd and @tlsldm modifier can be used for .long and
15646 .quad. A tls_index structure for the symbol is added to the
15647 GOT. The symbol term is replaced with the offset from the
15648 start of the GOT to the tls_index structure.
15652 The @gotntpoff and @indntpoff modifier can be used for .long
15653 and .quad. The symbol is added to the static TLS block and
15654 the negated offset to the symbol in the static TLS block is
15655 added to the GOT. For @gotntpoff the symbol term is replaced
15656 with the offset from the start of the GOT to the GOT slot,
15657 for @indntpoff the symbol term is replaced with the address
15661 The @dtpoff modifier can be used for .long and .quad. The
15662 symbol term is replaced with the offset of the symbol
15663 relative to the start of the TLS block it is contained in.
15666 The @ntpoff modifier can be used for .long and .quad. The
15667 symbol term is replaced with the offset of the symbol
15668 relative to the TCB pointer.
15670 For more information about the thread local storage modifiers see
15671 the ELF extension documentation `ELF Handling For Thread-Local
15675 This directive causes the current contents of the literal pool to
15676 be dumped to the current location (*Note s390 Literal Pool
15680 This directive allows you to change the machine for which code is
15681 generated. `string' may be any of the `-march=' selection options
15682 (without the -march=), `push', or `pop'. `.machine push' saves
15683 the currently selected cpu, which may be restored with `.machine
15684 pop'. Be aware that the cpu string has to be put into double
15685 quotes in case it contains characters not appropriate for
15686 identifiers. So you have to write `"z9-109"' instead of just
15690 File: as.info, Node: s390 Floating Point, Prev: s390 Directives, Up: S/390-Dependent
15692 9.32.5 Floating Point
15693 ---------------------
15695 The assembler recognizes both the IEEE floating-point instruction and
15696 the hexadecimal floating-point instructions. The floating-point
15697 constructors `.float', `.single', and `.double' always emit the IEEE
15698 format. To assemble hexadecimal floating-point constants the `.long'
15699 and `.quad' directives must be used.
15702 File: as.info, Node: SCORE-Dependent, Next: Sparc-Dependent, Prev: S/390-Dependent, Up: Machine Dependencies
15704 9.33 SCORE Dependent Features
15705 =============================
15709 * SCORE-Opts:: Assembler options
15710 * SCORE-Pseudo:: SCORE Assembler Directives
15711 * SCORE-Syntax:: Syntax
15714 File: as.info, Node: SCORE-Opts, Next: SCORE-Pseudo, Up: SCORE-Dependent
15719 The following table lists all available SCORE options.
15722 This option sets the largest size of an object that can be
15723 referenced implicitly with the `gp' register. The default value is
15727 Assemble code for a big-endian cpu
15730 Assemble code for a little-endian cpu
15733 Assemble code for fix data dependency
15736 Assemble code for no warning message for fix data dependency
15739 Assemble code for target is SCORE5
15742 Assemble code for target is SCORE5U
15745 Assemble code for target is SCORE7, this is default setting
15748 Assemble code for target is SCORE3
15751 Assemble code for target is SCORE7, this is default setting
15754 Assemble code for target is SCORE3
15757 Assemble code for no warning message when using temp register r1
15760 Generate code for PIC. This option tells the assembler to generate
15761 score position-independent macro expansions. It also tells the
15762 assembler to mark the output file as PIC.
15765 Assembler will not perform any optimizations
15768 Sunplus release version
15772 File: as.info, Node: SCORE-Pseudo, Next: SCORE-Syntax, Prev: SCORE-Opts, Up: SCORE-Dependent
15774 9.33.2 SCORE Assembler Directives
15775 ---------------------------------
15777 A number of assembler directives are available for SCORE. The
15778 following table is far from complete.
15781 Let the assembler not to generate warnings if the source machine
15782 language instructions happen data dependency.
15785 Let the assembler to insert bubbles (32 bit nop instruction / 16
15786 bit nop! Instruction) if the source machine language instructions
15787 happen data dependency.
15790 Let the assembler to generate warnings if the source machine
15791 language instructions happen data dependency. (Default)
15794 Let the assembler not to generate warnings if the source program
15795 uses r1. allow user to use r1
15798 Let the assembler to generate warnings if the source program uses
15802 Tell the assembler to add subsequent data into the sdata section
15805 Tell the assembler to add subsequent data into the rdata section
15807 `.frame "frame-register", "offset", "return-pc-register"'
15808 Describe a stack frame. "frame-register" is the frame register,
15809 "offset" is the distance from the frame register to the virtual
15810 frame pointer, "return-pc-register" is the return program register.
15811 You must use ".ent" before ".frame" and only one ".frame" can be
15814 `.mask "bitmask", "frameoffset"'
15815 Indicate which of the integer registers are saved in the current
15816 function's stack frame, this is for the debugger to explain the
15820 Set the beginning of the procedure "proc_name". Use this directive
15821 when you want to generate information for the debugger.
15824 Set the end of a procedure. Use this directive to generate
15825 information for the debugger.
15828 Switch the destination of following statements into the bss
15829 section, which is used for data that is uninitialized anywhere.
15833 File: as.info, Node: SCORE-Syntax, Prev: SCORE-Pseudo, Up: SCORE-Dependent
15835 9.33.3 SCORE Syntax
15836 -------------------
15840 * SCORE-Chars:: Special Characters
15843 File: as.info, Node: SCORE-Chars, Up: SCORE-Syntax
15845 9.33.3.1 Special Characters
15846 ...........................
15848 The presence of a `#' appearing anywhere on a line indicates the start
15849 of a comment that extends to the end of that line.
15851 If a `#' appears as the first character of a line then the whole
15852 line is treated as a comment, but in this case the line can also be a
15853 logical line number directive (*note Comments::) or a preprocessor
15854 control command (*note Preprocessing::).
15856 The `;' character can be used to separate statements on the same
15860 File: as.info, Node: SH-Dependent, Next: SH64-Dependent, Prev: NS32K-Dependent, Up: Machine Dependencies
15862 9.34 Renesas / SuperH SH Dependent Features
15863 ===========================================
15867 * SH Options:: Options
15868 * SH Syntax:: Syntax
15869 * SH Floating Point:: Floating Point
15870 * SH Directives:: SH Machine Directives
15871 * SH Opcodes:: Opcodes
15874 File: as.info, Node: SH Options, Next: SH Syntax, Up: SH-Dependent
15879 `as' has following command-line options for the Renesas (formerly
15880 Hitachi) / SuperH SH family.
15883 Generate little endian code.
15886 Generate big endian code.
15889 Alter jump instructions for long displacements.
15892 Align sections to 4 byte boundaries, not 16.
15895 Enable sh-dsp insns, and disable sh3e / sh4 insns.
15898 Disable optimization with section symbol for compatibility with
15901 `--allow-reg-prefix'
15902 Allow '$' as a register name prefix.
15905 Generate an FDPIC object file.
15908 Specify the sh4 or sh4a instruction set.
15911 Enable sh-dsp insns, and disable sh3e / sh4 insns.
15914 Enable sh2e, sh3e, sh4, and sh4a insn sets.
15917 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
15920 Support H'00 style hex constants in addition to 0x00 style.
15924 File: as.info, Node: SH Syntax, Next: SH Floating Point, Prev: SH Options, Up: SH-Dependent
15931 * SH-Chars:: Special Characters
15932 * SH-Regs:: Register Names
15933 * SH-Addressing:: Addressing Modes
15936 File: as.info, Node: SH-Chars, Next: SH-Regs, Up: SH Syntax
15938 9.34.2.1 Special Characters
15939 ...........................
15941 `!' is the line comment character.
15943 You can use `;' instead of a newline to separate statements.
15945 If a `#' appears as the first character of a line then the whole
15946 line is treated as a comment, but in this case the line could also be a
15947 logical line number directive (*note Comments::) or a preprocessor
15948 control command (*note Preprocessing::).
15950 Since `$' has no special meaning, you may use it in symbol names.
15953 File: as.info, Node: SH-Regs, Next: SH-Addressing, Prev: SH-Chars, Up: SH Syntax
15955 9.34.2.2 Register Names
15956 .......................
15958 You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5',
15959 `r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to
15960 refer to the SH registers.
15962 The SH also has these control registers:
15965 procedure register (holds return address)
15972 high and low multiply accumulator registers
15978 global base register
15981 vector base register (for interrupt vectors)
15984 File: as.info, Node: SH-Addressing, Prev: SH-Regs, Up: SH Syntax
15986 9.34.2.3 Addressing Modes
15987 .........................
15989 `as' understands the following addressing modes for the SH. `RN' in
15990 the following refers to any of the numbered registers, but _not_ the
16000 Register indirect with pre-decrement
16003 Register indirect with post-increment
16006 Register indirect with displacement
16019 PC relative address (for branch or for addressing memory). The
16020 `as' implementation allows you to use the simpler form ADDR
16021 anywhere a PC relative address is called for; the alternate form
16022 is supported for compatibility with other assemblers.
16028 File: as.info, Node: SH Floating Point, Next: SH Directives, Prev: SH Syntax, Up: SH-Dependent
16030 9.34.3 Floating Point
16031 ---------------------
16033 SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other
16034 SH groups can use `.float' directive to generate IEEE floating-point
16037 SH2E and SH3E support single-precision floating point calculations as
16038 well as entirely PCAPI compatible emulation of double-precision
16039 floating point calculations. SH2E and SH3E instructions are a subset of
16040 the floating point calculations conforming to the IEEE754 standard.
16042 In addition to single-precision and double-precision floating-point
16043 operation capability, the on-chip FPU of SH4 has a 128-bit graphic
16044 engine that enables 32-bit floating-point data to be processed 128 bits
16045 at a time. It also supports 4 * 4 array operations and inner product
16046 operations. Also, a superscalar architecture is employed that enables
16047 simultaneous execution of two instructions (including FPU
16048 instructions), providing performance of up to twice that of
16049 conventional architectures at the same frequency.
16052 File: as.info, Node: SH Directives, Next: SH Opcodes, Prev: SH Floating Point, Up: SH-Dependent
16054 9.34.4 SH Machine Directives
16055 ----------------------------
16059 `as' will issue a warning when a misaligned `.word' or `.long'
16060 directive is used. You may use `.uaword' or `.ualong' to indicate
16061 that the value is intentionally misaligned.
16064 File: as.info, Node: SH Opcodes, Prev: SH Directives, Up: SH-Dependent
16069 For detailed information on the SH machine instruction set, see
16070 `SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core
16071 Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH).
16073 `as' implements all the standard SH opcodes. No additional
16074 pseudo-instructions are needed on this family. Note, however, that
16075 because `as' supports a simpler form of PC-relative addressing, you may
16076 simply write (for example)
16080 where other assemblers might require an explicit displacement to `bar'
16081 from the program counter:
16085 Here is a summary of SH opcodes:
16088 Rn a numbered register
16089 Rm another numbered register
16090 #imm immediate data
16092 disp8 8-bit displacement
16093 disp12 12-bit displacement
16095 add #imm,Rn lds.l @Rn+,PR
16096 add Rm,Rn mac.w @Rm+,@Rn+
16097 addc Rm,Rn mov #imm,Rn
16098 addv Rm,Rn mov Rm,Rn
16099 and #imm,R0 mov.b Rm,@(R0,Rn)
16100 and Rm,Rn mov.b Rm,@-Rn
16101 and.b #imm,@(R0,GBR) mov.b Rm,@Rn
16102 bf disp8 mov.b @(disp,Rm),R0
16103 bra disp12 mov.b @(disp,GBR),R0
16104 bsr disp12 mov.b @(R0,Rm),Rn
16105 bt disp8 mov.b @Rm+,Rn
16106 clrmac mov.b @Rm,Rn
16107 clrt mov.b R0,@(disp,Rm)
16108 cmp/eq #imm,R0 mov.b R0,@(disp,GBR)
16109 cmp/eq Rm,Rn mov.l Rm,@(disp,Rn)
16110 cmp/ge Rm,Rn mov.l Rm,@(R0,Rn)
16111 cmp/gt Rm,Rn mov.l Rm,@-Rn
16112 cmp/hi Rm,Rn mov.l Rm,@Rn
16113 cmp/hs Rm,Rn mov.l @(disp,Rn),Rm
16114 cmp/pl Rn mov.l @(disp,GBR),R0
16115 cmp/pz Rn mov.l @(disp,PC),Rn
16116 cmp/str Rm,Rn mov.l @(R0,Rm),Rn
16117 div0s Rm,Rn mov.l @Rm+,Rn
16119 div1 Rm,Rn mov.l R0,@(disp,GBR)
16120 exts.b Rm,Rn mov.w Rm,@(R0,Rn)
16121 exts.w Rm,Rn mov.w Rm,@-Rn
16122 extu.b Rm,Rn mov.w Rm,@Rn
16123 extu.w Rm,Rn mov.w @(disp,Rm),R0
16124 jmp @Rn mov.w @(disp,GBR),R0
16125 jsr @Rn mov.w @(disp,PC),Rn
16126 ldc Rn,GBR mov.w @(R0,Rm),Rn
16127 ldc Rn,SR mov.w @Rm+,Rn
16128 ldc Rn,VBR mov.w @Rm,Rn
16129 ldc.l @Rn+,GBR mov.w R0,@(disp,Rm)
16130 ldc.l @Rn+,SR mov.w R0,@(disp,GBR)
16131 ldc.l @Rn+,VBR mova @(disp,PC),R0
16132 lds Rn,MACH movt Rn
16133 lds Rn,MACL muls Rm,Rn
16134 lds Rn,PR mulu Rm,Rn
16135 lds.l @Rn+,MACH neg Rm,Rn
16136 lds.l @Rn+,MACL negc Rm,Rn
16139 not Rm,Rn stc.l GBR,@-Rn
16140 or #imm,R0 stc.l SR,@-Rn
16141 or Rm,Rn stc.l VBR,@-Rn
16142 or.b #imm,@(R0,GBR) sts MACH,Rn
16143 rotcl Rn sts MACL,Rn
16145 rotl Rn sts.l MACH,@-Rn
16146 rotr Rn sts.l MACL,@-Rn
16151 shar Rn swap.b Rm,Rn
16152 shll Rn swap.w Rm,Rn
16153 shll16 Rn tas.b @Rn
16154 shll2 Rn trapa #imm
16155 shll8 Rn tst #imm,R0
16157 shlr16 Rn tst.b #imm,@(R0,GBR)
16158 shlr2 Rn xor #imm,R0
16160 sleep xor.b #imm,@(R0,GBR)
16161 stc GBR,Rn xtrct Rm,Rn
16165 File: as.info, Node: SH64-Dependent, Next: PDP-11-Dependent, Prev: SH-Dependent, Up: Machine Dependencies
16167 9.35 SuperH SH64 Dependent Features
16168 ===================================
16172 * SH64 Options:: Options
16173 * SH64 Syntax:: Syntax
16174 * SH64 Directives:: SH64 Machine Directives
16175 * SH64 Opcodes:: Opcodes
16178 File: as.info, Node: SH64 Options, Next: SH64 Syntax, Up: SH64-Dependent
16184 Specify the sh4 or sh4a instruction set.
16187 Enable sh-dsp insns, and disable sh3e / sh4 insns.
16190 Enable sh2e, sh3e, sh4, and sh4a insn sets.
16193 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
16195 `-isa=shmedia | -isa=shcompact'
16196 Specify the default instruction set. `SHmedia' specifies the
16197 32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes
16198 compatible with previous SH families. The default depends on the
16199 ABI selected; the default for the 64-bit ABI is SHmedia, and the
16200 default for the 32-bit ABI is SHcompact. If neither the ABI nor
16201 the ISA is specified, the default is 32-bit SHcompact.
16203 Note that the `.mode' pseudo-op is not permitted if the ISA is not
16204 specified on the command line.
16206 `-abi=32 | -abi=64'
16207 Specify the default ABI. If the ISA is specified and the ABI is
16208 not, the default ABI depends on the ISA, with SHmedia defaulting
16209 to 64-bit and SHcompact defaulting to 32-bit.
16211 Note that the `.abi' pseudo-op is not permitted if the ABI is not
16212 specified on the command line. When the ABI is specified on the
16213 command line, any `.abi' pseudo-ops in the source must match it.
16215 `-shcompact-const-crange'
16216 Emit code-range descriptors for constants in SHcompact code
16220 Disallow SHmedia code in the same section as constants and
16224 Do not expand MOVI, PT, PTA or PTB instructions.
16227 With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
16230 Support H'00 style hex constants in addition to 0x00 style.
16234 File: as.info, Node: SH64 Syntax, Next: SH64 Directives, Prev: SH64 Options, Up: SH64-Dependent
16241 * SH64-Chars:: Special Characters
16242 * SH64-Regs:: Register Names
16243 * SH64-Addressing:: Addressing Modes
16246 File: as.info, Node: SH64-Chars, Next: SH64-Regs, Up: SH64 Syntax
16248 9.35.2.1 Special Characters
16249 ...........................
16251 `!' is the line comment character.
16253 If a `#' appears as the first character of a line then the whole
16254 line is treated as a comment, but in this case the line could also be a
16255 logical line number directive (*note Comments::) or a preprocessor
16256 control command (*note Preprocessing::).
16258 You can use `;' instead of a newline to separate statements.
16260 Since `$' has no special meaning, you may use it in symbol names.
16263 File: as.info, Node: SH64-Regs, Next: SH64-Addressing, Prev: SH64-Chars, Up: SH64 Syntax
16265 9.35.2.2 Register Names
16266 .......................
16268 You can use the predefined symbols `r0' through `r63' to refer to the
16269 SH64 general registers, `cr0' through `cr63' for control registers,
16270 `tr0' through `tr7' for target address registers, `fr0' through `fr63'
16271 for single-precision floating point registers, `dr0' through `dr62'
16272 (even numbered registers only) for double-precision floating point
16273 registers, `fv0' through `fv60' (multiples of four only) for
16274 single-precision floating point vectors, `fp0' through `fp62' (even
16275 numbered registers only) for single-precision floating point pairs,
16276 `mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of
16277 single-precision floating point registers, `pc' for the program
16278 counter, and `fpscr' for the floating point status and control register.
16280 You can also refer to the control registers by the mnemonics `sr',
16281 `ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc',
16282 `resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'.
16285 File: as.info, Node: SH64-Addressing, Prev: SH64-Regs, Up: SH64 Syntax
16287 9.35.2.3 Addressing Modes
16288 .........................
16290 SH64 operands consist of either a register or immediate value. The
16291 immediate value can be a constant or label reference (or portion of a
16292 label reference), as in this example:
16296 movi (function >> 16) & 65535,r0
16297 shori function & 65535, r0
16300 Instruction label references can reference labels in either SHmedia
16301 or SHcompact. To differentiate between the two, labels in SHmedia
16302 sections will always have the least significant bit set (i.e. they will
16303 be odd), which SHcompact labels will have the least significant bit
16304 reset (i.e. they will be even). If you need to reference the actual
16305 address of a label, you can use the `datalabel' modifier, as in this
16309 .long datalabel function
16311 In that example, the first longword may or may not have the least
16312 significant bit set depending on whether the label is an SHmedia label
16313 or an SHcompact label. The second longword will be the actual address
16314 of the label, regardless of what type of label it is.
16317 File: as.info, Node: SH64 Directives, Next: SH64 Opcodes, Prev: SH64 Syntax, Up: SH64-Dependent
16319 9.35.3 SH64 Machine Directives
16320 ------------------------------
16322 In addition to the SH directives, the SH64 provides the following
16325 `.mode [shmedia|shcompact]'
16326 `.isa [shmedia|shcompact]'
16327 Specify the ISA for the following instructions (the two directives
16328 are equivalent). Note that programs such as `objdump' rely on
16329 symbolic labels to determine when such mode switches occur (by
16330 checking the least significant bit of the label's address), so
16331 such mode/isa changes should always be followed by a label (in
16332 practice, this is true anyway). Note that you cannot use these
16333 directives if you didn't specify an ISA on the command line.
16336 Specify the ABI for the following instructions. Note that you
16337 cannot use this directive unless you specified an ABI on the
16338 command line, and the ABIs specified must match.
16341 Like .uaword and .ualong, this allows you to specify an
16342 intentionally unaligned quadword (64 bit word).
16346 File: as.info, Node: SH64 Opcodes, Prev: SH64 Directives, Up: SH64-Dependent
16351 For detailed information on the SH64 machine instruction set, see
16352 `SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.).
16354 `as' implements all the standard SH64 opcodes. In addition, the
16355 following pseudo-opcodes may be expanded into one or more alternate
16359 If the value doesn't fit into a standard `movi' opcode, `as' will
16360 replace the `movi' with a sequence of `movi' and `shori' opcodes.
16363 This expands to a sequence of `movi' and `shori' opcode, followed
16364 by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on
16365 the label referenced.
16369 File: as.info, Node: Sparc-Dependent, Next: TIC54X-Dependent, Prev: SCORE-Dependent, Up: Machine Dependencies
16371 9.36 SPARC Dependent Features
16372 =============================
16376 * Sparc-Opts:: Options
16377 * Sparc-Aligned-Data:: Option to enforce aligned data
16378 * Sparc-Syntax:: Syntax
16379 * Sparc-Float:: Floating Point
16380 * Sparc-Directives:: Sparc Machine Directives
16383 File: as.info, Node: Sparc-Opts, Next: Sparc-Aligned-Data, Up: Sparc-Dependent
16388 The SPARC chip family includes several successive versions, using the
16389 same core instruction set, but including a few additional instructions
16390 at each version. There are exceptions to this however. For details on
16391 what instructions each variant supports, please see the chip's
16392 architecture reference manual.
16394 By default, `as' assumes the core instruction set (SPARC v6), but
16395 "bumps" the architecture level as needed: it switches to successively
16396 higher architectures as it encounters instructions that only exist in
16399 If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump
16400 past sparclite by default, an option must be passed to enable the v9
16403 GAS treats sparclite as being compatible with v8, unless an
16404 architecture is explicitly requested. SPARC v9 is always incompatible
16407 `-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
16408 `-Av8plus | -Av8plusa | -Av8plusb | -Av8plusc | -Av8plusd | -Av8plusv'
16409 `-Av9 | -Av9a | -Av9b | -Av9c | -Av9d | -Av9v'
16410 `-Asparc | -Asparcvis | -Asparcvis2 | -Asparcfmaf | -Asparcima'
16411 `-Asparcvis3 | -Asparcvis3r'
16412 Use one of the `-A' options to select one of the SPARC
16413 architectures explicitly. If you select an architecture
16414 explicitly, `as' reports a fatal error if it encounters an
16415 instruction or feature requiring an incompatible or higher level.
16417 `-Av8plus', `-Av8plusa', `-Av8plusb', `-Av8plusc', `-Av8plusd',
16418 and `-Av8plusv' select a 32 bit environment.
16420 `-Av9', `-Av9a', `-Av9b', `-Av9c', `-Av9d', and `-Av9v' select a
16421 64 bit environment and are not available unless GAS is explicitly
16422 configured with 64 bit environment support.
16424 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
16425 UltraSPARC VIS 1.0 extensions.
16427 `-Av8plusb' and `-Av9b' enable the UltraSPARC VIS 2.0 instructions,
16428 as well as the instructions enabled by `-Av8plusa' and `-Av9a'.
16430 `-Av8plusc' and `-Av9c' enable the UltraSPARC Niagara instructions,
16431 as well as the instructions enabled by `-Av8plusb' and `-Av9b'.
16433 `-Av8plusd' and `-Av9d' enable the floating point fused
16434 multiply-add, VIS 3.0, and HPC extension instructions, as well as
16435 the instructions enabled by `-Av8plusc' and `-Av9c'.
16437 `-Av8plusv' and `-Av9v' enable the 'random', transactional memory,
16438 floating point unfused multiply-add, integer multiply-add, and
16439 cache sparing store instructions, as well as the instructions
16440 enabled by `-Av8plusd' and `-Av9d'.
16442 `-Asparc' specifies a v9 environment. It is equivalent to `-Av9'
16443 if the word size is 64-bit, and `-Av8plus' otherwise.
16445 `-Asparcvis' specifies a v9a environment. It is equivalent to
16446 `-Av9a' if the word size is 64-bit, and `-Av8plusa' otherwise.
16448 `-Asparcvis2' specifies a v9b environment. It is equivalent to
16449 `-Av9b' if the word size is 64-bit, and `-Av8plusb' otherwise.
16451 `-Asparcfmaf' specifies a v9b environment with the floating point
16452 fused multiply-add instructions enabled.
16454 `-Asparcima' specifies a v9b environment with the integer
16455 multiply-add instructions enabled.
16457 `-Asparcvis3' specifies a v9b environment with the VIS 3.0, HPC ,
16458 and floating point fused multiply-add instructions enabled.
16460 `-Asparcvis3r' specifies a v9b environment with the VIS 3.0, HPC,
16461 transactional memory, random, and floating point unfused
16462 multiply-add instructions enabled.
16464 `-xarch=v8plus | -xarch=v8plusa | -xarch=v8plusb | -xarch=v8plusc'
16465 `-xarch=v8plusd | -xarch=v8plusv | -xarch=v9 | -xarch=v9a'
16466 `-xarch=v9b | -xarch=v9c | -xarch=v9d | -xarch=v9v'
16467 `-xarch=sparc | -xarch=sparcvis | -xarch=sparcvis2'
16468 `-xarch=sparcfmaf | -xarch=sparcima | -xarch=sparcvis3'
16469 `-xarch=sparcvis3r'
16470 For compatibility with the SunOS v9 assembler. These options are
16471 equivalent to -Av8plus, -Av8plusa, -Av8plusb, -Av8plusc, -Av8plusd,
16472 -Av8plusv, -Av9, -Av9a, -Av9b, -Av9c, -Av9d, -Av9v, -Asparc,
16473 -Asparcvis, -Asparcvis2, -Asparcfmaf, -Asparcima, -Asparcvis3, and
16474 -Asparcvis3r, respectively.
16477 Warn whenever it is necessary to switch to another level. If an
16478 architecture level is explicitly requested, GAS will not issue
16479 warnings until that level is reached, and will then bump the level
16480 as required (except between incompatible levels).
16483 Select the word size, either 32 bits or 64 bits. These options
16484 are only available with the ELF object file format, and require
16485 that the necessary BFD support has been included.
16488 File: as.info, Node: Sparc-Aligned-Data, Next: Sparc-Syntax, Prev: Sparc-Opts, Up: Sparc-Dependent
16490 9.36.2 Enforcing aligned data
16491 -----------------------------
16493 SPARC GAS normally permits data to be misaligned. For example, it
16494 permits the `.long' pseudo-op to be used on a byte boundary. However,
16495 the native SunOS assemblers issue an error when they see misaligned
16498 You can use the `--enforce-aligned-data' option to make SPARC GAS
16499 also issue an error about misaligned data, just as the SunOS assemblers
16502 The `--enforce-aligned-data' option is not the default because gcc
16503 issues misaligned data pseudo-ops when it initializes certain packed
16504 data structures (structures defined using the `packed' attribute). You
16505 may have to assemble with GAS in order to initialize packed data
16506 structures in your own code.
16509 File: as.info, Node: Sparc-Syntax, Next: Sparc-Float, Prev: Sparc-Aligned-Data, Up: Sparc-Dependent
16511 9.36.3 Sparc Syntax
16512 -------------------
16514 The assembler syntax closely follows The Sparc Architecture Manual,
16515 versions 8 and 9, as well as most extensions defined by Sun for their
16516 UltraSPARC and Niagara line of processors.
16520 * Sparc-Chars:: Special Characters
16521 * Sparc-Regs:: Register Names
16522 * Sparc-Constants:: Constant Names
16523 * Sparc-Relocs:: Relocations
16524 * Sparc-Size-Translations:: Size Translations
16527 File: as.info, Node: Sparc-Chars, Next: Sparc-Regs, Up: Sparc-Syntax
16529 9.36.3.1 Special Characters
16530 ...........................
16532 A `!' character appearing anywhere on a line indicates the start of a
16533 comment that extends to the end of that line.
16535 If a `#' appears as the first character of a line then the whole
16536 line is treated as a comment, but in this case the line could also be a
16537 logical line number directive (*note Comments::) or a preprocessor
16538 control command (*note Preprocessing::).
16540 `;' can be used instead of a newline to separate statements.
16543 File: as.info, Node: Sparc-Regs, Next: Sparc-Constants, Prev: Sparc-Chars, Up: Sparc-Syntax
16545 9.36.3.2 Register Names
16546 .......................
16548 The Sparc integer register file is broken down into global, outgoing,
16549 local, and incoming.
16551 * The 8 global registers are referred to as `%gN'.
16553 * The 8 outgoing registers are referred to as `%oN'.
16555 * The 8 local registers are referred to as `%lN'.
16557 * The 8 incoming registers are referred to as `%iN'.
16559 * The frame pointer register `%i6' can be referenced using the alias
16562 * The stack pointer register `%o6' can be referenced using the alias
16565 Floating point registers are simply referred to as `%fN'. When
16566 assembling for pre-V9, only 32 floating point registers are available.
16567 For V9 and later there are 64, but there are restrictions when
16568 referencing the upper 32 registers. They can only be accessed as
16569 double or quad, and thus only even or quad numbered accesses are
16570 allowed. For example, `%f34' is a legal floating point register, but
16573 Certain V9 instructions allow access to ancillary state registers.
16574 Most simply they can be referred to as `%asrN' where N can be from 16
16575 to 31. However, there are some aliases defined to reference ASR
16576 registers defined for various UltraSPARC processors:
16578 * The tick compare register is referred to as `%tick_cmpr'.
16580 * The system tick register is referred to as `%stick'. An alias,
16581 `%sys_tick', exists but is deprecated and should not be used by
16584 * The system tick compare register is referred to as `%stick_cmpr'.
16585 An alias, `%sys_tick_cmpr', exists but is deprecated and should
16586 not be used by new software.
16588 * The software interrupt register is referred to as `%softint'.
16590 * The set software interrupt register is referred to as
16591 `%set_softint'. The mnemonic `%softint_set' is provided as an
16594 * The clear software interrupt register is referred to as
16595 `%clear_softint'. The mnemonic `%softint_clear' is provided as an
16598 * The performance instrumentation counters register is referred to as
16601 * The performance control register is referred to as `%pcr'.
16603 * The graphics status register is referred to as `%gsr'.
16605 * The V9 dispatch control register is referred to as `%dcr'.
16607 Various V9 branch and conditional move instructions allow
16608 specification of which set of integer condition codes to test. These
16609 are referred to as `%xcc' and `%icc'.
16611 In V9, there are 4 sets of floating point condition codes which are
16612 referred to as `%fccN'.
16614 Several special privileged and non-privileged registers exist:
16616 * The V9 address space identifier register is referred to as `%asi'.
16618 * The V9 restorable windows register is referred to as `%canrestore'.
16620 * The V9 savable windows register is referred to as `%cansave'.
16622 * The V9 clean windows register is referred to as `%cleanwin'.
16624 * The V9 current window pointer register is referred to as `%cwp'.
16626 * The floating-point queue register is referred to as `%fq'.
16628 * The V8 co-processor queue register is referred to as `%cq'.
16630 * The floating point status register is referred to as `%fsr'.
16632 * The other windows register is referred to as `%otherwin'.
16634 * The V9 program counter register is referred to as `%pc'.
16636 * The V9 next program counter register is referred to as `%npc'.
16638 * The V9 processor interrupt level register is referred to as `%pil'.
16640 * The V9 processor state register is referred to as `%pstate'.
16642 * The trap base address register is referred to as `%tba'.
16644 * The V9 tick register is referred to as `%tick'.
16646 * The V9 trap level is referred to as `%tl'.
16648 * The V9 trap program counter is referred to as `%tpc'.
16650 * The V9 trap next program counter is referred to as `%tnpc'.
16652 * The V9 trap state is referred to as `%tstate'.
16654 * The V9 trap type is referred to as `%tt'.
16656 * The V9 condition codes is referred to as `%ccr'.
16658 * The V9 floating-point registers state is referred to as `%fprs'.
16660 * The V9 version register is referred to as `%ver'.
16662 * The V9 window state register is referred to as `%wstate'.
16664 * The Y register is referred to as `%y'.
16666 * The V8 window invalid mask register is referred to as `%wim'.
16668 * The V8 processor state register is referred to as `%psr'.
16670 * The V9 global register level register is referred to as `%gl'.
16672 Several special register names exist for hypervisor mode code:
16674 * The hyperprivileged processor state register is referred to as
16677 * The hyperprivileged trap state register is referred to as
16680 * The hyperprivileged interrupt pending register is referred to as
16683 * The hyperprivileged trap base address register is referred to as
16686 * The hyperprivileged implementation version register is referred to
16689 * The hyperprivileged system tick compare register is referred to as
16690 `%hstick_cmpr'. Note that there is no `%hstick' register, the
16691 normal `%stick' is used.
16694 File: as.info, Node: Sparc-Constants, Next: Sparc-Relocs, Prev: Sparc-Regs, Up: Sparc-Syntax
16699 Several Sparc instructions take an immediate operand field for which
16700 mnemonic names exist. Two such examples are `membar' and `prefetch'.
16701 Another example are the set of V9 memory access instruction that allow
16702 specification of an address space identifier.
16704 The `membar' instruction specifies a memory barrier that is the
16705 defined by the operand which is a bitmask. The supported mask
16708 * `#Sync' requests that all operations (including nonmemory
16709 reference operations) appearing prior to the `membar' must have
16710 been performed and the effects of any exceptions become visible
16711 before any instructions after the `membar' may be initiated. This
16712 corresponds to `membar' cmask field bit 2.
16714 * `#MemIssue' requests that all memory reference operations
16715 appearing prior to the `membar' must have been performed before
16716 any memory operation after the `membar' may be initiated. This
16717 corresponds to `membar' cmask field bit 1.
16719 * `#Lookaside' requests that a store appearing prior to the `membar'
16720 must complete before any load following the `membar' referencing
16721 the same address can be initiated. This corresponds to `membar'
16724 * `#StoreStore' defines that the effects of all stores appearing
16725 prior to the `membar' instruction must be visible to all
16726 processors before the effect of any stores following the `membar'.
16727 Equivalent to the deprecated `stbar' instruction. This
16728 corresponds to `membar' mmask field bit 3.
16730 * `#LoadStore' defines all loads appearing prior to the `membar'
16731 instruction must have been performed before the effect of any
16732 stores following the `membar' is visible to any other processor.
16733 This corresponds to `membar' mmask field bit 2.
16735 * `#StoreLoad' defines that the effects of all stores appearing
16736 prior to the `membar' instruction must be visible to all
16737 processors before loads following the `membar' may be performed.
16738 This corresponds to `membar' mmask field bit 1.
16740 * `#LoadLoad' defines that all loads appearing prior to the `membar'
16741 instruction must have been performed before any loads following
16742 the `membar' may be performed. This corresponds to `membar' mmask
16746 These values can be ored together, for example:
16749 membar #StoreLoad | #LoadLoad
16750 membar #StoreLoad | #StoreStore
16752 The `prefetch' and `prefetcha' instructions take a prefetch function
16753 code. The following prefetch function code constant mnemonics are
16756 * `#n_reads' requests a prefetch for several reads, and corresponds
16757 to a prefetch function code of 0.
16759 `#one_read' requests a prefetch for one read, and corresponds to a
16760 prefetch function code of 1.
16762 `#n_writes' requests a prefetch for several writes (and possibly
16763 reads), and corresponds to a prefetch function code of 2.
16765 `#one_write' requests a prefetch for one write, and corresponds to
16766 a prefetch function code of 3.
16768 `#page' requests a prefetch page, and corresponds to a prefetch
16769 function code of 4.
16771 `#invalidate' requests a prefetch invalidate, and corresponds to a
16772 prefetch function code of 16.
16774 `#unified' requests a prefetch to the nearest unified cache, and
16775 corresponds to a prefetch function code of 17.
16777 `#n_reads_strong' requests a strong prefetch for several reads,
16778 and corresponds to a prefetch function code of 20.
16780 `#one_read_strong' requests a strong prefetch for one read, and
16781 corresponds to a prefetch function code of 21.
16783 `#n_writes_strong' requests a strong prefetch for several writes,
16784 and corresponds to a prefetch function code of 22.
16786 `#one_write_strong' requests a strong prefetch for one write, and
16787 corresponds to a prefetch function code of 23.
16789 Onle one prefetch code may be specified. Here are some examples:
16791 prefetch [%l0 + %l2], #one_read
16792 prefetch [%g2 + 8], #n_writes
16793 prefetcha [%g1] 0x8, #unified
16794 prefetcha [%o0 + 0x10] %asi, #n_reads
16796 The actual behavior of a given prefetch function code is processor
16797 specific. If a processor does not implement a given prefetch
16798 function code, it will treat the prefetch instruction as a nop.
16800 For instructions that accept an immediate address space identifier,
16801 `as' provides many mnemonics corresponding to V9 defined as well
16802 as UltraSPARC and Niagara extended values. For example, `#ASI_P'
16803 and `#ASI_BLK_INIT_QUAD_LDD_AIUS'. See the V9 and processor
16804 specific manuals for details.
16808 File: as.info, Node: Sparc-Relocs, Next: Sparc-Size-Translations, Prev: Sparc-Constants, Up: Sparc-Syntax
16810 9.36.3.4 Relocations
16811 ....................
16813 ELF relocations are available as defined in the 32-bit and 64-bit Sparc
16814 ELF specifications.
16816 `R_SPARC_HI22' is obtained using `%hi' and `R_SPARC_LO10' is
16817 obtained using `%lo'. Likewise `R_SPARC_HIX22' is obtained from `%hix'
16818 and `R_SPARC_LOX10' is obtained using `%lox'. For example:
16820 sethi %hi(symbol), %g1
16821 or %g1, %lo(symbol), %g1
16823 sethi %hix(symbol), %g1
16824 xor %g1, %lox(symbol), %g1
16826 These "high" mnemonics extract bits 31:10 of their operand, and the
16827 "low" mnemonics extract bits 9:0 of their operand.
16829 V9 code model relocations can be requested as follows:
16831 * `R_SPARC_HH22' is requested using `%hh'. It can also be generated
16834 * `R_SPARC_HM10' is requested using `%hm'. It can also be generated
16837 * `R_SPARC_LM22' is requested using `%lm'.
16839 * `R_SPARC_H44' is requested using `%h44'.
16841 * `R_SPARC_M44' is requested using `%m44'.
16843 * `R_SPARC_L44' is requested using `%l44'.
16845 The PC relative relocation `R_SPARC_PC22' can be obtained by
16846 enclosing an operand inside of `%pc22'. Likewise, the `R_SPARC_PC10'
16847 relocation can be obtained using `%pc10'. These are mostly used when
16848 assembling PIC code. For example, the standard PIC sequence on Sparc
16849 to get the base of the global offset table, PC relative, into a
16850 register, can be performed as:
16852 sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %l7
16853 add %l7, %pc10(_GLOBAL_OFFSET_TABLE_+4), %l7
16855 Several relocations exist to allow the link editor to potentially
16856 optimize GOT data references. The `R_SPARC_GOTDATA_OP_HIX22'
16857 relocation can obtained by enclosing an operand inside of
16858 `%gdop_hix22'. The `R_SPARC_GOTDATA_OP_LOX10' relocation can obtained
16859 by enclosing an operand inside of `%gdop_lox10'. Likewise,
16860 `R_SPARC_GOTDATA_OP' can be obtained by enclosing an operand inside of
16861 `%gdop'. For example, assuming the GOT base is in register `%l7':
16863 sethi %gdop_hix22(symbol), %l1
16864 xor %l1, %gdop_lox10(symbol), %l1
16865 ld [%l7 + %l1], %l2, %gdop(symbol)
16867 There are many relocations that can be requested for access to
16868 thread local storage variables. All of the Sparc TLS mnemonics are
16871 * `R_SPARC_TLS_GD_HI22' is requested using `%tgd_hi22'.
16873 * `R_SPARC_TLS_GD_LO10' is requested using `%tgd_lo10'.
16875 * `R_SPARC_TLS_GD_ADD' is requested using `%tgd_add'.
16877 * `R_SPARC_TLS_GD_CALL' is requested using `%tgd_call'.
16879 * `R_SPARC_TLS_LDM_HI22' is requested using `%tldm_hi22'.
16881 * `R_SPARC_TLS_LDM_LO10' is requested using `%tldm_lo10'.
16883 * `R_SPARC_TLS_LDM_ADD' is requested using `%tldm_add'.
16885 * `R_SPARC_TLS_LDM_CALL' is requested using `%tldm_call'.
16887 * `R_SPARC_TLS_LDO_HIX22' is requested using `%tldo_hix22'.
16889 * `R_SPARC_TLS_LDO_LOX10' is requested using `%tldo_lox10'.
16891 * `R_SPARC_TLS_LDO_ADD' is requested using `%tldo_add'.
16893 * `R_SPARC_TLS_IE_HI22' is requested using `%tie_hi22'.
16895 * `R_SPARC_TLS_IE_LO10' is requested using `%tie_lo10'.
16897 * `R_SPARC_TLS_IE_LD' is requested using `%tie_ld'.
16899 * `R_SPARC_TLS_IE_LDX' is requested using `%tie_ldx'.
16901 * `R_SPARC_TLS_IE_ADD' is requested using `%tie_add'.
16903 * `R_SPARC_TLS_LE_HIX22' is requested using `%tle_hix22'.
16905 * `R_SPARC_TLS_LE_LOX10' is requested using `%tle_lox10'.
16907 Here are some example TLS model sequences.
16909 First, General Dynamic:
16911 sethi %tgd_hi22(symbol), %l1
16912 add %l1, %tgd_lo10(symbol), %l1
16913 add %l7, %l1, %o0, %tgd_add(symbol)
16914 call __tls_get_addr, %tgd_call(symbol)
16919 sethi %tldm_hi22(symbol), %l1
16920 add %l1, %tldm_lo10(symbol), %l1
16921 add %l7, %l1, %o0, %tldm_add(symbol)
16922 call __tls_get_addr, %tldm_call(symbol)
16925 sethi %tldo_hix22(symbol), %l1
16926 xor %l1, %tldo_lox10(symbol), %l1
16927 add %o0, %l1, %l1, %tldo_add(symbol)
16931 sethi %tie_hi22(symbol), %l1
16932 add %l1, %tie_lo10(symbol), %l1
16933 ld [%l7 + %l1], %o0, %tie_ld(symbol)
16934 add %g7, %o0, %o0, %tie_add(symbol)
16936 sethi %tie_hi22(symbol), %l1
16937 add %l1, %tie_lo10(symbol), %l1
16938 ldx [%l7 + %l1], %o0, %tie_ldx(symbol)
16939 add %g7, %o0, %o0, %tie_add(symbol)
16941 And finally, Local Exec:
16943 sethi %tle_hix22(symbol), %l1
16944 add %l1, %tle_lox10(symbol), %l1
16947 When assembling for 64-bit, and a secondary constant addend is
16948 specified in an address expression that would normally generate an
16949 `R_SPARC_LO10' relocation, the assembler will emit an `R_SPARC_OLO10'
16953 File: as.info, Node: Sparc-Size-Translations, Prev: Sparc-Relocs, Up: Sparc-Syntax
16955 9.36.3.5 Size Translations
16956 ..........................
16958 Often it is desirable to write code in an operand size agnostic manner.
16959 `as' provides support for this via operand size opcode translations.
16960 Translations are supported for loads, stores, shifts, compare-and-swap
16961 atomics, and the `clr' synthetic instruction.
16963 If generating 32-bit code, `as' will generate the 32-bit opcode.
16964 Whereas if 64-bit code is being generated, the 64-bit opcode will be
16965 emitted. For example `ldn' will be transformed into `ld' for 32-bit
16966 code and `ldx' for 64-bit code.
16968 Here is an example meant to demonstrate all the supported opcode
16972 ldna [%o0] %asi, %o2
16974 stna %o2, [%o0] %asi
16978 casn [%o0], %o1, %o2
16979 casna [%o0] %asi, %o1, %o2
16982 In 32-bit mode `as' will emit:
16985 lda [%o0] %asi, %o2
16987 sta %o2, [%o0] %asi
16991 cas [%o0], %o1, %o2
16992 casa [%o0] %asi, %o1, %o2
16995 And in 64-bit mode `as' will emit:
16998 ldxa [%o0] %asi, %o2
17000 stxa %o2, [%o0] %asi
17004 casx [%o0], %o1, %o2
17005 casxa [%o0] %asi, %o1, %o2
17008 Finally, the `.nword' translating directive is supported as well.
17009 It is documented in the section on Sparc machine directives.
17012 File: as.info, Node: Sparc-Float, Next: Sparc-Directives, Prev: Sparc-Syntax, Up: Sparc-Dependent
17014 9.36.4 Floating Point
17015 ---------------------
17017 The Sparc uses IEEE floating-point numbers.
17020 File: as.info, Node: Sparc-Directives, Prev: Sparc-Float, Up: Sparc-Dependent
17022 9.36.5 Sparc Machine Directives
17023 -------------------------------
17025 The Sparc version of `as' supports the following additional machine
17029 This must be followed by the desired alignment in bytes.
17032 This must be followed by a symbol name, a positive number, and
17033 `"bss"'. This behaves somewhat like `.comm', but the syntax is
17037 This is functionally identical to `.short'.
17040 On the Sparc, the `.nword' directive produces native word sized
17041 value, ie. if assembling with -32 it is equivalent to `.word', if
17042 assembling with -64 it is equivalent to `.xword'.
17045 This directive is ignored. Any text following it on the same line
17049 This directive declares use of a global application or system
17050 register. It must be followed by a register name %g2, %g3, %g6 or
17051 %g7, comma and the symbol name for that register. If symbol name
17052 is `#scratch', it is a scratch register, if it is `#ignore', it
17053 just suppresses any errors about using undeclared global register,
17054 but does not emit any information about it into the object file.
17055 This can be useful e.g. if you save the register before use and
17059 This must be followed by a symbol name, a positive number, and
17060 `"bss"'. This behaves somewhat like `.lcomm', but the syntax is
17064 This must be followed by `"text"', `"data"', or `"data1"'. It
17065 behaves like `.text', `.data', or `.data 1'.
17068 This is functionally identical to the `.space' directive.
17071 On the Sparc, the `.word' directive produces 32 bit values,
17072 instead of the 16 bit values it produces on many other machines.
17075 On the Sparc V9 processor, the `.xword' directive produces 64 bit
17079 File: as.info, Node: TIC54X-Dependent, Next: TIC6X-Dependent, Prev: Sparc-Dependent, Up: Machine Dependencies
17081 9.37 TIC54X Dependent Features
17082 ==============================
17086 * TIC54X-Opts:: Command-line Options
17087 * TIC54X-Block:: Blocking
17088 * TIC54X-Env:: Environment Settings
17089 * TIC54X-Constants:: Constants Syntax
17090 * TIC54X-Subsyms:: String Substitution
17091 * TIC54X-Locals:: Local Label Syntax
17092 * TIC54X-Builtins:: Builtin Assembler Math Functions
17093 * TIC54X-Ext:: Extended Addressing Support
17094 * TIC54X-Directives:: Directives
17095 * TIC54X-Macros:: Macro Features
17096 * TIC54X-MMRegs:: Memory-mapped Registers
17097 * TIC54X-Syntax:: Syntax
17100 File: as.info, Node: TIC54X-Opts, Next: TIC54X-Block, Up: TIC54X-Dependent
17105 The TMS320C54X version of `as' has a few machine-dependent options.
17107 You can use the `-mfar-mode' option to enable extended addressing
17108 mode. All addresses will be assumed to be > 16 bits, and the
17109 appropriate relocation types will be used. This option is equivalent
17110 to using the `.far_mode' directive in the assembly code. If you do not
17111 use the `-mfar-mode' option, all references will be assumed to be 16
17112 bits. This option may be abbreviated to `-mf'.
17114 You can use the `-mcpu' option to specify a particular CPU. This
17115 option is equivalent to using the `.version' directive in the assembly
17116 code. For recognized CPU codes, see *Note `.version':
17117 TIC54X-Directives. The default CPU version is `542'.
17119 You can use the `-merrors-to-file' option to redirect error output
17120 to a file (this provided for those deficient environments which don't
17121 provide adequate output redirection). This option may be abbreviated to
17125 File: as.info, Node: TIC54X-Block, Next: TIC54X-Env, Prev: TIC54X-Opts, Up: TIC54X-Dependent
17130 A blocked section or memory block is guaranteed not to cross the
17131 blocking boundary (usually a page, or 128 words) if it is smaller than
17132 the blocking size, or to start on a page boundary if it is larger than
17136 File: as.info, Node: TIC54X-Env, Next: TIC54X-Constants, Prev: TIC54X-Block, Up: TIC54X-Dependent
17138 9.37.3 Environment Settings
17139 ---------------------------
17141 `C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added
17142 to the list of directories normally searched for source and include
17143 files. `C54XDSP_DIR' will override `A_DIR'.
17146 File: as.info, Node: TIC54X-Constants, Next: TIC54X-Subsyms, Prev: TIC54X-Env, Up: TIC54X-Dependent
17148 9.37.4 Constants Syntax
17149 -----------------------
17151 The TIC54X version of `as' allows the following additional constant
17152 formats, using a suffix to indicate the radix:
17154 Binary `000000B, 011000b'
17156 Hexadecimal `45h, 0FH'
17159 File: as.info, Node: TIC54X-Subsyms, Next: TIC54X-Locals, Prev: TIC54X-Constants, Up: TIC54X-Dependent
17161 9.37.5 String Substitution
17162 --------------------------
17164 A subset of allowable symbols (which we'll call subsyms) may be assigned
17165 arbitrary string values. This is roughly equivalent to C preprocessor
17166 #define macros. When `as' encounters one of these symbols, the symbol
17167 is replaced in the input stream by its string value. Subsym names
17168 *must* begin with a letter.
17170 Subsyms may be defined using the `.asg' and `.eval' directives
17171 (*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives.
17173 Expansion is recursive until a previously encountered symbol is
17174 seen, at which point substitution stops.
17176 In this example, x is replaced with SYM2; SYM2 is replaced with
17177 SYM1, and SYM1 is replaced with x. At this point, x has already been
17178 encountered and the substitution stops.
17183 add x,a ; final code assembled is "add x, a"
17185 Macro parameters are converted to subsyms; a side effect of this is
17186 the normal `as' '\ARG' dereferencing syntax is unnecessary. Subsyms
17187 defined within a macro will have global scope, unless the `.var'
17188 directive is used to identify the subsym as a local macro variable
17189 *note `.var': TIC54X-Directives.
17191 Substitution may be forced in situations where replacement might be
17192 ambiguous by placing colons on either side of the subsym. The following
17198 When assembled becomes:
17202 Smaller parts of the string assigned to a subsym may be accessed with
17203 the following syntax:
17205 ``:SYMBOL(CHAR_INDEX):''
17206 Evaluates to a single-character string, the character at
17209 ``:SYMBOL(START,LENGTH):''
17210 Evaluates to a substring of SYMBOL beginning at START with length
17214 File: as.info, Node: TIC54X-Locals, Next: TIC54X-Builtins, Prev: TIC54X-Subsyms, Up: TIC54X-Dependent
17216 9.37.6 Local Labels
17217 -------------------
17219 Local labels may be defined in two ways:
17221 * $N, where N is a decimal number between 0 and 9
17223 * LABEL?, where LABEL is any legal symbol name.
17225 Local labels thus defined may be redefined or automatically
17226 generated. The scope of a local label is based on when it may be
17227 undefined or reset. This happens when one of the following situations
17230 * .newblock directive *note `.newblock': TIC54X-Directives.
17232 * The current section is changed (.sect, .text, or .data)
17234 * Entering or leaving an included file
17236 * The macro scope where the label was defined is exited
17239 File: as.info, Node: TIC54X-Builtins, Next: TIC54X-Ext, Prev: TIC54X-Locals, Up: TIC54X-Dependent
17241 9.37.7 Math Builtins
17242 --------------------
17244 The following built-in functions may be used to generate a
17245 floating-point value. All return a floating-point value except `$cvi',
17246 `$int', and `$sgn', which return an integer value.
17249 Returns the floating point arccosine of EXPR.
17252 Returns the floating point arcsine of EXPR.
17255 Returns the floating point arctangent of EXPR.
17257 ``$atan2(EXPR1,EXPR2)''
17258 Returns the floating point arctangent of EXPR1 / EXPR2.
17261 Returns the smallest integer not less than EXPR as floating point.
17264 Returns the floating point hyperbolic cosine of EXPR.
17267 Returns the floating point cosine of EXPR.
17270 Returns the integer value EXPR converted to floating-point.
17273 Returns the floating point value EXPR converted to integer.
17276 Returns the floating point value e ^ EXPR.
17279 Returns the floating point absolute value of EXPR.
17282 Returns the largest integer that is not greater than EXPR as
17285 ``$fmod(EXPR1,EXPR2)''
17286 Returns the floating point remainder of EXPR1 / EXPR2.
17289 Returns 1 if EXPR evaluates to an integer, zero otherwise.
17291 ``$ldexp(EXPR1,EXPR2)''
17292 Returns the floating point value EXPR1 * 2 ^ EXPR2.
17295 Returns the base 10 logarithm of EXPR.
17298 Returns the natural logarithm of EXPR.
17300 ``$max(EXPR1,EXPR2)''
17301 Returns the floating point maximum of EXPR1 and EXPR2.
17303 ``$min(EXPR1,EXPR2)''
17304 Returns the floating point minimum of EXPR1 and EXPR2.
17306 ``$pow(EXPR1,EXPR2)''
17307 Returns the floating point value EXPR1 ^ EXPR2.
17310 Returns the nearest integer to EXPR as a floating point number.
17313 Returns -1, 0, or 1 based on the sign of EXPR.
17316 Returns the floating point sine of EXPR.
17319 Returns the floating point hyperbolic sine of EXPR.
17322 Returns the floating point square root of EXPR.
17325 Returns the floating point tangent of EXPR.
17328 Returns the floating point hyperbolic tangent of EXPR.
17331 Returns the integer value of EXPR truncated towards zero as
17336 File: as.info, Node: TIC54X-Ext, Next: TIC54X-Directives, Prev: TIC54X-Builtins, Up: TIC54X-Dependent
17338 9.37.8 Extended Addressing
17339 --------------------------
17341 The `LDX' pseudo-op is provided for loading the extended addressing bits
17342 of a label or address. For example, if an address `_label' resides in
17343 extended program memory, the value of `_label' may be loaded as follows:
17344 ldx #_label,16,a ; loads extended bits of _label
17345 or #_label,a ; loads lower 16 bits of _label
17346 bacc a ; full address is in accumulator A
17349 File: as.info, Node: TIC54X-Directives, Next: TIC54X-Macros, Prev: TIC54X-Ext, Up: TIC54X-Dependent
17356 Align the section program counter on the next boundary, based on
17357 SIZE. SIZE may be any power of 2. `.even' is equivalent to
17358 `.align' with a SIZE of 2.
17360 Align SPC to word boundary
17363 Align SPC to longword boundary (same as .even)
17366 Align SPC to page boundary
17368 `.asg STRING, NAME'
17369 Assign NAME the string STRING. String replacement is performed on
17370 STRING before assignment.
17372 `.eval STRING, NAME'
17373 Evaluate the contents of string STRING and assign the result as a
17374 string to the subsym NAME. String replacement is performed on
17375 STRING before assignment.
17377 `.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
17378 Reserve space for SYMBOL in the .bss section. SIZE is in words.
17379 If present, BLOCKING_FLAG indicates the allocated space should be
17380 aligned on a page boundary if it would otherwise cross a page
17381 boundary. If present, ALIGNMENT_FLAG causes the assembler to
17382 allocate SIZE on a long word boundary.
17384 `.byte VALUE [,...,VALUE_N]'
17385 `.ubyte VALUE [,...,VALUE_N]'
17386 `.char VALUE [,...,VALUE_N]'
17387 `.uchar VALUE [,...,VALUE_N]'
17388 Place one or more bytes into consecutive words of the current
17389 section. The upper 8 bits of each word is zero-filled. If a
17390 label is used, it points to the word allocated for the first byte
17393 `.clink ["SECTION_NAME"]'
17394 Set STYP_CLINK flag for this section, which indicates to the
17395 linker that if no symbols from this section are referenced, the
17396 section should not be included in the link. If SECTION_NAME is
17397 omitted, the current section is used.
17402 `.copy "FILENAME" | FILENAME'
17403 `.include "FILENAME" | FILENAME'
17404 Read source statements from FILENAME. The normal include search
17405 path is used. Normally .copy will cause statements from the
17406 included file to be printed in the assembly listing and .include
17407 will not, but this distinction is not currently implemented.
17410 Begin assembling code into the .data section.
17412 `.double VALUE [,...,VALUE_N]'
17413 `.ldouble VALUE [,...,VALUE_N]'
17414 `.float VALUE [,...,VALUE_N]'
17415 `.xfloat VALUE [,...,VALUE_N]'
17416 Place an IEEE single-precision floating-point representation of
17417 one or more floating-point values into the current section. All
17418 but `.xfloat' align the result on a longword boundary. Values are
17419 stored most-significant word first.
17423 Control printing of directives to the listing file. Ignored.
17428 Emit a user-defined error, message, or warning, respectively.
17431 Use extended addressing when assembling statements. This should
17432 appear only once per file, and is equivalent to the -mfar-mode
17433 option *note `-mfar-mode': TIC54X-Opts.
17437 Control printing of false conditional blocks to the listing file.
17439 `.field VALUE [,SIZE]'
17440 Initialize a bitfield of SIZE bits in the current section. If
17441 VALUE is relocatable, then SIZE must be 16. SIZE defaults to 16
17442 bits. If VALUE does not fit into SIZE bits, the value will be
17443 truncated. Successive `.field' directives will pack starting at
17444 the current word, filling the most significant bits first, and
17445 aligning to the start of the next word if the field size does not
17446 fit into the space remaining in the current word. A `.align'
17447 directive with an operand of 1 will force the next `.field'
17448 directive to begin packing into a new word. If a label is used, it
17449 points to the word that contains the specified field.
17451 `.global SYMBOL [,...,SYMBOL_N]'
17452 `.def SYMBOL [,...,SYMBOL_N]'
17453 `.ref SYMBOL [,...,SYMBOL_N]'
17454 `.def' nominally identifies a symbol defined in the current file
17455 and available to other files. `.ref' identifies a symbol used in
17456 the current file but defined elsewhere. Both map to the standard
17457 `.global' directive.
17459 `.half VALUE [,...,VALUE_N]'
17460 `.uhalf VALUE [,...,VALUE_N]'
17461 `.short VALUE [,...,VALUE_N]'
17462 `.ushort VALUE [,...,VALUE_N]'
17463 `.int VALUE [,...,VALUE_N]'
17464 `.uint VALUE [,...,VALUE_N]'
17465 `.word VALUE [,...,VALUE_N]'
17466 `.uword VALUE [,...,VALUE_N]'
17467 Place one or more values into consecutive words of the current
17468 section. If a label is used, it points to the word allocated for
17469 the first value encountered.
17472 Define a special SYMBOL to refer to the load time address of the
17473 current section program counter.
17477 Set the page length and width of the output listing file. Ignored.
17481 Control whether the source listing is printed. Ignored.
17483 `.long VALUE [,...,VALUE_N]'
17484 `.ulong VALUE [,...,VALUE_N]'
17485 `.xlong VALUE [,...,VALUE_N]'
17486 Place one or more 32-bit values into consecutive words in the
17487 current section. The most significant word is stored first.
17488 `.long' and `.ulong' align the result on a longword boundary;
17492 `.break [CONDITION]'
17494 Repeatedly assemble a block of code. `.loop' begins the block, and
17495 `.endloop' marks its termination. COUNT defaults to 1024, and
17496 indicates the number of times the block should be repeated.
17497 `.break' terminates the loop so that assembly begins after the
17498 `.endloop' directive. The optional CONDITION will cause the loop
17499 to terminate only if it evaluates to zero.
17501 `MACRO_NAME .macro [PARAM1][,...PARAM_N]'
17504 See the section on macros for more explanation (*Note
17507 `.mlib "FILENAME" | FILENAME'
17508 Load the macro library FILENAME. FILENAME must be an archived
17509 library (BFD ar-compatible) of text files, expected to contain
17510 only macro definitions. The standard include search path is used.
17514 Control whether to include macro and loop block expansions in the
17515 listing output. Ignored.
17518 Define global symbolic names for the 'c54x registers. Supposedly
17519 equivalent to executing `.set' directives for each register with
17520 its memory-mapped value, but in reality is provided only for
17521 compatibility and does nothing.
17524 This directive resets any TIC54X local labels currently defined.
17525 Normal `as' local labels are unaffected.
17527 `.option OPTION_LIST'
17528 Set listing options. Ignored.
17530 `.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]'
17531 Designate SECTION_NAME for blocking. Blocking guarantees that a
17532 section will start on a page boundary (128 words) if it would
17533 otherwise cross a page boundary. Only initialized sections may be
17534 designated with this directive. See also *Note TIC54X-Block::.
17536 `.sect "SECTION_NAME"'
17537 Define a named initialized section and make it the current section.
17539 `SYMBOL .set "VALUE"'
17540 `SYMBOL .equ "VALUE"'
17541 Equate a constant VALUE to a SYMBOL, which is placed in the symbol
17542 table. SYMBOL may not be previously defined.
17544 `.space SIZE_IN_BITS'
17545 `.bes SIZE_IN_BITS'
17546 Reserve the given number of bits in the current section and
17547 zero-fill them. If a label is used with `.space', it points to the
17548 *first* word reserved. With `.bes', the label points to the
17549 *last* word reserved.
17553 Controls the inclusion of subsym replacement in the listing
17556 `.string "STRING" [,...,"STRING_N"]'
17557 `.pstring "STRING" [,...,"STRING_N"]'
17558 Place 8-bit characters from STRING into the current section.
17559 `.string' zero-fills the upper 8 bits of each word, while
17560 `.pstring' puts two characters into each word, filling the
17561 most-significant bits first. Unused space is zero-filled. If a
17562 label is used, it points to the first word initialized.
17564 `[STAG] .struct [OFFSET]'
17565 `[NAME_1] element [COUNT_1]'
17566 `[NAME_2] element [COUNT_2]'
17567 `[TNAME] .tag STAGX [TCOUNT]'
17569 `[NAME_N] element [COUNT_N]'
17570 `[SSIZE] .endstruct'
17571 `LABEL .tag [STAG]'
17572 Assign symbolic offsets to the elements of a structure. STAG
17573 defines a symbol to use to reference the structure. OFFSET
17574 indicates a starting value to use for the first element
17575 encountered; otherwise it defaults to zero. Each element can have
17576 a named offset, NAME, which is a symbol assigned the value of the
17577 element's offset into the structure. If STAG is missing, these
17578 become global symbols. COUNT adjusts the offset that many times,
17579 as if `element' were an array. `element' may be one of `.byte',
17580 `.word', `.long', `.float', or any equivalent of those, and the
17581 structure offset is adjusted accordingly. `.field' and `.string'
17582 are also allowed; the size of `.field' is one bit, and `.string'
17583 is considered to be one word in size. Only element descriptors,
17584 structure/union tags, `.align' and conditional assembly directives
17585 are allowed within `.struct'/`.endstruct'. `.align' aligns member
17586 offsets to word boundaries only. SSIZE, if provided, will always
17587 be assigned the size of the structure.
17589 The `.tag' directive, in addition to being used to define a
17590 structure/union element within a structure, may be used to apply a
17591 structure to a symbol. Once applied to LABEL, the individual
17592 structure elements may be applied to LABEL to produce the desired
17593 offsets using LABEL as the structure base.
17596 Set the tab size in the output listing. Ignored.
17599 `[NAME_1] element [COUNT_1]'
17600 `[NAME_2] element [COUNT_2]'
17601 `[TNAME] .tag UTAGX[,TCOUNT]'
17603 `[NAME_N] element [COUNT_N]'
17604 `[USIZE] .endstruct'
17605 `LABEL .tag [UTAG]'
17606 Similar to `.struct', but the offset after each element is reset to
17607 zero, and the USIZE is set to the maximum of all defined elements.
17608 Starting offset for the union is always zero.
17610 `[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
17611 Reserve space for variables in a named, uninitialized section
17612 (similar to .bss). `.usect' allows definitions sections
17613 independent of .bss. SYMBOL points to the first location reserved
17614 by this allocation. The symbol may be used as a variable name.
17615 SIZE is the allocated size in words. BLOCKING_FLAG indicates
17616 whether to block this section on a page boundary (128 words)
17617 (*note TIC54X-Block::). ALIGNMENT FLAG indicates whether the
17618 section should be longword-aligned.
17620 `.var SYM[,..., SYM_N]'
17621 Define a subsym to be a local variable within a macro. See *Note
17625 Set which processor to build instructions for. Though the
17626 following values are accepted, the op is ignored.
17637 File: as.info, Node: TIC54X-Macros, Next: TIC54X-MMRegs, Prev: TIC54X-Directives, Up: TIC54X-Dependent
17642 Macros do not require explicit dereferencing of arguments (i.e., \ARG).
17644 During macro expansion, the macro parameters are converted to
17645 subsyms. If the number of arguments passed the macro invocation
17646 exceeds the number of parameters defined, the last parameter is
17647 assigned the string equivalent of all remaining arguments. If fewer
17648 arguments are given than parameters, the missing parameters are
17649 assigned empty strings. To include a comma in an argument, you must
17650 enclose the argument in quotes.
17652 The following built-in subsym functions allow examination of the
17653 string value of subsyms (or ordinary strings). The arguments are
17654 strings unless otherwise indicated (subsyms passed as args will be
17655 replaced by the strings they represent).
17657 Returns the length of STR.
17659 ``$symcmp(STR1,STR2)''
17660 Returns 0 if STR1 == STR2, non-zero otherwise.
17662 ``$firstch(STR,CH)''
17663 Returns index of the first occurrence of character constant CH in
17666 ``$lastch(STR,CH)''
17667 Returns index of the last occurrence of character constant CH in
17670 ``$isdefed(SYMBOL)''
17671 Returns zero if the symbol SYMBOL is not in the symbol table,
17672 non-zero otherwise.
17674 ``$ismember(SYMBOL,LIST)''
17675 Assign the first member of comma-separated string LIST to SYMBOL;
17676 LIST is reassigned the remainder of the list. Returns zero if
17677 LIST is a null string. Both arguments must be subsyms.
17680 Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal,
17681 4 if a character, 5 if decimal, and zero if not an integer.
17684 Returns 1 if NAME is a valid symbol name, zero otherwise.
17687 Returns 1 if REG is a valid predefined register name (AR0-AR7
17690 ``$structsz(STAG)''
17691 Returns the size of the structure or union represented by STAG.
17693 ``$structacc(STAG)''
17694 Returns the reference point of the structure or union represented
17695 by STAG. Always returns zero.
17699 File: as.info, Node: TIC54X-MMRegs, Next: TIC54X-Syntax, Prev: TIC54X-Macros, Up: TIC54X-Dependent
17701 9.37.11 Memory-mapped Registers
17702 -------------------------------
17704 The following symbols are recognized as memory-mapped registers:
17708 File: as.info, Node: TIC54X-Syntax, Prev: TIC54X-MMRegs, Up: TIC54X-Dependent
17710 9.37.12 TIC54X Syntax
17711 ---------------------
17715 * TIC54X-Chars:: Special Characters
17718 File: as.info, Node: TIC54X-Chars, Up: TIC54X-Syntax
17720 9.37.12.1 Special Characters
17721 ............................
17723 The presence of a `;' appearing anywhere on a line indicates the start
17724 of a comment that extends to the end of that line.
17726 If a `#' appears as the first character of a line then the whole
17727 line is treated as a comment, but in this case the line can also be a
17728 logical line number directive (*note Comments::) or a preprocessor
17729 control command (*note Preprocessing::).
17731 The presence of an asterisk (`*') at the start of a line also
17732 indicates a comment that extends to the end of that line.
17734 The TIC54X assembler does not currently support a line separator
17738 File: as.info, Node: TIC6X-Dependent, Next: TILE-Gx-Dependent, Prev: TIC54X-Dependent, Up: Machine Dependencies
17740 9.38 TIC6X Dependent Features
17741 =============================
17745 * TIC6X Options:: Options
17746 * TIC6X Syntax:: Syntax
17747 * TIC6X Directives:: Directives
17750 File: as.info, Node: TIC6X Options, Next: TIC6X Syntax, Up: TIC6X-Dependent
17752 9.38.1 TIC6X Options
17753 --------------------
17756 Enable (only) instructions from architecture ARCH. By default,
17757 all instructions are permitted.
17759 The following values of ARCH are accepted: `c62x', `c64x',
17760 `c64x+', `c67x', `c67x+', `c674x'.
17764 The `-mdsbt' option causes the assembler to generate the
17765 `Tag_ABI_DSBT' attribute with a value of 1, indicating that the
17766 code is using DSBT addressing. The `-mno-dsbt' option, the
17767 default, causes the tag to have a value of 0, indicating that the
17768 code does not use DSBT addressing. The linker will emit a warning
17769 if objects of different type (DSBT and non-DSBT) are linked
17775 The `-mpid=' option causes the assembler to generate the
17776 `Tag_ABI_PID' attribute with a value indicating the form of data
17777 addressing used by the code. `-mpid=no', the default, indicates
17778 position-dependent data addressing, `-mpid=near' indicates
17779 position-independent addressing with GOT accesses using near DP
17780 addressing, and `-mpid=far' indicates position-independent
17781 addressing with GOT accesses using far DP addressing. The linker
17782 will emit a warning if objects built with different settings of
17783 this option are linked together.
17787 The `-mpic' option causes the assembler to generate the
17788 `Tag_ABI_PIC' attribute with a value of 1, indicating that the
17789 code is using position-independent code addressing, The
17790 `-mno-pic' option, the default, causes the tag to have a value of
17791 0, indicating position-dependent code addressing. The linker will
17792 emit a warning if objects of different type (position-dependent and
17793 position-independent) are linked together.
17797 Generate code for the specified endianness. The default is
17802 File: as.info, Node: TIC6X Syntax, Next: TIC6X Directives, Prev: TIC6X Options, Up: TIC6X-Dependent
17804 9.38.2 TIC6X Syntax
17805 -------------------
17807 The presence of a `;' on a line indicates the start of a comment that
17808 extends to the end of the current line. If a `#' or `*' appears as the
17809 first character of a line, the whole line is treated as a comment.
17810 Note that if a line starts with a `#' character then it can also be a
17811 logical line number directive (*note Comments::) or a preprocessor
17812 control command (*note Preprocessing::).
17814 The `@' character can be used instead of a newline to separate
17817 Instruction, register and functional unit names are case-insensitive.
17818 `as' requires fully-specified functional unit names, such as `.S1',
17819 `.L1X' or `.D1T2', on all instructions using a functional unit.
17821 For some instructions, there may be syntactic ambiguity between
17822 register or functional unit names and the names of labels or other
17823 symbols. To avoid this, enclose the ambiguous symbol name in
17824 parentheses; register and functional unit names may not be enclosed in
17828 File: as.info, Node: TIC6X Directives, Prev: TIC6X Syntax, Up: TIC6X-Dependent
17830 9.38.3 TIC6X Directives
17831 -----------------------
17833 Directives controlling the set of instructions accepted by the
17834 assembler have effect for instructions between the directive and any
17835 subsequent directive overriding it.
17838 This has the same effect as `-march=ARCH'.
17841 Prevents unwinding through the current function. No personality
17842 routine or exception table data is required or permitted.
17844 If this is not specified then frame unwinding information will be
17845 constructed from CFI directives. *note CFI directives::.
17847 `.c6xabi_attribute TAG, VALUE'
17848 Set the C6000 EABI build attribute TAG to VALUE.
17850 The TAG is either an attribute number or one of `Tag_ISA',
17851 `Tag_ABI_wchar_t', `Tag_ABI_stack_align_needed',
17852 `Tag_ABI_stack_align_preserved', `Tag_ABI_DSBT', `Tag_ABI_PID',
17853 `Tag_ABI_PIC', `TAG_ABI_array_object_alignment',
17854 `TAG_ABI_array_object_align_expected', `Tag_ABI_compatibility' and
17855 `Tag_ABI_conformance'. The VALUE is either a `number',
17856 `"string"', or `number, "string"' depending on the tag.
17859 Output an exception type table reference to SYMBOL.
17862 Marks the end of and exception table or function. If preceeded by
17863 a `.handlerdata' directive then this also switched back to the
17864 previous text section.
17867 Marks the end of the current function, and the start of the
17868 exception table entry for that function. Anything between this
17869 directive and the `.endp' directive will be added to the exception
17872 Must be preceded by a CFI block containing a `.cfi_lsda' directive.
17876 Disallow use of C64x+ compact instructions in the current text
17879 `.personalityindex INDEX'
17880 Sets the personality routine for the current function to the ABI
17881 specified compact routine number INDEX
17883 `.personality NAME'
17884 Sets the personality routine for the current function to NAME.
17886 `.scomm SYMBOL, SIZE, ALIGN'
17887 Like `.comm', creating a common symbol SYMBOL with size SIZE and
17888 alignment ALIGN, but unlike when using `.comm', this symbol will
17889 be placed into the small BSS section by the linker.
17893 File: as.info, Node: TILE-Gx-Dependent, Next: TILEPro-Dependent, Prev: TIC6X-Dependent, Up: Machine Dependencies
17895 9.39 TILE-Gx Dependent Features
17896 ===============================
17900 * TILE-Gx Options:: TILE-Gx Options
17901 * TILE-Gx Syntax:: TILE-Gx Syntax
17902 * TILE-Gx Directives:: TILE-Gx Directives
17905 File: as.info, Node: TILE-Gx Options, Next: TILE-Gx Syntax, Up: TILE-Gx-Dependent
17910 The following table lists all available TILE-Gx specific options:
17913 Select the word size, either 32 bits or 64 bits.
17917 File: as.info, Node: TILE-Gx Syntax, Next: TILE-Gx Directives, Prev: TILE-Gx Options, Up: TILE-Gx-Dependent
17922 Block comments are delimited by `/*' and `*/'. End of line comments
17923 may be introduced by `#'.
17925 Instructions consist of a leading opcode or macro name followed by
17926 whitespace and an optional comma-separated list of operands:
17928 OPCODE [OPERAND, ...]
17930 Instructions must be separated by a newline or semicolon.
17932 There are two ways to write code: either write naked instructions,
17933 which the assembler is free to combine into VLIW bundles, or specify
17934 the VLIW bundles explicitly.
17936 Bundles are specified using curly braces:
17938 { ADD r3,r4,r5 ; ADD r7,r8,r9 ; LW r10,r11 }
17940 A bundle can span multiple lines. If you want to put multiple
17941 instructions on a line, whether in a bundle or not, you need to
17942 separate them with semicolons as in this example.
17944 A bundle may contain one or more instructions, up to the limit
17945 specified by the ISA (currently three). If fewer instructions are
17946 specified than the hardware supports in a bundle, the assembler inserts
17947 `fnop' instructions automatically.
17949 The assembler will prefer to preserve the ordering of instructions
17950 within the bundle, putting the first instruction in a lower-numbered
17951 pipeline than the next one, etc. This fact, combined with the optional
17952 use of explicit `fnop' or `nop' instructions, allows precise control
17953 over which pipeline executes each instruction.
17955 If the instructions cannot be bundled in the listed order, the
17956 assembler will automatically try to find a valid pipeline assignment.
17957 If there is no way to bundle the instructions together, the assembler
17960 The assembler does not yet auto-bundle (automatically combine
17961 multiple instructions into one bundle), but it reserves the right to do
17962 so in the future. If you want to force an instruction to run by
17963 itself, put it in a bundle explicitly with curly braces and use `nop'
17964 instructions (not `fnop') to fill the remaining pipeline slots in that
17969 * TILE-Gx Opcodes:: Opcode Naming Conventions.
17970 * TILE-Gx Registers:: Register Naming.
17971 * TILE-Gx Modifiers:: Symbolic Operand Modifiers.
17974 File: as.info, Node: TILE-Gx Opcodes, Next: TILE-Gx Registers, Up: TILE-Gx Syntax
17976 9.39.2.1 Opcode Names
17977 .....................
17979 For a complete list of opcodes and descriptions of their semantics, see
17980 `TILE-Gx Instruction Set Architecture', available upon request at
17984 File: as.info, Node: TILE-Gx Registers, Next: TILE-Gx Modifiers, Prev: TILE-Gx Opcodes, Up: TILE-Gx Syntax
17986 9.39.2.2 Register Names
17987 .......................
17989 General-purpose registers are represented by predefined symbols of the
17990 form `rN', where N represents a number between `0' and `63'. However,
17991 the following registers have canonical names that must be used instead:
18024 The assembler will emit a warning if a numeric name is used instead
18025 of the non-numeric name. The `.no_require_canonical_reg_names'
18026 assembler pseudo-op turns off this warning.
18027 `.require_canonical_reg_names' turns it back on.
18030 File: as.info, Node: TILE-Gx Modifiers, Prev: TILE-Gx Registers, Up: TILE-Gx Syntax
18032 9.39.2.3 Symbolic Operand Modifiers
18033 ...................................
18035 The assembler supports several modifiers when using symbol addresses in
18036 TILE-Gx instruction operands. The general syntax is the following:
18040 The following modifiers are supported:
18043 This modifier is used to load bits 0-15 of the symbol's address.
18046 This modifier is used to load bits 16-31 of the symbol's address.
18049 This modifier is used to load bits 32-47 of the symbol's address.
18052 This modifier is used to load bits 48-63 of the symbol's address.
18055 This modifier yields the same value as `hw0', but it also checks
18056 that the value does not overflow.
18059 This modifier yields the same value as `hw1', but it also checks
18060 that the value does not overflow.
18063 This modifier yields the same value as `hw2', but it also checks
18064 that the value does not overflow.
18066 A 48-bit symbolic value is constructed by using the following
18069 moveli r0, hw2_last(sym)
18070 shl16insli r0, r0, hw1(sym)
18071 shl16insli r0, r0, hw0(sym)
18074 This modifier is used to load bits 0-15 of the symbol's offset in
18075 the GOT entry corresponding to the symbol.
18078 This modifier is used to load bits 16-31 of the symbol's offset in
18079 the GOT entry corresponding to the symbol.
18082 This modifier is used to load bits 32-47 of the symbol's offset in
18083 the GOT entry corresponding to the symbol.
18086 This modifier is used to load bits 48-63 of the symbol's offset in
18087 the GOT entry corresponding to the symbol.
18090 This modifier yields the same value as `hw0_got', but it also
18091 checks that the value does not overflow.
18094 This modifier yields the same value as `hw1_got', but it also
18095 checks that the value does not overflow.
18098 This modifier yields the same value as `hw2_got', but it also
18099 checks that the value does not overflow.
18102 This modifier is used for function symbols. It causes a
18103 _procedure linkage table_, an array of code stubs, to be created
18104 at the time the shared object is created or linked against,
18105 together with a global offset table entry. The value is a
18106 pc-relative offset to the corresponding stub code in the procedure
18107 linkage table. This arrangement causes the run-time symbol
18108 resolver to be called to look up and set the value of the symbol
18109 the first time the function is called (at latest; depending
18110 environment variables). It is only safe to leave the symbol
18111 unresolved this way if all references are function calls.
18114 This modifier is used to load bits 0-15 of the offset of the GOT
18115 entry of the symbol's TLS descriptor, to be used for
18116 general-dynamic TLS accesses.
18119 This modifier is used to load bits 16-31 of the offset of the GOT
18120 entry of the symbol's TLS descriptor, to be used for
18121 general-dynamic TLS accesses.
18124 This modifier is used to load bits 32-47 of the offset of the GOT
18125 entry of the symbol's TLS descriptor, to be used for
18126 general-dynamic TLS accesses.
18129 This modifier is used to load bits 48-63 of the offset of the GOT
18130 entry of the symbol's TLS descriptor, to be used for
18131 general-dynamic TLS accesses.
18134 This modifier yields the same value as `hw0_tls_gd', but it also
18135 checks that the value does not overflow.
18138 This modifier yields the same value as `hw1_tls_gd', but it also
18139 checks that the value does not overflow.
18142 This modifier yields the same value as `hw2_tls_gd', but it also
18143 checks that the value does not overflow.
18146 This modifier is used to load bits 0-15 of the offset of the GOT
18147 entry containing the offset of the symbol's address from the TCB,
18148 to be used for initial-exec TLS accesses.
18151 This modifier is used to load bits 16-31 of the offset of the GOT
18152 entry containing the offset of the symbol's address from the TCB,
18153 to be used for initial-exec TLS accesses.
18156 This modifier is used to load bits 32-47 of the offset of the GOT
18157 entry containing the offset of the symbol's address from the TCB,
18158 to be used for initial-exec TLS accesses.
18161 This modifier is used to load bits 48-63 of the offset of the GOT
18162 entry containing the offset of the symbol's address from the TCB,
18163 to be used for initial-exec TLS accesses.
18166 This modifier yields the same value as `hw0_tls_ie', but it also
18167 checks that the value does not overflow.
18170 This modifier yields the same value as `hw1_tls_ie', but it also
18171 checks that the value does not overflow.
18174 This modifier yields the same value as `hw2_tls_ie', but it also
18175 checks that the value does not overflow.
18179 File: as.info, Node: TILE-Gx Directives, Prev: TILE-Gx Syntax, Up: TILE-Gx-Dependent
18181 9.39.3 TILE-Gx Directives
18182 -------------------------
18184 `.align EXPRESSION [, EXPRESSION]'
18185 This is the generic .ALIGN directive. The first argument is the
18186 requested alignment in bytes.
18188 `.allow_suspicious_bundles'
18189 Turns on error checking for combinations of instructions in a
18190 bundle that probably indicate a programming error. This is on by
18193 `.no_allow_suspicious_bundles'
18194 Turns off error checking for combinations of instructions in a
18195 bundle that probably indicate a programming error.
18197 `.require_canonical_reg_names'
18198 Require that canonical register names be used, and emit a warning
18199 if the numeric names are used. This is on by default.
18201 `.no_require_canonical_reg_names'
18202 Permit the use of numeric names for registers that have canonical
18207 File: as.info, Node: TILEPro-Dependent, Next: V850-Dependent, Prev: TILE-Gx-Dependent, Up: Machine Dependencies
18209 9.40 TILEPro Dependent Features
18210 ===============================
18214 * TILEPro Options:: TILEPro Options
18215 * TILEPro Syntax:: TILEPro Syntax
18216 * TILEPro Directives:: TILEPro Directives
18219 File: as.info, Node: TILEPro Options, Next: TILEPro Syntax, Up: TILEPro-Dependent
18224 `as' has no machine-dependent command-line options for TILEPro.
18227 File: as.info, Node: TILEPro Syntax, Next: TILEPro Directives, Prev: TILEPro Options, Up: TILEPro-Dependent
18232 Block comments are delimited by `/*' and `*/'. End of line comments
18233 may be introduced by `#'.
18235 Instructions consist of a leading opcode or macro name followed by
18236 whitespace and an optional comma-separated list of operands:
18238 OPCODE [OPERAND, ...]
18240 Instructions must be separated by a newline or semicolon.
18242 There are two ways to write code: either write naked instructions,
18243 which the assembler is free to combine into VLIW bundles, or specify
18244 the VLIW bundles explicitly.
18246 Bundles are specified using curly braces:
18248 { ADD r3,r4,r5 ; ADD r7,r8,r9 ; LW r10,r11 }
18250 A bundle can span multiple lines. If you want to put multiple
18251 instructions on a line, whether in a bundle or not, you need to
18252 separate them with semicolons as in this example.
18254 A bundle may contain one or more instructions, up to the limit
18255 specified by the ISA (currently three). If fewer instructions are
18256 specified than the hardware supports in a bundle, the assembler inserts
18257 `fnop' instructions automatically.
18259 The assembler will prefer to preserve the ordering of instructions
18260 within the bundle, putting the first instruction in a lower-numbered
18261 pipeline than the next one, etc. This fact, combined with the optional
18262 use of explicit `fnop' or `nop' instructions, allows precise control
18263 over which pipeline executes each instruction.
18265 If the instructions cannot be bundled in the listed order, the
18266 assembler will automatically try to find a valid pipeline assignment.
18267 If there is no way to bundle the instructions together, the assembler
18270 The assembler does not yet auto-bundle (automatically combine
18271 multiple instructions into one bundle), but it reserves the right to do
18272 so in the future. If you want to force an instruction to run by
18273 itself, put it in a bundle explicitly with curly braces and use `nop'
18274 instructions (not `fnop') to fill the remaining pipeline slots in that
18279 * TILEPro Opcodes:: Opcode Naming Conventions.
18280 * TILEPro Registers:: Register Naming.
18281 * TILEPro Modifiers:: Symbolic Operand Modifiers.
18284 File: as.info, Node: TILEPro Opcodes, Next: TILEPro Registers, Up: TILEPro Syntax
18286 9.40.2.1 Opcode Names
18287 .....................
18289 For a complete list of opcodes and descriptions of their semantics, see
18290 `TILE Processor User Architecture Manual', available upon request at
18294 File: as.info, Node: TILEPro Registers, Next: TILEPro Modifiers, Prev: TILEPro Opcodes, Up: TILEPro Syntax
18296 9.40.2.2 Register Names
18297 .......................
18299 General-purpose registers are represented by predefined symbols of the
18300 form `rN', where N represents a number between `0' and `63'. However,
18301 the following registers have canonical names that must be used instead:
18334 The assembler will emit a warning if a numeric name is used instead
18335 of the canonical name. The `.no_require_canonical_reg_names' assembler
18336 pseudo-op turns off this warning. `.require_canonical_reg_names' turns
18340 File: as.info, Node: TILEPro Modifiers, Prev: TILEPro Registers, Up: TILEPro Syntax
18342 9.40.2.3 Symbolic Operand Modifiers
18343 ...................................
18345 The assembler supports several modifiers when using symbol addresses in
18346 TILEPro instruction operands. The general syntax is the following:
18350 The following modifiers are supported:
18353 This modifier is used to load the low 16 bits of the symbol's
18354 address, sign-extended to a 32-bit value (sign-extension allows it
18355 to be range-checked against signed 16 bit immediate operands
18356 without complaint).
18359 This modifier is used to load the high 16 bits of the symbol's
18360 address, also sign-extended to a 32-bit value.
18363 `ha16(N)' is identical to `hi16(N)', except if `lo16(N)' is
18364 negative it adds one to the `hi16(N)' value. This way `lo16' and
18365 `ha16' can be added to create any 32-bit value using `auli'. For
18366 example, here is how you move an arbitrary 32-bit address into r3:
18368 moveli r3, lo16(sym)
18369 auli r3, r3, ha16(sym)
18372 This modifier is used to load the offset of the GOT entry
18373 corresponding to the symbol.
18376 This modifier is used to load the sign-extended low 16 bits of the
18377 offset of the GOT entry corresponding to the symbol.
18380 This modifier is used to load the sign-extended high 16 bits of the
18381 offset of the GOT entry corresponding to the symbol.
18384 This modifier is like `got_hi16', but it adds one if `got_lo16' of
18385 the input value is negative.
18388 This modifier is used for function symbols. It causes a
18389 _procedure linkage table_, an array of code stubs, to be created
18390 at the time the shared object is created or linked against,
18391 together with a global offset table entry. The value is a
18392 pc-relative offset to the corresponding stub code in the procedure
18393 linkage table. This arrangement causes the run-time symbol
18394 resolver to be called to look up and set the value of the symbol
18395 the first time the function is called (at latest; depending
18396 environment variables). It is only safe to leave the symbol
18397 unresolved this way if all references are function calls.
18400 This modifier is used to load the offset of the GOT entry of the
18401 symbol's TLS descriptor, to be used for general-dynamic TLS
18405 This modifier is used to load the sign-extended low 16 bits of the
18406 offset of the GOT entry of the symbol's TLS descriptor, to be used
18407 for general dynamic TLS accesses.
18410 This modifier is used to load the sign-extended high 16 bits of the
18411 offset of the GOT entry of the symbol's TLS descriptor, to be used
18412 for general dynamic TLS accesses.
18415 This modifier is like `tls_gd_hi16', but it adds one to the value
18416 if `tls_gd_lo16' of the input value is negative.
18419 This modifier is used to load the offset of the GOT entry
18420 containing the offset of the symbol's address from the TCB, to be
18421 used for initial-exec TLS accesses.
18424 This modifier is used to load the low 16 bits of the offset of the
18425 GOT entry containing the offset of the symbol's address from the
18426 TCB, to be used for initial-exec TLS accesses.
18429 This modifier is used to load the high 16 bits of the offset of the
18430 GOT entry containing the offset of the symbol's address from the
18431 TCB, to be used for initial-exec TLS accesses.
18434 This modifier is like `tls_ie_hi16', but it adds one to the value
18435 if `tls_ie_lo16' of the input value is negative.
18439 File: as.info, Node: TILEPro Directives, Prev: TILEPro Syntax, Up: TILEPro-Dependent
18441 9.40.3 TILEPro Directives
18442 -------------------------
18444 `.align EXPRESSION [, EXPRESSION]'
18445 This is the generic .ALIGN directive. The first argument is the
18446 requested alignment in bytes.
18448 `.allow_suspicious_bundles'
18449 Turns on error checking for combinations of instructions in a
18450 bundle that probably indicate a programming error. This is on by
18453 `.no_allow_suspicious_bundles'
18454 Turns off error checking for combinations of instructions in a
18455 bundle that probably indicate a programming error.
18457 `.require_canonical_reg_names'
18458 Require that canonical register names be used, and emit a warning
18459 if the numeric names are used. This is on by default.
18461 `.no_require_canonical_reg_names'
18462 Permit the use of numeric names for registers that have canonical
18467 File: as.info, Node: Z80-Dependent, Next: Z8000-Dependent, Prev: Xtensa-Dependent, Up: Machine Dependencies
18469 9.41 Z80 Dependent Features
18470 ===========================
18474 * Z80 Options:: Options
18475 * Z80 Syntax:: Syntax
18476 * Z80 Floating Point:: Floating Point
18477 * Z80 Directives:: Z80 Machine Directives
18478 * Z80 Opcodes:: Opcodes
18481 File: as.info, Node: Z80 Options, Next: Z80 Syntax, Up: Z80-Dependent
18486 The Zilog Z80 and Ascii R800 version of `as' have a few machine
18489 Produce code for the Z80 processor. There are additional options to
18490 request warnings and error messages for undocumented instructions.
18492 `-ignore-undocumented-instructions'
18494 Silently assemble undocumented Z80-instructions that have been
18495 adopted as documented R800-instructions.
18497 `-ignore-unportable-instructions'
18499 Silently assemble all undocumented Z80-instructions.
18501 `-warn-undocumented-instructions'
18503 Issue warnings for undocumented Z80-instructions that work on
18504 R800, do not assemble other undocumented instructions without
18507 `-warn-unportable-instructions'
18509 Issue warnings for other undocumented Z80-instructions, do not
18510 treat any undocumented instructions as errors.
18512 `-forbid-undocumented-instructions'
18514 Treat all undocumented z80-instructions as errors.
18516 `-forbid-unportable-instructions'
18518 Treat undocumented z80-instructions that do not work on R800 as
18522 Produce code for the R800 processor. The assembler does not support
18523 undocumented instructions for the R800. In line with common
18524 practice, `as' uses Z80 instruction names for the R800 processor,
18525 as far as they exist.
18528 File: as.info, Node: Z80 Syntax, Next: Z80 Floating Point, Prev: Z80 Options, Up: Z80-Dependent
18533 The assembler syntax closely follows the 'Z80 family CPU User Manual' by
18534 Zilog. In expressions a single `=' may be used as "is equal to"
18535 comparison operator.
18537 Suffices can be used to indicate the radix of integer constants; `H'
18538 or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o'
18539 for octal, and `B' for binary.
18541 The suffix `b' denotes a backreference to local label.
18545 * Z80-Chars:: Special Characters
18546 * Z80-Regs:: Register Names
18547 * Z80-Case:: Case Sensitivity
18550 File: as.info, Node: Z80-Chars, Next: Z80-Regs, Up: Z80 Syntax
18552 9.41.2.1 Special Characters
18553 ...........................
18555 The semicolon `;' is the line comment character;
18557 If a `#' appears as the first character of a line then the whole
18558 line is treated as a comment, but in this case the line could also be a
18559 logical line number directive (*note Comments::) or a preprocessor
18560 control command (*note Preprocessing::).
18562 The Z80 assembler does not support a line separator character.
18564 The dollar sign `$' can be used as a prefix for hexadecimal numbers
18565 and as a symbol denoting the current location counter.
18567 A backslash `\' is an ordinary character for the Z80 assembler.
18569 The single quote `'' must be followed by a closing quote. If there
18570 is one character in between, it is a character constant, otherwise it is
18574 File: as.info, Node: Z80-Regs, Next: Z80-Case, Prev: Z80-Chars, Up: Z80 Syntax
18576 9.41.2.2 Register Names
18577 .......................
18579 The registers are referred to with the letters assigned to them by
18580 Zilog. In addition `as' recognizes `ixl' and `ixh' as the least and
18581 most significant octet in `ix', and similarly `iyl' and `iyh' as parts
18585 File: as.info, Node: Z80-Case, Prev: Z80-Regs, Up: Z80 Syntax
18587 9.41.2.3 Case Sensitivity
18588 .........................
18590 Upper and lower case are equivalent in register names, opcodes,
18591 condition codes and assembler directives. The case of letters is
18592 significant in labels and symbol names. The case is also important to
18593 distinguish the suffix `b' for a backward reference to a local label
18594 from the suffix `B' for a number in binary notation.
18597 File: as.info, Node: Z80 Floating Point, Next: Z80 Directives, Prev: Z80 Syntax, Up: Z80-Dependent
18599 9.41.3 Floating Point
18600 ---------------------
18602 Floating-point numbers are not supported.
18605 File: as.info, Node: Z80 Directives, Next: Z80 Opcodes, Prev: Z80 Floating Point, Up: Z80-Dependent
18607 9.41.4 Z80 Assembler Directives
18608 -------------------------------
18610 `as' for the Z80 supports some additional directives for compatibility
18611 with other assemblers.
18613 These are the additional directives in `as' for the Z80:
18615 `db EXPRESSION|STRING[,EXPRESSION|STRING...]'
18616 `defb EXPRESSION|STRING[,EXPRESSION|STRING...]'
18617 For each STRING the characters are copied to the object file, for
18618 each other EXPRESSION the value is stored in one byte. A warning
18619 is issued in case of an overflow.
18621 `dw EXPRESSION[,EXPRESSION...]'
18622 `defw EXPRESSION[,EXPRESSION...]'
18623 For each EXPRESSION the value is stored in two bytes, ignoring
18626 `d24 EXPRESSION[,EXPRESSION...]'
18627 `def24 EXPRESSION[,EXPRESSION...]'
18628 For each EXPRESSION the value is stored in three bytes, ignoring
18631 `d32 EXPRESSION[,EXPRESSION...]'
18632 `def32 EXPRESSION[,EXPRESSION...]'
18633 For each EXPRESSION the value is stored in four bytes, ignoring
18636 `ds COUNT[, VALUE]'
18637 `defs COUNT[, VALUE]'
18638 Fill COUNT bytes in the object file with VALUE, if VALUE is
18639 omitted it defaults to zero.
18641 `SYMBOL equ EXPRESSION'
18642 `SYMBOL defl EXPRESSION'
18643 These directives set the value of SYMBOL to EXPRESSION. If `equ'
18644 is used, it is an error if SYMBOL is already defined. Symbols
18645 defined with `equ' are not protected from redefinition.
18648 This is a normal instruction on Z80, and not an assembler
18652 A synonym for *Note Section::, no second argument should be given.
18656 File: as.info, Node: Z80 Opcodes, Prev: Z80 Directives, Up: Z80-Dependent
18661 In line with common practice, Z80 mnemonics are used for both the Z80
18664 In many instructions it is possible to use one of the half index
18665 registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general
18666 purpose register. This yields instructions that are documented on the
18667 R800 and undocumented on the Z80. Similarly `in f,(c)' is documented
18668 on the R800 and undocumented on the Z80.
18670 The assembler also supports the following undocumented
18671 Z80-instructions, that have not been adopted in the R800 instruction
18674 Sends zero to the port pointed to by register c.
18677 Equivalent to `M = (M<<1)+1', the operand M can be any operand
18678 that is valid for `sla'. One can use `sll' as a synonym for `sli'.
18681 This is equivalent to
18687 The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc',
18688 `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R'
18689 may be any of `a', `b', `c', `d', `e', `h' and `l'.
18692 As above, but with `iy' instead of `ix'.
18694 The web site at `http://www.z80.info' is a good starting place to
18695 find more information on programming the Z80.
18698 File: as.info, Node: Z8000-Dependent, Next: Vax-Dependent, Prev: Z80-Dependent, Up: Machine Dependencies
18700 9.42 Z8000 Dependent Features
18701 =============================
18703 The Z8000 as supports both members of the Z8000 family: the
18704 unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with
18707 When the assembler is in unsegmented mode (specified with the
18708 `unsegm' directive), an address takes up one word (16 bit) sized
18709 register. When the assembler is in segmented mode (specified with the
18710 `segm' directive), a 24-bit address takes up a long (32 bit) register.
18711 *Note Assembler Directives for the Z8000: Z8000 Directives, for a list
18712 of other Z8000 specific assembler directives.
18716 * Z8000 Options:: Command-line options for the Z8000
18717 * Z8000 Syntax:: Assembler syntax for the Z8000
18718 * Z8000 Directives:: Special directives for the Z8000
18719 * Z8000 Opcodes:: Opcodes
18722 File: as.info, Node: Z8000 Options, Next: Z8000 Syntax, Up: Z8000-Dependent
18728 Generate segmented code by default.
18731 Generate unsegmented code by default.
18734 File: as.info, Node: Z8000 Syntax, Next: Z8000 Directives, Prev: Z8000 Options, Up: Z8000-Dependent
18741 * Z8000-Chars:: Special Characters
18742 * Z8000-Regs:: Register Names
18743 * Z8000-Addressing:: Addressing Modes
18746 File: as.info, Node: Z8000-Chars, Next: Z8000-Regs, Up: Z8000 Syntax
18748 9.42.2.1 Special Characters
18749 ...........................
18751 `!' is the line comment character.
18753 If a `#' appears as the first character of a line then the whole
18754 line is treated as a comment, but in this case the line could also be a
18755 logical line number directive (*note Comments::) or a preprocessor
18756 control command (*note Preprocessing::).
18758 You can use `;' instead of a newline to separate statements.
18761 File: as.info, Node: Z8000-Regs, Next: Z8000-Addressing, Prev: Z8000-Chars, Up: Z8000 Syntax
18763 9.42.2.2 Register Names
18764 .......................
18766 The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
18767 to different sized groups of registers by register number, with the
18768 prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for
18769 64 bit registers. You can also refer to the contents of the first
18770 eight (of the sixteen 16 bit registers) by bytes. They are named `rlN'
18774 rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3
18775 rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7
18778 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
18780 _long word registers_
18781 rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
18783 _quad word registers_
18787 File: as.info, Node: Z8000-Addressing, Prev: Z8000-Regs, Up: Z8000 Syntax
18789 9.42.2.3 Addressing Modes
18790 .........................
18792 as understands the following addressing modes for the Z8000:
18799 Register direct: 8bit, 16bit, 32bit, and 64bit registers.
18803 Indirect register: @rrN in segmented mode, @rN in unsegmented
18807 Direct: the 16 bit or 24 bit address (depending on whether the
18808 assembler is in segmented or unsegmented mode) of the operand is
18809 in the instruction.
18812 Indexed: the 16 or 24 bit address is added to the 16 bit register
18813 to produce the final address in memory of the operand.
18817 Base Address: the 16 or 24 bit register is added to the 16 bit sign
18818 extended immediate displacement to produce the final address in
18819 memory of the operand.
18823 Base Index: the 16 or 24 bit register rN or rrN is added to the
18824 sign extended 16 bit index register rM to produce the final
18825 address in memory of the operand.
18831 File: as.info, Node: Z8000 Directives, Next: Z8000 Opcodes, Prev: Z8000 Syntax, Up: Z8000-Dependent
18833 9.42.3 Assembler Directives for the Z8000
18834 -----------------------------------------
18836 The Z8000 port of as includes additional assembler directives, for
18837 compatibility with other Z8000 assemblers. These do not begin with `.'
18838 (unlike the ordinary as directives).
18842 Generate code for the segmented Z8001.
18846 Generate code for the unsegmented Z8002.
18849 Synonym for `.file'
18852 Synonym for `.global'
18855 Synonym for `.word'
18858 Synonym for `.long'
18861 Synonym for `.byte'
18864 Assemble a string. `sval' expects one string literal, delimited by
18865 single quotes. It assembles each byte of the string into
18866 consecutive addresses. You can use the escape sequence `%XX'
18867 (where XX represents a two-digit hexadecimal number) to represent
18868 the character whose ASCII value is XX. Use this feature to
18869 describe single quote and other characters that may not appear in
18870 string literals as themselves. For example, the C statement
18871 `char *a = "he said \"it's 50% off\"";' is represented in Z8000
18872 assembly language (shown with the assembler output in hex at the
18875 68652073 sval 'he said %22it%27s 50%25 off%22%00'
18883 synonym for `.section'
18886 synonym for `.space'
18889 special case of `.align'; aligns output to even byte boundary.
18892 File: as.info, Node: Z8000 Opcodes, Prev: Z8000 Directives, Up: Z8000-Dependent
18897 For detailed information on the Z8000 machine instruction set, see
18898 `Z8000 Technical Manual'.
18900 The following table summarizes the opcodes and their arguments:
18902 rs 16 bit source register
18903 rd 16 bit destination register
18904 rbs 8 bit source register
18905 rbd 8 bit destination register
18906 rrs 32 bit source register
18907 rrd 32 bit destination register
18908 rqs 64 bit source register
18909 rqd 64 bit destination register
18910 addr 16/24 bit address
18913 adc rd,rs clrb addr cpsir @rd,@rs,rr,cc
18914 adcb rbd,rbs clrb addr(rd) cpsirb @rd,@rs,rr,cc
18915 add rd,@rs clrb rbd dab rbd
18916 add rd,addr com @rd dbjnz rbd,disp7
18917 add rd,addr(rs) com addr dec @rd,imm4m1
18918 add rd,imm16 com addr(rd) dec addr(rd),imm4m1
18919 add rd,rs com rd dec addr,imm4m1
18920 addb rbd,@rs comb @rd dec rd,imm4m1
18921 addb rbd,addr comb addr decb @rd,imm4m1
18922 addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1
18923 addb rbd,imm8 comb rbd decb addr,imm4m1
18924 addb rbd,rbs comflg flags decb rbd,imm4m1
18925 addl rrd,@rs cp @rd,imm16 di i2
18926 addl rrd,addr cp addr(rd),imm16 div rrd,@rs
18927 addl rrd,addr(rs) cp addr,imm16 div rrd,addr
18928 addl rrd,imm32 cp rd,@rs div rrd,addr(rs)
18929 addl rrd,rrs cp rd,addr div rrd,imm16
18930 and rd,@rs cp rd,addr(rs) div rrd,rs
18931 and rd,addr cp rd,imm16 divl rqd,@rs
18932 and rd,addr(rs) cp rd,rs divl rqd,addr
18933 and rd,imm16 cpb @rd,imm8 divl rqd,addr(rs)
18934 and rd,rs cpb addr(rd),imm8 divl rqd,imm32
18935 andb rbd,@rs cpb addr,imm8 divl rqd,rrs
18936 andb rbd,addr cpb rbd,@rs djnz rd,disp7
18937 andb rbd,addr(rs) cpb rbd,addr ei i2
18938 andb rbd,imm8 cpb rbd,addr(rs) ex rd,@rs
18939 andb rbd,rbs cpb rbd,imm8 ex rd,addr
18940 bit @rd,imm4 cpb rbd,rbs ex rd,addr(rs)
18941 bit addr(rd),imm4 cpd rd,@rs,rr,cc ex rd,rs
18942 bit addr,imm4 cpdb rbd,@rs,rr,cc exb rbd,@rs
18943 bit rd,imm4 cpdr rd,@rs,rr,cc exb rbd,addr
18944 bit rd,rs cpdrb rbd,@rs,rr,cc exb rbd,addr(rs)
18945 bitb @rd,imm4 cpi rd,@rs,rr,cc exb rbd,rbs
18946 bitb addr(rd),imm4 cpib rbd,@rs,rr,cc ext0e imm8
18947 bitb addr,imm4 cpir rd,@rs,rr,cc ext0f imm8
18948 bitb rbd,imm4 cpirb rbd,@rs,rr,cc ext8e imm8
18949 bitb rbd,rs cpl rrd,@rs ext8f imm8
18950 bpt cpl rrd,addr exts rrd
18951 call @rd cpl rrd,addr(rs) extsb rd
18952 call addr cpl rrd,imm32 extsl rqd
18953 call addr(rd) cpl rrd,rrs halt
18954 calr disp12 cpsd @rd,@rs,rr,cc in rd,@rs
18955 clr @rd cpsdb @rd,@rs,rr,cc in rd,imm16
18956 clr addr cpsdr @rd,@rs,rr,cc inb rbd,@rs
18957 clr addr(rd) cpsdrb @rd,@rs,rr,cc inb rbd,imm16
18958 clr rd cpsi @rd,@rs,rr,cc inc @rd,imm4m1
18959 clrb @rd cpsib @rd,@rs,rr,cc inc addr(rd),imm4m1
18960 inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
18961 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
18962 incb @rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
18963 incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@rs
18964 incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr
18965 incb rbd,imm4m1 ldd @rs,@rd,rr multl rqd,addr(rs)
18966 ind @rd,@rs,ra lddb @rs,@rd,rr multl rqd,imm32
18967 indb @rd,@rs,rba lddr @rs,@rd,rr multl rqd,rrs
18968 inib @rd,@rs,ra lddrb @rs,@rd,rr neg @rd
18969 inibr @rd,@rs,ra ldi @rd,@rs,rr neg addr
18970 iret ldib @rd,@rs,rr neg addr(rd)
18971 jp cc,@rd ldir @rd,@rs,rr neg rd
18972 jp cc,addr ldirb @rd,@rs,rr negb @rd
18973 jp cc,addr(rd) ldk rd,imm4 negb addr
18974 jr cc,disp8 ldl @rd,rrs negb addr(rd)
18975 ld @rd,imm16 ldl addr(rd),rrs negb rbd
18976 ld @rd,rs ldl addr,rrs nop
18977 ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@rs
18978 ld addr(rd),rs ldl rd(rx),rrs or rd,addr
18979 ld addr,imm16 ldl rrd,@rs or rd,addr(rs)
18980 ld addr,rs ldl rrd,addr or rd,imm16
18981 ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs
18982 ld rd(rx),rs ldl rrd,imm32 orb rbd,@rs
18983 ld rd,@rs ldl rrd,rrs orb rbd,addr
18984 ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs)
18985 ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8
18986 ld rd,imm16 ldm @rd,rs,n orb rbd,rbs
18987 ld rd,rs ldm addr(rd),rs,n out @rd,rs
18988 ld rd,rs(imm16) ldm addr,rs,n out imm16,rs
18989 ld rd,rs(rx) ldm rd,@rs,n outb @rd,rbs
18990 lda rd,addr ldm rd,addr(rs),n outb imm16,rbs
18991 lda rd,addr(rs) ldm rd,addr,n outd @rd,@rs,ra
18992 lda rd,rs(imm16) ldps @rs outdb @rd,@rs,rba
18993 lda rd,rs(rx) ldps addr outib @rd,@rs,ra
18994 ldar rd,disp16 ldps addr(rs) outibr @rd,@rs,ra
18995 ldb @rd,imm8 ldr disp16,rs pop @rd,@rs
18996 ldb @rd,rbs ldr rd,disp16 pop addr(rd),@rs
18997 ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@rs
18998 ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@rs
18999 ldb addr,imm8 ldrl disp16,rrs popl @rd,@rs
19000 ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@rs
19001 ldb rbd,@rs mbit popl addr,@rs
19002 ldb rbd,addr mreq rd popl rrd,@rs
19003 ldb rbd,addr(rs) mres push @rd,@rs
19004 ldb rbd,imm8 mset push @rd,addr
19005 ldb rbd,rbs mult rrd,@rs push @rd,addr(rs)
19006 ldb rbd,rs(imm16) mult rrd,addr push @rd,imm16
19007 push @rd,rs set addr,imm4 subl rrd,imm32
19008 pushl @rd,@rs set rd,imm4 subl rrd,rrs
19009 pushl @rd,addr set rd,rs tcc cc,rd
19010 pushl @rd,addr(rs) setb @rd,imm4 tccb cc,rbd
19011 pushl @rd,rrs setb addr(rd),imm4 test @rd
19012 res @rd,imm4 setb addr,imm4 test addr
19013 res addr(rd),imm4 setb rbd,imm4 test addr(rd)
19014 res addr,imm4 setb rbd,rs test rd
19015 res rd,imm4 setflg imm4 testb @rd
19016 res rd,rs sinb rbd,imm16 testb addr
19017 resb @rd,imm4 sinb rd,imm16 testb addr(rd)
19018 resb addr(rd),imm4 sind @rd,@rs,ra testb rbd
19019 resb addr,imm4 sindb @rd,@rs,rba testl @rd
19020 resb rbd,imm4 sinib @rd,@rs,ra testl addr
19021 resb rbd,rs sinibr @rd,@rs,ra testl addr(rd)
19022 resflg imm4 sla rd,imm8 testl rrd
19023 ret cc slab rbd,imm8 trdb @rd,@rs,rba
19024 rl rd,imm1or2 slal rrd,imm8 trdrb @rd,@rs,rba
19025 rlb rbd,imm1or2 sll rd,imm8 trib @rd,@rs,rbr
19026 rlc rd,imm1or2 sllb rbd,imm8 trirb @rd,@rs,rbr
19027 rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @ra,@rb,rbr
19028 rldb rbb,rba sout imm16,rs trtib @ra,@rb,rr
19029 rr rd,imm1or2 soutb imm16,rbs trtirb @ra,@rb,rbr
19030 rrb rbd,imm1or2 soutd @rd,@rs,ra trtrb @ra,@rb,rbr
19031 rrc rd,imm1or2 soutdb @rd,@rs,rba tset @rd
19032 rrcb rbd,imm1or2 soutib @rd,@rs,ra tset addr
19033 rrdb rbb,rba soutibr @rd,@rs,ra tset addr(rd)
19034 rsvd36 sra rd,imm8 tset rd
19035 rsvd38 srab rbd,imm8 tsetb @rd
19036 rsvd78 sral rrd,imm8 tsetb addr
19037 rsvd7e srl rd,imm8 tsetb addr(rd)
19038 rsvd9d srlb rbd,imm8 tsetb rbd
19039 rsvd9f srll rrd,imm8 xor rd,@rs
19040 rsvdb9 sub rd,@rs xor rd,addr
19041 rsvdbf sub rd,addr xor rd,addr(rs)
19042 sbc rd,rs sub rd,addr(rs) xor rd,imm16
19043 sbcb rbd,rbs sub rd,imm16 xor rd,rs
19044 sc imm8 sub rd,rs xorb rbd,@rs
19045 sda rd,rs subb rbd,@rs xorb rbd,addr
19046 sdab rbd,rs subb rbd,addr xorb rbd,addr(rs)
19047 sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8
19048 sdl rd,rs subb rbd,imm8 xorb rbd,rbs
19049 sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
19050 sdll rrd,rs subl rrd,@rs
19051 set @rd,imm4 subl rrd,addr
19052 set addr(rd),imm4 subl rrd,addr(rs)
19055 File: as.info, Node: Vax-Dependent, Prev: Z8000-Dependent, Up: Machine Dependencies
19057 9.43 VAX Dependent Features
19058 ===========================
19062 * VAX-Opts:: VAX Command-Line Options
19063 * VAX-float:: VAX Floating Point
19064 * VAX-directives:: Vax Machine Directives
19065 * VAX-opcodes:: VAX Opcodes
19066 * VAX-branch:: VAX Branch Improvement
19067 * VAX-operands:: VAX Operands
19068 * VAX-no:: Not Supported on VAX
19069 * VAX-Syntax:: VAX Syntax
19072 File: as.info, Node: VAX-Opts, Next: VAX-float, Up: Vax-Dependent
19074 9.43.1 VAX Command-Line Options
19075 -------------------------------
19077 The Vax version of `as' accepts any of the following options, gives a
19078 warning message that the option was ignored and proceeds. These
19079 options are for compatibility with scripts designed for other people's
19083 ``-S' (Symbol Table)'
19084 ``-T' (Token Trace)'
19085 These are obsolete options used to debug old assemblers.
19087 ``-d' (Displacement size for JUMPs)'
19088 This option expects a number following the `-d'. Like options
19089 that expect filenames, the number may immediately follow the `-d'
19090 (old standard) or constitute the whole of the command line
19091 argument that follows `-d' (GNU standard).
19093 ``-V' (Virtualize Interpass Temporary File)'
19094 Some other assemblers use a temporary file. This option commanded
19095 them to keep the information in active memory rather than in a
19096 disk file. `as' always does this, so this option is redundant.
19098 ``-J' (JUMPify Longer Branches)'
19099 Many 32-bit computers permit a variety of branch instructions to
19100 do the same job. Some of these instructions are short (and fast)
19101 but have a limited range; others are long (and slow) but can
19102 branch anywhere in virtual memory. Often there are 3 flavors of
19103 branch: short, medium and long. Some other assemblers would emit
19104 short and medium branches, unless told by this option to emit
19105 short and long branches.
19107 ``-t' (Temporary File Directory)'
19108 Some other assemblers may use a temporary file, and this option
19109 takes a filename being the directory to site the temporary file.
19110 Since `as' does not use a temporary disk file, this option makes
19111 no difference. `-t' needs exactly one filename.
19113 The Vax version of the assembler accepts additional options when
19117 External symbol or section (used for global variables) names are
19118 not case sensitive on VAX/VMS and always mapped to upper case.
19119 This is contrary to the C language definition which explicitly
19120 distinguishes upper and lower case. To implement a standard
19121 conforming C compiler, names must be changed (mapped) to preserve
19122 the case information. The default mapping is to convert all lower
19123 case characters to uppercase and adding an underscore followed by
19124 a 6 digit hex value, representing a 24 digit binary value. The
19125 one digits in the binary value represent which characters are
19126 uppercase in the original symbol name.
19128 The `-h N' option determines how we map names. This takes several
19129 values. No `-h' switch at all allows case hacking as described
19130 above. A value of zero (`-h0') implies names should be upper
19131 case, and inhibits the case hack. A value of 2 (`-h2') implies
19132 names should be all lower case, with no case hack. A value of 3
19133 (`-h3') implies that case should be preserved. The value 1 is
19134 unused. The `-H' option directs `as' to display every mapped
19135 symbol during assembly.
19137 Symbols whose names include a dollar sign `$' are exceptions to the
19138 general name mapping. These symbols are normally only used to
19139 reference VMS library names. Such symbols are always mapped to
19143 The `-+' option causes `as' to truncate any symbol name larger
19144 than 31 characters. The `-+' option also prevents some code
19145 following the `_main' symbol normally added to make the object
19146 file compatible with Vax-11 "C".
19149 This option is ignored for backward compatibility with `as'
19153 The `-H' option causes `as' to print every symbol which was
19154 changed by case mapping.
19157 File: as.info, Node: VAX-float, Next: VAX-directives, Prev: VAX-Opts, Up: Vax-Dependent
19159 9.43.2 VAX Floating Point
19160 -------------------------
19162 Conversion of flonums to floating point is correct, and compatible with
19163 previous assemblers. Rounding is towards zero if the remainder is
19164 exactly half the least significant bit.
19166 `D', `F', `G' and `H' floating point formats are understood.
19168 Immediate floating literals (_e.g._ `S`$6.9') are rendered
19169 correctly. Again, rounding is towards zero in the boundary case.
19171 The `.float' directive produces `f' format numbers. The `.double'
19172 directive produces `d' format numbers.
19175 File: as.info, Node: VAX-directives, Next: VAX-opcodes, Prev: VAX-float, Up: Vax-Dependent
19177 9.43.3 Vax Machine Directives
19178 -----------------------------
19180 The Vax version of the assembler supports four directives for
19181 generating Vax floating point constants. They are described in the
19185 This expects zero or more flonums, separated by commas, and
19186 assembles Vax `d' format 64-bit floating point constants.
19189 This expects zero or more flonums, separated by commas, and
19190 assembles Vax `f' format 32-bit floating point constants.
19193 This expects zero or more flonums, separated by commas, and
19194 assembles Vax `g' format 64-bit floating point constants.
19197 This expects zero or more flonums, separated by commas, and
19198 assembles Vax `h' format 128-bit floating point constants.
19202 File: as.info, Node: VAX-opcodes, Next: VAX-branch, Prev: VAX-directives, Up: Vax-Dependent
19207 All DEC mnemonics are supported. Beware that `case...' instructions
19208 have exactly 3 operands. The dispatch table that follows the `case...'
19209 instruction should be made with `.word' statements. This is compatible
19210 with all unix assemblers we know of.
19213 File: as.info, Node: VAX-branch, Next: VAX-operands, Prev: VAX-opcodes, Up: Vax-Dependent
19215 9.43.5 VAX Branch Improvement
19216 -----------------------------
19218 Certain pseudo opcodes are permitted. They are for branch
19219 instructions. They expand to the shortest branch instruction that
19220 reaches the target. Generally these mnemonics are made by substituting
19221 `j' for `b' at the start of a DEC mnemonic. This feature is included
19222 both for compatibility and to help compilers. If you do not need this
19223 feature, avoid these opcodes. Here are the mnemonics, and the code
19224 they can expand into.
19227 `Jsb' is already an instruction mnemonic, so we chose `jbsb'.
19228 (byte displacement)
19231 (word displacement)
19234 (long displacement)
19239 Unconditional branch.
19240 (byte displacement)
19243 (word displacement)
19246 (long displacement)
19250 COND may be any one of the conditional branches `neq', `nequ',
19251 `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs',
19252 `gequ', `cc', `lssu', `cs'. COND may also be one of the bit tests
19253 `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs',
19254 `lbc'. NOTCOND is the opposite condition to COND.
19255 (byte displacement)
19258 (word displacement)
19259 `bNOTCOND foo ; brw ... ; foo:'
19261 (long displacement)
19262 `bNOTCOND foo ; jmp ... ; foo:'
19265 X may be one of `b d f g h l w'.
19266 (word displacement)
19269 (long displacement)
19276 YYY may be one of `lss leq'.
19279 ZZZ may be one of `geq gtr'.
19280 (byte displacement)
19283 (word displacement)
19286 foo: brw DESTINATION ;
19289 (long displacement)
19292 foo: jmp DESTINATION ;
19300 (byte displacement)
19303 (word displacement)
19306 foo: brw DESTINATION ;
19309 (long displacement)
19312 foo: jmp DESTINATION ;
19316 File: as.info, Node: VAX-operands, Next: VAX-no, Prev: VAX-branch, Up: Vax-Dependent
19318 9.43.6 VAX Operands
19319 -------------------
19321 The immediate character is `$' for Unix compatibility, not `#' as DEC
19324 The indirect character is `*' for Unix compatibility, not `@' as DEC
19327 The displacement sizing character is ``' (an accent grave) for Unix
19328 compatibility, not `^' as DEC writes it. The letter preceding ``' may
19329 have either case. `G' is not understood, but all other letters (`b i l
19330 s w') are understood.
19332 Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'. Upper
19333 and lower case letters are equivalent.
19338 Any expression is permitted in an operand. Operands are comma
19342 File: as.info, Node: VAX-no, Next: VAX-Syntax, Prev: VAX-operands, Up: Vax-Dependent
19344 9.43.7 Not Supported on VAX
19345 ---------------------------
19347 Vax bit fields can not be assembled with `as'. Someone can add the
19348 required code if they really need it.
19351 File: as.info, Node: VAX-Syntax, Prev: VAX-no, Up: Vax-Dependent
19358 * VAX-Chars:: Special Characters
19361 File: as.info, Node: VAX-Chars, Up: VAX-Syntax
19363 9.43.8.1 Special Characters
19364 ...........................
19366 The presence of a `#' appearing anywhere on a line indicates the start
19367 of a comment that extends to the end of that line.
19369 If a `#' appears as the first character of a line then the whole
19370 line is treated as a comment, but in this case the line can also be a
19371 logical line number directive (*note Comments::) or a preprocessor
19372 control command (*note Preprocessing::).
19374 The `;' character can be used to separate statements on the same
19378 File: as.info, Node: V850-Dependent, Next: XSTORMY16-Dependent, Prev: TILEPro-Dependent, Up: Machine Dependencies
19380 9.44 v850 Dependent Features
19381 ============================
19385 * V850 Options:: Options
19386 * V850 Syntax:: Syntax
19387 * V850 Floating Point:: Floating Point
19388 * V850 Directives:: V850 Machine Directives
19389 * V850 Opcodes:: Opcodes
19392 File: as.info, Node: V850 Options, Next: V850 Syntax, Up: V850-Dependent
19397 `as' supports the following additional command-line options for the
19398 V850 processor family:
19400 `-wsigned_overflow'
19401 Causes warnings to be produced when signed immediate values
19402 overflow the space available for then within their opcodes. By
19403 default this option is disabled as it is possible to receive
19404 spurious warnings due to using exact bit patterns as immediate
19407 `-wunsigned_overflow'
19408 Causes warnings to be produced when unsigned immediate values
19409 overflow the space available for then within their opcodes. By
19410 default this option is disabled as it is possible to receive
19411 spurious warnings due to using exact bit patterns as immediate
19415 Specifies that the assembled code should be marked as being
19416 targeted at the V850 processor. This allows the linker to detect
19417 attempts to link such code with code assembled for other
19421 Specifies that the assembled code should be marked as being
19422 targeted at the V850E processor. This allows the linker to detect
19423 attempts to link such code with code assembled for other
19427 Specifies that the assembled code should be marked as being
19428 targeted at the V850E1 processor. This allows the linker to
19429 detect attempts to link such code with code assembled for other
19433 Specifies that the assembled code should be marked as being
19434 targeted at the V850 processor but support instructions that are
19435 specific to the extended variants of the process. This allows the
19436 production of binaries that contain target specific code, but
19437 which are also intended to be used in a generic fashion. For
19438 example libgcc.a contains generic routines used by the code
19439 produced by GCC for all versions of the v850 architecture,
19440 together with support routines only used by the V850E architecture.
19443 Specifies that the assembled code should be marked as being
19444 targeted at the V850E2 processor. This allows the linker to
19445 detect attempts to link such code with code assembled for other
19449 Specifies that the assembled code should be marked as being
19450 targeted at the V850E2V3 processor. This allows the linker to
19451 detect attempts to link such code with code assembled for other
19455 Enables relaxation. This allows the .longcall and .longjump pseudo
19456 ops to be used in the assembler source code. These ops label
19457 sections of code which are either a long function call or a long
19458 branch. The assembler will then flag these sections of code and
19459 the linker will attempt to relax them.
19463 File: as.info, Node: V850 Syntax, Next: V850 Floating Point, Prev: V850 Options, Up: V850-Dependent
19470 * V850-Chars:: Special Characters
19471 * V850-Regs:: Register Names
19474 File: as.info, Node: V850-Chars, Next: V850-Regs, Up: V850 Syntax
19476 9.44.2.1 Special Characters
19477 ...........................
19479 `#' is the line comment character. If a `#' appears as the first
19480 character of a line, the whole line is treated as a comment, but in
19481 this case the line can also be a logical line number directive (*note
19482 Comments::) or a preprocessor control command (*note Preprocessing::).
19484 Two dashes (`--') can also be used to start a line comment.
19486 The `;' character can be used to separate statements on the same
19490 File: as.info, Node: V850-Regs, Prev: V850-Chars, Up: V850 Syntax
19492 9.44.2.2 Register Names
19493 .......................
19495 `as' supports the following names for registers:
19496 `general register 0'
19499 `general register 1'
19502 `general register 2'
19505 `general register 3'
19508 `general register 4'
19511 `general register 5'
19514 `general register 6'
19517 `general register 7'
19520 `general register 8'
19523 `general register 9'
19526 `general register 10'
19529 `general register 11'
19532 `general register 12'
19535 `general register 13'
19538 `general register 14'
19541 `general register 15'
19544 `general register 16'
19547 `general register 17'
19550 `general register 18'
19553 `general register 19'
19556 `general register 20'
19559 `general register 21'
19562 `general register 22'
19565 `general register 23'
19568 `general register 24'
19571 `general register 25'
19574 `general register 26'
19577 `general register 27'
19580 `general register 28'
19583 `general register 29'
19586 `general register 30'
19589 `general register 31'
19592 `system register 0'
19595 `system register 1'
19598 `system register 2'
19601 `system register 3'
19604 `system register 4'
19607 `system register 5'
19610 `system register 16'
19613 `system register 17'
19616 `system register 18'
19619 `system register 19'
19622 `system register 20'
19626 File: as.info, Node: V850 Floating Point, Next: V850 Directives, Prev: V850 Syntax, Up: V850-Dependent
19628 9.44.3 Floating Point
19629 ---------------------
19631 The V850 family uses IEEE floating-point numbers.
19634 File: as.info, Node: V850 Directives, Next: V850 Opcodes, Prev: V850 Floating Point, Up: V850-Dependent
19636 9.44.4 V850 Machine Directives
19637 ------------------------------
19639 `.offset <EXPRESSION>'
19640 Moves the offset into the current section to the specified amount.
19642 `.section "name", <type>'
19643 This is an extension to the standard .section directive. It sets
19644 the current section to be <type> and creates an alias for this
19645 section called "name".
19648 Specifies that the assembled code should be marked as being
19649 targeted at the V850 processor. This allows the linker to detect
19650 attempts to link such code with code assembled for other
19654 Specifies that the assembled code should be marked as being
19655 targeted at the V850E processor. This allows the linker to detect
19656 attempts to link such code with code assembled for other
19660 Specifies that the assembled code should be marked as being
19661 targeted at the V850E1 processor. This allows the linker to
19662 detect attempts to link such code with code assembled for other
19666 Specifies that the assembled code should be marked as being
19667 targeted at the V850E2 processor. This allows the linker to
19668 detect attempts to link such code with code assembled for other
19672 Specifies that the assembled code should be marked as being
19673 targeted at the V850E2V3 processor. This allows the linker to
19674 detect attempts to link such code with code assembled for other
19679 File: as.info, Node: V850 Opcodes, Prev: V850 Directives, Up: V850-Dependent
19684 `as' implements all the standard V850 opcodes.
19686 `as' also implements the following pseudo ops:
19689 Computes the higher 16 bits of the given expression and stores it
19690 into the immediate operand field of the given instruction. For
19693 `mulhi hi0(here - there), r5, r6'
19695 computes the difference between the address of labels 'here' and
19696 'there', takes the upper 16 bits of this difference, shifts it
19697 down 16 bits and then multiplies it by the lower 16 bits in
19698 register 5, putting the result into register 6.
19701 Computes the lower 16 bits of the given expression and stores it
19702 into the immediate operand field of the given instruction. For
19705 `addi lo(here - there), r5, r6'
19707 computes the difference between the address of labels 'here' and
19708 'there', takes the lower 16 bits of this difference and adds it to
19709 register 5, putting the result into register 6.
19712 Computes the higher 16 bits of the given expression and then adds
19713 the value of the most significant bit of the lower 16 bits of the
19714 expression and stores the result into the immediate operand field
19715 of the given instruction. For example the following code can be
19716 used to compute the address of the label 'here' and store it into
19719 `movhi hi(here), r0, r6' `movea lo(here), r6, r6'
19721 The reason for this special behaviour is that movea performs a sign
19722 extension on its immediate operand. So for example if the address
19723 of 'here' was 0xFFFFFFFF then without the special behaviour of the
19724 hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6,
19725 then the movea instruction would takes its immediate operand,
19726 0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it
19727 into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E).
19728 With the hi() pseudo op adding in the top bit of the lo() pseudo
19729 op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 =
19730 0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 -
19734 Computes the 32 bit value of the given expression and stores it
19735 into the immediate operand field of the given instruction (which
19736 must be a mov instruction). For example:
19738 `mov hilo(here), r6'
19740 computes the absolute address of label 'here' and puts the result
19744 Computes the offset of the named variable from the start of the
19745 Small Data Area (whoes address is held in register 4, the GP
19746 register) and stores the result as a 16 bit signed value in the
19747 immediate operand field of the given instruction. For example:
19749 `ld.w sdaoff(_a_variable)[gp],r6'
19751 loads the contents of the location pointed to by the label
19752 '_a_variable' into register 6, provided that the label is located
19753 somewhere within +/- 32K of the address held in the GP register.
19754 [Note the linker assumes that the GP register contains a fixed
19755 address set to the address of the label called '__gp'. This can
19756 either be set up automatically by the linker, or specifically set
19757 by using the `--defsym __gp=<value>' command line option].
19760 Computes the offset of the named variable from the start of the
19761 Tiny Data Area (whoes address is held in register 30, the EP
19762 register) and stores the result as a 4,5, 7 or 8 bit unsigned
19763 value in the immediate operand field of the given instruction.
19766 `sld.w tdaoff(_a_variable)[ep],r6'
19768 loads the contents of the location pointed to by the label
19769 '_a_variable' into register 6, provided that the label is located
19770 somewhere within +256 bytes of the address held in the EP
19771 register. [Note the linker assumes that the EP register contains
19772 a fixed address set to the address of the label called '__ep'.
19773 This can either be set up automatically by the linker, or
19774 specifically set by using the `--defsym __ep=<value>' command line
19778 Computes the offset of the named variable from address 0 and
19779 stores the result as a 16 bit signed value in the immediate
19780 operand field of the given instruction. For example:
19782 `movea zdaoff(_a_variable),zero,r6'
19784 puts the address of the label '_a_variable' into register 6,
19785 assuming that the label is somewhere within the first 32K of
19786 memory. (Strictly speaking it also possible to access the last
19787 32K of memory as well, as the offsets are signed).
19790 Computes the offset of the named variable from the start of the
19791 Call Table Area (whoes address is helg in system register 20, the
19792 CTBP register) and stores the result a 6 or 16 bit unsigned value
19793 in the immediate field of then given instruction or piece of data.
19796 `callt ctoff(table_func1)'
19798 will put the call the function whoes address is held in the call
19799 table at the location labeled 'table_func1'.
19802 Indicates that the following sequence of instructions is a long
19803 call to function `name'. The linker will attempt to shorten this
19804 call sequence if `name' is within a 22bit offset of the call. Only
19805 valid if the `-mrelax' command line switch has been enabled.
19808 Indicates that the following sequence of instructions is a long
19809 jump to label `name'. The linker will attempt to shorten this code
19810 sequence if `name' is within a 22bit offset of the jump. Only
19811 valid if the `-mrelax' command line switch has been enabled.
19814 For information on the V850 instruction set, see `V850 Family
19815 32-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC.
19819 File: as.info, Node: XSTORMY16-Dependent, Next: Xtensa-Dependent, Prev: V850-Dependent, Up: Machine Dependencies
19821 9.45 XStormy16 Dependent Features
19822 =================================
19826 * XStormy16 Syntax:: Syntax
19827 * XStormy16 Directives:: Machine Directives
19828 * XStormy16 Opcodes:: Pseudo-Opcodes
19831 File: as.info, Node: XStormy16 Syntax, Next: XStormy16 Directives, Up: XSTORMY16-Dependent
19838 * XStormy16-Chars:: Special Characters
19841 File: as.info, Node: XStormy16-Chars, Up: XStormy16 Syntax
19843 9.45.1.1 Special Characters
19844 ...........................
19846 `#' is the line comment character. If a `#' appears as the first
19847 character of a line, the whole line is treated as a comment, but in
19848 this case the line can also be a logical line number directive (*note
19849 Comments::) or a preprocessor control command (*note Preprocessing::).
19851 A semicolon (`;') can be used to start a comment that extends from
19852 wherever the character appears on the line up to the end of the line.
19854 The `|' character can be used to separate statements on the same
19858 File: as.info, Node: XStormy16 Directives, Next: XStormy16 Opcodes, Prev: XStormy16 Syntax, Up: XSTORMY16-Dependent
19860 9.45.2 XStormy16 Machine Directives
19861 -----------------------------------
19864 Like the `--16bit-pointers' command line option this directive
19865 indicates that the assembly code makes use of 16-bit pointers.
19868 Like the `--32bit-pointers' command line option this directive
19869 indicates that the assembly code makes use of 32-bit pointers.
19872 Like the `--no-pointers' command line option this directive
19873 indicates that the assembly code does not makes use pointers.
19877 File: as.info, Node: XStormy16 Opcodes, Prev: XStormy16 Directives, Up: XSTORMY16-Dependent
19879 9.45.3 XStormy16 Pseudo-Opcodes
19880 -------------------------------
19882 `as' implements all the standard XStormy16 opcodes.
19884 `as' also implements the following pseudo ops:
19887 Computes the lower 16 bits of the given expression and stores it
19888 into the immediate operand field of the given instruction. For
19891 `add r6, @lo(here - there)'
19893 computes the difference between the address of labels 'here' and
19894 'there', takes the lower 16 bits of this difference and adds it to
19898 Computes the higher 16 bits of the given expression and stores it
19899 into the immediate operand field of the given instruction. For
19902 `addc r7, @hi(here - there)'
19904 computes the difference between the address of labels 'here' and
19905 'there', takes the upper 16 bits of this difference, shifts it
19906 down 16 bits and then adds it, along with the carry bit, to the
19907 value in register 7.
19911 File: as.info, Node: Xtensa-Dependent, Next: Z80-Dependent, Prev: XSTORMY16-Dependent, Up: Machine Dependencies
19913 9.46 Xtensa Dependent Features
19914 ==============================
19916 This chapter covers features of the GNU assembler that are specific
19917 to the Xtensa architecture. For details about the Xtensa instruction
19918 set, please consult the `Xtensa Instruction Set Architecture (ISA)
19923 * Xtensa Options:: Command-line Options.
19924 * Xtensa Syntax:: Assembler Syntax for Xtensa Processors.
19925 * Xtensa Optimizations:: Assembler Optimizations.
19926 * Xtensa Relaxation:: Other Automatic Transformations.
19927 * Xtensa Directives:: Directives for Xtensa Processors.
19930 File: as.info, Node: Xtensa Options, Next: Xtensa Syntax, Up: Xtensa-Dependent
19932 9.46.1 Command Line Options
19933 ---------------------------
19935 `--text-section-literals | --no-text-section-literals'
19936 Control the treatment of literal pools. The default is
19937 `--no-text-section-literals', which places literals in separate
19938 sections in the output file. This allows the literal pool to be
19939 placed in a data RAM/ROM. With `--text-section-literals', the
19940 literals are interspersed in the text section in order to keep
19941 them as close as possible to their references. This may be
19942 necessary for large assembly files, where the literals would
19943 otherwise be out of range of the `L32R' instructions in the text
19944 section. These options only affect literals referenced via
19945 PC-relative `L32R' instructions; literals for absolute mode `L32R'
19946 instructions are handled separately. *Note literal: Literal
19949 `--absolute-literals | --no-absolute-literals'
19950 Indicate to the assembler whether `L32R' instructions use absolute
19951 or PC-relative addressing. If the processor includes the absolute
19952 addressing option, the default is to use absolute `L32R'
19953 relocations. Otherwise, only the PC-relative `L32R' relocations
19956 `--target-align | --no-target-align'
19957 Enable or disable automatic alignment to reduce branch penalties
19958 at some expense in code size. *Note Automatic Instruction
19959 Alignment: Xtensa Automatic Alignment. This optimization is
19960 enabled by default. Note that the assembler will always align
19961 instructions like `LOOP' that have fixed alignment requirements.
19963 `--longcalls | --no-longcalls'
19964 Enable or disable transformation of call instructions to allow
19965 calls across a greater range of addresses. *Note Function Call
19966 Relaxation: Xtensa Call Relaxation. This option should be used
19967 when call targets can potentially be out of range. It may degrade
19968 both code size and performance, but the linker can generally
19969 optimize away the unnecessary overhead when a call ends up within
19970 range. The default is `--no-longcalls'.
19972 `--transform | --no-transform'
19973 Enable or disable all assembler transformations of Xtensa
19974 instructions, including both relaxation and optimization. The
19975 default is `--transform'; `--no-transform' should only be used in
19976 the rare cases when the instructions must be exactly as specified
19977 in the assembly source. Using `--no-transform' causes out of range
19978 instruction operands to be errors.
19980 `--rename-section OLDNAME=NEWNAME'
19981 Rename the OLDNAME section to NEWNAME. This option can be used
19982 multiple times to rename multiple sections.
19985 File: as.info, Node: Xtensa Syntax, Next: Xtensa Optimizations, Prev: Xtensa Options, Up: Xtensa-Dependent
19987 9.46.2 Assembler Syntax
19988 -----------------------
19990 Block comments are delimited by `/*' and `*/'. End of line comments
19991 may be introduced with either `#' or `//'.
19993 If a `#' appears as the first character of a line then the whole
19994 line is treated as a comment, but in this case the line could also be a
19995 logical line number directive (*note Comments::) or a preprocessor
19996 control command (*note Preprocessing::).
19998 Instructions consist of a leading opcode or macro name followed by
19999 whitespace and an optional comma-separated list of operands:
20001 OPCODE [OPERAND, ...]
20003 Instructions must be separated by a newline or semicolon (`;').
20005 FLIX instructions, which bundle multiple opcodes together in a single
20006 instruction, are specified by enclosing the bundled opcodes inside
20017 The opcodes in a FLIX instruction are listed in the same order as the
20018 corresponding instruction slots in the TIE format declaration.
20019 Directives and labels are not allowed inside the braces of a FLIX
20020 instruction. A particular TIE format name can optionally be specified
20021 immediately after the opening brace, but this is usually unnecessary.
20022 The assembler will automatically search for a format that can encode the
20023 specified opcodes, so the format name need only be specified in rare
20024 cases where there is more than one applicable format and where it
20025 matters which of those formats is used. A FLIX instruction can also be
20026 specified on a single line by separating the opcodes with semicolons:
20028 { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... }
20030 If an opcode can only be encoded in a FLIX instruction but is not
20031 specified as part of a FLIX bundle, the assembler will choose the
20032 smallest format where the opcode can be encoded and will fill unused
20033 instruction slots with no-ops.
20037 * Xtensa Opcodes:: Opcode Naming Conventions.
20038 * Xtensa Registers:: Register Naming.
20041 File: as.info, Node: Xtensa Opcodes, Next: Xtensa Registers, Up: Xtensa Syntax
20043 9.46.2.1 Opcode Names
20044 .....................
20046 See the `Xtensa Instruction Set Architecture (ISA) Reference Manual'
20047 for a complete list of opcodes and descriptions of their semantics.
20049 If an opcode name is prefixed with an underscore character (`_'),
20050 `as' will not transform that instruction in any way. The underscore
20051 prefix disables both optimization (*note Xtensa Optimizations: Xtensa
20052 Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa
20053 Relaxation.) for that particular instruction. Only use the underscore
20054 prefix when it is essential to select the exact opcode produced by the
20055 assembler. Using this feature unnecessarily makes the code less
20056 efficient by disabling assembler optimization and less flexible by
20057 disabling relaxation.
20059 Note that this special handling of underscore prefixes only applies
20060 to Xtensa opcodes, not to either built-in macros or user-defined macros.
20061 When an underscore prefix is used with a macro (e.g., `_MOV'), it
20062 refers to a different macro. The assembler generally provides built-in
20063 macros both with and without the underscore prefix, where the underscore
20064 versions behave as if the underscore carries through to the instructions
20065 in the macros. For example, `_MOV' may expand to `_MOV.N'.
20067 The underscore prefix only applies to individual instructions, not to
20068 series of instructions. For example, if a series of instructions have
20069 underscore prefixes, the assembler will not transform the individual
20070 instructions, but it may insert other instructions between them (e.g.,
20071 to align a `LOOP' instruction). To prevent the assembler from
20072 modifying a series of instructions as a whole, use the `no-transform'
20073 directive. *Note transform: Transform Directive.
20076 File: as.info, Node: Xtensa Registers, Prev: Xtensa Opcodes, Up: Xtensa Syntax
20078 9.46.2.2 Register Names
20079 .......................
20081 The assembly syntax for a register file entry is the "short" name for a
20082 TIE register file followed by the index into that register file. For
20083 example, the general-purpose `AR' register file has a short name of
20084 `a', so these registers are named `a0'...`a15'. As a special feature,
20085 `sp' is also supported as a synonym for `a1'. Additional registers may
20086 be added by processor configuration options and by designer-defined TIE
20087 extensions. An initial `$' character is optional in all register names.
20090 File: as.info, Node: Xtensa Optimizations, Next: Xtensa Relaxation, Prev: Xtensa Syntax, Up: Xtensa-Dependent
20092 9.46.3 Xtensa Optimizations
20093 ---------------------------
20095 The optimizations currently supported by `as' are generation of density
20096 instructions where appropriate and automatic branch target alignment.
20100 * Density Instructions:: Using Density Instructions.
20101 * Xtensa Automatic Alignment:: Automatic Instruction Alignment.
20104 File: as.info, Node: Density Instructions, Next: Xtensa Automatic Alignment, Up: Xtensa Optimizations
20106 9.46.3.1 Using Density Instructions
20107 ...................................
20109 The Xtensa instruction set has a code density option that provides
20110 16-bit versions of some of the most commonly used opcodes. Use of these
20111 opcodes can significantly reduce code size. When possible, the
20112 assembler automatically translates instructions from the core Xtensa
20113 instruction set into equivalent instructions from the Xtensa code
20114 density option. This translation can be disabled by using underscore
20115 prefixes (*note Opcode Names: Xtensa Opcodes.), by using the
20116 `--no-transform' command-line option (*note Command Line Options:
20117 Xtensa Options.), or by using the `no-transform' directive (*note
20118 transform: Transform Directive.).
20120 It is a good idea _not_ to use the density instructions directly.
20121 The assembler will automatically select dense instructions where
20122 possible. If you later need to use an Xtensa processor without the code
20123 density option, the same assembly code will then work without
20127 File: as.info, Node: Xtensa Automatic Alignment, Prev: Density Instructions, Up: Xtensa Optimizations
20129 9.46.3.2 Automatic Instruction Alignment
20130 ........................................
20132 The Xtensa assembler will automatically align certain instructions, both
20133 to optimize performance and to satisfy architectural requirements.
20135 As an optimization to improve performance, the assembler attempts to
20136 align branch targets so they do not cross instruction fetch boundaries.
20137 (Xtensa processors can be configured with either 32-bit or 64-bit
20138 instruction fetch widths.) An instruction immediately following a call
20139 is treated as a branch target in this context, because it will be the
20140 target of a return from the call. This alignment has the potential to
20141 reduce branch penalties at some expense in code size. This
20142 optimization is enabled by default. You can disable it with the
20143 `--no-target-align' command-line option (*note Command Line Options:
20146 The target alignment optimization is done without adding instructions
20147 that could increase the execution time of the program. If there are
20148 density instructions in the code preceding a target, the assembler can
20149 change the target alignment by widening some of those instructions to
20150 the equivalent 24-bit instructions. Extra bytes of padding can be
20151 inserted immediately following unconditional jump and return
20152 instructions. This approach is usually successful in aligning many,
20153 but not all, branch targets.
20155 The `LOOP' family of instructions must be aligned such that the
20156 first instruction in the loop body does not cross an instruction fetch
20157 boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be
20158 on either a 1 or 2 mod 4 byte boundary). The assembler knows about
20159 this restriction and inserts the minimal number of 2 or 3 byte no-op
20160 instructions to satisfy it. When no-op instructions are added, any
20161 label immediately preceding the original loop will be moved in order to
20162 refer to the loop instruction, not the newly generated no-op
20163 instruction. To preserve binary compatibility across processors with
20164 different fetch widths, the assembler conservatively assumes a 32-bit
20165 fetch width when aligning `LOOP' instructions (except if the first
20166 instruction in the loop is a 64-bit instruction).
20168 Previous versions of the assembler automatically aligned `ENTRY'
20169 instructions to 4-byte boundaries, but that alignment is now the
20170 programmer's responsibility.
20173 File: as.info, Node: Xtensa Relaxation, Next: Xtensa Directives, Prev: Xtensa Optimizations, Up: Xtensa-Dependent
20175 9.46.4 Xtensa Relaxation
20176 ------------------------
20178 When an instruction operand is outside the range allowed for that
20179 particular instruction field, `as' can transform the code to use a
20180 functionally-equivalent instruction or sequence of instructions. This
20181 process is known as "relaxation". This is typically done for branch
20182 instructions because the distance of the branch targets is not known
20183 until assembly-time. The Xtensa assembler offers branch relaxation and
20184 also extends this concept to function calls, `MOVI' instructions and
20185 other instructions with immediate fields.
20189 * Xtensa Branch Relaxation:: Relaxation of Branches.
20190 * Xtensa Call Relaxation:: Relaxation of Function Calls.
20191 * Xtensa Immediate Relaxation:: Relaxation of other Immediate Fields.
20194 File: as.info, Node: Xtensa Branch Relaxation, Next: Xtensa Call Relaxation, Up: Xtensa Relaxation
20196 9.46.4.1 Conditional Branch Relaxation
20197 ......................................
20199 When the target of a branch is too far away from the branch itself,
20200 i.e., when the offset from the branch to the target is too large to fit
20201 in the immediate field of the branch instruction, it may be necessary to
20202 replace the branch with a branch around a jump. For example,
20212 (The `BNEZ.N' instruction would be used in this example only if the
20213 density option is available. Otherwise, `BNEZ' would be used.)
20215 This relaxation works well because the unconditional jump instruction
20216 has a much larger offset range than the various conditional branches.
20217 However, an error will occur if a branch target is beyond the range of a
20218 jump instruction. `as' cannot relax unconditional jumps. Similarly,
20219 an error will occur if the original input contains an unconditional
20220 jump to a target that is out of range.
20222 Branch relaxation is enabled by default. It can be disabled by using
20223 underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the
20224 `--no-transform' command-line option (*note Command Line Options:
20225 Xtensa Options.), or the `no-transform' directive (*note transform:
20226 Transform Directive.).
20229 File: as.info, Node: Xtensa Call Relaxation, Next: Xtensa Immediate Relaxation, Prev: Xtensa Branch Relaxation, Up: Xtensa Relaxation
20231 9.46.4.2 Function Call Relaxation
20232 .................................
20234 Function calls may require relaxation because the Xtensa immediate call
20235 instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a
20236 PC-relative offset of only 512 Kbytes in either direction. For larger
20237 programs, it may be necessary to use indirect calls (`CALLX0',
20238 `CALLX4', `CALLX8' and `CALLX12') where the target address is specified
20239 in a register. The Xtensa assembler can automatically relax immediate
20240 call instructions into indirect call instructions. This relaxation is
20241 done by loading the address of the called function into the callee's
20242 return address register and then using a `CALLX' instruction. So, for
20247 might be relaxed to:
20253 Because the addresses of targets of function calls are not generally
20254 known until link-time, the assembler must assume the worst and relax all
20255 the calls to functions in other source files, not just those that really
20256 will be out of range. The linker can recognize calls that were
20257 unnecessarily relaxed, and it will remove the overhead introduced by the
20258 assembler for those cases where direct calls are sufficient.
20260 Call relaxation is disabled by default because it can have a negative
20261 effect on both code size and performance, although the linker can
20262 usually eliminate the unnecessary overhead. If a program is too large
20263 and some of the calls are out of range, function call relaxation can be
20264 enabled using the `--longcalls' command-line option or the `longcalls'
20265 directive (*note longcalls: Longcalls Directive.).
20268 File: as.info, Node: Xtensa Immediate Relaxation, Prev: Xtensa Call Relaxation, Up: Xtensa Relaxation
20270 9.46.4.3 Other Immediate Field Relaxation
20271 .........................................
20273 The assembler normally performs the following other relaxations. They
20274 can be disabled by using underscore prefixes (*note Opcode Names:
20275 Xtensa Opcodes.), the `--no-transform' command-line option (*note
20276 Command Line Options: Xtensa Options.), or the `no-transform' directive
20277 (*note transform: Transform Directive.).
20279 The `MOVI' machine instruction can only materialize values in the
20280 range from -2048 to 2047. Values outside this range are best
20281 materialized with `L32R' instructions. Thus:
20285 is assembled into the following machine code:
20287 .literal .L1, 100000
20290 The `L8UI' machine instruction can only be used with immediate
20291 offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine
20292 instructions can only be used with offsets from 0 to 510. The `L32I'
20293 machine instruction can only be used with offsets from 0 to 1020. A
20294 load offset outside these ranges can be materialized with an `L32R'
20295 instruction if the destination register of the load is different than
20296 the source address register. For example:
20307 If the load destination and source address register are the same, an
20308 out-of-range offset causes an error.
20310 The Xtensa `ADDI' instruction only allows immediate operands in the
20311 range from -128 to 127. There are a number of alternate instruction
20312 sequences for the `ADDI' operation. First, if the immediate is 0, the
20313 `ADDI' will be turned into a `MOV.N' instruction (or the equivalent
20314 `OR' instruction if the code density option is not available). If the
20315 `ADDI' immediate is outside of the range -128 to 127, but inside the
20316 range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI'
20317 sequence will be used. Finally, if the immediate is outside of this
20318 range and a free register is available, an `L32R'/`ADD' sequence will
20319 be used with a literal allocated from the literal pool.
20328 is assembled into the following:
20330 .literal .L1, 50000
20332 addmi a5, a6, 0x200
20333 addmi a5, a6, 0x200
20339 File: as.info, Node: Xtensa Directives, Prev: Xtensa Relaxation, Up: Xtensa-Dependent
20344 The Xtensa assembler supports a region-based directive syntax:
20346 .begin DIRECTIVE [OPTIONS]
20350 All the Xtensa-specific directives that apply to a region of code use
20353 The directive applies to code between the `.begin' and the `.end'.
20354 The state of the option after the `.end' reverts to what it was before
20355 the `.begin'. A nested `.begin'/`.end' region can further change the
20356 state of the directive without having to be aware of its outer state.
20357 For example, consider:
20359 .begin no-transform
20367 The `ADD' opcodes at `L' and `N' in the outer `no-transform' region
20368 both result in `ADD' machine instructions, but the assembler selects an
20369 `ADD.N' instruction for the `ADD' at `M' in the inner `transform'
20372 The advantage of this style is that it works well inside macros
20373 which can preserve the context of their callers.
20375 The following directives are available:
20379 * Schedule Directive:: Enable instruction scheduling.
20380 * Longcalls Directive:: Use Indirect Calls for Greater Range.
20381 * Transform Directive:: Disable All Assembler Transformations.
20382 * Literal Directive:: Intermix Literals with Instructions.
20383 * Literal Position Directive:: Specify Inline Literal Pool Locations.
20384 * Literal Prefix Directive:: Specify Literal Section Name Prefix.
20385 * Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals.
20388 File: as.info, Node: Schedule Directive, Next: Longcalls Directive, Up: Xtensa Directives
20393 The `schedule' directive is recognized only for compatibility with
20394 Tensilica's assembler.
20396 .begin [no-]schedule
20399 This directive is ignored and has no effect on `as'.
20402 File: as.info, Node: Longcalls Directive, Next: Transform Directive, Prev: Schedule Directive, Up: Xtensa Directives
20407 The `longcalls' directive enables or disables function call relaxation.
20408 *Note Function Call Relaxation: Xtensa Call Relaxation.
20410 .begin [no-]longcalls
20411 .end [no-]longcalls
20413 Call relaxation is disabled by default unless the `--longcalls'
20414 command-line option is specified. The `longcalls' directive overrides
20415 the default determined by the command-line options.
20418 File: as.info, Node: Transform Directive, Next: Literal Directive, Prev: Longcalls Directive, Up: Xtensa Directives
20423 This directive enables or disables all assembler transformation,
20424 including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and
20425 optimization (*note Xtensa Optimizations: Xtensa Optimizations.).
20427 .begin [no-]transform
20428 .end [no-]transform
20430 Transformations are enabled by default unless the `--no-transform'
20431 option is used. The `transform' directive overrides the default
20432 determined by the command-line options. An underscore opcode prefix,
20433 disabling transformation of that opcode, always takes precedence over
20434 both directives and command-line flags.
20437 File: as.info, Node: Literal Directive, Next: Literal Position Directive, Prev: Transform Directive, Up: Xtensa Directives
20442 The `.literal' directive is used to define literal pool data, i.e.,
20443 read-only 32-bit data accessed via `L32R' instructions.
20445 .literal LABEL, VALUE[, VALUE...]
20447 This directive is similar to the standard `.word' directive, except
20448 that the actual location of the literal data is determined by the
20449 assembler and linker, not by the position of the `.literal' directive.
20450 Using this directive gives the assembler freedom to locate the literal
20451 data in the most appropriate place and possibly to combine identical
20452 literals. For example, the code:
20458 can be used to load a pointer to the symbol `sym' into register
20459 `a4'. The value of `sym' will not be placed between the `ENTRY' and
20460 `L32R' instructions; instead, the assembler puts the data in a literal
20463 Literal pools are placed by default in separate literal sections;
20464 however, when using the `--text-section-literals' option (*note Command
20465 Line Options: Xtensa Options.), the literal pools for PC-relative mode
20466 `L32R' instructions are placed in the current section.(1) These text
20467 section literal pools are created automatically before `ENTRY'
20468 instructions and manually after `.literal_position' directives (*note
20469 literal_position: Literal Position Directive.). If there are no
20470 preceding `ENTRY' instructions, explicit `.literal_position' directives
20471 must be used to place the text section literal pools; otherwise, `as'
20472 will report an error.
20474 When literals are placed in separate sections, the literal section
20475 names are derived from the names of the sections where the literals are
20476 defined. The base literal section names are `.literal' for PC-relative
20477 mode `L32R' instructions and `.lit4' for absolute mode `L32R'
20478 instructions (*note absolute-literals: Absolute Literals Directive.).
20479 These base names are used for literals defined in the default `.text'
20480 section. For literals defined in other sections or within the scope of
20481 a `literal_prefix' directive (*note literal_prefix: Literal Prefix
20482 Directive.), the following rules determine the literal section name:
20484 1. If the current section is a member of a section group, the literal
20485 section name includes the group name as a suffix to the base
20486 `.literal' or `.lit4' name, with a period to separate the base
20487 name and group name. The literal section is also made a member of
20490 2. If the current section name (or `literal_prefix' value) begins with
20491 "`.gnu.linkonce.KIND.'", the literal section name is formed by
20492 replacing "`.KIND'" with the base `.literal' or `.lit4' name. For
20493 example, for literals defined in a section named
20494 `.gnu.linkonce.t.func', the literal section will be
20495 `.gnu.linkonce.literal.func' or `.gnu.linkonce.lit4.func'.
20497 3. If the current section name (or `literal_prefix' value) ends with
20498 `.text', the literal section name is formed by replacing that
20499 suffix with the base `.literal' or `.lit4' name. For example, for
20500 literals defined in a section named `.iram0.text', the literal
20501 section will be `.iram0.literal' or `.iram0.lit4'.
20503 4. If none of the preceding conditions apply, the literal section
20504 name is formed by adding the base `.literal' or `.lit4' name as a
20505 suffix to the current section name (or `literal_prefix' value).
20507 ---------- Footnotes ----------
20509 (1) Literals for the `.init' and `.fini' sections are always placed
20510 in separate sections, even when `--text-section-literals' is enabled.
20513 File: as.info, Node: Literal Position Directive, Next: Literal Prefix Directive, Prev: Literal Directive, Up: Xtensa Directives
20515 9.46.5.5 literal_position
20516 .........................
20518 When using `--text-section-literals' to place literals inline in the
20519 section being assembled, the `.literal_position' directive can be used
20520 to mark a potential location for a literal pool.
20524 The `.literal_position' directive is ignored when the
20525 `--text-section-literals' option is not used or when `L32R'
20526 instructions use the absolute addressing mode.
20528 The assembler will automatically place text section literal pools
20529 before `ENTRY' instructions, so the `.literal_position' directive is
20530 only needed to specify some other location for a literal pool. You may
20531 need to add an explicit jump instruction to skip over an inline literal
20534 For example, an interrupt vector does not begin with an `ENTRY'
20535 instruction so the assembler will be unable to automatically find a good
20536 place to put a literal pool. Moreover, the code for the interrupt
20537 vector must be at a specific starting address, so the literal pool
20538 cannot come before the start of the code. The literal pool for the
20539 vector must be explicitly positioned in the middle of the vector (before
20540 any uses of the literals, due to the negative offsets used by
20541 PC-relative `L32R' instructions). The `.literal_position' directive
20542 can be used to do this. In the following code, the literal for `M'
20543 will automatically be aligned correctly and is placed after the
20544 unconditional jump.
20555 File: as.info, Node: Literal Prefix Directive, Next: Absolute Literals Directive, Prev: Literal Position Directive, Up: Xtensa Directives
20557 9.46.5.6 literal_prefix
20558 .......................
20560 The `literal_prefix' directive allows you to override the default
20561 literal section names, which are derived from the names of the sections
20562 where the literals are defined.
20564 .begin literal_prefix [NAME]
20565 .end literal_prefix
20567 For literals defined within the delimited region, the literal section
20568 names are derived from the NAME argument instead of the name of the
20569 current section. The rules used to derive the literal section names do
20570 not change. *Note literal: Literal Directive. If the NAME argument is
20571 omitted, the literal sections revert to the defaults. This directive
20572 has no effect when using the `--text-section-literals' option (*note
20573 Command Line Options: Xtensa Options.).
20576 File: as.info, Node: Absolute Literals Directive, Prev: Literal Prefix Directive, Up: Xtensa Directives
20578 9.46.5.7 absolute-literals
20579 ..........................
20581 The `absolute-literals' and `no-absolute-literals' directives control
20582 the absolute vs. PC-relative mode for `L32R' instructions. These are
20583 relevant only for Xtensa configurations that include the absolute
20584 addressing option for `L32R' instructions.
20586 .begin [no-]absolute-literals
20587 .end [no-]absolute-literals
20589 These directives do not change the `L32R' mode--they only cause the
20590 assembler to emit the appropriate kind of relocation for `L32R'
20591 instructions and to place the literal values in the appropriate section.
20592 To change the `L32R' mode, the program must write the `LITBASE' special
20593 register. It is the programmer's responsibility to keep track of the
20594 mode and indicate to the assembler which mode is used in each region of
20597 If the Xtensa configuration includes the absolute `L32R' addressing
20598 option, the default is to assume absolute `L32R' addressing unless the
20599 `--no-absolute-literals' command-line option is specified. Otherwise,
20600 the default is to assume PC-relative `L32R' addressing. The
20601 `absolute-literals' directive can then be used to override the default
20602 determined by the command-line options.
20605 File: as.info, Node: Reporting Bugs, Next: Acknowledgements, Prev: Machine Dependencies, Up: Top
20610 Your bug reports play an essential role in making `as' reliable.
20612 Reporting a bug may help you by bringing a solution to your problem,
20613 or it may not. But in any case the principal function of a bug report
20614 is to help the entire community by making the next version of `as' work
20615 better. Bug reports are your contribution to the maintenance of `as'.
20617 In order for a bug report to serve its purpose, you must include the
20618 information that enables us to fix the bug.
20622 * Bug Criteria:: Have you found a bug?
20623 * Bug Reporting:: How to report bugs
20626 File: as.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs
20628 10.1 Have You Found a Bug?
20629 ==========================
20631 If you are not sure whether you have found a bug, here are some
20634 * If the assembler gets a fatal signal, for any input whatever, that
20635 is a `as' bug. Reliable assemblers never crash.
20637 * If `as' produces an error message for valid input, that is a bug.
20639 * If `as' does not produce an error message for invalid input, that
20640 is a bug. However, you should note that your idea of "invalid
20641 input" might be our idea of "an extension" or "support for
20642 traditional practice".
20644 * If you are an experienced user of assemblers, your suggestions for
20645 improvement of `as' are welcome in any case.
20648 File: as.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs
20650 10.2 How to Report Bugs
20651 =======================
20653 A number of companies and individuals offer support for GNU products.
20654 If you obtained `as' from a support organization, we recommend you
20655 contact that organization first.
20657 You can find contact information for many support companies and
20658 individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
20660 In any event, we also recommend that you send bug reports for `as'
20661 to `http://www.sourceware.org/bugzilla/'.
20663 The fundamental principle of reporting bugs usefully is this:
20664 *report all the facts*. If you are not sure whether to state a fact or
20665 leave it out, state it!
20667 Often people omit facts because they think they know what causes the
20668 problem and assume that some details do not matter. Thus, you might
20669 assume that the name of a symbol you use in an example does not matter.
20670 Well, probably it does not, but one cannot be sure. Perhaps the bug
20671 is a stray memory reference which happens to fetch from the location
20672 where that name is stored in memory; perhaps, if the name were
20673 different, the contents of that location would fool the assembler into
20674 doing the right thing despite the bug. Play it safe and give a
20675 specific, complete example. That is the easiest thing for you to do,
20676 and the most helpful.
20678 Keep in mind that the purpose of a bug report is to enable us to fix
20679 the bug if it is new to us. Therefore, always write your bug reports
20680 on the assumption that the bug has not been reported previously.
20682 Sometimes people give a few sketchy facts and ask, "Does this ring a
20683 bell?" This cannot help us fix a bug, so it is basically useless. We
20684 respond by asking for enough details to enable us to investigate. You
20685 might as well expedite matters by sending them to begin with.
20687 To enable us to fix the bug, you should include all these things:
20689 * The version of `as'. `as' announces it if you start it with the
20690 `--version' argument.
20692 Without this, we will not know whether there is any point in
20693 looking for the bug in the current version of `as'.
20695 * Any patches you may have applied to the `as' source.
20697 * The type of machine you are using, and the operating system name
20698 and version number.
20700 * What compiler (and its version) was used to compile `as'--e.g.
20703 * The command arguments you gave the assembler to assemble your
20704 example and observe the bug. To guarantee you will not omit
20705 something important, list them all. A copy of the Makefile (or
20706 the output from make) is sufficient.
20708 If we were to try to guess the arguments, we would probably guess
20709 wrong and then we might not encounter the bug.
20711 * A complete input file that will reproduce the bug. If the bug is
20712 observed when the assembler is invoked via a compiler, send the
20713 assembler source, not the high level language source. Most
20714 compilers will produce the assembler source when run with the `-S'
20715 option. If you are using `gcc', use the options `-v
20716 --save-temps'; this will save the assembler source in a file with
20717 an extension of `.s', and also show you exactly how `as' is being
20720 * A description of what behavior you observe that you believe is
20721 incorrect. For example, "It gets a fatal signal."
20723 Of course, if the bug is that `as' gets a fatal signal, then we
20724 will certainly notice it. But if the bug is incorrect output, we
20725 might not notice unless it is glaringly wrong. You might as well
20726 not give us a chance to make a mistake.
20728 Even if the problem you experience is a fatal signal, you should
20729 still say so explicitly. Suppose something strange is going on,
20730 such as, your copy of `as' is out of sync, or you have encountered
20731 a bug in the C library on your system. (This has happened!) Your
20732 copy might crash and ours would not. If you told us to expect a
20733 crash, then when ours fails to crash, we would know that the bug
20734 was not happening for us. If you had not told us to expect a
20735 crash, then we would not be able to draw any conclusion from our
20738 * If you wish to suggest changes to the `as' source, send us context
20739 diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
20740 Always send diffs from the old file to the new file. If you even
20741 discuss something in the `as' source, refer to it by context, not
20744 The line numbers in our development sources will not match those
20745 in your sources. Your line numbers would convey no useful
20748 Here are some things that are not necessary:
20750 * A description of the envelope of the bug.
20752 Often people who encounter a bug spend a lot of time investigating
20753 which changes to the input file will make the bug go away and which
20754 changes will not affect it.
20756 This is often time consuming and not very useful, because the way
20757 we will find the bug is by running a single example under the
20758 debugger with breakpoints, not by pure deduction from a series of
20759 examples. We recommend that you save your time for something else.
20761 Of course, if you can find a simpler example to report _instead_
20762 of the original one, that is a convenience for us. Errors in the
20763 output will be easier to spot, running under the debugger will take
20764 less time, and so on.
20766 However, simplification is not vital; if you do not want to do
20767 this, report the bug anyway and send us the entire test case you
20770 * A patch for the bug.
20772 A patch for the bug does help us if it is a good one. But do not
20773 omit the necessary information, such as the test case, on the
20774 assumption that a patch is all we need. We might see problems
20775 with your patch and decide to fix the problem another way, or we
20776 might not understand it at all.
20778 Sometimes with a program as complicated as `as' it is very hard to
20779 construct an example that will make the program follow a certain
20780 path through the code. If you do not send us the example, we will
20781 not be able to construct one, so we will not be able to verify
20782 that the bug is fixed.
20784 And if we cannot understand what bug you are trying to fix, or why
20785 your patch should be an improvement, we will not install it. A
20786 test case will help us to understand.
20788 * A guess about what the bug is or what it depends on.
20790 Such guesses are usually wrong. Even we cannot guess right about
20791 such things without first using the debugger to find the facts.
20794 File: as.info, Node: Acknowledgements, Next: GNU Free Documentation License, Prev: Reporting Bugs, Up: Top
20796 11 Acknowledgements
20797 *******************
20799 If you have contributed to GAS and your name isn't listed here, it is
20800 not meant as a slight. We just don't know about it. Send mail to the
20801 maintainer, and we'll correct the situation. Currently the maintainer
20802 is Ken Raeburn (email address `raeburn@cygnus.com').
20804 Dean Elsner wrote the original GNU assembler for the VAX.(1)
20806 Jay Fenlason maintained GAS for a while, adding support for
20807 GDB-specific debug information and the 68k series machines, most of the
20808 preprocessing pass, and extensive changes in `messages.c',
20809 `input-file.c', `write.c'.
20811 K. Richard Pixley maintained GAS for a while, adding various
20812 enhancements and many bug fixes, including merging support for several
20813 processors, breaking GAS up to handle multiple object file format back
20814 ends (including heavy rewrite, testing, an integration of the coff and
20815 b.out back ends), adding configuration including heavy testing and
20816 verification of cross assemblers and file splits and renaming,
20817 converted GAS to strictly ANSI C including full prototypes, added
20818 support for m680[34]0 and cpu32, did considerable work on i960
20819 including a COFF port (including considerable amounts of reverse
20820 engineering), a SPARC opcode file rewrite, DECstation, rs6000, and
20821 hp300hpux host ports, updated "know" assertions and made them work,
20822 much other reorganization, cleanup, and lint.
20824 Ken Raeburn wrote the high-level BFD interface code to replace most
20825 of the code in format-specific I/O modules.
20827 The original VMS support was contributed by David L. Kashtan. Eric
20828 Youngdale has done much work with it since.
20830 The Intel 80386 machine description was written by Eliot Dresselhaus.
20832 Minh Tran-Le at IntelliCorp contributed some AIX 386 support.
20834 The Motorola 88k machine description was contributed by Devon Bowen
20835 of Buffalo University and Torbjorn Granlund of the Swedish Institute of
20838 Keith Knowles at the Open Software Foundation wrote the original
20839 MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format
20840 support (which hasn't been merged in yet). Ralph Campbell worked with
20841 the MIPS code to support a.out format.
20843 Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k,
20844 tc-h8300), and IEEE 695 object file format (obj-ieee), was written by
20845 Steve Chamberlain of Cygnus Support. Steve also modified the COFF back
20846 end to use BFD for some low-level operations, for use with the H8/300
20847 and AMD 29k targets.
20849 John Gilmore built the AMD 29000 support, added `.include' support,
20850 and simplified the configuration of which versions accept which
20851 directives. He updated the 68k machine description so that Motorola's
20852 opcodes always produced fixed-size instructions (e.g., `jsr'), while
20853 synthetic instructions remained shrinkable (`jbsr'). John fixed many
20854 bugs, including true tested cross-compilation support, and one bug in
20855 relaxation that took a week and required the proverbial one-bit fix.
20857 Ian Lance Taylor of Cygnus Support merged the Motorola and MIT
20858 syntax for the 68k, completed support for some COFF targets (68k, i386
20859 SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets,
20860 wrote the initial RS/6000 and PowerPC assembler, and made a few other
20863 Steve Chamberlain made GAS able to generate listings.
20865 Hewlett-Packard contributed support for the HP9000/300.
20867 Jeff Law wrote GAS and BFD support for the native HPPA object format
20868 (SOM) along with a fairly extensive HPPA testsuite (for both SOM and
20869 ELF object formats). This work was supported by both the Center for
20870 Software Science at the University of Utah and Cygnus Support.
20872 Support for ELF format files has been worked on by Mark Eichin of
20873 Cygnus Support (original, incomplete implementation for SPARC), Pete
20874 Hoogenboom and Jeff Law at the University of Utah (HPPA mainly),
20875 Michael Meissner of the Open Software Foundation (i386 mainly), and Ken
20876 Raeburn of Cygnus Support (sparc, and some initial 64-bit support).
20878 Linas Vepstas added GAS support for the ESA/390 "IBM 370"
20881 Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote
20882 GAS and BFD support for openVMS/Alpha.
20884 Timothy Wall, Michael Hayes, and Greg Smart contributed to the
20885 various tic* flavors.
20887 David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from
20888 Tensilica, Inc. added support for Xtensa processors.
20890 Several engineers at Cygnus Support have also provided many small
20891 bug fixes and configuration enhancements.
20893 Jon Beniston added support for the Lattice Mico32 architecture.
20895 Many others have contributed large or small bugfixes and
20896 enhancements. If you have contributed significant work and are not
20897 mentioned on this list, and want to be, let us know. Some of the
20898 history has been lost; we are not intentionally leaving anyone out.
20900 ---------- Footnotes ----------
20902 (1) Any more details?
20905 File: as.info, Node: GNU Free Documentation License, Next: AS Index, Prev: Acknowledgements, Up: Top
20907 Appendix A GNU Free Documentation License
20908 *****************************************
20910 Version 1.3, 3 November 2008
20912 Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
20915 Everyone is permitted to copy and distribute verbatim copies
20916 of this license document, but changing it is not allowed.
20920 The purpose of this License is to make a manual, textbook, or other
20921 functional and useful document "free" in the sense of freedom: to
20922 assure everyone the effective freedom to copy and redistribute it,
20923 with or without modifying it, either commercially or
20924 noncommercially. Secondarily, this License preserves for the
20925 author and publisher a way to get credit for their work, while not
20926 being considered responsible for modifications made by others.
20928 This License is a kind of "copyleft", which means that derivative
20929 works of the document must themselves be free in the same sense.
20930 It complements the GNU General Public License, which is a copyleft
20931 license designed for free software.
20933 We have designed this License in order to use it for manuals for
20934 free software, because free software needs free documentation: a
20935 free program should come with manuals providing the same freedoms
20936 that the software does. But this License is not limited to
20937 software manuals; it can be used for any textual work, regardless
20938 of subject matter or whether it is published as a printed book.
20939 We recommend this License principally for works whose purpose is
20940 instruction or reference.
20942 1. APPLICABILITY AND DEFINITIONS
20944 This License applies to any manual or other work, in any medium,
20945 that contains a notice placed by the copyright holder saying it
20946 can be distributed under the terms of this License. Such a notice
20947 grants a world-wide, royalty-free license, unlimited in duration,
20948 to use that work under the conditions stated herein. The
20949 "Document", below, refers to any such manual or work. Any member
20950 of the public is a licensee, and is addressed as "you". You
20951 accept the license if you copy, modify or distribute the work in a
20952 way requiring permission under copyright law.
20954 A "Modified Version" of the Document means any work containing the
20955 Document or a portion of it, either copied verbatim, or with
20956 modifications and/or translated into another language.
20958 A "Secondary Section" is a named appendix or a front-matter section
20959 of the Document that deals exclusively with the relationship of the
20960 publishers or authors of the Document to the Document's overall
20961 subject (or to related matters) and contains nothing that could
20962 fall directly within that overall subject. (Thus, if the Document
20963 is in part a textbook of mathematics, a Secondary Section may not
20964 explain any mathematics.) The relationship could be a matter of
20965 historical connection with the subject or with related matters, or
20966 of legal, commercial, philosophical, ethical or political position
20969 The "Invariant Sections" are certain Secondary Sections whose
20970 titles are designated, as being those of Invariant Sections, in
20971 the notice that says that the Document is released under this
20972 License. If a section does not fit the above definition of
20973 Secondary then it is not allowed to be designated as Invariant.
20974 The Document may contain zero Invariant Sections. If the Document
20975 does not identify any Invariant Sections then there are none.
20977 The "Cover Texts" are certain short passages of text that are
20978 listed, as Front-Cover Texts or Back-Cover Texts, in the notice
20979 that says that the Document is released under this License. A
20980 Front-Cover Text may be at most 5 words, and a Back-Cover Text may
20981 be at most 25 words.
20983 A "Transparent" copy of the Document means a machine-readable copy,
20984 represented in a format whose specification is available to the
20985 general public, that is suitable for revising the document
20986 straightforwardly with generic text editors or (for images
20987 composed of pixels) generic paint programs or (for drawings) some
20988 widely available drawing editor, and that is suitable for input to
20989 text formatters or for automatic translation to a variety of
20990 formats suitable for input to text formatters. A copy made in an
20991 otherwise Transparent file format whose markup, or absence of
20992 markup, has been arranged to thwart or discourage subsequent
20993 modification by readers is not Transparent. An image format is
20994 not Transparent if used for any substantial amount of text. A
20995 copy that is not "Transparent" is called "Opaque".
20997 Examples of suitable formats for Transparent copies include plain
20998 ASCII without markup, Texinfo input format, LaTeX input format,
20999 SGML or XML using a publicly available DTD, and
21000 standard-conforming simple HTML, PostScript or PDF designed for
21001 human modification. Examples of transparent image formats include
21002 PNG, XCF and JPG. Opaque formats include proprietary formats that
21003 can be read and edited only by proprietary word processors, SGML or
21004 XML for which the DTD and/or processing tools are not generally
21005 available, and the machine-generated HTML, PostScript or PDF
21006 produced by some word processors for output purposes only.
21008 The "Title Page" means, for a printed book, the title page itself,
21009 plus such following pages as are needed to hold, legibly, the
21010 material this License requires to appear in the title page. For
21011 works in formats which do not have any title page as such, "Title
21012 Page" means the text near the most prominent appearance of the
21013 work's title, preceding the beginning of the body of the text.
21015 The "publisher" means any person or entity that distributes copies
21016 of the Document to the public.
21018 A section "Entitled XYZ" means a named subunit of the Document
21019 whose title either is precisely XYZ or contains XYZ in parentheses
21020 following text that translates XYZ in another language. (Here XYZ
21021 stands for a specific section name mentioned below, such as
21022 "Acknowledgements", "Dedications", "Endorsements", or "History".)
21023 To "Preserve the Title" of such a section when you modify the
21024 Document means that it remains a section "Entitled XYZ" according
21025 to this definition.
21027 The Document may include Warranty Disclaimers next to the notice
21028 which states that this License applies to the Document. These
21029 Warranty Disclaimers are considered to be included by reference in
21030 this License, but only as regards disclaiming warranties: any other
21031 implication that these Warranty Disclaimers may have is void and
21032 has no effect on the meaning of this License.
21034 2. VERBATIM COPYING
21036 You may copy and distribute the Document in any medium, either
21037 commercially or noncommercially, provided that this License, the
21038 copyright notices, and the license notice saying this License
21039 applies to the Document are reproduced in all copies, and that you
21040 add no other conditions whatsoever to those of this License. You
21041 may not use technical measures to obstruct or control the reading
21042 or further copying of the copies you make or distribute. However,
21043 you may accept compensation in exchange for copies. If you
21044 distribute a large enough number of copies you must also follow
21045 the conditions in section 3.
21047 You may also lend copies, under the same conditions stated above,
21048 and you may publicly display copies.
21050 3. COPYING IN QUANTITY
21052 If you publish printed copies (or copies in media that commonly
21053 have printed covers) of the Document, numbering more than 100, and
21054 the Document's license notice requires Cover Texts, you must
21055 enclose the copies in covers that carry, clearly and legibly, all
21056 these Cover Texts: Front-Cover Texts on the front cover, and
21057 Back-Cover Texts on the back cover. Both covers must also clearly
21058 and legibly identify you as the publisher of these copies. The
21059 front cover must present the full title with all words of the
21060 title equally prominent and visible. You may add other material
21061 on the covers in addition. Copying with changes limited to the
21062 covers, as long as they preserve the title of the Document and
21063 satisfy these conditions, can be treated as verbatim copying in
21066 If the required texts for either cover are too voluminous to fit
21067 legibly, you should put the first ones listed (as many as fit
21068 reasonably) on the actual cover, and continue the rest onto
21071 If you publish or distribute Opaque copies of the Document
21072 numbering more than 100, you must either include a
21073 machine-readable Transparent copy along with each Opaque copy, or
21074 state in or with each Opaque copy a computer-network location from
21075 which the general network-using public has access to download
21076 using public-standard network protocols a complete Transparent
21077 copy of the Document, free of added material. If you use the
21078 latter option, you must take reasonably prudent steps, when you
21079 begin distribution of Opaque copies in quantity, to ensure that
21080 this Transparent copy will remain thus accessible at the stated
21081 location until at least one year after the last time you
21082 distribute an Opaque copy (directly or through your agents or
21083 retailers) of that edition to the public.
21085 It is requested, but not required, that you contact the authors of
21086 the Document well before redistributing any large number of
21087 copies, to give them a chance to provide you with an updated
21088 version of the Document.
21092 You may copy and distribute a Modified Version of the Document
21093 under the conditions of sections 2 and 3 above, provided that you
21094 release the Modified Version under precisely this License, with
21095 the Modified Version filling the role of the Document, thus
21096 licensing distribution and modification of the Modified Version to
21097 whoever possesses a copy of it. In addition, you must do these
21098 things in the Modified Version:
21100 A. Use in the Title Page (and on the covers, if any) a title
21101 distinct from that of the Document, and from those of
21102 previous versions (which should, if there were any, be listed
21103 in the History section of the Document). You may use the
21104 same title as a previous version if the original publisher of
21105 that version gives permission.
21107 B. List on the Title Page, as authors, one or more persons or
21108 entities responsible for authorship of the modifications in
21109 the Modified Version, together with at least five of the
21110 principal authors of the Document (all of its principal
21111 authors, if it has fewer than five), unless they release you
21112 from this requirement.
21114 C. State on the Title page the name of the publisher of the
21115 Modified Version, as the publisher.
21117 D. Preserve all the copyright notices of the Document.
21119 E. Add an appropriate copyright notice for your modifications
21120 adjacent to the other copyright notices.
21122 F. Include, immediately after the copyright notices, a license
21123 notice giving the public permission to use the Modified
21124 Version under the terms of this License, in the form shown in
21125 the Addendum below.
21127 G. Preserve in that license notice the full lists of Invariant
21128 Sections and required Cover Texts given in the Document's
21131 H. Include an unaltered copy of this License.
21133 I. Preserve the section Entitled "History", Preserve its Title,
21134 and add to it an item stating at least the title, year, new
21135 authors, and publisher of the Modified Version as given on
21136 the Title Page. If there is no section Entitled "History" in
21137 the Document, create one stating the title, year, authors,
21138 and publisher of the Document as given on its Title Page,
21139 then add an item describing the Modified Version as stated in
21140 the previous sentence.
21142 J. Preserve the network location, if any, given in the Document
21143 for public access to a Transparent copy of the Document, and
21144 likewise the network locations given in the Document for
21145 previous versions it was based on. These may be placed in
21146 the "History" section. You may omit a network location for a
21147 work that was published at least four years before the
21148 Document itself, or if the original publisher of the version
21149 it refers to gives permission.
21151 K. For any section Entitled "Acknowledgements" or "Dedications",
21152 Preserve the Title of the section, and preserve in the
21153 section all the substance and tone of each of the contributor
21154 acknowledgements and/or dedications given therein.
21156 L. Preserve all the Invariant Sections of the Document,
21157 unaltered in their text and in their titles. Section numbers
21158 or the equivalent are not considered part of the section
21161 M. Delete any section Entitled "Endorsements". Such a section
21162 may not be included in the Modified Version.
21164 N. Do not retitle any existing section to be Entitled
21165 "Endorsements" or to conflict in title with any Invariant
21168 O. Preserve any Warranty Disclaimers.
21170 If the Modified Version includes new front-matter sections or
21171 appendices that qualify as Secondary Sections and contain no
21172 material copied from the Document, you may at your option
21173 designate some or all of these sections as invariant. To do this,
21174 add their titles to the list of Invariant Sections in the Modified
21175 Version's license notice. These titles must be distinct from any
21176 other section titles.
21178 You may add a section Entitled "Endorsements", provided it contains
21179 nothing but endorsements of your Modified Version by various
21180 parties--for example, statements of peer review or that the text
21181 has been approved by an organization as the authoritative
21182 definition of a standard.
21184 You may add a passage of up to five words as a Front-Cover Text,
21185 and a passage of up to 25 words as a Back-Cover Text, to the end
21186 of the list of Cover Texts in the Modified Version. Only one
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21195 The author(s) and publisher(s) of the Document do not by this
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21199 5. COMBINING DOCUMENTS
21201 You may combine the Document with other documents released under
21202 this License, under the terms defined in section 4 above for
21203 modified versions, provided that you include in the combination
21204 all of the Invariant Sections of all of the original documents,
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21225 6. COLLECTIONS OF DOCUMENTS
21227 You may make a collection consisting of the Document and other
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21240 7. AGGREGATION WITH INDEPENDENT WORKS
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21261 Translation is considered a kind of modification, so you may
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21270 original versions of those notices and disclaimers. In case of a
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21275 If a section in the Document is Entitled "Acknowledgements",
21276 "Dedications", or "History", the requirement (section 4) to
21277 Preserve its Title (section 1) will typically require changing the
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21294 Moreover, your license from a particular copyright holder is
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21301 Termination of your rights under this section does not terminate
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21305 the same material does not give you any rights to use it.
21307 10. FUTURE REVISIONS OF THIS LICENSE
21309 The Free Software Foundation may publish new, revised versions of
21310 the GNU Free Documentation License from time to time. Such new
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21330 "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
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21339 license published by Creative Commons Corporation, a not-for-profit
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21344 "Incorporate" means to publish or republish a Document, in whole or
21345 in part, as part of another Document.
21347 An MMC is "eligible for relicensing" if it is licensed under this
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21350 incorporated in whole or in part into the MMC, (1) had no cover
21351 texts or invariant sections, and (2) were thus incorporated prior
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21354 The operator of an MMC Site may republish an MMC contained in the
21355 site under CC-BY-SA on the same site at any time before August 1,
21356 2009, provided the MMC is eligible for relicensing.
21359 ADDENDUM: How to use this License for your documents
21360 ====================================================
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21364 notices just after the title page:
21366 Copyright (C) YEAR YOUR NAME.
21367 Permission is granted to copy, distribute and/or modify this document
21368 under the terms of the GNU Free Documentation License, Version 1.3
21369 or any later version published by the Free Software Foundation;
21370 with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
21371 Texts. A copy of the license is included in the section entitled ``GNU
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21374 If you have Invariant Sections, Front-Cover Texts and Back-Cover
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21388 permit their use in free software.
21391 File: as.info, Node: AS Index, Prev: GNU Free Documentation License, Up: Top
21399 * #: Comments. (line 33)
21400 * #APP: Preprocessing. (line 27)
21401 * #NO_APP: Preprocessing. (line 27)
21402 * $ in symbol names <1>: D10V-Chars. (line 53)
21403 * $ in symbol names <2>: SH64-Chars. (line 15)
21404 * $ in symbol names <3>: D30V-Chars. (line 70)
21405 * $ in symbol names: SH-Chars. (line 15)
21406 * $a: ARM Mapping Symbols. (line 9)
21407 * $acos math builtin, TIC54X: TIC54X-Builtins. (line 10)
21408 * $asin math builtin, TIC54X: TIC54X-Builtins. (line 13)
21409 * $atan math builtin, TIC54X: TIC54X-Builtins. (line 16)
21410 * $atan2 math builtin, TIC54X: TIC54X-Builtins. (line 19)
21411 * $ceil math builtin, TIC54X: TIC54X-Builtins. (line 22)
21412 * $cos math builtin, TIC54X: TIC54X-Builtins. (line 28)
21413 * $cosh math builtin, TIC54X: TIC54X-Builtins. (line 25)
21414 * $cvf math builtin, TIC54X: TIC54X-Builtins. (line 31)
21415 * $cvi math builtin, TIC54X: TIC54X-Builtins. (line 34)
21416 * $d: ARM Mapping Symbols. (line 15)
21417 * $exp math builtin, TIC54X: TIC54X-Builtins. (line 37)
21418 * $fabs math builtin, TIC54X: TIC54X-Builtins. (line 40)
21419 * $firstch subsym builtin, TIC54X: TIC54X-Macros. (line 26)
21420 * $floor math builtin, TIC54X: TIC54X-Builtins. (line 43)
21421 * $fmod math builtin, TIC54X: TIC54X-Builtins. (line 47)
21422 * $int math builtin, TIC54X: TIC54X-Builtins. (line 50)
21423 * $iscons subsym builtin, TIC54X: TIC54X-Macros. (line 43)
21424 * $isdefed subsym builtin, TIC54X: TIC54X-Macros. (line 34)
21425 * $ismember subsym builtin, TIC54X: TIC54X-Macros. (line 38)
21426 * $isname subsym builtin, TIC54X: TIC54X-Macros. (line 47)
21427 * $isreg subsym builtin, TIC54X: TIC54X-Macros. (line 50)
21428 * $lastch subsym builtin, TIC54X: TIC54X-Macros. (line 30)
21429 * $ldexp math builtin, TIC54X: TIC54X-Builtins. (line 53)
21430 * $log math builtin, TIC54X: TIC54X-Builtins. (line 59)
21431 * $log10 math builtin, TIC54X: TIC54X-Builtins. (line 56)
21432 * $max math builtin, TIC54X: TIC54X-Builtins. (line 62)
21433 * $min math builtin, TIC54X: TIC54X-Builtins. (line 65)
21434 * $pow math builtin, TIC54X: TIC54X-Builtins. (line 68)
21435 * $round math builtin, TIC54X: TIC54X-Builtins. (line 71)
21436 * $sgn math builtin, TIC54X: TIC54X-Builtins. (line 74)
21437 * $sin math builtin, TIC54X: TIC54X-Builtins. (line 77)
21438 * $sinh math builtin, TIC54X: TIC54X-Builtins. (line 80)
21439 * $sqrt math builtin, TIC54X: TIC54X-Builtins. (line 83)
21440 * $structacc subsym builtin, TIC54X: TIC54X-Macros. (line 57)
21441 * $structsz subsym builtin, TIC54X: TIC54X-Macros. (line 54)
21442 * $symcmp subsym builtin, TIC54X: TIC54X-Macros. (line 23)
21443 * $symlen subsym builtin, TIC54X: TIC54X-Macros. (line 20)
21444 * $t: ARM Mapping Symbols. (line 12)
21445 * $tan math builtin, TIC54X: TIC54X-Builtins. (line 86)
21446 * $tanh math builtin, TIC54X: TIC54X-Builtins. (line 89)
21447 * $trunc math builtin, TIC54X: TIC54X-Builtins. (line 92)
21448 * -+ option, VAX/VMS: VAX-Opts. (line 71)
21449 * --: Command Line. (line 10)
21450 * --32 option, i386: i386-Options. (line 8)
21451 * --32 option, x86-64: i386-Options. (line 8)
21452 * --64 option, i386: i386-Options. (line 8)
21453 * --64 option, x86-64: i386-Options. (line 8)
21454 * --absolute-literals: Xtensa Options. (line 21)
21455 * --allow-reg-prefix: SH Options. (line 9)
21456 * --alternate: alternate. (line 6)
21457 * --base-size-default-16: M68K-Opts. (line 65)
21458 * --base-size-default-32: M68K-Opts. (line 65)
21459 * --big: SH Options. (line 9)
21460 * --bitwise-or option, M680x0: M68K-Opts. (line 58)
21461 * --disp-size-default-16: M68K-Opts. (line 74)
21462 * --disp-size-default-32: M68K-Opts. (line 74)
21463 * --divide option, i386: i386-Options. (line 24)
21464 * --dsp: SH Options. (line 9)
21465 * --emulation=crisaout command line option, CRIS: CRIS-Opts. (line 9)
21466 * --emulation=criself command line option, CRIS: CRIS-Opts. (line 9)
21467 * --enforce-aligned-data: Sparc-Aligned-Data. (line 11)
21468 * --fatal-warnings: W. (line 16)
21469 * --fdpic: SH Options. (line 31)
21470 * --fix-v4bx command line option, ARM: ARM Options. (line 168)
21471 * --fixed-special-register-names command line option, MMIX: MMIX-Opts.
21473 * --force-long-branches: M68HC11-Opts. (line 69)
21474 * --generate-example: M68HC11-Opts. (line 86)
21475 * --globalize-symbols command line option, MMIX: MMIX-Opts. (line 12)
21476 * --gnu-syntax command line option, MMIX: MMIX-Opts. (line 16)
21477 * --hash-size=NUMBER: Overview. (line 369)
21478 * --linker-allocated-gregs command line option, MMIX: MMIX-Opts.
21480 * --listing-cont-lines: listing. (line 34)
21481 * --listing-lhs-width: listing. (line 16)
21482 * --listing-lhs-width2: listing. (line 21)
21483 * --listing-rhs-width: listing. (line 28)
21484 * --little: SH Options. (line 9)
21485 * --longcalls: Xtensa Options. (line 35)
21486 * --march=ARCHITECTURE command line option, CRIS: CRIS-Opts. (line 34)
21487 * --MD: MD. (line 6)
21488 * --mul-bug-abort command line option, CRIS: CRIS-Opts. (line 62)
21489 * --no-absolute-literals: Xtensa Options. (line 21)
21490 * --no-expand command line option, MMIX: MMIX-Opts. (line 31)
21491 * --no-longcalls: Xtensa Options. (line 35)
21492 * --no-merge-gregs command line option, MMIX: MMIX-Opts. (line 36)
21493 * --no-mul-bug-abort command line option, CRIS: CRIS-Opts. (line 62)
21494 * --no-predefined-syms command line option, MMIX: MMIX-Opts. (line 22)
21495 * --no-pushj-stubs command line option, MMIX: MMIX-Opts. (line 54)
21496 * --no-stubs command line option, MMIX: MMIX-Opts. (line 54)
21497 * --no-target-align: Xtensa Options. (line 28)
21498 * --no-text-section-literals: Xtensa Options. (line 7)
21499 * --no-transform: Xtensa Options. (line 44)
21500 * --no-underscore command line option, CRIS: CRIS-Opts. (line 15)
21501 * --no-warn: W. (line 11)
21502 * --pcrel: M68K-Opts. (line 86)
21503 * --pic command line option, CRIS: CRIS-Opts. (line 27)
21504 * --print-insn-syntax: M68HC11-Opts. (line 75)
21505 * --print-opcodes: M68HC11-Opts. (line 79)
21506 * --register-prefix-optional option, M680x0: M68K-Opts. (line 45)
21507 * --relax: SH Options. (line 9)
21508 * --relax command line option, MMIX: MMIX-Opts. (line 19)
21509 * --rename-section: Xtensa Options. (line 52)
21510 * --renesas: SH Options. (line 9)
21511 * --short-branches: M68HC11-Opts. (line 54)
21512 * --small: SH Options. (line 9)
21513 * --statistics: statistics. (line 6)
21514 * --strict-direct-mode: M68HC11-Opts. (line 44)
21515 * --target-align: Xtensa Options. (line 28)
21516 * --text-section-literals: Xtensa Options. (line 7)
21517 * --traditional-format: traditional-format. (line 6)
21518 * --transform: Xtensa Options. (line 44)
21519 * --underscore command line option, CRIS: CRIS-Opts. (line 15)
21520 * --warn: W. (line 19)
21521 * --x32 option, i386: i386-Options. (line 8)
21522 * --x32 option, x86-64: i386-Options. (line 8)
21523 * -1 option, VAX/VMS: VAX-Opts. (line 77)
21524 * -32addr command line option, Alpha: Alpha Options. (line 57)
21526 * -A options, i960: Options-i960. (line 6)
21534 * -Asparc: Sparc-Opts. (line 25)
21535 * -Asparcfmaf: Sparc-Opts. (line 25)
21536 * -Asparcima: Sparc-Opts. (line 25)
21537 * -Asparclet: Sparc-Opts. (line 25)
21538 * -Asparclite: Sparc-Opts. (line 25)
21539 * -Asparcvis: Sparc-Opts. (line 25)
21540 * -Asparcvis2: Sparc-Opts. (line 25)
21541 * -Asparcvis3: Sparc-Opts. (line 25)
21542 * -Asparcvis3r: Sparc-Opts. (line 25)
21543 * -Av6: Sparc-Opts. (line 25)
21544 * -Av7: Sparc-Opts. (line 25)
21545 * -Av8: Sparc-Opts. (line 25)
21546 * -Av9: Sparc-Opts. (line 25)
21547 * -Av9a: Sparc-Opts. (line 25)
21548 * -Av9b: Sparc-Opts. (line 25)
21549 * -Av9c: Sparc-Opts. (line 25)
21550 * -Av9d: Sparc-Opts. (line 25)
21551 * -Av9v: Sparc-Opts. (line 25)
21552 * -b option, i960: Options-i960. (line 22)
21553 * -big option, M32R: M32R-Opts. (line 35)
21555 * -D, ignored on VAX: VAX-Opts. (line 11)
21556 * -d, VAX option: VAX-Opts. (line 16)
21557 * -eabi= command line option, ARM: ARM Options. (line 151)
21558 * -EB command line option, ARC: ARC Options. (line 31)
21559 * -EB command line option, ARM: ARM Options. (line 156)
21560 * -EB option (MIPS): MIPS Opts. (line 13)
21561 * -EB option, M32R: M32R-Opts. (line 39)
21562 * -EL command line option, ARC: ARC Options. (line 35)
21563 * -EL command line option, ARM: ARM Options. (line 160)
21564 * -EL option (MIPS): MIPS Opts. (line 13)
21565 * -EL option, M32R: M32R-Opts. (line 32)
21567 * -F command line option, Alpha: Alpha Options. (line 57)
21568 * -g command line option, Alpha: Alpha Options. (line 47)
21569 * -G command line option, Alpha: Alpha Options. (line 53)
21570 * -G option (MIPS): MIPS Opts. (line 8)
21571 * -H option, VAX/VMS: VAX-Opts. (line 81)
21572 * -h option, VAX/VMS: VAX-Opts. (line 45)
21573 * -I PATH: I. (line 6)
21574 * -ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 87)
21575 * -Ip option, M32RX: M32R-Opts. (line 97)
21576 * -J, ignored on VAX: VAX-Opts. (line 27)
21578 * -k command line option, ARM: ARM Options. (line 164)
21579 * -KPIC option, M32R: M32R-Opts. (line 42)
21580 * -KPIC option, MIPS: MIPS Opts. (line 21)
21582 * -l option, M680x0: M68K-Opts. (line 33)
21583 * -little option, M32R: M32R-Opts. (line 27)
21585 * -m11/03: PDP-11-Options. (line 140)
21586 * -m11/04: PDP-11-Options. (line 143)
21587 * -m11/05: PDP-11-Options. (line 146)
21588 * -m11/10: PDP-11-Options. (line 146)
21589 * -m11/15: PDP-11-Options. (line 149)
21590 * -m11/20: PDP-11-Options. (line 149)
21591 * -m11/21: PDP-11-Options. (line 152)
21592 * -m11/23: PDP-11-Options. (line 155)
21593 * -m11/24: PDP-11-Options. (line 155)
21594 * -m11/34: PDP-11-Options. (line 158)
21595 * -m11/34a: PDP-11-Options. (line 161)
21596 * -m11/35: PDP-11-Options. (line 164)
21597 * -m11/40: PDP-11-Options. (line 164)
21598 * -m11/44: PDP-11-Options. (line 167)
21599 * -m11/45: PDP-11-Options. (line 170)
21600 * -m11/50: PDP-11-Options. (line 170)
21601 * -m11/53: PDP-11-Options. (line 173)
21602 * -m11/55: PDP-11-Options. (line 170)
21603 * -m11/60: PDP-11-Options. (line 176)
21604 * -m11/70: PDP-11-Options. (line 170)
21605 * -m11/73: PDP-11-Options. (line 173)
21606 * -m11/83: PDP-11-Options. (line 173)
21607 * -m11/84: PDP-11-Options. (line 173)
21608 * -m11/93: PDP-11-Options. (line 173)
21609 * -m11/94: PDP-11-Options. (line 173)
21610 * -m16c option, M16C: M32C-Opts. (line 12)
21611 * -m31 option, s390: s390 Options. (line 8)
21612 * -m32 option, TILE-Gx: TILE-Gx Options. (line 8)
21613 * -m32bit-doubles: RX-Opts. (line 9)
21614 * -m32c option, M32C: M32C-Opts. (line 9)
21615 * -m32r option, M32R: M32R-Opts. (line 21)
21616 * -m32rx option, M32R2: M32R-Opts. (line 17)
21617 * -m32rx option, M32RX: M32R-Opts. (line 9)
21618 * -m64 option, s390: s390 Options. (line 8)
21619 * -m64 option, TILE-Gx: TILE-Gx Options. (line 8)
21620 * -m64bit-doubles: RX-Opts. (line 15)
21621 * -m68000 and related options: M68K-Opts. (line 98)
21622 * -m68hc11: M68HC11-Opts. (line 9)
21623 * -m68hc12: M68HC11-Opts. (line 14)
21624 * -m68hcs12: M68HC11-Opts. (line 21)
21625 * -m[no-]68851 command line option, M680x0: M68K-Opts. (line 21)
21626 * -m[no-]68881 command line option, M680x0: M68K-Opts. (line 21)
21627 * -m[no-]div command line option, M680x0: M68K-Opts. (line 21)
21628 * -m[no-]emac command line option, M680x0: M68K-Opts. (line 21)
21629 * -m[no-]float command line option, M680x0: M68K-Opts. (line 21)
21630 * -m[no-]mac command line option, M680x0: M68K-Opts. (line 21)
21631 * -m[no-]usp command line option, M680x0: M68K-Opts. (line 21)
21632 * -mall: PDP-11-Options. (line 26)
21633 * -mall-enabled command line option, LM32: LM32 Options. (line 30)
21634 * -mall-extensions: PDP-11-Options. (line 26)
21635 * -mall-opcodes command line option, AVR: AVR Options. (line 96)
21636 * -mapcs-26 command line option, ARM: ARM Options. (line 123)
21637 * -mapcs-32 command line option, ARM: ARM Options. (line 123)
21638 * -mapcs-float command line option, ARM: ARM Options. (line 137)
21639 * -mapcs-reentrant command line option, ARM: ARM Options. (line 142)
21640 * -marc[5|6|7|8] command line option, ARC: ARC Options. (line 6)
21641 * -march= command line option, ARM: ARM Options. (line 62)
21642 * -march= command line option, M680x0: M68K-Opts. (line 8)
21643 * -march= command line option, TIC6X: TIC6X Options. (line 6)
21644 * -march= option, i386: i386-Options. (line 31)
21645 * -march= option, s390: s390 Options. (line 25)
21646 * -march= option, x86-64: i386-Options. (line 31)
21647 * -matpcs command line option, ARM: ARM Options. (line 129)
21648 * -mavxscalar= option, i386: i386-Options. (line 80)
21649 * -mavxscalar= option, x86-64: i386-Options. (line 80)
21650 * -mbarrel-shift-enabled command line option, LM32: LM32 Options.
21652 * -mbig-endian: RX-Opts. (line 20)
21653 * -mbreak-enabled command line option, LM32: LM32 Options. (line 27)
21654 * -mcis: PDP-11-Options. (line 32)
21655 * -mconstant-gp command line option, IA-64: IA-64 Options. (line 6)
21656 * -mCPU command line option, Alpha: Alpha Options. (line 6)
21657 * -mcpu option, cpu: TIC54X-Opts. (line 15)
21658 * -mcpu= command line option, ARM: ARM Options. (line 6)
21659 * -mcpu= command line option, Blackfin: Blackfin Options. (line 6)
21660 * -mcpu= command line option, M680x0: M68K-Opts. (line 14)
21661 * -mcsm: PDP-11-Options. (line 43)
21662 * -mdcache-enabled command line option, LM32: LM32 Options. (line 24)
21663 * -mdebug command line option, Alpha: Alpha Options. (line 25)
21664 * -mdivide-enabled command line option, LM32: LM32 Options. (line 9)
21665 * -mdsbt command line option, TIC6X: TIC6X Options. (line 13)
21666 * -me option, stderr redirect: TIC54X-Opts. (line 20)
21667 * -meis: PDP-11-Options. (line 46)
21668 * -merrors-to-file option, stderr redirect: TIC54X-Opts. (line 20)
21669 * -mesa option, s390: s390 Options. (line 17)
21670 * -mf option, far-mode: TIC54X-Opts. (line 8)
21671 * -mf11: PDP-11-Options. (line 122)
21672 * -mfar-mode option, far-mode: TIC54X-Opts. (line 8)
21673 * -mfdpic command line option, Blackfin: Blackfin Options. (line 19)
21674 * -mfis: PDP-11-Options. (line 51)
21675 * -mfloat-abi= command line option, ARM: ARM Options. (line 146)
21676 * -mfp-11: PDP-11-Options. (line 56)
21677 * -mfpp: PDP-11-Options. (line 56)
21678 * -mfpu: PDP-11-Options. (line 56)
21679 * -mfpu= command line option, ARM: ARM Options. (line 77)
21680 * -micache-enabled command line option, LM32: LM32 Options. (line 21)
21681 * -mimplicit-it command line option, ARM: ARM Options. (line 107)
21682 * -mip2022 option, IP2K: IP2K-Opts. (line 14)
21683 * -mip2022ext option, IP2022: IP2K-Opts. (line 9)
21684 * -mj11: PDP-11-Options. (line 126)
21685 * -mka11: PDP-11-Options. (line 92)
21686 * -mkb11: PDP-11-Options. (line 95)
21687 * -mkd11a: PDP-11-Options. (line 98)
21688 * -mkd11b: PDP-11-Options. (line 101)
21689 * -mkd11d: PDP-11-Options. (line 104)
21690 * -mkd11e: PDP-11-Options. (line 107)
21691 * -mkd11f: PDP-11-Options. (line 110)
21692 * -mkd11h: PDP-11-Options. (line 110)
21693 * -mkd11k: PDP-11-Options. (line 114)
21694 * -mkd11q: PDP-11-Options. (line 110)
21695 * -mkd11z: PDP-11-Options. (line 118)
21696 * -mkev11: PDP-11-Options. (line 51)
21697 * -mlimited-eis: PDP-11-Options. (line 64)
21698 * -mlittle-endian: RX-Opts. (line 26)
21699 * -mlong: M68HC11-Opts. (line 32)
21700 * -mlong-double: M68HC11-Opts. (line 40)
21701 * -mmcu= command line option, AVR: AVR Options. (line 6)
21702 * -mmfpt: PDP-11-Options. (line 70)
21703 * -mmicrocode: PDP-11-Options. (line 83)
21704 * -mmnemonic= option, i386: i386-Options. (line 88)
21705 * -mmnemonic= option, x86-64: i386-Options. (line 88)
21706 * -mmultiply-enabled command line option, LM32: LM32 Options. (line 6)
21707 * -mmutiproc: PDP-11-Options. (line 73)
21708 * -mmxps: PDP-11-Options. (line 77)
21709 * -mnaked-reg option, i386: i386-Options. (line 100)
21710 * -mnaked-reg option, x86-64: i386-Options. (line 100)
21711 * -mno-cis: PDP-11-Options. (line 32)
21712 * -mno-csm: PDP-11-Options. (line 43)
21713 * -mno-dsbt command line option, TIC6X: TIC6X Options. (line 13)
21714 * -mno-eis: PDP-11-Options. (line 46)
21715 * -mno-extensions: PDP-11-Options. (line 29)
21716 * -mno-fdpic command line option, Blackfin: Blackfin Options. (line 22)
21717 * -mno-fis: PDP-11-Options. (line 51)
21718 * -mno-fp-11: PDP-11-Options. (line 56)
21719 * -mno-fpp: PDP-11-Options. (line 56)
21720 * -mno-fpu: PDP-11-Options. (line 56)
21721 * -mno-kev11: PDP-11-Options. (line 51)
21722 * -mno-limited-eis: PDP-11-Options. (line 64)
21723 * -mno-mfpt: PDP-11-Options. (line 70)
21724 * -mno-microcode: PDP-11-Options. (line 83)
21725 * -mno-mutiproc: PDP-11-Options. (line 73)
21726 * -mno-mxps: PDP-11-Options. (line 77)
21727 * -mno-pic: PDP-11-Options. (line 11)
21728 * -mno-pic command line option, TIC6X: TIC6X Options. (line 36)
21729 * -mno-regnames option, s390: s390 Options. (line 35)
21730 * -mno-skip-bug command line option, AVR: AVR Options. (line 99)
21731 * -mno-spl: PDP-11-Options. (line 80)
21732 * -mno-sym32: MIPS Opts. (line 221)
21733 * -mno-wrap command line option, AVR: AVR Options. (line 102)
21734 * -mnopic command line option, Blackfin: Blackfin Options. (line 22)
21735 * -mpic: PDP-11-Options. (line 11)
21736 * -mpic command line option, TIC6X: TIC6X Options. (line 36)
21737 * -mpid= command line option, TIC6X: TIC6X Options. (line 23)
21738 * -mregnames option, s390: s390 Options. (line 32)
21739 * -mrelax command line option, V850: V850 Options. (line 63)
21740 * -mshort: M68HC11-Opts. (line 27)
21741 * -mshort-double: M68HC11-Opts. (line 36)
21742 * -msign-extend-enabled command line option, LM32: LM32 Options.
21744 * -msmall-data-limit: RX-Opts. (line 42)
21745 * -mspl: PDP-11-Options. (line 80)
21746 * -msse-check= option, i386: i386-Options. (line 70)
21747 * -msse-check= option, x86-64: i386-Options. (line 70)
21748 * -msse2avx option, i386: i386-Options. (line 66)
21749 * -msse2avx option, x86-64: i386-Options. (line 66)
21750 * -msym32: MIPS Opts. (line 221)
21751 * -msyntax= option, i386: i386-Options. (line 94)
21752 * -msyntax= option, x86-64: i386-Options. (line 94)
21753 * -mt11: PDP-11-Options. (line 130)
21754 * -mthumb command line option, ARM: ARM Options. (line 98)
21755 * -mthumb-interwork command line option, ARM: ARM Options. (line 103)
21756 * -mtune= option, i386: i386-Options. (line 58)
21757 * -mtune= option, x86-64: i386-Options. (line 58)
21758 * -muse-conventional-section-names: RX-Opts. (line 33)
21759 * -muse-renesas-section-names: RX-Opts. (line 37)
21760 * -muser-enabled command line option, LM32: LM32 Options. (line 18)
21761 * -mv850 command line option, V850: V850 Options. (line 23)
21762 * -mv850any command line option, V850: V850 Options. (line 41)
21763 * -mv850e command line option, V850: V850 Options. (line 29)
21764 * -mv850e1 command line option, V850: V850 Options. (line 35)
21765 * -mv850e2 command line option, V850: V850 Options. (line 51)
21766 * -mv850e2v3 command line option, V850: V850 Options. (line 57)
21767 * -mvxworks-pic option, MIPS: MIPS Opts. (line 26)
21768 * -mwarn-areg-zero option, s390: s390 Options. (line 38)
21769 * -mwarn-deprecated command line option, ARM: ARM Options. (line 172)
21770 * -mzarch option, s390: s390 Options. (line 17)
21771 * -N command line option, CRIS: CRIS-Opts. (line 58)
21772 * -nIp option, M32RX: M32R-Opts. (line 101)
21773 * -no-bitinst, M32R2: M32R-Opts. (line 54)
21774 * -no-ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 93)
21775 * -no-mdebug command line option, Alpha: Alpha Options. (line 25)
21776 * -no-parallel option, M32RX: M32R-Opts. (line 51)
21777 * -no-relax option, i960: Options-i960. (line 66)
21778 * -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts.
21780 * -no-warn-unmatched-high option, M32R: M32R-Opts. (line 111)
21781 * -nocpp ignored (MIPS): MIPS Opts. (line 224)
21782 * -noreplace command line option, Alpha: Alpha Options. (line 40)
21784 * -O option, M32RX: M32R-Opts. (line 59)
21785 * -parallel option, M32RX: M32R-Opts. (line 46)
21787 * -r800 command line option, Z80: Z80 Options. (line 41)
21788 * -relax command line option, Alpha: Alpha Options. (line 32)
21789 * -replace command line option, Alpha: Alpha Options. (line 40)
21790 * -S, ignored on VAX: VAX-Opts. (line 11)
21791 * -T, ignored on VAX: VAX-Opts. (line 11)
21792 * -t, ignored on VAX: VAX-Opts. (line 36)
21794 * -V, redundant on VAX: VAX-Opts. (line 22)
21795 * -version: v. (line 6)
21797 * -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line 65)
21798 * -warn-unmatched-high option, M32R: M32R-Opts. (line 105)
21799 * -Wnp option, M32RX: M32R-Opts. (line 83)
21800 * -Wnuh option, M32RX: M32R-Opts. (line 117)
21801 * -Wp option, M32RX: M32R-Opts. (line 75)
21802 * -wsigned_overflow command line option, V850: V850 Options. (line 9)
21803 * -Wuh option, M32RX: M32R-Opts. (line 114)
21804 * -wunsigned_overflow command line option, V850: V850 Options.
21806 * -x command line option, MMIX: MMIX-Opts. (line 44)
21807 * -z80 command line option, Z80: Z80 Options. (line 8)
21808 * -z8001 command line option, Z8000: Z8000 Options. (line 6)
21809 * -z8002 command line option, Z8000: Z8000 Options. (line 9)
21810 * . (symbol): Dot. (line 6)
21811 * .2byte directive, ARM: ARM Directives. (line 6)
21812 * .4byte directive, ARM: ARM Directives. (line 6)
21813 * .8byte directive, ARM: ARM Directives. (line 6)
21814 * .align directive, ARM: ARM Directives. (line 11)
21815 * .align directive, TILE-Gx: TILE-Gx Directives. (line 6)
21816 * .align directive, TILEPro: TILEPro Directives. (line 6)
21817 * .allow_suspicious_bundles directive, TILE-Gx: TILE-Gx Directives.
21819 * .allow_suspicious_bundles directive, TILEPro: TILEPro Directives.
21821 * .arch directive, ARM: ARM Directives. (line 18)
21822 * .arch directive, TIC6X: TIC6X Directives. (line 10)
21823 * .arch_extension directive, ARM: ARM Directives. (line 25)
21824 * .arm directive, ARM: ARM Directives. (line 34)
21825 * .big directive, M32RX: M32R-Directives. (line 88)
21826 * .bss directive, ARM: ARM Directives. (line 42)
21827 * .c6xabi_attribute directive, TIC6X: TIC6X Directives. (line 20)
21828 * .cantunwind directive, ARM: ARM Directives. (line 45)
21829 * .cantunwind directive, TIC6X: TIC6X Directives. (line 13)
21830 * .code directive, ARM: ARM Directives. (line 49)
21831 * .cpu directive, ARM: ARM Directives. (line 53)
21832 * .dn and .qn directives, ARM: ARM Directives. (line 60)
21833 * .eabi_attribute directive, ARM: ARM Directives. (line 83)
21834 * .ehtype directive, TIC6X: TIC6X Directives. (line 31)
21835 * .endp directive, TIC6X: TIC6X Directives. (line 34)
21836 * .even directive, ARM: ARM Directives. (line 111)
21837 * .extend directive, ARM: ARM Directives. (line 114)
21838 * .fnend directive, ARM: ARM Directives. (line 120)
21839 * .fnstart directive, ARM: ARM Directives. (line 129)
21840 * .force_thumb directive, ARM: ARM Directives. (line 132)
21841 * .fpu directive, ARM: ARM Directives. (line 136)
21842 * .global: MIPS insn. (line 12)
21843 * .handlerdata directive, ARM: ARM Directives. (line 140)
21844 * .handlerdata directive, TIC6X: TIC6X Directives. (line 39)
21845 * .insn: MIPS insn. (line 6)
21846 * .insn directive, s390: s390 Directives. (line 11)
21847 * .inst directive, ARM: ARM Directives. (line 149)
21848 * .ldouble directive, ARM: ARM Directives. (line 114)
21849 * .little directive, M32RX: M32R-Directives. (line 82)
21850 * .long directive, s390: s390 Directives. (line 16)
21851 * .ltorg directive, ARM: ARM Directives. (line 159)
21852 * .ltorg directive, s390: s390 Directives. (line 88)
21853 * .m32r directive, M32R: M32R-Directives. (line 66)
21854 * .m32r2 directive, M32R2: M32R-Directives. (line 77)
21855 * .m32rx directive, M32RX: M32R-Directives. (line 72)
21856 * .machine directive, s390: s390 Directives. (line 93)
21857 * .movsp directive, ARM: ARM Directives. (line 173)
21858 * .no_pointers directive, XStormy16: XStormy16 Directives.
21860 * .nocmp directive, TIC6X: TIC6X Directives. (line 48)
21861 * .o: Object. (line 6)
21862 * .object_arch directive, ARM: ARM Directives. (line 178)
21863 * .packed directive, ARM: ARM Directives. (line 184)
21864 * .pad directive, ARM: ARM Directives. (line 37)
21865 * .param on HPPA: HPPA Directives. (line 19)
21866 * .personality directive, ARM: ARM Directives. (line 194)
21867 * .personality directive, TIC6X: TIC6X Directives. (line 56)
21868 * .personalityindex directive, ARM: ARM Directives. (line 197)
21869 * .personalityindex directive, TIC6X: TIC6X Directives. (line 52)
21870 * .pool directive, ARM: ARM Directives. (line 201)
21871 * .quad directive, s390: s390 Directives. (line 16)
21872 * .req directive, ARM: ARM Directives. (line 204)
21873 * .require_canonical_reg_names directive, TILE-Gx: TILE-Gx Directives.
21875 * .require_canonical_reg_names directive, TILEPro: TILEPro Directives.
21877 * .save directive, ARM: ARM Directives. (line 209)
21878 * .scomm directive, TIC6X: TIC6X Directives. (line 59)
21879 * .secrel32 directive, ARM: ARM Directives. (line 247)
21880 * .set arch=CPU: MIPS ISA. (line 18)
21881 * .set autoextend: MIPS autoextend. (line 6)
21882 * .set doublefloat: MIPS floating-point. (line 12)
21883 * .set dsp: MIPS ASE instruction generation overrides.
21885 * .set dspr2: MIPS ASE instruction generation overrides.
21887 * .set hardfloat: MIPS floating-point. (line 6)
21888 * .set mcu: MIPS ASE instruction generation overrides.
21890 * .set mdmx: MIPS ASE instruction generation overrides.
21892 * .set mips3d: MIPS ASE instruction generation overrides.
21894 * .set mipsN: MIPS ISA. (line 6)
21895 * .set mt: MIPS ASE instruction generation overrides.
21897 * .set noautoextend: MIPS autoextend. (line 6)
21898 * .set nodsp: MIPS ASE instruction generation overrides.
21900 * .set nodspr2: MIPS ASE instruction generation overrides.
21902 * .set nomcu: MIPS ASE instruction generation overrides.
21904 * .set nomdmx: MIPS ASE instruction generation overrides.
21906 * .set nomips3d: MIPS ASE instruction generation overrides.
21908 * .set nomt: MIPS ASE instruction generation overrides.
21910 * .set nosmartmips: MIPS ASE instruction generation overrides.
21912 * .set nosym32: MIPS symbol sizes. (line 6)
21913 * .set pop: MIPS option stack. (line 6)
21914 * .set push: MIPS option stack. (line 6)
21915 * .set singlefloat: MIPS floating-point. (line 12)
21916 * .set smartmips: MIPS ASE instruction generation overrides.
21918 * .set softfloat: MIPS floating-point. (line 6)
21919 * .set sym32: MIPS symbol sizes. (line 6)
21920 * .setfp directive, ARM: ARM Directives. (line 233)
21921 * .short directive, s390: s390 Directives. (line 16)
21922 * .syntax directive, ARM: ARM Directives. (line 252)
21923 * .thumb directive, ARM: ARM Directives. (line 256)
21924 * .thumb_func directive, ARM: ARM Directives. (line 259)
21925 * .thumb_set directive, ARM: ARM Directives. (line 270)
21926 * .tlsdescseq directive, ARM: ARM Directives. (line 277)
21927 * .unreq directive, ARM: ARM Directives. (line 282)
21928 * .unwind_raw directive, ARM: ARM Directives. (line 293)
21929 * .v850 directive, V850: V850 Directives. (line 14)
21930 * .v850e directive, V850: V850 Directives. (line 20)
21931 * .v850e1 directive, V850: V850 Directives. (line 26)
21932 * .v850e2 directive, V850: V850 Directives. (line 32)
21933 * .v850e2v3 directive, V850: V850 Directives. (line 38)
21934 * .vsave directive, ARM: ARM Directives. (line 300)
21935 * .z8001: Z8000 Directives. (line 11)
21936 * .z8002: Z8000 Directives. (line 15)
21937 * 16-bit code, i386: i386-16bit. (line 6)
21938 * 16bit_pointers directive, XStormy16: XStormy16 Directives.
21940 * 2byte directive, ARC: ARC Directives. (line 9)
21941 * 32bit_pointers directive, XStormy16: XStormy16 Directives.
21943 * 3byte directive, ARC: ARC Directives. (line 12)
21944 * 3DNow!, i386: i386-SIMD. (line 6)
21945 * 3DNow!, x86-64: i386-SIMD. (line 6)
21946 * 430 support: MSP430-Dependent. (line 6)
21947 * 4byte directive, ARC: ARC Directives. (line 15)
21948 * : (label): Statements. (line 31)
21949 * @hi pseudo-op, XStormy16: XStormy16 Opcodes. (line 21)
21950 * @lo pseudo-op, XStormy16: XStormy16 Opcodes. (line 10)
21951 * @word modifier, D10V: D10V-Word. (line 6)
21952 * \" (doublequote character): Strings. (line 43)
21953 * \\ (\ character): Strings. (line 40)
21954 * \b (backspace character): Strings. (line 15)
21955 * \DDD (octal character code): Strings. (line 30)
21956 * \f (formfeed character): Strings. (line 18)
21957 * \n (newline character): Strings. (line 21)
21958 * \r (carriage return character): Strings. (line 24)
21959 * \t (tab): Strings. (line 27)
21960 * \XD... (hex character code): Strings. (line 36)
21961 * _ opcode prefix: Xtensa Opcodes. (line 9)
21962 * a.out: Object. (line 6)
21963 * a.out symbol attributes: a.out Symbols. (line 6)
21964 * A_DIR environment variable, TIC54X: TIC54X-Env. (line 6)
21965 * ABI options, SH64: SH64 Options. (line 29)
21966 * ABORT directive: ABORT (COFF). (line 6)
21967 * abort directive: Abort. (line 6)
21968 * absolute section: Ld Sections. (line 29)
21969 * absolute-literals directive: Absolute Literals Directive.
21971 * ADDI instructions, relaxation: Xtensa Immediate Relaxation.
21973 * addition, permitted arguments: Infix Ops. (line 44)
21974 * addresses: Expressions. (line 6)
21975 * addresses, format of: Secs Background. (line 68)
21976 * addressing modes, D10V: D10V-Addressing. (line 6)
21977 * addressing modes, D30V: D30V-Addressing. (line 6)
21978 * addressing modes, H8/300: H8/300-Addressing. (line 6)
21979 * addressing modes, M680x0: M68K-Syntax. (line 21)
21980 * addressing modes, M68HC11: M68HC11-Syntax. (line 30)
21981 * addressing modes, SH: SH-Addressing. (line 6)
21982 * addressing modes, SH64: SH64-Addressing. (line 6)
21983 * addressing modes, Z8000: Z8000-Addressing. (line 6)
21984 * ADR reg,<label> pseudo op, ARM: ARM Opcodes. (line 25)
21985 * ADRL reg,<label> pseudo op, ARM: ARM Opcodes. (line 35)
21986 * advancing location counter: Org. (line 6)
21987 * align directive: Align. (line 6)
21988 * align directive, SPARC: Sparc-Directives. (line 9)
21989 * align directive, TIC54X: TIC54X-Directives. (line 6)
21990 * alignment for NEON instructions: ARM-Neon-Alignment. (line 6)
21991 * alignment of branch targets: Xtensa Automatic Alignment.
21993 * alignment of LOOP instructions: Xtensa Automatic Alignment.
21995 * Alpha floating point (IEEE): Alpha Floating Point.
21997 * Alpha line comment character: Alpha-Chars. (line 6)
21998 * Alpha line separator: Alpha-Chars. (line 11)
21999 * Alpha notes: Alpha Notes. (line 6)
22000 * Alpha options: Alpha Options. (line 6)
22001 * Alpha registers: Alpha-Regs. (line 6)
22002 * Alpha relocations: Alpha-Relocs. (line 6)
22003 * Alpha support: Alpha-Dependent. (line 6)
22004 * Alpha Syntax: Alpha Options. (line 61)
22005 * Alpha-only directives: Alpha Directives. (line 10)
22006 * altered difference tables: Word. (line 12)
22007 * alternate syntax for the 680x0: M68K-Moto-Syntax. (line 6)
22008 * ARC floating point (IEEE): ARC Floating Point. (line 6)
22009 * ARC line comment character: ARC-Chars. (line 6)
22010 * ARC line separator: ARC-Chars. (line 12)
22011 * ARC machine directives: ARC Directives. (line 6)
22012 * ARC opcodes: ARC Opcodes. (line 6)
22013 * ARC options (none): ARC Options. (line 6)
22014 * ARC register names: ARC-Regs. (line 6)
22015 * ARC support: ARC-Dependent. (line 6)
22016 * arc5 arc5, ARC: ARC Options. (line 10)
22017 * arc6 arc6, ARC: ARC Options. (line 13)
22018 * arc7 arc7, ARC: ARC Options. (line 21)
22019 * arc8 arc8, ARC: ARC Options. (line 24)
22020 * arch directive, i386: i386-Arch. (line 6)
22021 * arch directive, M680x0: M68K-Directives. (line 22)
22022 * arch directive, x86-64: i386-Arch. (line 6)
22023 * architecture options, i960: Options-i960. (line 6)
22024 * architecture options, IP2022: IP2K-Opts. (line 9)
22025 * architecture options, IP2K: IP2K-Opts. (line 14)
22026 * architecture options, M16C: M32C-Opts. (line 12)
22027 * architecture options, M32C: M32C-Opts. (line 9)
22028 * architecture options, M32R: M32R-Opts. (line 21)
22029 * architecture options, M32R2: M32R-Opts. (line 17)
22030 * architecture options, M32RX: M32R-Opts. (line 9)
22031 * architecture options, M680x0: M68K-Opts. (line 98)
22032 * Architecture variant option, CRIS: CRIS-Opts. (line 34)
22033 * architectures, PowerPC: PowerPC-Opts. (line 6)
22034 * architectures, SCORE: SCORE-Opts. (line 6)
22035 * architectures, SPARC: Sparc-Opts. (line 6)
22036 * arguments for addition: Infix Ops. (line 44)
22037 * arguments for subtraction: Infix Ops. (line 49)
22038 * arguments in expressions: Arguments. (line 6)
22039 * arithmetic functions: Operators. (line 6)
22040 * arithmetic operands: Arguments. (line 6)
22041 * ARM data relocations: ARM-Relocations. (line 6)
22042 * ARM floating point (IEEE): ARM Floating Point. (line 6)
22043 * ARM identifiers: ARM-Chars. (line 19)
22044 * ARM immediate character: ARM-Chars. (line 17)
22045 * ARM line comment character: ARM-Chars. (line 6)
22046 * ARM line separator: ARM-Chars. (line 14)
22047 * ARM machine directives: ARM Directives. (line 6)
22048 * ARM opcodes: ARM Opcodes. (line 6)
22049 * ARM options (none): ARM Options. (line 6)
22050 * ARM register names: ARM-Regs. (line 6)
22051 * ARM support: ARM-Dependent. (line 6)
22052 * ascii directive: Ascii. (line 6)
22053 * asciz directive: Asciz. (line 6)
22054 * asg directive, TIC54X: TIC54X-Directives. (line 20)
22055 * assembler bugs, reporting: Bug Reporting. (line 6)
22056 * assembler crash: Bug Criteria. (line 9)
22057 * assembler directive .3byte, RX: RX-Directives. (line 9)
22058 * assembler directive .arch, CRIS: CRIS-Pseudos. (line 45)
22059 * assembler directive .dword, CRIS: CRIS-Pseudos. (line 12)
22060 * assembler directive .far, M68HC11: M68HC11-Directives. (line 20)
22061 * assembler directive .interrupt, M68HC11: M68HC11-Directives.
22063 * assembler directive .mode, M68HC11: M68HC11-Directives. (line 16)
22064 * assembler directive .relax, M68HC11: M68HC11-Directives. (line 10)
22065 * assembler directive .syntax, CRIS: CRIS-Pseudos. (line 17)
22066 * assembler directive .xrefb, M68HC11: M68HC11-Directives. (line 31)
22067 * assembler directive BSPEC, MMIX: MMIX-Pseudos. (line 131)
22068 * assembler directive BYTE, MMIX: MMIX-Pseudos. (line 97)
22069 * assembler directive ESPEC, MMIX: MMIX-Pseudos. (line 131)
22070 * assembler directive GREG, MMIX: MMIX-Pseudos. (line 50)
22071 * assembler directive IS, MMIX: MMIX-Pseudos. (line 42)
22072 * assembler directive LOC, MMIX: MMIX-Pseudos. (line 7)
22073 * assembler directive LOCAL, MMIX: MMIX-Pseudos. (line 28)
22074 * assembler directive OCTA, MMIX: MMIX-Pseudos. (line 108)
22075 * assembler directive PREFIX, MMIX: MMIX-Pseudos. (line 120)
22076 * assembler directive TETRA, MMIX: MMIX-Pseudos. (line 108)
22077 * assembler directive WYDE, MMIX: MMIX-Pseudos. (line 108)
22078 * assembler directives, CRIS: CRIS-Pseudos. (line 6)
22079 * assembler directives, M68HC11: M68HC11-Directives. (line 6)
22080 * assembler directives, M68HC12: M68HC11-Directives. (line 6)
22081 * assembler directives, MMIX: MMIX-Pseudos. (line 6)
22082 * assembler directives, RX: RX-Directives. (line 6)
22083 * assembler internal logic error: As Sections. (line 13)
22084 * assembler version: v. (line 6)
22085 * assembler, and linker: Secs Background. (line 10)
22086 * assembly listings, enabling: a. (line 6)
22087 * assigning values to symbols <1>: Setting Symbols. (line 6)
22088 * assigning values to symbols: Equ. (line 6)
22089 * atmp directive, i860: Directives-i860. (line 16)
22090 * att_syntax pseudo op, i386: i386-Variations. (line 6)
22091 * att_syntax pseudo op, x86-64: i386-Variations. (line 6)
22092 * attributes, symbol: Symbol Attributes. (line 6)
22093 * auxiliary attributes, COFF symbols: COFF Symbols. (line 19)
22094 * auxiliary symbol information, COFF: Dim. (line 6)
22095 * AVR line comment character: AVR-Chars. (line 6)
22096 * AVR line separator: AVR-Chars. (line 14)
22097 * AVR modifiers: AVR-Modifiers. (line 6)
22098 * AVR opcode summary: AVR Opcodes. (line 6)
22099 * AVR options (none): AVR Options. (line 6)
22100 * AVR register names: AVR-Regs. (line 6)
22101 * AVR support: AVR-Dependent. (line 6)
22102 * backslash (\\): Strings. (line 40)
22103 * backspace (\b): Strings. (line 15)
22104 * balign directive: Balign. (line 6)
22105 * balignl directive: Balign. (line 27)
22106 * balignw directive: Balign. (line 27)
22107 * bes directive, TIC54X: TIC54X-Directives. (line 196)
22108 * big endian output, MIPS: Overview. (line 693)
22109 * big endian output, PJ: Overview. (line 600)
22110 * big-endian output, MIPS: MIPS Opts. (line 13)
22111 * big-endian output, TIC6X: TIC6X Options. (line 46)
22112 * bignums: Bignums. (line 6)
22113 * binary constants, TIC54X: TIC54X-Constants. (line 8)
22114 * binary files, including: Incbin. (line 6)
22115 * binary integers: Integers. (line 6)
22116 * bit names, IA-64: IA-64-Bits. (line 6)
22117 * bitfields, not supported on VAX: VAX-no. (line 6)
22118 * Blackfin directives: Blackfin Directives. (line 6)
22119 * Blackfin options (none): Blackfin Options. (line 6)
22120 * Blackfin support: Blackfin-Dependent. (line 6)
22121 * Blackfin syntax: Blackfin Syntax. (line 6)
22122 * block: Z8000 Directives. (line 55)
22123 * BMI, i386: i386-BMI. (line 6)
22124 * BMI, x86-64: i386-BMI. (line 6)
22125 * branch improvement, M680x0: M68K-Branch. (line 6)
22126 * branch improvement, M68HC11: M68HC11-Branch. (line 6)
22127 * branch improvement, VAX: VAX-branch. (line 6)
22128 * branch instructions, relaxation: Xtensa Branch Relaxation.
22130 * branch recording, i960: Options-i960. (line 22)
22131 * branch statistics table, i960: Options-i960. (line 40)
22132 * branch target alignment: Xtensa Automatic Alignment.
22134 * break directive, TIC54X: TIC54X-Directives. (line 143)
22135 * BSD syntax: PDP-11-Syntax. (line 6)
22136 * bss directive, i960: Directives-i960. (line 6)
22137 * bss directive, TIC54X: TIC54X-Directives. (line 29)
22138 * bss section <1>: Ld Sections. (line 20)
22139 * bss section: bss. (line 6)
22140 * bug criteria: Bug Criteria. (line 6)
22141 * bug reports: Bug Reporting. (line 6)
22142 * bugs in assembler: Reporting Bugs. (line 6)
22143 * Built-in symbols, CRIS: CRIS-Symbols. (line 6)
22144 * builtin math functions, TIC54X: TIC54X-Builtins. (line 6)
22145 * builtin subsym functions, TIC54X: TIC54X-Macros. (line 16)
22146 * bus lock prefixes, i386: i386-Prefixes. (line 36)
22147 * bval: Z8000 Directives. (line 30)
22148 * byte directive: Byte. (line 6)
22149 * byte directive, TIC54X: TIC54X-Directives. (line 36)
22150 * C54XDSP_DIR environment variable, TIC54X: TIC54X-Env. (line 6)
22151 * c_mode directive, TIC54X: TIC54X-Directives. (line 51)
22152 * call instructions, i386: i386-Mnemonics. (line 56)
22153 * call instructions, relaxation: Xtensa Call Relaxation.
22155 * call instructions, x86-64: i386-Mnemonics. (line 56)
22156 * callj, i960 pseudo-opcode: callj-i960. (line 6)
22157 * carriage return (\r): Strings. (line 24)
22158 * case sensitivity, Z80: Z80-Case. (line 6)
22159 * cfi_endproc directive: CFI directives. (line 26)
22160 * cfi_sections directive: CFI directives. (line 6)
22161 * cfi_startproc directive: CFI directives. (line 16)
22162 * char directive, TIC54X: TIC54X-Directives. (line 36)
22163 * character constant, Z80: Z80-Chars. (line 20)
22164 * character constants: Characters. (line 6)
22165 * character escape codes: Strings. (line 15)
22166 * character escapes, Z80: Z80-Chars. (line 18)
22167 * character, single: Chars. (line 6)
22168 * characters used in symbols: Symbol Intro. (line 6)
22169 * clink directive, TIC54X: TIC54X-Directives. (line 45)
22170 * code16 directive, i386: i386-16bit. (line 6)
22171 * code16gcc directive, i386: i386-16bit. (line 6)
22172 * code32 directive, i386: i386-16bit. (line 6)
22173 * code64 directive, i386: i386-16bit. (line 6)
22174 * code64 directive, x86-64: i386-16bit. (line 6)
22175 * COFF auxiliary symbol information: Dim. (line 6)
22176 * COFF structure debugging: Tag. (line 6)
22177 * COFF symbol attributes: COFF Symbols. (line 6)
22178 * COFF symbol descriptor: Desc. (line 6)
22179 * COFF symbol storage class: Scl. (line 6)
22180 * COFF symbol type: Type. (line 11)
22181 * COFF symbols, debugging: Def. (line 6)
22182 * COFF value attribute: Val. (line 6)
22183 * COMDAT: Linkonce. (line 6)
22184 * comm directive: Comm. (line 6)
22185 * command line conventions: Command Line. (line 6)
22186 * command line options, V850: V850 Options. (line 9)
22187 * command-line options ignored, VAX: VAX-Opts. (line 6)
22188 * comment character, XStormy16: XStormy16-Chars. (line 11)
22189 * comments: Comments. (line 6)
22190 * comments, M680x0: M68K-Chars. (line 6)
22191 * comments, removed by preprocessor: Preprocessing. (line 11)
22192 * common directive, SPARC: Sparc-Directives. (line 12)
22193 * common sections: Linkonce. (line 6)
22194 * common variable storage: bss. (line 6)
22195 * compare and jump expansions, i960: Compare-and-branch-i960.
22197 * compare/branch instructions, i960: Compare-and-branch-i960.
22199 * comparison expressions: Infix Ops. (line 55)
22200 * conditional assembly: If. (line 6)
22201 * constant, single character: Chars. (line 6)
22202 * constants: Constants. (line 6)
22203 * constants, bignum: Bignums. (line 6)
22204 * constants, character: Characters. (line 6)
22205 * constants, converted by preprocessor: Preprocessing. (line 14)
22206 * constants, floating point: Flonums. (line 6)
22207 * constants, integer: Integers. (line 6)
22208 * constants, number: Numbers. (line 6)
22209 * constants, Sparc: Sparc-Constants. (line 6)
22210 * constants, string: Strings. (line 6)
22211 * constants, TIC54X: TIC54X-Constants. (line 6)
22212 * conversion instructions, i386: i386-Mnemonics. (line 37)
22213 * conversion instructions, x86-64: i386-Mnemonics. (line 37)
22214 * coprocessor wait, i386: i386-Prefixes. (line 40)
22215 * copy directive, TIC54X: TIC54X-Directives. (line 54)
22216 * cpu directive, M680x0: M68K-Directives. (line 30)
22217 * CR16 line comment character: CR16-Chars. (line 6)
22218 * CR16 line separator: CR16-Chars. (line 13)
22219 * CR16 Operand Qualifiers: CR16 Operand Qualifiers.
22221 * CR16 support: CR16-Dependent. (line 6)
22222 * crash of assembler: Bug Criteria. (line 9)
22223 * CRIS --emulation=crisaout command line option: CRIS-Opts. (line 9)
22224 * CRIS --emulation=criself command line option: CRIS-Opts. (line 9)
22225 * CRIS --march=ARCHITECTURE command line option: CRIS-Opts. (line 34)
22226 * CRIS --mul-bug-abort command line option: CRIS-Opts. (line 62)
22227 * CRIS --no-mul-bug-abort command line option: CRIS-Opts. (line 62)
22228 * CRIS --no-underscore command line option: CRIS-Opts. (line 15)
22229 * CRIS --pic command line option: CRIS-Opts. (line 27)
22230 * CRIS --underscore command line option: CRIS-Opts. (line 15)
22231 * CRIS -N command line option: CRIS-Opts. (line 58)
22232 * CRIS architecture variant option: CRIS-Opts. (line 34)
22233 * CRIS assembler directive .arch: CRIS-Pseudos. (line 45)
22234 * CRIS assembler directive .dword: CRIS-Pseudos. (line 12)
22235 * CRIS assembler directive .syntax: CRIS-Pseudos. (line 17)
22236 * CRIS assembler directives: CRIS-Pseudos. (line 6)
22237 * CRIS built-in symbols: CRIS-Symbols. (line 6)
22238 * CRIS instruction expansion: CRIS-Expand. (line 6)
22239 * CRIS line comment characters: CRIS-Chars. (line 6)
22240 * CRIS options: CRIS-Opts. (line 6)
22241 * CRIS position-independent code: CRIS-Opts. (line 27)
22242 * CRIS pseudo-op .arch: CRIS-Pseudos. (line 45)
22243 * CRIS pseudo-op .dword: CRIS-Pseudos. (line 12)
22244 * CRIS pseudo-op .syntax: CRIS-Pseudos. (line 17)
22245 * CRIS pseudo-ops: CRIS-Pseudos. (line 6)
22246 * CRIS register names: CRIS-Regs. (line 6)
22247 * CRIS support: CRIS-Dependent. (line 6)
22248 * CRIS symbols in position-independent code: CRIS-Pic. (line 6)
22249 * ctbp register, V850: V850-Regs. (line 131)
22250 * ctoff pseudo-op, V850: V850 Opcodes. (line 111)
22251 * ctpc register, V850: V850-Regs. (line 119)
22252 * ctpsw register, V850: V850-Regs. (line 122)
22253 * current address: Dot. (line 6)
22254 * current address, advancing: Org. (line 6)
22255 * D10V @word modifier: D10V-Word. (line 6)
22256 * D10V addressing modes: D10V-Addressing. (line 6)
22257 * D10V floating point: D10V-Float. (line 6)
22258 * D10V line comment character: D10V-Chars. (line 6)
22259 * D10V opcode summary: D10V-Opcodes. (line 6)
22260 * D10V optimization: Overview. (line 469)
22261 * D10V options: D10V-Opts. (line 6)
22262 * D10V registers: D10V-Regs. (line 6)
22263 * D10V size modifiers: D10V-Size. (line 6)
22264 * D10V sub-instruction ordering: D10V-Chars. (line 14)
22265 * D10V sub-instructions: D10V-Subs. (line 6)
22266 * D10V support: D10V-Dependent. (line 6)
22267 * D10V syntax: D10V-Syntax. (line 6)
22268 * D30V addressing modes: D30V-Addressing. (line 6)
22269 * D30V floating point: D30V-Float. (line 6)
22270 * D30V Guarded Execution: D30V-Guarded. (line 6)
22271 * D30V line comment character: D30V-Chars. (line 6)
22272 * D30V nops: Overview. (line 477)
22273 * D30V nops after 32-bit multiply: Overview. (line 480)
22274 * D30V opcode summary: D30V-Opcodes. (line 6)
22275 * D30V optimization: Overview. (line 474)
22276 * D30V options: D30V-Opts. (line 6)
22277 * D30V registers: D30V-Regs. (line 6)
22278 * D30V size modifiers: D30V-Size. (line 6)
22279 * D30V sub-instruction ordering: D30V-Chars. (line 14)
22280 * D30V sub-instructions: D30V-Subs. (line 6)
22281 * D30V support: D30V-Dependent. (line 6)
22282 * D30V syntax: D30V-Syntax. (line 6)
22283 * data alignment on SPARC: Sparc-Aligned-Data. (line 6)
22284 * data and text sections, joining: R. (line 6)
22285 * data directive: Data. (line 6)
22286 * data directive, TIC54X: TIC54X-Directives. (line 61)
22287 * data relocations, ARM: ARM-Relocations. (line 6)
22288 * data section: Ld Sections. (line 9)
22289 * data1 directive, M680x0: M68K-Directives. (line 9)
22290 * data2 directive, M680x0: M68K-Directives. (line 12)
22291 * datalabel, SH64: SH64-Addressing. (line 16)
22292 * dbpc register, V850: V850-Regs. (line 125)
22293 * dbpsw register, V850: V850-Regs. (line 128)
22294 * debuggers, and symbol order: Symbols. (line 10)
22295 * debugging COFF symbols: Def. (line 6)
22296 * DEC syntax: PDP-11-Syntax. (line 6)
22297 * decimal integers: Integers. (line 12)
22298 * def directive: Def. (line 6)
22299 * def directive, TIC54X: TIC54X-Directives. (line 103)
22300 * density instructions: Density Instructions.
22302 * dependency tracking: MD. (line 6)
22303 * deprecated directives: Deprecated. (line 6)
22304 * desc directive: Desc. (line 6)
22305 * descriptor, of a.out symbol: Symbol Desc. (line 6)
22306 * dfloat directive, VAX: VAX-directives. (line 10)
22307 * difference tables altered: Word. (line 12)
22308 * difference tables, warning: K. (line 6)
22309 * differences, mmixal: MMIX-mmixal. (line 6)
22310 * dim directive: Dim. (line 6)
22311 * directives and instructions: Statements. (line 20)
22312 * directives for PowerPC: PowerPC-Pseudo. (line 6)
22313 * directives for SCORE: SCORE-Pseudo. (line 6)
22314 * directives, Blackfin: Blackfin Directives. (line 6)
22315 * directives, M32R: M32R-Directives. (line 6)
22316 * directives, M680x0: M68K-Directives. (line 6)
22317 * directives, machine independent: Pseudo Ops. (line 6)
22318 * directives, Xtensa: Xtensa Directives. (line 6)
22319 * directives, Z8000: Z8000 Directives. (line 6)
22320 * Disable floating-point instructions: MIPS floating-point. (line 6)
22321 * Disable single-precision floating-point operations: MIPS floating-point.
22323 * displacement sizing character, VAX: VAX-operands. (line 12)
22324 * dollar local symbols: Symbol Names. (line 105)
22325 * dot (symbol): Dot. (line 6)
22326 * double directive: Double. (line 6)
22327 * double directive, i386: i386-Float. (line 14)
22328 * double directive, M680x0: M68K-Float. (line 14)
22329 * double directive, M68HC11: M68HC11-Float. (line 14)
22330 * double directive, RX: RX-Float. (line 11)
22331 * double directive, TIC54X: TIC54X-Directives. (line 64)
22332 * double directive, VAX: VAX-float. (line 15)
22333 * double directive, x86-64: i386-Float. (line 14)
22334 * doublequote (\"): Strings. (line 43)
22335 * drlist directive, TIC54X: TIC54X-Directives. (line 73)
22336 * drnolist directive, TIC54X: TIC54X-Directives. (line 73)
22337 * dual directive, i860: Directives-i860. (line 6)
22338 * ECOFF sections: MIPS Object. (line 6)
22339 * ecr register, V850: V850-Regs. (line 113)
22340 * eight-byte integer: Quad. (line 9)
22341 * eipc register, V850: V850-Regs. (line 101)
22342 * eipsw register, V850: V850-Regs. (line 104)
22343 * eject directive: Eject. (line 6)
22344 * ELF symbol type: Type. (line 22)
22345 * else directive: Else. (line 6)
22346 * elseif directive: Elseif. (line 6)
22347 * empty expressions: Empty Exprs. (line 6)
22348 * emsg directive, TIC54X: TIC54X-Directives. (line 77)
22349 * emulation: Overview. (line 809)
22350 * encoding options, i386: i386-Mnemonics. (line 32)
22351 * encoding options, x86-64: i386-Mnemonics. (line 32)
22352 * end directive: End. (line 6)
22353 * enddual directive, i860: Directives-i860. (line 11)
22354 * endef directive: Endef. (line 6)
22355 * endfunc directive: Endfunc. (line 6)
22356 * endianness, MIPS: Overview. (line 693)
22357 * endianness, PJ: Overview. (line 600)
22358 * endif directive: Endif. (line 6)
22359 * endloop directive, TIC54X: TIC54X-Directives. (line 143)
22360 * endm directive: Macro. (line 138)
22361 * endm directive, TIC54X: TIC54X-Directives. (line 153)
22362 * endstruct directive, TIC54X: TIC54X-Directives. (line 216)
22363 * endunion directive, TIC54X: TIC54X-Directives. (line 250)
22364 * environment settings, TIC54X: TIC54X-Env. (line 6)
22365 * EOF, newline must precede: Statements. (line 14)
22366 * ep register, V850: V850-Regs. (line 95)
22367 * equ directive: Equ. (line 6)
22368 * equ directive, TIC54X: TIC54X-Directives. (line 191)
22369 * equiv directive: Equiv. (line 6)
22370 * eqv directive: Eqv. (line 6)
22371 * err directive: Err. (line 6)
22372 * error directive: Error. (line 6)
22373 * error messages: Errors. (line 6)
22374 * error on valid input: Bug Criteria. (line 12)
22375 * errors, caused by warnings: W. (line 16)
22376 * errors, continuing after: Z. (line 6)
22377 * ESA/390 floating point (IEEE): ESA/390 Floating Point.
22379 * ESA/390 support: ESA/390-Dependent. (line 6)
22380 * ESA/390 Syntax: ESA/390 Options. (line 8)
22381 * ESA/390-only directives: ESA/390 Directives. (line 12)
22382 * escape codes, character: Strings. (line 15)
22383 * eval directive, TIC54X: TIC54X-Directives. (line 24)
22384 * even: Z8000 Directives. (line 58)
22385 * even directive, M680x0: M68K-Directives. (line 15)
22386 * even directive, TIC54X: TIC54X-Directives. (line 6)
22387 * exitm directive: Macro. (line 141)
22388 * expr (internal section): As Sections. (line 17)
22389 * expression arguments: Arguments. (line 6)
22390 * expressions: Expressions. (line 6)
22391 * expressions, comparison: Infix Ops. (line 55)
22392 * expressions, empty: Empty Exprs. (line 6)
22393 * expressions, integer: Integer Exprs. (line 6)
22394 * extAuxRegister directive, ARC: ARC Directives. (line 18)
22395 * extCondCode directive, ARC: ARC Directives. (line 41)
22396 * extCoreRegister directive, ARC: ARC Directives. (line 53)
22397 * extend directive M680x0: M68K-Float. (line 17)
22398 * extend directive M68HC11: M68HC11-Float. (line 17)
22399 * extended directive, i960: Directives-i960. (line 13)
22400 * extern directive: Extern. (line 6)
22401 * extInstruction directive, ARC: ARC Directives. (line 78)
22402 * fail directive: Fail. (line 6)
22403 * far_mode directive, TIC54X: TIC54X-Directives. (line 82)
22404 * faster processing (-f): f. (line 6)
22405 * fatal signal: Bug Criteria. (line 9)
22406 * fclist directive, TIC54X: TIC54X-Directives. (line 87)
22407 * fcnolist directive, TIC54X: TIC54X-Directives. (line 87)
22408 * fepc register, V850: V850-Regs. (line 107)
22409 * fepsw register, V850: V850-Regs. (line 110)
22410 * ffloat directive, VAX: VAX-directives. (line 14)
22411 * field directive, TIC54X: TIC54X-Directives. (line 91)
22412 * file directive: File. (line 6)
22413 * file directive, MSP 430: MSP430 Directives. (line 6)
22414 * file name, logical: File. (line 13)
22415 * files, including: Include. (line 6)
22416 * files, input: Input Files. (line 6)
22417 * fill directive: Fill. (line 6)
22418 * filling memory <1>: Skip. (line 6)
22419 * filling memory: Space. (line 6)
22420 * FLIX syntax: Xtensa Syntax. (line 6)
22421 * float directive: Float. (line 6)
22422 * float directive, i386: i386-Float. (line 14)
22423 * float directive, M680x0: M68K-Float. (line 11)
22424 * float directive, M68HC11: M68HC11-Float. (line 11)
22425 * float directive, RX: RX-Float. (line 8)
22426 * float directive, TIC54X: TIC54X-Directives. (line 64)
22427 * float directive, VAX: VAX-float. (line 15)
22428 * float directive, x86-64: i386-Float. (line 14)
22429 * floating point numbers: Flonums. (line 6)
22430 * floating point numbers (double): Double. (line 6)
22431 * floating point numbers (single) <1>: Float. (line 6)
22432 * floating point numbers (single): Single. (line 6)
22433 * floating point, Alpha (IEEE): Alpha Floating Point.
22435 * floating point, ARC (IEEE): ARC Floating Point. (line 6)
22436 * floating point, ARM (IEEE): ARM Floating Point. (line 6)
22437 * floating point, D10V: D10V-Float. (line 6)
22438 * floating point, D30V: D30V-Float. (line 6)
22439 * floating point, ESA/390 (IEEE): ESA/390 Floating Point.
22441 * floating point, H8/300 (IEEE): H8/300 Floating Point.
22443 * floating point, HPPA (IEEE): HPPA Floating Point. (line 6)
22444 * floating point, i386: i386-Float. (line 6)
22445 * floating point, i960 (IEEE): Floating Point-i960. (line 6)
22446 * floating point, M680x0: M68K-Float. (line 6)
22447 * floating point, M68HC11: M68HC11-Float. (line 6)
22448 * floating point, MSP 430 (IEEE): MSP430 Floating Point.
22450 * floating point, RX: RX-Float. (line 6)
22451 * floating point, s390: s390 Floating Point. (line 6)
22452 * floating point, SH (IEEE): SH Floating Point. (line 6)
22453 * floating point, SPARC (IEEE): Sparc-Float. (line 6)
22454 * floating point, V850 (IEEE): V850 Floating Point. (line 6)
22455 * floating point, VAX: VAX-float. (line 6)
22456 * floating point, x86-64: i386-Float. (line 6)
22457 * floating point, Z80: Z80 Floating Point. (line 6)
22458 * flonums: Flonums. (line 6)
22459 * format of error messages: Errors. (line 24)
22460 * format of warning messages: Errors. (line 12)
22461 * formfeed (\f): Strings. (line 18)
22462 * func directive: Func. (line 6)
22463 * functions, in expressions: Operators. (line 6)
22464 * gbr960, i960 postprocessor: Options-i960. (line 40)
22465 * gfloat directive, VAX: VAX-directives. (line 18)
22466 * global: Z8000 Directives. (line 21)
22467 * global directive: Global. (line 6)
22468 * global directive, TIC54X: TIC54X-Directives. (line 103)
22469 * gp register, MIPS: MIPS Object. (line 11)
22470 * gp register, V850: V850-Regs. (line 17)
22471 * grouping data: Sub-Sections. (line 6)
22472 * H8/300 addressing modes: H8/300-Addressing. (line 6)
22473 * H8/300 floating point (IEEE): H8/300 Floating Point.
22475 * H8/300 line comment character: H8/300-Chars. (line 6)
22476 * H8/300 line separator: H8/300-Chars. (line 8)
22477 * H8/300 machine directives (none): H8/300 Directives. (line 6)
22478 * H8/300 opcode summary: H8/300 Opcodes. (line 6)
22479 * H8/300 options: H8/300 Options. (line 6)
22480 * H8/300 registers: H8/300-Regs. (line 6)
22481 * H8/300 size suffixes: H8/300 Opcodes. (line 163)
22482 * H8/300 support: H8/300-Dependent. (line 6)
22483 * H8/300H, assembling for: H8/300 Directives. (line 8)
22484 * half directive, ARC: ARC Directives. (line 156)
22485 * half directive, SPARC: Sparc-Directives. (line 17)
22486 * half directive, TIC54X: TIC54X-Directives. (line 111)
22487 * hex character code (\XD...): Strings. (line 36)
22488 * hexadecimal integers: Integers. (line 15)
22489 * hexadecimal prefix, Z80: Z80-Chars. (line 15)
22490 * hfloat directive, VAX: VAX-directives. (line 22)
22491 * hi pseudo-op, V850: V850 Opcodes. (line 33)
22492 * hi0 pseudo-op, V850: V850 Opcodes. (line 10)
22493 * hidden directive: Hidden. (line 6)
22494 * high directive, M32R: M32R-Directives. (line 18)
22495 * hilo pseudo-op, V850: V850 Opcodes. (line 55)
22496 * HPPA directives not supported: HPPA Directives. (line 11)
22497 * HPPA floating point (IEEE): HPPA Floating Point. (line 6)
22498 * HPPA Syntax: HPPA Options. (line 8)
22499 * HPPA-only directives: HPPA Directives. (line 24)
22500 * hword directive: hword. (line 6)
22501 * i370 support: ESA/390-Dependent. (line 6)
22502 * i386 16-bit code: i386-16bit. (line 6)
22503 * i386 arch directive: i386-Arch. (line 6)
22504 * i386 att_syntax pseudo op: i386-Variations. (line 6)
22505 * i386 conversion instructions: i386-Mnemonics. (line 37)
22506 * i386 floating point: i386-Float. (line 6)
22507 * i386 immediate operands: i386-Variations. (line 15)
22508 * i386 instruction naming: i386-Mnemonics. (line 6)
22509 * i386 instruction prefixes: i386-Prefixes. (line 6)
22510 * i386 intel_syntax pseudo op: i386-Variations. (line 6)
22511 * i386 jump optimization: i386-Jumps. (line 6)
22512 * i386 jump, call, return: i386-Variations. (line 41)
22513 * i386 jump/call operands: i386-Variations. (line 15)
22514 * i386 line comment character: i386-Chars. (line 6)
22515 * i386 line separator: i386-Chars. (line 18)
22516 * i386 memory references: i386-Memory. (line 6)
22517 * i386 mnemonic compatibility: i386-Mnemonics. (line 62)
22518 * i386 mul, imul instructions: i386-Notes. (line 6)
22519 * i386 options: i386-Options. (line 6)
22520 * i386 register operands: i386-Variations. (line 15)
22521 * i386 registers: i386-Regs. (line 6)
22522 * i386 sections: i386-Variations. (line 47)
22523 * i386 size suffixes: i386-Variations. (line 29)
22524 * i386 source, destination operands: i386-Variations. (line 22)
22525 * i386 support: i386-Dependent. (line 6)
22526 * i386 syntax compatibility: i386-Variations. (line 6)
22527 * i80386 support: i386-Dependent. (line 6)
22528 * i860 line comment character: i860-Chars. (line 6)
22529 * i860 line separator: i860-Chars. (line 14)
22530 * i860 machine directives: Directives-i860. (line 6)
22531 * i860 opcodes: Opcodes for i860. (line 6)
22532 * i860 support: i860-Dependent. (line 6)
22533 * i960 architecture options: Options-i960. (line 6)
22534 * i960 branch recording: Options-i960. (line 22)
22535 * i960 callj pseudo-opcode: callj-i960. (line 6)
22536 * i960 compare and jump expansions: Compare-and-branch-i960.
22538 * i960 compare/branch instructions: Compare-and-branch-i960.
22540 * i960 floating point (IEEE): Floating Point-i960. (line 6)
22541 * i960 line comment character: i960-Chars. (line 6)
22542 * i960 line separator: i960-Chars. (line 14)
22543 * i960 machine directives: Directives-i960. (line 6)
22544 * i960 opcodes: Opcodes for i960. (line 6)
22545 * i960 options: Options-i960. (line 6)
22546 * i960 support: i960-Dependent. (line 6)
22547 * IA-64 line comment character: IA-64-Chars. (line 6)
22548 * IA-64 line separator: IA-64-Chars. (line 8)
22549 * IA-64 options: IA-64 Options. (line 6)
22550 * IA-64 Processor-status-Register bit names: IA-64-Bits. (line 6)
22551 * IA-64 registers: IA-64-Regs. (line 6)
22552 * IA-64 relocations: IA-64-Relocs. (line 6)
22553 * IA-64 support: IA-64-Dependent. (line 6)
22554 * IA-64 Syntax: IA-64 Options. (line 87)
22555 * ident directive: Ident. (line 6)
22556 * identifiers, ARM: ARM-Chars. (line 19)
22557 * identifiers, MSP 430: MSP430-Chars. (line 17)
22558 * if directive: If. (line 6)
22559 * ifb directive: If. (line 21)
22560 * ifc directive: If. (line 25)
22561 * ifdef directive: If. (line 16)
22562 * ifeq directive: If. (line 33)
22563 * ifeqs directive: If. (line 36)
22564 * ifge directive: If. (line 40)
22565 * ifgt directive: If. (line 44)
22566 * ifle directive: If. (line 48)
22567 * iflt directive: If. (line 52)
22568 * ifnb directive: If. (line 56)
22569 * ifnc directive: If. (line 61)
22570 * ifndef directive: If. (line 65)
22571 * ifne directive: If. (line 72)
22572 * ifnes directive: If. (line 76)
22573 * ifnotdef directive: If. (line 65)
22574 * immediate character, ARM: ARM-Chars. (line 17)
22575 * immediate character, M680x0: M68K-Chars. (line 13)
22576 * immediate character, VAX: VAX-operands. (line 6)
22577 * immediate fields, relaxation: Xtensa Immediate Relaxation.
22579 * immediate operands, i386: i386-Variations. (line 15)
22580 * immediate operands, x86-64: i386-Variations. (line 15)
22581 * imul instruction, i386: i386-Notes. (line 6)
22582 * imul instruction, x86-64: i386-Notes. (line 6)
22583 * incbin directive: Incbin. (line 6)
22584 * include directive: Include. (line 6)
22585 * include directive search path: I. (line 6)
22586 * indirect character, VAX: VAX-operands. (line 9)
22587 * infix operators: Infix Ops. (line 6)
22588 * inhibiting interrupts, i386: i386-Prefixes. (line 36)
22589 * input: Input Files. (line 6)
22590 * input file linenumbers: Input Files. (line 35)
22591 * instruction aliases, s390: s390 Aliases. (line 6)
22592 * instruction expansion, CRIS: CRIS-Expand. (line 6)
22593 * instruction expansion, MMIX: MMIX-Expand. (line 6)
22594 * instruction formats, s390: s390 Formats. (line 6)
22595 * instruction marker, s390: s390 Instruction Marker.
22597 * instruction mnemonics, s390: s390 Mnemonics. (line 6)
22598 * instruction naming, i386: i386-Mnemonics. (line 6)
22599 * instruction naming, x86-64: i386-Mnemonics. (line 6)
22600 * instruction operand modifier, s390: s390 Operand Modifier.
22602 * instruction operands, s390: s390 Operands. (line 6)
22603 * instruction prefixes, i386: i386-Prefixes. (line 6)
22604 * instruction set, M680x0: M68K-opcodes. (line 6)
22605 * instruction set, M68HC11: M68HC11-opcodes. (line 6)
22606 * instruction summary, AVR: AVR Opcodes. (line 6)
22607 * instruction summary, D10V: D10V-Opcodes. (line 6)
22608 * instruction summary, D30V: D30V-Opcodes. (line 6)
22609 * instruction summary, H8/300: H8/300 Opcodes. (line 6)
22610 * instruction summary, LM32: LM32 Opcodes. (line 6)
22611 * instruction summary, SH: SH Opcodes. (line 6)
22612 * instruction summary, SH64: SH64 Opcodes. (line 6)
22613 * instruction summary, Z8000: Z8000 Opcodes. (line 6)
22614 * instruction syntax, s390: s390 Syntax. (line 6)
22615 * instructions and directives: Statements. (line 20)
22616 * int directive: Int. (line 6)
22617 * int directive, H8/300: H8/300 Directives. (line 6)
22618 * int directive, i386: i386-Float. (line 21)
22619 * int directive, TIC54X: TIC54X-Directives. (line 111)
22620 * int directive, x86-64: i386-Float. (line 21)
22621 * integer expressions: Integer Exprs. (line 6)
22622 * integer, 16-byte: Octa. (line 6)
22623 * integer, 8-byte: Quad. (line 9)
22624 * integers: Integers. (line 6)
22625 * integers, 16-bit: hword. (line 6)
22626 * integers, 32-bit: Int. (line 6)
22627 * integers, binary: Integers. (line 6)
22628 * integers, decimal: Integers. (line 12)
22629 * integers, hexadecimal: Integers. (line 15)
22630 * integers, octal: Integers. (line 9)
22631 * integers, one byte: Byte. (line 6)
22632 * intel_syntax pseudo op, i386: i386-Variations. (line 6)
22633 * intel_syntax pseudo op, x86-64: i386-Variations. (line 6)
22634 * internal assembler sections: As Sections. (line 6)
22635 * internal directive: Internal. (line 6)
22636 * invalid input: Bug Criteria. (line 14)
22637 * invocation summary: Overview. (line 6)
22638 * IP2K architecture options: IP2K-Opts. (line 9)
22639 * IP2K line comment character: IP2K-Chars. (line 6)
22640 * IP2K line separator: IP2K-Chars. (line 14)
22641 * IP2K options: IP2K-Opts. (line 6)
22642 * IP2K support: IP2K-Dependent. (line 6)
22643 * irp directive: Irp. (line 6)
22644 * irpc directive: Irpc. (line 6)
22645 * ISA options, SH64: SH64 Options. (line 6)
22646 * joining text and data sections: R. (line 6)
22647 * jump instructions, i386: i386-Mnemonics. (line 56)
22648 * jump instructions, x86-64: i386-Mnemonics. (line 56)
22649 * jump optimization, i386: i386-Jumps. (line 6)
22650 * jump optimization, x86-64: i386-Jumps. (line 6)
22651 * jump/call operands, i386: i386-Variations. (line 15)
22652 * jump/call operands, x86-64: i386-Variations. (line 15)
22653 * L16SI instructions, relaxation: Xtensa Immediate Relaxation.
22655 * L16UI instructions, relaxation: Xtensa Immediate Relaxation.
22657 * L32I instructions, relaxation: Xtensa Immediate Relaxation.
22659 * L8UI instructions, relaxation: Xtensa Immediate Relaxation.
22661 * label (:): Statements. (line 31)
22662 * label directive, TIC54X: TIC54X-Directives. (line 123)
22663 * labels: Labels. (line 6)
22664 * lcomm directive: Lcomm. (line 6)
22665 * lcomm directive, COFF: i386-Directives. (line 6)
22666 * ld: Object. (line 15)
22667 * ldouble directive M680x0: M68K-Float. (line 17)
22668 * ldouble directive M68HC11: M68HC11-Float. (line 17)
22669 * ldouble directive, TIC54X: TIC54X-Directives. (line 64)
22670 * LDR reg,=<label> pseudo op, ARM: ARM Opcodes. (line 15)
22671 * leafproc directive, i960: Directives-i960. (line 18)
22672 * length directive, TIC54X: TIC54X-Directives. (line 127)
22673 * length of symbols: Symbol Intro. (line 14)
22674 * lflags directive (ignored): Lflags. (line 6)
22675 * line comment character: Comments. (line 19)
22676 * line comment character, Alpha: Alpha-Chars. (line 6)
22677 * line comment character, ARC: ARC-Chars. (line 6)
22678 * line comment character, ARM: ARM-Chars. (line 6)
22679 * line comment character, AVR: AVR-Chars. (line 6)
22680 * line comment character, CR16: CR16-Chars. (line 6)
22681 * line comment character, D10V: D10V-Chars. (line 6)
22682 * line comment character, D30V: D30V-Chars. (line 6)
22683 * line comment character, H8/300: H8/300-Chars. (line 6)
22684 * line comment character, i386: i386-Chars. (line 6)
22685 * line comment character, i860: i860-Chars. (line 6)
22686 * line comment character, i960: i960-Chars. (line 6)
22687 * line comment character, IA-64: IA-64-Chars. (line 6)
22688 * line comment character, IP2K: IP2K-Chars. (line 6)
22689 * line comment character, LM32: LM32-Chars. (line 6)
22690 * line comment character, M32C: M32C-Chars. (line 6)
22691 * line comment character, M680x0: M68K-Chars. (line 6)
22692 * line comment character, M68HC11: M68HC11-Syntax. (line 17)
22693 * line comment character, MicroBlaze: MicroBlaze-Chars. (line 6)
22694 * line comment character, MIPS: MIPS-Chars. (line 6)
22695 * line comment character, MSP 430: MSP430-Chars. (line 6)
22696 * line comment character, NS32K: NS32K-Chars. (line 6)
22697 * line comment character, PJ: PJ-Chars. (line 6)
22698 * line comment character, PowerPC: PowerPC-Chars. (line 6)
22699 * line comment character, RX: RX-Chars. (line 6)
22700 * line comment character, s390: s390 Characters. (line 6)
22701 * line comment character, SCORE: SCORE-Chars. (line 6)
22702 * line comment character, SH: SH-Chars. (line 6)
22703 * line comment character, SH64: SH64-Chars. (line 6)
22704 * line comment character, Sparc: Sparc-Chars. (line 6)
22705 * line comment character, TIC54X: TIC54X-Chars. (line 6)
22706 * line comment character, TIC6X: TIC6X Syntax. (line 6)
22707 * line comment character, V850: V850-Chars. (line 6)
22708 * line comment character, VAX: VAX-Chars. (line 6)
22709 * line comment character, XStormy16: XStormy16-Chars. (line 6)
22710 * line comment character, Z80: Z80-Chars. (line 6)
22711 * line comment character, Z8000: Z8000-Chars. (line 6)
22712 * line comment characters, CRIS: CRIS-Chars. (line 6)
22713 * line comment characters, MMIX: MMIX-Chars. (line 6)
22714 * line directive: Line. (line 6)
22715 * line directive, MSP 430: MSP430 Directives. (line 14)
22716 * line numbers, in input files: Input Files. (line 35)
22717 * line numbers, in warnings/errors: Errors. (line 16)
22718 * line separator character: Statements. (line 6)
22719 * line separator, Alpha: Alpha-Chars. (line 11)
22720 * line separator, ARC: ARC-Chars. (line 12)
22721 * line separator, ARM: ARM-Chars. (line 14)
22722 * line separator, AVR: AVR-Chars. (line 14)
22723 * line separator, CR16: CR16-Chars. (line 13)
22724 * line separator, H8/300: H8/300-Chars. (line 8)
22725 * line separator, i386: i386-Chars. (line 18)
22726 * line separator, i860: i860-Chars. (line 14)
22727 * line separator, i960: i960-Chars. (line 14)
22728 * line separator, IA-64: IA-64-Chars. (line 8)
22729 * line separator, IP2K: IP2K-Chars. (line 14)
22730 * line separator, LM32: LM32-Chars. (line 12)
22731 * line separator, M32C: M32C-Chars. (line 14)
22732 * line separator, M680x0: M68K-Chars. (line 20)
22733 * line separator, M68HC11: M68HC11-Syntax. (line 27)
22734 * line separator, MicroBlaze: MicroBlaze-Chars. (line 14)
22735 * line separator, MIPS: MIPS-Chars. (line 14)
22736 * line separator, MSP 430: MSP430-Chars. (line 14)
22737 * line separator, NS32K: NS32K-Chars. (line 18)
22738 * line separator, PJ: PJ-Chars. (line 14)
22739 * line separator, PowerPC: PowerPC-Chars. (line 18)
22740 * line separator, RX: RX-Chars. (line 14)
22741 * line separator, s390: s390 Characters. (line 13)
22742 * line separator, SCORE: SCORE-Chars. (line 14)
22743 * line separator, SH: SH-Chars. (line 8)
22744 * line separator, SH64: SH64-Chars. (line 13)
22745 * line separator, Sparc: Sparc-Chars. (line 14)
22746 * line separator, TIC54X: TIC54X-Chars. (line 17)
22747 * line separator, TIC6X: TIC6X Syntax. (line 13)
22748 * line separator, V850: V850-Chars. (line 13)
22749 * line separator, VAX: VAX-Chars. (line 14)
22750 * line separator, XStormy16: XStormy16-Chars. (line 14)
22751 * line separator, Z80: Z80-Chars. (line 13)
22752 * line separator, Z8000: Z8000-Chars. (line 13)
22753 * lines starting with #: Comments. (line 33)
22754 * linker: Object. (line 15)
22755 * linker, and assembler: Secs Background. (line 10)
22756 * linkonce directive: Linkonce. (line 6)
22757 * list directive: List. (line 6)
22758 * list directive, TIC54X: TIC54X-Directives. (line 131)
22759 * listing control, turning off: Nolist. (line 6)
22760 * listing control, turning on: List. (line 6)
22761 * listing control: new page: Eject. (line 6)
22762 * listing control: paper size: Psize. (line 6)
22763 * listing control: subtitle: Sbttl. (line 6)
22764 * listing control: title line: Title. (line 6)
22765 * listings, enabling: a. (line 6)
22766 * literal directive: Literal Directive. (line 6)
22767 * literal pool entries, s390: s390 Literal Pool Entries.
22769 * literal_position directive: Literal Position Directive.
22771 * literal_prefix directive: Literal Prefix Directive.
22773 * little endian output, MIPS: Overview. (line 696)
22774 * little endian output, PJ: Overview. (line 603)
22775 * little-endian output, MIPS: MIPS Opts. (line 13)
22776 * little-endian output, TIC6X: TIC6X Options. (line 46)
22777 * LM32 line comment character: LM32-Chars. (line 6)
22778 * LM32 line separator: LM32-Chars. (line 12)
22779 * LM32 modifiers: LM32-Modifiers. (line 6)
22780 * LM32 opcode summary: LM32 Opcodes. (line 6)
22781 * LM32 options (none): LM32 Options. (line 6)
22782 * LM32 register names: LM32-Regs. (line 6)
22783 * LM32 support: LM32-Dependent. (line 6)
22784 * ln directive: Ln. (line 6)
22785 * lo pseudo-op, V850: V850 Opcodes. (line 22)
22786 * loc directive: Loc. (line 6)
22787 * loc_mark_labels directive: Loc_mark_labels. (line 6)
22788 * local common symbols: Lcomm. (line 6)
22789 * local directive: Local. (line 6)
22790 * local labels: Symbol Names. (line 35)
22791 * local symbol names: Symbol Names. (line 22)
22792 * local symbols, retaining in output: L. (line 6)
22793 * location counter: Dot. (line 6)
22794 * location counter, advancing: Org. (line 6)
22795 * location counter, Z80: Z80-Chars. (line 15)
22796 * logical file name: File. (line 13)
22797 * logical line number: Line. (line 6)
22798 * logical line numbers: Comments. (line 33)
22799 * long directive: Long. (line 6)
22800 * long directive, ARC: ARC Directives. (line 159)
22801 * long directive, i386: i386-Float. (line 21)
22802 * long directive, TIC54X: TIC54X-Directives. (line 135)
22803 * long directive, x86-64: i386-Float. (line 21)
22804 * longcall pseudo-op, V850: V850 Opcodes. (line 123)
22805 * longcalls directive: Longcalls Directive. (line 6)
22806 * longjump pseudo-op, V850: V850 Opcodes. (line 129)
22807 * loop directive, TIC54X: TIC54X-Directives. (line 143)
22808 * LOOP instructions, alignment: Xtensa Automatic Alignment.
22810 * low directive, M32R: M32R-Directives. (line 9)
22811 * lp register, V850: V850-Regs. (line 98)
22812 * lval: Z8000 Directives. (line 27)
22813 * LWP, i386: i386-LWP. (line 6)
22814 * LWP, x86-64: i386-LWP. (line 6)
22815 * M16C architecture option: M32C-Opts. (line 12)
22816 * M32C architecture option: M32C-Opts. (line 9)
22817 * M32C line comment character: M32C-Chars. (line 6)
22818 * M32C line separator: M32C-Chars. (line 14)
22819 * M32C modifiers: M32C-Modifiers. (line 6)
22820 * M32C options: M32C-Opts. (line 6)
22821 * M32C support: M32C-Dependent. (line 6)
22822 * M32R architecture options: M32R-Opts. (line 21)
22823 * M32R directives: M32R-Directives. (line 6)
22824 * M32R options: M32R-Opts. (line 6)
22825 * M32R support: M32R-Dependent. (line 6)
22826 * M32R warnings: M32R-Warnings. (line 6)
22827 * M680x0 addressing modes: M68K-Syntax. (line 21)
22828 * M680x0 architecture options: M68K-Opts. (line 98)
22829 * M680x0 branch improvement: M68K-Branch. (line 6)
22830 * M680x0 directives: M68K-Directives. (line 6)
22831 * M680x0 floating point: M68K-Float. (line 6)
22832 * M680x0 immediate character: M68K-Chars. (line 13)
22833 * M680x0 line comment character: M68K-Chars. (line 6)
22834 * M680x0 line separator: M68K-Chars. (line 20)
22835 * M680x0 opcodes: M68K-opcodes. (line 6)
22836 * M680x0 options: M68K-Opts. (line 6)
22837 * M680x0 pseudo-opcodes: M68K-Branch. (line 6)
22838 * M680x0 size modifiers: M68K-Syntax. (line 8)
22839 * M680x0 support: M68K-Dependent. (line 6)
22840 * M680x0 syntax: M68K-Syntax. (line 8)
22841 * M68HC11 addressing modes: M68HC11-Syntax. (line 30)
22842 * M68HC11 and M68HC12 support: M68HC11-Dependent. (line 6)
22843 * M68HC11 assembler directive .far: M68HC11-Directives. (line 20)
22844 * M68HC11 assembler directive .interrupt: M68HC11-Directives. (line 26)
22845 * M68HC11 assembler directive .mode: M68HC11-Directives. (line 16)
22846 * M68HC11 assembler directive .relax: M68HC11-Directives. (line 10)
22847 * M68HC11 assembler directive .xrefb: M68HC11-Directives. (line 31)
22848 * M68HC11 assembler directives: M68HC11-Directives. (line 6)
22849 * M68HC11 branch improvement: M68HC11-Branch. (line 6)
22850 * M68HC11 floating point: M68HC11-Float. (line 6)
22851 * M68HC11 line comment character: M68HC11-Syntax. (line 17)
22852 * M68HC11 line separator: M68HC11-Syntax. (line 27)
22853 * M68HC11 modifiers: M68HC11-Modifiers. (line 6)
22854 * M68HC11 opcodes: M68HC11-opcodes. (line 6)
22855 * M68HC11 options: M68HC11-Opts. (line 6)
22856 * M68HC11 pseudo-opcodes: M68HC11-Branch. (line 6)
22857 * M68HC11 syntax: M68HC11-Syntax. (line 6)
22858 * M68HC12 assembler directives: M68HC11-Directives. (line 6)
22859 * machine dependencies: Machine Dependencies.
22861 * machine directives, ARC: ARC Directives. (line 6)
22862 * machine directives, ARM: ARM Directives. (line 6)
22863 * machine directives, H8/300 (none): H8/300 Directives. (line 6)
22864 * machine directives, i860: Directives-i860. (line 6)
22865 * machine directives, i960: Directives-i960. (line 6)
22866 * machine directives, MSP 430: MSP430 Directives. (line 6)
22867 * machine directives, SH: SH Directives. (line 6)
22868 * machine directives, SH64: SH64 Directives. (line 9)
22869 * machine directives, SPARC: Sparc-Directives. (line 6)
22870 * machine directives, TIC54X: TIC54X-Directives. (line 6)
22871 * machine directives, TIC6X: TIC6X Directives. (line 6)
22872 * machine directives, TILE-Gx: TILE-Gx Directives. (line 6)
22873 * machine directives, TILEPro: TILEPro Directives. (line 6)
22874 * machine directives, V850: V850 Directives. (line 6)
22875 * machine directives, VAX: VAX-directives. (line 6)
22876 * machine directives, x86: i386-Directives. (line 6)
22877 * machine directives, XStormy16: XStormy16 Directives.
22879 * machine independent directives: Pseudo Ops. (line 6)
22880 * machine instructions (not covered): Manual. (line 14)
22881 * machine-independent syntax: Syntax. (line 6)
22882 * macro directive: Macro. (line 28)
22883 * macro directive, TIC54X: TIC54X-Directives. (line 153)
22884 * macros: Macro. (line 6)
22885 * macros, count executed: Macro. (line 143)
22886 * Macros, MSP 430: MSP430-Macros. (line 6)
22887 * macros, TIC54X: TIC54X-Macros. (line 6)
22888 * make rules: MD. (line 6)
22889 * manual, structure and purpose: Manual. (line 6)
22890 * math builtins, TIC54X: TIC54X-Builtins. (line 6)
22891 * Maximum number of continuation lines: listing. (line 34)
22892 * memory references, i386: i386-Memory. (line 6)
22893 * memory references, x86-64: i386-Memory. (line 6)
22894 * memory-mapped registers, TIC54X: TIC54X-MMRegs. (line 6)
22895 * merging text and data sections: R. (line 6)
22896 * messages from assembler: Errors. (line 6)
22897 * MicroBlaze architectures: MicroBlaze-Dependent.
22899 * MicroBlaze directives: MicroBlaze Directives.
22901 * MicroBlaze line comment character: MicroBlaze-Chars. (line 6)
22902 * MicroBlaze line separator: MicroBlaze-Chars. (line 14)
22903 * MicroBlaze support: MicroBlaze-Dependent.
22905 * minus, permitted arguments: Infix Ops. (line 49)
22906 * MIPS architecture options: MIPS Opts. (line 29)
22907 * MIPS big-endian output: MIPS Opts. (line 13)
22908 * MIPS CPU override: MIPS ISA. (line 18)
22909 * MIPS debugging directives: MIPS Stabs. (line 6)
22910 * MIPS DSP Release 1 instruction generation override: MIPS ASE instruction generation overrides.
22912 * MIPS DSP Release 2 instruction generation override: MIPS ASE instruction generation overrides.
22914 * MIPS ECOFF sections: MIPS Object. (line 6)
22915 * MIPS endianness: Overview. (line 693)
22916 * MIPS ISA: Overview. (line 699)
22917 * MIPS ISA override: MIPS ISA. (line 6)
22918 * MIPS line comment character: MIPS-Chars. (line 6)
22919 * MIPS line separator: MIPS-Chars. (line 14)
22920 * MIPS little-endian output: MIPS Opts. (line 13)
22921 * MIPS MCU instruction generation override: MIPS ASE instruction generation overrides.
22923 * MIPS MDMX instruction generation override: MIPS ASE instruction generation overrides.
22925 * MIPS MIPS-3D instruction generation override: MIPS ASE instruction generation overrides.
22927 * MIPS MT instruction generation override: MIPS ASE instruction generation overrides.
22929 * MIPS option stack: MIPS option stack. (line 6)
22930 * MIPS processor: MIPS-Dependent. (line 6)
22931 * MIT: M68K-Syntax. (line 6)
22932 * mlib directive, TIC54X: TIC54X-Directives. (line 159)
22933 * mlist directive, TIC54X: TIC54X-Directives. (line 164)
22934 * MMIX assembler directive BSPEC: MMIX-Pseudos. (line 131)
22935 * MMIX assembler directive BYTE: MMIX-Pseudos. (line 97)
22936 * MMIX assembler directive ESPEC: MMIX-Pseudos. (line 131)
22937 * MMIX assembler directive GREG: MMIX-Pseudos. (line 50)
22938 * MMIX assembler directive IS: MMIX-Pseudos. (line 42)
22939 * MMIX assembler directive LOC: MMIX-Pseudos. (line 7)
22940 * MMIX assembler directive LOCAL: MMIX-Pseudos. (line 28)
22941 * MMIX assembler directive OCTA: MMIX-Pseudos. (line 108)
22942 * MMIX assembler directive PREFIX: MMIX-Pseudos. (line 120)
22943 * MMIX assembler directive TETRA: MMIX-Pseudos. (line 108)
22944 * MMIX assembler directive WYDE: MMIX-Pseudos. (line 108)
22945 * MMIX assembler directives: MMIX-Pseudos. (line 6)
22946 * MMIX line comment characters: MMIX-Chars. (line 6)
22947 * MMIX options: MMIX-Opts. (line 6)
22948 * MMIX pseudo-op BSPEC: MMIX-Pseudos. (line 131)
22949 * MMIX pseudo-op BYTE: MMIX-Pseudos. (line 97)
22950 * MMIX pseudo-op ESPEC: MMIX-Pseudos. (line 131)
22951 * MMIX pseudo-op GREG: MMIX-Pseudos. (line 50)
22952 * MMIX pseudo-op IS: MMIX-Pseudos. (line 42)
22953 * MMIX pseudo-op LOC: MMIX-Pseudos. (line 7)
22954 * MMIX pseudo-op LOCAL: MMIX-Pseudos. (line 28)
22955 * MMIX pseudo-op OCTA: MMIX-Pseudos. (line 108)
22956 * MMIX pseudo-op PREFIX: MMIX-Pseudos. (line 120)
22957 * MMIX pseudo-op TETRA: MMIX-Pseudos. (line 108)
22958 * MMIX pseudo-op WYDE: MMIX-Pseudos. (line 108)
22959 * MMIX pseudo-ops: MMIX-Pseudos. (line 6)
22960 * MMIX register names: MMIX-Regs. (line 6)
22961 * MMIX support: MMIX-Dependent. (line 6)
22962 * mmixal differences: MMIX-mmixal. (line 6)
22963 * mmregs directive, TIC54X: TIC54X-Directives. (line 169)
22964 * mmsg directive, TIC54X: TIC54X-Directives. (line 77)
22965 * MMX, i386: i386-SIMD. (line 6)
22966 * MMX, x86-64: i386-SIMD. (line 6)
22967 * mnemonic compatibility, i386: i386-Mnemonics. (line 62)
22968 * mnemonic suffixes, i386: i386-Variations. (line 29)
22969 * mnemonic suffixes, x86-64: i386-Variations. (line 29)
22970 * mnemonics for opcodes, VAX: VAX-opcodes. (line 6)
22971 * mnemonics, AVR: AVR Opcodes. (line 6)
22972 * mnemonics, D10V: D10V-Opcodes. (line 6)
22973 * mnemonics, D30V: D30V-Opcodes. (line 6)
22974 * mnemonics, H8/300: H8/300 Opcodes. (line 6)
22975 * mnemonics, LM32: LM32 Opcodes. (line 6)
22976 * mnemonics, SH: SH Opcodes. (line 6)
22977 * mnemonics, SH64: SH64 Opcodes. (line 6)
22978 * mnemonics, Z8000: Z8000 Opcodes. (line 6)
22979 * mnolist directive, TIC54X: TIC54X-Directives. (line 164)
22980 * modifiers, M32C: M32C-Modifiers. (line 6)
22981 * Motorola syntax for the 680x0: M68K-Moto-Syntax. (line 6)
22982 * MOVI instructions, relaxation: Xtensa Immediate Relaxation.
22984 * MOVW and MOVT relocations, ARM: ARM-Relocations. (line 20)
22985 * MRI compatibility mode: M. (line 6)
22986 * mri directive: MRI. (line 6)
22987 * MRI mode, temporarily: MRI. (line 6)
22988 * MSP 430 floating point (IEEE): MSP430 Floating Point.
22990 * MSP 430 identifiers: MSP430-Chars. (line 17)
22991 * MSP 430 line comment character: MSP430-Chars. (line 6)
22992 * MSP 430 line separator: MSP430-Chars. (line 14)
22993 * MSP 430 machine directives: MSP430 Directives. (line 6)
22994 * MSP 430 macros: MSP430-Macros. (line 6)
22995 * MSP 430 opcodes: MSP430 Opcodes. (line 6)
22996 * MSP 430 options (none): MSP430 Options. (line 6)
22997 * MSP 430 profiling capability: MSP430 Profiling Capability.
22999 * MSP 430 register names: MSP430-Regs. (line 6)
23000 * MSP 430 support: MSP430-Dependent. (line 6)
23001 * MSP430 Assembler Extensions: MSP430-Ext. (line 6)
23002 * mul instruction, i386: i386-Notes. (line 6)
23003 * mul instruction, x86-64: i386-Notes. (line 6)
23004 * N32K support: NS32K-Dependent. (line 6)
23005 * name: Z8000 Directives. (line 18)
23006 * named section: Section. (line 6)
23007 * named sections: Ld Sections. (line 8)
23008 * names, symbol: Symbol Names. (line 6)
23009 * naming object file: o. (line 6)
23010 * new page, in listings: Eject. (line 6)
23011 * newblock directive, TIC54X: TIC54X-Directives. (line 175)
23012 * newline (\n): Strings. (line 21)
23013 * newline, required at file end: Statements. (line 14)
23014 * no-absolute-literals directive: Absolute Literals Directive.
23016 * no-longcalls directive: Longcalls Directive. (line 6)
23017 * no-schedule directive: Schedule Directive. (line 6)
23018 * no-transform directive: Transform Directive. (line 6)
23019 * nolist directive: Nolist. (line 6)
23020 * nolist directive, TIC54X: TIC54X-Directives. (line 131)
23021 * NOP pseudo op, ARM: ARM Opcodes. (line 9)
23022 * notes for Alpha: Alpha Notes. (line 6)
23023 * NS32K line comment character: NS32K-Chars. (line 6)
23024 * NS32K line separator: NS32K-Chars. (line 18)
23025 * null-terminated strings: Asciz. (line 6)
23026 * number constants: Numbers. (line 6)
23027 * number of macros executed: Macro. (line 143)
23028 * numbered subsections: Sub-Sections. (line 6)
23029 * numbers, 16-bit: hword. (line 6)
23030 * numeric values: Expressions. (line 6)
23031 * nword directive, SPARC: Sparc-Directives. (line 20)
23032 * object attributes: Object Attributes. (line 6)
23033 * object file: Object. (line 6)
23034 * object file format: Object Formats. (line 6)
23035 * object file name: o. (line 6)
23036 * object file, after errors: Z. (line 6)
23037 * obsolescent directives: Deprecated. (line 6)
23038 * octa directive: Octa. (line 6)
23039 * octal character code (\DDD): Strings. (line 30)
23040 * octal integers: Integers. (line 9)
23041 * offset directive: Offset. (line 6)
23042 * offset directive, V850: V850 Directives. (line 6)
23043 * opcode mnemonics, VAX: VAX-opcodes. (line 6)
23044 * opcode names, TILE-Gx: TILE-Gx Opcodes. (line 6)
23045 * opcode names, TILEPro: TILEPro Opcodes. (line 6)
23046 * opcode names, Xtensa: Xtensa Opcodes. (line 6)
23047 * opcode summary, AVR: AVR Opcodes. (line 6)
23048 * opcode summary, D10V: D10V-Opcodes. (line 6)
23049 * opcode summary, D30V: D30V-Opcodes. (line 6)
23050 * opcode summary, H8/300: H8/300 Opcodes. (line 6)
23051 * opcode summary, LM32: LM32 Opcodes. (line 6)
23052 * opcode summary, SH: SH Opcodes. (line 6)
23053 * opcode summary, SH64: SH64 Opcodes. (line 6)
23054 * opcode summary, Z8000: Z8000 Opcodes. (line 6)
23055 * opcodes for ARC: ARC Opcodes. (line 6)
23056 * opcodes for ARM: ARM Opcodes. (line 6)
23057 * opcodes for MSP 430: MSP430 Opcodes. (line 6)
23058 * opcodes for V850: V850 Opcodes. (line 6)
23059 * opcodes, i860: Opcodes for i860. (line 6)
23060 * opcodes, i960: Opcodes for i960. (line 6)
23061 * opcodes, M680x0: M68K-opcodes. (line 6)
23062 * opcodes, M68HC11: M68HC11-opcodes. (line 6)
23063 * operand delimiters, i386: i386-Variations. (line 15)
23064 * operand delimiters, x86-64: i386-Variations. (line 15)
23065 * operand notation, VAX: VAX-operands. (line 6)
23066 * operands in expressions: Arguments. (line 6)
23067 * operator precedence: Infix Ops. (line 11)
23068 * operators, in expressions: Operators. (line 6)
23069 * operators, permitted arguments: Infix Ops. (line 6)
23070 * optimization, D10V: Overview. (line 469)
23071 * optimization, D30V: Overview. (line 474)
23072 * optimizations: Xtensa Optimizations.
23074 * option directive, ARC: ARC Directives. (line 162)
23075 * option directive, TIC54X: TIC54X-Directives. (line 179)
23076 * option summary: Overview. (line 6)
23077 * options for Alpha: Alpha Options. (line 6)
23078 * options for ARC (none): ARC Options. (line 6)
23079 * options for ARM (none): ARM Options. (line 6)
23080 * options for AVR (none): AVR Options. (line 6)
23081 * options for Blackfin (none): Blackfin Options. (line 6)
23082 * options for i386: i386-Options. (line 6)
23083 * options for IA-64: IA-64 Options. (line 6)
23084 * options for LM32 (none): LM32 Options. (line 6)
23085 * options for MSP430 (none): MSP430 Options. (line 6)
23086 * options for PDP-11: PDP-11-Options. (line 6)
23087 * options for PowerPC: PowerPC-Opts. (line 6)
23088 * options for s390: s390 Options. (line 6)
23089 * options for SCORE: SCORE-Opts. (line 6)
23090 * options for SPARC: Sparc-Opts. (line 6)
23091 * options for TIC6X: TIC6X Options. (line 6)
23092 * options for V850 (none): V850 Options. (line 6)
23093 * options for VAX/VMS: VAX-Opts. (line 42)
23094 * options for x86-64: i386-Options. (line 6)
23095 * options for Z80: Z80 Options. (line 6)
23096 * options, all versions of assembler: Invoking. (line 6)
23097 * options, command line: Command Line. (line 13)
23098 * options, CRIS: CRIS-Opts. (line 6)
23099 * options, D10V: D10V-Opts. (line 6)
23100 * options, D30V: D30V-Opts. (line 6)
23101 * options, H8/300: H8/300 Options. (line 6)
23102 * options, i960: Options-i960. (line 6)
23103 * options, IP2K: IP2K-Opts. (line 6)
23104 * options, M32C: M32C-Opts. (line 6)
23105 * options, M32R: M32R-Opts. (line 6)
23106 * options, M680x0: M68K-Opts. (line 6)
23107 * options, M68HC11: M68HC11-Opts. (line 6)
23108 * options, MMIX: MMIX-Opts. (line 6)
23109 * options, PJ: PJ Options. (line 6)
23110 * options, RX: RX-Opts. (line 6)
23111 * options, SH: SH Options. (line 6)
23112 * options, SH64: SH64 Options. (line 6)
23113 * options, TIC54X: TIC54X-Opts. (line 6)
23114 * options, Z8000: Z8000 Options. (line 6)
23115 * org directive: Org. (line 6)
23116 * other attribute, of a.out symbol: Symbol Other. (line 6)
23117 * output file: Object. (line 6)
23118 * p2align directive: P2align. (line 6)
23119 * p2alignl directive: P2align. (line 28)
23120 * p2alignw directive: P2align. (line 28)
23121 * padding the location counter: Align. (line 6)
23122 * padding the location counter given a power of two: P2align. (line 6)
23123 * padding the location counter given number of bytes: Balign. (line 6)
23124 * page, in listings: Eject. (line 6)
23125 * paper size, for listings: Psize. (line 6)
23126 * paths for .include: I. (line 6)
23127 * patterns, writing in memory: Fill. (line 6)
23128 * PDP-11 comments: PDP-11-Syntax. (line 16)
23129 * PDP-11 floating-point register syntax: PDP-11-Syntax. (line 13)
23130 * PDP-11 general-purpose register syntax: PDP-11-Syntax. (line 10)
23131 * PDP-11 instruction naming: PDP-11-Mnemonics. (line 6)
23132 * PDP-11 line separator: PDP-11-Syntax. (line 19)
23133 * PDP-11 support: PDP-11-Dependent. (line 6)
23134 * PDP-11 syntax: PDP-11-Syntax. (line 6)
23135 * PIC code generation for ARM: ARM Options. (line 164)
23136 * PIC code generation for M32R: M32R-Opts. (line 42)
23137 * PIC selection, MIPS: MIPS Opts. (line 21)
23138 * PJ endianness: Overview. (line 600)
23139 * PJ line comment character: PJ-Chars. (line 6)
23140 * PJ line separator: PJ-Chars. (line 14)
23141 * PJ options: PJ Options. (line 6)
23142 * PJ support: PJ-Dependent. (line 6)
23143 * plus, permitted arguments: Infix Ops. (line 44)
23144 * popsection directive: PopSection. (line 6)
23145 * Position-independent code, CRIS: CRIS-Opts. (line 27)
23146 * Position-independent code, symbols in, CRIS: CRIS-Pic. (line 6)
23147 * PowerPC architectures: PowerPC-Opts. (line 6)
23148 * PowerPC directives: PowerPC-Pseudo. (line 6)
23149 * PowerPC line comment character: PowerPC-Chars. (line 6)
23150 * PowerPC line separator: PowerPC-Chars. (line 18)
23151 * PowerPC options: PowerPC-Opts. (line 6)
23152 * PowerPC support: PPC-Dependent. (line 6)
23153 * precedence of operators: Infix Ops. (line 11)
23154 * precision, floating point: Flonums. (line 6)
23155 * prefix operators: Prefix Ops. (line 6)
23156 * prefixes, i386: i386-Prefixes. (line 6)
23157 * preprocessing: Preprocessing. (line 6)
23158 * preprocessing, turning on and off: Preprocessing. (line 27)
23159 * previous directive: Previous. (line 6)
23160 * primary attributes, COFF symbols: COFF Symbols. (line 13)
23161 * print directive: Print. (line 6)
23162 * proc directive, SPARC: Sparc-Directives. (line 25)
23163 * profiler directive, MSP 430: MSP430 Directives. (line 22)
23164 * profiling capability for MSP 430: MSP430 Profiling Capability.
23166 * protected directive: Protected. (line 6)
23167 * pseudo-op .arch, CRIS: CRIS-Pseudos. (line 45)
23168 * pseudo-op .dword, CRIS: CRIS-Pseudos. (line 12)
23169 * pseudo-op .syntax, CRIS: CRIS-Pseudos. (line 17)
23170 * pseudo-op BSPEC, MMIX: MMIX-Pseudos. (line 131)
23171 * pseudo-op BYTE, MMIX: MMIX-Pseudos. (line 97)
23172 * pseudo-op ESPEC, MMIX: MMIX-Pseudos. (line 131)
23173 * pseudo-op GREG, MMIX: MMIX-Pseudos. (line 50)
23174 * pseudo-op IS, MMIX: MMIX-Pseudos. (line 42)
23175 * pseudo-op LOC, MMIX: MMIX-Pseudos. (line 7)
23176 * pseudo-op LOCAL, MMIX: MMIX-Pseudos. (line 28)
23177 * pseudo-op OCTA, MMIX: MMIX-Pseudos. (line 108)
23178 * pseudo-op PREFIX, MMIX: MMIX-Pseudos. (line 120)
23179 * pseudo-op TETRA, MMIX: MMIX-Pseudos. (line 108)
23180 * pseudo-op WYDE, MMIX: MMIX-Pseudos. (line 108)
23181 * pseudo-opcodes for XStormy16: XStormy16 Opcodes. (line 6)
23182 * pseudo-opcodes, M680x0: M68K-Branch. (line 6)
23183 * pseudo-opcodes, M68HC11: M68HC11-Branch. (line 6)
23184 * pseudo-ops for branch, VAX: VAX-branch. (line 6)
23185 * pseudo-ops, CRIS: CRIS-Pseudos. (line 6)
23186 * pseudo-ops, machine independent: Pseudo Ops. (line 6)
23187 * pseudo-ops, MMIX: MMIX-Pseudos. (line 6)
23188 * psize directive: Psize. (line 6)
23189 * PSR bits: IA-64-Bits. (line 6)
23190 * pstring directive, TIC54X: TIC54X-Directives. (line 208)
23191 * psw register, V850: V850-Regs. (line 116)
23192 * purgem directive: Purgem. (line 6)
23193 * purpose of GNU assembler: GNU Assembler. (line 12)
23194 * pushsection directive: PushSection. (line 6)
23195 * quad directive: Quad. (line 6)
23196 * quad directive, i386: i386-Float. (line 21)
23197 * quad directive, x86-64: i386-Float. (line 21)
23198 * real-mode code, i386: i386-16bit. (line 6)
23199 * ref directive, TIC54X: TIC54X-Directives. (line 103)
23200 * register directive, SPARC: Sparc-Directives. (line 29)
23201 * register names, Alpha: Alpha-Regs. (line 6)
23202 * register names, ARC: ARC-Regs. (line 6)
23203 * register names, ARM: ARM-Regs. (line 6)
23204 * register names, AVR: AVR-Regs. (line 6)
23205 * register names, CRIS: CRIS-Regs. (line 6)
23206 * register names, H8/300: H8/300-Regs. (line 6)
23207 * register names, IA-64: IA-64-Regs. (line 6)
23208 * register names, LM32: LM32-Regs. (line 6)
23209 * register names, MMIX: MMIX-Regs. (line 6)
23210 * register names, MSP 430: MSP430-Regs. (line 6)
23211 * register names, Sparc: Sparc-Regs. (line 6)
23212 * register names, TILE-Gx: TILE-Gx Registers. (line 6)
23213 * register names, TILEPro: TILEPro Registers. (line 6)
23214 * register names, V850: V850-Regs. (line 6)
23215 * register names, VAX: VAX-operands. (line 17)
23216 * register names, Xtensa: Xtensa Registers. (line 6)
23217 * register names, Z80: Z80-Regs. (line 6)
23218 * register naming, s390: s390 Register. (line 6)
23219 * register operands, i386: i386-Variations. (line 15)
23220 * register operands, x86-64: i386-Variations. (line 15)
23221 * registers, D10V: D10V-Regs. (line 6)
23222 * registers, D30V: D30V-Regs. (line 6)
23223 * registers, i386: i386-Regs. (line 6)
23224 * registers, SH: SH-Regs. (line 6)
23225 * registers, SH64: SH64-Regs. (line 6)
23226 * registers, TIC54X memory-mapped: TIC54X-MMRegs. (line 6)
23227 * registers, x86-64: i386-Regs. (line 6)
23228 * registers, Z8000: Z8000-Regs. (line 6)
23229 * relaxation: Xtensa Relaxation. (line 6)
23230 * relaxation of ADDI instructions: Xtensa Immediate Relaxation.
23232 * relaxation of branch instructions: Xtensa Branch Relaxation.
23234 * relaxation of call instructions: Xtensa Call Relaxation.
23236 * relaxation of immediate fields: Xtensa Immediate Relaxation.
23238 * relaxation of L16SI instructions: Xtensa Immediate Relaxation.
23240 * relaxation of L16UI instructions: Xtensa Immediate Relaxation.
23242 * relaxation of L32I instructions: Xtensa Immediate Relaxation.
23244 * relaxation of L8UI instructions: Xtensa Immediate Relaxation.
23246 * relaxation of MOVI instructions: Xtensa Immediate Relaxation.
23248 * reloc directive: Reloc. (line 6)
23249 * relocation: Sections. (line 6)
23250 * relocation example: Ld Sections. (line 40)
23251 * relocations, Alpha: Alpha-Relocs. (line 6)
23252 * relocations, Sparc: Sparc-Relocs. (line 6)
23253 * repeat prefixes, i386: i386-Prefixes. (line 44)
23254 * reporting bugs in assembler: Reporting Bugs. (line 6)
23255 * rept directive: Rept. (line 6)
23256 * reserve directive, SPARC: Sparc-Directives. (line 39)
23257 * return instructions, i386: i386-Variations. (line 41)
23258 * return instructions, x86-64: i386-Variations. (line 41)
23259 * REX prefixes, i386: i386-Prefixes. (line 46)
23260 * rsect: Z8000 Directives. (line 52)
23261 * RX assembler directive .3byte: RX-Directives. (line 9)
23262 * RX assembler directives: RX-Directives. (line 6)
23263 * RX floating point: RX-Float. (line 6)
23264 * RX line comment character: RX-Chars. (line 6)
23265 * RX line separator: RX-Chars. (line 14)
23266 * RX modifiers: RX-Modifiers. (line 6)
23267 * RX options: RX-Opts. (line 6)
23268 * RX support: RX-Dependent. (line 6)
23269 * s390 floating point: s390 Floating Point. (line 6)
23270 * s390 instruction aliases: s390 Aliases. (line 6)
23271 * s390 instruction formats: s390 Formats. (line 6)
23272 * s390 instruction marker: s390 Instruction Marker.
23274 * s390 instruction mnemonics: s390 Mnemonics. (line 6)
23275 * s390 instruction operand modifier: s390 Operand Modifier.
23277 * s390 instruction operands: s390 Operands. (line 6)
23278 * s390 instruction syntax: s390 Syntax. (line 6)
23279 * s390 line comment character: s390 Characters. (line 6)
23280 * s390 line separator: s390 Characters. (line 13)
23281 * s390 literal pool entries: s390 Literal Pool Entries.
23283 * s390 options: s390 Options. (line 6)
23284 * s390 register naming: s390 Register. (line 6)
23285 * s390 support: S/390-Dependent. (line 6)
23286 * sblock directive, TIC54X: TIC54X-Directives. (line 182)
23287 * sbttl directive: Sbttl. (line 6)
23288 * schedule directive: Schedule Directive. (line 6)
23289 * scl directive: Scl. (line 6)
23290 * SCORE architectures: SCORE-Opts. (line 6)
23291 * SCORE directives: SCORE-Pseudo. (line 6)
23292 * SCORE line comment character: SCORE-Chars. (line 6)
23293 * SCORE line separator: SCORE-Chars. (line 14)
23294 * SCORE options: SCORE-Opts. (line 6)
23295 * SCORE processor: SCORE-Dependent. (line 6)
23296 * sdaoff pseudo-op, V850: V850 Opcodes. (line 65)
23297 * search path for .include: I. (line 6)
23298 * sect directive, MSP 430: MSP430 Directives. (line 18)
23299 * sect directive, TIC54X: TIC54X-Directives. (line 188)
23300 * section directive (COFF version): Section. (line 16)
23301 * section directive (ELF version): Section. (line 73)
23302 * section directive, V850: V850 Directives. (line 9)
23303 * section override prefixes, i386: i386-Prefixes. (line 23)
23304 * Section Stack <1>: PopSection. (line 6)
23305 * Section Stack <2>: Section. (line 68)
23306 * Section Stack <3>: Previous. (line 6)
23307 * Section Stack <4>: SubSection. (line 6)
23308 * Section Stack: PushSection. (line 6)
23309 * section-relative addressing: Secs Background. (line 68)
23310 * sections: Sections. (line 6)
23311 * sections in messages, internal: As Sections. (line 6)
23312 * sections, i386: i386-Variations. (line 47)
23313 * sections, named: Ld Sections. (line 8)
23314 * sections, x86-64: i386-Variations. (line 47)
23315 * seg directive, SPARC: Sparc-Directives. (line 44)
23316 * segm: Z8000 Directives. (line 10)
23317 * set directive: Set. (line 6)
23318 * set directive, TIC54X: TIC54X-Directives. (line 191)
23319 * SH addressing modes: SH-Addressing. (line 6)
23320 * SH floating point (IEEE): SH Floating Point. (line 6)
23321 * SH line comment character: SH-Chars. (line 6)
23322 * SH line separator: SH-Chars. (line 8)
23323 * SH machine directives: SH Directives. (line 6)
23324 * SH opcode summary: SH Opcodes. (line 6)
23325 * SH options: SH Options. (line 6)
23326 * SH registers: SH-Regs. (line 6)
23327 * SH support: SH-Dependent. (line 6)
23328 * SH64 ABI options: SH64 Options. (line 29)
23329 * SH64 addressing modes: SH64-Addressing. (line 6)
23330 * SH64 ISA options: SH64 Options. (line 6)
23331 * SH64 line comment character: SH64-Chars. (line 6)
23332 * SH64 line separator: SH64-Chars. (line 13)
23333 * SH64 machine directives: SH64 Directives. (line 9)
23334 * SH64 opcode summary: SH64 Opcodes. (line 6)
23335 * SH64 options: SH64 Options. (line 6)
23336 * SH64 registers: SH64-Regs. (line 6)
23337 * SH64 support: SH64-Dependent. (line 6)
23338 * shigh directive, M32R: M32R-Directives. (line 26)
23339 * short directive: Short. (line 6)
23340 * short directive, ARC: ARC Directives. (line 171)
23341 * short directive, TIC54X: TIC54X-Directives. (line 111)
23342 * SIMD, i386: i386-SIMD. (line 6)
23343 * SIMD, x86-64: i386-SIMD. (line 6)
23344 * single character constant: Chars. (line 6)
23345 * single directive: Single. (line 6)
23346 * single directive, i386: i386-Float. (line 14)
23347 * single directive, x86-64: i386-Float. (line 14)
23348 * single quote, Z80: Z80-Chars. (line 20)
23349 * sixteen bit integers: hword. (line 6)
23350 * sixteen byte integer: Octa. (line 6)
23351 * size directive (COFF version): Size. (line 11)
23352 * size directive (ELF version): Size. (line 19)
23353 * size modifiers, D10V: D10V-Size. (line 6)
23354 * size modifiers, D30V: D30V-Size. (line 6)
23355 * size modifiers, M680x0: M68K-Syntax. (line 8)
23356 * size prefixes, i386: i386-Prefixes. (line 27)
23357 * size suffixes, H8/300: H8/300 Opcodes. (line 163)
23358 * size, translations, Sparc: Sparc-Size-Translations.
23360 * sizes operands, i386: i386-Variations. (line 29)
23361 * sizes operands, x86-64: i386-Variations. (line 29)
23362 * skip directive: Skip. (line 6)
23363 * skip directive, M680x0: M68K-Directives. (line 19)
23364 * skip directive, SPARC: Sparc-Directives. (line 48)
23365 * sleb128 directive: Sleb128. (line 6)
23366 * small objects, MIPS ECOFF: MIPS Object. (line 11)
23367 * SmartMIPS instruction generation override: MIPS ASE instruction generation overrides.
23369 * SOM symbol attributes: SOM Symbols. (line 6)
23370 * source program: Input Files. (line 6)
23371 * source, destination operands; i386: i386-Variations. (line 22)
23372 * source, destination operands; x86-64: i386-Variations. (line 22)
23373 * sp register: Xtensa Registers. (line 6)
23374 * sp register, V850: V850-Regs. (line 14)
23375 * space directive: Space. (line 6)
23376 * space directive, TIC54X: TIC54X-Directives. (line 196)
23377 * space used, maximum for assembly: statistics. (line 6)
23378 * SPARC architectures: Sparc-Opts. (line 6)
23379 * Sparc constants: Sparc-Constants. (line 6)
23380 * SPARC data alignment: Sparc-Aligned-Data. (line 6)
23381 * SPARC floating point (IEEE): Sparc-Float. (line 6)
23382 * Sparc line comment character: Sparc-Chars. (line 6)
23383 * Sparc line separator: Sparc-Chars. (line 14)
23384 * SPARC machine directives: Sparc-Directives. (line 6)
23385 * SPARC options: Sparc-Opts. (line 6)
23386 * Sparc registers: Sparc-Regs. (line 6)
23387 * Sparc relocations: Sparc-Relocs. (line 6)
23388 * Sparc size translations: Sparc-Size-Translations.
23390 * SPARC support: Sparc-Dependent. (line 6)
23391 * SPARC syntax: Sparc-Aligned-Data. (line 21)
23392 * special characters, M680x0: M68K-Chars. (line 6)
23393 * special purpose registers, MSP 430: MSP430-Regs. (line 11)
23394 * sslist directive, TIC54X: TIC54X-Directives. (line 203)
23395 * ssnolist directive, TIC54X: TIC54X-Directives. (line 203)
23396 * stabd directive: Stab. (line 38)
23397 * stabn directive: Stab. (line 48)
23398 * stabs directive: Stab. (line 51)
23399 * stabX directives: Stab. (line 6)
23400 * standard assembler sections: Secs Background. (line 27)
23401 * standard input, as input file: Command Line. (line 10)
23402 * statement separator character: Statements. (line 6)
23403 * statement separator, Alpha: Alpha-Chars. (line 11)
23404 * statement separator, ARC: ARC-Chars. (line 12)
23405 * statement separator, ARM: ARM-Chars. (line 14)
23406 * statement separator, AVR: AVR-Chars. (line 14)
23407 * statement separator, CR16: CR16-Chars. (line 13)
23408 * statement separator, H8/300: H8/300-Chars. (line 8)
23409 * statement separator, i386: i386-Chars. (line 18)
23410 * statement separator, i860: i860-Chars. (line 14)
23411 * statement separator, i960: i960-Chars. (line 14)
23412 * statement separator, IA-64: IA-64-Chars. (line 8)
23413 * statement separator, IP2K: IP2K-Chars. (line 14)
23414 * statement separator, LM32: LM32-Chars. (line 12)
23415 * statement separator, M32C: M32C-Chars. (line 14)
23416 * statement separator, M68HC11: M68HC11-Syntax. (line 27)
23417 * statement separator, MicroBlaze: MicroBlaze-Chars. (line 14)
23418 * statement separator, MIPS: MIPS-Chars. (line 14)
23419 * statement separator, MSP 430: MSP430-Chars. (line 14)
23420 * statement separator, NS32K: NS32K-Chars. (line 18)
23421 * statement separator, PJ: PJ-Chars. (line 14)
23422 * statement separator, PowerPC: PowerPC-Chars. (line 18)
23423 * statement separator, RX: RX-Chars. (line 14)
23424 * statement separator, s390: s390 Characters. (line 13)
23425 * statement separator, SCORE: SCORE-Chars. (line 14)
23426 * statement separator, SH: SH-Chars. (line 8)
23427 * statement separator, SH64: SH64-Chars. (line 13)
23428 * statement separator, Sparc: Sparc-Chars. (line 14)
23429 * statement separator, TIC54X: TIC54X-Chars. (line 17)
23430 * statement separator, TIC6X: TIC6X Syntax. (line 13)
23431 * statement separator, V850: V850-Chars. (line 13)
23432 * statement separator, VAX: VAX-Chars. (line 14)
23433 * statement separator, XStormy16: XStormy16-Chars. (line 14)
23434 * statement separator, Z80: Z80-Chars. (line 13)
23435 * statement separator, Z8000: Z8000-Chars. (line 13)
23436 * statements, structure of: Statements. (line 6)
23437 * statistics, about assembly: statistics. (line 6)
23438 * stopping the assembly: Abort. (line 6)
23439 * string constants: Strings. (line 6)
23440 * string directive: String. (line 8)
23441 * string directive on HPPA: HPPA Directives. (line 137)
23442 * string directive, TIC54X: TIC54X-Directives. (line 208)
23443 * string literals: Ascii. (line 6)
23444 * string, copying to object file: String. (line 8)
23445 * string16 directive: String. (line 8)
23446 * string16, copying to object file: String. (line 8)
23447 * string32 directive: String. (line 8)
23448 * string32, copying to object file: String. (line 8)
23449 * string64 directive: String. (line 8)
23450 * string64, copying to object file: String. (line 8)
23451 * string8 directive: String. (line 8)
23452 * string8, copying to object file: String. (line 8)
23453 * struct directive: Struct. (line 6)
23454 * struct directive, TIC54X: TIC54X-Directives. (line 216)
23455 * structure debugging, COFF: Tag. (line 6)
23456 * sub-instruction ordering, D10V: D10V-Chars. (line 14)
23457 * sub-instruction ordering, D30V: D30V-Chars. (line 14)
23458 * sub-instructions, D10V: D10V-Subs. (line 6)
23459 * sub-instructions, D30V: D30V-Subs. (line 6)
23460 * subexpressions: Arguments. (line 24)
23461 * subsection directive: SubSection. (line 6)
23462 * subsym builtins, TIC54X: TIC54X-Macros. (line 16)
23463 * subtitles for listings: Sbttl. (line 6)
23464 * subtraction, permitted arguments: Infix Ops. (line 49)
23465 * summary of options: Overview. (line 6)
23466 * support: HPPA-Dependent. (line 6)
23467 * supporting files, including: Include. (line 6)
23468 * suppressing warnings: W. (line 11)
23469 * sval: Z8000 Directives. (line 33)
23470 * symbol attributes: Symbol Attributes. (line 6)
23471 * symbol attributes, a.out: a.out Symbols. (line 6)
23472 * symbol attributes, COFF: COFF Symbols. (line 6)
23473 * symbol attributes, SOM: SOM Symbols. (line 6)
23474 * symbol descriptor, COFF: Desc. (line 6)
23475 * symbol modifiers <1>: RX-Modifiers. (line 11)
23476 * symbol modifiers <2>: LM32-Modifiers. (line 12)
23477 * symbol modifiers <3>: AVR-Modifiers. (line 12)
23478 * symbol modifiers <4>: M68HC11-Modifiers. (line 12)
23479 * symbol modifiers: M32C-Modifiers. (line 11)
23480 * symbol modifiers, TILE-Gx: TILE-Gx Modifiers. (line 6)
23481 * symbol modifiers, TILEPro: TILEPro Modifiers. (line 6)
23482 * symbol names: Symbol Names. (line 6)
23483 * symbol names, $ in <1>: D30V-Chars. (line 70)
23484 * symbol names, $ in <2>: D10V-Chars. (line 53)
23485 * symbol names, $ in <3>: SH64-Chars. (line 15)
23486 * symbol names, $ in: SH-Chars. (line 15)
23487 * symbol names, local: Symbol Names. (line 22)
23488 * symbol names, temporary: Symbol Names. (line 35)
23489 * symbol storage class (COFF): Scl. (line 6)
23490 * symbol type: Symbol Type. (line 6)
23491 * symbol type, COFF: Type. (line 11)
23492 * symbol type, ELF: Type. (line 22)
23493 * symbol value: Symbol Value. (line 6)
23494 * symbol value, setting: Set. (line 6)
23495 * symbol values, assigning: Setting Symbols. (line 6)
23496 * symbol versioning: Symver. (line 6)
23497 * symbol, common: Comm. (line 6)
23498 * symbol, making visible to linker: Global. (line 6)
23499 * symbolic debuggers, information for: Stab. (line 6)
23500 * symbols: Symbols. (line 6)
23501 * Symbols in position-independent code, CRIS: CRIS-Pic. (line 6)
23502 * symbols with uppercase, VAX/VMS: VAX-Opts. (line 42)
23503 * symbols, assigning values to: Equ. (line 6)
23504 * Symbols, built-in, CRIS: CRIS-Symbols. (line 6)
23505 * Symbols, CRIS, built-in: CRIS-Symbols. (line 6)
23506 * symbols, local common: Lcomm. (line 6)
23507 * symver directive: Symver. (line 6)
23508 * syntax compatibility, i386: i386-Variations. (line 6)
23509 * syntax compatibility, x86-64: i386-Variations. (line 6)
23510 * syntax, AVR: AVR-Modifiers. (line 6)
23511 * syntax, Blackfin: Blackfin Syntax. (line 6)
23512 * syntax, D10V: D10V-Syntax. (line 6)
23513 * syntax, D30V: D30V-Syntax. (line 6)
23514 * syntax, LM32: LM32-Modifiers. (line 6)
23515 * syntax, M680x0: M68K-Syntax. (line 8)
23516 * syntax, M68HC11 <1>: M68HC11-Modifiers. (line 6)
23517 * syntax, M68HC11: M68HC11-Syntax. (line 6)
23518 * syntax, machine-independent: Syntax. (line 6)
23519 * syntax, RX: RX-Modifiers. (line 6)
23520 * syntax, SPARC: Sparc-Aligned-Data. (line 21)
23521 * syntax, TILE-Gx: TILE-Gx Syntax. (line 6)
23522 * syntax, TILEPro: TILEPro Syntax. (line 6)
23523 * syntax, Xtensa assembler: Xtensa Syntax. (line 6)
23524 * sysproc directive, i960: Directives-i960. (line 37)
23525 * tab (\t): Strings. (line 27)
23526 * tab directive, TIC54X: TIC54X-Directives. (line 247)
23527 * tag directive: Tag. (line 6)
23528 * tag directive, TIC54X: TIC54X-Directives. (line 250)
23529 * TBM, i386: i386-TBM. (line 6)
23530 * TBM, x86-64: i386-TBM. (line 6)
23531 * tdaoff pseudo-op, V850: V850 Opcodes. (line 81)
23532 * temporary symbol names: Symbol Names. (line 35)
23533 * text and data sections, joining: R. (line 6)
23534 * text directive: Text. (line 6)
23535 * text section: Ld Sections. (line 9)
23536 * tfloat directive, i386: i386-Float. (line 14)
23537 * tfloat directive, x86-64: i386-Float. (line 14)
23538 * Thumb support: ARM-Dependent. (line 6)
23539 * TIC54X builtin math functions: TIC54X-Builtins. (line 6)
23540 * TIC54X line comment character: TIC54X-Chars. (line 6)
23541 * TIC54X line separator: TIC54X-Chars. (line 17)
23542 * TIC54X machine directives: TIC54X-Directives. (line 6)
23543 * TIC54X memory-mapped registers: TIC54X-MMRegs. (line 6)
23544 * TIC54X options: TIC54X-Opts. (line 6)
23545 * TIC54X subsym builtins: TIC54X-Macros. (line 16)
23546 * TIC54X support: TIC54X-Dependent. (line 6)
23547 * TIC54X-specific macros: TIC54X-Macros. (line 6)
23548 * TIC6X big-endian output: TIC6X Options. (line 46)
23549 * TIC6X line comment character: TIC6X Syntax. (line 6)
23550 * TIC6X line separator: TIC6X Syntax. (line 13)
23551 * TIC6X little-endian output: TIC6X Options. (line 46)
23552 * TIC6X machine directives: TIC6X Directives. (line 6)
23553 * TIC6X options: TIC6X Options. (line 6)
23554 * TIC6X support: TIC6X-Dependent. (line 6)
23555 * TILE-Gx machine directives: TILE-Gx Directives. (line 6)
23556 * TILE-Gx modifiers: TILE-Gx Modifiers. (line 6)
23557 * TILE-Gx opcode names: TILE-Gx Opcodes. (line 6)
23558 * TILE-Gx register names: TILE-Gx Registers. (line 6)
23559 * TILE-Gx support: TILE-Gx-Dependent. (line 6)
23560 * TILE-Gx syntax: TILE-Gx Syntax. (line 6)
23561 * TILEPro machine directives: TILEPro Directives. (line 6)
23562 * TILEPro modifiers: TILEPro Modifiers. (line 6)
23563 * TILEPro opcode names: TILEPro Opcodes. (line 6)
23564 * TILEPro register names: TILEPro Registers. (line 6)
23565 * TILEPro support: TILEPro-Dependent. (line 6)
23566 * TILEPro syntax: TILEPro Syntax. (line 6)
23567 * time, total for assembly: statistics. (line 6)
23568 * title directive: Title. (line 6)
23569 * TMS320C6X support: TIC6X-Dependent. (line 6)
23570 * tp register, V850: V850-Regs. (line 20)
23571 * transform directive: Transform Directive. (line 6)
23572 * trusted compiler: f. (line 6)
23573 * turning preprocessing on and off: Preprocessing. (line 27)
23574 * type directive (COFF version): Type. (line 11)
23575 * type directive (ELF version): Type. (line 22)
23576 * type of a symbol: Symbol Type. (line 6)
23577 * ualong directive, SH: SH Directives. (line 6)
23578 * uaword directive, SH: SH Directives. (line 6)
23579 * ubyte directive, TIC54X: TIC54X-Directives. (line 36)
23580 * uchar directive, TIC54X: TIC54X-Directives. (line 36)
23581 * uhalf directive, TIC54X: TIC54X-Directives. (line 111)
23582 * uint directive, TIC54X: TIC54X-Directives. (line 111)
23583 * uleb128 directive: Uleb128. (line 6)
23584 * ulong directive, TIC54X: TIC54X-Directives. (line 135)
23585 * undefined section: Ld Sections. (line 36)
23586 * union directive, TIC54X: TIC54X-Directives. (line 250)
23587 * unsegm: Z8000 Directives. (line 14)
23588 * usect directive, TIC54X: TIC54X-Directives. (line 262)
23589 * ushort directive, TIC54X: TIC54X-Directives. (line 111)
23590 * uword directive, TIC54X: TIC54X-Directives. (line 111)
23591 * V850 command line options: V850 Options. (line 9)
23592 * V850 floating point (IEEE): V850 Floating Point. (line 6)
23593 * V850 line comment character: V850-Chars. (line 6)
23594 * V850 line separator: V850-Chars. (line 13)
23595 * V850 machine directives: V850 Directives. (line 6)
23596 * V850 opcodes: V850 Opcodes. (line 6)
23597 * V850 options (none): V850 Options. (line 6)
23598 * V850 register names: V850-Regs. (line 6)
23599 * V850 support: V850-Dependent. (line 6)
23600 * val directive: Val. (line 6)
23601 * value attribute, COFF: Val. (line 6)
23602 * value of a symbol: Symbol Value. (line 6)
23603 * var directive, TIC54X: TIC54X-Directives. (line 272)
23604 * VAX bitfields not supported: VAX-no. (line 6)
23605 * VAX branch improvement: VAX-branch. (line 6)
23606 * VAX command-line options ignored: VAX-Opts. (line 6)
23607 * VAX displacement sizing character: VAX-operands. (line 12)
23608 * VAX floating point: VAX-float. (line 6)
23609 * VAX immediate character: VAX-operands. (line 6)
23610 * VAX indirect character: VAX-operands. (line 9)
23611 * VAX line comment character: VAX-Chars. (line 6)
23612 * VAX line separator: VAX-Chars. (line 14)
23613 * VAX machine directives: VAX-directives. (line 6)
23614 * VAX opcode mnemonics: VAX-opcodes. (line 6)
23615 * VAX operand notation: VAX-operands. (line 6)
23616 * VAX register names: VAX-operands. (line 17)
23617 * VAX support: Vax-Dependent. (line 6)
23618 * Vax-11 C compatibility: VAX-Opts. (line 42)
23619 * VAX/VMS options: VAX-Opts. (line 42)
23620 * version directive: Version. (line 6)
23621 * version directive, TIC54X: TIC54X-Directives. (line 276)
23622 * version of assembler: v. (line 6)
23623 * versions of symbols: Symver. (line 6)
23624 * visibility <1>: Protected. (line 6)
23625 * visibility <2>: Hidden. (line 6)
23626 * visibility: Internal. (line 6)
23627 * VMS (VAX) options: VAX-Opts. (line 42)
23628 * vtable_entry directive: VTableEntry. (line 6)
23629 * vtable_inherit directive: VTableInherit. (line 6)
23630 * warning directive: Warning. (line 6)
23631 * warning for altered difference tables: K. (line 6)
23632 * warning messages: Errors. (line 6)
23633 * warnings, causing error: W. (line 16)
23634 * warnings, M32R: M32R-Warnings. (line 6)
23635 * warnings, suppressing: W. (line 11)
23636 * warnings, switching on: W. (line 19)
23637 * weak directive: Weak. (line 6)
23638 * weakref directive: Weakref. (line 6)
23639 * whitespace: Whitespace. (line 6)
23640 * whitespace, removed by preprocessor: Preprocessing. (line 7)
23641 * wide floating point directives, VAX: VAX-directives. (line 10)
23642 * width directive, TIC54X: TIC54X-Directives. (line 127)
23643 * Width of continuation lines of disassembly output: listing. (line 21)
23644 * Width of first line disassembly output: listing. (line 16)
23645 * Width of source line output: listing. (line 28)
23646 * wmsg directive, TIC54X: TIC54X-Directives. (line 77)
23647 * word directive: Word. (line 6)
23648 * word directive, ARC: ARC Directives. (line 174)
23649 * word directive, H8/300: H8/300 Directives. (line 6)
23650 * word directive, i386: i386-Float. (line 21)
23651 * word directive, SPARC: Sparc-Directives. (line 51)
23652 * word directive, TIC54X: TIC54X-Directives. (line 111)
23653 * word directive, x86-64: i386-Float. (line 21)
23654 * writing patterns in memory: Fill. (line 6)
23655 * wval: Z8000 Directives. (line 24)
23656 * x86 machine directives: i386-Directives. (line 6)
23657 * x86-64 arch directive: i386-Arch. (line 6)
23658 * x86-64 att_syntax pseudo op: i386-Variations. (line 6)
23659 * x86-64 conversion instructions: i386-Mnemonics. (line 37)
23660 * x86-64 floating point: i386-Float. (line 6)
23661 * x86-64 immediate operands: i386-Variations. (line 15)
23662 * x86-64 instruction naming: i386-Mnemonics. (line 6)
23663 * x86-64 intel_syntax pseudo op: i386-Variations. (line 6)
23664 * x86-64 jump optimization: i386-Jumps. (line 6)
23665 * x86-64 jump, call, return: i386-Variations. (line 41)
23666 * x86-64 jump/call operands: i386-Variations. (line 15)
23667 * x86-64 memory references: i386-Memory. (line 6)
23668 * x86-64 options: i386-Options. (line 6)
23669 * x86-64 register operands: i386-Variations. (line 15)
23670 * x86-64 registers: i386-Regs. (line 6)
23671 * x86-64 sections: i386-Variations. (line 47)
23672 * x86-64 size suffixes: i386-Variations. (line 29)
23673 * x86-64 source, destination operands: i386-Variations. (line 22)
23674 * x86-64 support: i386-Dependent. (line 6)
23675 * x86-64 syntax compatibility: i386-Variations. (line 6)
23676 * xfloat directive, TIC54X: TIC54X-Directives. (line 64)
23677 * xlong directive, TIC54X: TIC54X-Directives. (line 135)
23678 * XStormy16 comment character: XStormy16-Chars. (line 11)
23679 * XStormy16 line comment character: XStormy16-Chars. (line 6)
23680 * XStormy16 line separator: XStormy16-Chars. (line 14)
23681 * XStormy16 machine directives: XStormy16 Directives.
23683 * XStormy16 pseudo-opcodes: XStormy16 Opcodes. (line 6)
23684 * XStormy16 support: XSTORMY16-Dependent. (line 6)
23685 * Xtensa architecture: Xtensa-Dependent. (line 6)
23686 * Xtensa assembler syntax: Xtensa Syntax. (line 6)
23687 * Xtensa directives: Xtensa Directives. (line 6)
23688 * Xtensa opcode names: Xtensa Opcodes. (line 6)
23689 * Xtensa register names: Xtensa Registers. (line 6)
23690 * xword directive, SPARC: Sparc-Directives. (line 55)
23691 * Z80 $: Z80-Chars. (line 15)
23692 * Z80 ': Z80-Chars. (line 20)
23693 * Z80 floating point: Z80 Floating Point. (line 6)
23694 * Z80 line comment character: Z80-Chars. (line 6)
23695 * Z80 line separator: Z80-Chars. (line 13)
23696 * Z80 options: Z80 Options. (line 6)
23697 * Z80 registers: Z80-Regs. (line 6)
23698 * Z80 support: Z80-Dependent. (line 6)
23699 * Z80 Syntax: Z80 Options. (line 47)
23700 * Z80, \: Z80-Chars. (line 18)
23701 * Z80, case sensitivity: Z80-Case. (line 6)
23702 * Z80-only directives: Z80 Directives. (line 9)
23703 * Z800 addressing modes: Z8000-Addressing. (line 6)
23704 * Z8000 directives: Z8000 Directives. (line 6)
23705 * Z8000 line comment character: Z8000-Chars. (line 6)
23706 * Z8000 line separator: Z8000-Chars. (line 13)
23707 * Z8000 opcode summary: Z8000 Opcodes. (line 6)
23708 * Z8000 options: Z8000 Options. (line 6)
23709 * Z8000 registers: Z8000-Regs. (line 6)
23710 * Z8000 support: Z8000-Dependent. (line 6)
23711 * zdaoff pseudo-op, V850: V850 Opcodes. (line 99)
23712 * zero register, V850: V850-Regs. (line 7)
23713 * zero-terminated strings: Asciz. (line 6)
23719 Node: Overview
\7f1825
23720 Node: Manual
\7f31840
23721 Node: GNU Assembler
\7f32784
23722 Node: Object Formats
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24217 Node: TIC6X Options
\7f635438
24218 Node: TIC6X Syntax
\7f637439
24219 Node: TIC6X Directives
\7f638541
24220 Node: TILE-Gx-Dependent
\7f640842
24221 Node: TILE-Gx Options
\7f641152
24222 Node: TILE-Gx Syntax
\7f641408
24223 Node: TILE-Gx Opcodes
\7f643642
24224 Node: TILE-Gx Registers
\7f643930
24225 Node: TILE-Gx Modifiers
\7f644702
24226 Node: TILE-Gx Directives
\7f649850
24227 Node: TILEPro-Dependent
\7f650754
24228 Node: TILEPro Options
\7f651063
24229 Node: TILEPro Syntax
\7f651247
24230 Node: TILEPro Opcodes
\7f653481
24231 Node: TILEPro Registers
\7f653772
24232 Node: TILEPro Modifiers
\7f654542
24233 Node: TILEPro Directives
\7f658247
24234 Node: Z80-Dependent
\7f659151
24235 Node: Z80 Options
\7f659539
24236 Node: Z80 Syntax
\7f660962
24237 Node: Z80-Chars
\7f661634
24238 Node: Z80-Regs
\7f662484
24239 Node: Z80-Case
\7f662836
24240 Node: Z80 Floating Point
\7f663281
24241 Node: Z80 Directives
\7f663475
24242 Node: Z80 Opcodes
\7f665100
24243 Node: Z8000-Dependent
\7f666444
24244 Node: Z8000 Options
\7f667405
24245 Node: Z8000 Syntax
\7f667622
24246 Node: Z8000-Chars
\7f667912
24247 Node: Z8000-Regs
\7f668394
24248 Node: Z8000-Addressing
\7f669184
24249 Node: Z8000 Directives
\7f670301
24250 Node: Z8000 Opcodes
\7f671910
24251 Node: Vax-Dependent
\7f681852
24252 Node: VAX-Opts
\7f682412
24253 Node: VAX-float
\7f686147
24254 Node: VAX-directives
\7f686779
24255 Node: VAX-opcodes
\7f687640
24256 Node: VAX-branch
\7f688029
24257 Node: VAX-operands
\7f690536
24258 Node: VAX-no
\7f691299
24259 Node: VAX-Syntax
\7f691555
24260 Node: VAX-Chars
\7f691721
24261 Node: V850-Dependent
\7f692275
24262 Node: V850 Options
\7f692677
24263 Node: V850 Syntax
\7f695528
24264 Node: V850-Chars
\7f695768
24265 Node: V850-Regs
\7f696312
24266 Node: V850 Floating Point
\7f697880
24267 Node: V850 Directives
\7f698086
24268 Node: V850 Opcodes
\7f699689
24269 Node: XSTORMY16-Dependent
\7f705581
24270 Node: XStormy16 Syntax
\7f705926
24271 Node: XStormy16-Chars
\7f706116
24272 Node: XStormy16 Directives
\7f706729
24273 Node: XStormy16 Opcodes
\7f707384
24274 Node: Xtensa-Dependent
\7f708440
24275 Node: Xtensa Options
\7f709174
24276 Node: Xtensa Syntax
\7f711911
24277 Node: Xtensa Opcodes
\7f714055
24278 Node: Xtensa Registers
\7f715849
24279 Node: Xtensa Optimizations
\7f716482
24280 Node: Density Instructions
\7f716934
24281 Node: Xtensa Automatic Alignment
\7f718036
24282 Node: Xtensa Relaxation
\7f720483
24283 Node: Xtensa Branch Relaxation
\7f721391
24284 Node: Xtensa Call Relaxation
\7f722763
24285 Node: Xtensa Immediate Relaxation
\7f724549
24286 Node: Xtensa Directives
\7f727123
24287 Node: Schedule Directive
\7f728832
24288 Node: Longcalls Directive
\7f729172
24289 Node: Transform Directive
\7f729716
24290 Node: Literal Directive
\7f730458
24291 Ref: Literal Directive-Footnote-1
\7f733997
24292 Node: Literal Position Directive
\7f734139
24293 Node: Literal Prefix Directive
\7f735838
24294 Node: Absolute Literals Directive
\7f736736
24295 Node: Reporting Bugs
\7f738043
24296 Node: Bug Criteria
\7f738769
24297 Node: Bug Reporting
\7f739536
24298 Node: Acknowledgements
\7f746185
24299 Ref: Acknowledgements-Footnote-1
\7f751151
24300 Node: GNU Free Documentation License
\7f751177
24301 Node: AS Index
\7f776346
projects / external / binutils.git / blob