1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright (C) 2003-2017 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
27 #include "xtensa-relax.h"
28 #include "dwarf2dbg.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
32 #include "elf/xtensa.h"
34 /* Provide default values for new configuration settings. */
40 #define uint32 unsigned int
43 #define int32 signed int
48 Naming conventions (used somewhat inconsistently):
49 The xtensa_ functions are exported
50 The xg_ functions are internal
52 We also have a couple of different extensibility mechanisms.
53 1) The idiom replacement:
54 This is used when a line is first parsed to
55 replace an instruction pattern with another instruction
56 It is currently limited to replacements of instructions
57 with constant operands.
58 2) The xtensa-relax.c mechanism that has stronger instruction
59 replacement patterns. When an instruction's immediate field
60 does not fit the next instruction sequence is attempted.
61 In addition, "narrow" opcodes are supported this way. */
64 /* Define characters with special meanings to GAS. */
65 const char comment_chars[] = "#";
66 const char line_comment_chars[] = "#";
67 const char line_separator_chars[] = ";";
68 const char EXP_CHARS[] = "eE";
69 const char FLT_CHARS[] = "rRsSfFdDxXpP";
72 /* Flags to indicate whether the hardware supports the density and
73 absolute literals options. */
75 bfd_boolean density_supported;
76 bfd_boolean absolute_literals_supported;
78 static vliw_insn cur_vinsn;
80 unsigned xtensa_num_pipe_stages;
81 unsigned xtensa_fetch_width;
83 static enum debug_info_type xt_saved_debug_type = DEBUG_NONE;
85 /* Some functions are only valid in the front end. This variable
86 allows us to assert that we haven't crossed over into the
88 static bfd_boolean past_xtensa_end = FALSE;
90 /* Flags for properties of the last instruction in a segment. */
91 #define FLAG_IS_A0_WRITER 0x1
92 #define FLAG_IS_BAD_LOOPEND 0x2
95 /* We define a special segment names ".literal" to place literals
96 into. The .fini and .init sections are special because they
97 contain code that is moved together by the linker. We give them
98 their own special .fini.literal and .init.literal sections. */
100 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
101 #define LIT4_SECTION_NAME xtensa_section_rename (".lit4")
102 #define INIT_SECTION_NAME xtensa_section_rename (".init")
103 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
106 /* This type is used for the directive_stack to keep track of the
107 state of the literal collection pools. If lit_prefix is set, it is
108 used to determine the literal section names; otherwise, the literal
109 sections are determined based on the current text section. The
110 lit_seg and lit4_seg fields cache these literal sections, with the
111 current_text_seg field used a tag to indicate whether the cached
114 typedef struct lit_state_struct
117 segT current_text_seg;
122 static lit_state default_lit_sections;
125 /* We keep a list of literal segments. The seg_list type is the node
126 for this list. The literal_head pointer is the head of the list,
127 with the literal_head_h dummy node at the start. */
129 typedef struct seg_list_struct
131 struct seg_list_struct *next;
135 static seg_list literal_head_h;
136 static seg_list *literal_head = &literal_head_h;
139 /* Lists of symbols. We keep a list of symbols that label the current
140 instruction, so that we can adjust the symbols when inserting alignment
141 for various instructions. We also keep a list of all the symbols on
142 literals, so that we can fix up those symbols when the literals are
143 later moved into the text sections. */
145 typedef struct sym_list_struct
147 struct sym_list_struct *next;
151 static sym_list *insn_labels = NULL;
152 static sym_list *free_insn_labels = NULL;
153 static sym_list *saved_insn_labels = NULL;
155 static sym_list *literal_syms;
158 /* Flags to determine whether to prefer const16 or l32r
159 if both options are available. */
160 int prefer_const16 = 0;
163 /* Global flag to indicate when we are emitting literals. */
164 int generating_literals = 0;
166 /* The following PROPERTY table definitions are copied from
167 <elf/xtensa.h> and must be kept in sync with the code there. */
169 /* Flags in the property tables to specify whether blocks of memory
170 are literals, instructions, data, or unreachable. For
171 instructions, blocks that begin loop targets and branch targets are
172 designated. Blocks that do not allow density, instruction
173 reordering or transformation are also specified. Finally, for
174 branch targets, branch target alignment priority is included.
175 Alignment of the next block is specified in the current block
176 and the size of the current block does not include any fill required
177 to align to the next block. */
179 #define XTENSA_PROP_LITERAL 0x00000001
180 #define XTENSA_PROP_INSN 0x00000002
181 #define XTENSA_PROP_DATA 0x00000004
182 #define XTENSA_PROP_UNREACHABLE 0x00000008
183 /* Instruction only properties at beginning of code. */
184 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
185 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
186 /* Instruction only properties about code. */
187 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
188 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080
189 /* Historically, NO_TRANSFORM was a property of instructions,
190 but it should apply to literals under certain circumstances. */
191 #define XTENSA_PROP_NO_TRANSFORM 0x00000100
193 /* Branch target alignment information. This transmits information
194 to the linker optimization about the priority of aligning a
195 particular block for branch target alignment: None, low priority,
196 high priority, or required. These only need to be checked in
197 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
200 switch (GET_XTENSA_PROP_BT_ALIGN (flags))
201 case XTENSA_PROP_BT_ALIGN_NONE:
202 case XTENSA_PROP_BT_ALIGN_LOW:
203 case XTENSA_PROP_BT_ALIGN_HIGH:
204 case XTENSA_PROP_BT_ALIGN_REQUIRE:
206 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
208 /* No branch target alignment. */
209 #define XTENSA_PROP_BT_ALIGN_NONE 0x0
210 /* Low priority branch target alignment. */
211 #define XTENSA_PROP_BT_ALIGN_LOW 0x1
212 /* High priority branch target alignment. */
213 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2
214 /* Required branch target alignment. */
215 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
217 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
218 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
219 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
222 /* Alignment is specified in the block BEFORE the one that needs
223 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
224 get the required alignment specified as a power of 2. Use
225 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
226 alignment. Be careful of side effects since the SET will evaluate
227 flags twice. Also, note that the SIZE of a block in the property
228 table does not include the alignment size, so the alignment fill
229 must be calculated to determine if two blocks are contiguous.
230 TEXT_ALIGN is not currently implemented but is a placeholder for a
231 possible future implementation. */
233 #define XTENSA_PROP_ALIGN 0x00000800
235 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
237 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
238 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
239 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
241 #define XTENSA_PROP_INSN_ABSLIT 0x00020000
244 /* Structure for saving instruction and alignment per-fragment data
245 that will be written to the object file. This structure is
246 equivalent to the actual data that will be written out to the file
247 but is easier to use. We provide a conversion to file flags
248 in frag_flags_to_number. */
250 typedef struct frag_flags_struct frag_flags;
252 struct frag_flags_struct
254 /* is_literal should only be used after xtensa_move_literals.
255 If you need to check if you are generating a literal fragment,
256 then use the generating_literals global. */
258 unsigned is_literal : 1;
259 unsigned is_insn : 1;
260 unsigned is_data : 1;
261 unsigned is_unreachable : 1;
263 /* is_specific_opcode implies no_transform. */
264 unsigned is_no_transform : 1;
268 unsigned is_loop_target : 1;
269 unsigned is_branch_target : 1; /* Branch targets have a priority. */
270 unsigned bt_align_priority : 2;
272 unsigned is_no_density : 1;
273 /* no_longcalls flag does not need to be placed in the object file. */
275 unsigned is_no_reorder : 1;
277 /* Uses absolute literal addressing for l32r. */
278 unsigned is_abslit : 1;
280 unsigned is_align : 1;
281 unsigned alignment : 5;
285 /* Structure for saving information about a block of property data
286 for frags that have the same flags. */
287 struct xtensa_block_info_struct
293 struct xtensa_block_info_struct *next;
297 /* Structure for saving the current state before emitting literals. */
298 typedef struct emit_state_struct
303 int generating_literals;
307 /* Opcode placement information */
309 typedef unsigned long long bitfield;
310 #define bit_is_set(bit, bf) ((bf) & (0x01ll << (bit)))
311 #define set_bit(bit, bf) ((bf) |= (0x01ll << (bit)))
312 #define clear_bit(bit, bf) ((bf) &= ~(0x01ll << (bit)))
314 #define MAX_FORMATS 32
316 typedef struct op_placement_info_struct
319 /* A number describing how restrictive the issue is for this
320 opcode. For example, an opcode that fits lots of different
321 formats has a high freedom, as does an opcode that fits
322 only one format but many slots in that format. The most
323 restrictive is the opcode that fits only one slot in one
326 xtensa_format narrowest;
330 /* formats is a bitfield with the Nth bit set
331 if the opcode fits in the Nth xtensa_format. */
334 /* slots[N]'s Mth bit is set if the op fits in the
335 Mth slot of the Nth xtensa_format. */
336 bitfield slots[MAX_FORMATS];
338 /* A count of the number of slots in a given format
339 an op can fit (i.e., the bitcount of the slot field above). */
340 char slots_in_format[MAX_FORMATS];
342 } op_placement_info, *op_placement_info_table;
344 op_placement_info_table op_placement_table;
347 /* Extra expression types. */
349 #define O_pltrel O_md1 /* like O_symbol but use a PLT reloc */
350 #define O_hi16 O_md2 /* use high 16 bits of symbolic value */
351 #define O_lo16 O_md3 /* use low 16 bits of symbolic value */
352 #define O_pcrel O_md4 /* value is a PC-relative offset */
353 #define O_tlsfunc O_md5 /* TLS_FUNC/TLSDESC_FN relocation */
354 #define O_tlsarg O_md6 /* TLS_ARG/TLSDESC_ARG relocation */
355 #define O_tlscall O_md7 /* TLS_CALL relocation */
356 #define O_tpoff O_md8 /* TPOFF relocation */
357 #define O_dtpoff O_md9 /* DTPOFF relocation */
359 struct suffix_reloc_map
363 bfd_reloc_code_real_type reloc;
367 #define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }
369 static struct suffix_reloc_map suffix_relocs[] =
371 SUFFIX_MAP ("l", BFD_RELOC_LO16, O_lo16),
372 SUFFIX_MAP ("h", BFD_RELOC_HI16, O_hi16),
373 SUFFIX_MAP ("plt", BFD_RELOC_XTENSA_PLT, O_pltrel),
374 SUFFIX_MAP ("pcrel", BFD_RELOC_32_PCREL, O_pcrel),
375 SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC, O_tlsfunc),
376 SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG, O_tlsarg),
377 SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL, O_tlscall),
378 SUFFIX_MAP ("tpoff", BFD_RELOC_XTENSA_TLS_TPOFF, O_tpoff),
379 SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF, O_dtpoff),
393 directive_literal_prefix,
395 directive_absolute_literals,
396 directive_last_directive
402 bfd_boolean can_be_negated;
405 const directive_infoS directive_info[] =
408 { "literal", FALSE },
410 { "transform", TRUE },
411 { "freeregs", FALSE },
412 { "longcalls", TRUE },
413 { "literal_prefix", FALSE },
414 { "schedule", TRUE },
415 { "absolute-literals", TRUE }
418 bfd_boolean directive_state[] =
423 TRUE, /* transform */
424 FALSE, /* freeregs */
425 FALSE, /* longcalls */
426 FALSE, /* literal_prefix */
427 FALSE, /* schedule */
428 FALSE /* absolute_literals */
431 /* A circular list of all potential and actual literal pool locations
435 struct litpool_frag *next;
436 struct litpool_frag *prev;
439 short priority; /* 1, 2, or 3 -- 1 is highest */
440 short original_priority;
443 /* Map a segment to its litpool_frag list. */
446 struct litpool_seg *next;
448 struct litpool_frag frag_list;
449 int frag_count; /* since last litpool location */
452 static struct litpool_seg litpool_seg_list;
455 /* Directive functions. */
457 static void xtensa_begin_directive (int);
458 static void xtensa_end_directive (int);
459 static void xtensa_literal_prefix (void);
460 static void xtensa_literal_position (int);
461 static void xtensa_literal_pseudo (int);
462 static void xtensa_frequency_pseudo (int);
463 static void xtensa_elf_cons (int);
464 static void xtensa_leb128 (int);
466 /* Parsing and Idiom Translation. */
468 static bfd_reloc_code_real_type xtensa_elf_suffix (char **, expressionS *);
470 /* Various Other Internal Functions. */
472 extern bfd_boolean xg_is_single_relaxable_insn (TInsn *, TInsn *, bfd_boolean);
473 static bfd_boolean xg_build_to_insn (TInsn *, TInsn *, BuildInstr *);
474 static void xtensa_mark_literal_pool_location (void);
475 static addressT get_expanded_loop_offset (xtensa_opcode);
476 static fragS *get_literal_pool_location (segT);
477 static void set_literal_pool_location (segT, fragS *);
478 static void xtensa_set_frag_assembly_state (fragS *);
479 static void finish_vinsn (vliw_insn *);
480 static bfd_boolean emit_single_op (TInsn *);
481 static int total_frag_text_expansion (fragS *);
482 static bfd_boolean use_trampolines = TRUE;
483 static void xtensa_check_frag_count (void);
484 static void xtensa_create_trampoline_frag (bfd_boolean);
485 static void xtensa_maybe_create_trampoline_frag (void);
486 struct trampoline_frag;
487 static int init_trampoline_frag (struct trampoline_frag *);
488 static void xtensa_maybe_create_literal_pool_frag (bfd_boolean, bfd_boolean);
489 static bfd_boolean auto_litpools = FALSE;
490 static int auto_litpool_limit = 10000;
492 /* Alignment Functions. */
494 static int get_text_align_power (unsigned);
495 static int get_text_align_max_fill_size (int, bfd_boolean, bfd_boolean);
496 static int branch_align_power (segT);
498 /* Helpers for xtensa_relax_frag(). */
500 static long relax_frag_add_nop (fragS *);
502 /* Accessors for additional per-subsegment information. */
504 static unsigned get_last_insn_flags (segT, subsegT);
505 static void set_last_insn_flags (segT, subsegT, unsigned, bfd_boolean);
506 static float get_subseg_total_freq (segT, subsegT);
507 static float get_subseg_target_freq (segT, subsegT);
508 static void set_subseg_freq (segT, subsegT, float, float);
510 /* Segment list functions. */
512 static void xtensa_move_literals (void);
513 static void xtensa_reorder_segments (void);
514 static void xtensa_switch_to_literal_fragment (emit_state *);
515 static void xtensa_switch_to_non_abs_literal_fragment (emit_state *);
516 static void xtensa_switch_section_emit_state (emit_state *, segT, subsegT);
517 static void xtensa_restore_emit_state (emit_state *);
518 static segT cache_literal_section (bfd_boolean);
520 /* op_placement_info functions. */
522 static void init_op_placement_info_table (void);
523 extern bfd_boolean opcode_fits_format_slot (xtensa_opcode, xtensa_format, int);
524 static int xg_get_single_size (xtensa_opcode);
525 static xtensa_format xg_get_single_format (xtensa_opcode);
526 static int xg_get_single_slot (xtensa_opcode);
528 /* TInsn and IStack functions. */
530 static bfd_boolean tinsn_has_symbolic_operands (const TInsn *);
531 static bfd_boolean tinsn_has_invalid_symbolic_operands (const TInsn *);
532 static bfd_boolean tinsn_has_complex_operands (const TInsn *);
533 static bfd_boolean tinsn_to_insnbuf (TInsn *, xtensa_insnbuf);
534 static bfd_boolean tinsn_check_arguments (const TInsn *);
535 static void tinsn_from_chars (TInsn *, char *, int);
536 static void tinsn_immed_from_frag (TInsn *, fragS *, int);
537 static int get_num_stack_text_bytes (IStack *);
538 static int get_num_stack_literal_bytes (IStack *);
539 static bfd_boolean tinsn_to_slotbuf (xtensa_format, int, TInsn *, xtensa_insnbuf);
541 /* vliw_insn functions. */
543 static void xg_init_vinsn (vliw_insn *);
544 static void xg_copy_vinsn (vliw_insn *, vliw_insn *);
545 static void xg_clear_vinsn (vliw_insn *);
546 static bfd_boolean vinsn_has_specific_opcodes (vliw_insn *);
547 static void xg_free_vinsn (vliw_insn *);
548 static bfd_boolean vinsn_to_insnbuf
549 (vliw_insn *, char *, fragS *, bfd_boolean);
550 static void vinsn_from_chars (vliw_insn *, char *);
552 /* Expression Utilities. */
554 bfd_boolean expr_is_const (const expressionS *);
555 offsetT get_expr_const (const expressionS *);
556 void set_expr_const (expressionS *, offsetT);
557 bfd_boolean expr_is_register (const expressionS *);
558 offsetT get_expr_register (const expressionS *);
559 void set_expr_symbol_offset (expressionS *, symbolS *, offsetT);
560 bfd_boolean expr_is_equal (expressionS *, expressionS *);
561 static void copy_expr (expressionS *, const expressionS *);
563 /* Section renaming. */
565 static void build_section_rename (const char *);
568 /* ISA imported from bfd. */
569 extern xtensa_isa xtensa_default_isa;
571 extern int target_big_endian;
573 static xtensa_opcode xtensa_addi_opcode;
574 static xtensa_opcode xtensa_addmi_opcode;
575 static xtensa_opcode xtensa_call0_opcode;
576 static xtensa_opcode xtensa_call4_opcode;
577 static xtensa_opcode xtensa_call8_opcode;
578 static xtensa_opcode xtensa_call12_opcode;
579 static xtensa_opcode xtensa_callx0_opcode;
580 static xtensa_opcode xtensa_callx4_opcode;
581 static xtensa_opcode xtensa_callx8_opcode;
582 static xtensa_opcode xtensa_callx12_opcode;
583 static xtensa_opcode xtensa_const16_opcode;
584 static xtensa_opcode xtensa_entry_opcode;
585 static xtensa_opcode xtensa_extui_opcode;
586 static xtensa_opcode xtensa_movi_opcode;
587 static xtensa_opcode xtensa_movi_n_opcode;
588 static xtensa_opcode xtensa_isync_opcode;
589 static xtensa_opcode xtensa_j_opcode;
590 static xtensa_opcode xtensa_jx_opcode;
591 static xtensa_opcode xtensa_l32r_opcode;
592 static xtensa_opcode xtensa_loop_opcode;
593 static xtensa_opcode xtensa_loopnez_opcode;
594 static xtensa_opcode xtensa_loopgtz_opcode;
595 static xtensa_opcode xtensa_nop_opcode;
596 static xtensa_opcode xtensa_nop_n_opcode;
597 static xtensa_opcode xtensa_or_opcode;
598 static xtensa_opcode xtensa_ret_opcode;
599 static xtensa_opcode xtensa_ret_n_opcode;
600 static xtensa_opcode xtensa_retw_opcode;
601 static xtensa_opcode xtensa_retw_n_opcode;
602 static xtensa_opcode xtensa_rsr_lcount_opcode;
603 static xtensa_opcode xtensa_waiti_opcode;
604 static int config_max_slots = 0;
607 /* Command-line Options. */
609 bfd_boolean use_literal_section = TRUE;
610 enum flix_level produce_flix = FLIX_ALL;
611 static bfd_boolean align_targets = TRUE;
612 static bfd_boolean warn_unaligned_branch_targets = FALSE;
613 static bfd_boolean has_a0_b_retw = FALSE;
614 static bfd_boolean workaround_a0_b_retw = FALSE;
615 static bfd_boolean workaround_b_j_loop_end = FALSE;
616 static bfd_boolean workaround_short_loop = FALSE;
617 static bfd_boolean maybe_has_short_loop = FALSE;
618 static bfd_boolean workaround_close_loop_end = FALSE;
619 static bfd_boolean maybe_has_close_loop_end = FALSE;
620 static bfd_boolean enforce_three_byte_loop_align = FALSE;
622 /* When workaround_short_loops is TRUE, all loops with early exits must
623 have at least 3 instructions. workaround_all_short_loops is a modifier
624 to the workaround_short_loop flag. In addition to the
625 workaround_short_loop actions, all straightline loopgtz and loopnez
626 must have at least 3 instructions. */
628 static bfd_boolean workaround_all_short_loops = FALSE;
632 xtensa_setup_hw_workarounds (int earliest, int latest)
634 if (earliest > latest)
635 as_fatal (_("illegal range of target hardware versions"));
637 /* Enable all workarounds for pre-T1050.0 hardware. */
638 if (earliest < 105000 || latest < 105000)
640 workaround_a0_b_retw |= TRUE;
641 workaround_b_j_loop_end |= TRUE;
642 workaround_short_loop |= TRUE;
643 workaround_close_loop_end |= TRUE;
644 workaround_all_short_loops |= TRUE;
645 enforce_three_byte_loop_align = TRUE;
652 option_density = OPTION_MD_BASE,
656 option_no_generate_flix,
663 option_no_link_relax,
671 option_text_section_literals,
672 option_no_text_section_literals,
674 option_absolute_literals,
675 option_no_absolute_literals,
677 option_align_targets,
678 option_no_align_targets,
680 option_warn_unaligned_targets,
685 option_workaround_a0_b_retw,
686 option_no_workaround_a0_b_retw,
688 option_workaround_b_j_loop_end,
689 option_no_workaround_b_j_loop_end,
691 option_workaround_short_loop,
692 option_no_workaround_short_loop,
694 option_workaround_all_short_loops,
695 option_no_workaround_all_short_loops,
697 option_workaround_close_loop_end,
698 option_no_workaround_close_loop_end,
700 option_no_workarounds,
702 option_rename_section_name,
705 option_prefer_const16,
707 option_target_hardware,
710 option_no_trampolines,
712 option_auto_litpools,
713 option_no_auto_litpools,
714 option_auto_litpool_limit,
717 const char *md_shortopts = "";
719 struct option md_longopts[] =
721 { "density", no_argument, NULL, option_density },
722 { "no-density", no_argument, NULL, option_no_density },
724 { "flix", no_argument, NULL, option_flix },
725 { "no-generate-flix", no_argument, NULL, option_no_generate_flix },
726 { "no-allow-flix", no_argument, NULL, option_no_flix },
728 /* Both "relax" and "generics" are deprecated and treated as equivalent
729 to the "transform" option. */
730 { "relax", no_argument, NULL, option_relax },
731 { "no-relax", no_argument, NULL, option_no_relax },
732 { "generics", no_argument, NULL, option_generics },
733 { "no-generics", no_argument, NULL, option_no_generics },
735 { "transform", no_argument, NULL, option_transform },
736 { "no-transform", no_argument, NULL, option_no_transform },
737 { "text-section-literals", no_argument, NULL, option_text_section_literals },
738 { "no-text-section-literals", no_argument, NULL,
739 option_no_text_section_literals },
740 { "absolute-literals", no_argument, NULL, option_absolute_literals },
741 { "no-absolute-literals", no_argument, NULL, option_no_absolute_literals },
742 /* This option was changed from -align-target to -target-align
743 because it conflicted with the "-al" option. */
744 { "target-align", no_argument, NULL, option_align_targets },
745 { "no-target-align", no_argument, NULL, option_no_align_targets },
746 { "warn-unaligned-targets", no_argument, NULL,
747 option_warn_unaligned_targets },
748 { "longcalls", no_argument, NULL, option_longcalls },
749 { "no-longcalls", no_argument, NULL, option_no_longcalls },
751 { "no-workaround-a0-b-retw", no_argument, NULL,
752 option_no_workaround_a0_b_retw },
753 { "workaround-a0-b-retw", no_argument, NULL, option_workaround_a0_b_retw },
755 { "no-workaround-b-j-loop-end", no_argument, NULL,
756 option_no_workaround_b_j_loop_end },
757 { "workaround-b-j-loop-end", no_argument, NULL,
758 option_workaround_b_j_loop_end },
760 { "no-workaround-short-loops", no_argument, NULL,
761 option_no_workaround_short_loop },
762 { "workaround-short-loops", no_argument, NULL,
763 option_workaround_short_loop },
765 { "no-workaround-all-short-loops", no_argument, NULL,
766 option_no_workaround_all_short_loops },
767 { "workaround-all-short-loop", no_argument, NULL,
768 option_workaround_all_short_loops },
770 { "prefer-l32r", no_argument, NULL, option_prefer_l32r },
771 { "prefer-const16", no_argument, NULL, option_prefer_const16 },
773 { "no-workarounds", no_argument, NULL, option_no_workarounds },
775 { "no-workaround-close-loop-end", no_argument, NULL,
776 option_no_workaround_close_loop_end },
777 { "workaround-close-loop-end", no_argument, NULL,
778 option_workaround_close_loop_end },
780 { "rename-section", required_argument, NULL, option_rename_section_name },
782 { "link-relax", no_argument, NULL, option_link_relax },
783 { "no-link-relax", no_argument, NULL, option_no_link_relax },
785 { "target-hardware", required_argument, NULL, option_target_hardware },
787 { "trampolines", no_argument, NULL, option_trampolines },
788 { "no-trampolines", no_argument, NULL, option_no_trampolines },
790 { "auto-litpools", no_argument, NULL, option_auto_litpools },
791 { "no-auto-litpools", no_argument, NULL, option_no_auto_litpools },
792 { "auto-litpool-limit", required_argument, NULL, option_auto_litpool_limit },
794 { NULL, no_argument, NULL, 0 }
797 size_t md_longopts_size = sizeof md_longopts;
801 md_parse_option (int c, const char *arg)
806 as_warn (_("--density option is ignored"));
808 case option_no_density:
809 as_warn (_("--no-density option is ignored"));
811 case option_link_relax:
814 case option_no_link_relax:
818 produce_flix = FLIX_ALL;
820 case option_no_generate_flix:
821 produce_flix = FLIX_NO_GENERATE;
824 produce_flix = FLIX_NONE;
826 case option_generics:
827 as_warn (_("--generics is deprecated; use --transform instead"));
828 return md_parse_option (option_transform, arg);
829 case option_no_generics:
830 as_warn (_("--no-generics is deprecated; use --no-transform instead"));
831 return md_parse_option (option_no_transform, arg);
833 as_warn (_("--relax is deprecated; use --transform instead"));
834 return md_parse_option (option_transform, arg);
835 case option_no_relax:
836 as_warn (_("--no-relax is deprecated; use --no-transform instead"));
837 return md_parse_option (option_no_transform, arg);
838 case option_longcalls:
839 directive_state[directive_longcalls] = TRUE;
841 case option_no_longcalls:
842 directive_state[directive_longcalls] = FALSE;
844 case option_text_section_literals:
845 use_literal_section = FALSE;
847 case option_no_text_section_literals:
848 use_literal_section = TRUE;
850 case option_absolute_literals:
851 if (!absolute_literals_supported)
853 as_fatal (_("--absolute-literals option not supported in this Xtensa configuration"));
856 directive_state[directive_absolute_literals] = TRUE;
858 case option_no_absolute_literals:
859 directive_state[directive_absolute_literals] = FALSE;
862 case option_workaround_a0_b_retw:
863 workaround_a0_b_retw = TRUE;
865 case option_no_workaround_a0_b_retw:
866 workaround_a0_b_retw = FALSE;
868 case option_workaround_b_j_loop_end:
869 workaround_b_j_loop_end = TRUE;
871 case option_no_workaround_b_j_loop_end:
872 workaround_b_j_loop_end = FALSE;
875 case option_workaround_short_loop:
876 workaround_short_loop = TRUE;
878 case option_no_workaround_short_loop:
879 workaround_short_loop = FALSE;
882 case option_workaround_all_short_loops:
883 workaround_all_short_loops = TRUE;
885 case option_no_workaround_all_short_loops:
886 workaround_all_short_loops = FALSE;
889 case option_workaround_close_loop_end:
890 workaround_close_loop_end = TRUE;
892 case option_no_workaround_close_loop_end:
893 workaround_close_loop_end = FALSE;
896 case option_no_workarounds:
897 workaround_a0_b_retw = FALSE;
898 workaround_b_j_loop_end = FALSE;
899 workaround_short_loop = FALSE;
900 workaround_all_short_loops = FALSE;
901 workaround_close_loop_end = FALSE;
904 case option_align_targets:
905 align_targets = TRUE;
907 case option_no_align_targets:
908 align_targets = FALSE;
911 case option_warn_unaligned_targets:
912 warn_unaligned_branch_targets = TRUE;
915 case option_rename_section_name:
916 build_section_rename (arg);
920 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
921 should be emitted or not. FIXME: Not implemented. */
924 case option_prefer_l32r:
926 as_fatal (_("prefer-l32r conflicts with prefer-const16"));
930 case option_prefer_const16:
932 as_fatal (_("prefer-const16 conflicts with prefer-l32r"));
936 case option_target_hardware:
938 int earliest, latest = 0;
940 if (*arg == 0 || *arg == '-')
941 as_fatal (_("invalid target hardware version"));
943 earliest = strtol (arg, &end, 0);
947 else if (*end == '-')
950 as_fatal (_("invalid target hardware version"));
951 latest = strtol (end, &end, 0);
954 as_fatal (_("invalid target hardware version"));
956 xtensa_setup_hw_workarounds (earliest, latest);
960 case option_transform:
961 /* This option has no affect other than to use the defaults,
962 which are already set. */
965 case option_no_transform:
966 /* This option turns off all transformations of any kind.
967 However, because we want to preserve the state of other
968 directives, we only change its own field. Thus, before
969 you perform any transformation, always check if transform
970 is available. If you use the functions we provide for this
971 purpose, you will be ok. */
972 directive_state[directive_transform] = FALSE;
975 case option_trampolines:
976 use_trampolines = TRUE;
979 case option_no_trampolines:
980 use_trampolines = FALSE;
983 case option_auto_litpools:
984 auto_litpools = TRUE;
985 use_literal_section = FALSE;
988 case option_no_auto_litpools:
989 auto_litpools = FALSE;
990 auto_litpool_limit = -1;
993 case option_auto_litpool_limit:
997 if (auto_litpool_limit < 0)
998 as_fatal (_("no-auto-litpools is incompatible with auto-litpool-limit"));
999 if (*arg == 0 || *arg == '-')
1000 as_fatal (_("invalid auto-litpool-limit argument"));
1001 value = strtol (arg, &end, 10);
1003 as_fatal (_("invalid auto-litpool-limit argument"));
1004 if (value < 100 || value > 10000)
1005 as_fatal (_("invalid auto-litpool-limit argument (range is 100-10000)"));
1006 auto_litpool_limit = value;
1007 auto_litpools = TRUE;
1008 use_literal_section = FALSE;
1019 md_show_usage (FILE *stream)
1023 --[no-]text-section-literals\n\
1024 [Do not] put literals in the text section\n\
1025 --[no-]absolute-literals\n\
1026 [Do not] default to use non-PC-relative literals\n\
1027 --[no-]target-align [Do not] try to align branch targets\n\
1028 --[no-]longcalls [Do not] emit 32-bit call sequences\n\
1029 --[no-]transform [Do not] transform instructions\n\
1030 --flix both allow hand-written and generate flix bundles\n\
1031 --no-generate-flix allow hand-written but do not generate\n\
1033 --no-allow-flix neither allow hand-written nor generate\n\
1035 --rename-section old=new Rename section 'old' to 'new'\n\
1036 --[no-]trampolines [Do not] generate trampolines (jumps to jumps)\n\
1037 when jumps do not reach their targets\n\
1038 --[no-]auto-litpools [Do not] automatically create literal pools\n\
1039 --auto-litpool-limit=<value>\n\
1040 (range 100-10000) Maximum number of blocks of\n\
1041 instructions to emit between literal pool\n\
1042 locations; implies --auto-litpools flag\n", stream);
1046 /* Functions related to the list of current label symbols. */
1049 xtensa_add_insn_label (symbolS *sym)
1053 if (!free_insn_labels)
1054 l = XNEW (sym_list);
1057 l = free_insn_labels;
1058 free_insn_labels = l->next;
1062 l->next = insn_labels;
1068 xtensa_clear_insn_labels (void)
1072 for (pl = &free_insn_labels; *pl != NULL; pl = &(*pl)->next)
1080 xtensa_move_labels (fragS *new_frag, valueT new_offset)
1084 for (lit = insn_labels; lit; lit = lit->next)
1086 symbolS *lit_sym = lit->sym;
1087 S_SET_VALUE (lit_sym, new_offset);
1088 symbol_set_frag (lit_sym, new_frag);
1093 /* Directive data and functions. */
1095 typedef struct state_stackS_struct
1097 directiveE directive;
1098 bfd_boolean negated;
1099 bfd_boolean old_state;
1103 struct state_stackS_struct *prev;
1106 state_stackS *directive_state_stack;
1108 const pseudo_typeS md_pseudo_table[] =
1110 { "align", s_align_bytes, 0 }, /* Defaulting is invalid (0). */
1111 { "literal_position", xtensa_literal_position, 0 },
1112 { "frame", s_ignore, 0 }, /* Formerly used for STABS debugging. */
1113 { "long", xtensa_elf_cons, 4 },
1114 { "word", xtensa_elf_cons, 4 },
1115 { "4byte", xtensa_elf_cons, 4 },
1116 { "short", xtensa_elf_cons, 2 },
1117 { "2byte", xtensa_elf_cons, 2 },
1118 { "sleb128", xtensa_leb128, 1},
1119 { "uleb128", xtensa_leb128, 0},
1120 { "begin", xtensa_begin_directive, 0 },
1121 { "end", xtensa_end_directive, 0 },
1122 { "literal", xtensa_literal_pseudo, 0 },
1123 { "frequency", xtensa_frequency_pseudo, 0 },
1129 use_transform (void)
1131 /* After md_end, you should be checking frag by frag, rather
1132 than state directives. */
1133 gas_assert (!past_xtensa_end);
1134 return directive_state[directive_transform];
1139 do_align_targets (void)
1141 /* Do not use this function after md_end; just look at align_targets
1142 instead. There is no target-align directive, so alignment is either
1143 enabled for all frags or not done at all. */
1144 gas_assert (!past_xtensa_end);
1145 return align_targets && use_transform ();
1150 directive_push (directiveE directive, bfd_boolean negated, const void *datum)
1154 state_stackS *stack = XNEW (state_stackS);
1156 file = as_where (&line);
1158 stack->directive = directive;
1159 stack->negated = negated;
1160 stack->old_state = directive_state[directive];
1163 stack->datum = datum;
1164 stack->prev = directive_state_stack;
1165 directive_state_stack = stack;
1167 directive_state[directive] = !negated;
1172 directive_pop (directiveE *directive,
1173 bfd_boolean *negated,
1178 state_stackS *top = directive_state_stack;
1180 if (!directive_state_stack)
1182 as_bad (_("unmatched .end directive"));
1183 *directive = directive_none;
1187 directive_state[directive_state_stack->directive] = top->old_state;
1188 *directive = top->directive;
1189 *negated = top->negated;
1192 *datum = top->datum;
1193 directive_state_stack = top->prev;
1199 directive_balance (void)
1201 while (directive_state_stack)
1203 directiveE directive;
1204 bfd_boolean negated;
1209 directive_pop (&directive, &negated, &file, &line, &datum);
1210 as_warn_where ((char *) file, line,
1211 _(".begin directive with no matching .end directive"));
1217 inside_directive (directiveE dir)
1219 state_stackS *top = directive_state_stack;
1221 while (top && top->directive != dir)
1224 return (top != NULL);
1229 get_directive (directiveE *directive, bfd_boolean *negated)
1233 const char *directive_string;
1235 if (strncmp (input_line_pointer, "no-", 3) != 0)
1240 input_line_pointer += 3;
1243 len = strspn (input_line_pointer,
1244 "abcdefghijklmnopqrstuvwxyz_-/0123456789.");
1246 /* This code is a hack to make .begin [no-][generics|relax] exactly
1247 equivalent to .begin [no-]transform. We should remove it when
1248 we stop accepting those options. */
1250 if (strncmp (input_line_pointer, "generics", strlen ("generics")) == 0)
1252 as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
1253 directive_string = "transform";
1255 else if (strncmp (input_line_pointer, "relax", strlen ("relax")) == 0)
1257 as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
1258 directive_string = "transform";
1261 directive_string = input_line_pointer;
1263 for (i = 0; i < sizeof (directive_info) / sizeof (*directive_info); ++i)
1265 if (strncmp (directive_string, directive_info[i].name, len) == 0)
1267 input_line_pointer += len;
1268 *directive = (directiveE) i;
1269 if (*negated && !directive_info[i].can_be_negated)
1270 as_bad (_("directive %s cannot be negated"),
1271 directive_info[i].name);
1276 as_bad (_("unknown directive"));
1277 *directive = (directiveE) XTENSA_UNDEFINED;
1282 xtensa_begin_directive (int ignore ATTRIBUTE_UNUSED)
1284 directiveE directive;
1285 bfd_boolean negated;
1289 get_directive (&directive, &negated);
1290 if (directive == (directiveE) XTENSA_UNDEFINED)
1292 discard_rest_of_line ();
1296 if (cur_vinsn.inside_bundle)
1297 as_bad (_("directives are not valid inside bundles"));
1301 case directive_literal:
1302 if (!inside_directive (directive_literal))
1304 /* Previous labels go with whatever follows this directive, not with
1305 the literal, so save them now. */
1306 saved_insn_labels = insn_labels;
1309 as_warn (_(".begin literal is deprecated; use .literal instead"));
1310 state = XNEW (emit_state);
1311 xtensa_switch_to_literal_fragment (state);
1312 directive_push (directive_literal, negated, state);
1315 case directive_literal_prefix:
1316 /* Have to flush pending output because a movi relaxed to an l32r
1317 might produce a literal. */
1318 md_flush_pending_output ();
1319 /* Check to see if the current fragment is a literal
1320 fragment. If it is, then this operation is not allowed. */
1321 if (generating_literals)
1323 as_bad (_("cannot set literal_prefix inside literal fragment"));
1327 /* Allocate the literal state for this section and push
1328 onto the directive stack. */
1329 ls = XNEW (lit_state);
1332 *ls = default_lit_sections;
1333 directive_push (directive_literal_prefix, negated, ls);
1335 /* Process the new prefix. */
1336 xtensa_literal_prefix ();
1339 case directive_freeregs:
1340 /* This information is currently unused, but we'll accept the statement
1341 and just discard the rest of the line. This won't check the syntax,
1342 but it will accept every correct freeregs directive. */
1343 input_line_pointer += strcspn (input_line_pointer, "\n");
1344 directive_push (directive_freeregs, negated, 0);
1347 case directive_schedule:
1348 md_flush_pending_output ();
1349 frag_var (rs_fill, 0, 0, frag_now->fr_subtype,
1350 frag_now->fr_symbol, frag_now->fr_offset, NULL);
1351 directive_push (directive_schedule, negated, 0);
1352 xtensa_set_frag_assembly_state (frag_now);
1355 case directive_density:
1356 as_warn (_(".begin [no-]density is ignored"));
1359 case directive_absolute_literals:
1360 md_flush_pending_output ();
1361 if (!absolute_literals_supported && !negated)
1363 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1366 xtensa_set_frag_assembly_state (frag_now);
1367 directive_push (directive, negated, 0);
1371 md_flush_pending_output ();
1372 xtensa_set_frag_assembly_state (frag_now);
1373 directive_push (directive, negated, 0);
1377 demand_empty_rest_of_line ();
1382 xtensa_end_directive (int ignore ATTRIBUTE_UNUSED)
1384 directiveE begin_directive, end_directive;
1385 bfd_boolean begin_negated, end_negated;
1389 emit_state **state_ptr;
1392 if (cur_vinsn.inside_bundle)
1393 as_bad (_("directives are not valid inside bundles"));
1395 get_directive (&end_directive, &end_negated);
1397 md_flush_pending_output ();
1399 switch ((int) end_directive)
1401 case XTENSA_UNDEFINED:
1402 discard_rest_of_line ();
1405 case (int) directive_density:
1406 as_warn (_(".end [no-]density is ignored"));
1407 demand_empty_rest_of_line ();
1410 case (int) directive_absolute_literals:
1411 if (!absolute_literals_supported && !end_negated)
1413 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1414 demand_empty_rest_of_line ();
1423 state_ptr = &state; /* use state_ptr to avoid type-punning warning */
1424 directive_pop (&begin_directive, &begin_negated, &file, &line,
1425 (const void **) state_ptr);
1427 if (begin_directive != directive_none)
1429 if (begin_directive != end_directive || begin_negated != end_negated)
1431 as_bad (_("does not match begin %s%s at %s:%d"),
1432 begin_negated ? "no-" : "",
1433 directive_info[begin_directive].name, file, line);
1437 switch (end_directive)
1439 case directive_literal:
1440 frag_var (rs_fill, 0, 0, 0, NULL, 0, NULL);
1441 xtensa_restore_emit_state (state);
1442 xtensa_set_frag_assembly_state (frag_now);
1444 if (!inside_directive (directive_literal))
1446 /* Restore the list of current labels. */
1447 xtensa_clear_insn_labels ();
1448 insn_labels = saved_insn_labels;
1452 case directive_literal_prefix:
1453 /* Restore the default collection sections from saved state. */
1454 s = (lit_state *) state;
1456 default_lit_sections = *s;
1458 /* Free the state storage. */
1459 free (s->lit_prefix);
1463 case directive_schedule:
1464 case directive_freeregs:
1468 xtensa_set_frag_assembly_state (frag_now);
1474 demand_empty_rest_of_line ();
1478 /* Place an aligned literal fragment at the current location. */
1481 xtensa_literal_position (int ignore ATTRIBUTE_UNUSED)
1483 md_flush_pending_output ();
1485 if (inside_directive (directive_literal))
1486 as_warn (_(".literal_position inside literal directive; ignoring"));
1487 xtensa_mark_literal_pool_location ();
1489 demand_empty_rest_of_line ();
1490 xtensa_clear_insn_labels ();
1494 /* Support .literal label, expr, ... */
1497 xtensa_literal_pseudo (int ignored ATTRIBUTE_UNUSED)
1500 char *p, *base_name;
1504 if (inside_directive (directive_literal))
1506 as_bad (_(".literal not allowed inside .begin literal region"));
1507 ignore_rest_of_line ();
1511 md_flush_pending_output ();
1513 /* Previous labels go with whatever follows this directive, not with
1514 the literal, so save them now. */
1515 saved_insn_labels = insn_labels;
1518 /* If we are using text-section literals, then this is the right value... */
1521 base_name = input_line_pointer;
1523 xtensa_switch_to_literal_fragment (&state);
1525 /* ...but if we aren't using text-section-literals, then we
1526 need to put them in the section we just switched to. */
1527 if (use_literal_section || directive_state[directive_absolute_literals])
1530 /* FIXME, despite the previous comments, dest_seg is unused... */
1533 /* All literals are aligned to four-byte boundaries. */
1534 frag_align (2, 0, 0);
1535 record_alignment (now_seg, 2);
1537 c = get_symbol_name (&base_name);
1538 /* Just after name is now '\0'. */
1539 p = input_line_pointer;
1541 SKIP_WHITESPACE_AFTER_NAME ();
1543 if (*input_line_pointer != ',' && *input_line_pointer != ':')
1545 as_bad (_("expected comma or colon after symbol name; "
1546 "rest of line ignored"));
1547 ignore_rest_of_line ();
1548 xtensa_restore_emit_state (&state);
1556 input_line_pointer++; /* skip ',' or ':' */
1558 xtensa_elf_cons (4);
1560 xtensa_restore_emit_state (&state);
1562 /* Restore the list of current labels. */
1563 xtensa_clear_insn_labels ();
1564 insn_labels = saved_insn_labels;
1569 xtensa_literal_prefix (void)
1574 /* Parse the new prefix from the input_line_pointer. */
1576 len = strspn (input_line_pointer,
1577 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1578 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1580 /* Get a null-terminated copy of the name. */
1581 name = xmemdup0 (input_line_pointer, len);
1583 /* Skip the name in the input line. */
1584 input_line_pointer += len;
1586 default_lit_sections.lit_prefix = name;
1588 /* Clear cached literal sections, since the prefix has changed. */
1589 default_lit_sections.lit_seg = NULL;
1590 default_lit_sections.lit4_seg = NULL;
1594 /* Support ".frequency branch_target_frequency fall_through_frequency". */
1597 xtensa_frequency_pseudo (int ignored ATTRIBUTE_UNUSED)
1599 float fall_through_f, target_f;
1601 fall_through_f = (float) strtod (input_line_pointer, &input_line_pointer);
1602 if (fall_through_f < 0)
1604 as_bad (_("fall through frequency must be greater than 0"));
1605 ignore_rest_of_line ();
1609 target_f = (float) strtod (input_line_pointer, &input_line_pointer);
1612 as_bad (_("branch target frequency must be greater than 0"));
1613 ignore_rest_of_line ();
1617 set_subseg_freq (now_seg, now_subseg, target_f + fall_through_f, target_f);
1619 demand_empty_rest_of_line ();
1623 /* Like normal .long/.short/.word, except support @plt, etc.
1624 Clobbers input_line_pointer, checks end-of-line. */
1627 xtensa_elf_cons (int nbytes)
1630 bfd_reloc_code_real_type reloc;
1632 md_flush_pending_output ();
1634 if (cur_vinsn.inside_bundle)
1635 as_bad (_("directives are not valid inside bundles"));
1637 if (is_it_end_of_statement ())
1639 demand_empty_rest_of_line ();
1646 if (exp.X_op == O_symbol
1647 && *input_line_pointer == '@'
1648 && ((reloc = xtensa_elf_suffix (&input_line_pointer, &exp))
1651 reloc_howto_type *reloc_howto =
1652 bfd_reloc_type_lookup (stdoutput, reloc);
1654 if (reloc == BFD_RELOC_UNUSED || !reloc_howto)
1655 as_bad (_("unsupported relocation"));
1656 else if ((reloc >= BFD_RELOC_XTENSA_SLOT0_OP
1657 && reloc <= BFD_RELOC_XTENSA_SLOT14_OP)
1658 || (reloc >= BFD_RELOC_XTENSA_SLOT0_ALT
1659 && reloc <= BFD_RELOC_XTENSA_SLOT14_ALT))
1660 as_bad (_("opcode-specific %s relocation used outside "
1661 "an instruction"), reloc_howto->name);
1662 else if (nbytes != (int) bfd_get_reloc_size (reloc_howto))
1663 as_bad (ngettext ("%s relocations do not fit in %d byte",
1664 "%s relocations do not fit in %d bytes",
1666 reloc_howto->name, nbytes);
1667 else if (reloc == BFD_RELOC_XTENSA_TLS_FUNC
1668 || reloc == BFD_RELOC_XTENSA_TLS_ARG
1669 || reloc == BFD_RELOC_XTENSA_TLS_CALL)
1670 as_bad (_("invalid use of %s relocation"), reloc_howto->name);
1673 char *p = frag_more ((int) nbytes);
1674 xtensa_set_frag_assembly_state (frag_now);
1675 fix_new_exp (frag_now, p - frag_now->fr_literal,
1676 nbytes, &exp, reloc_howto->pc_relative, reloc);
1681 xtensa_set_frag_assembly_state (frag_now);
1682 emit_expr (&exp, (unsigned int) nbytes);
1685 while (*input_line_pointer++ == ',');
1687 input_line_pointer--; /* Put terminator back into stream. */
1688 demand_empty_rest_of_line ();
1691 static bfd_boolean is_leb128_expr;
1694 xtensa_leb128 (int sign)
1696 is_leb128_expr = TRUE;
1698 is_leb128_expr = FALSE;
1702 /* Parsing and Idiom Translation. */
1704 /* Parse @plt, etc. and return the desired relocation. */
1705 static bfd_reloc_code_real_type
1706 xtensa_elf_suffix (char **str_p, expressionS *exp_p)
1716 return BFD_RELOC_NONE;
1718 for (ch = *str, str2 = ident;
1719 (str2 < ident + sizeof (ident) - 1
1720 && (ISALNUM (ch) || ch == '@'));
1723 *str2++ = (ISLOWER (ch)) ? ch : TOLOWER (ch);
1730 for (i = 0; i < ARRAY_SIZE (suffix_relocs); i++)
1731 if (ch == suffix_relocs[i].suffix[0]
1732 && len == suffix_relocs[i].length
1733 && memcmp (ident, suffix_relocs[i].suffix, suffix_relocs[i].length) == 0)
1735 /* Now check for "identifier@suffix+constant". */
1736 if (*str == '-' || *str == '+')
1738 char *orig_line = input_line_pointer;
1739 expressionS new_exp;
1741 input_line_pointer = str;
1742 expression (&new_exp);
1743 if (new_exp.X_op == O_constant)
1745 exp_p->X_add_number += new_exp.X_add_number;
1746 str = input_line_pointer;
1749 if (&input_line_pointer != str_p)
1750 input_line_pointer = orig_line;
1754 return suffix_relocs[i].reloc;
1757 return BFD_RELOC_UNUSED;
1761 /* Find the matching operator type. */
1763 map_suffix_reloc_to_operator (bfd_reloc_code_real_type reloc)
1765 operatorT operator = O_illegal;
1768 for (i = 0; i < ARRAY_SIZE (suffix_relocs); i++)
1770 if (suffix_relocs[i].reloc == reloc)
1772 operator = suffix_relocs[i].operator;
1776 gas_assert (operator != O_illegal);
1781 /* Find the matching reloc type. */
1782 static bfd_reloc_code_real_type
1783 map_operator_to_reloc (unsigned char operator, bfd_boolean is_literal)
1786 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
1788 for (i = 0; i < ARRAY_SIZE (suffix_relocs); i++)
1790 if (suffix_relocs[i].operator == operator)
1792 reloc = suffix_relocs[i].reloc;
1799 if (reloc == BFD_RELOC_XTENSA_TLS_FUNC)
1800 return BFD_RELOC_XTENSA_TLSDESC_FN;
1801 else if (reloc == BFD_RELOC_XTENSA_TLS_ARG)
1802 return BFD_RELOC_XTENSA_TLSDESC_ARG;
1805 if (reloc == BFD_RELOC_UNUSED)
1806 return BFD_RELOC_32;
1813 expression_end (const char *name)
1836 #define ERROR_REG_NUM ((unsigned) -1)
1839 tc_get_register (const char *prefix)
1842 const char *next_expr;
1843 const char *old_line_pointer;
1846 old_line_pointer = input_line_pointer;
1848 if (*input_line_pointer == '$')
1849 ++input_line_pointer;
1851 /* Accept "sp" as a synonym for "a1". */
1852 if (input_line_pointer[0] == 's' && input_line_pointer[1] == 'p'
1853 && expression_end (input_line_pointer + 2))
1855 input_line_pointer += 2;
1856 return 1; /* AR[1] */
1859 while (*input_line_pointer++ == *prefix++)
1861 --input_line_pointer;
1866 as_bad (_("bad register name: %s"), old_line_pointer);
1867 return ERROR_REG_NUM;
1870 if (!ISDIGIT ((unsigned char) *input_line_pointer))
1872 as_bad (_("bad register number: %s"), input_line_pointer);
1873 return ERROR_REG_NUM;
1878 while (ISDIGIT ((int) *input_line_pointer))
1879 reg = reg * 10 + *input_line_pointer++ - '0';
1881 if (!(next_expr = expression_end (input_line_pointer)))
1883 as_bad (_("bad register name: %s"), old_line_pointer);
1884 return ERROR_REG_NUM;
1887 input_line_pointer = (char *) next_expr;
1894 expression_maybe_register (xtensa_opcode opc, int opnd, expressionS *tok)
1896 xtensa_isa isa = xtensa_default_isa;
1898 /* Check if this is an immediate operand. */
1899 if (xtensa_operand_is_register (isa, opc, opnd) == 0)
1901 bfd_reloc_code_real_type reloc;
1902 segT t = expression (tok);
1904 if (t == absolute_section
1905 && xtensa_operand_is_PCrelative (isa, opc, opnd) == 1)
1907 gas_assert (tok->X_op == O_constant);
1908 tok->X_op = O_symbol;
1909 tok->X_add_symbol = &abs_symbol;
1912 if ((tok->X_op == O_constant || tok->X_op == O_symbol)
1913 && ((reloc = xtensa_elf_suffix (&input_line_pointer, tok))
1918 case BFD_RELOC_LO16:
1919 if (tok->X_op == O_constant)
1921 tok->X_add_number &= 0xffff;
1925 case BFD_RELOC_HI16:
1926 if (tok->X_op == O_constant)
1928 tok->X_add_number = ((unsigned) tok->X_add_number) >> 16;
1932 case BFD_RELOC_UNUSED:
1933 as_bad (_("unsupported relocation"));
1935 case BFD_RELOC_32_PCREL:
1936 as_bad (_("pcrel relocation not allowed in an instruction"));
1941 tok->X_op = map_suffix_reloc_to_operator (reloc);
1946 xtensa_regfile opnd_rf = xtensa_operand_regfile (isa, opc, opnd);
1947 unsigned reg = tc_get_register (xtensa_regfile_shortname (isa, opnd_rf));
1949 if (reg != ERROR_REG_NUM) /* Already errored */
1952 if (xtensa_operand_encode (isa, opc, opnd, &buf))
1953 as_bad (_("register number out of range"));
1956 tok->X_op = O_register;
1957 tok->X_add_symbol = 0;
1958 tok->X_add_number = reg;
1963 /* Split up the arguments for an opcode or pseudo-op. */
1966 tokenize_arguments (char **args, char *str)
1968 char *old_input_line_pointer;
1969 bfd_boolean saw_comma = FALSE;
1970 bfd_boolean saw_arg = FALSE;
1971 bfd_boolean saw_colon = FALSE;
1973 char *arg_end, *arg;
1976 /* Save and restore input_line_pointer around this function. */
1977 old_input_line_pointer = input_line_pointer;
1978 input_line_pointer = str;
1980 while (*input_line_pointer)
1983 switch (*input_line_pointer)
1990 input_line_pointer++;
1991 if (saw_comma || saw_colon || !saw_arg)
1997 input_line_pointer++;
1998 if (saw_comma || saw_colon || !saw_arg)
2004 if (!saw_comma && !saw_colon && saw_arg)
2007 arg_end = input_line_pointer + 1;
2008 while (!expression_end (arg_end))
2011 arg_len = arg_end - input_line_pointer;
2012 arg = XNEWVEC (char, (saw_colon ? 1 : 0) + arg_len + 1);
2013 args[num_args] = arg;
2017 strncpy (arg, input_line_pointer, arg_len);
2018 arg[arg_len] = '\0';
2020 input_line_pointer = arg_end;
2030 if (saw_comma || saw_colon)
2032 input_line_pointer = old_input_line_pointer;
2037 as_bad (_("extra comma"));
2039 as_bad (_("extra colon"));
2041 as_bad (_("missing argument"));
2043 as_bad (_("missing comma or colon"));
2044 input_line_pointer = old_input_line_pointer;
2049 /* Parse the arguments to an opcode. Return TRUE on error. */
2052 parse_arguments (TInsn *insn, int num_args, char **arg_strings)
2054 expressionS *tok, *last_tok;
2055 xtensa_opcode opcode = insn->opcode;
2056 bfd_boolean had_error = TRUE;
2057 xtensa_isa isa = xtensa_default_isa;
2058 int n, num_regs = 0;
2059 int opcode_operand_count;
2060 int opnd_cnt, last_opnd_cnt;
2061 unsigned int next_reg = 0;
2062 char *old_input_line_pointer;
2064 if (insn->insn_type == ITYPE_LITERAL)
2065 opcode_operand_count = 1;
2067 opcode_operand_count = xtensa_opcode_num_operands (isa, opcode);
2070 memset (tok, 0, sizeof (*tok) * MAX_INSN_ARGS);
2072 /* Save and restore input_line_pointer around this function. */
2073 old_input_line_pointer = input_line_pointer;
2079 /* Skip invisible operands. */
2080 while (xtensa_operand_is_visible (isa, opcode, opnd_cnt) == 0)
2086 for (n = 0; n < num_args; n++)
2088 input_line_pointer = arg_strings[n];
2089 if (*input_line_pointer == ':')
2091 xtensa_regfile opnd_rf;
2092 input_line_pointer++;
2095 gas_assert (opnd_cnt > 0);
2097 opnd_rf = xtensa_operand_regfile (isa, opcode, last_opnd_cnt);
2099 != tc_get_register (xtensa_regfile_shortname (isa, opnd_rf)))
2100 as_warn (_("incorrect register number, ignoring"));
2105 if (opnd_cnt >= opcode_operand_count)
2107 as_warn (_("too many arguments"));
2110 gas_assert (opnd_cnt < MAX_INSN_ARGS);
2112 expression_maybe_register (opcode, opnd_cnt, tok);
2113 next_reg = tok->X_add_number + 1;
2115 if (tok->X_op == O_illegal || tok->X_op == O_absent)
2117 if (xtensa_operand_is_register (isa, opcode, opnd_cnt) == 1)
2119 num_regs = xtensa_operand_num_regs (isa, opcode, opnd_cnt) - 1;
2120 /* minus 1 because we are seeing one right now */
2126 last_opnd_cnt = opnd_cnt;
2127 demand_empty_rest_of_line ();
2134 while (xtensa_operand_is_visible (isa, opcode, opnd_cnt) == 0);
2138 if (num_regs > 0 && ((int) next_reg != last_tok->X_add_number + 1))
2141 insn->ntok = tok - insn->tok;
2145 input_line_pointer = old_input_line_pointer;
2151 get_invisible_operands (TInsn *insn)
2153 xtensa_isa isa = xtensa_default_isa;
2154 static xtensa_insnbuf slotbuf = NULL;
2156 xtensa_opcode opc = insn->opcode;
2157 int slot, opnd, fmt_found;
2161 slotbuf = xtensa_insnbuf_alloc (isa);
2163 /* Find format/slot where this can be encoded. */
2166 for (fmt = 0; fmt < xtensa_isa_num_formats (isa); fmt++)
2168 for (slot = 0; slot < xtensa_format_num_slots (isa, fmt); slot++)
2170 if (xtensa_opcode_encode (isa, fmt, slot, slotbuf, opc) == 0)
2176 if (fmt_found) break;
2181 as_bad (_("cannot encode opcode \"%s\""), xtensa_opcode_name (isa, opc));
2185 /* First encode all the visible operands
2186 (to deal with shared field operands). */
2187 for (opnd = 0; opnd < insn->ntok; opnd++)
2189 if (xtensa_operand_is_visible (isa, opc, opnd) == 1
2190 && (insn->tok[opnd].X_op == O_register
2191 || insn->tok[opnd].X_op == O_constant))
2193 val = insn->tok[opnd].X_add_number;
2194 xtensa_operand_encode (isa, opc, opnd, &val);
2195 xtensa_operand_set_field (isa, opc, opnd, fmt, slot, slotbuf, val);
2199 /* Then pull out the values for the invisible ones. */
2200 for (opnd = 0; opnd < insn->ntok; opnd++)
2202 if (xtensa_operand_is_visible (isa, opc, opnd) == 0)
2204 xtensa_operand_get_field (isa, opc, opnd, fmt, slot, slotbuf, &val);
2205 xtensa_operand_decode (isa, opc, opnd, &val);
2206 insn->tok[opnd].X_add_number = val;
2207 if (xtensa_operand_is_register (isa, opc, opnd) == 1)
2208 insn->tok[opnd].X_op = O_register;
2210 insn->tok[opnd].X_op = O_constant;
2219 xg_reverse_shift_count (char **cnt_argp)
2221 char *cnt_arg, *new_arg;
2222 cnt_arg = *cnt_argp;
2224 /* replace the argument with "31-(argument)" */
2225 new_arg = concat ("31-(", cnt_arg, ")", (char *) NULL);
2228 *cnt_argp = new_arg;
2232 /* If "arg" is a constant expression, return non-zero with the value
2236 xg_arg_is_constant (char *arg, offsetT *valp)
2239 char *save_ptr = input_line_pointer;
2241 input_line_pointer = arg;
2243 input_line_pointer = save_ptr;
2245 if (exp.X_op == O_constant)
2247 *valp = exp.X_add_number;
2256 xg_replace_opname (char **popname, const char *newop)
2259 *popname = xstrdup (newop);
2264 xg_check_num_args (int *pnum_args,
2269 int num_args = *pnum_args;
2271 if (num_args < expected_num)
2273 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
2274 num_args, opname, expected_num);
2278 if (num_args > expected_num)
2280 as_warn (_("too many operands (%d) for '%s'; expected %d"),
2281 num_args, opname, expected_num);
2282 while (num_args-- > expected_num)
2284 free (arg_strings[num_args]);
2285 arg_strings[num_args] = 0;
2287 *pnum_args = expected_num;
2295 /* If the register is not specified as part of the opcode,
2296 then get it from the operand and move it to the opcode. */
2299 xg_translate_sysreg_op (char **popname, int *pnum_args, char **arg_strings)
2301 xtensa_isa isa = xtensa_default_isa;
2303 char *opname, *new_opname;
2304 const char *sr_name;
2305 int is_user, is_write;
2310 is_user = (opname[1] == 'u');
2311 is_write = (opname[0] == 'w');
2313 /* Opname == [rw]ur or [rwx]sr... */
2315 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
2318 /* Check if the argument is a symbolic register name. */
2319 sr = xtensa_sysreg_lookup_name (isa, arg_strings[1]);
2320 /* Handle WSR to "INTSET" as a special case. */
2321 if (sr == XTENSA_UNDEFINED && is_write && !is_user
2322 && !strcasecmp (arg_strings[1], "intset"))
2323 sr = xtensa_sysreg_lookup_name (isa, "interrupt");
2324 if (sr == XTENSA_UNDEFINED
2325 || (xtensa_sysreg_is_user (isa, sr) == 1) != is_user)
2327 /* Maybe it's a register number.... */
2329 if (!xg_arg_is_constant (arg_strings[1], &val))
2331 as_bad (_("invalid register '%s' for '%s' instruction"),
2332 arg_strings[1], opname);
2335 sr = xtensa_sysreg_lookup (isa, val, is_user);
2336 if (sr == XTENSA_UNDEFINED)
2338 as_bad (_("invalid register number (%ld) for '%s' instruction"),
2339 (long) val, opname);
2344 /* Remove the last argument, which is now part of the opcode. */
2345 free (arg_strings[1]);
2349 /* Translate the opcode. */
2350 sr_name = xtensa_sysreg_name (isa, sr);
2351 /* Another special case for "WSR.INTSET".... */
2352 if (is_write && !is_user && !strcasecmp ("interrupt", sr_name))
2354 new_opname = concat (*popname, ".", sr_name, (char *) NULL);
2356 *popname = new_opname;
2363 xtensa_translate_old_userreg_ops (char **popname)
2365 xtensa_isa isa = xtensa_default_isa;
2367 char *opname, *new_opname;
2368 const char *sr_name;
2369 bfd_boolean has_underbar = FALSE;
2372 if (opname[0] == '_')
2374 has_underbar = TRUE;
2378 sr = xtensa_sysreg_lookup_name (isa, opname + 1);
2379 if (sr != XTENSA_UNDEFINED)
2381 /* The new default name ("nnn") is different from the old default
2382 name ("URnnn"). The old default is handled below, and we don't
2383 want to recognize [RW]nnn, so do nothing if the name is the (new)
2385 static char namebuf[10];
2386 sprintf (namebuf, "%d", xtensa_sysreg_number (isa, sr));
2387 if (strcmp (namebuf, opname + 1) == 0)
2395 /* Only continue if the reg name is "URnnn". */
2396 if (opname[1] != 'u' || opname[2] != 'r')
2398 val = strtoul (opname + 3, &end, 10);
2402 sr = xtensa_sysreg_lookup (isa, val, 1);
2403 if (sr == XTENSA_UNDEFINED)
2405 as_bad (_("invalid register number (%ld) for '%s'"),
2406 (long) val, opname);
2411 /* Translate the opcode. */
2412 sr_name = xtensa_sysreg_name (isa, sr);
2413 new_opname = XNEWVEC (char, strlen (sr_name) + 6);
2414 sprintf (new_opname, "%s%cur.%s", (has_underbar ? "_" : ""),
2415 opname[0], sr_name);
2417 *popname = new_opname;
2424 xtensa_translate_zero_immed (const char *old_op,
2434 gas_assert (opname[0] != '_');
2436 if (strcmp (opname, old_op) != 0)
2439 if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
2441 if (xg_arg_is_constant (arg_strings[1], &val) && val == 0)
2443 xg_replace_opname (popname, new_op);
2444 free (arg_strings[1]);
2445 arg_strings[1] = arg_strings[2];
2454 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
2455 Returns non-zero if an error was found. */
2458 xg_translate_idioms (char **popname, int *pnum_args, char **arg_strings)
2460 char *opname = *popname;
2461 bfd_boolean has_underbar = FALSE;
2465 has_underbar = TRUE;
2469 if (strcmp (opname, "mov") == 0)
2471 if (use_transform () && !has_underbar && density_supported)
2472 xg_replace_opname (popname, "mov.n");
2475 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
2477 xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
2478 arg_strings[2] = xstrdup (arg_strings[1]);
2484 if (strcmp (opname, "bbsi.l") == 0)
2486 if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
2488 xg_replace_opname (popname, (has_underbar ? "_bbsi" : "bbsi"));
2489 if (target_big_endian)
2490 xg_reverse_shift_count (&arg_strings[1]);
2494 if (strcmp (opname, "bbci.l") == 0)
2496 if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
2498 xg_replace_opname (popname, (has_underbar ? "_bbci" : "bbci"));
2499 if (target_big_endian)
2500 xg_reverse_shift_count (&arg_strings[1]);
2504 /* Don't do anything special with NOPs inside FLIX instructions. They
2505 are handled elsewhere. Real NOP instructions are always available
2506 in configurations with FLIX, so this should never be an issue but
2507 check for it anyway. */
2508 if (!cur_vinsn.inside_bundle && xtensa_nop_opcode == XTENSA_UNDEFINED
2509 && strcmp (opname, "nop") == 0)
2511 if (use_transform () && !has_underbar && density_supported)
2512 xg_replace_opname (popname, "nop.n");
2515 if (xg_check_num_args (pnum_args, 0, opname, arg_strings))
2517 xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
2518 arg_strings[0] = xstrdup ("a1");
2519 arg_strings[1] = xstrdup ("a1");
2520 arg_strings[2] = xstrdup ("a1");
2526 /* Recognize [RW]UR and [RWX]SR. */
2527 if ((((opname[0] == 'r' || opname[0] == 'w')
2528 && (opname[1] == 'u' || opname[1] == 's'))
2529 || (opname[0] == 'x' && opname[1] == 's'))
2531 && opname[3] == '\0')
2532 return xg_translate_sysreg_op (popname, pnum_args, arg_strings);
2534 /* Backward compatibility for RUR and WUR: Recognize [RW]UR<nnn> and
2535 [RW]<name> if <name> is the non-default name of a user register. */
2536 if ((opname[0] == 'r' || opname[0] == 'w')
2537 && xtensa_opcode_lookup (xtensa_default_isa, opname) == XTENSA_UNDEFINED)
2538 return xtensa_translate_old_userreg_ops (popname);
2540 /* Relax branches that don't allow comparisons against an immediate value
2541 of zero to the corresponding branches with implicit zero immediates. */
2542 if (!has_underbar && use_transform ())
2544 if (xtensa_translate_zero_immed ("bnei", "bnez", popname,
2545 pnum_args, arg_strings))
2548 if (xtensa_translate_zero_immed ("beqi", "beqz", popname,
2549 pnum_args, arg_strings))
2552 if (xtensa_translate_zero_immed ("bgei", "bgez", popname,
2553 pnum_args, arg_strings))
2556 if (xtensa_translate_zero_immed ("blti", "bltz", popname,
2557 pnum_args, arg_strings))
2565 /* Functions for dealing with the Xtensa ISA. */
2567 /* Currently the assembler only allows us to use a single target per
2568 fragment. Because of this, only one operand for a given
2569 instruction may be symbolic. If there is a PC-relative operand,
2570 the last one is chosen. Otherwise, the result is the number of the
2571 last immediate operand, and if there are none of those, we fail and
2575 get_relaxable_immed (xtensa_opcode opcode)
2577 int last_immed = -1;
2580 if (opcode == XTENSA_UNDEFINED)
2583 noperands = xtensa_opcode_num_operands (xtensa_default_isa, opcode);
2584 for (opi = noperands - 1; opi >= 0; opi--)
2586 if (xtensa_operand_is_visible (xtensa_default_isa, opcode, opi) == 0)
2588 if (xtensa_operand_is_PCrelative (xtensa_default_isa, opcode, opi) == 1)
2590 if (last_immed == -1
2591 && xtensa_operand_is_register (xtensa_default_isa, opcode, opi) == 0)
2598 static xtensa_opcode
2599 get_opcode_from_buf (const char *buf, int slot)
2601 static xtensa_insnbuf insnbuf = NULL;
2602 static xtensa_insnbuf slotbuf = NULL;
2603 xtensa_isa isa = xtensa_default_isa;
2608 insnbuf = xtensa_insnbuf_alloc (isa);
2609 slotbuf = xtensa_insnbuf_alloc (isa);
2612 xtensa_insnbuf_from_chars (isa, insnbuf, (const unsigned char *) buf, 0);
2613 fmt = xtensa_format_decode (isa, insnbuf);
2614 if (fmt == XTENSA_UNDEFINED)
2615 return XTENSA_UNDEFINED;
2617 if (slot >= xtensa_format_num_slots (isa, fmt))
2618 return XTENSA_UNDEFINED;
2620 xtensa_format_get_slot (isa, fmt, slot, insnbuf, slotbuf);
2621 return xtensa_opcode_decode (isa, fmt, slot, slotbuf);
2625 #ifdef TENSILICA_DEBUG
2627 /* For debugging, print out the mapping of opcode numbers to opcodes. */
2630 xtensa_print_insn_table (void)
2632 int num_opcodes, num_operands;
2633 xtensa_opcode opcode;
2634 xtensa_isa isa = xtensa_default_isa;
2636 num_opcodes = xtensa_isa_num_opcodes (xtensa_default_isa);
2637 for (opcode = 0; opcode < num_opcodes; opcode++)
2640 fprintf (stderr, "%d: %s: ", opcode, xtensa_opcode_name (isa, opcode));
2641 num_operands = xtensa_opcode_num_operands (isa, opcode);
2642 for (opn = 0; opn < num_operands; opn++)
2644 if (xtensa_operand_is_visible (isa, opcode, opn) == 0)
2646 if (xtensa_operand_is_register (isa, opcode, opn) == 1)
2648 xtensa_regfile opnd_rf =
2649 xtensa_operand_regfile (isa, opcode, opn);
2650 fprintf (stderr, "%s ", xtensa_regfile_shortname (isa, opnd_rf));
2652 else if (xtensa_operand_is_PCrelative (isa, opcode, opn) == 1)
2653 fputs ("[lLr] ", stderr);
2655 fputs ("i ", stderr);
2657 fprintf (stderr, "\n");
2663 print_vliw_insn (xtensa_insnbuf vbuf)
2665 xtensa_isa isa = xtensa_default_isa;
2666 xtensa_format f = xtensa_format_decode (isa, vbuf);
2667 xtensa_insnbuf sbuf = xtensa_insnbuf_alloc (isa);
2670 fprintf (stderr, "format = %d\n", f);
2672 for (op = 0; op < xtensa_format_num_slots (isa, f); op++)
2674 xtensa_opcode opcode;
2678 xtensa_format_get_slot (isa, f, op, vbuf, sbuf);
2679 opcode = xtensa_opcode_decode (isa, f, op, sbuf);
2680 opname = xtensa_opcode_name (isa, opcode);
2682 fprintf (stderr, "op in slot %i is %s;\n", op, opname);
2683 fprintf (stderr, " operands = ");
2685 operands < xtensa_opcode_num_operands (isa, opcode);
2689 if (xtensa_operand_is_visible (isa, opcode, operands) == 0)
2691 xtensa_operand_get_field (isa, opcode, operands, f, op, sbuf, &val);
2692 xtensa_operand_decode (isa, opcode, operands, &val);
2693 fprintf (stderr, "%d ", val);
2695 fprintf (stderr, "\n");
2697 xtensa_insnbuf_free (isa, sbuf);
2700 #endif /* TENSILICA_DEBUG */
2704 is_direct_call_opcode (xtensa_opcode opcode)
2706 xtensa_isa isa = xtensa_default_isa;
2707 int n, num_operands;
2709 if (xtensa_opcode_is_call (isa, opcode) != 1)
2712 num_operands = xtensa_opcode_num_operands (isa, opcode);
2713 for (n = 0; n < num_operands; n++)
2715 if (xtensa_operand_is_register (isa, opcode, n) == 0
2716 && xtensa_operand_is_PCrelative (isa, opcode, n) == 1)
2723 /* Convert from BFD relocation type code to slot and operand number.
2724 Returns non-zero on failure. */
2727 decode_reloc (bfd_reloc_code_real_type reloc, int *slot, bfd_boolean *is_alt)
2729 if (reloc >= BFD_RELOC_XTENSA_SLOT0_OP
2730 && reloc <= BFD_RELOC_XTENSA_SLOT14_OP)
2732 *slot = reloc - BFD_RELOC_XTENSA_SLOT0_OP;
2735 else if (reloc >= BFD_RELOC_XTENSA_SLOT0_ALT
2736 && reloc <= BFD_RELOC_XTENSA_SLOT14_ALT)
2738 *slot = reloc - BFD_RELOC_XTENSA_SLOT0_ALT;
2748 /* Convert from slot number to BFD relocation type code for the
2749 standard PC-relative relocations. Return BFD_RELOC_NONE on
2752 static bfd_reloc_code_real_type
2753 encode_reloc (int slot)
2755 if (slot < 0 || slot > 14)
2756 return BFD_RELOC_NONE;
2758 return BFD_RELOC_XTENSA_SLOT0_OP + slot;
2762 /* Convert from slot numbers to BFD relocation type code for the
2763 "alternate" relocations. Return BFD_RELOC_NONE on failure. */
2765 static bfd_reloc_code_real_type
2766 encode_alt_reloc (int slot)
2768 if (slot < 0 || slot > 14)
2769 return BFD_RELOC_NONE;
2771 return BFD_RELOC_XTENSA_SLOT0_ALT + slot;
2776 xtensa_insnbuf_set_operand (xtensa_insnbuf slotbuf,
2779 xtensa_opcode opcode,
2785 uint32 valbuf = value;
2787 if (xtensa_operand_encode (xtensa_default_isa, opcode, operand, &valbuf))
2789 if (xtensa_operand_is_PCrelative (xtensa_default_isa, opcode, operand)
2791 as_bad_where ((char *) file, line,
2792 _("operand %d of '%s' has out of range value '%u'"),
2794 xtensa_opcode_name (xtensa_default_isa, opcode),
2797 as_bad_where ((char *) file, line,
2798 _("operand %d of '%s' has invalid value '%u'"),
2800 xtensa_opcode_name (xtensa_default_isa, opcode),
2805 xtensa_operand_set_field (xtensa_default_isa, opcode, operand, fmt, slot,
2811 xtensa_insnbuf_get_operand (xtensa_insnbuf slotbuf,
2814 xtensa_opcode opcode,
2818 (void) xtensa_operand_get_field (xtensa_default_isa, opcode, opnum,
2819 fmt, slot, slotbuf, &val);
2820 (void) xtensa_operand_decode (xtensa_default_isa, opcode, opnum, &val);
2825 /* Checks for rules from xtensa-relax tables. */
2827 /* The routine xg_instruction_matches_option_term must return TRUE
2828 when a given option term is true. The meaning of all of the option
2829 terms is given interpretation by this function. */
2832 xg_instruction_matches_option_term (TInsn *insn, const ReqOrOption *option)
2834 if (strcmp (option->option_name, "realnop") == 0
2835 || strncmp (option->option_name, "IsaUse", 6) == 0)
2837 /* These conditions were evaluated statically when building the
2838 relaxation table. There's no need to reevaluate them now. */
2841 else if (strcmp (option->option_name, "FREEREG") == 0)
2842 return insn->extra_arg.X_op == O_register;
2845 as_fatal (_("internal error: unknown option name '%s'"),
2846 option->option_name);
2852 xg_instruction_matches_or_options (TInsn *insn,
2853 const ReqOrOptionList *or_option)
2855 const ReqOrOption *option;
2856 /* Must match each of the AND terms. */
2857 for (option = or_option; option != NULL; option = option->next)
2859 if (xg_instruction_matches_option_term (insn, option))
2867 xg_instruction_matches_options (TInsn *insn, const ReqOptionList *options)
2869 const ReqOption *req_options;
2870 /* Must match each of the AND terms. */
2871 for (req_options = options;
2872 req_options != NULL;
2873 req_options = req_options->next)
2875 /* Must match one of the OR clauses. */
2876 if (!xg_instruction_matches_or_options (insn,
2877 req_options->or_option_terms))
2884 /* Return the transition rule that matches or NULL if none matches. */
2887 xg_instruction_matches_rule (TInsn *insn, TransitionRule *rule)
2889 PreconditionList *condition_l;
2891 if (rule->opcode != insn->opcode)
2894 for (condition_l = rule->conditions;
2895 condition_l != NULL;
2896 condition_l = condition_l->next)
2900 Precondition *cond = condition_l->precond;
2905 /* The expression must be the constant. */
2906 gas_assert (cond->op_num < insn->ntok);
2907 exp1 = &insn->tok[cond->op_num];
2908 if (expr_is_const (exp1))
2913 if (get_expr_const (exp1) != cond->op_data)
2917 if (get_expr_const (exp1) == cond->op_data)
2924 else if (expr_is_register (exp1))
2929 if (get_expr_register (exp1) != cond->op_data)
2933 if (get_expr_register (exp1) == cond->op_data)
2945 gas_assert (cond->op_num < insn->ntok);
2946 gas_assert (cond->op_data < insn->ntok);
2947 exp1 = &insn->tok[cond->op_num];
2948 exp2 = &insn->tok[cond->op_data];
2953 if (!expr_is_equal (exp1, exp2))
2957 if (expr_is_equal (exp1, exp2))
2969 if (!xg_instruction_matches_options (insn, rule->options))
2977 transition_rule_cmp (const TransitionRule *a, const TransitionRule *b)
2979 bfd_boolean a_greater = FALSE;
2980 bfd_boolean b_greater = FALSE;
2982 ReqOptionList *l_a = a->options;
2983 ReqOptionList *l_b = b->options;
2985 /* We only care if they both are the same except for
2986 a const16 vs. an l32r. */
2988 while (l_a && l_b && ((l_a->next == NULL) == (l_b->next == NULL)))
2990 ReqOrOptionList *l_or_a = l_a->or_option_terms;
2991 ReqOrOptionList *l_or_b = l_b->or_option_terms;
2992 while (l_or_a && l_or_b && ((l_a->next == NULL) == (l_b->next == NULL)))
2994 if (l_or_a->is_true != l_or_b->is_true)
2996 if (strcmp (l_or_a->option_name, l_or_b->option_name) != 0)
2998 /* This is the case we care about. */
2999 if (strcmp (l_or_a->option_name, "IsaUseConst16") == 0
3000 && strcmp (l_or_b->option_name, "IsaUseL32R") == 0)
3007 else if (strcmp (l_or_a->option_name, "IsaUseL32R") == 0
3008 && strcmp (l_or_b->option_name, "IsaUseConst16") == 0)
3018 l_or_a = l_or_a->next;
3019 l_or_b = l_or_b->next;
3021 if (l_or_a || l_or_b)
3030 /* Incomparable if the substitution was used differently in two cases. */
3031 if (a_greater && b_greater)
3043 static TransitionRule *
3044 xg_instruction_match (TInsn *insn)
3046 TransitionTable *table = xg_build_simplify_table (&transition_rule_cmp);
3048 gas_assert (insn->opcode < table->num_opcodes);
3050 /* Walk through all of the possible transitions. */
3051 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3053 TransitionRule *rule = l->rule;
3054 if (xg_instruction_matches_rule (insn, rule))
3061 /* Various Other Internal Functions. */
3064 is_unique_insn_expansion (TransitionRule *r)
3066 if (!r->to_instr || r->to_instr->next != NULL)
3068 if (r->to_instr->typ != INSTR_INSTR)
3074 /* Check if there is exactly one relaxation for INSN that converts it to
3075 another instruction of equal or larger size. If so, and if TARG is
3076 non-null, go ahead and generate the relaxed instruction into TARG. If
3077 NARROW_ONLY is true, then only consider relaxations that widen a narrow
3078 instruction, i.e., ignore relaxations that convert to an instruction of
3079 equal size. In some contexts where this function is used, only
3080 a single widening is allowed and the NARROW_ONLY argument is used to
3081 exclude cases like ADDI being "widened" to an ADDMI, which may
3082 later be relaxed to an ADDMI/ADDI pair. */
3085 xg_is_single_relaxable_insn (TInsn *insn, TInsn *targ, bfd_boolean narrow_only)
3087 TransitionTable *table = xg_build_widen_table (&transition_rule_cmp);
3089 TransitionRule *match = 0;
3091 gas_assert (insn->insn_type == ITYPE_INSN);
3092 gas_assert (insn->opcode < table->num_opcodes);
3094 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3096 TransitionRule *rule = l->rule;
3098 if (xg_instruction_matches_rule (insn, rule)
3099 && is_unique_insn_expansion (rule)
3100 && (xg_get_single_size (insn->opcode) + (narrow_only ? 1 : 0)
3101 <= xg_get_single_size (rule->to_instr->opcode)))
3112 xg_build_to_insn (targ, insn, match->to_instr);
3117 /* Return the maximum number of bytes this opcode can expand to. */
3120 xg_get_max_insn_widen_size (xtensa_opcode opcode)
3122 TransitionTable *table = xg_build_widen_table (&transition_rule_cmp);
3124 int max_size = xg_get_single_size (opcode);
3126 gas_assert (opcode < table->num_opcodes);
3128 for (l = table->table[opcode]; l != NULL; l = l->next)
3130 TransitionRule *rule = l->rule;
3131 BuildInstr *build_list;
3136 build_list = rule->to_instr;
3137 if (is_unique_insn_expansion (rule))
3139 gas_assert (build_list->typ == INSTR_INSTR);
3140 this_size = xg_get_max_insn_widen_size (build_list->opcode);
3143 for (; build_list != NULL; build_list = build_list->next)
3145 switch (build_list->typ)
3148 this_size += xg_get_single_size (build_list->opcode);
3150 case INSTR_LITERAL_DEF:
3151 case INSTR_LABEL_DEF:
3156 if (this_size > max_size)
3157 max_size = this_size;
3163 /* Return the maximum number of literal bytes this opcode can generate. */
3166 xg_get_max_insn_widen_literal_size (xtensa_opcode opcode)
3168 TransitionTable *table = xg_build_widen_table (&transition_rule_cmp);
3172 gas_assert (opcode < table->num_opcodes);
3174 for (l = table->table[opcode]; l != NULL; l = l->next)
3176 TransitionRule *rule = l->rule;
3177 BuildInstr *build_list;
3182 build_list = rule->to_instr;
3183 if (is_unique_insn_expansion (rule))
3185 gas_assert (build_list->typ == INSTR_INSTR);
3186 this_size = xg_get_max_insn_widen_literal_size (build_list->opcode);
3189 for (; build_list != NULL; build_list = build_list->next)
3191 switch (build_list->typ)
3193 case INSTR_LITERAL_DEF:
3194 /* Hard-coded 4-byte literal. */
3198 case INSTR_LABEL_DEF:
3203 if (this_size > max_size)
3204 max_size = this_size;
3211 xg_is_relaxable_insn (TInsn *insn, int lateral_steps)
3213 int steps_taken = 0;
3214 TransitionTable *table = xg_build_widen_table (&transition_rule_cmp);
3217 gas_assert (insn->insn_type == ITYPE_INSN);
3218 gas_assert (insn->opcode < table->num_opcodes);
3220 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3222 TransitionRule *rule = l->rule;
3224 if (xg_instruction_matches_rule (insn, rule))
3226 if (steps_taken == lateral_steps)
3236 get_special_literal_symbol (void)
3238 static symbolS *sym = NULL;
3241 sym = symbol_find_or_make ("SPECIAL_LITERAL0\001");
3247 get_special_label_symbol (void)
3249 static symbolS *sym = NULL;
3252 sym = symbol_find_or_make ("SPECIAL_LABEL0\001");
3258 xg_valid_literal_expression (const expressionS *exp)
3280 /* This will check to see if the value can be converted into the
3281 operand type. It will return TRUE if it does not fit. */
3284 xg_check_operand (int32 value, xtensa_opcode opcode, int operand)
3286 uint32 valbuf = value;
3287 if (xtensa_operand_encode (xtensa_default_isa, opcode, operand, &valbuf))
3293 /* Assumes: All immeds are constants. Check that all constants fit
3294 into their immeds; return FALSE if not. */
3297 xg_immeds_fit (const TInsn *insn)
3299 xtensa_isa isa = xtensa_default_isa;
3303 gas_assert (insn->insn_type == ITYPE_INSN);
3304 for (i = 0; i < n; ++i)
3306 const expressionS *exp = &insn->tok[i];
3308 if (xtensa_operand_is_register (isa, insn->opcode, i) == 1)
3315 if (xg_check_operand (exp->X_add_number, insn->opcode, i))
3320 /* The symbol should have a fixup associated with it. */
3329 /* This should only be called after we have an initial
3330 estimate of the addresses. */
3333 xg_symbolic_immeds_fit (const TInsn *insn,
3339 xtensa_isa isa = xtensa_default_isa;
3347 gas_assert (insn->insn_type == ITYPE_INSN);
3349 for (i = 0; i < n; ++i)
3351 const expressionS *exp = &insn->tok[i];
3353 if (xtensa_operand_is_register (isa, insn->opcode, i) == 1)
3360 if (xg_check_operand (exp->X_add_number, insn->opcode, i))
3366 /* Check for the worst case. */
3367 if (xg_check_operand (0xffff, insn->opcode, i))
3372 /* We only allow symbols for PC-relative references.
3373 If pc_frag == 0, then we don't have frag locations yet. */
3375 || xtensa_operand_is_PCrelative (isa, insn->opcode, i) == 0)
3378 /* If it is a weak symbol or a symbol in a different section,
3379 it cannot be known to fit at assembly time. */
3380 if (S_IS_WEAK (exp->X_add_symbol)
3381 || S_GET_SEGMENT (exp->X_add_symbol) != pc_seg)
3383 /* For a direct call with --no-longcalls, be optimistic and
3384 assume it will be in range. If the symbol is weak and
3385 undefined, it may remain undefined at link-time, in which
3386 case it will have a zero value and almost certainly be out
3387 of range for a direct call; thus, relax for undefined weak
3388 symbols even if longcalls is not enabled. */
3389 if (is_direct_call_opcode (insn->opcode)
3390 && ! pc_frag->tc_frag_data.use_longcalls
3391 && (! S_IS_WEAK (exp->X_add_symbol)
3392 || S_IS_DEFINED (exp->X_add_symbol)))
3398 symbolP = exp->X_add_symbol;
3399 sym_frag = symbol_get_frag (symbolP);
3400 target = S_GET_VALUE (symbolP) + exp->X_add_number;
3401 pc = pc_frag->fr_address + pc_offset;
3403 /* If frag has yet to be reached on this pass, assume it
3404 will move by STRETCH just as we did. If this is not so,
3405 it will be because some frag between grows, and that will
3406 force another pass. Beware zero-length frags. There
3407 should be a faster way to do this. */
3410 && sym_frag->relax_marker != pc_frag->relax_marker
3411 && S_GET_SEGMENT (symbolP) == pc_seg)
3416 new_offset = target;
3417 xtensa_operand_do_reloc (isa, insn->opcode, i, &new_offset, pc);
3418 if (xg_check_operand (new_offset, insn->opcode, i))
3423 /* The symbol should have a fixup associated with it. */
3432 /* Return TRUE on success. */
3435 xg_build_to_insn (TInsn *targ, TInsn *insn, BuildInstr *bi)
3441 targ->debug_line = insn->debug_line;
3442 targ->loc_directive_seen = insn->loc_directive_seen;
3447 targ->opcode = bi->opcode;
3448 targ->insn_type = ITYPE_INSN;
3449 targ->is_specific_opcode = FALSE;
3451 for (; op != NULL; op = op->next)
3453 int op_num = op->op_num;
3454 int op_data = op->op_data;
3456 gas_assert (op->op_num < MAX_INSN_ARGS);
3458 if (targ->ntok <= op_num)
3459 targ->ntok = op_num + 1;
3464 set_expr_const (&targ->tok[op_num], op_data);
3467 gas_assert (op_data < insn->ntok);
3468 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
3471 if (insn->extra_arg.X_op != O_register)
3473 copy_expr (&targ->tok[op_num], &insn->extra_arg);
3476 sym = get_special_literal_symbol ();
3477 set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
3478 if (insn->tok[op_data].X_op == O_tlsfunc
3479 || insn->tok[op_data].X_op == O_tlsarg)
3480 copy_expr (&targ->extra_arg, &insn->tok[op_data]);
3483 sym = get_special_label_symbol ();
3484 set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
3486 case OP_OPERAND_HI16U:
3487 case OP_OPERAND_LOW16U:
3488 gas_assert (op_data < insn->ntok);
3489 if (expr_is_const (&insn->tok[op_data]))
3492 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
3493 val = xg_apply_userdef_op_fn (op->typ,
3496 targ->tok[op_num].X_add_number = val;
3500 /* For const16 we can create relocations for these. */
3501 if (targ->opcode == XTENSA_UNDEFINED
3502 || (targ->opcode != xtensa_const16_opcode))
3504 gas_assert (op_data < insn->ntok);
3505 /* Need to build a O_lo16 or O_hi16. */
3506 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
3507 if (targ->tok[op_num].X_op == O_symbol)
3509 if (op->typ == OP_OPERAND_HI16U)
3510 targ->tok[op_num].X_op = O_hi16;
3511 else if (op->typ == OP_OPERAND_LOW16U)
3512 targ->tok[op_num].X_op = O_lo16;
3519 /* currently handles:
3522 OP_OPERAND_F32MINUS */
3523 if (xg_has_userdef_op_fn (op->typ))
3525 gas_assert (op_data < insn->ntok);
3526 if (expr_is_const (&insn->tok[op_data]))
3529 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
3530 val = xg_apply_userdef_op_fn (op->typ,
3533 targ->tok[op_num].X_add_number = val;
3536 return FALSE; /* We cannot use a relocation for this. */
3545 case INSTR_LITERAL_DEF:
3547 targ->opcode = XTENSA_UNDEFINED;
3548 targ->insn_type = ITYPE_LITERAL;
3549 targ->is_specific_opcode = FALSE;
3550 for (; op != NULL; op = op->next)
3552 int op_num = op->op_num;
3553 int op_data = op->op_data;
3554 gas_assert (op->op_num < MAX_INSN_ARGS);
3556 if (targ->ntok <= op_num)
3557 targ->ntok = op_num + 1;
3562 gas_assert (op_data < insn->ntok);
3563 /* We can only pass resolvable literals through. */
3564 if (!xg_valid_literal_expression (&insn->tok[op_data]))
3566 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
3578 case INSTR_LABEL_DEF:
3580 targ->opcode = XTENSA_UNDEFINED;
3581 targ->insn_type = ITYPE_LABEL;
3582 targ->is_specific_opcode = FALSE;
3583 /* Literal with no ops is a label? */
3584 gas_assert (op == NULL);
3595 /* Return TRUE on success. */
3598 xg_build_to_stack (IStack *istack, TInsn *insn, BuildInstr *bi)
3600 for (; bi != NULL; bi = bi->next)
3602 TInsn *next_insn = istack_push_space (istack);
3604 if (!xg_build_to_insn (next_insn, insn, bi))
3611 /* Return TRUE on valid expansion. */
3614 xg_expand_to_stack (IStack *istack, TInsn *insn, int lateral_steps)
3616 int stack_size = istack->ninsn;
3617 int steps_taken = 0;
3618 TransitionTable *table = xg_build_widen_table (&transition_rule_cmp);
3621 gas_assert (insn->insn_type == ITYPE_INSN);
3622 gas_assert (insn->opcode < table->num_opcodes);
3624 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3626 TransitionRule *rule = l->rule;
3628 if (xg_instruction_matches_rule (insn, rule))
3630 if (lateral_steps == steps_taken)
3634 /* This is it. Expand the rule to the stack. */
3635 if (!xg_build_to_stack (istack, insn, rule->to_instr))
3638 /* Check to see if it fits. */
3639 for (i = stack_size; i < istack->ninsn; i++)
3641 TInsn *tinsn = &istack->insn[i];
3643 if (tinsn->insn_type == ITYPE_INSN
3644 && !tinsn_has_symbolic_operands (tinsn)
3645 && !xg_immeds_fit (tinsn))
3647 istack->ninsn = stack_size;
3660 /* Relax the assembly instruction at least "min_steps".
3661 Return the number of steps taken.
3663 For relaxation to correctly terminate, every relaxation chain must
3664 terminate in one of two ways:
3666 1. If the chain from one instruction to the next consists entirely of
3667 single instructions, then the chain *must* handle all possible
3668 immediates without failing. It must not ever fail because an
3669 immediate is out of range. The MOVI.N -> MOVI -> L32R relaxation
3670 chain is one example. L32R loads 32 bits, and there cannot be an
3671 immediate larger than 32 bits, so it satisfies this condition.
3672 Single instruction relaxation chains are as defined by
3673 xg_is_single_relaxable_instruction.
3675 2. Otherwise, the chain must end in a multi-instruction expansion: e.g.,
3676 BNEZ.N -> BNEZ -> BNEZ.W15 -> BENZ.N/J
3678 Strictly speaking, in most cases you can violate condition 1 and be OK
3679 -- in particular when the last two instructions have the same single
3680 size. But nevertheless, you should guarantee the above two conditions.
3682 We could fix this so that single-instruction expansions correctly
3683 terminate when they can't handle the range, but the error messages are
3684 worse, and it actually turns out that in every case but one (18-bit wide
3685 branches), you need a multi-instruction expansion to get the full range
3686 anyway. And because 18-bit branches are handled identically to 15-bit
3687 branches, there isn't any point in changing it. */
3690 xg_assembly_relax (IStack *istack,
3693 fragS *pc_frag, /* if pc_frag == 0, not pc-relative */
3694 offsetT pc_offset, /* offset in fragment */
3695 int min_steps, /* minimum conversion steps */
3696 long stretch) /* number of bytes stretched so far */
3698 int steps_taken = 0;
3700 /* Some of its immeds don't fit. Try to build a relaxed version.
3701 This may go through a couple of stages of single instruction
3702 transformations before we get there. */
3704 TInsn single_target;
3706 int lateral_steps = 0;
3707 int istack_size = istack->ninsn;
3709 if (xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch)
3710 && steps_taken >= min_steps)
3712 istack_push (istack, insn);
3715 current_insn = *insn;
3717 /* Walk through all of the single instruction expansions. */
3718 while (xg_is_single_relaxable_insn (¤t_insn, &single_target, FALSE))
3721 if (xg_symbolic_immeds_fit (&single_target, pc_seg, pc_frag, pc_offset,
3724 if (steps_taken >= min_steps)
3726 istack_push (istack, &single_target);
3730 current_insn = single_target;
3733 /* Now check for a multi-instruction expansion. */
3734 while (xg_is_relaxable_insn (¤t_insn, lateral_steps))
3736 if (xg_symbolic_immeds_fit (¤t_insn, pc_seg, pc_frag, pc_offset,
3739 if (steps_taken >= min_steps)
3741 istack_push (istack, ¤t_insn);
3746 if (xg_expand_to_stack (istack, ¤t_insn, lateral_steps))
3748 if (steps_taken >= min_steps)
3752 istack->ninsn = istack_size;
3755 /* It's not going to work -- use the original. */
3756 istack_push (istack, insn);
3762 xg_finish_frag (char *last_insn,
3763 enum xtensa_relax_statesE frag_state,
3764 enum xtensa_relax_statesE slot0_state,
3766 bfd_boolean is_insn)
3768 /* Finish off this fragment so that it has at LEAST the desired
3769 max_growth. If it doesn't fit in this fragment, close this one
3770 and start a new one. In either case, return a pointer to the
3771 beginning of the growth area. */
3775 frag_grow (max_growth);
3776 old_frag = frag_now;
3778 frag_now->fr_opcode = last_insn;
3780 frag_now->tc_frag_data.is_insn = TRUE;
3782 frag_var (rs_machine_dependent, max_growth, max_growth,
3783 frag_state, frag_now->fr_symbol, frag_now->fr_offset, last_insn);
3785 old_frag->tc_frag_data.slot_subtypes[0] = slot0_state;
3786 xtensa_set_frag_assembly_state (frag_now);
3788 /* Just to make sure that we did not split it up. */
3789 gas_assert (old_frag->fr_next == frag_now);
3793 /* Return TRUE if the target frag is one of the next non-empty frags. */
3796 is_next_frag_target (const fragS *fragP, const fragS *target)
3801 for (; fragP; fragP = fragP->fr_next)
3803 if (fragP == target)
3805 if (fragP->fr_fix != 0)
3807 if (fragP->fr_type == rs_fill && fragP->fr_offset != 0)
3809 if ((fragP->fr_type == rs_align || fragP->fr_type == rs_align_code)
3810 && ((fragP->fr_address % (1 << fragP->fr_offset)) != 0))
3812 if (fragP->fr_type == rs_space)
3820 is_branch_jmp_to_next (TInsn *insn, fragS *fragP)
3822 xtensa_isa isa = xtensa_default_isa;
3824 int num_ops = xtensa_opcode_num_operands (isa, insn->opcode);
3829 if (xtensa_opcode_is_branch (isa, insn->opcode) != 1
3830 && xtensa_opcode_is_jump (isa, insn->opcode) != 1)
3833 for (i = 0; i < num_ops; i++)
3835 if (xtensa_operand_is_PCrelative (isa, insn->opcode, i) == 1)
3841 if (target_op == -1)
3844 if (insn->ntok <= target_op)
3847 if (insn->tok[target_op].X_op != O_symbol)
3850 sym = insn->tok[target_op].X_add_symbol;
3854 if (insn->tok[target_op].X_add_number != 0)
3857 target_frag = symbol_get_frag (sym);
3858 if (target_frag == NULL)
3861 if (is_next_frag_target (fragP->fr_next, target_frag)
3862 && S_GET_VALUE (sym) == target_frag->fr_address)
3870 xg_add_branch_and_loop_targets (TInsn *insn)
3872 xtensa_isa isa = xtensa_default_isa;
3873 int num_ops = xtensa_opcode_num_operands (isa, insn->opcode);
3875 if (xtensa_opcode_is_loop (isa, insn->opcode) == 1)
3878 if (xtensa_operand_is_PCrelative (isa, insn->opcode, i) == 1
3879 && insn->tok[i].X_op == O_symbol)
3880 symbol_get_tc (insn->tok[i].X_add_symbol)->is_loop_target = TRUE;
3884 if (xtensa_opcode_is_branch (isa, insn->opcode) == 1
3885 || xtensa_opcode_is_loop (isa, insn->opcode) == 1)
3889 for (i = 0; i < insn->ntok && i < num_ops; i++)
3891 if (xtensa_operand_is_PCrelative (isa, insn->opcode, i) == 1
3892 && insn->tok[i].X_op == O_symbol)
3894 symbolS *sym = insn->tok[i].X_add_symbol;
3895 symbol_get_tc (sym)->is_branch_target = TRUE;
3896 if (S_IS_DEFINED (sym))
3897 symbol_get_frag (sym)->tc_frag_data.is_branch_target = TRUE;
3904 /* Return FALSE if no error. */
3907 xg_build_token_insn (BuildInstr *instr_spec, TInsn *old_insn, TInsn *new_insn)
3912 switch (instr_spec->typ)
3915 new_insn->insn_type = ITYPE_INSN;
3916 new_insn->opcode = instr_spec->opcode;
3918 case INSTR_LITERAL_DEF:
3919 new_insn->insn_type = ITYPE_LITERAL;
3920 new_insn->opcode = XTENSA_UNDEFINED;
3922 case INSTR_LABEL_DEF:
3925 new_insn->is_specific_opcode = FALSE;
3926 new_insn->debug_line = old_insn->debug_line;
3927 new_insn->loc_directive_seen = old_insn->loc_directive_seen;
3929 for (b_op = instr_spec->ops; b_op != NULL; b_op = b_op->next)
3932 const expressionS *src_exp;
3938 /* The expression must be the constant. */
3939 gas_assert (b_op->op_num < MAX_INSN_ARGS);
3940 exp = &new_insn->tok[b_op->op_num];
3941 set_expr_const (exp, b_op->op_data);
3945 gas_assert (b_op->op_num < MAX_INSN_ARGS);
3946 gas_assert (b_op->op_data < (unsigned) old_insn->ntok);
3947 src_exp = &old_insn->tok[b_op->op_data];
3948 exp = &new_insn->tok[b_op->op_num];
3949 copy_expr (exp, src_exp);
3954 as_bad (_("can't handle generation of literal/labels yet"));
3958 as_bad (_("can't handle undefined OP TYPE"));
3963 new_insn->ntok = num_ops;
3968 /* Return TRUE if it was simplified. */
3971 xg_simplify_insn (TInsn *old_insn, TInsn *new_insn)
3973 TransitionRule *rule;
3974 BuildInstr *insn_spec;
3976 if (old_insn->is_specific_opcode || !density_supported)
3979 rule = xg_instruction_match (old_insn);
3983 insn_spec = rule->to_instr;
3984 /* There should only be one. */
3985 gas_assert (insn_spec != NULL);
3986 gas_assert (insn_spec->next == NULL);
3987 if (insn_spec->next != NULL)
3990 xg_build_token_insn (insn_spec, old_insn, new_insn);
3996 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
3997 l32i.n. (2) Check the number of operands. (3) Place the instruction
3998 tokens into the stack or relax it and place multiple
3999 instructions/literals onto the stack. Return FALSE if no error. */
4002 xg_expand_assembly_insn (IStack *istack, TInsn *orig_insn)
4006 bfd_boolean do_expand;
4008 tinsn_init (&new_insn);
4010 /* Narrow it if we can. xg_simplify_insn now does all the
4011 appropriate checking (e.g., for the density option). */
4012 if (xg_simplify_insn (orig_insn, &new_insn))
4013 orig_insn = &new_insn;
4015 noperands = xtensa_opcode_num_operands (xtensa_default_isa,
4017 if (orig_insn->ntok < noperands)
4019 as_bad (ngettext ("found %d operand for '%s': Expected %d",
4020 "found %d operands for '%s': Expected %d",
4023 xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
4027 if (orig_insn->ntok > noperands)
4028 as_warn (ngettext ("found %d operand for '%s': Expected %d",
4029 "found %d operands for '%s': Expected %d",
4032 xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
4035 /* If there are not enough operands, we will assert above. If there
4036 are too many, just cut out the extras here. */
4037 orig_insn->ntok = noperands;
4039 if (tinsn_has_invalid_symbolic_operands (orig_insn))
4042 /* Special case for extui opcode which has constraints not handled
4043 by the ordinary operand encoding checks. The number of operands
4044 and related syntax issues have already been checked. */
4045 if (orig_insn->opcode == xtensa_extui_opcode)
4047 int shiftimm = orig_insn->tok[2].X_add_number;
4048 int maskimm = orig_insn->tok[3].X_add_number;
4049 if (shiftimm + maskimm > 32)
4051 as_bad (_("immediate operands sum to greater than 32"));
4056 /* If the instruction will definitely need to be relaxed, it is better
4057 to expand it now for better scheduling. Decide whether to expand
4059 do_expand = (!orig_insn->is_specific_opcode && use_transform ());
4061 /* Calls should be expanded to longcalls only in the backend relaxation
4062 so that the assembly scheduler will keep the L32R/CALLX instructions
4064 if (is_direct_call_opcode (orig_insn->opcode))
4067 if (tinsn_has_symbolic_operands (orig_insn))
4069 /* The values of symbolic operands are not known yet, so only expand
4070 now if an operand is "complex" (e.g., difference of symbols) and
4071 will have to be stored as a literal regardless of the value. */
4072 if (!tinsn_has_complex_operands (orig_insn))
4075 else if (xg_immeds_fit (orig_insn))
4079 xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
4081 istack_push (istack, orig_insn);
4087 /* Return TRUE if the section flags are marked linkonce
4088 or the name is .gnu.linkonce.*. */
4090 static int linkonce_len = sizeof (".gnu.linkonce.") - 1;
4093 get_is_linkonce_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec)
4095 flagword flags, link_once_flags;
4097 flags = bfd_get_section_flags (abfd, sec);
4098 link_once_flags = (flags & SEC_LINK_ONCE);
4100 /* Flags might not be set yet. */
4101 if (!link_once_flags
4102 && strncmp (segment_name (sec), ".gnu.linkonce.", linkonce_len) == 0)
4103 link_once_flags = SEC_LINK_ONCE;
4105 return (link_once_flags != 0);
4110 xtensa_add_literal_sym (symbolS *sym)
4114 l = XNEW (sym_list);
4116 l->next = literal_syms;
4122 xtensa_create_literal_symbol (segT sec, fragS *frag)
4124 static int lit_num = 0;
4125 static char name[256];
4128 sprintf (name, ".L_lit_sym%d", lit_num);
4130 /* Create a local symbol. If it is in a linkonce section, we have to
4131 be careful to make sure that if it is used in a relocation that the
4132 symbol will be in the output file. */
4133 if (get_is_linkonce_section (stdoutput, sec))
4135 symbolP = symbol_new (name, sec, 0, frag);
4136 S_CLEAR_EXTERNAL (symbolP);
4137 /* symbolP->local = 1; */
4140 symbolP = symbol_new (name, sec, 0, frag);
4142 xtensa_add_literal_sym (symbolP);
4149 /* Currently all literals that are generated here are 32-bit L32R targets. */
4152 xg_assemble_literal (/* const */ TInsn *insn)
4155 symbolS *lit_sym = NULL;
4156 bfd_reloc_code_real_type reloc;
4157 bfd_boolean pcrel = FALSE;
4160 /* size = 4 for L32R. It could easily be larger when we move to
4161 larger constants. Add a parameter later. */
4162 offsetT litsize = 4;
4163 offsetT litalign = 2; /* 2^2 = 4 */
4164 expressionS saved_loc;
4165 expressionS * emit_val;
4167 set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ());
4169 gas_assert (insn->insn_type == ITYPE_LITERAL);
4170 gas_assert (insn->ntok == 1); /* must be only one token here */
4172 xtensa_switch_to_literal_fragment (&state);
4174 emit_val = &insn->tok[0];
4175 if (emit_val->X_op == O_big)
4177 int size = emit_val->X_add_number * CHARS_PER_LITTLENUM;
4180 /* This happens when someone writes a "movi a2, big_number". */
4181 as_bad_where (frag_now->fr_file, frag_now->fr_line,
4182 _("invalid immediate"));
4183 xtensa_restore_emit_state (&state);
4188 /* Force a 4-byte align here. Note that this opens a new frag, so all
4189 literals done with this function have a frag to themselves. That's
4190 important for the way text section literals work. */
4191 frag_align (litalign, 0, 0);
4192 record_alignment (now_seg, litalign);
4194 switch (emit_val->X_op)
4204 p = frag_more (litsize);
4205 xtensa_set_frag_assembly_state (frag_now);
4206 reloc = map_operator_to_reloc (emit_val->X_op, TRUE);
4207 if (emit_val->X_add_symbol)
4208 emit_val->X_op = O_symbol;
4210 emit_val->X_op = O_constant;
4211 fix_new_exp (frag_now, p - frag_now->fr_literal,
4212 litsize, emit_val, pcrel, reloc);
4216 emit_expr (emit_val, litsize);
4220 gas_assert (frag_now->tc_frag_data.literal_frag == NULL);
4221 frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
4222 frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
4223 lit_sym = frag_now->fr_symbol;
4226 xtensa_restore_emit_state (&state);
4232 xg_assemble_literal_space (/* const */ int size, int slot)
4235 /* We might have to do something about this alignment. It only
4236 takes effect if something is placed here. */
4237 offsetT litalign = 2; /* 2^2 = 4 */
4238 fragS *lit_saved_frag;
4240 gas_assert (size % 4 == 0);
4242 xtensa_switch_to_literal_fragment (&state);
4244 /* Force a 4-byte align here. */
4245 frag_align (litalign, 0, 0);
4246 record_alignment (now_seg, litalign);
4250 lit_saved_frag = frag_now;
4251 frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
4252 frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
4253 xg_finish_frag (0, RELAX_LITERAL, 0, size, FALSE);
4256 xtensa_restore_emit_state (&state);
4257 frag_now->tc_frag_data.literal_frags[slot] = lit_saved_frag;
4261 /* Put in a fixup record based on the opcode.
4262 Return TRUE on success. */
4265 xg_add_opcode_fix (TInsn *tinsn,
4273 xtensa_opcode opcode = tinsn->opcode;
4274 bfd_reloc_code_real_type reloc;
4275 reloc_howto_type *howto;
4279 reloc = BFD_RELOC_NONE;
4281 /* First try the special cases for "alternate" relocs. */
4282 if (opcode == xtensa_l32r_opcode)
4284 if (fragP->tc_frag_data.use_absolute_literals)
4285 reloc = encode_alt_reloc (slot);
4287 else if (opcode == xtensa_const16_opcode)
4289 if (exp->X_op == O_lo16)
4291 reloc = encode_reloc (slot);
4292 exp->X_op = O_symbol;
4294 else if (exp->X_op == O_hi16)
4296 reloc = encode_alt_reloc (slot);
4297 exp->X_op = O_symbol;
4301 if (opnum != get_relaxable_immed (opcode))
4303 as_bad (_("invalid relocation for operand %i of '%s'"),
4304 opnum + 1, xtensa_opcode_name (xtensa_default_isa, opcode));
4308 /* Handle erroneous "@h" and "@l" expressions here before they propagate
4309 into the symbol table where the generic portions of the assembler
4310 won't know what to do with them. */
4311 if (exp->X_op == O_lo16 || exp->X_op == O_hi16)
4313 as_bad (_("invalid expression for operand %i of '%s'"),
4314 opnum + 1, xtensa_opcode_name (xtensa_default_isa, opcode));
4318 /* Next try the generic relocs. */
4319 if (reloc == BFD_RELOC_NONE)
4320 reloc = encode_reloc (slot);
4321 if (reloc == BFD_RELOC_NONE)
4323 as_bad (_("invalid relocation in instruction slot %i"), slot);
4327 howto = bfd_reloc_type_lookup (stdoutput, reloc);
4330 as_bad (_("undefined symbol for opcode \"%s\""),
4331 xtensa_opcode_name (xtensa_default_isa, opcode));
4335 fmt_length = xtensa_format_length (xtensa_default_isa, fmt);
4336 the_fix = fix_new_exp (fragP, offset, fmt_length, exp,
4337 howto->pc_relative, reloc);
4338 the_fix->fx_no_overflow = 1;
4339 the_fix->tc_fix_data.X_add_symbol = exp->X_add_symbol;
4340 the_fix->tc_fix_data.X_add_number = exp->X_add_number;
4341 the_fix->tc_fix_data.slot = slot;
4348 xg_emit_insn_to_buf (TInsn *tinsn,
4352 bfd_boolean build_fix)
4354 static xtensa_insnbuf insnbuf = NULL;
4355 bfd_boolean has_symbolic_immed = FALSE;
4356 bfd_boolean ok = TRUE;
4359 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
4361 has_symbolic_immed = tinsn_to_insnbuf (tinsn, insnbuf);
4362 if (has_symbolic_immed && build_fix)
4365 xtensa_format fmt = xg_get_single_format (tinsn->opcode);
4366 int slot = xg_get_single_slot (tinsn->opcode);
4367 int opnum = get_relaxable_immed (tinsn->opcode);
4368 expressionS *exp = &tinsn->tok[opnum];
4370 if (!xg_add_opcode_fix (tinsn, opnum, fmt, slot, exp, fragP, offset))
4373 fragP->tc_frag_data.is_insn = TRUE;
4374 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf,
4375 (unsigned char *) buf, 0);
4381 xg_resolve_literals (TInsn *insn, symbolS *lit_sym)
4383 symbolS *sym = get_special_literal_symbol ();
4387 gas_assert (insn->insn_type == ITYPE_INSN);
4388 for (i = 0; i < insn->ntok; i++)
4389 if (insn->tok[i].X_add_symbol == sym)
4390 insn->tok[i].X_add_symbol = lit_sym;
4396 xg_resolve_labels (TInsn *insn, symbolS *label_sym)
4398 symbolS *sym = get_special_label_symbol ();
4400 for (i = 0; i < insn->ntok; i++)
4401 if (insn->tok[i].X_add_symbol == sym)
4402 insn->tok[i].X_add_symbol = label_sym;
4407 /* Return TRUE if the instruction can write to the specified
4408 integer register. */
4411 is_register_writer (const TInsn *insn, const char *regset, int regnum)
4415 xtensa_isa isa = xtensa_default_isa;
4417 num_ops = xtensa_opcode_num_operands (isa, insn->opcode);
4419 for (i = 0; i < num_ops; i++)
4422 inout = xtensa_operand_inout (isa, insn->opcode, i);
4423 if ((inout == 'o' || inout == 'm')
4424 && xtensa_operand_is_register (isa, insn->opcode, i) == 1)
4426 xtensa_regfile opnd_rf =
4427 xtensa_operand_regfile (isa, insn->opcode, i);
4428 if (!strcmp (xtensa_regfile_shortname (isa, opnd_rf), regset))
4430 if ((insn->tok[i].X_op == O_register)
4431 && (insn->tok[i].X_add_number == regnum))
4441 is_bad_loopend_opcode (const TInsn *tinsn)
4443 xtensa_opcode opcode = tinsn->opcode;
4445 if (opcode == XTENSA_UNDEFINED)
4448 if (opcode == xtensa_call0_opcode
4449 || opcode == xtensa_callx0_opcode
4450 || opcode == xtensa_call4_opcode
4451 || opcode == xtensa_callx4_opcode
4452 || opcode == xtensa_call8_opcode
4453 || opcode == xtensa_callx8_opcode
4454 || opcode == xtensa_call12_opcode
4455 || opcode == xtensa_callx12_opcode
4456 || opcode == xtensa_isync_opcode
4457 || opcode == xtensa_ret_opcode
4458 || opcode == xtensa_ret_n_opcode
4459 || opcode == xtensa_retw_opcode
4460 || opcode == xtensa_retw_n_opcode
4461 || opcode == xtensa_waiti_opcode
4462 || opcode == xtensa_rsr_lcount_opcode)
4469 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4470 This allows the debugger to add unaligned labels.
4471 Also, the assembler generates stabs labels that need
4472 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4475 is_unaligned_label (symbolS *sym)
4477 const char *name = S_GET_NAME (sym);
4478 static size_t fake_size = 0;
4482 && name[1] == 'L' && (name[2] == 'n' || name[2] == 'M'))
4485 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4487 fake_size = strlen (FAKE_LABEL_NAME);
4490 && strncmp (FAKE_LABEL_NAME, name, fake_size) == 0
4491 && (name[fake_size] == 'F'
4492 || name[fake_size] == 'L'
4493 || (name[fake_size] == 'e'
4494 && strncmp ("endfunc", name+fake_size, 7) == 0)))
4502 next_non_empty_frag (const fragS *fragP)
4504 fragS *next_fragP = fragP->fr_next;
4506 /* Sometimes an empty will end up here due storage allocation issues.
4507 So we have to skip until we find something legit. */
4508 while (next_fragP && next_fragP->fr_fix == 0)
4509 next_fragP = next_fragP->fr_next;
4511 if (next_fragP == NULL || next_fragP->fr_fix == 0)
4519 next_frag_opcode_is_loop (const fragS *fragP, xtensa_opcode *opcode)
4521 xtensa_opcode out_opcode;
4522 const fragS *next_fragP = next_non_empty_frag (fragP);
4524 if (next_fragP == NULL)
4527 out_opcode = get_opcode_from_buf (next_fragP->fr_literal, 0);
4528 if (xtensa_opcode_is_loop (xtensa_default_isa, out_opcode) == 1)
4530 *opcode = out_opcode;
4538 frag_format_size (const fragS *fragP)
4540 static xtensa_insnbuf insnbuf = NULL;
4541 xtensa_isa isa = xtensa_default_isa;
4546 insnbuf = xtensa_insnbuf_alloc (isa);
4549 return XTENSA_UNDEFINED;
4551 xtensa_insnbuf_from_chars (isa, insnbuf,
4552 (unsigned char *) fragP->fr_literal, 0);
4554 fmt = xtensa_format_decode (isa, insnbuf);
4555 if (fmt == XTENSA_UNDEFINED)
4556 return XTENSA_UNDEFINED;
4557 fmt_size = xtensa_format_length (isa, fmt);
4559 /* If the next format won't be changing due to relaxation, just
4560 return the length of the first format. */
4561 if (fragP->fr_opcode != fragP->fr_literal)
4564 /* If during relaxation we have to pull an instruction out of a
4565 multi-slot instruction, we will return the more conservative
4566 number. This works because alignment on bigger instructions
4567 is more restrictive than alignment on smaller instructions.
4568 This is more conservative than we would like, but it happens
4571 if (xtensa_format_num_slots (xtensa_default_isa, fmt) > 1)
4574 /* If we aren't doing one of our own relaxations or it isn't
4575 slot-based, then the insn size won't change. */
4576 if (fragP->fr_type != rs_machine_dependent)
4578 if (fragP->fr_subtype != RELAX_SLOTS)
4581 /* If an instruction is about to grow, return the longer size. */
4582 if (fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED_STEP1
4583 || fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED_STEP2
4584 || fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED_STEP3)
4586 /* For most frags at RELAX_IMMED_STEPX, with X > 0, the first
4587 instruction in the relaxed version is of length 3. (The case
4588 where we have to pull the instruction out of a FLIX bundle
4589 is handled conservatively above.) However, frags with opcodes
4590 that are expanding to wide branches end up having formats that
4591 are not determinable by the RELAX_IMMED_STEPX enumeration, and
4592 we can't tell directly what format the relaxer picked. This
4593 is a wart in the design of the relaxer that should someday be
4594 fixed, but would require major changes, or at least should
4595 be accompanied by major changes to make use of that data.
4597 In any event, we can tell that we are expanding from a single-slot
4598 format to a wider one with the logic below. */
4601 int relaxed_size = fmt_size + fragP->tc_frag_data.text_expansion[0];
4603 for (i = 0; i < xtensa_isa_num_formats (isa); i++)
4605 if (relaxed_size == xtensa_format_length (isa, i))
4606 return relaxed_size;
4612 if (fragP->tc_frag_data.slot_subtypes[0] == RELAX_NARROW)
4613 return 2 + fragP->tc_frag_data.text_expansion[0];
4620 next_frag_format_size (const fragS *fragP)
4622 const fragS *next_fragP = next_non_empty_frag (fragP);
4623 return frag_format_size (next_fragP);
4627 /* In early Xtensa Processors, for reasons that are unclear, the ISA
4628 required two-byte instructions to be treated as three-byte instructions
4629 for loop instruction alignment. This restriction was removed beginning
4630 with Xtensa LX. Now the only requirement on loop instruction alignment
4631 is that the first instruction of the loop must appear at an address that
4632 does not cross a fetch boundary. */
4635 get_loop_align_size (int insn_size)
4637 if (insn_size == XTENSA_UNDEFINED)
4638 return xtensa_fetch_width;
4640 if (enforce_three_byte_loop_align && insn_size == 2)
4647 /* If the next legit fragment is an end-of-loop marker,
4648 switch its state so it will instantiate a NOP. */
4651 update_next_frag_state (fragS *fragP)
4653 fragS *next_fragP = fragP->fr_next;
4654 fragS *new_target = NULL;
4658 /* We are guaranteed there will be one of these... */
4659 while (!(next_fragP->fr_type == rs_machine_dependent
4660 && (next_fragP->fr_subtype == RELAX_MAYBE_UNREACHABLE
4661 || next_fragP->fr_subtype == RELAX_UNREACHABLE)))
4662 next_fragP = next_fragP->fr_next;
4664 gas_assert (next_fragP->fr_type == rs_machine_dependent
4665 && (next_fragP->fr_subtype == RELAX_MAYBE_UNREACHABLE
4666 || next_fragP->fr_subtype == RELAX_UNREACHABLE));
4668 /* ...and one of these. */
4669 new_target = next_fragP->fr_next;
4670 while (!(new_target->fr_type == rs_machine_dependent
4671 && (new_target->fr_subtype == RELAX_MAYBE_DESIRE_ALIGN
4672 || new_target->fr_subtype == RELAX_DESIRE_ALIGN)))
4673 new_target = new_target->fr_next;
4675 gas_assert (new_target->fr_type == rs_machine_dependent
4676 && (new_target->fr_subtype == RELAX_MAYBE_DESIRE_ALIGN
4677 || new_target->fr_subtype == RELAX_DESIRE_ALIGN));
4680 while (next_fragP && next_fragP->fr_fix == 0)
4682 if (next_fragP->fr_type == rs_machine_dependent
4683 && next_fragP->fr_subtype == RELAX_LOOP_END)
4685 next_fragP->fr_subtype = RELAX_LOOP_END_ADD_NOP;
4689 next_fragP = next_fragP->fr_next;
4695 next_frag_is_branch_target (const fragS *fragP)
4697 /* Sometimes an empty will end up here due to storage allocation issues,
4698 so we have to skip until we find something legit. */
4699 for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
4701 if (fragP->tc_frag_data.is_branch_target)
4703 if (fragP->fr_fix != 0)
4711 next_frag_is_loop_target (const fragS *fragP)
4713 /* Sometimes an empty will end up here due storage allocation issues.
4714 So we have to skip until we find something legit. */
4715 for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
4717 if (fragP->tc_frag_data.is_loop_target)
4719 if (fragP->fr_fix != 0)
4726 /* As specified in the relaxation table, when a loop instruction is
4727 relaxed, there are 24 bytes between the loop instruction itself and
4728 the first instruction in the loop. */
4730 #define RELAXED_LOOP_INSN_BYTES 24
4733 next_frag_pre_opcode_bytes (const fragS *fragp)
4735 const fragS *next_fragp = fragp->fr_next;
4736 xtensa_opcode next_opcode;
4738 if (!next_frag_opcode_is_loop (fragp, &next_opcode))
4741 /* Sometimes an empty will end up here due to storage allocation issues,
4742 so we have to skip until we find something legit. */
4743 while (next_fragp->fr_fix == 0)
4744 next_fragp = next_fragp->fr_next;
4746 if (next_fragp->fr_type != rs_machine_dependent)
4749 /* There is some implicit knowledge encoded in here.
4750 The LOOP instructions that are NOT RELAX_IMMED have
4751 been relaxed. Note that we can assume that the LOOP
4752 instruction is in slot 0 because loops aren't bundleable. */
4753 if (next_fragp->tc_frag_data.slot_subtypes[0] > RELAX_IMMED)
4754 return get_expanded_loop_offset (next_opcode) + RELAXED_LOOP_INSN_BYTES;
4760 /* Mark a location where we can later insert literal frags. Update
4761 the section's literal_pool_loc, so subsequent literals can be
4762 placed nearest to their use. */
4765 xtensa_mark_literal_pool_location (void)
4767 /* Any labels pointing to the current location need
4768 to be adjusted to after the literal pool. */
4770 fragS *pool_location;
4772 if (use_literal_section)
4775 /* We stash info in these frags so we can later move the literal's
4776 fixes into this frchain's fix list. */
4777 pool_location = frag_now;
4778 frag_now->tc_frag_data.lit_frchain = frchain_now;
4779 frag_now->tc_frag_data.literal_frag = frag_now;
4780 /* Just record this frag. */
4781 xtensa_maybe_create_literal_pool_frag (FALSE, FALSE);
4782 frag_variant (rs_machine_dependent, 0, 0,
4783 RELAX_LITERAL_POOL_BEGIN, NULL, 0, NULL);
4784 xtensa_set_frag_assembly_state (frag_now);
4785 frag_now->tc_frag_data.lit_seg = now_seg;
4786 frag_variant (rs_machine_dependent, 0, 0,
4787 RELAX_LITERAL_POOL_END, NULL, 0, NULL);
4788 xtensa_set_frag_assembly_state (frag_now);
4790 /* Now put a frag into the literal pool that points to this location. */
4791 set_literal_pool_location (now_seg, pool_location);
4792 xtensa_switch_to_non_abs_literal_fragment (&s);
4793 frag_align (2, 0, 0);
4794 record_alignment (now_seg, 2);
4796 /* Close whatever frag is there. */
4797 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
4798 xtensa_set_frag_assembly_state (frag_now);
4799 frag_now->tc_frag_data.literal_frag = pool_location;
4800 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
4801 xtensa_restore_emit_state (&s);
4802 xtensa_set_frag_assembly_state (frag_now);
4806 /* Build a nop of the correct size into tinsn. */
4809 build_nop (TInsn *tinsn, int size)
4815 tinsn->opcode = xtensa_nop_n_opcode;
4817 if (tinsn->opcode == XTENSA_UNDEFINED)
4818 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4822 if (xtensa_nop_opcode == XTENSA_UNDEFINED)
4824 tinsn->opcode = xtensa_or_opcode;
4825 set_expr_const (&tinsn->tok[0], 1);
4826 set_expr_const (&tinsn->tok[1], 1);
4827 set_expr_const (&tinsn->tok[2], 1);
4831 tinsn->opcode = xtensa_nop_opcode;
4833 gas_assert (tinsn->opcode != XTENSA_UNDEFINED);
4838 /* Assemble a NOP of the requested size in the buffer. User must have
4839 allocated "buf" with at least "size" bytes. */
4842 assemble_nop (int size, char *buf)
4844 static xtensa_insnbuf insnbuf = NULL;
4847 build_nop (&tinsn, size);
4850 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
4852 tinsn_to_insnbuf (&tinsn, insnbuf);
4853 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf,
4854 (unsigned char *) buf, 0);
4858 /* Return the number of bytes for the offset of the expanded loop
4859 instruction. This should be incorporated into the relaxation
4860 specification but is hard-coded here. This is used to auto-align
4861 the loop instruction. It is invalid to call this function if the
4862 configuration does not have loops or if the opcode is not a loop
4866 get_expanded_loop_offset (xtensa_opcode opcode)
4868 /* This is the OFFSET of the loop instruction in the expanded loop.
4869 This MUST correspond directly to the specification of the loop
4870 expansion. It will be validated on fragment conversion. */
4871 gas_assert (opcode != XTENSA_UNDEFINED);
4872 if (opcode == xtensa_loop_opcode)
4874 if (opcode == xtensa_loopnez_opcode)
4876 if (opcode == xtensa_loopgtz_opcode)
4878 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4884 get_literal_pool_location (segT seg)
4886 struct litpool_seg *lps = litpool_seg_list.next;
4887 struct litpool_frag *lpf;
4888 for ( ; lps && lps->seg->id != seg->id; lps = lps->next)
4892 for (lpf = lps->frag_list.prev; lpf->fragP; lpf = lpf->prev)
4893 { /* Skip "candidates" for now. */
4894 if (lpf->fragP->fr_subtype == RELAX_LITERAL_POOL_BEGIN &&
4898 /* Must convert a lower-priority pool. */
4899 for (lpf = lps->frag_list.prev; lpf->fragP; lpf = lpf->prev)
4901 if (lpf->fragP->fr_subtype == RELAX_LITERAL_POOL_BEGIN)
4904 /* Still no match -- try for a low priority pool. */
4905 for (lpf = lps->frag_list.prev; lpf->fragP; lpf = lpf->prev)
4907 if (lpf->fragP->fr_subtype == RELAX_LITERAL_POOL_CANDIDATE_BEGIN)
4911 return seg_info (seg)->tc_segment_info_data.literal_pool_loc;
4916 set_literal_pool_location (segT seg, fragS *literal_pool_loc)
4918 seg_info (seg)->tc_segment_info_data.literal_pool_loc = literal_pool_loc;
4922 /* Set frag assembly state should be called when a new frag is
4923 opened and after a frag has been closed. */
4926 xtensa_set_frag_assembly_state (fragS *fragP)
4928 if (!density_supported)
4929 fragP->tc_frag_data.is_no_density = TRUE;
4931 /* This function is called from subsegs_finish, which is called
4932 after xtensa_end, so we can't use "use_transform" or
4933 "use_schedule" here. */
4934 if (!directive_state[directive_transform])
4935 fragP->tc_frag_data.is_no_transform = TRUE;
4936 if (directive_state[directive_longcalls])
4937 fragP->tc_frag_data.use_longcalls = TRUE;
4938 fragP->tc_frag_data.use_absolute_literals =
4939 directive_state[directive_absolute_literals];
4940 fragP->tc_frag_data.is_assembly_state_set = TRUE;
4945 relaxable_section (asection *sec)
4947 return ((sec->flags & SEC_DEBUGGING) == 0
4948 && strcmp (sec->name, ".eh_frame") != 0);
4953 xtensa_mark_frags_for_org (void)
4957 /* Walk over each fragment of all of the current segments. If we find
4958 a .org frag in any of the segments, mark all frags prior to it as
4959 "no transform", which will prevent linker optimizations from messing
4960 up the .org distance. This should be done after
4961 xtensa_find_unmarked_state_frags, because we don't want to worry here
4962 about that function trashing the data we save here. */
4964 for (seclist = &stdoutput->sections;
4965 seclist && *seclist;
4966 seclist = &(*seclist)->next)
4968 segT sec = *seclist;
4969 segment_info_type *seginfo;
4972 flags = bfd_get_section_flags (stdoutput, sec);
4973 if (flags & SEC_DEBUGGING)
4975 if (!(flags & SEC_ALLOC))
4978 seginfo = seg_info (sec);
4979 if (seginfo && seginfo->frchainP)
4981 fragS *last_fragP = seginfo->frchainP->frch_root;
4982 for (fragP = seginfo->frchainP->frch_root; fragP;
4983 fragP = fragP->fr_next)
4985 /* cvt_frag_to_fill has changed the fr_type of org frags to
4986 rs_fill, so use the value as cached in rs_subtype here. */
4987 if (fragP->fr_subtype == RELAX_ORG)
4989 while (last_fragP != fragP->fr_next)
4991 last_fragP->tc_frag_data.is_no_transform = TRUE;
4992 last_fragP = last_fragP->fr_next;
5002 xtensa_find_unmarked_state_frags (void)
5006 /* Walk over each fragment of all of the current segments. For each
5007 unmarked fragment, mark it with the same info as the previous
5009 for (seclist = &stdoutput->sections;
5010 seclist && *seclist;
5011 seclist = &(*seclist)->next)
5013 segT sec = *seclist;
5014 segment_info_type *seginfo;
5017 flags = bfd_get_section_flags (stdoutput, sec);
5018 if (flags & SEC_DEBUGGING)
5020 if (!(flags & SEC_ALLOC))
5023 seginfo = seg_info (sec);
5024 if (seginfo && seginfo->frchainP)
5026 fragS *last_fragP = 0;
5027 for (fragP = seginfo->frchainP->frch_root; fragP;
5028 fragP = fragP->fr_next)
5030 if (fragP->fr_fix != 0
5031 && !fragP->tc_frag_data.is_assembly_state_set)
5033 if (last_fragP == 0)
5035 as_warn_where (fragP->fr_file, fragP->fr_line,
5036 _("assembly state not set for first frag in section %s"),
5041 fragP->tc_frag_data.is_assembly_state_set = TRUE;
5042 fragP->tc_frag_data.is_no_density =
5043 last_fragP->tc_frag_data.is_no_density;
5044 fragP->tc_frag_data.is_no_transform =
5045 last_fragP->tc_frag_data.is_no_transform;
5046 fragP->tc_frag_data.use_longcalls =
5047 last_fragP->tc_frag_data.use_longcalls;
5048 fragP->tc_frag_data.use_absolute_literals =
5049 last_fragP->tc_frag_data.use_absolute_literals;
5052 if (fragP->tc_frag_data.is_assembly_state_set)
5061 xtensa_find_unaligned_branch_targets (bfd *abfd ATTRIBUTE_UNUSED,
5063 void *unused ATTRIBUTE_UNUSED)
5065 flagword flags = bfd_get_section_flags (abfd, sec);
5066 segment_info_type *seginfo = seg_info (sec);
5067 fragS *frag = seginfo->frchainP->frch_root;
5069 if (flags & SEC_CODE)
5071 xtensa_isa isa = xtensa_default_isa;
5072 xtensa_insnbuf insnbuf = xtensa_insnbuf_alloc (isa);
5073 while (frag != NULL)
5075 if (frag->tc_frag_data.is_branch_target)
5078 addressT branch_align, frag_addr;
5081 xtensa_insnbuf_from_chars
5082 (isa, insnbuf, (unsigned char *) frag->fr_literal, 0);
5083 fmt = xtensa_format_decode (isa, insnbuf);
5084 op_size = xtensa_format_length (isa, fmt);
5085 branch_align = 1 << branch_align_power (sec);
5086 frag_addr = frag->fr_address % branch_align;
5087 if (frag_addr + op_size > branch_align)
5088 as_warn_where (frag->fr_file, frag->fr_line,
5089 _("unaligned branch target: %d bytes at 0x%lx"),
5090 op_size, (long) frag->fr_address);
5092 frag = frag->fr_next;
5094 xtensa_insnbuf_free (isa, insnbuf);
5100 xtensa_find_unaligned_loops (bfd *abfd ATTRIBUTE_UNUSED,
5102 void *unused ATTRIBUTE_UNUSED)
5104 flagword flags = bfd_get_section_flags (abfd, sec);
5105 segment_info_type *seginfo = seg_info (sec);
5106 fragS *frag = seginfo->frchainP->frch_root;
5107 xtensa_isa isa = xtensa_default_isa;
5109 if (flags & SEC_CODE)
5111 xtensa_insnbuf insnbuf = xtensa_insnbuf_alloc (isa);
5112 while (frag != NULL)
5114 if (frag->tc_frag_data.is_first_loop_insn)
5120 if (frag->fr_fix == 0)
5121 frag = next_non_empty_frag (frag);
5125 xtensa_insnbuf_from_chars
5126 (isa, insnbuf, (unsigned char *) frag->fr_literal, 0);
5127 fmt = xtensa_format_decode (isa, insnbuf);
5128 op_size = xtensa_format_length (isa, fmt);
5129 frag_addr = frag->fr_address % xtensa_fetch_width;
5131 if (frag_addr + op_size > xtensa_fetch_width)
5132 as_warn_where (frag->fr_file, frag->fr_line,
5133 _("unaligned loop: %d bytes at 0x%lx"),
5134 op_size, (long) frag->fr_address);
5137 frag = frag->fr_next;
5139 xtensa_insnbuf_free (isa, insnbuf);
5145 xg_apply_fix_value (fixS *fixP, valueT val)
5147 xtensa_isa isa = xtensa_default_isa;
5148 static xtensa_insnbuf insnbuf = NULL;
5149 static xtensa_insnbuf slotbuf = NULL;
5152 bfd_boolean alt_reloc;
5153 xtensa_opcode opcode;
5154 char *const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
5156 if (decode_reloc (fixP->fx_r_type, &slot, &alt_reloc)
5158 as_fatal (_("unexpected fix"));
5162 insnbuf = xtensa_insnbuf_alloc (isa);
5163 slotbuf = xtensa_insnbuf_alloc (isa);
5166 xtensa_insnbuf_from_chars (isa, insnbuf, (unsigned char *) fixpos, 0);
5167 fmt = xtensa_format_decode (isa, insnbuf);
5168 if (fmt == XTENSA_UNDEFINED)
5169 as_fatal (_("undecodable fix"));
5170 xtensa_format_get_slot (isa, fmt, slot, insnbuf, slotbuf);
5171 opcode = xtensa_opcode_decode (isa, fmt, slot, slotbuf);
5172 if (opcode == XTENSA_UNDEFINED)
5173 as_fatal (_("undecodable fix"));
5175 /* CONST16 immediates are not PC-relative, despite the fact that we
5176 reuse the normal PC-relative operand relocations for the low part
5177 of a CONST16 operand. */
5178 if (opcode == xtensa_const16_opcode)
5181 xtensa_insnbuf_set_operand (slotbuf, fmt, slot, opcode,
5182 get_relaxable_immed (opcode), val,
5183 fixP->fx_file, fixP->fx_line);
5185 xtensa_format_set_slot (isa, fmt, slot, insnbuf, slotbuf);
5186 xtensa_insnbuf_to_chars (isa, insnbuf, (unsigned char *) fixpos, 0);
5192 /* External Functions and Other GAS Hooks. */
5195 xtensa_target_format (void)
5197 return (target_big_endian ? "elf32-xtensa-be" : "elf32-xtensa-le");
5202 xtensa_file_arch_init (bfd *abfd)
5204 bfd_set_private_flags (abfd, 0x100 | 0x200);
5209 md_number_to_chars (char *buf, valueT val, int n)
5211 if (target_big_endian)
5212 number_to_chars_bigendian (buf, val, n);
5214 number_to_chars_littleendian (buf, val, n);
5218 xg_init_global_config (void)
5220 target_big_endian = XCHAL_HAVE_BE;
5222 density_supported = XCHAL_HAVE_DENSITY;
5223 absolute_literals_supported = XSHAL_USE_ABSOLUTE_LITERALS;
5224 xtensa_fetch_width = XCHAL_INST_FETCH_WIDTH;
5226 directive_state[directive_density] = XCHAL_HAVE_DENSITY;
5227 directive_state[directive_absolute_literals] = XSHAL_USE_ABSOLUTE_LITERALS;
5231 xtensa_init (int argc ATTRIBUTE_UNUSED, char **argv ATTRIBUTE_UNUSED)
5233 xg_init_global_config ();
5236 /* This function is called once, at assembler startup time. It should
5237 set up all the tables, etc. that the MD part of the assembler will
5243 segT current_section = now_seg;
5244 int current_subsec = now_subseg;
5248 xtensa_default_isa = xtensa_isa_init (0, 0);
5249 isa = xtensa_default_isa;
5253 /* Set up the literal sections. */
5254 memset (&default_lit_sections, 0, sizeof (default_lit_sections));
5256 subseg_set (current_section, current_subsec);
5258 xtensa_addi_opcode = xtensa_opcode_lookup (isa, "addi");
5259 xtensa_addmi_opcode = xtensa_opcode_lookup (isa, "addmi");
5260 xtensa_call0_opcode = xtensa_opcode_lookup (isa, "call0");
5261 xtensa_call4_opcode = xtensa_opcode_lookup (isa, "call4");
5262 xtensa_call8_opcode = xtensa_opcode_lookup (isa, "call8");
5263 xtensa_call12_opcode = xtensa_opcode_lookup (isa, "call12");
5264 xtensa_callx0_opcode = xtensa_opcode_lookup (isa, "callx0");
5265 xtensa_callx4_opcode = xtensa_opcode_lookup (isa, "callx4");
5266 xtensa_callx8_opcode = xtensa_opcode_lookup (isa, "callx8");
5267 xtensa_callx12_opcode = xtensa_opcode_lookup (isa, "callx12");
5268 xtensa_const16_opcode = xtensa_opcode_lookup (isa, "const16");
5269 xtensa_entry_opcode = xtensa_opcode_lookup (isa, "entry");
5270 xtensa_extui_opcode = xtensa_opcode_lookup (isa, "extui");
5271 xtensa_movi_opcode = xtensa_opcode_lookup (isa, "movi");
5272 xtensa_movi_n_opcode = xtensa_opcode_lookup (isa, "movi.n");
5273 xtensa_isync_opcode = xtensa_opcode_lookup (isa, "isync");
5274 xtensa_j_opcode = xtensa_opcode_lookup (isa, "j");
5275 xtensa_jx_opcode = xtensa_opcode_lookup (isa, "jx");
5276 xtensa_l32r_opcode = xtensa_opcode_lookup (isa, "l32r");
5277 xtensa_loop_opcode = xtensa_opcode_lookup (isa, "loop");
5278 xtensa_loopnez_opcode = xtensa_opcode_lookup (isa, "loopnez");
5279 xtensa_loopgtz_opcode = xtensa_opcode_lookup (isa, "loopgtz");
5280 xtensa_nop_opcode = xtensa_opcode_lookup (isa, "nop");
5281 xtensa_nop_n_opcode = xtensa_opcode_lookup (isa, "nop.n");
5282 xtensa_or_opcode = xtensa_opcode_lookup (isa, "or");
5283 xtensa_ret_opcode = xtensa_opcode_lookup (isa, "ret");
5284 xtensa_ret_n_opcode = xtensa_opcode_lookup (isa, "ret.n");
5285 xtensa_retw_opcode = xtensa_opcode_lookup (isa, "retw");
5286 xtensa_retw_n_opcode = xtensa_opcode_lookup (isa, "retw.n");
5287 xtensa_rsr_lcount_opcode = xtensa_opcode_lookup (isa, "rsr.lcount");
5288 xtensa_waiti_opcode = xtensa_opcode_lookup (isa, "waiti");
5290 for (i = 0; i < xtensa_isa_num_formats (isa); i++)
5292 int format_slots = xtensa_format_num_slots (isa, i);
5293 if (format_slots > config_max_slots)
5294 config_max_slots = format_slots;
5297 xg_init_vinsn (&cur_vinsn);
5299 xtensa_num_pipe_stages = xtensa_isa_num_pipe_stages (isa);
5301 init_op_placement_info_table ();
5303 /* Set up the assembly state. */
5304 if (!frag_now->tc_frag_data.is_assembly_state_set)
5305 xtensa_set_frag_assembly_state (frag_now);
5309 /* TC_INIT_FIX_DATA hook */
5312 xtensa_init_fix_data (fixS *x)
5314 x->tc_fix_data.slot = 0;
5315 x->tc_fix_data.X_add_symbol = NULL;
5316 x->tc_fix_data.X_add_number = 0;
5320 /* tc_frob_label hook */
5323 xtensa_frob_label (symbolS *sym)
5327 if (cur_vinsn.inside_bundle)
5329 as_bad (_("labels are not valid inside bundles"));
5333 freq = get_subseg_target_freq (now_seg, now_subseg);
5335 /* Since the label was already attached to a frag associated with the
5336 previous basic block, it now needs to be reset to the current frag. */
5337 symbol_set_frag (sym, frag_now);
5338 S_SET_VALUE (sym, (valueT) frag_now_fix ());
5340 if (generating_literals)
5341 xtensa_add_literal_sym (sym);
5343 xtensa_add_insn_label (sym);
5345 if (symbol_get_tc (sym)->is_loop_target)
5347 if ((get_last_insn_flags (now_seg, now_subseg)
5348 & FLAG_IS_BAD_LOOPEND) != 0)
5349 as_bad (_("invalid last instruction for a zero-overhead loop"));
5351 xtensa_set_frag_assembly_state (frag_now);
5352 frag_var (rs_machine_dependent, 4, 4, RELAX_LOOP_END,
5353 frag_now->fr_symbol, frag_now->fr_offset, NULL);
5355 xtensa_set_frag_assembly_state (frag_now);
5356 xtensa_move_labels (frag_now, 0);
5359 /* No target aligning in the absolute section. */
5360 if (now_seg != absolute_section
5361 && !is_unaligned_label (sym)
5362 && !generating_literals)
5364 xtensa_set_frag_assembly_state (frag_now);
5366 if (do_align_targets ())
5367 frag_var (rs_machine_dependent, 0, (int) freq,
5368 RELAX_DESIRE_ALIGN_IF_TARGET, frag_now->fr_symbol,
5369 frag_now->fr_offset, NULL);
5371 frag_var (rs_fill, 0, 0, frag_now->fr_subtype,
5372 frag_now->fr_symbol, frag_now->fr_offset, NULL);
5373 xtensa_set_frag_assembly_state (frag_now);
5374 xtensa_move_labels (frag_now, 0);
5377 /* We need to mark the following properties even if we aren't aligning. */
5379 /* If the label is already known to be a branch target, i.e., a
5380 forward branch, mark the frag accordingly. Backward branches
5381 are handled by xg_add_branch_and_loop_targets. */
5382 if (symbol_get_tc (sym)->is_branch_target)
5383 symbol_get_frag (sym)->tc_frag_data.is_branch_target = TRUE;
5385 /* Loops only go forward, so they can be identified here. */
5386 if (symbol_get_tc (sym)->is_loop_target)
5387 symbol_get_frag (sym)->tc_frag_data.is_loop_target = TRUE;
5389 dwarf2_emit_label (sym);
5393 /* tc_unrecognized_line hook */
5396 xtensa_unrecognized_line (int ch)
5401 if (cur_vinsn.inside_bundle == 0)
5403 /* PR8110: Cannot emit line number info inside a FLIX bundle
5404 when using --gstabs. Temporarily disable debug info. */
5405 generate_lineno_debug ();
5406 if (debug_type == DEBUG_STABS)
5408 xt_saved_debug_type = debug_type;
5409 debug_type = DEBUG_NONE;
5412 cur_vinsn.inside_bundle = 1;
5416 as_bad (_("extra opening brace"));
5422 if (cur_vinsn.inside_bundle)
5423 finish_vinsn (&cur_vinsn);
5426 as_bad (_("extra closing brace"));
5431 as_bad (_("syntax error"));
5438 /* md_flush_pending_output hook */
5441 xtensa_flush_pending_output (void)
5443 /* This line fixes a bug where automatically generated gstabs info
5444 separates a function label from its entry instruction, ending up
5445 with the literal position between the function label and the entry
5446 instruction and crashing code. It only happens with --gstabs and
5447 --text-section-literals, and when several other obscure relaxation
5448 conditions are met. */
5449 if (outputting_stabs_line_debug)
5452 if (cur_vinsn.inside_bundle)
5453 as_bad (_("missing closing brace"));
5455 /* If there is a non-zero instruction fragment, close it. */
5456 if (frag_now_fix () != 0 && frag_now->tc_frag_data.is_insn)
5458 frag_wane (frag_now);
5460 xtensa_set_frag_assembly_state (frag_now);
5462 frag_now->tc_frag_data.is_insn = FALSE;
5464 xtensa_clear_insn_labels ();
5468 /* We had an error while parsing an instruction. The string might look
5469 like this: "insn arg1, arg2 }". If so, we need to see the closing
5470 brace and reset some fields. Otherwise, the vinsn never gets closed
5471 and the num_slots field will grow past the end of the array of slots,
5472 and bad things happen. */
5475 error_reset_cur_vinsn (void)
5477 if (cur_vinsn.inside_bundle)
5479 if (*input_line_pointer == '}'
5480 || *(input_line_pointer - 1) == '}'
5481 || *(input_line_pointer - 2) == '}')
5482 xg_clear_vinsn (&cur_vinsn);
5488 md_assemble (char *str)
5490 xtensa_isa isa = xtensa_default_isa;
5493 bfd_boolean has_underbar = FALSE;
5494 char *arg_strings[MAX_INSN_ARGS];
5496 TInsn orig_insn; /* Original instruction from the input. */
5498 tinsn_init (&orig_insn);
5500 /* Split off the opcode. */
5501 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
5502 opname = xstrndup (str, opnamelen);
5504 num_args = tokenize_arguments (arg_strings, str + opnamelen);
5507 as_bad (_("syntax error"));
5511 if (xg_translate_idioms (&opname, &num_args, arg_strings))
5514 /* Check for an underbar prefix. */
5517 has_underbar = TRUE;
5521 orig_insn.insn_type = ITYPE_INSN;
5523 orig_insn.is_specific_opcode = (has_underbar || !use_transform ());
5524 orig_insn.opcode = xtensa_opcode_lookup (isa, opname);
5526 /* Special case: Check for "CALLXn.TLS" pseudo op. If found, grab its
5527 extra argument and set the opcode to "CALLXn". */
5528 if (orig_insn.opcode == XTENSA_UNDEFINED
5529 && strncasecmp (opname, "callx", 5) == 0)
5531 unsigned long window_size;
5534 window_size = strtoul (opname + 5, &suffix, 10);
5535 if (suffix != opname + 5
5536 && (window_size == 0
5539 || window_size == 12)
5540 && strcasecmp (suffix, ".tls") == 0)
5542 switch (window_size)
5544 case 0: orig_insn.opcode = xtensa_callx0_opcode; break;
5545 case 4: orig_insn.opcode = xtensa_callx4_opcode; break;
5546 case 8: orig_insn.opcode = xtensa_callx8_opcode; break;
5547 case 12: orig_insn.opcode = xtensa_callx12_opcode; break;
5551 as_bad (_("wrong number of operands for '%s'"), opname);
5554 bfd_reloc_code_real_type reloc;
5555 char *old_input_line_pointer;
5556 expressionS *tok = &orig_insn.extra_arg;
5558 old_input_line_pointer = input_line_pointer;
5559 input_line_pointer = arg_strings[num_args - 1];
5562 if (tok->X_op == O_symbol
5563 && ((reloc = xtensa_elf_suffix (&input_line_pointer, tok))
5564 == BFD_RELOC_XTENSA_TLS_CALL))
5565 tok->X_op = map_suffix_reloc_to_operator (reloc);
5567 as_bad (_("bad relocation expression for '%s'"), opname);
5569 input_line_pointer = old_input_line_pointer;
5575 /* Special case: Check for "j.l" pseudo op. */
5576 if (orig_insn.opcode == XTENSA_UNDEFINED
5577 && strncasecmp (opname, "j.l", 3) == 0)
5580 as_bad (_("wrong number of operands for '%s'"), opname);
5583 char *old_input_line_pointer;
5584 expressionS *tok = &orig_insn.extra_arg;
5586 old_input_line_pointer = input_line_pointer;
5587 input_line_pointer = arg_strings[num_args - 1];
5589 expression_maybe_register (xtensa_jx_opcode, 0, tok);
5590 input_line_pointer = old_input_line_pointer;
5593 orig_insn.opcode = xtensa_j_opcode;
5597 if (orig_insn.opcode == XTENSA_UNDEFINED)
5599 xtensa_format fmt = xtensa_format_lookup (isa, opname);
5600 if (fmt == XTENSA_UNDEFINED)
5602 as_bad (_("unknown opcode or format name '%s'"), opname);
5603 error_reset_cur_vinsn ();
5606 if (!cur_vinsn.inside_bundle)
5608 as_bad (_("format names only valid inside bundles"));
5609 error_reset_cur_vinsn ();
5612 if (cur_vinsn.format != XTENSA_UNDEFINED)
5613 as_warn (_("multiple formats specified for one bundle; using '%s'"),
5615 cur_vinsn.format = fmt;
5616 free (has_underbar ? opname - 1 : opname);
5617 error_reset_cur_vinsn ();
5621 /* Parse the arguments. */
5622 if (parse_arguments (&orig_insn, num_args, arg_strings))
5624 as_bad (_("syntax error"));
5625 error_reset_cur_vinsn ();
5629 /* Free the opcode and argument strings, now that they've been parsed. */
5630 free (has_underbar ? opname - 1 : opname);
5632 while (num_args-- > 0)
5633 free (arg_strings[num_args]);
5635 /* Get expressions for invisible operands. */
5636 if (get_invisible_operands (&orig_insn))
5638 error_reset_cur_vinsn ();
5642 /* Check for the right number and type of arguments. */
5643 if (tinsn_check_arguments (&orig_insn))
5645 error_reset_cur_vinsn ();
5649 /* Record the line number for each TInsn, because a FLIX bundle may be
5650 spread across multiple input lines and individual instructions may be
5651 moved around in some cases. */
5652 orig_insn.loc_directive_seen = dwarf2_loc_directive_seen;
5653 dwarf2_where (&orig_insn.debug_line);
5654 dwarf2_consume_line_info ();
5656 xg_add_branch_and_loop_targets (&orig_insn);
5658 /* Check that immediate value for ENTRY is >= 16. */
5659 if (orig_insn.opcode == xtensa_entry_opcode && orig_insn.ntok >= 3)
5661 expressionS *exp = &orig_insn.tok[2];
5662 if (exp->X_op == O_constant && exp->X_add_number < 16)
5663 as_warn (_("entry instruction with stack decrement < 16"));
5667 assemble_tokens (opcode, tok, ntok);
5668 expand the tokens from the orig_insn into the
5669 stack of instructions that will not expand
5670 unless required at relaxation time. */
5672 if (!cur_vinsn.inside_bundle)
5673 emit_single_op (&orig_insn);
5674 else /* We are inside a bundle. */
5676 cur_vinsn.slots[cur_vinsn.num_slots] = orig_insn;
5677 cur_vinsn.num_slots++;
5678 if (*input_line_pointer == '}'
5679 || *(input_line_pointer - 1) == '}'
5680 || *(input_line_pointer - 2) == '}')
5681 finish_vinsn (&cur_vinsn);
5684 /* We've just emitted a new instruction so clear the list of labels. */
5685 xtensa_clear_insn_labels ();
5687 xtensa_check_frag_count ();
5691 /* HANDLE_ALIGN hook */
5693 /* For a .align directive, we mark the previous block with the alignment
5694 information. This will be placed in the object file in the
5695 property section corresponding to this section. */
5698 xtensa_handle_align (fragS *fragP)
5701 && ! fragP->tc_frag_data.is_literal
5702 && (fragP->fr_type == rs_align
5703 || fragP->fr_type == rs_align_code)
5704 && fragP->fr_offset > 0
5705 && now_seg != bss_section)
5707 fragP->tc_frag_data.is_align = TRUE;
5708 fragP->tc_frag_data.alignment = fragP->fr_offset;
5711 if (fragP->fr_type == rs_align_test)
5714 count = fragP->fr_next->fr_address - fragP->fr_address - fragP->fr_fix;
5716 as_bad_where (fragP->fr_file, fragP->fr_line,
5717 _("unaligned entry instruction"));
5720 if (linkrelax && fragP->fr_type == rs_org)
5721 fragP->fr_subtype = RELAX_ORG;
5725 /* TC_FRAG_INIT hook */
5728 xtensa_frag_init (fragS *frag)
5730 xtensa_set_frag_assembly_state (frag);
5735 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
5741 /* Round up a section size to the appropriate boundary. */
5744 md_section_align (segT segment ATTRIBUTE_UNUSED, valueT size)
5746 return size; /* Byte alignment is fine. */
5751 md_pcrel_from (fixS *fixP)
5754 static xtensa_insnbuf insnbuf = NULL;
5755 static xtensa_insnbuf slotbuf = NULL;
5758 xtensa_opcode opcode;
5761 xtensa_isa isa = xtensa_default_isa;
5762 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
5763 bfd_boolean alt_reloc;
5765 if (fixP->fx_r_type == BFD_RELOC_XTENSA_ASM_EXPAND)
5768 if (fixP->fx_r_type == BFD_RELOC_32_PCREL)
5773 insnbuf = xtensa_insnbuf_alloc (isa);
5774 slotbuf = xtensa_insnbuf_alloc (isa);
5777 insn_p = &fixP->fx_frag->fr_literal[fixP->fx_where];
5778 xtensa_insnbuf_from_chars (isa, insnbuf, (unsigned char *) insn_p, 0);
5779 fmt = xtensa_format_decode (isa, insnbuf);
5781 if (fmt == XTENSA_UNDEFINED)
5782 as_fatal (_("bad instruction format"));
5784 if (decode_reloc (fixP->fx_r_type, &slot, &alt_reloc) != 0)
5785 as_fatal (_("invalid relocation"));
5787 xtensa_format_get_slot (isa, fmt, slot, insnbuf, slotbuf);
5788 opcode = xtensa_opcode_decode (isa, fmt, slot, slotbuf);
5790 /* Check for "alternate" relocations (operand not specified). None
5791 of the current uses for these are really PC-relative. */
5792 if (alt_reloc || opcode == xtensa_const16_opcode)
5794 if (opcode != xtensa_l32r_opcode
5795 && opcode != xtensa_const16_opcode)
5796 as_fatal (_("invalid relocation for '%s' instruction"),
5797 xtensa_opcode_name (isa, opcode));
5801 opnum = get_relaxable_immed (opcode);
5803 if (xtensa_operand_is_PCrelative (isa, opcode, opnum) != 1
5804 || xtensa_operand_do_reloc (isa, opcode, opnum, &opnd_value, addr))
5806 as_bad_where (fixP->fx_file,
5808 _("invalid relocation for operand %d of '%s'"),
5809 opnum, xtensa_opcode_name (isa, opcode));
5812 return 0 - opnd_value;
5816 /* TC_FORCE_RELOCATION hook */
5819 xtensa_force_relocation (fixS *fix)
5821 switch (fix->fx_r_type)
5823 case BFD_RELOC_XTENSA_ASM_EXPAND:
5824 case BFD_RELOC_XTENSA_SLOT0_ALT:
5825 case BFD_RELOC_XTENSA_SLOT1_ALT:
5826 case BFD_RELOC_XTENSA_SLOT2_ALT:
5827 case BFD_RELOC_XTENSA_SLOT3_ALT:
5828 case BFD_RELOC_XTENSA_SLOT4_ALT:
5829 case BFD_RELOC_XTENSA_SLOT5_ALT:
5830 case BFD_RELOC_XTENSA_SLOT6_ALT:
5831 case BFD_RELOC_XTENSA_SLOT7_ALT:
5832 case BFD_RELOC_XTENSA_SLOT8_ALT:
5833 case BFD_RELOC_XTENSA_SLOT9_ALT:
5834 case BFD_RELOC_XTENSA_SLOT10_ALT:
5835 case BFD_RELOC_XTENSA_SLOT11_ALT:
5836 case BFD_RELOC_XTENSA_SLOT12_ALT:
5837 case BFD_RELOC_XTENSA_SLOT13_ALT:
5838 case BFD_RELOC_XTENSA_SLOT14_ALT:
5844 if (linkrelax && fix->fx_addsy
5845 && relaxable_section (S_GET_SEGMENT (fix->fx_addsy)))
5848 return generic_force_reloc (fix);
5852 /* TC_VALIDATE_FIX_SUB hook */
5855 xtensa_validate_fix_sub (fixS *fix)
5857 segT add_symbol_segment, sub_symbol_segment;
5859 /* The difference of two symbols should be resolved by the assembler when
5860 linkrelax is not set. If the linker may relax the section containing
5861 the symbols, then an Xtensa DIFF relocation must be generated so that
5862 the linker knows to adjust the difference value. */
5863 if (!linkrelax || fix->fx_addsy == NULL)
5866 /* Make sure both symbols are in the same segment, and that segment is
5867 "normal" and relaxable. If the segment is not "normal", then the
5868 fix is not valid. If the segment is not "relaxable", then the fix
5869 should have been handled earlier. */
5870 add_symbol_segment = S_GET_SEGMENT (fix->fx_addsy);
5871 if (! SEG_NORMAL (add_symbol_segment) ||
5872 ! relaxable_section (add_symbol_segment))
5874 sub_symbol_segment = S_GET_SEGMENT (fix->fx_subsy);
5875 return (sub_symbol_segment == add_symbol_segment);
5879 /* NO_PSEUDO_DOT hook */
5881 /* This function has nothing to do with pseudo dots, but this is the
5882 nearest macro to where the check needs to take place. FIXME: This
5886 xtensa_check_inside_bundle (void)
5888 if (cur_vinsn.inside_bundle && input_line_pointer[-1] == '.')
5889 as_bad (_("directives are not valid inside bundles"));
5891 /* This function must always return FALSE because it is called via a
5892 macro that has nothing to do with bundling. */
5897 /* md_elf_section_change_hook */
5900 xtensa_elf_section_change_hook (void)
5902 /* Set up the assembly state. */
5903 if (!frag_now->tc_frag_data.is_assembly_state_set)
5904 xtensa_set_frag_assembly_state (frag_now);
5908 /* tc_fix_adjustable hook */
5911 xtensa_fix_adjustable (fixS *fixP)
5913 /* We need the symbol name for the VTABLE entries. */
5914 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
5915 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
5922 /* tc_symbol_new_hook */
5924 symbolS *expr_symbols = NULL;
5927 xtensa_symbol_new_hook (symbolS *sym)
5929 if (is_leb128_expr && S_GET_SEGMENT (sym) == expr_section)
5931 symbol_get_tc (sym)->next_expr_symbol = expr_symbols;
5938 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
5940 char *const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
5943 /* Subtracted symbols are only allowed for a few relocation types, and
5944 unless linkrelax is enabled, they should not make it to this point. */
5945 if (fixP->fx_subsy && !(linkrelax && (fixP->fx_r_type == BFD_RELOC_32
5946 || fixP->fx_r_type == BFD_RELOC_16
5947 || fixP->fx_r_type == BFD_RELOC_8)))
5948 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
5950 switch (fixP->fx_r_type)
5952 case BFD_RELOC_32_PCREL:
5958 switch (fixP->fx_r_type)
5961 fixP->fx_r_type = BFD_RELOC_XTENSA_DIFF8;
5962 fixP->fx_signed = 0;
5965 fixP->fx_r_type = BFD_RELOC_XTENSA_DIFF16;
5966 fixP->fx_signed = 0;
5969 fixP->fx_r_type = BFD_RELOC_XTENSA_DIFF32;
5970 fixP->fx_signed = 0;
5976 val = (S_GET_VALUE (fixP->fx_addsy) + fixP->fx_offset
5977 - S_GET_VALUE (fixP->fx_subsy));
5979 /* The difference value gets written out, and the DIFF reloc
5980 identifies the address of the subtracted symbol (i.e., the one
5981 with the lowest address). */
5983 fixP->fx_offset -= val;
5984 fixP->fx_subsy = NULL;
5986 else if (! fixP->fx_addsy)
5993 case BFD_RELOC_XTENSA_PLT:
5994 md_number_to_chars (fixpos, val, fixP->fx_size);
5995 fixP->fx_no_overflow = 0; /* Use the standard overflow check. */
5998 case BFD_RELOC_XTENSA_TLSDESC_FN:
5999 case BFD_RELOC_XTENSA_TLSDESC_ARG:
6000 case BFD_RELOC_XTENSA_TLS_TPOFF:
6001 case BFD_RELOC_XTENSA_TLS_DTPOFF:
6002 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6003 md_number_to_chars (fixpos, 0, fixP->fx_size);
6004 fixP->fx_no_overflow = 0; /* Use the standard overflow check. */
6007 case BFD_RELOC_XTENSA_SLOT0_OP:
6008 case BFD_RELOC_XTENSA_SLOT1_OP:
6009 case BFD_RELOC_XTENSA_SLOT2_OP:
6010 case BFD_RELOC_XTENSA_SLOT3_OP:
6011 case BFD_RELOC_XTENSA_SLOT4_OP:
6012 case BFD_RELOC_XTENSA_SLOT5_OP:
6013 case BFD_RELOC_XTENSA_SLOT6_OP:
6014 case BFD_RELOC_XTENSA_SLOT7_OP:
6015 case BFD_RELOC_XTENSA_SLOT8_OP:
6016 case BFD_RELOC_XTENSA_SLOT9_OP:
6017 case BFD_RELOC_XTENSA_SLOT10_OP:
6018 case BFD_RELOC_XTENSA_SLOT11_OP:
6019 case BFD_RELOC_XTENSA_SLOT12_OP:
6020 case BFD_RELOC_XTENSA_SLOT13_OP:
6021 case BFD_RELOC_XTENSA_SLOT14_OP:
6024 /* Write the tentative value of a PC-relative relocation to a
6025 local symbol into the instruction. The value will be ignored
6026 by the linker, and it makes the object file disassembly
6027 readable when all branch targets are encoded in relocations. */
6029 gas_assert (fixP->fx_addsy);
6030 if (S_GET_SEGMENT (fixP->fx_addsy) == seg
6031 && !S_FORCE_RELOC (fixP->fx_addsy, 1))
6033 val = (S_GET_VALUE (fixP->fx_addsy) + fixP->fx_offset
6034 - md_pcrel_from (fixP));
6035 (void) xg_apply_fix_value (fixP, val);
6038 else if (! fixP->fx_addsy)
6041 if (xg_apply_fix_value (fixP, val))
6046 case BFD_RELOC_XTENSA_ASM_EXPAND:
6047 case BFD_RELOC_XTENSA_TLS_FUNC:
6048 case BFD_RELOC_XTENSA_TLS_ARG:
6049 case BFD_RELOC_XTENSA_TLS_CALL:
6050 case BFD_RELOC_XTENSA_SLOT0_ALT:
6051 case BFD_RELOC_XTENSA_SLOT1_ALT:
6052 case BFD_RELOC_XTENSA_SLOT2_ALT:
6053 case BFD_RELOC_XTENSA_SLOT3_ALT:
6054 case BFD_RELOC_XTENSA_SLOT4_ALT:
6055 case BFD_RELOC_XTENSA_SLOT5_ALT:
6056 case BFD_RELOC_XTENSA_SLOT6_ALT:
6057 case BFD_RELOC_XTENSA_SLOT7_ALT:
6058 case BFD_RELOC_XTENSA_SLOT8_ALT:
6059 case BFD_RELOC_XTENSA_SLOT9_ALT:
6060 case BFD_RELOC_XTENSA_SLOT10_ALT:
6061 case BFD_RELOC_XTENSA_SLOT11_ALT:
6062 case BFD_RELOC_XTENSA_SLOT12_ALT:
6063 case BFD_RELOC_XTENSA_SLOT13_ALT:
6064 case BFD_RELOC_XTENSA_SLOT14_ALT:
6065 /* These all need to be resolved at link-time. Do nothing now. */
6068 case BFD_RELOC_VTABLE_INHERIT:
6069 case BFD_RELOC_VTABLE_ENTRY:
6074 as_bad (_("unhandled local relocation fix %s"),
6075 bfd_get_reloc_code_name (fixP->fx_r_type));
6081 md_atof (int type, char *litP, int *sizeP)
6083 return ieee_md_atof (type, litP, sizeP, target_big_endian);
6088 md_estimate_size_before_relax (fragS *fragP, segT seg ATTRIBUTE_UNUSED)
6090 return total_frag_text_expansion (fragP);
6094 /* Translate internal representation of relocation info to BFD target
6098 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
6102 reloc = XNEW (arelent);
6103 reloc->sym_ptr_ptr = XNEW (asymbol *);
6104 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6105 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6107 /* Make sure none of our internal relocations make it this far.
6108 They'd better have been fully resolved by this point. */
6109 gas_assert ((int) fixp->fx_r_type > 0);
6111 reloc->addend = fixp->fx_offset;
6113 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6114 if (reloc->howto == NULL)
6116 as_bad_where (fixp->fx_file, fixp->fx_line,
6117 _("cannot represent `%s' relocation in object file"),
6118 bfd_get_reloc_code_name (fixp->fx_r_type));
6119 free (reloc->sym_ptr_ptr);
6124 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
6125 as_fatal (_("internal error; cannot generate `%s' relocation"),
6126 bfd_get_reloc_code_name (fixp->fx_r_type));
6132 /* Checks for resource conflicts between instructions. */
6134 /* The func unit stuff could be implemented as bit-vectors rather
6135 than the iterative approach here. If it ends up being too
6136 slow, we will switch it. */
6139 new_resource_table (void *data,
6142 unit_num_copies_func uncf,
6143 opcode_num_units_func onuf,
6144 opcode_funcUnit_use_unit_func ouuf,
6145 opcode_funcUnit_use_stage_func ousf)
6148 resource_table *rt = XNEW (resource_table);
6150 rt->cycles = cycles;
6151 rt->allocated_cycles = cycles;
6153 rt->unit_num_copies = uncf;
6154 rt->opcode_num_units = onuf;
6155 rt->opcode_unit_use = ouuf;
6156 rt->opcode_unit_stage = ousf;
6158 rt->units = XCNEWVEC (unsigned char *, cycles);
6159 for (i = 0; i < cycles; i++)
6160 rt->units[i] = XCNEWVEC (unsigned char, nu);
6167 clear_resource_table (resource_table *rt)
6170 for (i = 0; i < rt->allocated_cycles; i++)
6171 for (j = 0; j < rt->num_units; j++)
6172 rt->units[i][j] = 0;
6176 /* We never shrink it, just fake it into thinking so. */
6179 resize_resource_table (resource_table *rt, int cycles)
6183 rt->cycles = cycles;
6184 if (cycles <= rt->allocated_cycles)
6187 old_cycles = rt->allocated_cycles;
6188 rt->allocated_cycles = cycles;
6190 rt->units = XRESIZEVEC (unsigned char *, rt->units, rt->allocated_cycles);
6191 for (i = 0; i < old_cycles; i++)
6192 rt->units[i] = XRESIZEVEC (unsigned char, rt->units[i], rt->num_units);
6193 for (i = old_cycles; i < cycles; i++)
6194 rt->units[i] = XCNEWVEC (unsigned char, rt->num_units);
6199 resources_available (resource_table *rt, xtensa_opcode opcode, int cycle)
6202 int uses = (rt->opcode_num_units) (rt->data, opcode);
6204 for (i = 0; i < uses; i++)
6206 xtensa_funcUnit unit = (rt->opcode_unit_use) (rt->data, opcode, i);
6207 int stage = (rt->opcode_unit_stage) (rt->data, opcode, i);
6208 int copies_in_use = rt->units[stage + cycle][unit];
6209 int copies = (rt->unit_num_copies) (rt->data, unit);
6210 if (copies_in_use >= copies)
6218 reserve_resources (resource_table *rt, xtensa_opcode opcode, int cycle)
6221 int uses = (rt->opcode_num_units) (rt->data, opcode);
6223 for (i = 0; i < uses; i++)
6225 xtensa_funcUnit unit = (rt->opcode_unit_use) (rt->data, opcode, i);
6226 int stage = (rt->opcode_unit_stage) (rt->data, opcode, i);
6227 /* Note that this allows resources to be oversubscribed. That's
6228 essential to the way the optional scheduler works.
6229 resources_available reports when a resource is over-subscribed,
6230 so it's easy to tell. */
6231 rt->units[stage + cycle][unit]++;
6237 release_resources (resource_table *rt, xtensa_opcode opcode, int cycle)
6240 int uses = (rt->opcode_num_units) (rt->data, opcode);
6242 for (i = 0; i < uses; i++)
6244 xtensa_funcUnit unit = (rt->opcode_unit_use) (rt->data, opcode, i);
6245 int stage = (rt->opcode_unit_stage) (rt->data, opcode, i);
6246 gas_assert (rt->units[stage + cycle][unit] > 0);
6247 rt->units[stage + cycle][unit]--;
6252 /* Wrapper functions make parameterized resource reservation
6256 opcode_funcUnit_use_unit (void *data, xtensa_opcode opcode, int idx)
6258 xtensa_funcUnit_use *use = xtensa_opcode_funcUnit_use (data, opcode, idx);
6264 opcode_funcUnit_use_stage (void *data, xtensa_opcode opcode, int idx)
6266 xtensa_funcUnit_use *use = xtensa_opcode_funcUnit_use (data, opcode, idx);
6271 /* Note that this function does not check issue constraints, but
6272 solely whether the hardware is available to execute the given
6273 instructions together. It also doesn't check if the tinsns
6274 write the same state, or access the same tieports. That is
6275 checked by check_t1_t2_reads_and_writes. */
6278 resources_conflict (vliw_insn *vinsn)
6281 static resource_table *rt = NULL;
6283 /* This is the most common case by far. Optimize it. */
6284 if (vinsn->num_slots == 1)
6289 xtensa_isa isa = xtensa_default_isa;
6290 rt = new_resource_table
6291 (isa, xtensa_num_pipe_stages,
6292 xtensa_isa_num_funcUnits (isa),
6293 (unit_num_copies_func) xtensa_funcUnit_num_copies,
6294 (opcode_num_units_func) xtensa_opcode_num_funcUnit_uses,
6295 opcode_funcUnit_use_unit,
6296 opcode_funcUnit_use_stage);
6299 clear_resource_table (rt);
6301 for (i = 0; i < vinsn->num_slots; i++)
6303 if (!resources_available (rt, vinsn->slots[i].opcode, 0))
6305 reserve_resources (rt, vinsn->slots[i].opcode, 0);
6312 /* finish_vinsn, emit_single_op and helper functions. */
6314 static bfd_boolean find_vinsn_conflicts (vliw_insn *);
6315 static xtensa_format xg_find_narrowest_format (vliw_insn *);
6316 static void xg_assemble_vliw_tokens (vliw_insn *);
6319 /* We have reached the end of a bundle; emit into the frag. */
6322 finish_vinsn (vliw_insn *vinsn)
6327 if (find_vinsn_conflicts (vinsn))
6329 xg_clear_vinsn (vinsn);
6333 /* First, find a format that works. */
6334 if (vinsn->format == XTENSA_UNDEFINED)
6335 vinsn->format = xg_find_narrowest_format (vinsn);
6337 if (xtensa_format_num_slots (xtensa_default_isa, vinsn->format) > 1
6338 && produce_flix == FLIX_NONE)
6340 as_bad (_("The option \"--no-allow-flix\" prohibits multi-slot flix."));
6341 xg_clear_vinsn (vinsn);
6345 if (vinsn->format == XTENSA_UNDEFINED)
6347 as_bad (_("couldn't find a valid instruction format"));
6348 fprintf (stderr, _(" ops were: "));
6349 for (i = 0; i < vinsn->num_slots; i++)
6350 fprintf (stderr, _(" %s;"),
6351 xtensa_opcode_name (xtensa_default_isa,
6352 vinsn->slots[i].opcode));
6353 fprintf (stderr, _("\n"));
6354 xg_clear_vinsn (vinsn);
6358 if (vinsn->num_slots
6359 != xtensa_format_num_slots (xtensa_default_isa, vinsn->format))
6361 as_bad (_("format '%s' allows %d slots, but there are %d opcodes"),
6362 xtensa_format_name (xtensa_default_isa, vinsn->format),
6363 xtensa_format_num_slots (xtensa_default_isa, vinsn->format),
6365 xg_clear_vinsn (vinsn);
6369 if (resources_conflict (vinsn))
6371 as_bad (_("illegal resource usage in bundle"));
6372 fprintf (stderr, " ops were: ");
6373 for (i = 0; i < vinsn->num_slots; i++)
6374 fprintf (stderr, " %s;",
6375 xtensa_opcode_name (xtensa_default_isa,
6376 vinsn->slots[i].opcode));
6377 fprintf (stderr, "\n");
6378 xg_clear_vinsn (vinsn);
6382 for (i = 0; i < vinsn->num_slots; i++)
6384 if (vinsn->slots[i].opcode != XTENSA_UNDEFINED)
6386 symbolS *lit_sym = NULL;
6388 bfd_boolean e = FALSE;
6389 bfd_boolean saved_density = density_supported;
6391 /* We don't want to narrow ops inside multi-slot bundles. */
6392 if (vinsn->num_slots > 1)
6393 density_supported = FALSE;
6395 istack_init (&slotstack);
6396 if (vinsn->slots[i].opcode == xtensa_nop_opcode)
6398 vinsn->slots[i].opcode =
6399 xtensa_format_slot_nop_opcode (xtensa_default_isa,
6401 vinsn->slots[i].ntok = 0;
6404 if (xg_expand_assembly_insn (&slotstack, &vinsn->slots[i]))
6410 density_supported = saved_density;
6414 xg_clear_vinsn (vinsn);
6418 for (j = 0; j < slotstack.ninsn; j++)
6420 TInsn *insn = &slotstack.insn[j];
6421 if (insn->insn_type == ITYPE_LITERAL)
6423 gas_assert (lit_sym == NULL);
6424 lit_sym = xg_assemble_literal (insn);
6428 gas_assert (insn->insn_type == ITYPE_INSN);
6430 xg_resolve_literals (insn, lit_sym);
6431 if (j != slotstack.ninsn - 1)
6432 emit_single_op (insn);
6436 if (vinsn->num_slots > 1)
6438 if (opcode_fits_format_slot
6439 (slotstack.insn[slotstack.ninsn - 1].opcode,
6442 vinsn->slots[i] = slotstack.insn[slotstack.ninsn - 1];
6446 emit_single_op (&slotstack.insn[slotstack.ninsn - 1]);
6447 if (vinsn->format == XTENSA_UNDEFINED)
6448 vinsn->slots[i].opcode = xtensa_nop_opcode;
6450 vinsn->slots[i].opcode
6451 = xtensa_format_slot_nop_opcode (xtensa_default_isa,
6454 vinsn->slots[i].ntok = 0;
6459 vinsn->slots[0] = slotstack.insn[slotstack.ninsn - 1];
6460 vinsn->format = XTENSA_UNDEFINED;
6465 /* Now check resource conflicts on the modified bundle. */
6466 if (resources_conflict (vinsn))
6468 as_bad (_("illegal resource usage in bundle"));
6469 fprintf (stderr, " ops were: ");
6470 for (i = 0; i < vinsn->num_slots; i++)
6471 fprintf (stderr, " %s;",
6472 xtensa_opcode_name (xtensa_default_isa,
6473 vinsn->slots[i].opcode));
6474 fprintf (stderr, "\n");
6475 xg_clear_vinsn (vinsn);
6479 /* First, find a format that works. */
6480 if (vinsn->format == XTENSA_UNDEFINED)
6481 vinsn->format = xg_find_narrowest_format (vinsn);
6483 xg_assemble_vliw_tokens (vinsn);
6485 xg_clear_vinsn (vinsn);
6487 xtensa_check_frag_count ();
6491 /* Given an vliw instruction, what conflicts are there in register
6492 usage and in writes to states and queues?
6494 This function does two things:
6495 1. Reports an error when a vinsn contains illegal combinations
6496 of writes to registers states or queues.
6497 2. Marks individual tinsns as not relaxable if the combination
6498 contains antidependencies.
6500 Job 2 handles things like swap semantics in instructions that need
6501 to be relaxed. For example,
6505 normally would be relaxed to
6510 _but_, if the above instruction is bundled with an a0 reader, e.g.,
6512 { addi a0, a1, 10000 ; add a2, a0, a4 ; }
6514 then we can't relax it into
6517 { add a0, a1, a0 ; add a2, a0, a4 ; }
6519 because the value of a0 is trashed before the second add can read it. */
6521 static char check_t1_t2_reads_and_writes (TInsn *, TInsn *);
6524 find_vinsn_conflicts (vliw_insn *vinsn)
6528 xtensa_isa isa = xtensa_default_isa;
6530 gas_assert (!past_xtensa_end);
6532 for (i = 0 ; i < vinsn->num_slots; i++)
6534 TInsn *op1 = &vinsn->slots[i];
6535 if (op1->is_specific_opcode)
6536 op1->keep_wide = TRUE;
6538 op1->keep_wide = FALSE;
6541 for (i = 0 ; i < vinsn->num_slots; i++)
6543 TInsn *op1 = &vinsn->slots[i];
6545 if (xtensa_opcode_is_branch (isa, op1->opcode) == 1)
6548 for (j = 0; j < vinsn->num_slots; j++)
6552 TInsn *op2 = &vinsn->slots[j];
6553 char conflict_type = check_t1_t2_reads_and_writes (op1, op2);
6554 switch (conflict_type)
6557 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same register"),
6558 xtensa_opcode_name (isa, op1->opcode), i,
6559 xtensa_opcode_name (isa, op2->opcode), j);
6562 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same state"),
6563 xtensa_opcode_name (isa, op1->opcode), i,
6564 xtensa_opcode_name (isa, op2->opcode), j);
6567 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
6568 xtensa_opcode_name (isa, op1->opcode), i,
6569 xtensa_opcode_name (isa, op2->opcode), j);
6572 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
6573 xtensa_opcode_name (isa, op1->opcode), i,
6574 xtensa_opcode_name (isa, op2->opcode), j);
6577 /* Everything is OK. */
6580 op2->is_specific_opcode = (op2->is_specific_opcode
6581 || conflict_type == 'a');
6588 as_bad (_("multiple branches or jumps in the same bundle"));
6596 /* Check how the state used by t1 and t2 relate.
6599 case A: t1 reads a register t2 writes (an antidependency within a bundle)
6600 case B: no relationship between what is read and written (both could
6601 read the same reg though)
6602 case C: t1 writes a register t2 writes (a register conflict within a
6604 case D: t1 writes a state that t2 also writes
6605 case E: t1 writes a tie queue that t2 also writes
6606 case F: two volatile queue accesses
6610 check_t1_t2_reads_and_writes (TInsn *t1, TInsn *t2)
6612 xtensa_isa isa = xtensa_default_isa;
6613 xtensa_regfile t1_regfile, t2_regfile;
6615 int t1_base_reg, t1_last_reg;
6616 int t2_base_reg, t2_last_reg;
6617 char t1_inout, t2_inout;
6619 char conflict = 'b';
6624 bfd_boolean t1_volatile = FALSE;
6625 bfd_boolean t2_volatile = FALSE;
6627 /* Check registers. */
6628 for (j = 0; j < t2->ntok; j++)
6630 if (xtensa_operand_is_register (isa, t2->opcode, j) != 1)
6633 t2_regfile = xtensa_operand_regfile (isa, t2->opcode, j);
6634 t2_base_reg = t2->tok[j].X_add_number;
6635 t2_last_reg = t2_base_reg + xtensa_operand_num_regs (isa, t2->opcode, j);
6637 for (i = 0; i < t1->ntok; i++)
6639 if (xtensa_operand_is_register (isa, t1->opcode, i) != 1)
6642 t1_regfile = xtensa_operand_regfile (isa, t1->opcode, i);
6644 if (t1_regfile != t2_regfile)
6647 t1_inout = xtensa_operand_inout (isa, t1->opcode, i);
6648 t2_inout = xtensa_operand_inout (isa, t2->opcode, j);
6650 if (xtensa_operand_is_known_reg (isa, t1->opcode, i) == 0
6651 || xtensa_operand_is_known_reg (isa, t2->opcode, j) == 0)
6653 if (t1_inout == 'm' || t1_inout == 'o'
6654 || t2_inout == 'm' || t2_inout == 'o')
6661 t1_base_reg = t1->tok[i].X_add_number;
6662 t1_last_reg = (t1_base_reg
6663 + xtensa_operand_num_regs (isa, t1->opcode, i));
6665 for (t1_reg = t1_base_reg; t1_reg < t1_last_reg; t1_reg++)
6667 for (t2_reg = t2_base_reg; t2_reg < t2_last_reg; t2_reg++)
6669 if (t1_reg != t2_reg)
6672 if (t2_inout == 'i' && (t1_inout == 'm' || t1_inout == 'o'))
6678 if (t1_inout == 'i' && (t2_inout == 'm' || t2_inout == 'o'))
6684 if (t1_inout != 'i' && t2_inout != 'i')
6692 t1_states = xtensa_opcode_num_stateOperands (isa, t1->opcode);
6693 t2_states = xtensa_opcode_num_stateOperands (isa, t2->opcode);
6694 for (j = 0; j < t2_states; j++)
6696 xtensa_state t2_so = xtensa_stateOperand_state (isa, t2->opcode, j);
6697 t2_inout = xtensa_stateOperand_inout (isa, t2->opcode, j);
6698 for (i = 0; i < t1_states; i++)
6700 xtensa_state t1_so = xtensa_stateOperand_state (isa, t1->opcode, i);
6701 t1_inout = xtensa_stateOperand_inout (isa, t1->opcode, i);
6702 if (t1_so != t2_so || xtensa_state_is_shared_or (isa, t1_so) == 1)
6705 if (t2_inout == 'i' && (t1_inout == 'm' || t1_inout == 'o'))
6711 if (t1_inout == 'i' && (t2_inout == 'm' || t2_inout == 'o'))
6717 if (t1_inout != 'i' && t2_inout != 'i')
6722 /* Check tieports. */
6723 t1_interfaces = xtensa_opcode_num_interfaceOperands (isa, t1->opcode);
6724 t2_interfaces = xtensa_opcode_num_interfaceOperands (isa, t2->opcode);
6725 for (j = 0; j < t2_interfaces; j++)
6727 xtensa_interface t2_int
6728 = xtensa_interfaceOperand_interface (isa, t2->opcode, j);
6729 int t2_class = xtensa_interface_class_id (isa, t2_int);
6731 t2_inout = xtensa_interface_inout (isa, t2_int);
6732 if (xtensa_interface_has_side_effect (isa, t2_int) == 1)
6735 for (i = 0; i < t1_interfaces; i++)
6737 xtensa_interface t1_int
6738 = xtensa_interfaceOperand_interface (isa, t1->opcode, j);
6739 int t1_class = xtensa_interface_class_id (isa, t1_int);
6741 t1_inout = xtensa_interface_inout (isa, t1_int);
6742 if (xtensa_interface_has_side_effect (isa, t1_int) == 1)
6745 if (t1_volatile && t2_volatile && (t1_class == t2_class))
6748 if (t1_int != t2_int)
6751 if (t2_inout == 'i' && t1_inout == 'o')
6757 if (t1_inout == 'i' && t2_inout == 'o')
6763 if (t1_inout != 'i' && t2_inout != 'i')
6772 static xtensa_format
6773 xg_find_narrowest_format (vliw_insn *vinsn)
6775 /* Right now we assume that the ops within the vinsn are properly
6776 ordered for the slots that the programmer wanted them in. In
6777 other words, we don't rearrange the ops in hopes of finding a
6778 better format. The scheduler handles that. */
6780 xtensa_isa isa = xtensa_default_isa;
6781 xtensa_format format;
6782 xtensa_opcode nop_opcode = xtensa_nop_opcode;
6784 if (vinsn->num_slots == 1)
6785 return xg_get_single_format (vinsn->slots[0].opcode);
6787 for (format = 0; format < xtensa_isa_num_formats (isa); format++)
6790 xg_copy_vinsn (&v_copy, vinsn);
6791 if (xtensa_format_num_slots (isa, format) == v_copy.num_slots)
6795 for (slot = 0; slot < v_copy.num_slots; slot++)
6797 if (v_copy.slots[slot].opcode == nop_opcode)
6799 v_copy.slots[slot].opcode =
6800 xtensa_format_slot_nop_opcode (isa, format, slot);
6801 v_copy.slots[slot].ntok = 0;
6804 if (opcode_fits_format_slot (v_copy.slots[slot].opcode,
6807 else if (v_copy.num_slots > 1)
6810 /* Try the widened version. */
6811 if (!v_copy.slots[slot].keep_wide
6812 && !v_copy.slots[slot].is_specific_opcode
6813 && xg_is_single_relaxable_insn (&v_copy.slots[slot],
6815 && opcode_fits_format_slot (widened.opcode,
6818 v_copy.slots[slot] = widened;
6823 if (fit == v_copy.num_slots)
6825 xg_copy_vinsn (vinsn, &v_copy);
6826 xtensa_format_encode (isa, format, vinsn->insnbuf);
6827 vinsn->format = format;
6833 if (format == xtensa_isa_num_formats (isa))
6834 return XTENSA_UNDEFINED;
6840 /* Return the additional space needed in a frag
6841 for possible relaxations of any ops in a VLIW insn.
6842 Also fill out the relaxations that might be required of
6843 each tinsn in the vinsn. */
6846 relaxation_requirements (vliw_insn *vinsn, bfd_boolean *pfinish_frag)
6848 bfd_boolean finish_frag = FALSE;
6849 int extra_space = 0;
6852 for (slot = 0; slot < vinsn->num_slots; slot++)
6854 TInsn *tinsn = &vinsn->slots[slot];
6855 if (!tinsn_has_symbolic_operands (tinsn))
6857 /* A narrow instruction could be widened later to help
6858 alignment issues. */
6859 if (xg_is_single_relaxable_insn (tinsn, 0, TRUE)
6860 && !tinsn->is_specific_opcode
6861 && vinsn->num_slots == 1)
6863 /* Difference in bytes between narrow and wide insns... */
6865 tinsn->subtype = RELAX_NARROW;
6870 if (workaround_b_j_loop_end
6871 && tinsn->opcode == xtensa_jx_opcode
6872 && use_transform ())
6874 /* Add 2 of these. */
6875 extra_space += 3; /* for the nop size */
6876 tinsn->subtype = RELAX_ADD_NOP_IF_PRE_LOOP_END;
6879 /* Need to assemble it with space for the relocation. */
6880 if (xg_is_relaxable_insn (tinsn, 0)
6881 && !tinsn->is_specific_opcode)
6883 int max_size = xg_get_max_insn_widen_size (tinsn->opcode);
6884 int max_literal_size =
6885 xg_get_max_insn_widen_literal_size (tinsn->opcode);
6887 tinsn->literal_space = max_literal_size;
6889 tinsn->subtype = RELAX_IMMED;
6890 extra_space += max_size;
6894 /* A fix record will be added for this instruction prior
6895 to relaxation, so make it end the frag. */
6900 *pfinish_frag = finish_frag;
6906 bundle_tinsn (TInsn *tinsn, vliw_insn *vinsn)
6908 xtensa_isa isa = xtensa_default_isa;
6909 int slot, chosen_slot;
6911 vinsn->format = xg_get_single_format (tinsn->opcode);
6912 gas_assert (vinsn->format != XTENSA_UNDEFINED);
6913 vinsn->num_slots = xtensa_format_num_slots (isa, vinsn->format);
6915 chosen_slot = xg_get_single_slot (tinsn->opcode);
6916 for (slot = 0; slot < vinsn->num_slots; slot++)
6918 if (slot == chosen_slot)
6919 vinsn->slots[slot] = *tinsn;
6922 vinsn->slots[slot].opcode =
6923 xtensa_format_slot_nop_opcode (isa, vinsn->format, slot);
6924 vinsn->slots[slot].ntok = 0;
6925 vinsn->slots[slot].insn_type = ITYPE_INSN;
6932 emit_single_op (TInsn *orig_insn)
6935 IStack istack; /* put instructions into here */
6936 symbolS *lit_sym = NULL;
6937 symbolS *label_sym = NULL;
6939 istack_init (&istack);
6941 /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
6942 Because the scheduling and bundling characteristics of movi and
6943 l32r or const16 are so different, we can do much better if we relax
6944 it prior to scheduling and bundling, rather than after. */
6945 if ((orig_insn->opcode == xtensa_movi_opcode
6946 || orig_insn->opcode == xtensa_movi_n_opcode)
6947 && !cur_vinsn.inside_bundle
6948 && (orig_insn->tok[1].X_op == O_symbol
6949 || orig_insn->tok[1].X_op == O_pltrel
6950 || orig_insn->tok[1].X_op == O_tlsfunc
6951 || orig_insn->tok[1].X_op == O_tlsarg
6952 || orig_insn->tok[1].X_op == O_tpoff
6953 || orig_insn->tok[1].X_op == O_dtpoff)
6954 && !orig_insn->is_specific_opcode && use_transform ())
6955 xg_assembly_relax (&istack, orig_insn, now_seg, frag_now, 0, 1, 0);
6957 if (xg_expand_assembly_insn (&istack, orig_insn))
6960 for (i = 0; i < istack.ninsn; i++)
6962 TInsn *insn = &istack.insn[i];
6963 switch (insn->insn_type)
6966 gas_assert (lit_sym == NULL);
6967 lit_sym = xg_assemble_literal (insn);
6971 static int relaxed_sym_idx = 0;
6972 char *label = XNEWVEC (char, strlen (FAKE_LABEL_NAME) + 12);
6973 sprintf (label, "%s_rl_%x", FAKE_LABEL_NAME, relaxed_sym_idx++);
6975 gas_assert (label_sym == NULL);
6976 label_sym = symbol_find_or_make (label);
6977 gas_assert (label_sym);
6985 xg_resolve_literals (insn, lit_sym);
6987 xg_resolve_labels (insn, label_sym);
6989 bundle_tinsn (insn, &v);
7004 total_frag_text_expansion (fragS *fragP)
7007 int total_expansion = 0;
7009 for (slot = 0; slot < config_max_slots; slot++)
7010 total_expansion += fragP->tc_frag_data.text_expansion[slot];
7012 return total_expansion;
7016 /* Emit a vliw instruction to the current fragment. */
7019 xg_assemble_vliw_tokens (vliw_insn *vinsn)
7021 bfd_boolean finish_frag;
7022 bfd_boolean is_jump = FALSE;
7023 bfd_boolean is_branch = FALSE;
7024 xtensa_isa isa = xtensa_default_isa;
7029 struct dwarf2_line_info debug_line;
7030 bfd_boolean loc_directive_seen = FALSE;
7033 memset (&debug_line, 0, sizeof (struct dwarf2_line_info));
7035 if (generating_literals)
7037 static int reported = 0;
7039 as_bad_where (frag_now->fr_file, frag_now->fr_line,
7040 _("cannot assemble into a literal fragment"));
7047 if (frag_now_fix () != 0
7048 && (! frag_now->tc_frag_data.is_insn
7049 || (vinsn_has_specific_opcodes (vinsn) && use_transform ())
7050 || (!use_transform ()) != frag_now->tc_frag_data.is_no_transform
7051 || (directive_state[directive_longcalls]
7052 != frag_now->tc_frag_data.use_longcalls)
7053 || (directive_state[directive_absolute_literals]
7054 != frag_now->tc_frag_data.use_absolute_literals)))
7056 frag_wane (frag_now);
7058 xtensa_set_frag_assembly_state (frag_now);
7061 if (workaround_a0_b_retw
7062 && vinsn->num_slots == 1
7063 && (get_last_insn_flags (now_seg, now_subseg) & FLAG_IS_A0_WRITER) != 0
7064 && xtensa_opcode_is_branch (isa, vinsn->slots[0].opcode) == 1
7065 && use_transform ())
7067 has_a0_b_retw = TRUE;
7069 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
7070 After the first assembly pass we will check all of them and
7071 add a nop if needed. */
7072 frag_now->tc_frag_data.is_insn = TRUE;
7073 frag_var (rs_machine_dependent, 4, 4,
7074 RELAX_ADD_NOP_IF_A0_B_RETW,
7075 frag_now->fr_symbol,
7076 frag_now->fr_offset,
7078 xtensa_set_frag_assembly_state (frag_now);
7079 frag_now->tc_frag_data.is_insn = TRUE;
7080 frag_var (rs_machine_dependent, 4, 4,
7081 RELAX_ADD_NOP_IF_A0_B_RETW,
7082 frag_now->fr_symbol,
7083 frag_now->fr_offset,
7085 xtensa_set_frag_assembly_state (frag_now);
7088 for (slot = 0; slot < vinsn->num_slots; slot++)
7090 tinsn = &vinsn->slots[slot];
7092 /* See if the instruction implies an aligned section. */
7093 if (xtensa_opcode_is_loop (isa, tinsn->opcode) == 1)
7094 record_alignment (now_seg, 2);
7096 /* Determine the best line number for debug info. */
7097 if ((tinsn->loc_directive_seen || !loc_directive_seen)
7098 && (tinsn->debug_line.filenum != debug_line.filenum
7099 || tinsn->debug_line.line < debug_line.line
7100 || tinsn->debug_line.column < debug_line.column))
7101 debug_line = tinsn->debug_line;
7102 if (tinsn->loc_directive_seen)
7103 loc_directive_seen = TRUE;
7106 /* Special cases for instructions that force an alignment... */
7107 /* None of these opcodes are bundle-able. */
7108 if (xtensa_opcode_is_loop (isa, vinsn->slots[0].opcode) == 1)
7112 /* Remember the symbol that marks the end of the loop in the frag
7113 that marks the start of the loop. This way we can easily find
7114 the end of the loop at the beginning, without adding special code
7115 to mark the loop instructions themselves. */
7116 symbolS *target_sym = NULL;
7117 if (vinsn->slots[0].tok[1].X_op == O_symbol)
7118 target_sym = vinsn->slots[0].tok[1].X_add_symbol;
7120 xtensa_set_frag_assembly_state (frag_now);
7121 frag_now->tc_frag_data.is_insn = TRUE;
7123 max_fill = get_text_align_max_fill_size
7124 (get_text_align_power (xtensa_fetch_width),
7125 TRUE, frag_now->tc_frag_data.is_no_density);
7127 if (use_transform ())
7128 frag_var (rs_machine_dependent, max_fill, max_fill,
7129 RELAX_ALIGN_NEXT_OPCODE, target_sym, 0, NULL);
7131 frag_var (rs_machine_dependent, 0, 0,
7132 RELAX_CHECK_ALIGN_NEXT_OPCODE, target_sym, 0, NULL);
7133 xtensa_set_frag_assembly_state (frag_now);
7136 if (vinsn->slots[0].opcode == xtensa_entry_opcode
7137 && !vinsn->slots[0].is_specific_opcode)
7139 xtensa_mark_literal_pool_location ();
7140 xtensa_move_labels (frag_now, 0);
7141 frag_var (rs_align_test, 1, 1, 0, NULL, 2, NULL);
7144 if (vinsn->num_slots == 1)
7146 if (workaround_a0_b_retw && use_transform ())
7147 set_last_insn_flags (now_seg, now_subseg, FLAG_IS_A0_WRITER,
7148 is_register_writer (&vinsn->slots[0], "a", 0));
7150 set_last_insn_flags (now_seg, now_subseg, FLAG_IS_BAD_LOOPEND,
7151 is_bad_loopend_opcode (&vinsn->slots[0]));
7154 set_last_insn_flags (now_seg, now_subseg, FLAG_IS_BAD_LOOPEND, FALSE);
7156 insn_size = xtensa_format_length (isa, vinsn->format);
7158 extra_space = relaxation_requirements (vinsn, &finish_frag);
7160 /* vinsn_to_insnbuf will produce the error. */
7161 if (vinsn->format != XTENSA_UNDEFINED)
7163 f = frag_more (insn_size + extra_space);
7164 xtensa_set_frag_assembly_state (frag_now);
7165 frag_now->tc_frag_data.is_insn = TRUE;
7168 vinsn_to_insnbuf (vinsn, f, frag_now, FALSE);
7169 if (vinsn->format == XTENSA_UNDEFINED)
7172 xtensa_insnbuf_to_chars (isa, vinsn->insnbuf, (unsigned char *) f, 0);
7174 if (debug_type == DEBUG_DWARF2 || loc_directive_seen)
7175 dwarf2_gen_line_info (frag_now_fix () - (insn_size + extra_space),
7178 for (slot = 0; slot < vinsn->num_slots; slot++)
7180 tinsn = &vinsn->slots[slot];
7181 frag_now->tc_frag_data.slot_subtypes[slot] = tinsn->subtype;
7182 frag_now->tc_frag_data.slot_symbols[slot] = tinsn->symbol;
7183 frag_now->tc_frag_data.slot_offsets[slot] = tinsn->offset;
7184 frag_now->tc_frag_data.literal_frags[slot] = tinsn->literal_frag;
7185 if (tinsn->opcode == xtensa_l32r_opcode)
7187 frag_now->tc_frag_data.literal_frags[slot] =
7188 tinsn->tok[1].X_add_symbol->sy_frag;
7190 if (tinsn->literal_space != 0)
7191 xg_assemble_literal_space (tinsn->literal_space, slot);
7192 frag_now->tc_frag_data.free_reg[slot] = tinsn->extra_arg;
7194 if (tinsn->subtype == RELAX_NARROW)
7195 gas_assert (vinsn->num_slots == 1);
7196 if (xtensa_opcode_is_jump (isa, tinsn->opcode) == 1)
7198 if (xtensa_opcode_is_branch (isa, tinsn->opcode) == 1)
7201 if (tinsn->subtype || tinsn->symbol || tinsn->offset
7202 || tinsn->literal_frag || is_jump || is_branch)
7206 if (vinsn_has_specific_opcodes (vinsn) && use_transform ())
7207 frag_now->tc_frag_data.is_specific_opcode = TRUE;
7211 frag_variant (rs_machine_dependent,
7212 extra_space, extra_space, RELAX_SLOTS,
7213 frag_now->fr_symbol, frag_now->fr_offset, f);
7214 xtensa_set_frag_assembly_state (frag_now);
7217 /* Special cases for loops:
7218 close_loop_end should be inserted AFTER short_loop.
7219 Make sure that CLOSE loops are processed BEFORE short_loops
7220 when converting them. */
7222 /* "short_loop": Add a NOP if the loop is < 4 bytes. */
7223 if (xtensa_opcode_is_loop (isa, vinsn->slots[0].opcode) == 1
7224 && !vinsn->slots[0].is_specific_opcode)
7226 if (workaround_short_loop && use_transform ())
7228 maybe_has_short_loop = TRUE;
7229 frag_now->tc_frag_data.is_insn = TRUE;
7230 frag_var (rs_machine_dependent, 4, 4,
7231 RELAX_ADD_NOP_IF_SHORT_LOOP,
7232 frag_now->fr_symbol, frag_now->fr_offset, NULL);
7233 frag_now->tc_frag_data.is_insn = TRUE;
7234 frag_var (rs_machine_dependent, 4, 4,
7235 RELAX_ADD_NOP_IF_SHORT_LOOP,
7236 frag_now->fr_symbol, frag_now->fr_offset, NULL);
7239 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
7240 loop at least 12 bytes away from another loop's end. */
7241 if (workaround_close_loop_end && use_transform ())
7243 maybe_has_close_loop_end = TRUE;
7244 frag_now->tc_frag_data.is_insn = TRUE;
7245 frag_var (rs_machine_dependent, 12, 12,
7246 RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
7247 frag_now->fr_symbol, frag_now->fr_offset, NULL);
7251 if (use_transform ())
7255 gas_assert (finish_frag);
7256 frag_var (rs_machine_dependent,
7257 xtensa_fetch_width, xtensa_fetch_width,
7259 frag_now->fr_symbol, frag_now->fr_offset, NULL);
7260 xtensa_set_frag_assembly_state (frag_now);
7261 xtensa_maybe_create_trampoline_frag ();
7262 /* Always create one here. */
7263 xtensa_maybe_create_literal_pool_frag (TRUE, FALSE);
7265 else if (is_branch && do_align_targets ())
7267 gas_assert (finish_frag);
7268 frag_var (rs_machine_dependent,
7269 xtensa_fetch_width, xtensa_fetch_width,
7270 RELAX_MAYBE_UNREACHABLE,
7271 frag_now->fr_symbol, frag_now->fr_offset, NULL);
7272 xtensa_set_frag_assembly_state (frag_now);
7273 frag_var (rs_machine_dependent,
7275 RELAX_MAYBE_DESIRE_ALIGN,
7276 frag_now->fr_symbol, frag_now->fr_offset, NULL);
7277 xtensa_set_frag_assembly_state (frag_now);
7281 /* Now, if the original opcode was a call... */
7282 if (do_align_targets ()
7283 && xtensa_opcode_is_call (isa, vinsn->slots[0].opcode) == 1)
7285 float freq = get_subseg_total_freq (now_seg, now_subseg);
7286 frag_now->tc_frag_data.is_insn = TRUE;
7287 frag_var (rs_machine_dependent, 4, (int) freq, RELAX_DESIRE_ALIGN,
7288 frag_now->fr_symbol, frag_now->fr_offset, NULL);
7289 xtensa_set_frag_assembly_state (frag_now);
7292 if (vinsn_has_specific_opcodes (vinsn) && use_transform ())
7294 frag_wane (frag_now);
7296 xtensa_set_frag_assembly_state (frag_now);
7301 /* xtensa_end and helper functions. */
7303 static void xtensa_cleanup_align_frags (void);
7304 static void xtensa_fix_target_frags (void);
7305 static void xtensa_mark_narrow_branches (void);
7306 static void xtensa_mark_zcl_first_insns (void);
7307 static void xtensa_mark_difference_of_two_symbols (void);
7308 static void xtensa_fix_a0_b_retw_frags (void);
7309 static void xtensa_fix_b_j_loop_end_frags (void);
7310 static void xtensa_fix_close_loop_end_frags (void);
7311 static void xtensa_fix_short_loop_frags (void);
7312 static void xtensa_sanity_check (void);
7313 static void xtensa_add_config_info (void);
7318 directive_balance ();
7319 xtensa_flush_pending_output ();
7321 past_xtensa_end = TRUE;
7323 xtensa_move_literals ();
7325 xtensa_reorder_segments ();
7326 xtensa_cleanup_align_frags ();
7327 xtensa_fix_target_frags ();
7328 if (workaround_a0_b_retw && has_a0_b_retw)
7329 xtensa_fix_a0_b_retw_frags ();
7330 if (workaround_b_j_loop_end)
7331 xtensa_fix_b_j_loop_end_frags ();
7333 /* "close_loop_end" should be processed BEFORE "short_loop". */
7334 if (workaround_close_loop_end && maybe_has_close_loop_end)
7335 xtensa_fix_close_loop_end_frags ();
7337 if (workaround_short_loop && maybe_has_short_loop)
7338 xtensa_fix_short_loop_frags ();
7340 xtensa_mark_narrow_branches ();
7341 xtensa_mark_zcl_first_insns ();
7343 xtensa_sanity_check ();
7345 xtensa_add_config_info ();
7347 xtensa_check_frag_count ();
7351 struct trampoline_frag
7353 struct trampoline_frag *next;
7354 bfd_boolean needs_jump_around;
7359 struct trampoline_seg
7361 struct trampoline_seg *next;
7363 struct trampoline_frag trampoline_list;
7366 static struct trampoline_seg trampoline_seg_list;
7367 #define J_RANGE (128 * 1024)
7369 static int unreachable_count = 0;
7373 xtensa_maybe_create_trampoline_frag (void)
7375 if (!use_trampolines)
7378 /* We create an area for possible trampolines every 10 unreachable frags.
7379 These are preferred over the ones not preceded by an unreachable frag,
7380 because we don't have to jump around them. This function is called after
7381 each RELAX_UNREACHABLE frag is created. */
7383 if (++unreachable_count > 10)
7385 xtensa_create_trampoline_frag (FALSE);
7386 clear_frag_count ();
7387 unreachable_count = 0;
7392 xtensa_check_frag_count (void)
7394 if (!use_trampolines || frag_now->tc_frag_data.is_no_transform)
7397 /* We create an area for possible trampolines every 8000 frags or so. This
7398 is an estimate based on the max range of a "j" insn (+/-128K) divided
7399 by a typical frag byte count (16), minus a few for safety. This function
7400 is called after each source line is processed. */
7402 if (get_frag_count () > 8000)
7404 xtensa_create_trampoline_frag (TRUE);
7405 clear_frag_count ();
7406 unreachable_count = 0;
7409 /* We create an area for a possible literal pool every N (default 5000)
7411 xtensa_maybe_create_literal_pool_frag (TRUE, TRUE);
7414 static xtensa_insnbuf trampoline_buf = NULL;
7415 static xtensa_insnbuf trampoline_slotbuf = NULL;
7417 static xtensa_insnbuf litpool_buf = NULL;
7418 static xtensa_insnbuf litpool_slotbuf = NULL;
7420 #define TRAMPOLINE_FRAG_SIZE 3000
7423 xtensa_create_trampoline_frag (bfd_boolean needs_jump_around)
7425 /* Emit a frag where we can place intermediate jump instructions,
7426 in case we need to jump farther than 128K bytes.
7427 Each jump instruction takes three bytes.
7428 We allocate enough for 1000 trampolines in each frag.
7429 If that's not enough, oh well. */
7431 struct trampoline_seg *ts = trampoline_seg_list.next;
7432 struct trampoline_frag *tf;
7435 int size = TRAMPOLINE_FRAG_SIZE;
7437 for ( ; ts; ts = ts->next)
7439 if (ts->seg == now_seg)
7445 ts = XCNEW(struct trampoline_seg);
7446 ts->next = trampoline_seg_list.next;
7447 trampoline_seg_list.next = ts;
7451 frag_wane (frag_now);
7453 xtensa_set_frag_assembly_state (frag_now);
7454 varP = frag_var (rs_machine_dependent, size, size, RELAX_TRAMPOLINE, NULL, 0, NULL);
7455 fragP = (fragS *)(varP - SIZEOF_STRUCT_FRAG);
7456 if (trampoline_buf == NULL)
7458 trampoline_buf = xtensa_insnbuf_alloc (xtensa_default_isa);
7459 trampoline_slotbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
7461 tf = XNEW (struct trampoline_frag);
7462 tf->next = ts->trampoline_list.next;
7463 ts->trampoline_list.next = tf;
7464 tf->needs_jump_around = needs_jump_around;
7470 static struct trampoline_seg *
7471 find_trampoline_seg (asection *seg)
7473 struct trampoline_seg *ts = trampoline_seg_list.next;
7475 for ( ; ts; ts = ts->next)
7485 void dump_trampolines (void);
7488 dump_trampolines (void)
7490 struct trampoline_seg *ts = trampoline_seg_list.next;
7492 for ( ; ts; ts = ts->next)
7494 asection *seg = ts->seg;
7498 fprintf(stderr, "SECTION %s\n", seg->name);
7499 struct trampoline_frag *tf = ts->trampoline_list.next;
7500 for ( ; tf; tf = tf->next)
7502 if (tf->fragP == NULL)
7504 fprintf(stderr, " 0x%08x: fix=%d, jump_around=%s\n",
7505 (int)tf->fragP->fr_address, (int)tf->fragP->fr_fix,
7506 tf->needs_jump_around ? "T" : "F");
7511 static void dump_litpools (void) __attribute__ ((unused));
7514 dump_litpools (void)
7516 struct litpool_seg *lps = litpool_seg_list.next;
7517 struct litpool_frag *lpf;
7519 for ( ; lps ; lps = lps->next )
7521 printf("litpool seg %s\n", lps->seg->name);
7522 for ( lpf = lps->frag_list.next; lpf->fragP; lpf = lpf->next )
7524 fragS *litfrag = lpf->fragP->fr_next;
7526 while (litfrag && litfrag->fr_subtype != RELAX_LITERAL_POOL_END)
7528 if (litfrag->fr_fix == 4)
7530 litfrag = litfrag->fr_next;
7532 printf(" %ld <%d:%d> (%d) [%d]: ",
7533 lpf->addr, lpf->priority, lpf->original_priority,
7534 lpf->fragP->fr_line, count);
7535 //dump_frag(lpf->fragP);
7541 xtensa_maybe_create_literal_pool_frag (bfd_boolean create,
7542 bfd_boolean only_if_needed)
7544 struct litpool_seg *lps = litpool_seg_list.next;
7546 struct litpool_frag *lpf;
7547 bfd_boolean needed = FALSE;
7549 if (use_literal_section || !auto_litpools)
7552 for ( ; lps ; lps = lps->next )
7554 if (lps->seg == now_seg)
7560 lps = XCNEW (struct litpool_seg);
7561 lps->next = litpool_seg_list.next;
7562 litpool_seg_list.next = lps;
7564 lps->frag_list.next = &lps->frag_list;
7565 lps->frag_list.prev = &lps->frag_list;
7566 /* Put candidate literal pool at the beginning of every section,
7567 so that even when section starts with literal load there's a
7568 literal pool available. */
7569 lps->frag_count = auto_litpool_limit;
7578 if (past_xtensa_end || !use_transform() ||
7579 frag_now->tc_frag_data.is_no_transform)
7583 if (auto_litpool_limit <= 0)
7585 /* Don't create a litpool based only on frag count. */
7588 else if (lps->frag_count > auto_litpool_limit)
7605 int size = (only_if_needed) ? 3 : 0; /* Space for a "j" insn. */
7606 /* Create a potential site for a literal pool. */
7607 frag_wane (frag_now);
7609 xtensa_set_frag_assembly_state (frag_now);
7611 fragP->tc_frag_data.lit_frchain = frchain_now;
7612 fragP->tc_frag_data.literal_frag = fragP;
7613 frag_var (rs_machine_dependent, size, size,
7615 RELAX_LITERAL_POOL_CANDIDATE_BEGIN :
7616 RELAX_LITERAL_POOL_BEGIN,
7618 frag_now->tc_frag_data.lit_seg = now_seg;
7619 frag_variant (rs_machine_dependent, 0, 0,
7620 RELAX_LITERAL_POOL_END, NULL, 0, NULL);
7621 xtensa_set_frag_assembly_state (frag_now);
7625 /* RELAX_LITERAL_POOL_BEGIN frag is being created;
7626 just record it here. */
7630 lpf = XNEW (struct litpool_frag);
7631 /* Insert at tail of circular list. */
7633 lps->frag_list.prev->next = lpf;
7634 lpf->next = &lps->frag_list;
7635 lpf->prev = lps->frag_list.prev;
7636 lps->frag_list.prev = lpf;
7638 lpf->priority = (needed) ? (only_if_needed) ? 3 : 2 : 1;
7639 lpf->original_priority = lpf->priority;
7641 lps->frag_count = 0;
7645 xtensa_cleanup_align_frags (void)
7650 for (s = stdoutput->sections; s; s = s->next)
7651 for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
7654 /* Walk over all of the fragments in a subsection. */
7655 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
7657 if ((fragP->fr_type == rs_align
7658 || fragP->fr_type == rs_align_code
7659 || (fragP->fr_type == rs_machine_dependent
7660 && (fragP->fr_subtype == RELAX_DESIRE_ALIGN
7661 || fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)))
7662 && fragP->fr_fix == 0)
7664 fragS *next = fragP->fr_next;
7667 && next->fr_fix == 0
7668 && next->fr_type == rs_machine_dependent
7669 && next->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
7672 next = next->fr_next;
7675 /* If we don't widen branch targets, then they
7676 will be easier to align. */
7677 if (fragP->tc_frag_data.is_branch_target
7678 && fragP->fr_opcode == fragP->fr_literal
7679 && fragP->fr_type == rs_machine_dependent
7680 && fragP->fr_subtype == RELAX_SLOTS
7681 && fragP->tc_frag_data.slot_subtypes[0] == RELAX_NARROW)
7683 if (fragP->fr_type == rs_machine_dependent
7684 && fragP->fr_subtype == RELAX_UNREACHABLE)
7685 fragP->tc_frag_data.is_unreachable = TRUE;
7691 /* Re-process all of the fragments looking to convert all of the
7692 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
7693 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
7694 Otherwise, convert to a .fill 0. */
7697 xtensa_fix_target_frags (void)
7702 /* When this routine is called, all of the subsections are still intact
7703 so we walk over subsections instead of sections. */
7704 for (s = stdoutput->sections; s; s = s->next)
7705 for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
7709 /* Walk over all of the fragments in a subsection. */
7710 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
7712 if (fragP->fr_type == rs_machine_dependent
7713 && fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
7715 if (next_frag_is_branch_target (fragP))
7716 fragP->fr_subtype = RELAX_DESIRE_ALIGN;
7725 static bfd_boolean is_narrow_branch_guaranteed_in_range (fragS *, TInsn *);
7728 xtensa_mark_narrow_branches (void)
7733 for (s = stdoutput->sections; s; s = s->next)
7734 for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
7737 /* Walk over all of the fragments in a subsection. */
7738 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
7740 if (fragP->fr_type == rs_machine_dependent
7741 && fragP->fr_subtype == RELAX_SLOTS
7742 && fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED)
7746 vinsn_from_chars (&vinsn, fragP->fr_opcode);
7747 tinsn_immed_from_frag (&vinsn.slots[0], fragP, 0);
7749 if (vinsn.num_slots == 1
7750 && xtensa_opcode_is_branch (xtensa_default_isa,
7751 vinsn.slots[0].opcode) == 1
7752 && xg_get_single_size (vinsn.slots[0].opcode) == 2
7753 && is_narrow_branch_guaranteed_in_range (fragP,
7756 fragP->fr_subtype = RELAX_SLOTS;
7757 fragP->tc_frag_data.slot_subtypes[0] = RELAX_NARROW;
7758 fragP->tc_frag_data.is_aligning_branch = 1;
7766 /* A branch is typically widened only when its target is out of
7767 range. However, we would like to widen them to align a subsequent
7768 branch target when possible.
7770 Because the branch relaxation code is so convoluted, the optimal solution
7771 (combining the two cases) is difficult to get right in all circumstances.
7772 We therefore go with an "almost as good" solution, where we only
7773 use for alignment narrow branches that definitely will not expand to a
7774 jump and a branch. These functions find and mark these cases. */
7776 /* The range in bytes of BNEZ.N and BEQZ.N. The target operand is encoded
7777 as PC + 4 + imm6, where imm6 is a 6-bit immediate ranging from 0 to 63.
7778 We start counting beginning with the frag after the 2-byte branch, so the
7779 maximum offset is (4 - 2) + 63 = 65. */
7780 #define MAX_IMMED6 65
7782 static offsetT unrelaxed_frag_max_size (fragS *);
7785 is_narrow_branch_guaranteed_in_range (fragS *fragP, TInsn *tinsn)
7787 const expressionS *exp = &tinsn->tok[1];
7788 symbolS *symbolP = exp->X_add_symbol;
7789 offsetT max_distance = exp->X_add_number;
7792 if (exp->X_op != O_symbol)
7795 target_frag = symbol_get_frag (symbolP);
7797 max_distance += (S_GET_VALUE (symbolP) - target_frag->fr_address);
7798 if (is_branch_jmp_to_next (tinsn, fragP))
7801 /* The branch doesn't branch over it's own frag,
7802 but over the subsequent ones. */
7803 fragP = fragP->fr_next;
7804 while (fragP != NULL && fragP != target_frag && max_distance <= MAX_IMMED6)
7806 max_distance += unrelaxed_frag_max_size (fragP);
7807 fragP = fragP->fr_next;
7809 if (max_distance <= MAX_IMMED6 && fragP == target_frag)
7816 xtensa_mark_zcl_first_insns (void)
7821 for (s = stdoutput->sections; s; s = s->next)
7822 for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
7825 /* Walk over all of the fragments in a subsection. */
7826 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
7828 if (fragP->fr_type == rs_machine_dependent
7829 && (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE
7830 || fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE))
7832 /* Find the loop frag. */
7833 fragS *loop_frag = next_non_empty_frag (fragP);
7834 /* Find the first insn frag. */
7835 fragS *targ_frag = next_non_empty_frag (loop_frag);
7837 /* Handle a corner case that comes up in hardware
7838 diagnostics. The original assembly looks like this:
7841 <empty_frag>--not found by next_non_empty_frag
7844 Depending on the start address, the assembler may or
7845 may not change it to look something like this:
7848 nop--frag isn't empty anymore
7851 So set up to check the alignment of the nop if it
7853 while (loop_frag != targ_frag)
7855 if (loop_frag->fr_type == rs_machine_dependent
7856 && (loop_frag->fr_subtype == RELAX_ALIGN_NEXT_OPCODE
7857 || loop_frag->fr_subtype
7858 == RELAX_CHECK_ALIGN_NEXT_OPCODE))
7859 targ_frag = loop_frag;
7861 loop_frag = loop_frag->fr_next;
7864 /* Of course, sometimes (mostly for toy test cases) a
7865 zero-cost loop instruction is the last in a section. */
7868 targ_frag->tc_frag_data.is_first_loop_insn = TRUE;
7869 /* Do not widen a frag that is the first instruction of a
7870 zero-cost loop. It makes that loop harder to align. */
7871 if (targ_frag->fr_type == rs_machine_dependent
7872 && targ_frag->fr_subtype == RELAX_SLOTS
7873 && (targ_frag->tc_frag_data.slot_subtypes[0]
7876 if (targ_frag->tc_frag_data.is_aligning_branch)
7877 targ_frag->tc_frag_data.slot_subtypes[0] = RELAX_IMMED;
7880 frag_wane (targ_frag);
7881 targ_frag->tc_frag_data.slot_subtypes[0] = 0;
7885 if (fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE)
7893 /* When a difference-of-symbols expression is encoded as a uleb128 or
7894 sleb128 value, the linker is unable to adjust that value to account for
7895 link-time relaxation. Mark all the code between such symbols so that
7896 its size cannot be changed by linker relaxation. */
7899 xtensa_mark_difference_of_two_symbols (void)
7903 for (expr_sym = expr_symbols; expr_sym;
7904 expr_sym = symbol_get_tc (expr_sym)->next_expr_symbol)
7906 expressionS *exp = symbol_get_value_expression (expr_sym);
7908 if (exp->X_op == O_subtract)
7910 symbolS *left = exp->X_add_symbol;
7911 symbolS *right = exp->X_op_symbol;
7913 /* Difference of two symbols not in the same section
7914 are handled with relocations in the linker. */
7915 if (S_GET_SEGMENT (left) == S_GET_SEGMENT (right))
7921 if (symbol_get_frag (left)->fr_address
7922 <= symbol_get_frag (right)->fr_address)
7924 start = symbol_get_frag (left);
7925 end = symbol_get_frag (right);
7929 start = symbol_get_frag (right);
7930 end = symbol_get_frag (left);
7933 if (start->tc_frag_data.no_transform_end != NULL)
7934 walk = start->tc_frag_data.no_transform_end;
7939 walk->tc_frag_data.is_no_transform = 1;
7940 walk = walk->fr_next;
7942 while (walk && walk->fr_address < end->fr_address);
7944 start->tc_frag_data.no_transform_end = walk;
7951 /* Re-process all of the fragments looking to convert all of the
7952 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
7953 conditional branch or a retw/retw.n, convert this frag to one that
7954 will generate a NOP. In any case close it off with a .fill 0. */
7956 static bfd_boolean next_instrs_are_b_retw (fragS *);
7959 xtensa_fix_a0_b_retw_frags (void)
7964 /* When this routine is called, all of the subsections are still intact
7965 so we walk over subsections instead of sections. */
7966 for (s = stdoutput->sections; s; s = s->next)
7967 for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
7971 /* Walk over all of the fragments in a subsection. */
7972 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
7974 if (fragP->fr_type == rs_machine_dependent
7975 && fragP->fr_subtype == RELAX_ADD_NOP_IF_A0_B_RETW)
7977 if (next_instrs_are_b_retw (fragP))
7979 if (fragP->tc_frag_data.is_no_transform)
7980 as_bad (_("instruction sequence (write a0, branch, retw) may trigger hardware errata"));
7982 relax_frag_add_nop (fragP);
7992 next_instrs_are_b_retw (fragS *fragP)
7994 xtensa_opcode opcode;
7996 const fragS *next_fragP = next_non_empty_frag (fragP);
7997 static xtensa_insnbuf insnbuf = NULL;
7998 static xtensa_insnbuf slotbuf = NULL;
7999 xtensa_isa isa = xtensa_default_isa;
8002 bfd_boolean branch_seen = FALSE;
8006 insnbuf = xtensa_insnbuf_alloc (isa);
8007 slotbuf = xtensa_insnbuf_alloc (isa);
8010 if (next_fragP == NULL)
8013 /* Check for the conditional branch. */
8014 xtensa_insnbuf_from_chars
8015 (isa, insnbuf, (unsigned char *) &next_fragP->fr_literal[offset], 0);
8016 fmt = xtensa_format_decode (isa, insnbuf);
8017 if (fmt == XTENSA_UNDEFINED)
8020 for (slot = 0; slot < xtensa_format_num_slots (isa, fmt); slot++)
8022 xtensa_format_get_slot (isa, fmt, slot, insnbuf, slotbuf);
8023 opcode = xtensa_opcode_decode (isa, fmt, slot, slotbuf);
8025 branch_seen = (branch_seen
8026 || xtensa_opcode_is_branch (isa, opcode) == 1);
8032 offset += xtensa_format_length (isa, fmt);
8033 if (offset == next_fragP->fr_fix)
8035 next_fragP = next_non_empty_frag (next_fragP);
8039 if (next_fragP == NULL)
8042 /* Check for the retw/retw.n. */
8043 xtensa_insnbuf_from_chars
8044 (isa, insnbuf, (unsigned char *) &next_fragP->fr_literal[offset], 0);
8045 fmt = xtensa_format_decode (isa, insnbuf);
8047 /* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
8048 have no problems. */
8049 if (fmt == XTENSA_UNDEFINED
8050 || xtensa_format_num_slots (isa, fmt) != 1)
8053 xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf);
8054 opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf);
8056 if (opcode == xtensa_retw_opcode || opcode == xtensa_retw_n_opcode)
8063 /* Re-process all of the fragments looking to convert all of the
8064 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
8065 loop end label, convert this frag to one that will generate a NOP.
8066 In any case close it off with a .fill 0. */
8068 static bfd_boolean next_instr_is_loop_end (fragS *);
8071 xtensa_fix_b_j_loop_end_frags (void)
8076 /* When this routine is called, all of the subsections are still intact
8077 so we walk over subsections instead of sections. */
8078 for (s = stdoutput->sections; s; s = s->next)
8079 for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
8083 /* Walk over all of the fragments in a subsection. */
8084 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
8086 if (fragP->fr_type == rs_machine_dependent
8087 && fragP->fr_subtype == RELAX_ADD_NOP_IF_PRE_LOOP_END)
8089 if (next_instr_is_loop_end (fragP))
8091 if (fragP->tc_frag_data.is_no_transform)
8092 as_bad (_("branching or jumping to a loop end may trigger hardware errata"));
8094 relax_frag_add_nop (fragP);
8104 next_instr_is_loop_end (fragS *fragP)
8106 const fragS *next_fragP;
8108 if (next_frag_is_loop_target (fragP))
8111 next_fragP = next_non_empty_frag (fragP);
8112 if (next_fragP == NULL)
8115 if (!next_frag_is_loop_target (next_fragP))
8118 /* If the size is >= 3 then there is more than one instruction here.
8119 The hardware bug will not fire. */
8120 if (next_fragP->fr_fix > 3)
8127 /* Re-process all of the fragments looking to convert all of the
8128 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
8129 not MY loop's loop end within 12 bytes, add enough nops here to
8130 make it at least 12 bytes away. In any case close it off with a
8133 static offsetT min_bytes_to_other_loop_end
8134 (fragS *, fragS *, offsetT);
8137 xtensa_fix_close_loop_end_frags (void)
8142 /* When this routine is called, all of the subsections are still intact
8143 so we walk over subsections instead of sections. */
8144 for (s = stdoutput->sections; s; s = s->next)
8145 for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
8149 fragS *current_target = NULL;
8151 /* Walk over all of the fragments in a subsection. */
8152 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
8154 if (fragP->fr_type == rs_machine_dependent
8155 && ((fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
8156 || (fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE)))
8157 current_target = symbol_get_frag (fragP->fr_symbol);
8160 && fragP->fr_type == rs_machine_dependent
8161 && fragP->fr_subtype == RELAX_ADD_NOP_IF_CLOSE_LOOP_END)
8164 int bytes_added = 0;
8166 #define REQUIRED_LOOP_DIVIDING_BYTES 12
8167 /* Max out at 12. */
8168 min_bytes = min_bytes_to_other_loop_end
8169 (fragP->fr_next, current_target, REQUIRED_LOOP_DIVIDING_BYTES);
8171 if (min_bytes < REQUIRED_LOOP_DIVIDING_BYTES)
8173 if (fragP->tc_frag_data.is_no_transform)
8174 as_bad (_("loop end too close to another loop end may trigger hardware errata"));
8177 while (min_bytes + bytes_added
8178 < REQUIRED_LOOP_DIVIDING_BYTES)
8182 if (fragP->fr_var < length)
8183 as_fatal (_("fr_var %lu < length %d"),
8184 (long) fragP->fr_var, length);
8187 assemble_nop (length,
8188 fragP->fr_literal + fragP->fr_fix);
8189 fragP->fr_fix += length;
8190 fragP->fr_var -= length;
8192 bytes_added += length;
8198 gas_assert (fragP->fr_type != rs_machine_dependent
8199 || fragP->fr_subtype != RELAX_ADD_NOP_IF_CLOSE_LOOP_END);
8205 static offsetT unrelaxed_frag_min_size (fragS *);
8208 min_bytes_to_other_loop_end (fragS *fragP,
8209 fragS *current_target,
8213 fragS *current_fragP;
8215 for (current_fragP = fragP;
8217 current_fragP = current_fragP->fr_next)
8219 if (current_fragP->tc_frag_data.is_loop_target
8220 && current_fragP != current_target)
8223 offset += unrelaxed_frag_min_size (current_fragP);
8225 if (offset >= max_size)
8233 unrelaxed_frag_min_size (fragS *fragP)
8235 offsetT size = fragP->fr_fix;
8237 /* Add fill size. */
8238 if (fragP->fr_type == rs_fill)
8239 size += fragP->fr_offset;
8246 unrelaxed_frag_max_size (fragS *fragP)
8248 offsetT size = fragP->fr_fix;
8249 switch (fragP->fr_type)
8252 /* Empty frags created by the obstack allocation scheme
8253 end up with type 0. */
8258 size += fragP->fr_offset;
8266 /* No further adjustments needed. */
8268 case rs_machine_dependent:
8269 if (fragP->fr_subtype != RELAX_DESIRE_ALIGN)
8270 size += fragP->fr_var;
8273 /* We had darn well better know how big it is. */
8282 /* Re-process all of the fragments looking to convert all
8283 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
8286 1) the instruction size count to the loop end label
8287 is too short (<= 2 instructions),
8288 2) loop has a jump or branch in it
8291 1) workaround_all_short_loops is TRUE
8292 2) The generating loop was a 'loopgtz' or 'loopnez'
8293 3) the instruction size count to the loop end label is too short
8295 then convert this frag (and maybe the next one) to generate a NOP.
8296 In any case close it off with a .fill 0. */
8298 static int count_insns_to_loop_end (fragS *, bfd_boolean, int);
8299 static bfd_boolean branch_before_loop_end (fragS *);
8302 xtensa_fix_short_loop_frags (void)
8307 /* When this routine is called, all of the subsections are still intact
8308 so we walk over subsections instead of sections. */
8309 for (s = stdoutput->sections; s; s = s->next)
8310 for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
8313 xtensa_opcode current_opcode = XTENSA_UNDEFINED;
8315 /* Walk over all of the fragments in a subsection. */
8316 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
8318 if (fragP->fr_type == rs_machine_dependent
8319 && ((fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
8320 || (fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE)))
8323 fragS *loop_frag = next_non_empty_frag (fragP);
8324 tinsn_from_chars (&t_insn, loop_frag->fr_opcode, 0);
8325 current_opcode = t_insn.opcode;
8326 gas_assert (xtensa_opcode_is_loop (xtensa_default_isa,
8327 current_opcode) == 1);
8330 if (fragP->fr_type == rs_machine_dependent
8331 && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
8333 if (count_insns_to_loop_end (fragP->fr_next, TRUE, 3) < 3
8334 && (branch_before_loop_end (fragP->fr_next)
8335 || (workaround_all_short_loops
8336 && current_opcode != XTENSA_UNDEFINED
8337 && current_opcode != xtensa_loop_opcode)))
8339 if (fragP->tc_frag_data.is_no_transform)
8340 as_bad (_("loop containing less than three instructions may trigger hardware errata"));
8342 relax_frag_add_nop (fragP);
8351 static int unrelaxed_frag_min_insn_count (fragS *);
8354 count_insns_to_loop_end (fragS *base_fragP,
8355 bfd_boolean count_relax_add,
8358 fragS *fragP = NULL;
8363 for (; fragP && !fragP->tc_frag_data.is_loop_target; fragP = fragP->fr_next)
8365 insn_count += unrelaxed_frag_min_insn_count (fragP);
8366 if (insn_count >= max_count)
8369 if (count_relax_add)
8371 if (fragP->fr_type == rs_machine_dependent
8372 && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
8374 /* In order to add the appropriate number of
8375 NOPs, we count an instruction for downstream
8378 if (insn_count >= max_count)
8388 unrelaxed_frag_min_insn_count (fragS *fragP)
8390 xtensa_isa isa = xtensa_default_isa;
8391 static xtensa_insnbuf insnbuf = NULL;
8395 if (!fragP->tc_frag_data.is_insn)
8399 insnbuf = xtensa_insnbuf_alloc (isa);
8401 /* Decode the fixed instructions. */
8402 while (offset < fragP->fr_fix)
8406 xtensa_insnbuf_from_chars
8407 (isa, insnbuf, (unsigned char *) fragP->fr_literal + offset, 0);
8408 fmt = xtensa_format_decode (isa, insnbuf);
8410 if (fmt == XTENSA_UNDEFINED)
8412 as_fatal (_("undecodable instruction in instruction frag"));
8415 offset += xtensa_format_length (isa, fmt);
8423 static bfd_boolean unrelaxed_frag_has_b_j (fragS *);
8426 branch_before_loop_end (fragS *base_fragP)
8430 for (fragP = base_fragP;
8431 fragP && !fragP->tc_frag_data.is_loop_target;
8432 fragP = fragP->fr_next)
8434 if (unrelaxed_frag_has_b_j (fragP))
8442 unrelaxed_frag_has_b_j (fragS *fragP)
8444 static xtensa_insnbuf insnbuf = NULL;
8445 xtensa_isa isa = xtensa_default_isa;
8448 if (!fragP->tc_frag_data.is_insn)
8452 insnbuf = xtensa_insnbuf_alloc (isa);
8454 /* Decode the fixed instructions. */
8455 while (offset < fragP->fr_fix)
8460 xtensa_insnbuf_from_chars
8461 (isa, insnbuf, (unsigned char *) fragP->fr_literal + offset, 0);
8462 fmt = xtensa_format_decode (isa, insnbuf);
8463 if (fmt == XTENSA_UNDEFINED)
8466 for (slot = 0; slot < xtensa_format_num_slots (isa, fmt); slot++)
8468 xtensa_opcode opcode =
8469 get_opcode_from_buf (fragP->fr_literal + offset, slot);
8470 if (xtensa_opcode_is_branch (isa, opcode) == 1
8471 || xtensa_opcode_is_jump (isa, opcode) == 1)
8474 offset += xtensa_format_length (isa, fmt);
8480 /* Checks to be made after initial assembly but before relaxation. */
8482 static bfd_boolean is_empty_loop (const TInsn *, fragS *);
8483 static bfd_boolean is_local_forward_loop (const TInsn *, fragS *);
8486 xtensa_sanity_check (void)
8488 const char *file_name;
8493 file_name = as_where (&line);
8494 for (s = stdoutput->sections; s; s = s->next)
8495 for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
8499 /* Walk over all of the fragments in a subsection. */
8500 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
8502 if (fragP->fr_type == rs_machine_dependent
8503 && fragP->fr_subtype == RELAX_SLOTS
8504 && fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED)
8506 static xtensa_insnbuf insnbuf = NULL;
8509 if (fragP->fr_opcode != NULL)
8512 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
8513 tinsn_from_chars (&t_insn, fragP->fr_opcode, 0);
8514 tinsn_immed_from_frag (&t_insn, fragP, 0);
8516 if (xtensa_opcode_is_loop (xtensa_default_isa,
8517 t_insn.opcode) == 1)
8519 if (is_empty_loop (&t_insn, fragP))
8521 new_logical_line (fragP->fr_file, fragP->fr_line);
8522 as_bad (_("invalid empty loop"));
8524 if (!is_local_forward_loop (&t_insn, fragP))
8526 new_logical_line (fragP->fr_file, fragP->fr_line);
8527 as_bad (_("loop target does not follow "
8528 "loop instruction in section"));
8535 new_logical_line (file_name, line);
8539 #define LOOP_IMMED_OPN 1
8541 /* Return TRUE if the loop target is the next non-zero fragment. */
8544 is_empty_loop (const TInsn *insn, fragS *fragP)
8546 const expressionS *exp;
8550 if (insn->insn_type != ITYPE_INSN)
8553 if (xtensa_opcode_is_loop (xtensa_default_isa, insn->opcode) != 1)
8556 if (insn->ntok <= LOOP_IMMED_OPN)
8559 exp = &insn->tok[LOOP_IMMED_OPN];
8561 if (exp->X_op != O_symbol)
8564 symbolP = exp->X_add_symbol;
8568 if (symbol_get_frag (symbolP) == NULL)
8571 if (S_GET_VALUE (symbolP) != 0)
8574 /* Walk through the zero-size fragments from this one. If we find
8575 the target fragment, then this is a zero-size loop. */
8577 for (next_fragP = fragP->fr_next;
8579 next_fragP = next_fragP->fr_next)
8581 if (next_fragP == symbol_get_frag (symbolP))
8583 if (next_fragP->fr_fix != 0)
8591 is_local_forward_loop (const TInsn *insn, fragS *fragP)
8593 const expressionS *exp;
8597 if (insn->insn_type != ITYPE_INSN)
8600 if (xtensa_opcode_is_loop (xtensa_default_isa, insn->opcode) != 1)
8603 if (insn->ntok <= LOOP_IMMED_OPN)
8606 exp = &insn->tok[LOOP_IMMED_OPN];
8608 if (exp->X_op != O_symbol)
8611 symbolP = exp->X_add_symbol;
8615 if (symbol_get_frag (symbolP) == NULL)
8618 /* Walk through fragments until we find the target.
8619 If we do not find the target, then this is an invalid loop. */
8621 for (next_fragP = fragP->fr_next;
8623 next_fragP = next_fragP->fr_next)
8625 if (next_fragP == symbol_get_frag (symbolP))
8633 #define XTINFO_NAME "Xtensa_Info"
8634 #define XTINFO_NAMESZ 12
8635 #define XTINFO_TYPE 1
8638 xtensa_add_config_info (void)
8644 info_sec = subseg_new (".xtensa.info", 0);
8645 bfd_set_section_flags (stdoutput, info_sec, SEC_HAS_CONTENTS | SEC_READONLY);
8647 data = XNEWVEC (char, 100);
8648 sprintf (data, "USE_ABSOLUTE_LITERALS=%d\nABI=%d\n",
8649 XSHAL_USE_ABSOLUTE_LITERALS, XSHAL_ABI);
8650 sz = strlen (data) + 1;
8652 /* Add enough null terminators to pad to a word boundary. */
8655 while ((sz & 3) != 0);
8657 /* Follow the standard note section layout:
8658 First write the length of the name string. */
8660 md_number_to_chars (p, (valueT) XTINFO_NAMESZ, 4);
8662 /* Next comes the length of the "descriptor", i.e., the actual data. */
8664 md_number_to_chars (p, (valueT) sz, 4);
8666 /* Write the note type. */
8668 md_number_to_chars (p, (valueT) XTINFO_TYPE, 4);
8670 /* Write the name field. */
8671 p = frag_more (XTINFO_NAMESZ);
8672 memcpy (p, XTINFO_NAME, XTINFO_NAMESZ);
8674 /* Finally, write the descriptor. */
8676 memcpy (p, data, sz);
8682 /* Alignment Functions. */
8685 get_text_align_power (unsigned target_size)
8687 if (target_size <= 4)
8690 if (target_size <= 8)
8693 if (target_size <= 16)
8696 if (target_size <= 32)
8699 if (target_size <= 64)
8702 if (target_size <= 128)
8705 if (target_size <= 256)
8708 if (target_size <= 512)
8711 if (target_size <= 1024)
8720 get_text_align_max_fill_size (int align_pow,
8721 bfd_boolean use_nops,
8722 bfd_boolean use_no_density)
8725 return (1 << align_pow);
8727 return 3 * (1 << align_pow);
8729 return 1 + (1 << align_pow);
8733 /* Calculate the minimum bytes of fill needed at "address" to align a
8734 target instruction of size "target_size" so that it does not cross a
8735 power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
8736 the fill can be an arbitrary number of bytes. Otherwise, the space must
8737 be filled by NOP instructions. */
8740 get_text_align_fill_size (addressT address,
8743 bfd_boolean use_nops,
8744 bfd_boolean use_no_density)
8746 addressT alignment, fill, fill_limit, fill_step;
8747 bfd_boolean skip_one = FALSE;
8749 alignment = (1 << align_pow);
8750 gas_assert (target_size > 0 && alignment >= (addressT) target_size);
8754 fill_limit = alignment;
8757 else if (!use_no_density)
8759 /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
8760 fill_limit = alignment * 2;
8766 /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
8767 fill_limit = alignment * 3;
8771 /* Try all fill sizes until finding one that works. */
8772 for (fill = 0; fill < fill_limit; fill += fill_step)
8774 if (skip_one && fill == 1)
8776 if ((address + fill) >> align_pow
8777 == (address + fill + target_size - 1) >> align_pow)
8786 branch_align_power (segT sec)
8788 /* If the Xtensa processor has a fetch width of X, and
8789 the section is aligned to at least that boundary, then a branch
8790 target need only fit within that aligned block of memory to avoid
8791 a stall. Otherwise, try to fit branch targets within 4-byte
8792 aligned blocks (which may be insufficient, e.g., if the section
8793 has no alignment, but it's good enough). */
8794 int fetch_align = get_text_align_power(xtensa_fetch_width);
8795 int sec_align = get_recorded_alignment (sec);
8797 if (sec_align >= fetch_align)
8804 /* This will assert if it is not possible. */
8807 get_text_align_nop_count (offsetT fill_size, bfd_boolean use_no_density)
8813 gas_assert (fill_size % 3 == 0);
8814 return (fill_size / 3);
8817 gas_assert (fill_size != 1); /* Bad argument. */
8819 while (fill_size > 1)
8822 if (fill_size == 2 || fill_size == 4)
8824 fill_size -= insn_size;
8827 gas_assert (fill_size != 1); /* Bad algorithm. */
8833 get_text_align_nth_nop_size (offsetT fill_size,
8835 bfd_boolean use_no_density)
8842 gas_assert (fill_size != 1); /* Bad argument. */
8844 while (fill_size > 1)
8847 if (fill_size == 2 || fill_size == 4)
8849 fill_size -= insn_size;
8859 /* For the given fragment, find the appropriate address
8860 for it to begin at if we are using NOPs to align it. */
8863 get_noop_aligned_address (fragS *fragP, addressT address)
8865 /* The rule is: get next fragment's FIRST instruction. Find
8866 the smallest number of bytes that need to be added to
8867 ensure that the next fragment's FIRST instruction will fit
8870 E.G., 2 bytes : 0, 1, 2 mod 4
8873 If the FIRST instruction MIGHT be relaxed,
8874 assume that it will become a 3-byte instruction.
8876 Note again here that LOOP instructions are not bundleable,
8877 and this relaxation only applies to LOOP opcodes. */
8880 int first_insn_size;
8882 addressT pre_opcode_bytes;
8885 xtensa_opcode opcode;
8886 bfd_boolean is_loop;
8888 gas_assert (fragP->fr_type == rs_machine_dependent);
8889 gas_assert (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE);
8891 /* Find the loop frag. */
8892 first_insn = next_non_empty_frag (fragP);
8893 /* Now find the first insn frag. */
8894 first_insn = next_non_empty_frag (first_insn);
8896 is_loop = next_frag_opcode_is_loop (fragP, &opcode);
8897 gas_assert (is_loop);
8898 loop_insn_size = xg_get_single_size (opcode);
8900 pre_opcode_bytes = next_frag_pre_opcode_bytes (fragP);
8901 pre_opcode_bytes += loop_insn_size;
8903 /* For loops, the alignment depends on the size of the
8904 instruction following the loop, not the LOOP instruction. */
8906 if (first_insn == NULL)
8907 first_insn_size = xtensa_fetch_width;
8909 first_insn_size = get_loop_align_size (frag_format_size (first_insn));
8911 /* If it was 8, then we'll need a larger alignment for the section. */
8912 align_power = get_text_align_power (first_insn_size);
8913 record_alignment (now_seg, align_power);
8915 fill_size = get_text_align_fill_size
8916 (address + pre_opcode_bytes, align_power, first_insn_size, TRUE,
8917 fragP->tc_frag_data.is_no_density);
8919 return address + fill_size;
8923 /* 3 mechanisms for relaxing an alignment:
8925 Align to a power of 2.
8926 Align so the next fragment's instruction does not cross a word boundary.
8927 Align the current instruction so that if the next instruction
8928 were 3 bytes, it would not cross a word boundary.
8932 zeros - This is easy; always insert zeros.
8933 nops - 3-byte and 2-byte instructions
8937 >=5 : 3-byte instruction + fn (n-3)
8938 widening - widen previous instructions. */
8941 get_aligned_diff (fragS *fragP, addressT address, offsetT *max_diff)
8943 addressT target_address, loop_insn_offset;
8945 xtensa_opcode loop_opcode;
8946 bfd_boolean is_loop;
8949 offsetT branch_align;
8952 gas_assert (fragP->fr_type == rs_machine_dependent);
8953 switch (fragP->fr_subtype)
8955 case RELAX_DESIRE_ALIGN:
8956 target_size = next_frag_format_size (fragP);
8957 if (target_size == XTENSA_UNDEFINED)
8959 align_power = branch_align_power (now_seg);
8960 branch_align = 1 << align_power;
8961 /* Don't count on the section alignment being as large as the target. */
8962 if (target_size > branch_align)
8963 target_size = branch_align;
8964 opt_diff = get_text_align_fill_size (address, align_power,
8965 target_size, FALSE, FALSE);
8967 *max_diff = (opt_diff + branch_align
8968 - (target_size + ((address + opt_diff) % branch_align)));
8969 gas_assert (*max_diff >= opt_diff);
8972 case RELAX_ALIGN_NEXT_OPCODE:
8973 /* The next non-empty frag after this one holds the LOOP instruction
8974 that needs to be aligned. The required alignment depends on the
8975 size of the next non-empty frag after the loop frag, i.e., the
8976 first instruction in the loop. */
8977 loop_frag = next_non_empty_frag (fragP);
8978 target_size = get_loop_align_size (next_frag_format_size (loop_frag));
8979 loop_insn_offset = 0;
8980 is_loop = next_frag_opcode_is_loop (fragP, &loop_opcode);
8981 gas_assert (is_loop);
8983 /* If the loop has been expanded then the LOOP instruction
8984 could be at an offset from this fragment. */
8985 if (loop_frag->tc_frag_data.slot_subtypes[0] != RELAX_IMMED)
8986 loop_insn_offset = get_expanded_loop_offset (loop_opcode);
8988 /* In an ideal world, which is what we are shooting for here,
8989 we wouldn't need to use any NOPs immediately prior to the
8990 LOOP instruction. If this approach fails, relax_frag_loop_align
8991 will call get_noop_aligned_address. */
8993 address + loop_insn_offset + xg_get_single_size (loop_opcode);
8994 align_power = get_text_align_power (target_size);
8995 opt_diff = get_text_align_fill_size (target_address, align_power,
8996 target_size, FALSE, FALSE);
8998 *max_diff = xtensa_fetch_width
8999 - ((target_address + opt_diff) % xtensa_fetch_width)
9000 - target_size + opt_diff;
9001 gas_assert (*max_diff >= opt_diff);
9012 /* md_relax_frag Hook and Helper Functions. */
9014 static long relax_frag_loop_align (fragS *, long);
9015 static long relax_frag_for_align (fragS *, long);
9016 static long relax_frag_immed
9017 (segT, fragS *, long, int, xtensa_format, int, int *, bfd_boolean);
9019 typedef struct cached_fixup cached_fixupS;
9028 typedef struct fixup_cache fixup_cacheS;
9031 cached_fixupS *fixups;
9039 static int fixup_order (const void *a, const void *b)
9041 const cached_fixupS *pa = a;
9042 const cached_fixupS *pb = b;
9044 if (pa->addr == pb->addr)
9046 if (pa->target == pb->target)
9048 if (pa->fixP->fx_r_type == pb->fixP->fx_r_type)
9050 return pa->fixP->fx_r_type < pb->fixP->fx_r_type ? -1 : 1;
9052 return pa->target - pb->target;
9054 return pa->addr - pb->addr;
9057 static bfd_boolean xtensa_make_cached_fixup (cached_fixupS *o, fixS *fixP)
9059 xtensa_isa isa = xtensa_default_isa;
9060 int addr = fixP->fx_frag->fr_address;
9063 symbolS *s = fixP->fx_addsy;
9066 xtensa_opcode opcode;
9068 if (fixP->fx_r_type < BFD_RELOC_XTENSA_SLOT0_OP ||
9069 fixP->fx_r_type > BFD_RELOC_XTENSA_SLOT14_OP)
9071 target = S_GET_VALUE (s);
9072 delta = target - addr;
9074 if (abs(delta) < J_RANGE / 2)
9077 xtensa_insnbuf_from_chars (isa, trampoline_buf,
9078 (unsigned char *) fixP->fx_frag->fr_literal +
9080 fmt = xtensa_format_decode (isa, trampoline_buf);
9081 gas_assert (fmt != XTENSA_UNDEFINED);
9082 slot = fixP->tc_fix_data.slot;
9083 xtensa_format_get_slot (isa, fmt, slot, trampoline_buf, trampoline_slotbuf);
9084 opcode = xtensa_opcode_decode (isa, fmt, slot, trampoline_slotbuf);
9085 if (opcode != xtensa_j_opcode)
9096 static void xtensa_realloc_fixup_cache (fixup_cacheS *cache, unsigned add)
9098 if (cache->n_fixups + add > cache->n_max)
9100 cache->n_max = (cache->n_fixups + add) * 2;
9101 cache->fixups = XRESIZEVEC (cached_fixupS, cache->fixups, cache->n_max);
9105 static void xtensa_cache_relaxable_fixups (fixup_cacheS *cache,
9106 segment_info_type *seginfo)
9110 cache->n_fixups = 0;
9112 for (fixP = seginfo->fix_root; fixP ; fixP = fixP->fx_next)
9114 xtensa_realloc_fixup_cache (cache, 1);
9116 if (xtensa_make_cached_fixup (cache->fixups + cache->n_fixups, fixP))
9119 qsort (cache->fixups, cache->n_fixups, sizeof (*cache->fixups), fixup_order);
9122 static unsigned xtensa_find_first_cached_fixup (const fixup_cacheS *cache,
9126 unsigned b = cache->n_fixups;
9130 unsigned c = (a + b) / 2;
9132 if (cache->fixups[c].addr < addr)
9140 static void xtensa_delete_cached_fixup (fixup_cacheS *cache, unsigned i)
9142 memmove (cache->fixups + i, cache->fixups + i + 1,
9143 (cache->n_fixups - i - 1) * sizeof (*cache->fixups));
9147 static bfd_boolean xtensa_add_cached_fixup (fixup_cacheS *cache, fixS *fixP)
9152 if (!xtensa_make_cached_fixup (&o, fixP))
9154 xtensa_realloc_fixup_cache (cache, 1);
9155 i = xtensa_find_first_cached_fixup (cache, o.addr);
9156 if (i < cache->n_fixups)
9159 memmove (cache->fixups + i + 1, cache->fixups + i,
9160 (cache->n_fixups - i) * sizeof (*cache->fixups));
9162 cache->fixups[i] = o;
9167 /* Return the number of bytes added to this fragment, given that the
9168 input has been stretched already by "stretch". */
9171 xtensa_relax_frag (fragS *fragP, long stretch, int *stretched_p)
9173 xtensa_isa isa = xtensa_default_isa;
9174 int unreported = fragP->tc_frag_data.unreported_expansion;
9175 long new_stretch = 0;
9176 const char *file_name;
9179 static xtensa_insnbuf vbuf = NULL;
9180 int slot, num_slots;
9183 file_name = as_where (&line);
9184 new_logical_line (fragP->fr_file, fragP->fr_line);
9186 fragP->tc_frag_data.unreported_expansion = 0;
9188 switch (fragP->fr_subtype)
9190 case RELAX_ALIGN_NEXT_OPCODE:
9191 /* Always convert. */
9192 if (fragP->tc_frag_data.relax_seen)
9193 new_stretch = relax_frag_loop_align (fragP, stretch);
9196 case RELAX_LOOP_END:
9200 case RELAX_LOOP_END_ADD_NOP:
9201 /* Add a NOP and switch to .fill 0. */
9202 new_stretch = relax_frag_add_nop (fragP);
9206 case RELAX_DESIRE_ALIGN:
9207 /* Do nothing. The narrowing before this frag will either align
9212 case RELAX_LITERAL_FINAL:
9215 case RELAX_LITERAL_NR:
9217 fragP->fr_subtype = RELAX_LITERAL_FINAL;
9218 gas_assert (unreported == lit_size);
9219 memset (&fragP->fr_literal[fragP->fr_fix], 0, 4);
9220 fragP->fr_var -= lit_size;
9221 fragP->fr_fix += lit_size;
9227 vbuf = xtensa_insnbuf_alloc (isa);
9229 xtensa_insnbuf_from_chars
9230 (isa, vbuf, (unsigned char *) fragP->fr_opcode, 0);
9231 fmt = xtensa_format_decode (isa, vbuf);
9232 num_slots = xtensa_format_num_slots (isa, fmt);
9234 for (slot = 0; slot < num_slots; slot++)
9236 switch (fragP->tc_frag_data.slot_subtypes[slot])
9239 if (fragP->tc_frag_data.relax_seen)
9240 new_stretch += relax_frag_for_align (fragP, stretch);
9244 case RELAX_IMMED_STEP1:
9245 case RELAX_IMMED_STEP2:
9246 case RELAX_IMMED_STEP3:
9247 /* Place the immediate. */
9248 new_stretch += relax_frag_immed
9249 (now_seg, fragP, stretch,
9250 fragP->tc_frag_data.slot_subtypes[slot] - RELAX_IMMED,
9251 fmt, slot, stretched_p, FALSE);
9255 /* This is OK; see the note in xg_assemble_vliw_tokens. */
9261 case RELAX_LITERAL_POOL_BEGIN:
9262 if (fragP->fr_var != 0)
9264 /* We have a converted "candidate" literal pool;
9265 assemble a jump around it. */
9267 if (!litpool_slotbuf)
9269 litpool_buf = xtensa_insnbuf_alloc (isa);
9270 litpool_slotbuf = xtensa_insnbuf_alloc (isa);
9273 fragP->tc_frag_data.relax_seen = FALSE; /* Need another pass. */
9274 fragP->tc_frag_data.is_insn = TRUE;
9276 insn.insn_type = ITYPE_INSN;
9277 insn.opcode = xtensa_j_opcode;
9279 set_expr_symbol_offset (&insn.tok[0], fragP->fr_symbol,
9281 fmt = xg_get_single_format (xtensa_j_opcode);
9282 tinsn_to_slotbuf (fmt, 0, &insn, litpool_slotbuf);
9283 xtensa_format_set_slot (isa, fmt, 0, litpool_buf, litpool_slotbuf);
9284 xtensa_insnbuf_to_chars (isa, litpool_buf,
9285 (unsigned char *)fragP->fr_literal +
9290 fix_new (fragP, 0, 3, fragP->fr_symbol, 0, TRUE,
9291 BFD_RELOC_XTENSA_SLOT0_OP);
9295 case RELAX_LITERAL_POOL_END:
9296 case RELAX_LITERAL_POOL_CANDIDATE_BEGIN:
9297 case RELAX_MAYBE_UNREACHABLE:
9298 case RELAX_MAYBE_DESIRE_ALIGN:
9299 /* No relaxation required. */
9302 case RELAX_FILL_NOP:
9303 case RELAX_UNREACHABLE:
9304 if (fragP->tc_frag_data.relax_seen)
9305 new_stretch += relax_frag_for_align (fragP, stretch);
9308 case RELAX_TRAMPOLINE:
9309 if (fragP->tc_frag_data.relax_seen)
9311 static fixup_cacheS fixup_cache;
9312 segment_info_type *seginfo = seg_info (now_seg);
9313 int trampaddr = fragP->fr_address + fragP->fr_fix;
9314 int searchaddr = trampaddr < J_RANGE ? 0 : trampaddr - J_RANGE;
9317 if (now_seg != fixup_cache.seg ||
9318 fragP == fixup_cache.first_frag ||
9319 fixup_cache.first_frag == NULL)
9321 xtensa_cache_relaxable_fixups (&fixup_cache, seginfo);
9322 fixup_cache.seg = now_seg;
9323 fixup_cache.first_frag = fragP;
9326 /* Scan for jumps that will not reach. */
9327 for (i = xtensa_find_first_cached_fixup (&fixup_cache, searchaddr);
9328 i < fixup_cache.n_fixups; ++i)
9331 fixS *fixP = fixup_cache.fixups[i].fixP;
9332 int target = fixup_cache.fixups[i].target;
9333 int addr = fixup_cache.fixups[i].addr;
9334 int delta = fixup_cache.fixups[i].delta + stretch;
9336 trampaddr = fragP->fr_address + fragP->fr_fix;
9338 if (addr + J_RANGE < trampaddr)
9340 if (addr > trampaddr + J_RANGE)
9342 if (abs (delta) < J_RANGE)
9345 slot = fixP->tc_fix_data.slot;
9347 if (delta > J_RANGE || delta < -1 * J_RANGE)
9348 { /* Found an out-of-range jump; scan the list of trampolines for the best match. */
9349 struct trampoline_seg *ts = find_trampoline_seg (now_seg);
9350 struct trampoline_frag *tf = ts->trampoline_list.next;
9351 struct trampoline_frag *prev = &ts->trampoline_list;
9352 int lower = (target < addr) ? target : addr;
9353 int upper = (target > addr) ? target : addr;
9354 int midpoint = lower + (upper - lower) / 2;
9356 if ((upper - lower) > 2 * J_RANGE)
9358 /* One trampoline won't suffice; we need multiple jumps.
9359 Jump to the trampoline that's farthest, but still in
9360 range relative to the original "j" instruction. */
9361 for ( ; tf; prev = tf, tf = tf->next )
9363 int this_addr = tf->fragP->fr_address + tf->fragP->fr_fix;
9364 int next_addr = (tf->next) ? tf->next->fragP->fr_address + tf->next->fragP->fr_fix : 0 ;
9369 if (this_addr - addr < J_RANGE)
9374 /* Backward jump. */
9375 if (next_addr == 0 || addr - next_addr > J_RANGE)
9382 struct trampoline_frag *best_tf = NULL;
9385 for ( ; tf; prev = tf, tf = tf->next )
9387 int this_addr = tf->fragP->fr_address + tf->fragP->fr_fix;
9388 int this_delta = abs (this_addr - midpoint);
9390 if (!best_tf || this_delta < best_delta)
9393 best_delta = this_delta;
9398 if (tf->fragP == fragP)
9400 if (abs (addr - trampaddr) < J_RANGE)
9401 { /* The trampoline is in range of original; fix it! */
9406 fragS *fP; /* The out-of-range jump. */
9408 new_stretch += init_trampoline_frag (tf);
9409 offset = fragP->fr_fix; /* Where to assemble the j insn. */
9410 lsym = fragP->fr_symbol;
9412 /* Assemble a jump to the target label here. */
9414 insn.insn_type = ITYPE_INSN;
9415 insn.opcode = xtensa_j_opcode;
9417 set_expr_symbol_offset (&insn.tok[0], lsym, offset);
9418 fmt = xg_get_single_format (xtensa_j_opcode);
9419 tinsn_to_slotbuf (fmt, 0, &insn, trampoline_slotbuf);
9420 xtensa_format_set_slot (isa, fmt, 0, trampoline_buf, trampoline_slotbuf);
9421 xtensa_insnbuf_to_chars (isa, trampoline_buf, (unsigned char *)fragP->fr_literal + offset, 3);
9424 /* Add a fix-up for the original j insn. */
9425 newfixP = fix_new (fP, fixP->fx_where, fixP->fx_size, lsym, fragP->fr_fix - 3, TRUE, fixP->fx_r_type);
9426 newfixP->fx_no_overflow = 1;
9427 newfixP->tc_fix_data.X_add_symbol = lsym;
9428 newfixP->tc_fix_data.X_add_number = offset;
9429 newfixP->tc_fix_data.slot = slot;
9431 xtensa_delete_cached_fixup (&fixup_cache, i);
9432 xtensa_add_cached_fixup (&fixup_cache, newfixP);
9434 /* Move the fix-up from the original j insn to this one. */
9435 fixP->fx_frag = fragP;
9436 fixP->fx_where = fragP->fr_fix - 3;
9438 fixP->tc_fix_data.slot = 0;
9439 fixP->fx_r_type = BFD_RELOC_XTENSA_SLOT0_OP;
9441 xtensa_add_cached_fixup (&fixup_cache, fixP);
9443 /* re-do current fixup */
9446 /* Adjust the jump around this trampoline (if present). */
9447 if (tf->fixP != NULL)
9449 tf->fixP->fx_offset += 3;
9452 fragP->tc_frag_data.relax_seen = FALSE; /* Need another pass. */
9453 /* Do we have room for more? */
9454 if (fragP->fr_var < 3)
9455 { /* No, convert to fill. */
9457 fragP->fr_subtype = 0;
9458 /* Remove from the trampoline_list. */
9459 prev->next = tf->next;
9460 if (fragP == fixup_cache.first_frag)
9461 fixup_cache.first_frag = NULL;
9472 as_bad (_("bad relaxation state"));
9475 /* Tell gas we need another relaxation pass. */
9476 if (! fragP->tc_frag_data.relax_seen)
9478 fragP->tc_frag_data.relax_seen = TRUE;
9482 new_logical_line (file_name, line);
9488 relax_frag_loop_align (fragS *fragP, long stretch)
9490 addressT old_address, old_next_address, old_size;
9491 addressT new_address, new_next_address, new_size;
9494 /* All the frags with relax_frag_for_alignment prior to this one in the
9495 section have been done, hopefully eliminating the need for a NOP here.
9496 But, this will put it in if necessary. */
9498 /* Calculate the old address of this fragment and the next fragment. */
9499 old_address = fragP->fr_address - stretch;
9500 old_next_address = (fragP->fr_address - stretch + fragP->fr_fix +
9501 fragP->tc_frag_data.text_expansion[0]);
9502 old_size = old_next_address - old_address;
9504 /* Calculate the new address of this fragment and the next fragment. */
9505 new_address = fragP->fr_address;
9507 get_noop_aligned_address (fragP, fragP->fr_address + fragP->fr_fix);
9508 new_size = new_next_address - new_address;
9510 growth = new_size - old_size;
9512 /* Fix up the text_expansion field and return the new growth. */
9513 fragP->tc_frag_data.text_expansion[0] += growth;
9518 /* Add a NOP instruction. */
9521 relax_frag_add_nop (fragS *fragP)
9523 char *nop_buf = fragP->fr_literal + fragP->fr_fix;
9524 int length = fragP->tc_frag_data.is_no_density ? 3 : 2;
9525 assemble_nop (length, nop_buf);
9526 fragP->tc_frag_data.is_insn = TRUE;
9528 if (fragP->fr_var < length)
9530 as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP->fr_var, length);
9534 fragP->fr_fix += length;
9535 fragP->fr_var -= length;
9540 static long future_alignment_required (fragS *, long);
9543 relax_frag_for_align (fragS *fragP, long stretch)
9545 /* Overview of the relaxation procedure for alignment:
9546 We can widen with NOPs or by widening instructions or by filling
9547 bytes after jump instructions. Find the opportune places and widen
9548 them if necessary. */
9553 gas_assert (fragP->fr_subtype == RELAX_FILL_NOP
9554 || fragP->fr_subtype == RELAX_UNREACHABLE
9555 || (fragP->fr_subtype == RELAX_SLOTS
9556 && fragP->tc_frag_data.slot_subtypes[0] == RELAX_NARROW));
9558 stretch_me = future_alignment_required (fragP, stretch);
9559 diff = stretch_me - fragP->tc_frag_data.text_expansion[0];
9565 /* We expanded on a previous pass. Can we shrink now? */
9566 long shrink = fragP->tc_frag_data.text_expansion[0] - stretch_me;
9567 if (shrink <= stretch && stretch > 0)
9569 fragP->tc_frag_data.text_expansion[0] = stretch_me;
9575 /* Below here, diff > 0. */
9576 fragP->tc_frag_data.text_expansion[0] = stretch_me;
9582 /* Return the address of the next frag that should be aligned.
9584 By "address" we mean the address it _would_ be at if there
9585 is no action taken to align it between here and the target frag.
9586 In other words, if no narrows and no fill nops are used between
9587 here and the frag to align, _even_if_ some of the frags we use
9588 to align targets have already expanded on a previous relaxation
9591 Also, count each frag that may be used to help align the target.
9593 Return 0 if there are no frags left in the chain that need to be
9597 find_address_of_next_align_frag (fragS **fragPP,
9601 bfd_boolean *paddable)
9603 fragS *fragP = *fragPP;
9604 addressT address = fragP->fr_address;
9606 /* Do not reset the counts to 0. */
9610 /* Limit this to a small search. */
9611 if (*widens >= (int) xtensa_fetch_width)
9616 address += fragP->fr_fix;
9618 if (fragP->fr_type == rs_fill)
9619 address += fragP->fr_offset * fragP->fr_var;
9620 else if (fragP->fr_type == rs_machine_dependent)
9622 switch (fragP->fr_subtype)
9624 case RELAX_UNREACHABLE:
9628 case RELAX_FILL_NOP:
9630 if (!fragP->tc_frag_data.is_no_density)
9635 if (fragP->tc_frag_data.slot_subtypes[0] == RELAX_NARROW)
9640 address += total_frag_text_expansion (fragP);
9644 address += fragP->tc_frag_data.text_expansion[0];
9647 case RELAX_ALIGN_NEXT_OPCODE:
9648 case RELAX_DESIRE_ALIGN:
9652 case RELAX_MAYBE_UNREACHABLE:
9653 case RELAX_MAYBE_DESIRE_ALIGN:
9658 /* Just punt if we don't know the type. */
9665 /* Just punt if we don't know the type. */
9669 fragP = fragP->fr_next;
9677 static long bytes_to_stretch (fragS *, int, int, int, int);
9680 future_alignment_required (fragS *fragP, long stretch ATTRIBUTE_UNUSED)
9682 fragS *this_frag = fragP;
9686 int narrow_nops = 0;
9687 bfd_boolean paddable = FALSE;
9688 offsetT local_opt_diff;
9691 int stretch_amount = 0;
9692 int local_stretch_amount;
9693 int global_stretch_amount;
9695 address = find_address_of_next_align_frag
9696 (&fragP, &wide_nops, &narrow_nops, &num_widens, &paddable);
9700 if (this_frag->tc_frag_data.is_aligning_branch)
9701 this_frag->tc_frag_data.slot_subtypes[0] = RELAX_IMMED;
9703 frag_wane (this_frag);
9707 local_opt_diff = get_aligned_diff (fragP, address, &max_diff);
9708 opt_diff = local_opt_diff;
9709 gas_assert (opt_diff >= 0);
9710 gas_assert (max_diff >= opt_diff);
9715 fragP = fragP->fr_next;
9717 while (fragP && opt_diff < max_diff && address)
9719 /* We only use these to determine if we can exit early
9720 because there will be plenty of ways to align future
9722 int glob_widens = 0;
9725 bfd_boolean glob_pad = 0;
9726 address = find_address_of_next_align_frag
9727 (&fragP, &glob_widens, &dnn, &dw, &glob_pad);
9728 /* If there is a padable portion, then skip. */
9729 if (glob_pad || glob_widens >= (1 << branch_align_power (now_seg)))
9734 offsetT next_m_diff;
9735 offsetT next_o_diff;
9737 /* Downrange frags haven't had stretch added to them yet. */
9740 /* The address also includes any text expansion from this
9741 frag in a previous pass, but we don't want that. */
9742 address -= this_frag->tc_frag_data.text_expansion[0];
9744 /* Assume we are going to move at least opt_diff. In
9745 reality, we might not be able to, but assuming that
9746 we will helps catch cases where moving opt_diff pushes
9747 the next target from aligned to unaligned. */
9748 address += opt_diff;
9750 next_o_diff = get_aligned_diff (fragP, address, &next_m_diff);
9752 /* Now cleanup for the adjustments to address. */
9753 next_o_diff += opt_diff;
9754 next_m_diff += opt_diff;
9755 if (next_o_diff <= max_diff && next_o_diff > opt_diff)
9756 opt_diff = next_o_diff;
9757 if (next_m_diff < max_diff)
9758 max_diff = next_m_diff;
9759 fragP = fragP->fr_next;
9763 /* If there are enough wideners in between, do it. */
9766 if (this_frag->fr_subtype == RELAX_UNREACHABLE)
9768 gas_assert (opt_diff <= (signed) xtensa_fetch_width);
9773 local_stretch_amount
9774 = bytes_to_stretch (this_frag, wide_nops, narrow_nops,
9775 num_widens, local_opt_diff);
9776 global_stretch_amount
9777 = bytes_to_stretch (this_frag, wide_nops, narrow_nops,
9778 num_widens, opt_diff);
9779 /* If the condition below is true, then the frag couldn't
9780 stretch the correct amount for the global case, so we just
9781 optimize locally. We'll rely on the subsequent frags to get
9782 the correct alignment in the global case. */
9783 if (global_stretch_amount < local_stretch_amount)
9784 stretch_amount = local_stretch_amount;
9786 stretch_amount = global_stretch_amount;
9788 if (this_frag->fr_subtype == RELAX_SLOTS
9789 && this_frag->tc_frag_data.slot_subtypes[0] == RELAX_NARROW)
9790 gas_assert (stretch_amount <= 1);
9791 else if (this_frag->fr_subtype == RELAX_FILL_NOP)
9793 if (this_frag->tc_frag_data.is_no_density)
9794 gas_assert (stretch_amount == 3 || stretch_amount == 0);
9796 gas_assert (stretch_amount <= 3);
9799 return stretch_amount;
9803 /* The idea: widen everything you can to get a target or loop aligned,
9804 then start using NOPs.
9806 wide_nops = the number of wide NOPs available for aligning
9807 narrow_nops = the number of narrow NOPs available for aligning
9808 (a subset of wide_nops)
9809 widens = the number of narrow instructions that should be widened
9814 bytes_to_stretch (fragS *this_frag,
9823 int bytes_short = desired_diff - num_widens;
9825 gas_assert (desired_diff >= 0
9826 && desired_diff < (signed) xtensa_fetch_width);
9827 if (desired_diff == 0)
9830 gas_assert (wide_nops > 0 || num_widens > 0);
9832 /* Always prefer widening to NOP-filling. */
9833 if (bytes_short < 0)
9835 /* There are enough RELAX_NARROW frags after this one
9836 to align the target without widening this frag in any way. */
9840 if (bytes_short == 0)
9842 /* Widen every narrow between here and the align target
9843 and the align target will be properly aligned. */
9844 if (this_frag->fr_subtype == RELAX_FILL_NOP)
9850 /* From here we will need at least one NOP to get an alignment.
9851 However, we may not be able to align at all, in which case,
9853 nops_needed = desired_diff / 3;
9855 /* If there aren't enough nops, don't widen. */
9856 if (nops_needed > wide_nops)
9859 /* First try it with all wide nops. */
9860 nop_bytes = nops_needed * 3;
9861 extra_bytes = desired_diff - nop_bytes;
9863 if (nop_bytes + num_widens >= desired_diff)
9865 if (this_frag->fr_subtype == RELAX_FILL_NOP)
9867 else if (num_widens == extra_bytes)
9872 /* Add a narrow nop. */
9876 if (narrow_nops == 0 || nops_needed > wide_nops)
9879 if (nop_bytes + num_widens >= desired_diff && extra_bytes >= 0)
9881 if (this_frag->fr_subtype == RELAX_FILL_NOP)
9882 return !this_frag->tc_frag_data.is_no_density ? 2 : 3;
9883 else if (num_widens == extra_bytes)
9888 /* Replace a wide nop with a narrow nop--we can get here if
9889 extra_bytes was negative in the previous conditional. */
9890 if (narrow_nops == 1)
9894 if (nop_bytes + num_widens >= desired_diff)
9896 if (this_frag->fr_subtype == RELAX_FILL_NOP)
9897 return !this_frag->tc_frag_data.is_no_density ? 2 : 3;
9898 else if (num_widens == extra_bytes)
9903 /* If we can't satisfy any of the above cases, then we can't align
9904 using padding or fill nops. */
9909 static struct trampoline_frag *
9910 search_trampolines (TInsn *tinsn, fragS *fragP, bfd_boolean unreachable_only)
9912 struct trampoline_seg *ts = find_trampoline_seg (now_seg);
9913 struct trampoline_frag *tf = (ts) ? ts->trampoline_list.next : NULL;
9914 struct trampoline_frag *best_tf = NULL;
9917 symbolS *sym = tinsn->tok[0].X_add_symbol;
9918 offsetT target = S_GET_VALUE (sym) + tinsn->tok[0].X_add_number;
9919 offsetT addr = fragP->fr_address;
9920 offsetT lower = (addr < target) ? addr : target;
9921 offsetT upper = (addr > target) ? addr : target;
9922 int delta = upper - lower;
9923 offsetT midpoint = lower + delta / 2;
9924 int this_delta = -1;
9927 if (delta > 2 * J_RANGE)
9929 /* One trampoline won't do; we need multiple.
9930 Choose the farthest trampoline that's still in range of the original
9931 and let a later pass finish the job. */
9932 for ( ; tf; tf = tf->next)
9934 int next_addr = (tf->next) ? tf->next->fragP->fr_address + tf->next->fragP->fr_fix : 0;
9936 this_addr = tf->fragP->fr_address + tf->fragP->fr_fix;
9940 if (this_addr - addr < J_RANGE)
9945 /* Backward jump. */
9946 if (next_addr == 0 || addr - next_addr > J_RANGE)
9950 if (abs (addr - this_addr) < J_RANGE)
9955 for ( ; tf; tf = tf->next)
9957 this_addr = tf->fragP->fr_address + tf->fragP->fr_fix;
9958 this_delta = abs (this_addr - midpoint);
9959 if (unreachable_only && tf->needs_jump_around)
9961 if (!best_tf || this_delta < best_delta)
9964 best_delta = this_delta;
9965 best_addr = this_addr;
9970 best_delta < J_RANGE &&
9971 abs(best_addr - lower) < J_RANGE &&
9972 abs(best_addr - upper) < J_RANGE)
9975 return NULL; /* No suitable trampoline found. */
9979 static struct trampoline_frag *
9980 get_best_trampoline (TInsn *tinsn, fragS *fragP)
9982 struct trampoline_frag *tf = NULL;
9984 tf = search_trampolines (tinsn, fragP, TRUE); /* Try unreachable first. */
9987 tf = search_trampolines (tinsn, fragP, FALSE); /* Try ones needing a jump-around, too. */
9994 check_and_update_trampolines (void)
9996 struct trampoline_seg *ts = find_trampoline_seg (now_seg);
9997 struct trampoline_frag *tf = ts->trampoline_list.next;
9998 struct trampoline_frag *prev = &ts->trampoline_list;
10000 for ( ; tf; prev = tf, tf = tf->next)
10002 if (tf->fragP->fr_var < 3)
10004 frag_wane (tf->fragP);
10005 prev->next = tf->next;
10013 init_trampoline_frag (struct trampoline_frag *trampP)
10015 fragS *fp = trampP->fragP;
10018 if (fp->fr_fix == 0)
10021 char label[10 + 2 * sizeof(fp)];
10022 sprintf (label, ".L0_TR_%p", fp);
10024 lsym = (symbolS *)local_symbol_make (label, now_seg, 0, fp);
10025 fp->fr_symbol = lsym;
10026 if (trampP->needs_jump_around)
10028 /* Add a jump around this block of jumps, in case
10029 control flows into this block. */
10033 xtensa_isa isa = xtensa_default_isa;
10035 fp->tc_frag_data.is_insn = 1;
10036 /* Assemble a jump insn. */
10037 tinsn_init (&insn);
10038 insn.insn_type = ITYPE_INSN;
10039 insn.opcode = xtensa_j_opcode;
10041 set_expr_symbol_offset (&insn.tok[0], lsym, 3);
10042 fmt = xg_get_single_format (xtensa_j_opcode);
10043 tinsn_to_slotbuf (fmt, 0, &insn, trampoline_slotbuf);
10044 xtensa_format_set_slot (isa, fmt, 0, trampoline_buf, trampoline_slotbuf);
10045 xtensa_insnbuf_to_chars (isa, trampoline_buf, (unsigned char *)fp->fr_literal, 3);
10049 fixP = fix_new (fp, 0, 3, lsym, 3, TRUE, BFD_RELOC_XTENSA_SLOT0_OP);
10050 trampP->fixP = fixP;
10058 add_jump_to_trampoline (struct trampoline_frag *trampP, fragS *origfrag)
10060 fragS *tramp = trampP->fragP;
10062 int offset = tramp->fr_fix; /* Where to assemble the j insn. */
10068 xtensa_isa isa = xtensa_default_isa;
10072 for (i = 0; i < MAX_SLOTS; ++i)
10073 if (origfrag->tc_frag_data.slot_symbols[i])
10075 gas_assert (slot == -1);
10079 gas_assert (slot >= 0 && slot < MAX_SLOTS);
10081 lsym = tramp->fr_symbol;
10082 /* Assemble a jump to the target label in the trampoline frag. */
10083 tsym = origfrag->tc_frag_data.slot_symbols[slot];
10084 toffset = origfrag-> tc_frag_data.slot_offsets[slot];
10085 tinsn_init (&insn);
10086 insn.insn_type = ITYPE_INSN;
10087 insn.opcode = xtensa_j_opcode;
10089 set_expr_symbol_offset (&insn.tok[0], tsym, toffset);
10090 fmt = xg_get_single_format (xtensa_j_opcode);
10091 tinsn_to_slotbuf (fmt, 0, &insn, trampoline_slotbuf);
10092 xtensa_format_set_slot (isa, fmt, 0, trampoline_buf, trampoline_slotbuf);
10093 xtensa_insnbuf_to_chars (isa, trampoline_buf, (unsigned char *)tramp->fr_literal + offset, 3);
10094 tramp->fr_fix += 3;
10095 tramp->fr_var -= 3;
10097 /* add a fix-up for the trampoline jump. */
10098 fixP = fix_new (tramp, tramp->fr_fix - 3, 3, tsym, toffset, TRUE, BFD_RELOC_XTENSA_SLOT0_OP);
10099 /* Modify the jump at the start of this trampoline to point past the newly-added jump. */
10100 fixP = trampP->fixP;
10102 fixP->fx_offset += 3;
10103 /* Modify the original j to point here. */
10104 origfrag->tc_frag_data.slot_symbols[slot] = lsym;
10105 origfrag->tc_frag_data.slot_offsets[slot] = tramp->fr_fix - 3;
10106 /* If trampoline is full, remove it from the list. */
10107 check_and_update_trampolines ();
10114 relax_frag_immed (segT segP,
10121 bfd_boolean estimate_only)
10125 bfd_boolean negatable_branch = FALSE;
10126 bfd_boolean branch_jmp_to_next = FALSE;
10127 bfd_boolean from_wide_insn = FALSE;
10128 xtensa_isa isa = xtensa_default_isa;
10130 offsetT frag_offset;
10132 int num_text_bytes, num_literal_bytes;
10133 int literal_diff, total_text_diff, this_text_diff;
10135 gas_assert (fragP->fr_opcode != NULL);
10137 xg_clear_vinsn (&cur_vinsn);
10138 vinsn_from_chars (&cur_vinsn, fragP->fr_opcode);
10139 if (cur_vinsn.num_slots > 1)
10140 from_wide_insn = TRUE;
10142 tinsn = cur_vinsn.slots[slot];
10143 tinsn_immed_from_frag (&tinsn, fragP, slot);
10145 if (estimate_only && xtensa_opcode_is_loop (isa, tinsn.opcode) == 1)
10148 if (workaround_b_j_loop_end && ! fragP->tc_frag_data.is_no_transform)
10149 branch_jmp_to_next = is_branch_jmp_to_next (&tinsn, fragP);
10151 negatable_branch = (xtensa_opcode_is_branch (isa, tinsn.opcode) == 1);
10153 old_size = xtensa_format_length (isa, fmt);
10155 /* Special case: replace a branch to the next instruction with a NOP.
10156 This is required to work around a hardware bug in T1040.0 and also
10157 serves as an optimization. */
10159 if (branch_jmp_to_next
10160 && ((old_size == 2) || (old_size == 3))
10161 && !next_frag_is_loop_target (fragP))
10164 /* Here is the fun stuff: Get the immediate field from this
10165 instruction. If it fits, we are done. If not, find the next
10166 instruction sequence that fits. */
10168 frag_offset = fragP->fr_opcode - fragP->fr_literal;
10169 istack_init (&istack);
10170 num_steps = xg_assembly_relax (&istack, &tinsn, segP, fragP, frag_offset,
10171 min_steps, stretch);
10172 gas_assert (num_steps >= min_steps && num_steps <= RELAX_IMMED_MAXSTEPS);
10174 fragP->tc_frag_data.slot_subtypes[slot] = (int) RELAX_IMMED + num_steps;
10176 /* Figure out the number of bytes needed. */
10177 num_literal_bytes = get_num_stack_literal_bytes (&istack);
10179 = num_literal_bytes - fragP->tc_frag_data.literal_expansion[slot];
10180 num_text_bytes = get_num_stack_text_bytes (&istack);
10182 if (from_wide_insn)
10185 while (istack.insn[first].opcode == XTENSA_UNDEFINED)
10188 num_text_bytes += old_size;
10189 if (opcode_fits_format_slot (istack.insn[first].opcode, fmt, slot))
10190 num_text_bytes -= xg_get_single_size (istack.insn[first].opcode);
10193 /* The first instruction in the relaxed sequence will go after
10194 the current wide instruction, and thus its symbolic immediates
10197 istack_init (&istack);
10198 num_steps = xg_assembly_relax (&istack, &tinsn, segP, fragP,
10199 frag_offset + old_size,
10200 min_steps, stretch + old_size);
10201 gas_assert (num_steps >= min_steps && num_steps <= RELAX_IMMED_MAXSTEPS);
10203 fragP->tc_frag_data.slot_subtypes[slot]
10204 = (int) RELAX_IMMED + num_steps;
10206 num_literal_bytes = get_num_stack_literal_bytes (&istack);
10208 = num_literal_bytes - fragP->tc_frag_data.literal_expansion[slot];
10210 num_text_bytes = get_num_stack_text_bytes (&istack) + old_size;
10214 total_text_diff = num_text_bytes - old_size;
10215 this_text_diff = total_text_diff - fragP->tc_frag_data.text_expansion[slot];
10217 /* It MUST get larger. If not, we could get an infinite loop. */
10218 gas_assert (num_text_bytes >= 0);
10219 gas_assert (literal_diff >= 0);
10220 gas_assert (total_text_diff >= 0);
10222 fragP->tc_frag_data.text_expansion[slot] = total_text_diff;
10223 fragP->tc_frag_data.literal_expansion[slot] = num_literal_bytes;
10224 gas_assert (fragP->tc_frag_data.text_expansion[slot] >= 0);
10225 gas_assert (fragP->tc_frag_data.literal_expansion[slot] >= 0);
10227 /* Find the associated expandable literal for this. */
10228 if (literal_diff != 0)
10230 fragS *lit_fragP = fragP->tc_frag_data.literal_frags[slot];
10233 gas_assert (literal_diff == 4);
10234 lit_fragP->tc_frag_data.unreported_expansion += literal_diff;
10236 /* We expect that the literal section state has NOT been
10238 gas_assert (lit_fragP->fr_type == rs_machine_dependent
10239 && lit_fragP->fr_subtype == RELAX_LITERAL);
10240 lit_fragP->fr_subtype = RELAX_LITERAL_NR;
10242 /* We need to mark this section for another iteration
10248 if (negatable_branch && istack.ninsn > 1)
10249 update_next_frag_state (fragP);
10251 /* If last insn is a jump, and it cannot reach its target, try to find a trampoline. */
10252 if (istack.ninsn > 2 &&
10253 istack.insn[istack.ninsn - 1].insn_type == ITYPE_LABEL &&
10254 istack.insn[istack.ninsn - 2].insn_type == ITYPE_INSN &&
10255 istack.insn[istack.ninsn - 2].opcode == xtensa_j_opcode)
10257 TInsn *jinsn = &istack.insn[istack.ninsn - 2];
10259 if (!xg_symbolic_immeds_fit (jinsn, segP, fragP, fragP->fr_offset, total_text_diff))
10261 struct trampoline_frag *tf = get_best_trampoline (jinsn, fragP);
10265 this_text_diff += init_trampoline_frag (tf);
10266 this_text_diff += add_jump_to_trampoline (tf, fragP);
10270 /* If target symbol is undefined, assume it will reach once linked. */
10271 expressionS *exp = &istack.insn[istack.ninsn - 2].tok[0];
10273 if (exp->X_op == O_symbol && S_IS_DEFINED (exp->X_add_symbol))
10275 as_bad_where (fragP->fr_file, fragP->fr_line,
10276 _("jump target out of range; no usable trampoline found"));
10282 return this_text_diff;
10286 /* md_convert_frag Hook and Helper Functions. */
10288 static void convert_frag_align_next_opcode (fragS *);
10289 static void convert_frag_narrow (segT, fragS *, xtensa_format, int);
10290 static void convert_frag_fill_nop (fragS *);
10291 static void convert_frag_immed (segT, fragS *, int, xtensa_format, int);
10294 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT sec, fragS *fragp)
10296 static xtensa_insnbuf vbuf = NULL;
10297 xtensa_isa isa = xtensa_default_isa;
10301 const char *file_name;
10304 file_name = as_where (&line);
10305 new_logical_line (fragp->fr_file, fragp->fr_line);
10307 switch (fragp->fr_subtype)
10309 case RELAX_ALIGN_NEXT_OPCODE:
10310 /* Always convert. */
10311 convert_frag_align_next_opcode (fragp);
10314 case RELAX_DESIRE_ALIGN:
10315 /* Do nothing. If not aligned already, too bad. */
10318 case RELAX_LITERAL:
10319 case RELAX_LITERAL_FINAL:
10324 vbuf = xtensa_insnbuf_alloc (isa);
10326 xtensa_insnbuf_from_chars
10327 (isa, vbuf, (unsigned char *) fragp->fr_opcode, 0);
10328 fmt = xtensa_format_decode (isa, vbuf);
10329 num_slots = xtensa_format_num_slots (isa, fmt);
10331 for (slot = 0; slot < num_slots; slot++)
10333 switch (fragp->tc_frag_data.slot_subtypes[slot])
10336 convert_frag_narrow (sec, fragp, fmt, slot);
10340 case RELAX_IMMED_STEP1:
10341 case RELAX_IMMED_STEP2:
10342 case RELAX_IMMED_STEP3:
10343 /* Place the immediate. */
10346 fragp->tc_frag_data.slot_subtypes[slot] - RELAX_IMMED,
10351 /* This is OK because some slots could have
10352 relaxations and others have none. */
10358 case RELAX_UNREACHABLE:
10359 memset (&fragp->fr_literal[fragp->fr_fix], 0, fragp->fr_var);
10360 fragp->fr_fix += fragp->tc_frag_data.text_expansion[0];
10361 fragp->fr_var -= fragp->tc_frag_data.text_expansion[0];
10365 case RELAX_MAYBE_UNREACHABLE:
10366 case RELAX_MAYBE_DESIRE_ALIGN:
10370 case RELAX_FILL_NOP:
10371 convert_frag_fill_nop (fragp);
10374 case RELAX_LITERAL_NR:
10375 if (use_literal_section)
10377 /* This should have been handled during relaxation. When
10378 relaxing a code segment, literals sometimes need to be
10379 added to the corresponding literal segment. If that
10380 literal segment has already been relaxed, then we end up
10381 in this situation. Marking the literal segments as data
10382 would make this happen less often (since GAS always relaxes
10383 code before data), but we could still get into trouble if
10384 there are instructions in a segment that is not marked as
10385 containing code. Until we can implement a better solution,
10386 cheat and adjust the addresses of all the following frags.
10387 This could break subsequent alignments, but the linker's
10388 literal coalescing will do that anyway. */
10391 fragp->fr_subtype = RELAX_LITERAL_FINAL;
10392 gas_assert (fragp->tc_frag_data.unreported_expansion == 4);
10393 memset (&fragp->fr_literal[fragp->fr_fix], 0, 4);
10394 fragp->fr_var -= 4;
10395 fragp->fr_fix += 4;
10396 for (f = fragp->fr_next; f; f = f->fr_next)
10397 f->fr_address += 4;
10400 as_bad (_("invalid relaxation fragment result"));
10403 case RELAX_TRAMPOLINE:
10408 new_logical_line (file_name, line);
10413 convert_frag_align_next_opcode (fragS *fragp)
10415 char *nop_buf; /* Location for Writing. */
10416 bfd_boolean use_no_density = fragp->tc_frag_data.is_no_density;
10417 addressT aligned_address;
10419 int nop, nop_count;
10421 aligned_address = get_noop_aligned_address (fragp, fragp->fr_address +
10423 fill_size = aligned_address - (fragp->fr_address + fragp->fr_fix);
10424 nop_count = get_text_align_nop_count (fill_size, use_no_density);
10425 nop_buf = fragp->fr_literal + fragp->fr_fix;
10427 for (nop = 0; nop < nop_count; nop++)
10430 nop_size = get_text_align_nth_nop_size (fill_size, nop, use_no_density);
10432 assemble_nop (nop_size, nop_buf);
10433 nop_buf += nop_size;
10436 fragp->fr_fix += fill_size;
10437 fragp->fr_var -= fill_size;
10442 convert_frag_narrow (segT segP, fragS *fragP, xtensa_format fmt, int slot)
10444 TInsn tinsn, single_target;
10445 int size, old_size, diff;
10446 offsetT frag_offset;
10448 gas_assert (slot == 0);
10449 tinsn_from_chars (&tinsn, fragP->fr_opcode, 0);
10451 if (fragP->tc_frag_data.is_aligning_branch == 1)
10453 gas_assert (fragP->tc_frag_data.text_expansion[0] == 1
10454 || fragP->tc_frag_data.text_expansion[0] == 0);
10455 convert_frag_immed (segP, fragP, fragP->tc_frag_data.text_expansion[0],
10460 if (fragP->tc_frag_data.text_expansion[0] == 0)
10462 /* No conversion. */
10467 gas_assert (fragP->fr_opcode != NULL);
10469 /* Frags in this relaxation state should only contain
10470 single instruction bundles. */
10471 tinsn_immed_from_frag (&tinsn, fragP, 0);
10473 /* Just convert it to a wide form.... */
10475 old_size = xg_get_single_size (tinsn.opcode);
10477 tinsn_init (&single_target);
10478 frag_offset = fragP->fr_opcode - fragP->fr_literal;
10480 if (! xg_is_single_relaxable_insn (&tinsn, &single_target, FALSE))
10482 as_bad (_("unable to widen instruction"));
10486 size = xg_get_single_size (single_target.opcode);
10487 xg_emit_insn_to_buf (&single_target, fragP->fr_opcode, fragP,
10488 frag_offset, TRUE);
10490 diff = size - old_size;
10491 gas_assert (diff >= 0);
10492 gas_assert (diff <= fragP->fr_var);
10493 fragP->fr_var -= diff;
10494 fragP->fr_fix += diff;
10502 convert_frag_fill_nop (fragS *fragP)
10504 char *loc = &fragP->fr_literal[fragP->fr_fix];
10505 int size = fragP->tc_frag_data.text_expansion[0];
10506 gas_assert ((unsigned) size == (fragP->fr_next->fr_address
10507 - fragP->fr_address - fragP->fr_fix));
10510 /* No conversion. */
10514 assemble_nop (size, loc);
10515 fragP->tc_frag_data.is_insn = TRUE;
10516 fragP->fr_var -= size;
10517 fragP->fr_fix += size;
10522 static fixS *fix_new_exp_in_seg
10523 (segT, subsegT, fragS *, int, int, expressionS *, int,
10524 bfd_reloc_code_real_type);
10525 static void convert_frag_immed_finish_loop (segT, fragS *, TInsn *);
10528 convert_frag_immed (segT segP,
10534 char *immed_instr = fragP->fr_opcode;
10536 bfd_boolean expanded = FALSE;
10537 bfd_boolean branch_jmp_to_next = FALSE;
10538 char *fr_opcode = fragP->fr_opcode;
10539 xtensa_isa isa = xtensa_default_isa;
10540 bfd_boolean from_wide_insn = FALSE;
10542 bfd_boolean is_loop;
10544 gas_assert (fr_opcode != NULL);
10546 xg_clear_vinsn (&cur_vinsn);
10548 vinsn_from_chars (&cur_vinsn, fr_opcode);
10549 if (cur_vinsn.num_slots > 1)
10550 from_wide_insn = TRUE;
10552 orig_tinsn = cur_vinsn.slots[slot];
10553 tinsn_immed_from_frag (&orig_tinsn, fragP, slot);
10555 is_loop = xtensa_opcode_is_loop (xtensa_default_isa, orig_tinsn.opcode) == 1;
10557 if (workaround_b_j_loop_end && ! fragP->tc_frag_data.is_no_transform)
10558 branch_jmp_to_next = is_branch_jmp_to_next (&orig_tinsn, fragP);
10560 if (branch_jmp_to_next && !next_frag_is_loop_target (fragP))
10562 /* Conversion just inserts a NOP and marks the fix as completed. */
10563 bytes = xtensa_format_length (isa, fmt);
10566 cur_vinsn.slots[slot].opcode =
10567 xtensa_format_slot_nop_opcode (isa, cur_vinsn.format, slot);
10568 cur_vinsn.slots[slot].ntok = 0;
10572 bytes += fragP->tc_frag_data.text_expansion[0];
10573 gas_assert (bytes == 2 || bytes == 3);
10574 build_nop (&cur_vinsn.slots[0], bytes);
10575 fragP->fr_fix += fragP->tc_frag_data.text_expansion[0];
10577 vinsn_to_insnbuf (&cur_vinsn, fr_opcode, frag_now, TRUE);
10578 xtensa_insnbuf_to_chars
10579 (isa, cur_vinsn.insnbuf, (unsigned char *) fr_opcode, 0);
10584 /* Here is the fun stuff: Get the immediate field from this
10585 instruction. If it fits, we're done. If not, find the next
10586 instruction sequence that fits. */
10590 symbolS *lit_sym = NULL;
10591 int total_size = 0;
10592 int target_offset = 0;
10595 symbolS *gen_label = NULL;
10596 offsetT frag_offset;
10597 bfd_boolean first = TRUE;
10599 /* It does not fit. Find something that does and
10600 convert immediately. */
10601 frag_offset = fr_opcode - fragP->fr_literal;
10602 istack_init (&istack);
10603 xg_assembly_relax (&istack, &orig_tinsn,
10604 segP, fragP, frag_offset, min_steps, 0);
10606 old_size = xtensa_format_length (isa, fmt);
10608 /* Assemble this right inline. */
10610 /* First, create the mapping from a label name to the REAL label. */
10612 for (i = 0; i < istack.ninsn; i++)
10614 TInsn *tinsn = &istack.insn[i];
10617 switch (tinsn->insn_type)
10619 case ITYPE_LITERAL:
10620 if (lit_sym != NULL)
10621 as_bad (_("multiple literals in expansion"));
10622 /* First find the appropriate space in the literal pool. */
10623 lit_frag = fragP->tc_frag_data.literal_frags[slot];
10624 if (lit_frag == NULL)
10625 as_bad (_("no registered fragment for literal"));
10626 if (tinsn->ntok != 1)
10627 as_bad (_("number of literal tokens != 1"));
10629 /* Set the literal symbol and add a fixup. */
10630 lit_sym = lit_frag->fr_symbol;
10634 if (align_targets && !is_loop)
10636 fragS *unreach = fragP->fr_next;
10637 while (!(unreach->fr_type == rs_machine_dependent
10638 && (unreach->fr_subtype == RELAX_MAYBE_UNREACHABLE
10639 || unreach->fr_subtype == RELAX_UNREACHABLE)))
10641 unreach = unreach->fr_next;
10644 gas_assert (unreach->fr_type == rs_machine_dependent
10645 && (unreach->fr_subtype == RELAX_MAYBE_UNREACHABLE
10646 || unreach->fr_subtype == RELAX_UNREACHABLE));
10648 target_offset += unreach->tc_frag_data.text_expansion[0];
10650 gas_assert (gen_label == NULL);
10651 gen_label = symbol_new (FAKE_LABEL_NAME, now_seg,
10652 fr_opcode - fragP->fr_literal
10653 + target_offset, fragP);
10657 if (first && from_wide_insn)
10659 target_offset += xtensa_format_length (isa, fmt);
10661 if (!opcode_fits_format_slot (tinsn->opcode, fmt, slot))
10662 target_offset += xg_get_single_size (tinsn->opcode);
10665 target_offset += xg_get_single_size (tinsn->opcode);
10672 for (i = 0; i < istack.ninsn; i++)
10674 TInsn *tinsn = &istack.insn[i];
10678 bfd_reloc_code_real_type reloc_type;
10680 switch (tinsn->insn_type)
10682 case ITYPE_LITERAL:
10683 lit_frag = fragP->tc_frag_data.literal_frags[slot];
10684 /* Already checked. */
10685 gas_assert (lit_frag != NULL);
10686 gas_assert (lit_sym != NULL);
10687 gas_assert (tinsn->ntok == 1);
10689 target_seg = S_GET_SEGMENT (lit_sym);
10690 gas_assert (target_seg);
10691 reloc_type = map_operator_to_reloc (tinsn->tok[0].X_op, TRUE);
10692 fix_new_exp_in_seg (target_seg, 0, lit_frag, 0, 4,
10693 &tinsn->tok[0], FALSE, reloc_type);
10700 xg_resolve_labels (tinsn, gen_label);
10701 xg_resolve_literals (tinsn, lit_sym);
10702 if (from_wide_insn && first)
10705 if (opcode_fits_format_slot (tinsn->opcode, fmt, slot))
10707 cur_vinsn.slots[slot] = *tinsn;
10711 cur_vinsn.slots[slot].opcode =
10712 xtensa_format_slot_nop_opcode (isa, fmt, slot);
10713 cur_vinsn.slots[slot].ntok = 0;
10715 vinsn_to_insnbuf (&cur_vinsn, immed_instr, fragP, TRUE);
10716 xtensa_insnbuf_to_chars (isa, cur_vinsn.insnbuf,
10717 (unsigned char *) immed_instr, 0);
10718 fragP->tc_frag_data.is_insn = TRUE;
10719 size = xtensa_format_length (isa, fmt);
10720 if (!opcode_fits_format_slot (tinsn->opcode, fmt, slot))
10722 xg_emit_insn_to_buf
10723 (tinsn, immed_instr + size, fragP,
10724 immed_instr - fragP->fr_literal + size, TRUE);
10725 size += xg_get_single_size (tinsn->opcode);
10730 size = xg_get_single_size (tinsn->opcode);
10731 xg_emit_insn_to_buf (tinsn, immed_instr, fragP,
10732 immed_instr - fragP->fr_literal, TRUE);
10734 immed_instr += size;
10735 total_size += size;
10740 diff = total_size - old_size;
10741 gas_assert (diff >= 0);
10744 gas_assert (diff <= fragP->fr_var);
10745 fragP->fr_var -= diff;
10746 fragP->fr_fix += diff;
10749 /* Check for undefined immediates in LOOP instructions. */
10753 sym = orig_tinsn.tok[1].X_add_symbol;
10754 if (sym != NULL && !S_IS_DEFINED (sym))
10756 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
10759 sym = orig_tinsn.tok[1].X_op_symbol;
10760 if (sym != NULL && !S_IS_DEFINED (sym))
10762 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
10767 if (expanded && xtensa_opcode_is_loop (isa, orig_tinsn.opcode) == 1)
10768 convert_frag_immed_finish_loop (segP, fragP, &orig_tinsn);
10770 if (expanded && is_direct_call_opcode (orig_tinsn.opcode))
10772 /* Add an expansion note on the expanded instruction. */
10773 fix_new_exp_in_seg (now_seg, 0, fragP, fr_opcode - fragP->fr_literal, 4,
10774 &orig_tinsn.tok[0], TRUE,
10775 BFD_RELOC_XTENSA_ASM_EXPAND);
10780 /* Add a new fix expression into the desired segment. We have to
10781 switch to that segment to do this. */
10784 fix_new_exp_in_seg (segT new_seg,
10785 subsegT new_subseg,
10791 bfd_reloc_code_real_type r_type)
10794 segT seg = now_seg;
10795 subsegT subseg = now_subseg;
10797 gas_assert (new_seg != 0);
10798 subseg_set (new_seg, new_subseg);
10800 new_fix = fix_new_exp (frag, where, size, exp, pcrel, r_type);
10801 subseg_set (seg, subseg);
10806 /* Relax a loop instruction so that it can span loop >256 bytes.
10812 addi as, as, lo8 (label-.L1)
10813 addmi as, as, mid8 (label-.L1)
10824 convert_frag_immed_finish_loop (segT segP, fragS *fragP, TInsn *tinsn)
10829 unsigned long target;
10830 static xtensa_insnbuf insnbuf = NULL;
10831 unsigned int loop_length, loop_length_hi, loop_length_lo;
10832 xtensa_isa isa = xtensa_default_isa;
10833 addressT loop_offset;
10834 addressT addi_offset = 9;
10835 addressT addmi_offset = 12;
10840 insnbuf = xtensa_insnbuf_alloc (isa);
10842 /* Get the loop offset. */
10843 loop_offset = get_expanded_loop_offset (tinsn->opcode);
10845 /* Validate that there really is a LOOP at the loop_offset. Because
10846 loops are not bundleable, we can assume that the instruction will be
10848 tinsn_from_chars (&loop_insn, fragP->fr_opcode + loop_offset, 0);
10849 tinsn_immed_from_frag (&loop_insn, fragP, 0);
10851 gas_assert (xtensa_opcode_is_loop (isa, loop_insn.opcode) == 1);
10852 addi_offset += loop_offset;
10853 addmi_offset += loop_offset;
10855 gas_assert (tinsn->ntok == 2);
10856 if (tinsn->tok[1].X_op == O_constant)
10857 target = tinsn->tok[1].X_add_number;
10858 else if (tinsn->tok[1].X_op == O_symbol)
10860 /* Find the fragment. */
10861 symbolS *sym = tinsn->tok[1].X_add_symbol;
10862 gas_assert (S_GET_SEGMENT (sym) == segP
10863 || S_GET_SEGMENT (sym) == absolute_section);
10864 target = (S_GET_VALUE (sym) + tinsn->tok[1].X_add_number);
10868 as_bad (_("invalid expression evaluation type %d"), tinsn->tok[1].X_op);
10872 loop_length = target - (fragP->fr_address + fragP->fr_fix);
10873 loop_length_hi = loop_length & ~0x0ff;
10874 loop_length_lo = loop_length & 0x0ff;
10875 if (loop_length_lo >= 128)
10877 loop_length_lo -= 256;
10878 loop_length_hi += 256;
10881 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
10882 32512. If the loop is larger than that, then we just fail. */
10883 if (loop_length_hi > 32512)
10884 as_bad_where (fragP->fr_file, fragP->fr_line,
10885 _("loop too long for LOOP instruction"));
10887 tinsn_from_chars (&addi_insn, fragP->fr_opcode + addi_offset, 0);
10888 gas_assert (addi_insn.opcode == xtensa_addi_opcode);
10890 tinsn_from_chars (&addmi_insn, fragP->fr_opcode + addmi_offset, 0);
10891 gas_assert (addmi_insn.opcode == xtensa_addmi_opcode);
10893 set_expr_const (&addi_insn.tok[2], loop_length_lo);
10894 tinsn_to_insnbuf (&addi_insn, insnbuf);
10896 fragP->tc_frag_data.is_insn = TRUE;
10897 xtensa_insnbuf_to_chars
10898 (isa, insnbuf, (unsigned char *) fragP->fr_opcode + addi_offset, 0);
10900 set_expr_const (&addmi_insn.tok[2], loop_length_hi);
10901 tinsn_to_insnbuf (&addmi_insn, insnbuf);
10902 xtensa_insnbuf_to_chars
10903 (isa, insnbuf, (unsigned char *) fragP->fr_opcode + addmi_offset, 0);
10905 /* Walk through all of the frags from here to the loop end
10906 and mark them as no_transform to keep them from being modified
10907 by the linker. If we ever have a relocation for the
10908 addi/addmi of the difference of two symbols we can remove this. */
10911 for (next_fragP = fragP; next_fragP != NULL;
10912 next_fragP = next_fragP->fr_next)
10914 next_fragP->tc_frag_data.is_no_transform = TRUE;
10915 if (next_fragP->tc_frag_data.is_loop_target)
10917 if (target_count == 2)
10923 /* A map that keeps information on a per-subsegment basis. This is
10924 maintained during initial assembly, but is invalid once the
10925 subsegments are smashed together. I.E., it cannot be used during
10928 typedef struct subseg_map_struct
10936 float total_freq; /* fall-through + branch target frequency */
10937 float target_freq; /* branch target frequency alone */
10939 struct subseg_map_struct *next;
10943 static subseg_map *sseg_map = NULL;
10945 static subseg_map *
10946 get_subseg_info (segT seg, subsegT subseg)
10948 subseg_map *subseg_e;
10950 for (subseg_e = sseg_map; subseg_e; subseg_e = subseg_e->next)
10952 if (seg == subseg_e->seg && subseg == subseg_e->subseg)
10959 static subseg_map *
10960 add_subseg_info (segT seg, subsegT subseg)
10962 subseg_map *subseg_e = XNEW (subseg_map);
10963 memset (subseg_e, 0, sizeof (subseg_map));
10964 subseg_e->seg = seg;
10965 subseg_e->subseg = subseg;
10966 subseg_e->flags = 0;
10967 /* Start off considering every branch target very important. */
10968 subseg_e->target_freq = 1.0;
10969 subseg_e->total_freq = 1.0;
10970 subseg_e->next = sseg_map;
10971 sseg_map = subseg_e;
10977 get_last_insn_flags (segT seg, subsegT subseg)
10979 subseg_map *subseg_e = get_subseg_info (seg, subseg);
10981 return subseg_e->flags;
10987 set_last_insn_flags (segT seg,
10992 subseg_map *subseg_e = get_subseg_info (seg, subseg);
10994 subseg_e = add_subseg_info (seg, subseg);
10996 subseg_e->flags |= fl;
10998 subseg_e->flags &= ~fl;
11003 get_subseg_total_freq (segT seg, subsegT subseg)
11005 subseg_map *subseg_e = get_subseg_info (seg, subseg);
11007 return subseg_e->total_freq;
11013 get_subseg_target_freq (segT seg, subsegT subseg)
11015 subseg_map *subseg_e = get_subseg_info (seg, subseg);
11017 return subseg_e->target_freq;
11023 set_subseg_freq (segT seg, subsegT subseg, float total_f, float target_f)
11025 subseg_map *subseg_e = get_subseg_info (seg, subseg);
11027 subseg_e = add_subseg_info (seg, subseg);
11028 subseg_e->total_freq = total_f;
11029 subseg_e->target_freq = target_f;
11033 /* Segment Lists and emit_state Stuff. */
11036 xtensa_move_seg_list_to_beginning (seg_list *head)
11041 segT literal_section = head->seg;
11043 /* Move the literal section to the front of the section list. */
11044 gas_assert (literal_section);
11045 if (literal_section != stdoutput->sections)
11047 bfd_section_list_remove (stdoutput, literal_section);
11048 bfd_section_list_prepend (stdoutput, literal_section);
11055 static void mark_literal_frags (seg_list *);
11058 xg_promote_candidate_litpool (struct litpool_seg *lps,
11059 struct litpool_frag *lp)
11064 char label[10 + 2 * sizeof (fragS *)];
11066 poolbeg = lp->fragP;
11068 poolbeg->fr_subtype = RELAX_LITERAL_POOL_BEGIN;
11069 poolend = poolbeg->fr_next;
11070 gas_assert (poolend->fr_type == rs_machine_dependent &&
11071 poolend->fr_subtype == RELAX_LITERAL_POOL_END);
11072 /* Create a local symbol pointing to the
11073 end of the pool. */
11074 sprintf (label, ".L0_LT_%p", poolbeg);
11075 lsym = (symbolS *)local_symbol_make (label, lps->seg,
11077 poolbeg->fr_symbol = lsym;
11078 /* Rest is done in xtensa_relax_frag. */
11082 xtensa_move_literals (void)
11085 frchainS *frchain_from, *frchain_to;
11086 fragS *search_frag, *next_frag, *literal_pool, *insert_after;
11087 fragS **frag_splice;
11090 fixS *fix, *next_fix, **fix_splice;
11092 struct litpool_seg *lps;
11093 const char *init_name = INIT_SECTION_NAME;
11094 const char *fini_name = FINI_SECTION_NAME;
11095 int init_name_len = strlen(init_name);
11096 int fini_name_len = strlen(fini_name);
11098 mark_literal_frags (literal_head->next);
11100 if (use_literal_section)
11103 /* Assign addresses (rough estimates) to the potential literal pool locations
11104 and create new ones if the gaps are too large. */
11106 for (lps = litpool_seg_list.next; lps; lps = lps->next)
11108 frchainS *frchP = seg_info (lps->seg)->frchainP;
11109 struct litpool_frag *lpf = lps->frag_list.next;
11112 for ( ; frchP; frchP = frchP->frch_next)
11115 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
11117 if (lpf && fragP == lpf->fragP)
11119 gas_assert(fragP->fr_type == rs_machine_dependent &&
11120 (fragP->fr_subtype == RELAX_LITERAL_POOL_BEGIN ||
11121 fragP->fr_subtype == RELAX_LITERAL_POOL_CANDIDATE_BEGIN));
11122 /* Found a litpool location. */
11126 if (fragP->fr_type == rs_machine_dependent &&
11127 fragP->fr_subtype == RELAX_SLOTS)
11130 for (slot = 0; slot < MAX_SLOTS; slot++)
11132 if (fragP->tc_frag_data.literal_frags[slot])
11134 /* L32R; point its literal to the nearest litpool
11135 preferring non-"candidate" positions to avoid
11136 the jump-around. */
11137 fragS *litfrag = fragP->tc_frag_data.literal_frags[slot];
11138 struct litpool_frag *lp = lpf->prev;
11143 while (lp->fragP->fr_subtype ==
11144 RELAX_LITERAL_POOL_CANDIDATE_BEGIN)
11147 if (lp->fragP == NULL)
11149 /* End of list; have to bite the bullet.
11150 Take the nearest. */
11154 /* Does it (conservatively) reach? */
11155 if (addr - lp->addr <= 128 * 1024)
11157 if (lp->fragP->fr_subtype == RELAX_LITERAL_POOL_BEGIN)
11159 /* Found a good one. */
11162 else if (lp->prev->fragP &&
11163 addr - lp->prev->addr > 128 * 1024)
11165 /* This is still a "candidate" but the next one
11166 will be too far away, so revert to the nearest
11167 one, convert it and add the jump around. */
11174 /* Convert candidate and add the jump around. */
11175 if (lp->fragP->fr_subtype ==
11176 RELAX_LITERAL_POOL_CANDIDATE_BEGIN)
11177 xg_promote_candidate_litpool (lps, lp);
11179 if (! litfrag->tc_frag_data.literal_frag)
11181 /* Take earliest use of this literal to avoid
11183 litfrag->tc_frag_data.literal_frag = lp->fragP;
11188 addr += fragP->fr_fix;
11189 if (fragP->fr_type == rs_fill)
11190 addr += fragP->fr_offset;
11195 for (segment = literal_head->next; segment; segment = segment->next)
11197 const char *seg_name = segment_name (segment->seg);
11199 /* Keep the literals for .init and .fini in separate sections. */
11200 if ((!memcmp (seg_name, init_name, init_name_len) &&
11201 !strcmp (seg_name + init_name_len, ".literal")) ||
11202 (!memcmp (seg_name, fini_name, fini_name_len) &&
11203 !strcmp (seg_name + fini_name_len, ".literal")))
11206 frchain_from = seg_info (segment->seg)->frchainP;
11207 search_frag = frchain_from->frch_root;
11208 literal_pool = NULL;
11210 frag_splice = &(frchain_from->frch_root);
11212 while (search_frag && !search_frag->tc_frag_data.literal_frag)
11214 gas_assert (search_frag->fr_fix == 0
11215 || search_frag->fr_type == rs_align);
11216 search_frag = search_frag->fr_next;
11221 search_frag = frchain_from->frch_root;
11222 as_bad_where (search_frag->fr_file, search_frag->fr_line,
11223 _("literal pool location required for text-section-literals; specify with .literal_position"));
11227 gas_assert (search_frag->tc_frag_data.literal_frag->fr_subtype
11228 == RELAX_LITERAL_POOL_BEGIN);
11229 xtensa_switch_section_emit_state (&state, segment->seg, 0);
11231 /* Make sure that all the frags in this series are closed, and
11232 that there is at least one left over of zero-size. This
11233 prevents us from making a segment with an frchain without any
11235 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
11236 xtensa_set_frag_assembly_state (frag_now);
11237 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
11238 xtensa_set_frag_assembly_state (frag_now);
11240 while (search_frag != frag_now)
11242 next_frag = search_frag->fr_next;
11243 if (search_frag->tc_frag_data.literal_frag)
11245 literal_pool = search_frag->tc_frag_data.literal_frag;
11246 gas_assert (literal_pool->fr_subtype == RELAX_LITERAL_POOL_BEGIN);
11247 frchain_to = literal_pool->tc_frag_data.lit_frchain;
11248 gas_assert (frchain_to);
11251 if (search_frag->fr_type == rs_fill && search_frag->fr_fix == 0)
11253 /* Skip empty fill frags. */
11254 *frag_splice = next_frag;
11255 search_frag = next_frag;
11259 if (search_frag->fr_type == rs_align)
11261 /* Skip alignment frags, because the pool as a whole will be
11262 aligned if used, and we don't want to force alignment if the
11264 *frag_splice = next_frag;
11265 search_frag = next_frag;
11269 /* First, move the frag out of the literal section and
11270 to the appropriate place. */
11272 /* Insert an alignment frag at start of pool. */
11273 if (literal_pool->fr_next->fr_type == rs_machine_dependent &&
11274 literal_pool->fr_next->fr_subtype == RELAX_LITERAL_POOL_END)
11276 segT pool_seg = literal_pool->fr_next->tc_frag_data.lit_seg;
11277 emit_state prev_state;
11280 xtensa_switch_section_emit_state (&prev_state, pool_seg, 0);
11281 prev_frag = frag_now;
11282 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
11283 align_frag = frag_now;
11284 frag_align (2, 0, 0);
11285 /* Splice it into the right place. */
11286 prev_frag->fr_next = align_frag->fr_next;
11287 align_frag->fr_next = literal_pool->fr_next;
11288 literal_pool->fr_next = align_frag;
11289 /* Insert after this one. */
11290 literal_pool->tc_frag_data.literal_frag = align_frag;
11291 xtensa_restore_emit_state (&prev_state);
11293 insert_after = literal_pool->tc_frag_data.literal_frag;
11294 dest_seg = insert_after->fr_next->tc_frag_data.lit_seg;
11295 /* Skip align frag. */
11296 if (insert_after->fr_next->fr_type == rs_align)
11298 insert_after = insert_after->fr_next;
11301 *frag_splice = next_frag;
11302 search_frag->fr_next = insert_after->fr_next;
11303 insert_after->fr_next = search_frag;
11304 search_frag->tc_frag_data.lit_seg = dest_seg;
11305 literal_pool->tc_frag_data.literal_frag = search_frag;
11307 /* Now move any fixups associated with this frag to the
11309 fix = frchain_from->fix_root;
11310 fix_splice = &(frchain_from->fix_root);
11313 next_fix = fix->fx_next;
11314 if (fix->fx_frag == search_frag)
11316 *fix_splice = next_fix;
11317 fix->fx_next = frchain_to->fix_root;
11318 frchain_to->fix_root = fix;
11319 if (frchain_to->fix_tail == NULL)
11320 frchain_to->fix_tail = fix;
11323 fix_splice = &(fix->fx_next);
11326 search_frag = next_frag;
11329 if (frchain_from->fix_root != NULL)
11331 frchain_from = seg_info (segment->seg)->frchainP;
11332 as_warn (_("fixes not all moved from %s"), segment->seg->name);
11334 gas_assert (frchain_from->fix_root == NULL);
11336 frchain_from->fix_tail = NULL;
11337 xtensa_restore_emit_state (&state);
11340 /* Now fix up the SEGMENT value for all the literal symbols. */
11341 for (lit = literal_syms; lit; lit = lit->next)
11343 symbolS *lit_sym = lit->sym;
11344 segT dseg = symbol_get_frag (lit_sym)->tc_frag_data.lit_seg;
11346 S_SET_SEGMENT (lit_sym, dseg);
11351 /* Walk over all the frags for segments in a list and mark them as
11352 containing literals. As clunky as this is, we can't rely on frag_var
11353 and frag_variant to get called in all situations. */
11356 mark_literal_frags (seg_list *segment)
11358 frchainS *frchain_from;
11359 fragS *search_frag;
11363 frchain_from = seg_info (segment->seg)->frchainP;
11364 search_frag = frchain_from->frch_root;
11365 while (search_frag)
11367 search_frag->tc_frag_data.is_literal = TRUE;
11368 search_frag = search_frag->fr_next;
11370 segment = segment->next;
11376 xtensa_reorder_seg_list (seg_list *head, segT after)
11378 /* Move all of the sections in the section list to come
11379 after "after" in the gnu segment list. */
11384 segT literal_section = head->seg;
11386 /* Move the literal section after "after". */
11387 gas_assert (literal_section);
11388 if (literal_section != after)
11390 bfd_section_list_remove (stdoutput, literal_section);
11391 bfd_section_list_insert_after (stdoutput, after, literal_section);
11399 /* Push all the literal segments to the end of the gnu list. */
11402 xtensa_reorder_segments (void)
11409 for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
11415 /* Now that we have the last section, push all the literal
11416 sections to the end. */
11417 xtensa_reorder_seg_list (literal_head, last_sec);
11419 /* Now perform the final error check. */
11420 for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
11422 gas_assert (new_count == old_count);
11426 /* Change the emit state (seg, subseg, and frag related stuff) to the
11427 correct location. Return a emit_state which can be passed to
11428 xtensa_restore_emit_state to return to current fragment. */
11431 xtensa_switch_to_literal_fragment (emit_state *result)
11433 if (directive_state[directive_absolute_literals])
11435 segT lit4_seg = cache_literal_section (TRUE);
11436 xtensa_switch_section_emit_state (result, lit4_seg, 0);
11439 xtensa_switch_to_non_abs_literal_fragment (result);
11441 /* Do a 4-byte align here. */
11442 frag_align (2, 0, 0);
11443 record_alignment (now_seg, 2);
11448 xtensa_switch_to_non_abs_literal_fragment (emit_state *result)
11450 fragS *pool_location = get_literal_pool_location (now_seg);
11452 bfd_boolean is_init =
11453 (now_seg && !strcmp (segment_name (now_seg), INIT_SECTION_NAME));
11454 bfd_boolean is_fini =
11455 (now_seg && !strcmp (segment_name (now_seg), FINI_SECTION_NAME));
11457 if (pool_location == NULL
11458 && !use_literal_section
11459 && !is_init && ! is_fini)
11461 if (!auto_litpools)
11463 as_bad (_("literal pool location required for text-section-literals; specify with .literal_position"));
11465 xtensa_maybe_create_literal_pool_frag (TRUE, TRUE);
11466 pool_location = get_literal_pool_location (now_seg);
11469 lit_seg = cache_literal_section (FALSE);
11470 xtensa_switch_section_emit_state (result, lit_seg, 0);
11472 if (!use_literal_section
11473 && !is_init && !is_fini
11474 && get_literal_pool_location (now_seg) != pool_location)
11476 /* Close whatever frag is there. */
11477 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
11478 xtensa_set_frag_assembly_state (frag_now);
11479 frag_now->tc_frag_data.literal_frag = pool_location;
11480 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
11481 xtensa_set_frag_assembly_state (frag_now);
11486 /* Call this function before emitting data into the literal section.
11487 This is a helper function for xtensa_switch_to_literal_fragment.
11488 This is similar to a .section new_now_seg subseg. */
11491 xtensa_switch_section_emit_state (emit_state *state,
11493 subsegT new_now_subseg)
11495 state->name = now_seg->name;
11496 state->now_seg = now_seg;
11497 state->now_subseg = now_subseg;
11498 state->generating_literals = generating_literals;
11499 generating_literals++;
11500 subseg_set (new_now_seg, new_now_subseg);
11504 /* Use to restore the emitting into the normal place. */
11507 xtensa_restore_emit_state (emit_state *state)
11509 generating_literals = state->generating_literals;
11510 subseg_set (state->now_seg, state->now_subseg);
11514 /* Predicate function used to look up a section in a particular group. */
11517 match_section_group (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, void *inf)
11519 const char *gname = inf;
11520 const char *group_name = elf_group_name (sec);
11522 return (group_name == gname
11523 || (group_name != NULL
11525 && strcmp (group_name, gname) == 0));
11529 /* Get the literal section to be used for the current text section.
11530 The result may be cached in the default_lit_sections structure. */
11533 cache_literal_section (bfd_boolean use_abs_literals)
11535 const char *text_name, *group_name = 0;
11536 const char *base_name, *suffix;
11539 segT seg, current_section;
11540 int current_subsec;
11541 bfd_boolean linkonce = FALSE;
11543 /* Save the current section/subsection. */
11544 current_section = now_seg;
11545 current_subsec = now_subseg;
11547 /* Clear the cached values if they are no longer valid. */
11548 if (now_seg != default_lit_sections.current_text_seg)
11550 default_lit_sections.current_text_seg = now_seg;
11551 default_lit_sections.lit_seg = NULL;
11552 default_lit_sections.lit4_seg = NULL;
11555 /* Check if the literal section is already cached. */
11556 if (use_abs_literals)
11557 pcached = &default_lit_sections.lit4_seg;
11559 pcached = &default_lit_sections.lit_seg;
11564 text_name = default_lit_sections.lit_prefix;
11565 if (! text_name || ! *text_name)
11567 text_name = segment_name (current_section);
11568 group_name = elf_group_name (current_section);
11569 linkonce = (current_section->flags & SEC_LINK_ONCE) != 0;
11572 base_name = use_abs_literals ? ".lit4" : ".literal";
11575 name = concat (base_name, ".", group_name, (char *) NULL);
11577 else if (strncmp (text_name, ".gnu.linkonce.", linkonce_len) == 0)
11579 suffix = strchr (text_name + linkonce_len, '.');
11581 name = concat (".gnu.linkonce", base_name, suffix ? suffix : "",
11587 /* If the section name begins or ends with ".text", then replace
11588 that portion instead of appending an additional suffix. */
11589 size_t len = strlen (text_name);
11591 && (strcmp (text_name + len - 5, ".text") == 0
11592 || strncmp (text_name, ".text", 5) == 0))
11595 name = XNEWVEC (char, len + strlen (base_name) + 1);
11596 if (strncmp (text_name, ".text", 5) == 0)
11598 strcpy (name, base_name);
11599 strcat (name, text_name + 5);
11603 strcpy (name, text_name);
11604 strcpy (name + len, base_name);
11608 /* Canonicalize section names to allow renaming literal sections.
11609 The group name, if any, came from the current text section and
11610 has already been canonicalized. */
11611 name = tc_canonicalize_symbol_name (name);
11613 seg = bfd_get_section_by_name_if (stdoutput, name, match_section_group,
11614 (void *) group_name);
11619 seg = subseg_force_new (name, 0);
11621 if (! use_abs_literals)
11623 /* Add the newly created literal segment to the list. */
11624 seg_list *n = XNEW (seg_list);
11626 n->next = literal_head->next;
11627 literal_head->next = n;
11630 flags = (SEC_HAS_CONTENTS | SEC_READONLY | SEC_ALLOC | SEC_LOAD
11631 | (linkonce ? (SEC_LINK_ONCE | SEC_LINK_DUPLICATES_DISCARD) : 0)
11632 | (use_abs_literals ? SEC_DATA : SEC_CODE));
11634 elf_group_name (seg) = group_name;
11636 bfd_set_section_flags (stdoutput, seg, flags);
11637 bfd_set_section_alignment (stdoutput, seg, 2);
11641 subseg_set (current_section, current_subsec);
11646 /* Property Tables Stuff. */
11648 #define XTENSA_INSN_SEC_NAME ".xt.insn"
11649 #define XTENSA_LIT_SEC_NAME ".xt.lit"
11650 #define XTENSA_PROP_SEC_NAME ".xt.prop"
11652 typedef bfd_boolean (*frag_predicate) (const fragS *);
11653 typedef void (*frag_flags_fn) (const fragS *, frag_flags *);
11655 static bfd_boolean get_frag_is_literal (const fragS *);
11656 static void xtensa_create_property_segments
11657 (frag_predicate, frag_predicate, const char *, xt_section_type);
11658 static void xtensa_create_xproperty_segments
11659 (frag_flags_fn, const char *, xt_section_type);
11660 static bfd_boolean exclude_section_from_property_tables (segT);
11661 static bfd_boolean section_has_property (segT, frag_predicate);
11662 static bfd_boolean section_has_xproperty (segT, frag_flags_fn);
11663 static void add_xt_block_frags
11664 (segT, xtensa_block_info **, frag_predicate, frag_predicate);
11665 static bfd_boolean xtensa_frag_flags_is_empty (const frag_flags *);
11666 static void xtensa_frag_flags_init (frag_flags *);
11667 static void get_frag_property_flags (const fragS *, frag_flags *);
11668 static flagword frag_flags_to_number (const frag_flags *);
11669 static void add_xt_prop_frags (segT, xtensa_block_info **, frag_flags_fn);
11671 /* Set up property tables after relaxation. */
11674 xtensa_post_relax_hook (void)
11676 xtensa_move_seg_list_to_beginning (literal_head);
11678 xtensa_find_unmarked_state_frags ();
11679 xtensa_mark_frags_for_org ();
11680 xtensa_mark_difference_of_two_symbols ();
11682 xtensa_create_property_segments (get_frag_is_literal,
11684 XTENSA_LIT_SEC_NAME,
11686 xtensa_create_xproperty_segments (get_frag_property_flags,
11687 XTENSA_PROP_SEC_NAME,
11690 if (warn_unaligned_branch_targets)
11691 bfd_map_over_sections (stdoutput, xtensa_find_unaligned_branch_targets, 0);
11692 bfd_map_over_sections (stdoutput, xtensa_find_unaligned_loops, 0);
11696 /* This function is only meaningful after xtensa_move_literals. */
11699 get_frag_is_literal (const fragS *fragP)
11701 gas_assert (fragP != NULL);
11702 return fragP->tc_frag_data.is_literal;
11707 xtensa_create_property_segments (frag_predicate property_function,
11708 frag_predicate end_property_function,
11709 const char *section_name_base,
11710 xt_section_type sec_type)
11714 /* Walk over all of the current segments.
11715 Walk over each fragment
11716 For each non-empty fragment,
11717 Build a property record (append where possible). */
11719 for (seclist = &stdoutput->sections;
11720 seclist && *seclist;
11721 seclist = &(*seclist)->next)
11723 segT sec = *seclist;
11725 if (exclude_section_from_property_tables (sec))
11728 if (section_has_property (sec, property_function))
11730 segment_info_type *xt_seg_info;
11731 xtensa_block_info **xt_blocks;
11732 segT prop_sec = xtensa_make_property_section (sec, section_name_base);
11734 prop_sec->output_section = prop_sec;
11735 subseg_set (prop_sec, 0);
11736 xt_seg_info = seg_info (prop_sec);
11737 xt_blocks = &xt_seg_info->tc_segment_info_data.blocks[sec_type];
11739 /* Walk over all of the frchains here and add new sections. */
11740 add_xt_block_frags (sec, xt_blocks, property_function,
11741 end_property_function);
11745 /* Now we fill them out.... */
11747 for (seclist = &stdoutput->sections;
11748 seclist && *seclist;
11749 seclist = &(*seclist)->next)
11751 segment_info_type *seginfo;
11752 xtensa_block_info *block;
11753 segT sec = *seclist;
11755 seginfo = seg_info (sec);
11756 block = seginfo->tc_segment_info_data.blocks[sec_type];
11760 xtensa_block_info *cur_block;
11762 bfd_size_type rec_size;
11764 for (cur_block = block; cur_block; cur_block = cur_block->next)
11767 rec_size = num_recs * 8;
11768 bfd_set_section_size (stdoutput, sec, rec_size);
11775 subseg_set (sec, 0);
11776 frag_data = frag_more (rec_size);
11778 for (i = 0; i < num_recs; i++)
11782 /* Write the fixup. */
11783 gas_assert (cur_block);
11784 fix = fix_new (frag_now, i * 8, 4,
11785 section_symbol (cur_block->sec),
11787 FALSE, BFD_RELOC_32);
11788 fix->fx_file = "<internal>";
11791 /* Write the length. */
11792 md_number_to_chars (&frag_data[4 + i * 8],
11793 cur_block->size, 4);
11794 cur_block = cur_block->next;
11796 frag_wane (frag_now);
11798 frag_wane (frag_now);
11806 xtensa_create_xproperty_segments (frag_flags_fn flag_fn,
11807 const char *section_name_base,
11808 xt_section_type sec_type)
11812 /* Walk over all of the current segments.
11813 Walk over each fragment.
11814 For each fragment that has instructions,
11815 build an instruction record (append where possible). */
11817 for (seclist = &stdoutput->sections;
11818 seclist && *seclist;
11819 seclist = &(*seclist)->next)
11821 segT sec = *seclist;
11823 if (exclude_section_from_property_tables (sec))
11826 if (section_has_xproperty (sec, flag_fn))
11828 segment_info_type *xt_seg_info;
11829 xtensa_block_info **xt_blocks;
11830 segT prop_sec = xtensa_make_property_section (sec, section_name_base);
11832 prop_sec->output_section = prop_sec;
11833 subseg_set (prop_sec, 0);
11834 xt_seg_info = seg_info (prop_sec);
11835 xt_blocks = &xt_seg_info->tc_segment_info_data.blocks[sec_type];
11837 /* Walk over all of the frchains here and add new sections. */
11838 add_xt_prop_frags (sec, xt_blocks, flag_fn);
11842 /* Now we fill them out.... */
11844 for (seclist = &stdoutput->sections;
11845 seclist && *seclist;
11846 seclist = &(*seclist)->next)
11848 segment_info_type *seginfo;
11849 xtensa_block_info *block;
11850 segT sec = *seclist;
11852 seginfo = seg_info (sec);
11853 block = seginfo->tc_segment_info_data.blocks[sec_type];
11857 xtensa_block_info *cur_block;
11859 bfd_size_type rec_size;
11861 for (cur_block = block; cur_block; cur_block = cur_block->next)
11864 rec_size = num_recs * (8 + 4);
11865 bfd_set_section_size (stdoutput, sec, rec_size);
11866 /* elf_section_data (sec)->this_hdr.sh_entsize = 12; */
11873 subseg_set (sec, 0);
11874 frag_data = frag_more (rec_size);
11876 for (i = 0; i < num_recs; i++)
11880 /* Write the fixup. */
11881 gas_assert (cur_block);
11882 fix = fix_new (frag_now, i * 12, 4,
11883 section_symbol (cur_block->sec),
11885 FALSE, BFD_RELOC_32);
11886 fix->fx_file = "<internal>";
11889 /* Write the length. */
11890 md_number_to_chars (&frag_data[4 + i * 12],
11891 cur_block->size, 4);
11892 md_number_to_chars (&frag_data[8 + i * 12],
11893 frag_flags_to_number (&cur_block->flags),
11894 sizeof (flagword));
11895 cur_block = cur_block->next;
11897 frag_wane (frag_now);
11899 frag_wane (frag_now);
11907 exclude_section_from_property_tables (segT sec)
11909 flagword flags = bfd_get_section_flags (stdoutput, sec);
11911 /* Sections that don't contribute to the memory footprint are excluded. */
11912 if ((flags & SEC_DEBUGGING)
11913 || !(flags & SEC_ALLOC)
11914 || (flags & SEC_MERGE))
11917 /* Linker cie and fde optimizations mess up property entries for
11918 eh_frame sections, but there is nothing inside them relevant to
11919 property tables anyway. */
11920 if (strcmp (sec->name, ".eh_frame") == 0)
11928 section_has_property (segT sec, frag_predicate property_function)
11930 segment_info_type *seginfo = seg_info (sec);
11933 if (seginfo && seginfo->frchainP)
11935 for (fragP = seginfo->frchainP->frch_root; fragP; fragP = fragP->fr_next)
11937 if (property_function (fragP)
11938 && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
11947 section_has_xproperty (segT sec, frag_flags_fn property_function)
11949 segment_info_type *seginfo = seg_info (sec);
11952 if (seginfo && seginfo->frchainP)
11954 for (fragP = seginfo->frchainP->frch_root; fragP; fragP = fragP->fr_next)
11956 frag_flags prop_flags;
11957 property_function (fragP, &prop_flags);
11958 if (!xtensa_frag_flags_is_empty (&prop_flags))
11966 /* Two types of block sections exist right now: literal and insns. */
11969 add_xt_block_frags (segT sec,
11970 xtensa_block_info **xt_block,
11971 frag_predicate property_function,
11972 frag_predicate end_property_function)
11976 /* Build it if needed. */
11977 while (*xt_block != NULL)
11978 xt_block = &(*xt_block)->next;
11979 /* We are either at NULL at the beginning or at the end. */
11981 /* Walk through the frags. */
11982 if (seg_info (sec)->frchainP)
11984 for (fragP = seg_info (sec)->frchainP->frch_root;
11986 fragP = fragP->fr_next)
11988 if (property_function (fragP)
11989 && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
11991 if (*xt_block != NULL)
11993 if ((*xt_block)->offset + (*xt_block)->size
11994 == fragP->fr_address)
11995 (*xt_block)->size += fragP->fr_fix;
11997 xt_block = &((*xt_block)->next);
11999 if (*xt_block == NULL)
12001 xtensa_block_info *new_block = XNEW (xtensa_block_info);
12002 new_block->sec = sec;
12003 new_block->offset = fragP->fr_address;
12004 new_block->size = fragP->fr_fix;
12005 new_block->next = NULL;
12006 xtensa_frag_flags_init (&new_block->flags);
12007 *xt_block = new_block;
12009 if (end_property_function
12010 && end_property_function (fragP))
12012 xt_block = &((*xt_block)->next);
12020 /* Break the encapsulation of add_xt_prop_frags here. */
12023 xtensa_frag_flags_is_empty (const frag_flags *prop_flags)
12025 if (prop_flags->is_literal
12026 || prop_flags->is_insn
12027 || prop_flags->is_data
12028 || prop_flags->is_unreachable)
12035 xtensa_frag_flags_init (frag_flags *prop_flags)
12037 memset (prop_flags, 0, sizeof (frag_flags));
12042 get_frag_property_flags (const fragS *fragP, frag_flags *prop_flags)
12044 xtensa_frag_flags_init (prop_flags);
12045 if (fragP->tc_frag_data.is_literal)
12046 prop_flags->is_literal = TRUE;
12047 if (fragP->tc_frag_data.is_specific_opcode
12048 || fragP->tc_frag_data.is_no_transform)
12050 prop_flags->is_no_transform = TRUE;
12051 if (xtensa_frag_flags_is_empty (prop_flags))
12052 prop_flags->is_data = TRUE;
12054 if (fragP->tc_frag_data.is_unreachable)
12055 prop_flags->is_unreachable = TRUE;
12056 else if (fragP->tc_frag_data.is_insn)
12058 prop_flags->is_insn = TRUE;
12059 if (fragP->tc_frag_data.is_loop_target)
12060 prop_flags->insn.is_loop_target = TRUE;
12061 if (fragP->tc_frag_data.is_branch_target)
12062 prop_flags->insn.is_branch_target = TRUE;
12063 if (fragP->tc_frag_data.is_no_density)
12064 prop_flags->insn.is_no_density = TRUE;
12065 if (fragP->tc_frag_data.use_absolute_literals)
12066 prop_flags->insn.is_abslit = TRUE;
12068 if (fragP->tc_frag_data.is_align)
12070 prop_flags->is_align = TRUE;
12071 prop_flags->alignment = fragP->tc_frag_data.alignment;
12072 if (xtensa_frag_flags_is_empty (prop_flags))
12073 prop_flags->is_data = TRUE;
12079 frag_flags_to_number (const frag_flags *prop_flags)
12082 if (prop_flags->is_literal)
12083 num |= XTENSA_PROP_LITERAL;
12084 if (prop_flags->is_insn)
12085 num |= XTENSA_PROP_INSN;
12086 if (prop_flags->is_data)
12087 num |= XTENSA_PROP_DATA;
12088 if (prop_flags->is_unreachable)
12089 num |= XTENSA_PROP_UNREACHABLE;
12090 if (prop_flags->insn.is_loop_target)
12091 num |= XTENSA_PROP_INSN_LOOP_TARGET;
12092 if (prop_flags->insn.is_branch_target)
12094 num |= XTENSA_PROP_INSN_BRANCH_TARGET;
12095 num = SET_XTENSA_PROP_BT_ALIGN (num, prop_flags->insn.bt_align_priority);
12098 if (prop_flags->insn.is_no_density)
12099 num |= XTENSA_PROP_INSN_NO_DENSITY;
12100 if (prop_flags->is_no_transform)
12101 num |= XTENSA_PROP_NO_TRANSFORM;
12102 if (prop_flags->insn.is_no_reorder)
12103 num |= XTENSA_PROP_INSN_NO_REORDER;
12104 if (prop_flags->insn.is_abslit)
12105 num |= XTENSA_PROP_INSN_ABSLIT;
12107 if (prop_flags->is_align)
12109 num |= XTENSA_PROP_ALIGN;
12110 num = SET_XTENSA_PROP_ALIGNMENT (num, prop_flags->alignment);
12118 xtensa_frag_flags_combinable (const frag_flags *prop_flags_1,
12119 const frag_flags *prop_flags_2)
12121 /* Cannot combine with an end marker. */
12123 if (prop_flags_1->is_literal != prop_flags_2->is_literal)
12125 if (prop_flags_1->is_insn != prop_flags_2->is_insn)
12127 if (prop_flags_1->is_data != prop_flags_2->is_data)
12130 if (prop_flags_1->is_insn)
12132 /* Properties of the beginning of the frag. */
12133 if (prop_flags_2->insn.is_loop_target)
12135 if (prop_flags_2->insn.is_branch_target)
12137 if (prop_flags_1->insn.is_no_density !=
12138 prop_flags_2->insn.is_no_density)
12140 if (prop_flags_1->is_no_transform !=
12141 prop_flags_2->is_no_transform)
12143 if (prop_flags_1->insn.is_no_reorder !=
12144 prop_flags_2->insn.is_no_reorder)
12146 if (prop_flags_1->insn.is_abslit !=
12147 prop_flags_2->insn.is_abslit)
12151 if (prop_flags_1->is_align)
12159 xt_block_aligned_size (const xtensa_block_info *xt_block)
12162 unsigned align_bits;
12164 if (!xt_block->flags.is_align)
12165 return xt_block->size;
12167 end_addr = xt_block->offset + xt_block->size;
12168 align_bits = xt_block->flags.alignment;
12169 end_addr = ((end_addr + ((1 << align_bits) -1)) >> align_bits) << align_bits;
12170 return end_addr - xt_block->offset;
12175 xtensa_xt_block_combine (xtensa_block_info *xt_block,
12176 const xtensa_block_info *xt_block_2)
12178 if (xt_block->sec != xt_block_2->sec)
12180 if (xt_block->offset + xt_block_aligned_size (xt_block)
12181 != xt_block_2->offset)
12184 if (xt_block_2->size == 0
12185 && (!xt_block_2->flags.is_unreachable
12186 || xt_block->flags.is_unreachable))
12188 if (xt_block_2->flags.is_align
12189 && xt_block->flags.is_align)
12191 /* Nothing needed. */
12192 if (xt_block->flags.alignment >= xt_block_2->flags.alignment)
12197 if (xt_block_2->flags.is_align)
12199 /* Push alignment to previous entry. */
12200 xt_block->flags.is_align = xt_block_2->flags.is_align;
12201 xt_block->flags.alignment = xt_block_2->flags.alignment;
12206 if (!xtensa_frag_flags_combinable (&xt_block->flags,
12207 &xt_block_2->flags))
12210 xt_block->size += xt_block_2->size;
12212 if (xt_block_2->flags.is_align)
12214 xt_block->flags.is_align = TRUE;
12215 xt_block->flags.alignment = xt_block_2->flags.alignment;
12223 add_xt_prop_frags (segT sec,
12224 xtensa_block_info **xt_block,
12225 frag_flags_fn property_function)
12229 /* Build it if needed. */
12230 while (*xt_block != NULL)
12232 xt_block = &(*xt_block)->next;
12234 /* We are either at NULL at the beginning or at the end. */
12236 /* Walk through the frags. */
12237 if (seg_info (sec)->frchainP)
12239 for (fragP = seg_info (sec)->frchainP->frch_root; fragP;
12240 fragP = fragP->fr_next)
12242 xtensa_block_info tmp_block;
12243 tmp_block.sec = sec;
12244 tmp_block.offset = fragP->fr_address;
12245 tmp_block.size = fragP->fr_fix;
12246 tmp_block.next = NULL;
12247 property_function (fragP, &tmp_block.flags);
12249 if (!xtensa_frag_flags_is_empty (&tmp_block.flags))
12250 /* && fragP->fr_fix != 0) */
12252 if ((*xt_block) == NULL
12253 || !xtensa_xt_block_combine (*xt_block, &tmp_block))
12255 xtensa_block_info *new_block;
12256 if ((*xt_block) != NULL)
12257 xt_block = &(*xt_block)->next;
12258 new_block = XNEW (xtensa_block_info);
12259 *new_block = tmp_block;
12260 *xt_block = new_block;
12268 /* op_placement_info_table */
12270 /* op_placement_info makes it easier to determine which
12271 ops can go in which slots. */
12274 init_op_placement_info_table (void)
12276 xtensa_isa isa = xtensa_default_isa;
12277 xtensa_insnbuf ibuf = xtensa_insnbuf_alloc (isa);
12278 xtensa_opcode opcode;
12281 int num_opcodes = xtensa_isa_num_opcodes (isa);
12283 op_placement_table = XNEWVEC (op_placement_info, num_opcodes);
12284 gas_assert (xtensa_isa_num_formats (isa) < MAX_FORMATS);
12286 for (opcode = 0; opcode < num_opcodes; opcode++)
12288 op_placement_info *opi = &op_placement_table[opcode];
12289 /* FIXME: Make tinsn allocation dynamic. */
12290 if (xtensa_opcode_num_operands (isa, opcode) > MAX_INSN_ARGS)
12291 as_fatal (_("too many operands in instruction"));
12292 opi->narrowest = XTENSA_UNDEFINED;
12293 opi->narrowest_size = 0x7F;
12294 opi->narrowest_slot = 0;
12296 opi->num_formats = 0;
12298 for (fmt = 0; fmt < xtensa_isa_num_formats (isa); fmt++)
12300 opi->slots[fmt] = 0;
12301 for (slot = 0; slot < xtensa_format_num_slots (isa, fmt); slot++)
12303 if (xtensa_opcode_encode (isa, fmt, slot, ibuf, opcode) == 0)
12305 int fmt_length = xtensa_format_length (isa, fmt);
12307 set_bit (fmt, opi->formats);
12308 set_bit (slot, opi->slots[fmt]);
12309 if (fmt_length < opi->narrowest_size
12310 || (fmt_length == opi->narrowest_size
12311 && (xtensa_format_num_slots (isa, fmt)
12312 < xtensa_format_num_slots (isa,
12315 opi->narrowest = fmt;
12316 opi->narrowest_size = fmt_length;
12317 opi->narrowest_slot = slot;
12322 opi->num_formats++;
12325 xtensa_insnbuf_free (isa, ibuf);
12330 opcode_fits_format_slot (xtensa_opcode opcode, xtensa_format fmt, int slot)
12332 return bit_is_set (slot, op_placement_table[opcode].slots[fmt]);
12336 /* If the opcode is available in a single slot format, return its size. */
12339 xg_get_single_size (xtensa_opcode opcode)
12341 return op_placement_table[opcode].narrowest_size;
12345 static xtensa_format
12346 xg_get_single_format (xtensa_opcode opcode)
12348 return op_placement_table[opcode].narrowest;
12353 xg_get_single_slot (xtensa_opcode opcode)
12355 return op_placement_table[opcode].narrowest_slot;
12359 /* Instruction Stack Functions (from "xtensa-istack.h"). */
12362 istack_init (IStack *stack)
12369 istack_empty (IStack *stack)
12371 return (stack->ninsn == 0);
12376 istack_full (IStack *stack)
12378 return (stack->ninsn == MAX_ISTACK);
12382 /* Return a pointer to the top IStack entry.
12383 It is an error to call this if istack_empty () is TRUE. */
12386 istack_top (IStack *stack)
12388 int rec = stack->ninsn - 1;
12389 gas_assert (!istack_empty (stack));
12390 return &stack->insn[rec];
12394 /* Add a new TInsn to an IStack.
12395 It is an error to call this if istack_full () is TRUE. */
12398 istack_push (IStack *stack, TInsn *insn)
12400 int rec = stack->ninsn;
12401 gas_assert (!istack_full (stack));
12402 stack->insn[rec] = *insn;
12407 /* Clear space for the next TInsn on the IStack and return a pointer
12408 to it. It is an error to call this if istack_full () is TRUE. */
12411 istack_push_space (IStack *stack)
12413 int rec = stack->ninsn;
12415 gas_assert (!istack_full (stack));
12416 insn = &stack->insn[rec];
12423 /* Remove the last pushed instruction. It is an error to call this if
12424 istack_empty () returns TRUE. */
12427 istack_pop (IStack *stack)
12429 int rec = stack->ninsn - 1;
12430 gas_assert (!istack_empty (stack));
12432 tinsn_init (&stack->insn[rec]);
12436 /* TInsn functions. */
12439 tinsn_init (TInsn *dst)
12441 memset (dst, 0, sizeof (TInsn));
12445 /* Return TRUE if ANY of the operands in the insn are symbolic. */
12448 tinsn_has_symbolic_operands (const TInsn *insn)
12451 int n = insn->ntok;
12453 gas_assert (insn->insn_type == ITYPE_INSN);
12455 for (i = 0; i < n; ++i)
12457 switch (insn->tok[i].X_op)
12471 tinsn_has_invalid_symbolic_operands (const TInsn *insn)
12473 xtensa_isa isa = xtensa_default_isa;
12475 int n = insn->ntok;
12477 gas_assert (insn->insn_type == ITYPE_INSN);
12479 for (i = 0; i < n; ++i)
12481 switch (insn->tok[i].X_op)
12489 /* Errors for these types are caught later. */
12494 /* Symbolic immediates are only allowed on the last immediate
12495 operand. At this time, CONST16 is the only opcode where we
12496 support non-PC-relative relocations. */
12497 if (i != get_relaxable_immed (insn->opcode)
12498 || (xtensa_operand_is_PCrelative (isa, insn->opcode, i) != 1
12499 && insn->opcode != xtensa_const16_opcode))
12501 as_bad (_("invalid symbolic operand"));
12510 /* For assembly code with complex expressions (e.g. subtraction),
12511 we have to build them in the literal pool so that
12512 their results are calculated correctly after relaxation.
12513 The relaxation only handles expressions that
12514 boil down to SYMBOL + OFFSET. */
12517 tinsn_has_complex_operands (const TInsn *insn)
12520 int n = insn->ntok;
12521 gas_assert (insn->insn_type == ITYPE_INSN);
12522 for (i = 0; i < n; ++i)
12524 switch (insn->tok[i].X_op)
12540 /* Encode a TInsn opcode and its constant operands into slotbuf.
12541 Return TRUE if there is a symbol in the immediate field. This
12542 function assumes that:
12543 1) The number of operands are correct.
12544 2) The insn_type is ITYPE_INSN.
12545 3) The opcode can be encoded in the specified format and slot.
12546 4) Operands are either O_constant or O_symbol, and all constants fit. */
12549 tinsn_to_slotbuf (xtensa_format fmt,
12552 xtensa_insnbuf slotbuf)
12554 xtensa_isa isa = xtensa_default_isa;
12555 xtensa_opcode opcode = tinsn->opcode;
12556 bfd_boolean has_fixup = FALSE;
12557 int noperands = xtensa_opcode_num_operands (isa, opcode);
12560 gas_assert (tinsn->insn_type == ITYPE_INSN);
12561 if (noperands != tinsn->ntok)
12562 as_fatal (_("operand number mismatch"));
12564 if (xtensa_opcode_encode (isa, fmt, slot, slotbuf, opcode))
12566 as_bad (_("cannot encode opcode \"%s\" in the given format \"%s\""),
12567 xtensa_opcode_name (isa, opcode), xtensa_format_name (isa, fmt));
12571 for (i = 0; i < noperands; i++)
12573 expressionS *exp = &tinsn->tok[i];
12576 const char *file_name;
12582 if (xtensa_operand_is_visible (isa, opcode, i) == 0)
12584 /* The register number has already been checked in
12585 expression_maybe_register, so we don't need to check here. */
12586 opnd_value = exp->X_add_number;
12587 (void) xtensa_operand_encode (isa, opcode, i, &opnd_value);
12588 rc = xtensa_operand_set_field (isa, opcode, i, fmt, slot, slotbuf,
12591 as_warn (_("xtensa-isa failure: %s"), xtensa_isa_error_msg (isa));
12595 if (xtensa_operand_is_visible (isa, opcode, i) == 0)
12597 file_name = as_where (&line);
12598 /* It is a constant and we called this function
12599 then we have to try to fit it. */
12600 xtensa_insnbuf_set_operand (slotbuf, fmt, slot, opcode, i,
12601 exp->X_add_number, file_name, line);
12614 /* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
12615 into a multi-slot instruction, fill the other slots with NOPs.
12616 Return TRUE if there is a symbol in the immediate field. See also the
12617 assumptions listed for tinsn_to_slotbuf. */
12620 tinsn_to_insnbuf (TInsn *tinsn, xtensa_insnbuf insnbuf)
12622 static xtensa_insnbuf slotbuf = 0;
12623 static vliw_insn vinsn;
12624 xtensa_isa isa = xtensa_default_isa;
12625 bfd_boolean has_fixup = FALSE;
12630 slotbuf = xtensa_insnbuf_alloc (isa);
12631 xg_init_vinsn (&vinsn);
12634 xg_clear_vinsn (&vinsn);
12636 bundle_tinsn (tinsn, &vinsn);
12638 xtensa_format_encode (isa, vinsn.format, insnbuf);
12640 for (i = 0; i < vinsn.num_slots; i++)
12642 /* Only one slot may have a fix-up because the rest contains NOPs. */
12644 tinsn_to_slotbuf (vinsn.format, i, &vinsn.slots[i], vinsn.slotbuf[i]);
12645 xtensa_format_set_slot (isa, vinsn.format, i, insnbuf, vinsn.slotbuf[i]);
12652 /* Check the instruction arguments. Return TRUE on failure. */
12655 tinsn_check_arguments (const TInsn *insn)
12657 xtensa_isa isa = xtensa_default_isa;
12658 xtensa_opcode opcode = insn->opcode;
12659 xtensa_regfile t1_regfile, t2_regfile;
12660 int t1_reg, t2_reg;
12661 int t1_base_reg, t1_last_reg;
12662 int t2_base_reg, t2_last_reg;
12663 char t1_inout, t2_inout;
12666 if (opcode == XTENSA_UNDEFINED)
12668 as_bad (_("invalid opcode"));
12672 if (xtensa_opcode_num_operands (isa, opcode) > insn->ntok)
12674 as_bad (_("too few operands"));
12678 if (xtensa_opcode_num_operands (isa, opcode) < insn->ntok)
12680 as_bad (_("too many operands"));
12684 /* Check registers. */
12685 for (j = 0; j < insn->ntok; j++)
12687 if (xtensa_operand_is_register (isa, insn->opcode, j) != 1)
12690 t2_regfile = xtensa_operand_regfile (isa, insn->opcode, j);
12691 t2_base_reg = insn->tok[j].X_add_number;
12693 = t2_base_reg + xtensa_operand_num_regs (isa, insn->opcode, j);
12695 for (i = 0; i < insn->ntok; i++)
12700 if (xtensa_operand_is_register (isa, insn->opcode, i) != 1)
12703 t1_regfile = xtensa_operand_regfile (isa, insn->opcode, i);
12705 if (t1_regfile != t2_regfile)
12708 t1_inout = xtensa_operand_inout (isa, insn->opcode, i);
12709 t2_inout = xtensa_operand_inout (isa, insn->opcode, j);
12711 t1_base_reg = insn->tok[i].X_add_number;
12712 t1_last_reg = (t1_base_reg
12713 + xtensa_operand_num_regs (isa, insn->opcode, i));
12715 for (t1_reg = t1_base_reg; t1_reg < t1_last_reg; t1_reg++)
12717 for (t2_reg = t2_base_reg; t2_reg < t2_last_reg; t2_reg++)
12719 if (t1_reg != t2_reg)
12722 if (t1_inout != 'i' && t2_inout != 'i')
12724 as_bad (_("multiple writes to the same register"));
12735 /* Load an instruction from its encoded form. */
12738 tinsn_from_chars (TInsn *tinsn, char *f, int slot)
12742 xg_init_vinsn (&vinsn);
12743 vinsn_from_chars (&vinsn, f);
12745 *tinsn = vinsn.slots[slot];
12746 xg_free_vinsn (&vinsn);
12751 tinsn_from_insnbuf (TInsn *tinsn,
12752 xtensa_insnbuf slotbuf,
12757 xtensa_isa isa = xtensa_default_isa;
12759 /* Find the immed. */
12760 tinsn_init (tinsn);
12761 tinsn->insn_type = ITYPE_INSN;
12762 tinsn->is_specific_opcode = FALSE; /* must not be specific */
12763 tinsn->opcode = xtensa_opcode_decode (isa, fmt, slot, slotbuf);
12764 tinsn->ntok = xtensa_opcode_num_operands (isa, tinsn->opcode);
12765 for (i = 0; i < tinsn->ntok; i++)
12767 set_expr_const (&tinsn->tok[i],
12768 xtensa_insnbuf_get_operand (slotbuf, fmt, slot,
12769 tinsn->opcode, i));
12774 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
12777 tinsn_immed_from_frag (TInsn *tinsn, fragS *fragP, int slot)
12779 xtensa_opcode opcode = tinsn->opcode;
12782 if (fragP->tc_frag_data.slot_symbols[slot])
12784 opnum = get_relaxable_immed (opcode);
12785 gas_assert (opnum >= 0);
12786 set_expr_symbol_offset (&tinsn->tok[opnum],
12787 fragP->tc_frag_data.slot_symbols[slot],
12788 fragP->tc_frag_data.slot_offsets[slot]);
12790 tinsn->extra_arg = fragP->tc_frag_data.free_reg[slot];
12795 get_num_stack_text_bytes (IStack *istack)
12798 int text_bytes = 0;
12800 for (i = 0; i < istack->ninsn; i++)
12802 TInsn *tinsn = &istack->insn[i];
12803 if (tinsn->insn_type == ITYPE_INSN)
12804 text_bytes += xg_get_single_size (tinsn->opcode);
12811 get_num_stack_literal_bytes (IStack *istack)
12816 for (i = 0; i < istack->ninsn; i++)
12818 TInsn *tinsn = &istack->insn[i];
12819 if (tinsn->insn_type == ITYPE_LITERAL && tinsn->ntok == 1)
12826 /* vliw_insn functions. */
12829 xg_init_vinsn (vliw_insn *v)
12832 xtensa_isa isa = xtensa_default_isa;
12834 xg_clear_vinsn (v);
12836 v->insnbuf = xtensa_insnbuf_alloc (isa);
12837 if (v->insnbuf == NULL)
12838 as_fatal (_("out of memory"));
12840 for (i = 0; i < config_max_slots; i++)
12842 v->slotbuf[i] = xtensa_insnbuf_alloc (isa);
12843 if (v->slotbuf[i] == NULL)
12844 as_fatal (_("out of memory"));
12850 xg_clear_vinsn (vliw_insn *v)
12854 memset (v, 0, offsetof (vliw_insn, slots)
12855 + sizeof(TInsn) * config_max_slots);
12857 v->format = XTENSA_UNDEFINED;
12859 v->inside_bundle = FALSE;
12861 if (xt_saved_debug_type != DEBUG_NONE)
12862 debug_type = xt_saved_debug_type;
12864 for (i = 0; i < config_max_slots; i++)
12865 v->slots[i].opcode = XTENSA_UNDEFINED;
12870 xg_copy_vinsn (vliw_insn *dst, vliw_insn *src)
12873 offsetof(vliw_insn, slots) + src->num_slots * sizeof(TInsn));
12874 dst->insnbuf = src->insnbuf;
12875 memcpy (dst->slotbuf, src->slotbuf, src->num_slots * sizeof(xtensa_insnbuf));
12880 vinsn_has_specific_opcodes (vliw_insn *v)
12884 for (i = 0; i < v->num_slots; i++)
12886 if (v->slots[i].is_specific_opcode)
12894 xg_free_vinsn (vliw_insn *v)
12897 xtensa_insnbuf_free (xtensa_default_isa, v->insnbuf);
12898 for (i = 0; i < config_max_slots; i++)
12899 xtensa_insnbuf_free (xtensa_default_isa, v->slotbuf[i]);
12903 /* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
12904 operands. See also the assumptions listed for tinsn_to_slotbuf. */
12907 vinsn_to_insnbuf (vliw_insn *vinsn,
12910 bfd_boolean record_fixup)
12912 xtensa_isa isa = xtensa_default_isa;
12913 xtensa_format fmt = vinsn->format;
12914 xtensa_insnbuf insnbuf = vinsn->insnbuf;
12916 bfd_boolean has_fixup = FALSE;
12918 xtensa_format_encode (isa, fmt, insnbuf);
12920 for (slot = 0; slot < vinsn->num_slots; slot++)
12922 TInsn *tinsn = &vinsn->slots[slot];
12923 expressionS *extra_arg = &tinsn->extra_arg;
12924 bfd_boolean tinsn_has_fixup =
12925 tinsn_to_slotbuf (vinsn->format, slot, tinsn,
12926 vinsn->slotbuf[slot]);
12928 xtensa_format_set_slot (isa, fmt, slot,
12929 insnbuf, vinsn->slotbuf[slot]);
12930 if (extra_arg->X_op != O_illegal && extra_arg->X_op != O_register)
12932 if (vinsn->num_slots != 1)
12933 as_bad (_("TLS relocation not allowed in FLIX bundle"));
12934 else if (record_fixup)
12935 /* Instructions that generate TLS relocations should always be
12936 relaxed in the front-end. If "record_fixup" is set, then this
12937 function is being called during back-end relaxation, so flag
12938 the unexpected behavior as an error. */
12939 as_bad (_("unexpected TLS relocation"));
12941 fix_new (fragP, frag_offset - fragP->fr_literal,
12942 xtensa_format_length (isa, fmt),
12943 extra_arg->X_add_symbol, extra_arg->X_add_number,
12944 FALSE, map_operator_to_reloc (extra_arg->X_op, FALSE));
12946 if (tinsn_has_fixup)
12949 xtensa_opcode opcode = tinsn->opcode;
12950 int noperands = xtensa_opcode_num_operands (isa, opcode);
12953 for (i = 0; i < noperands; i++)
12955 expressionS* exp = &tinsn->tok[i];
12961 if (get_relaxable_immed (opcode) == i)
12963 /* Add a fix record for the instruction, except if this
12964 function is being called prior to relaxation, i.e.,
12965 if record_fixup is false, and the instruction might
12966 be relaxed later. */
12968 || tinsn->is_specific_opcode
12969 || !xg_is_relaxable_insn (tinsn, 0))
12971 xg_add_opcode_fix (tinsn, i, fmt, slot, exp, fragP,
12972 frag_offset - fragP->fr_literal);
12976 if (exp->X_op != O_symbol)
12977 as_bad (_("invalid operand"));
12978 tinsn->symbol = exp->X_add_symbol;
12979 tinsn->offset = exp->X_add_number;
12983 as_bad (_("symbolic operand not allowed"));
12991 as_bad (_("expression too complex"));
13003 vinsn_from_chars (vliw_insn *vinsn, char *f)
13005 static xtensa_insnbuf insnbuf = NULL;
13006 static xtensa_insnbuf slotbuf = NULL;
13009 xtensa_isa isa = xtensa_default_isa;
13013 insnbuf = xtensa_insnbuf_alloc (isa);
13014 slotbuf = xtensa_insnbuf_alloc (isa);
13017 xtensa_insnbuf_from_chars (isa, insnbuf, (unsigned char *) f, 0);
13018 fmt = xtensa_format_decode (isa, insnbuf);
13019 if (fmt == XTENSA_UNDEFINED)
13020 as_fatal (_("cannot decode instruction format"));
13021 vinsn->format = fmt;
13022 vinsn->num_slots = xtensa_format_num_slots (isa, fmt);
13024 for (i = 0; i < vinsn->num_slots; i++)
13026 TInsn *tinsn = &vinsn->slots[i];
13027 xtensa_format_get_slot (isa, fmt, i, insnbuf, slotbuf);
13028 tinsn_from_insnbuf (tinsn, slotbuf, fmt, i);
13033 /* Expression utilities. */
13035 /* Return TRUE if the expression is an integer constant. */
13038 expr_is_const (const expressionS *s)
13040 return (s->X_op == O_constant);
13044 /* Get the expression constant.
13045 Calling this is illegal if expr_is_const () returns TRUE. */
13048 get_expr_const (const expressionS *s)
13050 gas_assert (expr_is_const (s));
13051 return s->X_add_number;
13055 /* Set the expression to a constant value. */
13058 set_expr_const (expressionS *s, offsetT val)
13060 s->X_op = O_constant;
13061 s->X_add_number = val;
13062 s->X_add_symbol = NULL;
13063 s->X_op_symbol = NULL;
13068 expr_is_register (const expressionS *s)
13070 return (s->X_op == O_register);
13074 /* Get the expression constant.
13075 Calling this is illegal if expr_is_const () returns TRUE. */
13078 get_expr_register (const expressionS *s)
13080 gas_assert (expr_is_register (s));
13081 return s->X_add_number;
13085 /* Set the expression to a symbol + constant offset. */
13088 set_expr_symbol_offset (expressionS *s, symbolS *sym, offsetT offset)
13090 s->X_op = O_symbol;
13091 s->X_add_symbol = sym;
13092 s->X_op_symbol = NULL; /* unused */
13093 s->X_add_number = offset;
13097 /* Return TRUE if the two expressions are equal. */
13100 expr_is_equal (expressionS *s1, expressionS *s2)
13102 if (s1->X_op != s2->X_op)
13104 if (s1->X_add_symbol != s2->X_add_symbol)
13106 if (s1->X_op_symbol != s2->X_op_symbol)
13108 if (s1->X_add_number != s2->X_add_number)
13115 copy_expr (expressionS *dst, const expressionS *src)
13117 memcpy (dst, src, sizeof (expressionS));
13121 /* Support for the "--rename-section" option. */
13123 struct rename_section_struct
13125 const char *old_name;
13127 struct rename_section_struct *next;
13130 static struct rename_section_struct *section_rename;
13133 /* Parse the string "oldname=new_name(:oldname2=new_name2)*" and add
13134 entries to the section_rename list. Note: Specifying multiple
13135 renamings separated by colons is not documented and is retained only
13136 for backward compatibility. */
13139 build_section_rename (const char *arg)
13141 struct rename_section_struct *r;
13142 char *this_arg = NULL;
13143 char *next_arg = NULL;
13145 for (this_arg = xstrdup (arg); this_arg != NULL; this_arg = next_arg)
13147 char *old_name, *new_name;
13151 next_arg = strchr (this_arg, ':');
13159 old_name = this_arg;
13160 new_name = strchr (this_arg, '=');
13162 if (*old_name == '\0')
13164 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
13167 if (!new_name || new_name[1] == '\0')
13169 as_warn (_("ignoring invalid '-rename-section' specification: '%s'"),
13176 /* Check for invalid section renaming. */
13177 for (r = section_rename; r != NULL; r = r->next)
13179 if (strcmp (r->old_name, old_name) == 0)
13180 as_bad (_("section %s renamed multiple times"), old_name);
13181 if (strcmp (r->new_name, new_name) == 0)
13182 as_bad (_("multiple sections remapped to output section %s"),
13187 r = XNEW (struct rename_section_struct);
13188 r->old_name = xstrdup (old_name);
13189 r->new_name = xstrdup (new_name);
13190 r->next = section_rename;
13191 section_rename = r;
13197 xtensa_section_rename (const char *name)
13199 struct rename_section_struct *r = section_rename;
13201 for (r = section_rename; r != NULL; r = r->next)
13203 if (strcmp (r->old_name, name) == 0)
13204 return r->new_name;
13207 return (char *) name;