1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright 2003 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330, Boston,
19 MA 02111-1307, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
28 #include "xtensa-relax.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
34 #define uint32 unsigned int
37 #define int32 signed int
42 There are 3 forms for instructions,
43 1) the MEMORY format -- this is the encoding 2 or 3 byte instruction
44 2) the TInsn -- handles instructions/labels and literals;
45 all operands are assumed to be expressions
46 3) the IStack -- a stack of TInsn. this allows us to
47 reason about the generated expansion instructions
49 Naming conventions (used somewhat inconsistently):
50 The xtensa_ functions are exported
51 The xg_ functions are internal
53 We also have a couple of different extensibility mechanisms.
54 1) The idiom replacement:
55 This is used when a line is first parsed to
56 replace an instruction pattern with another instruction
57 It is currently limited to replacements of instructions
58 with constant operands.
59 2) The xtensa-relax.c mechanism that has stronger instruction
60 replacement patterns. When an instruction's immediate field
61 does not fit the next instruction sequence is attempted.
62 In addition, "narrow" opcodes are supported this way. */
65 /* Define characters with special meanings to GAS. */
66 const char comment_chars[] = "#";
67 const char line_comment_chars[] = "#";
68 const char line_separator_chars[] = ";";
69 const char EXP_CHARS[] = "eE";
70 const char FLT_CHARS[] = "rRsSfFdDxXpP";
73 /* Flag to indicate whether the hardware supports the density option.
74 If not, enabling density instructions (via directives or --density flag)
78 bfd_boolean density_supported = XCHAL_HAVE_DENSITY;
80 bfd_boolean density_supported = TRUE;
83 #define XTENSA_FETCH_WIDTH 4
85 /* Flags for properties of the last instruction in a segment. */
86 #define FLAG_IS_A0_WRITER 0x1
87 #define FLAG_IS_BAD_LOOPEND 0x2
90 /* We define a special segment names ".literal" to place literals
91 into. The .fini and .init sections are special because they
92 contain code that is moved together by the linker. We give them
93 their own special .fini.literal and .init.literal sections. */
95 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
96 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
97 #define INIT_SECTION_NAME xtensa_section_rename (".init")
98 #define FINI_LITERAL_SECTION_NAME xtensa_section_rename (".fini.literal")
99 #define INIT_LITERAL_SECTION_NAME xtensa_section_rename (".init.literal")
102 /* This type is used for the directive_stack to keep track of the
103 state of the literal collection pools. */
105 typedef struct lit_state_struct
107 const char *lit_seg_name;
108 const char *init_lit_seg_name;
109 const char *fini_lit_seg_name;
115 static lit_state default_lit_sections;
118 /* We keep lists of literal segments. The seg_list type is the node
119 for such a list. The *_literal_head locals are the heads of the
120 various lists. All of these lists have a dummy node at the start. */
122 typedef struct seg_list_struct
124 struct seg_list_struct *next;
128 static seg_list literal_head_h;
129 static seg_list *literal_head = &literal_head_h;
130 static seg_list init_literal_head_h;
131 static seg_list *init_literal_head = &init_literal_head_h;
132 static seg_list fini_literal_head_h;
133 static seg_list *fini_literal_head = &fini_literal_head_h;
136 /* Global flag to indicate when we are emitting literals. */
137 int generating_literals = 0;
140 /* Structure for saving the current state before emitting literals. */
141 typedef struct emit_state_struct
146 int generating_literals;
161 directive_literal_prefix
167 bfd_boolean can_be_negated;
170 const directive_infoS directive_info[] =
179 {"literal_prefix", FALSE}
182 bfd_boolean directive_state[] =
186 #if STATIC_LIBISA && !XCHAL_HAVE_DENSITY
193 FALSE, /* freeregs */
194 FALSE, /* longcalls */
195 FALSE /* literal_prefix */
199 enum xtensa_relax_statesE
201 RELAX_ALIGN_NEXT_OPCODE,
202 /* Use the first opcode of the next fragment to determine the
203 alignment requirements. This is ONLY used for LOOPS
206 RELAX_DESIRE_ALIGN_IF_TARGET,
207 /* These are placed in front of labels. They will all be converted
208 to RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
209 relaxation begins. */
211 RELAX_ADD_NOP_IF_A0_B_RETW,
212 /* These are placed in front of conditional branches. It will be
213 turned into a NOP (using a1) if the branch is immediately
214 followed by a RETW or RETW.N. Otherwise it will be turned into
215 an rs_fill of 0 before relaxation begins. */
217 RELAX_ADD_NOP_IF_PRE_LOOP_END,
218 /* These are placed after JX instructions. It will be turned into a
219 NOP if there is one instruction before a loop end label.
220 Otherwise it will be turned into an rs_fill of 0 before
221 relaxation begins. This is used to avoid a hardware TIE
222 interlock issue prior to T1040. */
224 RELAX_ADD_NOP_IF_SHORT_LOOP,
225 /* These are placed after LOOP instructions. It will be turned into
226 a NOP when: (1) there are less than 3 instructions in the loop;
227 we place 2 of these in a row to add up to 2 NOPS in short loops;
228 or (2) The instructions in the loop do not include a branch or
229 jump. Otherwise it will be turned into an rs_fill of 0 before
230 relaxation begins. This is used to avoid hardware bug
233 RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
234 /* These are placed after LOOP instructions. It will be turned into
235 a NOP if there are less than 12 bytes to the end of some other
236 loop's end. Otherwise it will be turned into an rs_fill of 0
237 before relaxation begins. This is used to avoid hardware bug
241 /* The next fragment like its first instruction to NOT cross a
245 /* This will be turned into a NOP or NOP.N if the previous
246 instruction is expanded to negate a loop. */
248 RELAX_LOOP_END_ADD_NOP,
249 /* When the code density option is available, this will generate a
250 NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
251 fragment with a NOP in it. */
254 /* Another fragment could generate an expansion here but has not yet. */
257 /* Expansion has been generated by an instruction that generates a
258 literal. However, the stretch has NOT been reported yet in this
262 /* Expansion has been generated by an instruction that generates a
265 RELAX_LITERAL_POOL_BEGIN,
266 RELAX_LITERAL_POOL_END,
267 /* Technically these are not relaxations at all, but mark a location
268 to store literals later. Note that fr_var stores the frchain for
269 BEGIN frags and fr_var stores now_seg for END frags. */
272 /* The last instruction in this fragment (at->fr_opcode) can be
273 freely replaced with a single wider instruction if a future
274 alignment desires or needs it. */
277 /* The last instruction in this fragment (at->fr_opcode) contains
278 the value defined by fr_symbol (fr_offset = 0). If the value
279 does not fit, use the specified expansion. This is similar to
280 "NARROW", except that these may not be expanded in order to align
284 /* The last instruction in this fragment (at->fr_opcode) contains a
285 literal. It has already been expanded at least 1 step. */
288 /* The last instruction in this fragment (at->fr_opcode) contains a
289 literal. It has already been expanded at least 2 steps. */
292 /* This is used as a stopper to bound the number of steps that
294 #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
297 typedef bfd_boolean (*frag_predicate) (const fragS *);
300 /* Directive functions. */
302 static bfd_boolean use_generics
304 static bfd_boolean use_longcalls
306 static bfd_boolean code_density_available
308 static bfd_boolean can_relax
310 static void directive_push
311 PARAMS ((directiveE, bfd_boolean, const void *));
312 static void directive_pop
313 PARAMS ((directiveE *, bfd_boolean *, const char **,
314 unsigned int *, const void **));
315 static void directive_balance
317 static bfd_boolean inside_directive
318 PARAMS ((directiveE));
319 static void get_directive
320 PARAMS ((directiveE *, bfd_boolean *));
321 static void xtensa_begin_directive
323 static void xtensa_end_directive
325 static void xtensa_literal_prefix
326 PARAMS ((char const *, int));
327 static void xtensa_literal_position
329 static void xtensa_literal_pseudo
332 /* Parsing and Idiom Translation Functions. */
334 static const char *expression_end
335 PARAMS ((const char *));
336 static unsigned tc_get_register
337 PARAMS ((const char *));
338 static void expression_maybe_register
339 PARAMS ((xtensa_operand, expressionS *));
340 static int tokenize_arguments
341 PARAMS ((char **, char *));
342 static bfd_boolean parse_arguments
343 PARAMS ((TInsn *, int, char **));
344 static int xg_translate_idioms
345 PARAMS ((char **, int *, char **));
346 static int xg_translate_sysreg_op
347 PARAMS ((char **, int *, char **));
348 static void xg_reverse_shift_count
350 static int xg_arg_is_constant
351 PARAMS ((char *, offsetT *));
352 static void xg_replace_opname
353 PARAMS ((char **, char *));
354 static int xg_check_num_args
355 PARAMS ((int *, int, char *, char **));
357 /* Functions for dealing with the Xtensa ISA. */
359 static bfd_boolean operand_is_immed
360 PARAMS ((xtensa_operand));
361 static bfd_boolean operand_is_pcrel_label
362 PARAMS ((xtensa_operand));
363 static int get_relaxable_immed
364 PARAMS ((xtensa_opcode));
365 static xtensa_opcode get_opcode_from_buf
366 PARAMS ((const char *));
367 static bfd_boolean is_direct_call_opcode
368 PARAMS ((xtensa_opcode));
369 static bfd_boolean is_call_opcode
370 PARAMS ((xtensa_opcode));
371 static bfd_boolean is_entry_opcode
372 PARAMS ((xtensa_opcode));
373 static bfd_boolean is_loop_opcode
374 PARAMS ((xtensa_opcode));
375 static bfd_boolean is_the_loop_opcode
376 PARAMS ((xtensa_opcode));
377 static bfd_boolean is_jx_opcode
378 PARAMS ((xtensa_opcode));
379 static bfd_boolean is_windowed_return_opcode
380 PARAMS ((xtensa_opcode));
381 static bfd_boolean is_conditional_branch_opcode
382 PARAMS ((xtensa_opcode));
383 static bfd_boolean is_branch_or_jump_opcode
384 PARAMS ((xtensa_opcode));
385 static bfd_reloc_code_real_type opnum_to_reloc
387 static int reloc_to_opnum
388 PARAMS ((bfd_reloc_code_real_type));
389 static void xtensa_insnbuf_set_operand
390 PARAMS ((xtensa_insnbuf, xtensa_opcode, xtensa_operand, int32,
391 const char *, unsigned int));
392 static uint32 xtensa_insnbuf_get_operand
393 PARAMS ((xtensa_insnbuf, xtensa_opcode, int));
394 static void xtensa_insnbuf_set_immediate_field
395 PARAMS ((xtensa_opcode, xtensa_insnbuf, int32, const char *,
397 static bfd_boolean is_negatable_branch
400 /* Functions for Internal Lists of Symbols. */
401 static void xtensa_define_label
402 PARAMS ((symbolS *));
403 static void add_target_symbol
404 PARAMS ((symbolS *, bfd_boolean));
405 static symbolS *xtensa_find_label
406 PARAMS ((fragS *, offsetT, bfd_boolean));
407 static void map_over_defined_symbols
408 PARAMS ((void (*fn) (symbolS *)));
409 static bfd_boolean is_loop_target_label
410 PARAMS ((symbolS *));
411 static void xtensa_mark_target_fragments
414 /* Various Other Internal Functions. */
416 static bfd_boolean is_unique_insn_expansion
417 PARAMS ((TransitionRule *));
418 static int xg_get_insn_size
420 static int xg_get_build_instr_size
421 PARAMS ((BuildInstr *));
422 static bfd_boolean xg_is_narrow_insn
424 static bfd_boolean xg_is_single_relaxable_insn
426 static int xg_get_max_narrow_insn_size
427 PARAMS ((xtensa_opcode));
428 static int xg_get_max_insn_widen_size
429 PARAMS ((xtensa_opcode));
430 static int xg_get_max_insn_widen_literal_size
431 PARAMS ((xtensa_opcode));
432 static bfd_boolean xg_is_relaxable_insn
433 PARAMS ((TInsn *, int));
434 static symbolS *get_special_literal_symbol
436 static symbolS *get_special_label_symbol
438 static bfd_boolean xg_build_to_insn
439 PARAMS ((TInsn *, TInsn *, BuildInstr *));
440 static bfd_boolean xg_build_to_stack
441 PARAMS ((IStack *, TInsn *, BuildInstr *));
442 static bfd_boolean xg_expand_to_stack
443 PARAMS ((IStack *, TInsn *, int));
444 static bfd_boolean xg_expand_narrow
445 PARAMS ((TInsn *, TInsn *));
446 static bfd_boolean xg_immeds_fit
447 PARAMS ((const TInsn *));
448 static bfd_boolean xg_symbolic_immeds_fit
449 PARAMS ((const TInsn *, segT, fragS *, offsetT, long));
450 static bfd_boolean xg_check_operand
451 PARAMS ((int32, xtensa_operand));
452 static int is_dnrange
453 PARAMS ((fragS *, symbolS *, long));
454 static int xg_assembly_relax
455 PARAMS ((IStack *, TInsn *, segT, fragS *, offsetT, int, long));
456 static void xg_force_frag_space
458 static void xg_finish_frag
459 PARAMS ((char *, enum xtensa_relax_statesE, int, bfd_boolean));
460 static bfd_boolean is_branch_jmp_to_next
461 PARAMS ((TInsn *, fragS *));
462 static void xg_add_branch_and_loop_targets
464 static bfd_boolean xg_instruction_matches_rule
465 PARAMS ((TInsn *, TransitionRule *));
466 static TransitionRule *xg_instruction_match
468 static bfd_boolean xg_build_token_insn
469 PARAMS ((BuildInstr *, TInsn *, TInsn *));
470 static bfd_boolean xg_simplify_insn
471 PARAMS ((TInsn *, TInsn *));
472 static bfd_boolean xg_expand_assembly_insn
473 PARAMS ((IStack *, TInsn *));
474 static symbolS *xg_assemble_literal
476 static void xg_assemble_literal_space
478 static symbolS *xtensa_create_literal_symbol
479 PARAMS ((segT, fragS *));
480 static symbolS *xtensa_create_local_symbol
481 PARAMS ((bfd *, const char *, segT, valueT, fragS *));
482 static bfd_boolean get_is_linkonce_section
483 PARAMS ((bfd *, segT));
484 static bfd_boolean xg_emit_insn
485 PARAMS ((TInsn *, bfd_boolean));
486 static bfd_boolean xg_emit_insn_to_buf
487 PARAMS ((TInsn *, char *, fragS *, offsetT, bfd_boolean));
488 static bfd_boolean xg_add_opcode_fix
489 PARAMS ((xtensa_opcode, int, expressionS *, fragS *, offsetT));
490 static void xg_resolve_literals
491 PARAMS ((TInsn *, symbolS *));
492 static void xg_resolve_labels
493 PARAMS ((TInsn *, symbolS *));
494 static void xg_assemble_tokens
496 static bfd_boolean is_register_writer
497 PARAMS ((const TInsn *, const char *, int));
498 static bfd_boolean is_bad_loopend_opcode
499 PARAMS ((const TInsn *));
500 static bfd_boolean is_unaligned_label
501 PARAMS ((symbolS *));
502 static fragS *next_non_empty_frag
503 PARAMS ((const fragS *));
504 static xtensa_opcode next_frag_opcode
505 PARAMS ((const fragS *));
506 static void update_next_frag_nop_state
508 static bfd_boolean next_frag_is_branch_target
509 PARAMS ((const fragS *));
510 static bfd_boolean next_frag_is_loop_target
511 PARAMS ((const fragS *));
512 static addressT next_frag_pre_opcode_bytes
513 PARAMS ((const fragS *));
514 static bfd_boolean is_next_frag_target
515 PARAMS ((const fragS *, const fragS *));
516 static void xtensa_mark_literal_pool_location
517 PARAMS ((bfd_boolean));
518 static void xtensa_move_labels
519 PARAMS ((fragS *, valueT, fragS *, valueT));
520 static void assemble_nop
521 PARAMS ((size_t, char *));
522 static addressT get_expanded_loop_offset
523 PARAMS ((xtensa_opcode));
524 static fragS *get_literal_pool_location
526 static void set_literal_pool_location
527 PARAMS ((segT, fragS *));
529 /* Helpers for xtensa_end(). */
531 static void xtensa_cleanup_align_frags
533 static void xtensa_fix_target_frags
535 static bfd_boolean frag_can_negate_branch
537 static void xtensa_fix_a0_b_retw_frags
539 static bfd_boolean next_instrs_are_b_retw
541 static void xtensa_fix_b_j_loop_end_frags
543 static bfd_boolean next_instr_is_loop_end
545 static void xtensa_fix_close_loop_end_frags
547 static size_t min_bytes_to_other_loop_end
548 PARAMS ((fragS *, fragS *, offsetT, size_t));
549 static size_t unrelaxed_frag_min_size
551 static void xtensa_fix_short_loop_frags
553 static size_t count_insns_to_loop_end
554 PARAMS ((fragS *, bfd_boolean, size_t));
555 static size_t unrelaxed_frag_min_insn_count
557 static bfd_boolean branch_before_loop_end
559 static bfd_boolean unrelaxed_frag_has_b_j
561 static void xtensa_sanity_check
563 static bfd_boolean is_empty_loop
564 PARAMS ((const TInsn *, fragS *));
565 static bfd_boolean is_local_forward_loop
566 PARAMS ((const TInsn *, fragS *));
568 /* Alignment Functions. */
570 static size_t get_text_align_power
572 static addressT get_text_align_max_fill_size
573 PARAMS ((int, bfd_boolean, bfd_boolean));
574 static addressT get_text_align_fill_size
575 PARAMS ((addressT, int, int, bfd_boolean, bfd_boolean));
576 static size_t get_text_align_nop_count
577 PARAMS ((size_t, bfd_boolean));
578 static size_t get_text_align_nth_nop_size
579 PARAMS ((size_t, size_t, bfd_boolean));
580 static addressT get_noop_aligned_address
581 PARAMS ((fragS *, addressT));
582 static addressT get_widen_aligned_address
583 PARAMS ((fragS *, addressT));
585 /* Helpers for xtensa_relax_frag(). */
587 static long relax_frag_text_align
588 PARAMS ((fragS *, long));
589 static long relax_frag_add_nop
591 static long relax_frag_narrow
592 PARAMS ((fragS *, long));
593 static bfd_boolean future_alignment_required
594 PARAMS ((fragS *, long));
595 static long relax_frag_immed
596 PARAMS ((segT, fragS *, long, int, int *));
598 /* Helpers for md_convert_frag(). */
600 static void convert_frag_align_next_opcode
602 static void convert_frag_narrow
604 static void convert_frag_immed
605 PARAMS ((segT, fragS *, int));
606 static fixS *fix_new_exp_in_seg
607 PARAMS ((segT, subsegT, fragS *, int, int, expressionS *, int,
608 bfd_reloc_code_real_type));
609 static void convert_frag_immed_finish_loop
610 PARAMS ((segT, fragS *, TInsn *));
611 static offsetT get_expression_value
612 PARAMS ((segT, expressionS *));
614 /* Flags for the Last Instruction in Each Subsegment. */
616 static unsigned get_last_insn_flags
617 PARAMS ((segT, subsegT));
618 static void set_last_insn_flags
619 PARAMS ((segT, subsegT, unsigned, bfd_boolean));
621 /* Segment list functions. */
623 static void xtensa_remove_section
625 static void xtensa_insert_section
626 PARAMS ((segT, segT));
627 static void xtensa_move_seg_list_to_beginning
628 PARAMS ((seg_list *));
629 static void xtensa_move_literals
631 static void xtensa_move_frag_symbol
632 PARAMS ((symbolS *));
633 static void xtensa_move_frag_symbols
635 static void xtensa_reorder_seg_list
636 PARAMS ((seg_list *, segT));
637 static void xtensa_reorder_segments
639 static segT get_last_sec
641 static void xtensa_switch_to_literal_fragment
642 PARAMS ((emit_state *));
643 static void xtensa_switch_section_emit_state
644 PARAMS ((emit_state *, segT, subsegT));
645 static void xtensa_restore_emit_state
646 PARAMS ((emit_state *));
647 static void cache_literal_section
648 PARAMS ((seg_list *, const char *, segT *));
649 static segT retrieve_literal_seg
650 PARAMS ((seg_list *, const char *));
651 static segT seg_present
652 PARAMS ((const char *));
653 static void add_seg_list
654 PARAMS ((seg_list *, segT));
656 /* Property Table (e.g., ".xt.insn" and ".xt.lit") Functions. */
658 static void xtensa_create_property_segments
659 PARAMS ((frag_predicate, const char *, xt_section_type));
660 static segment_info_type *retrieve_segment_info
662 static segT retrieve_xtensa_section
664 static bfd_boolean section_has_property
665 PARAMS ((segT sec, frag_predicate));
666 static void add_xt_block_frags
667 PARAMS ((segT, segT, xtensa_block_info **, frag_predicate));
668 static bfd_boolean get_frag_is_literal
669 PARAMS ((const fragS *));
670 static bfd_boolean get_frag_is_insn
671 PARAMS ((const fragS *));
673 /* Import from elf32-xtensa.c in BFD library. */
674 extern char *xtensa_get_property_section_name
675 PARAMS ((bfd *, asection *, const char *));
677 /* TInsn and IStack functions. */
678 static bfd_boolean tinsn_has_symbolic_operands
679 PARAMS ((const TInsn *));
680 static bfd_boolean tinsn_has_invalid_symbolic_operands
681 PARAMS ((const TInsn *));
682 static bfd_boolean tinsn_has_complex_operands
683 PARAMS ((const TInsn *));
684 static bfd_boolean tinsn_to_insnbuf
685 PARAMS ((TInsn *, xtensa_insnbuf));
686 static bfd_boolean tinsn_check_arguments
687 PARAMS ((const TInsn *));
688 static void tinsn_from_chars
689 PARAMS ((TInsn *, char *));
690 static void tinsn_immed_from_frag
691 PARAMS ((TInsn *, fragS *));
692 static int get_num_stack_text_bytes
694 static int get_num_stack_literal_bytes
697 /* Expression Utilities. */
698 bfd_boolean expr_is_const
699 PARAMS ((const expressionS *));
700 offsetT get_expr_const
701 PARAMS ((const expressionS *));
703 PARAMS ((expressionS *, offsetT));
704 void set_expr_symbol_offset
705 PARAMS ((expressionS *, symbolS *, offsetT));
706 bfd_boolean expr_is_equal
707 PARAMS ((expressionS *, expressionS *));
708 static void copy_expr
709 PARAMS ((expressionS *, const expressionS *));
711 #ifdef XTENSA_SECTION_RENAME
712 static void build_section_rename
713 PARAMS ((const char *));
714 static void add_section_rename
715 PARAMS ((char *, char *));
719 /* ISA imported from bfd. */
720 extern xtensa_isa xtensa_default_isa;
722 extern int target_big_endian;
724 static xtensa_opcode xtensa_addi_opcode;
725 static xtensa_opcode xtensa_addmi_opcode;
726 static xtensa_opcode xtensa_call0_opcode;
727 static xtensa_opcode xtensa_call4_opcode;
728 static xtensa_opcode xtensa_call8_opcode;
729 static xtensa_opcode xtensa_call12_opcode;
730 static xtensa_opcode xtensa_callx0_opcode;
731 static xtensa_opcode xtensa_callx4_opcode;
732 static xtensa_opcode xtensa_callx8_opcode;
733 static xtensa_opcode xtensa_callx12_opcode;
734 static xtensa_opcode xtensa_entry_opcode;
735 static xtensa_opcode xtensa_isync_opcode;
736 static xtensa_opcode xtensa_j_opcode;
737 static xtensa_opcode xtensa_jx_opcode;
738 static xtensa_opcode xtensa_loop_opcode;
739 static xtensa_opcode xtensa_loopnez_opcode;
740 static xtensa_opcode xtensa_loopgtz_opcode;
741 static xtensa_opcode xtensa_nop_n_opcode;
742 static xtensa_opcode xtensa_or_opcode;
743 static xtensa_opcode xtensa_ret_opcode;
744 static xtensa_opcode xtensa_ret_n_opcode;
745 static xtensa_opcode xtensa_retw_opcode;
746 static xtensa_opcode xtensa_retw_n_opcode;
747 static xtensa_opcode xtensa_rsr_opcode;
748 static xtensa_opcode xtensa_waiti_opcode;
751 /* Command-line Options. */
753 bfd_boolean use_literal_section = TRUE;
754 static bfd_boolean align_targets = TRUE;
755 static bfd_boolean align_only_targets = FALSE;
756 static bfd_boolean software_a0_b_retw_interlock = TRUE;
757 static bfd_boolean has_a0_b_retw = FALSE;
758 static bfd_boolean workaround_a0_b_retw = TRUE;
760 static bfd_boolean software_avoid_b_j_loop_end = TRUE;
761 static bfd_boolean workaround_b_j_loop_end = TRUE;
762 static bfd_boolean maybe_has_b_j_loop_end = FALSE;
764 static bfd_boolean software_avoid_short_loop = TRUE;
765 static bfd_boolean workaround_short_loop = TRUE;
766 static bfd_boolean maybe_has_short_loop = FALSE;
768 static bfd_boolean software_avoid_close_loop_end = TRUE;
769 static bfd_boolean workaround_close_loop_end = TRUE;
770 static bfd_boolean maybe_has_close_loop_end = FALSE;
772 /* When avoid_short_loops is true, all loops with early exits must
773 have at least 3 instructions. avoid_all_short_loops is a modifier
774 to the avoid_short_loop flag. In addition to the avoid_short_loop
775 actions, all straightline loopgtz and loopnez must have at least 3
778 static bfd_boolean software_avoid_all_short_loops = TRUE;
779 static bfd_boolean workaround_all_short_loops = TRUE;
781 /* This is on a per-instruction basis. */
782 static bfd_boolean specific_opcode = FALSE;
786 option_density = OPTION_MD_BASE,
795 option_text_section_literals,
796 option_no_text_section_literals,
798 option_align_targets,
799 option_no_align_targets,
801 option_align_only_targets,
802 option_no_align_only_targets,
807 option_workaround_a0_b_retw,
808 option_no_workaround_a0_b_retw,
810 option_workaround_b_j_loop_end,
811 option_no_workaround_b_j_loop_end,
813 option_workaround_short_loop,
814 option_no_workaround_short_loop,
816 option_workaround_all_short_loops,
817 option_no_workaround_all_short_loops,
819 option_workaround_close_loop_end,
820 option_no_workaround_close_loop_end,
822 option_no_workarounds,
824 #ifdef XTENSA_SECTION_RENAME
825 option_literal_section_name,
826 option_text_section_name,
827 option_data_section_name,
828 option_bss_section_name,
829 option_rename_section_name,
836 const char *md_shortopts = "";
838 struct option md_longopts[] =
840 {"density", no_argument, NULL, option_density},
841 {"no-density", no_argument, NULL, option_no_density},
842 /* At least as early as alameda, --[no-]relax didn't work as
843 documented, so as of albany, --[no-]relax is equivalent to
844 --[no-]generics. Both of these will be deprecated in
846 {"relax", no_argument, NULL, option_generics},
847 {"no-relax", no_argument, NULL, option_no_generics},
848 {"generics", no_argument, NULL, option_generics},
849 {"no-generics", no_argument, NULL, option_no_generics},
850 {"text-section-literals", no_argument, NULL, option_text_section_literals},
851 {"no-text-section-literals", no_argument, NULL,
852 option_no_text_section_literals},
853 /* This option was changed from -align-target to -target-align
854 because it conflicted with the "-al" option. */
855 {"target-align", no_argument, NULL, option_align_targets},
856 {"no-target-align", no_argument, NULL,
857 option_no_align_targets},
859 /* This option should do a better job aligning targets because
860 it will only attempt to align targets that are the target of a
862 { "target-align-only", no_argument, NULL, option_align_only_targets },
863 { "no-target-align-only", no_argument, NULL, option_no_align_only_targets },
865 {"longcalls", no_argument, NULL, option_longcalls},
866 {"no-longcalls", no_argument, NULL, option_no_longcalls},
868 {"no-workaround-a0-b-retw", no_argument, NULL,
869 option_no_workaround_a0_b_retw},
870 {"workaround-a0-b-retw", no_argument, NULL, option_workaround_a0_b_retw},
872 {"no-workaround-b-j-loop-end", no_argument, NULL,
873 option_no_workaround_b_j_loop_end},
874 {"workaround-b-j-loop-end", no_argument, NULL,
875 option_workaround_b_j_loop_end},
877 {"no-workaround-short-loops", no_argument, NULL,
878 option_no_workaround_short_loop},
879 {"workaround-short-loops", no_argument, NULL, option_workaround_short_loop},
881 {"no-workaround-all-short-loops", no_argument, NULL,
882 option_no_workaround_all_short_loops},
883 {"workaround-all-short-loop", no_argument, NULL,
884 option_workaround_all_short_loops},
886 {"no-workaround-close-loop-end", no_argument, NULL,
887 option_no_workaround_close_loop_end},
888 {"workaround-close-loop-end", no_argument, NULL,
889 option_workaround_close_loop_end},
891 {"no-workarounds", no_argument, NULL, option_no_workarounds},
893 #ifdef XTENSA_SECTION_RENAME
894 {"literal-section-name", required_argument, NULL,
895 option_literal_section_name},
896 {"text-section-name", required_argument, NULL,
897 option_text_section_name},
898 {"data-section-name", required_argument, NULL,
899 option_data_section_name},
900 {"rename-section", required_argument, NULL,
901 option_rename_section_name},
902 {"bss-section-name", required_argument, NULL,
903 option_bss_section_name},
904 #endif /* XTENSA_SECTION_RENAME */
906 {NULL, no_argument, NULL, 0}
909 size_t md_longopts_size = sizeof md_longopts;
913 md_parse_option (c, arg)
920 if (!density_supported)
922 as_bad (_("'--density' option not supported in this Xtensa "
926 directive_state[directive_density] = TRUE;
928 case option_no_density:
929 directive_state[directive_density] = FALSE;
931 case option_generics:
932 directive_state[directive_generics] = TRUE;
934 case option_no_generics:
935 directive_state[directive_generics] = FALSE;
937 case option_longcalls:
938 directive_state[directive_longcalls] = TRUE;
940 case option_no_longcalls:
941 directive_state[directive_longcalls] = FALSE;
943 case option_text_section_literals:
944 use_literal_section = FALSE;
946 case option_no_text_section_literals:
947 use_literal_section = TRUE;
949 case option_workaround_a0_b_retw:
950 workaround_a0_b_retw = TRUE;
951 software_a0_b_retw_interlock = TRUE;
953 case option_no_workaround_a0_b_retw:
954 workaround_a0_b_retw = FALSE;
955 software_a0_b_retw_interlock = FALSE;
957 case option_workaround_b_j_loop_end:
958 workaround_b_j_loop_end = TRUE;
959 software_avoid_b_j_loop_end = TRUE;
961 case option_no_workaround_b_j_loop_end:
962 workaround_b_j_loop_end = FALSE;
963 software_avoid_b_j_loop_end = FALSE;
966 case option_workaround_short_loop:
967 workaround_short_loop = TRUE;
968 software_avoid_short_loop = TRUE;
970 case option_no_workaround_short_loop:
971 workaround_short_loop = FALSE;
972 software_avoid_short_loop = FALSE;
975 case option_workaround_all_short_loops:
976 workaround_all_short_loops = TRUE;
977 software_avoid_all_short_loops = TRUE;
979 case option_no_workaround_all_short_loops:
980 workaround_all_short_loops = FALSE;
981 software_avoid_all_short_loops = FALSE;
984 case option_workaround_close_loop_end:
985 workaround_close_loop_end = TRUE;
986 software_avoid_close_loop_end = TRUE;
988 case option_no_workaround_close_loop_end:
989 workaround_close_loop_end = FALSE;
990 software_avoid_close_loop_end = FALSE;
993 case option_no_workarounds:
994 workaround_a0_b_retw = FALSE;
995 software_a0_b_retw_interlock = FALSE;
996 workaround_b_j_loop_end = FALSE;
997 software_avoid_b_j_loop_end = FALSE;
998 workaround_short_loop = FALSE;
999 software_avoid_short_loop = FALSE;
1000 workaround_all_short_loops = FALSE;
1001 software_avoid_all_short_loops = FALSE;
1002 workaround_close_loop_end = FALSE;
1003 software_avoid_close_loop_end = FALSE;
1006 case option_align_targets:
1007 align_targets = TRUE;
1009 case option_no_align_targets:
1010 align_targets = FALSE;
1013 case option_align_only_targets:
1014 align_only_targets = TRUE;
1016 case option_no_align_only_targets:
1017 align_only_targets = FALSE;
1020 #ifdef XTENSA_SECTION_RENAME
1021 case option_literal_section_name:
1022 add_section_rename (".literal", arg);
1023 as_warn (_("'--literal-section-name' is deprecated; "
1024 "use '--rename-section .literal=NEWNAME'"));
1027 case option_text_section_name:
1028 add_section_rename (".text", arg);
1029 as_warn (_("'--text-section-name' is deprecated; "
1030 "use '--rename-section .text=NEWNAME'"));
1033 case option_data_section_name:
1034 add_section_rename (".data", arg);
1035 as_warn (_("'--data-section-name' is deprecated; "
1036 "use '--rename-section .data=NEWNAME'"));
1039 case option_bss_section_name:
1040 add_section_rename (".bss", arg);
1041 as_warn (_("'--bss-section-name' is deprecated; "
1042 "use '--rename-section .bss=NEWNAME'"));
1045 case option_rename_section_name:
1046 build_section_rename (arg);
1048 #endif /* XTENSA_SECTION_RENAME */
1051 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1052 should be emitted or not. FIXME: Not implemented. */
1062 md_show_usage (stream)
1065 fputs ("\nXtensa options:\n"
1066 "--[no-]density [Do not] emit density instructions\n"
1067 "--[no-]relax [Do not] perform branch relaxation\n"
1068 "--[no-]generics [Do not] transform instructions\n"
1069 "--[no-]longcalls [Do not] emit 32-bit call sequences\n"
1070 "--[no-]target-align [Do not] try to align branch targets\n"
1071 "--[no-]text-section-literals\n"
1072 " [Do not] put literals in the text section\n"
1073 "--no-workarounds Do not use any Xtensa workarounds\n"
1074 #ifdef XTENSA_SECTION_RENAME
1075 "--rename-section old=new(:old1=new1)*\n"
1076 " Rename section 'old' to 'new'\n"
1077 "\nThe following Xtensa options are deprecated\n"
1078 "--literal-section-name Name of literal section (default .literal)\n"
1079 "--text-section-name Name of text section (default .text)\n"
1080 "--data-section-name Name of data section (default .data)\n"
1081 "--bss-section-name Name of bss section (default .bss)\n"
1087 /* Directive data and functions. */
1089 typedef struct state_stackS_struct
1091 directiveE directive;
1092 bfd_boolean negated;
1093 bfd_boolean old_state;
1097 struct state_stackS_struct *prev;
1100 state_stackS *directive_state_stack;
1102 const pseudo_typeS md_pseudo_table[] =
1104 {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */
1105 {"literal_position", xtensa_literal_position, 0},
1106 {"frame", s_ignore, 0}, /* formerly used for STABS debugging */
1108 {"begin", xtensa_begin_directive, 0},
1109 {"end", xtensa_end_directive, 0},
1110 {"literal", xtensa_literal_pseudo, 0},
1118 return directive_state[directive_generics];
1125 return directive_state[directive_longcalls];
1130 code_density_available ()
1132 return directive_state[directive_density];
1139 return use_generics ();
1144 directive_push (directive, negated, datum)
1145 directiveE directive;
1146 bfd_boolean negated;
1151 state_stackS *stack = (state_stackS *) xmalloc (sizeof (state_stackS));
1153 as_where (&file, &line);
1155 stack->directive = directive;
1156 stack->negated = negated;
1157 stack->old_state = directive_state[directive];
1160 stack->datum = datum;
1161 stack->prev = directive_state_stack;
1162 directive_state_stack = stack;
1164 directive_state[directive] = !negated;
1168 directive_pop (directive, negated, file, line, datum)
1169 directiveE *directive;
1170 bfd_boolean *negated;
1175 state_stackS *top = directive_state_stack;
1177 if (!directive_state_stack)
1179 as_bad (_("unmatched end directive"));
1180 *directive = directive_none;
1184 directive_state[directive_state_stack->directive] = top->old_state;
1185 *directive = top->directive;
1186 *negated = top->negated;
1189 *datum = top->datum;
1190 directive_state_stack = top->prev;
1196 directive_balance ()
1198 while (directive_state_stack)
1200 directiveE directive;
1201 bfd_boolean negated;
1206 directive_pop (&directive, &negated, &file, &line, &datum);
1207 as_warn_where ((char *) file, line,
1208 _(".begin directive with no matching .end directive"));
1214 inside_directive (dir)
1217 state_stackS *top = directive_state_stack;
1219 while (top && top->directive != dir)
1222 return (top != NULL);
1227 get_directive (directive, negated)
1228 directiveE *directive;
1229 bfd_boolean *negated;
1234 if (strncmp (input_line_pointer, "no-", 3) != 0)
1239 input_line_pointer += 3;
1242 len = strspn (input_line_pointer,
1243 "abcdefghijklmnopqrstuvwxyz_/0123456789.");
1245 for (i = 0; i < sizeof (directive_info) / sizeof (*directive_info); ++i)
1247 if (strncmp (input_line_pointer, directive_info[i].name, len) == 0)
1249 input_line_pointer += len;
1250 *directive = (directiveE) i;
1251 if (*negated && !directive_info[i].can_be_negated)
1252 as_bad (_("directive %s can't be negated"),
1253 directive_info[i].name);
1258 as_bad (_("unknown directive"));
1259 *directive = (directiveE) XTENSA_UNDEFINED;
1264 xtensa_begin_directive (ignore)
1265 int ignore ATTRIBUTE_UNUSED;
1267 directiveE directive;
1268 bfd_boolean negated;
1273 get_directive (&directive, &negated);
1274 if (directive == (directiveE) XTENSA_UNDEFINED)
1276 discard_rest_of_line ();
1282 case directive_literal:
1283 state = (emit_state *) xmalloc (sizeof (emit_state));
1284 xtensa_switch_to_literal_fragment (state);
1285 directive_push (directive_literal, negated, state);
1288 case directive_literal_prefix:
1289 /* Check to see if the current fragment is a literal
1290 fragment. If it is, then this operation is not allowed. */
1291 if (frag_now->tc_frag_data.is_literal)
1293 as_bad (_("cannot set literal_prefix inside literal fragment"));
1297 /* Allocate the literal state for this section and push
1298 onto the directive stack. */
1299 ls = xmalloc (sizeof (lit_state));
1302 *ls = default_lit_sections;
1304 directive_push (directive_literal_prefix, negated, ls);
1306 /* Parse the new prefix from the input_line_pointer. */
1308 len = strspn (input_line_pointer,
1309 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1310 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1312 /* Process the new prefix. */
1313 xtensa_literal_prefix (input_line_pointer, len);
1315 /* Skip the name in the input line. */
1316 input_line_pointer += len;
1319 case directive_freeregs:
1320 /* This information is currently unused, but we'll accept the statement
1321 and just discard the rest of the line. This won't check the syntax,
1322 but it will accept every correct freeregs directive. */
1323 input_line_pointer += strcspn (input_line_pointer, "\n");
1324 directive_push (directive_freeregs, negated, 0);
1327 case directive_density:
1328 if (!density_supported && !negated)
1330 as_warn (_("Xtensa density option not supported; ignored"));
1336 directive_push (directive, negated, 0);
1340 demand_empty_rest_of_line ();
1345 xtensa_end_directive (ignore)
1346 int ignore ATTRIBUTE_UNUSED;
1348 directiveE begin_directive, end_directive;
1349 bfd_boolean begin_negated, end_negated;
1355 get_directive (&end_directive, &end_negated);
1356 if (end_directive == (directiveE) XTENSA_UNDEFINED)
1358 discard_rest_of_line ();
1362 if (end_directive == directive_density && !density_supported && !end_negated)
1364 as_warn (_("Xtensa density option not supported; ignored"));
1365 demand_empty_rest_of_line ();
1369 directive_pop (&begin_directive, &begin_negated, &file, &line,
1370 (const void **) &state);
1372 if (begin_directive != directive_none)
1374 if (begin_directive != end_directive || begin_negated != end_negated)
1376 as_bad (_("does not match begin %s%s at %s:%d"),
1377 begin_negated ? "no-" : "",
1378 directive_info[begin_directive].name, file, line);
1382 switch (end_directive)
1384 case directive_literal:
1385 frag_var (rs_fill, 0, 0, 0, NULL, 0, NULL);
1386 xtensa_restore_emit_state (state);
1390 case directive_freeregs:
1393 case directive_literal_prefix:
1394 /* Restore the default collection sections from saved state. */
1395 s = (lit_state *) state;
1398 if (use_literal_section)
1399 default_lit_sections = *s;
1401 /* free the state storage */
1411 demand_empty_rest_of_line ();
1415 /* Place an aligned literal fragment at the current location. */
1418 xtensa_literal_position (ignore)
1419 int ignore ATTRIBUTE_UNUSED;
1421 if (inside_directive (directive_literal))
1422 as_warn (_(".literal_position inside literal directive; ignoring"));
1423 else if (!use_literal_section)
1424 xtensa_mark_literal_pool_location (FALSE);
1426 demand_empty_rest_of_line ();
1430 /* Support .literal label, value@plt + offset. */
1433 xtensa_literal_pseudo (ignored)
1434 int ignored ATTRIBUTE_UNUSED;
1437 char *p, *base_name;
1442 /* If we are using text-section literals, then this is the right value... */
1445 base_name = input_line_pointer;
1447 xtensa_switch_to_literal_fragment (&state);
1449 /* ...but if we aren't using text-section-literals, then we
1450 need to put them in the section we just switched to. */
1451 if (use_literal_section)
1454 /* All literals are aligned to four-byte boundaries
1455 which is handled by switch to literal fragment. */
1456 /* frag_align (2, 0, 0); */
1458 c = get_symbol_end ();
1459 /* Just after name is now '\0'. */
1460 p = input_line_pointer;
1464 if (*input_line_pointer != ',' && *input_line_pointer != ':')
1466 as_bad (_("expected comma or colon after symbol name; "
1467 "rest of line ignored"));
1468 ignore_rest_of_line ();
1469 xtensa_restore_emit_state (&state);
1478 input_line_pointer++; /* skip ',' or ':' */
1482 /* We only support 4-byte literals with .literal. */
1483 emit_expr (&expP, 4);
1485 while (*input_line_pointer == ',');
1489 demand_empty_rest_of_line ();
1491 xtensa_restore_emit_state (&state);
1496 xtensa_literal_prefix (start, len)
1500 segT s_now; /* Storage for the current seg and subseg. */
1502 char *name; /* Pointer to the name itself. */
1505 if (!use_literal_section)
1508 /* Store away the current section and subsection. */
1510 ss_now = now_subseg;
1512 /* Get a null-terminated copy of the name. */
1513 name = xmalloc (len + 1);
1516 strncpy (name, start, len);
1519 /* Allocate the sections (interesting note: the memory pointing to
1520 the name is actually used for the name by the new section). */
1521 newname = xmalloc (len + strlen (".literal") + 1);
1522 strcpy (newname, name);
1523 strcpy (newname + len, ".literal");
1525 /* Note that retrieve_literal_seg does not create a segment if
1526 it already exists. */
1527 default_lit_sections.lit_seg = NULL; /* retrieved on demand */
1529 /* Canonicalizing section names allows renaming literal
1530 sections to occur correctly. */
1531 default_lit_sections.lit_seg_name =
1532 tc_canonicalize_symbol_name (newname);
1536 /* Restore the current section and subsection and set the
1537 generation into the old segment. */
1538 subseg_set (s_now, ss_now);
1542 /* Parsing and Idiom Translation. */
1545 expression_end (name)
1567 #define ERROR_REG_NUM ((unsigned) -1)
1570 tc_get_register (prefix)
1574 const char *next_expr;
1575 const char *old_line_pointer;
1578 old_line_pointer = input_line_pointer;
1580 if (*input_line_pointer == '$')
1581 ++input_line_pointer;
1583 /* Accept "sp" as a synonym for "a1". */
1584 if (input_line_pointer[0] == 's' && input_line_pointer[1] == 'p'
1585 && expression_end (input_line_pointer + 2))
1587 input_line_pointer += 2;
1588 return 1; /* AR[1] */
1591 while (*input_line_pointer++ == *prefix++)
1593 --input_line_pointer;
1598 as_bad (_("bad register name: %s"), old_line_pointer);
1599 return ERROR_REG_NUM;
1602 if (!ISDIGIT ((unsigned char) *input_line_pointer))
1604 as_bad (_("bad register number: %s"), input_line_pointer);
1605 return ERROR_REG_NUM;
1610 while (ISDIGIT ((int) *input_line_pointer))
1611 reg = reg * 10 + *input_line_pointer++ - '0';
1613 if (!(next_expr = expression_end (input_line_pointer)))
1615 as_bad (_("bad register name: %s"), old_line_pointer);
1616 return ERROR_REG_NUM;
1619 input_line_pointer = (char *) next_expr;
1625 #define PLT_SUFFIX "@PLT"
1626 #define plt_suffix "@plt"
1629 expression_maybe_register (opnd, tok)
1630 xtensa_operand opnd;
1633 char *kind = xtensa_operand_kind (opnd);
1635 if ((strlen (kind) == 1)
1636 && (*kind == 'l' || *kind == 'L' || *kind == 'i' || *kind == 'r'))
1638 segT t = expression (tok);
1639 if (t == absolute_section && operand_is_pcrel_label (opnd))
1641 assert (tok->X_op == O_constant);
1642 tok->X_op = O_symbol;
1643 tok->X_add_symbol = &abs_symbol;
1645 if (tok->X_op == O_symbol
1646 && (!strncmp (input_line_pointer, PLT_SUFFIX,
1647 strlen (PLT_SUFFIX) - 1)
1648 || !strncmp (input_line_pointer, plt_suffix,
1649 strlen (plt_suffix) - 1)))
1651 tok->X_add_symbol->sy_tc.plt = 1;
1652 input_line_pointer += strlen (plt_suffix);
1657 unsigned reg = tc_get_register (kind);
1659 if (reg != ERROR_REG_NUM) /* Already errored */
1662 if ((xtensa_operand_encode (opnd, &buf) != xtensa_encode_result_ok)
1663 || (reg != xtensa_operand_decode (opnd, buf)))
1664 as_bad (_("register number out of range"));
1667 tok->X_op = O_register;
1668 tok->X_add_symbol = 0;
1669 tok->X_add_number = reg;
1674 /* Split up the arguments for an opcode or pseudo-op. */
1677 tokenize_arguments (args, str)
1681 char *old_input_line_pointer;
1682 bfd_boolean saw_comma = FALSE;
1683 bfd_boolean saw_arg = FALSE;
1685 char *arg_end, *arg;
1688 /* Save and restore input_line_pointer around this function. */
1689 old_input_line_pointer = input_line_pointer;
1690 input_line_pointer = str;
1692 while (*input_line_pointer)
1695 switch (*input_line_pointer)
1701 input_line_pointer++;
1702 if (saw_comma || !saw_arg)
1708 if (!saw_comma && saw_arg)
1711 arg_end = input_line_pointer + 1;
1712 while (!expression_end (arg_end))
1715 arg_len = arg_end - input_line_pointer;
1716 arg = (char *) xmalloc (arg_len + 1);
1717 args[num_args] = arg;
1719 strncpy (arg, input_line_pointer, arg_len);
1720 arg[arg_len] = '\0';
1722 input_line_pointer = arg_end;
1733 input_line_pointer = old_input_line_pointer;
1737 input_line_pointer = old_input_line_pointer;
1742 /* Parse the arguments to an opcode. Return true on error. */
1745 parse_arguments (insn, num_args, arg_strings)
1750 expressionS *tok = insn->tok;
1751 xtensa_opcode opcode = insn->opcode;
1752 bfd_boolean had_error = TRUE;
1753 xtensa_isa isa = xtensa_default_isa;
1755 int opcode_operand_count;
1756 int actual_operand_count = 0;
1757 xtensa_operand opnd = NULL;
1758 char *old_input_line_pointer;
1760 if (insn->insn_type == ITYPE_LITERAL)
1761 opcode_operand_count = 1;
1763 opcode_operand_count = xtensa_num_operands (isa, opcode);
1765 memset (tok, 0, sizeof (*tok) * MAX_INSN_ARGS);
1767 /* Save and restore input_line_pointer around this function. */
1768 old_input_line_pointer = input_line_pointer;
1770 for (n = 0; n < num_args; n++)
1772 input_line_pointer = arg_strings[n];
1774 if (actual_operand_count >= opcode_operand_count)
1776 as_warn (_("too many arguments"));
1779 assert (actual_operand_count < MAX_INSN_ARGS);
1781 opnd = xtensa_get_operand (isa, opcode, actual_operand_count);
1782 expression_maybe_register (opnd, tok);
1784 if (tok->X_op == O_illegal || tok->X_op == O_absent)
1786 actual_operand_count++;
1790 insn->ntok = tok - insn->tok;
1794 input_line_pointer = old_input_line_pointer;
1800 xg_reverse_shift_count (cnt_argp)
1803 char *cnt_arg, *new_arg;
1804 cnt_arg = *cnt_argp;
1806 /* replace the argument with "31-(argument)" */
1807 new_arg = (char *) xmalloc (strlen (cnt_arg) + 6);
1808 sprintf (new_arg, "31-(%s)", cnt_arg);
1811 *cnt_argp = new_arg;
1815 /* If "arg" is a constant expression, return non-zero with the value
1819 xg_arg_is_constant (arg, valp)
1824 char *save_ptr = input_line_pointer;
1826 input_line_pointer = arg;
1828 input_line_pointer = save_ptr;
1830 if (exp.X_op == O_constant)
1832 *valp = exp.X_add_number;
1841 xg_replace_opname (popname, newop)
1846 *popname = (char *) xmalloc (strlen (newop) + 1);
1847 strcpy (*popname, newop);
1852 xg_check_num_args (pnum_args, expected_num, opname, arg_strings)
1858 int num_args = *pnum_args;
1860 if (num_args < expected_num)
1862 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
1863 num_args, opname, expected_num);
1867 if (num_args > expected_num)
1869 as_warn (_("too many operands (%d) for '%s'; expected %d"),
1870 num_args, opname, expected_num);
1871 while (num_args-- > expected_num)
1873 free (arg_strings[num_args]);
1874 arg_strings[num_args] = 0;
1876 *pnum_args = expected_num;
1885 xg_translate_sysreg_op (popname, pnum_args, arg_strings)
1890 char *opname, *new_opname;
1892 bfd_boolean has_underbar = FALSE;
1897 has_underbar = TRUE;
1901 /* Opname == [rw]ur... */
1903 if (opname[3] == '\0')
1905 /* If the register is not specified as part of the opcode,
1906 then get it from the operand and move it to the opcode. */
1908 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
1911 if (!xg_arg_is_constant (arg_strings[1], &val))
1913 as_bad (_("register number for `%s' is not a constant"), opname);
1916 if ((unsigned) val > 255)
1918 as_bad (_("register number (%ld) for `%s' is out of range"),
1923 /* Remove the last argument, which is now part of the opcode. */
1924 free (arg_strings[1]);
1928 /* Translate the opcode. */
1929 new_opname = (char *) xmalloc (8);
1930 sprintf (new_opname, "%s%cur%u", (has_underbar ? "_" : ""),
1931 opname[0], (unsigned) val);
1933 *popname = new_opname;
1940 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
1941 Returns non-zero if an error was found. */
1944 xg_translate_idioms (popname, pnum_args, arg_strings)
1949 char *opname = *popname;
1950 bfd_boolean has_underbar = FALSE;
1954 has_underbar = TRUE;
1958 if (strcmp (opname, "mov") == 0)
1960 if (!has_underbar && code_density_available ())
1961 xg_replace_opname (popname, "mov.n");
1964 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
1966 xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
1967 arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1);
1968 strcpy (arg_strings[2], arg_strings[1]);
1974 if (strcmp (opname, "bbsi.l") == 0)
1976 if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
1978 xg_replace_opname (popname, (has_underbar ? "_bbsi" : "bbsi"));
1979 if (target_big_endian)
1980 xg_reverse_shift_count (&arg_strings[1]);
1984 if (strcmp (opname, "bbci.l") == 0)
1986 if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
1988 xg_replace_opname (popname, (has_underbar ? "_bbci" : "bbci"));
1989 if (target_big_endian)
1990 xg_reverse_shift_count (&arg_strings[1]);
1994 if (strcmp (opname, "nop") == 0)
1996 if (!has_underbar && code_density_available ())
1997 xg_replace_opname (popname, "nop.n");
2000 if (xg_check_num_args (pnum_args, 0, opname, arg_strings))
2002 xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
2003 arg_strings[0] = (char *) xmalloc (3);
2004 arg_strings[1] = (char *) xmalloc (3);
2005 arg_strings[2] = (char *) xmalloc (3);
2006 strcpy (arg_strings[0], "a1");
2007 strcpy (arg_strings[1], "a1");
2008 strcpy (arg_strings[2], "a1");
2014 if ((opname[0] == 'r' || opname[0] == 'w')
2016 && opname[2] == 'r')
2017 return xg_translate_sysreg_op (popname, pnum_args, arg_strings);
2020 /* WIDENING DENSITY OPCODES
2022 questionable relaxations (widening) from old "tai" idioms:
2032 Note: this incomplete list was imported to match the "tai"
2033 behavior; other density opcodes are not handled.
2035 The xtensa-relax code may know how to do these but it doesn't do
2036 anything when these density opcodes appear inside a no-density
2037 region. Somehow GAS should either print an error when that happens
2038 or do the widening. The old "tai" behavior was to do the widening.
2039 For now, I'll make it widen but print a warning.
2041 FIXME: GAS needs to detect density opcodes inside no-density
2042 regions and treat them as errors. This code should be removed
2043 when that is done. */
2047 && density_supported
2048 && !code_density_available ())
2050 if (strcmp (opname, "add.n") == 0)
2051 xg_replace_opname (popname, "add");
2053 else if (strcmp (opname, "beqz.n") == 0)
2054 xg_replace_opname (popname, "beqz");
2056 else if (strcmp (opname, "ret.n") == 0)
2057 xg_replace_opname (popname, "ret");
2059 else if (strcmp (opname, "retw.n") == 0)
2060 xg_replace_opname (popname, "retw");
2062 else if (strcmp (opname, "movi.n") == 0)
2063 xg_replace_opname (popname, "movi");
2065 else if (strcmp (opname, "mov.n") == 0)
2067 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
2069 xg_replace_opname (popname, "or");
2070 arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1);
2071 strcpy (arg_strings[2], arg_strings[1]);
2075 else if (strcmp (opname, "nop.n") == 0)
2077 if (xg_check_num_args (pnum_args, 0, opname, arg_strings))
2079 xg_replace_opname (popname, "or");
2080 arg_strings[0] = (char *) xmalloc (3);
2081 arg_strings[1] = (char *) xmalloc (3);
2082 arg_strings[2] = (char *) xmalloc (3);
2083 strcpy (arg_strings[0], "a1");
2084 strcpy (arg_strings[1], "a1");
2085 strcpy (arg_strings[2], "a1");
2094 /* Functions for dealing with the Xtensa ISA. */
2096 /* Return true if the given operand is an immed or target instruction,
2097 i.e., has a reloc associated with it. Currently, this is only true
2098 if the operand kind is "i, "l" or "L". */
2101 operand_is_immed (opnd)
2102 xtensa_operand opnd;
2104 const char *opkind = xtensa_operand_kind (opnd);
2105 if (opkind[0] == '\0' || opkind[1] != '\0')
2118 /* Return true if the given operand is a pc-relative label. This is
2119 true for "l", "L", and "r" operand kinds. */
2122 operand_is_pcrel_label (opnd)
2123 xtensa_operand opnd;
2125 const char *opkind = xtensa_operand_kind (opnd);
2126 if (opkind[0] == '\0' || opkind[1] != '\0')
2139 /* Currently the assembler only allows us to use a single target per
2140 fragment. Because of this, only one operand for a given
2141 instruction may be symbolic. If there is an operand of kind "lrL",
2142 the last one is chosen. Otherwise, the result is the number of the
2143 last operand of type "i", and if there are none of those, we fail
2147 get_relaxable_immed (opcode)
2148 xtensa_opcode opcode;
2150 int last_immed = -1;
2152 xtensa_operand operand;
2154 if (opcode == XTENSA_UNDEFINED)
2157 noperands = xtensa_num_operands (xtensa_default_isa, opcode);
2158 for (opi = noperands - 1; opi >= 0; opi--)
2160 operand = xtensa_get_operand (xtensa_default_isa, opcode, opi);
2161 if (operand_is_pcrel_label (operand))
2163 if (last_immed == -1 && operand_is_immed (operand))
2171 get_opcode_from_buf (buf)
2174 static xtensa_insnbuf insnbuf = NULL;
2175 xtensa_opcode opcode;
2176 xtensa_isa isa = xtensa_default_isa;
2178 insnbuf = xtensa_insnbuf_alloc (isa);
2180 xtensa_insnbuf_from_chars (isa, insnbuf, buf);
2181 opcode = xtensa_decode_insn (isa, insnbuf);
2187 is_direct_call_opcode (opcode)
2188 xtensa_opcode opcode;
2190 if (opcode == XTENSA_UNDEFINED)
2193 return (opcode == xtensa_call0_opcode
2194 || opcode == xtensa_call4_opcode
2195 || opcode == xtensa_call8_opcode
2196 || opcode == xtensa_call12_opcode);
2201 is_call_opcode (opcode)
2202 xtensa_opcode opcode;
2204 if (is_direct_call_opcode (opcode))
2207 if (opcode == XTENSA_UNDEFINED)
2210 return (opcode == xtensa_callx0_opcode
2211 || opcode == xtensa_callx4_opcode
2212 || opcode == xtensa_callx8_opcode
2213 || opcode == xtensa_callx12_opcode);
2217 /* Return true if the opcode is an entry opcode. This is used because
2218 "entry" adds an implicit ".align 4" and also the entry instruction
2219 has an extra check for an operand value. */
2222 is_entry_opcode (opcode)
2223 xtensa_opcode opcode;
2225 if (opcode == XTENSA_UNDEFINED)
2228 return (opcode == xtensa_entry_opcode);
2232 /* Return true if it is one of the loop opcodes. Loops are special
2233 because they need automatic alignment and they have a relaxation so
2234 complex that we hard-coded it. */
2237 is_loop_opcode (opcode)
2238 xtensa_opcode opcode;
2240 if (opcode == XTENSA_UNDEFINED)
2243 return (opcode == xtensa_loop_opcode
2244 || opcode == xtensa_loopnez_opcode
2245 || opcode == xtensa_loopgtz_opcode);
2250 is_the_loop_opcode (opcode)
2251 xtensa_opcode opcode;
2253 if (opcode == XTENSA_UNDEFINED)
2256 return (opcode == xtensa_loop_opcode);
2261 is_jx_opcode (opcode)
2262 xtensa_opcode opcode;
2264 if (opcode == XTENSA_UNDEFINED)
2267 return (opcode == xtensa_jx_opcode);
2271 /* Return true if the opcode is a retw or retw.n.
2272 Needed to add nops to avoid a hardware interlock issue. */
2275 is_windowed_return_opcode (opcode)
2276 xtensa_opcode opcode;
2278 if (opcode == XTENSA_UNDEFINED)
2281 return (opcode == xtensa_retw_opcode || opcode == xtensa_retw_n_opcode);
2285 /* Return true if the opcode type is "l" and the opcode is NOT a jump. */
2288 is_conditional_branch_opcode (opcode)
2289 xtensa_opcode opcode;
2291 xtensa_isa isa = xtensa_default_isa;
2294 if (opcode == xtensa_j_opcode && opcode != XTENSA_UNDEFINED)
2297 num_ops = xtensa_num_operands (isa, opcode);
2298 for (i = 0; i < num_ops; i++)
2300 xtensa_operand operand = xtensa_get_operand (isa, opcode, i);
2301 if (strcmp (xtensa_operand_kind (operand), "l") == 0)
2308 /* Return true if the given opcode is a conditional branch
2309 instruction, i.e., currently this is true if the instruction
2310 is a jx or has an operand with 'l' type and is not a loop. */
2313 is_branch_or_jump_opcode (opcode)
2314 xtensa_opcode opcode;
2318 if (opcode == XTENSA_UNDEFINED)
2321 if (is_loop_opcode (opcode))
2324 if (is_jx_opcode (opcode))
2327 op_count = xtensa_num_operands (xtensa_default_isa, opcode);
2328 for (opn = 0; opn < op_count; opn++)
2330 xtensa_operand opnd =
2331 xtensa_get_operand (xtensa_default_isa, opcode, opn);
2332 const char *opkind = xtensa_operand_kind (opnd);
2333 if (opkind && opkind[0] == 'l' && opkind[1] == '\0')
2340 /* Convert from operand numbers to BFD relocation type code.
2341 Return BFD_RELOC_NONE on failure. */
2343 bfd_reloc_code_real_type
2344 opnum_to_reloc (opnum)
2350 return BFD_RELOC_XTENSA_OP0;
2352 return BFD_RELOC_XTENSA_OP1;
2354 return BFD_RELOC_XTENSA_OP2;
2358 return BFD_RELOC_NONE;
2362 /* Convert from BFD relocation type code to operand number.
2363 Return -1 on failure. */
2366 reloc_to_opnum (reloc)
2367 bfd_reloc_code_real_type reloc;
2371 case BFD_RELOC_XTENSA_OP0:
2373 case BFD_RELOC_XTENSA_OP1:
2375 case BFD_RELOC_XTENSA_OP2:
2385 xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line)
2386 xtensa_insnbuf insnbuf;
2387 xtensa_opcode opcode;
2388 xtensa_operand operand;
2393 xtensa_encode_result encode_result;
2394 uint32 valbuf = value;
2396 encode_result = xtensa_operand_encode (operand, &valbuf);
2398 switch (encode_result)
2400 case xtensa_encode_result_ok:
2402 case xtensa_encode_result_align:
2403 as_bad_where ((char *) file, line,
2404 _("operand %d not properly aligned for '%s'"),
2405 value, xtensa_opcode_name (xtensa_default_isa, opcode));
2407 case xtensa_encode_result_not_in_table:
2408 as_bad_where ((char *) file, line,
2409 _("operand %d not in immediate table for '%s'"),
2410 value, xtensa_opcode_name (xtensa_default_isa, opcode));
2412 case xtensa_encode_result_too_high:
2413 as_bad_where ((char *) file, line,
2414 _("operand %d too large for '%s'"), value,
2415 xtensa_opcode_name (xtensa_default_isa, opcode));
2417 case xtensa_encode_result_too_low:
2418 as_bad_where ((char *) file, line,
2419 _("operand %d too small for '%s'"), value,
2420 xtensa_opcode_name (xtensa_default_isa, opcode));
2422 case xtensa_encode_result_not_ok:
2423 as_bad_where ((char *) file, line,
2424 _("operand %d is invalid for '%s'"), value,
2425 xtensa_opcode_name (xtensa_default_isa, opcode));
2431 xtensa_operand_set_field (operand, insnbuf, valbuf);
2436 xtensa_insnbuf_get_operand (insnbuf, opcode, opnum)
2437 xtensa_insnbuf insnbuf;
2438 xtensa_opcode opcode;
2441 xtensa_operand op = xtensa_get_operand (xtensa_default_isa, opcode, opnum);
2442 return xtensa_operand_decode (op, xtensa_operand_get_field (op, insnbuf));
2447 xtensa_insnbuf_set_immediate_field (opcode, insnbuf, value, file, line)
2448 xtensa_opcode opcode;
2449 xtensa_insnbuf insnbuf;
2454 xtensa_isa isa = xtensa_default_isa;
2455 int last_opnd = xtensa_num_operands (isa, opcode) - 1;
2456 xtensa_operand operand = xtensa_get_operand (isa, opcode, last_opnd);
2457 xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line);
2462 is_negatable_branch (insn)
2465 xtensa_isa isa = xtensa_default_isa;
2467 int num_ops = xtensa_num_operands (isa, insn->opcode);
2469 for (i = 0; i < num_ops; i++)
2471 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
2472 char *kind = xtensa_operand_kind (opnd);
2473 if (strlen (kind) == 1 && *kind == 'l')
2480 /* Lists for recording various properties of symbols. */
2482 typedef struct symbol_consS_struct
2485 /* These are used for the target taken. */
2486 int is_loop_target:1;
2487 int is_branch_target:1;
2490 struct symbol_consS_struct *rest;
2493 symbol_consS *defined_symbols = 0;
2494 symbol_consS *branch_targets = 0;
2498 xtensa_define_label (sym)
2501 symbol_consS *cons = (symbol_consS *) xmalloc (sizeof (symbol_consS));
2504 cons->is_branch_target = 0;
2505 cons->is_loop_target = 0;
2506 cons->is_literal = generating_literals ? 1 : 0;
2508 cons->rest = defined_symbols;
2509 defined_symbols = cons;
2514 add_target_symbol (sym, is_loop)
2516 bfd_boolean is_loop;
2518 symbol_consS *cons, *sym_e;
2520 for (sym_e = branch_targets; sym_e; sym_e = sym_e->rest)
2522 if (sym_e->first == sym)
2525 sym_e->is_loop_target = 1;
2527 sym_e->is_branch_target = 1;
2532 cons = (symbol_consS *) xmalloc (sizeof (symbol_consS));
2534 cons->is_branch_target = (is_loop ? 0 : 1);
2535 cons->is_loop_target = (is_loop ? 1 : 0);
2536 cons->rest = branch_targets;
2537 branch_targets = cons;
2541 /* Find the symbol at a given position. (Note: the "loops_ok"
2542 argument is provided to allow ignoring labels that define loop
2543 ends. This fixes a bug where the NOPs to align a loop opcode were
2544 included in a previous zero-cost loop:
2563 This argument is used to prevent moving the NOP to before the
2564 loop-end label, which is what you want in this special case.) */
2567 xtensa_find_label (fragP, offset, loops_ok)
2570 bfd_boolean loops_ok;
2572 symbol_consS *consP;
2574 for (consP = defined_symbols; consP; consP = consP->rest)
2576 symbolS *symP = consP->first;
2578 if (S_GET_SEGMENT (symP) == now_seg
2579 && symbol_get_frag (symP) == fragP
2580 && symbol_constant_p (symP)
2581 && S_GET_VALUE (symP) == fragP->fr_address + (unsigned) offset
2582 && (loops_ok || !is_loop_target_label (symP)))
2590 map_over_defined_symbols (fn)
2591 void (*fn) PARAMS ((symbolS *));
2593 symbol_consS *sym_cons;
2595 for (sym_cons = defined_symbols; sym_cons; sym_cons = sym_cons->rest)
2596 fn (sym_cons->first);
2601 is_loop_target_label (sym)
2604 symbol_consS *sym_e;
2606 for (sym_e = branch_targets; sym_e; sym_e = sym_e->rest)
2608 if (sym_e->first == sym)
2609 return sym_e->is_loop_target;
2615 /* Walk over all of the symbols that are branch target labels and
2616 loop target labels. Mark the associated fragments for these with
2617 the appropriate flags. */
2620 xtensa_mark_target_fragments ()
2622 symbol_consS *sym_e;
2624 for (sym_e = branch_targets; sym_e; sym_e = sym_e->rest)
2626 symbolS *sym = sym_e->first;
2628 if (symbol_get_frag (sym)
2629 && symbol_constant_p (sym)
2630 && S_GET_VALUE (sym) == 0)
2632 if (sym_e->is_branch_target)
2633 symbol_get_frag (sym)->tc_frag_data.is_branch_target = TRUE;
2634 if (sym_e->is_loop_target)
2635 symbol_get_frag (sym)->tc_frag_data.is_loop_target = TRUE;
2641 /* Various Other Internal Functions. */
2644 is_unique_insn_expansion (r)
2647 if (!r->to_instr || r->to_instr->next != NULL)
2649 if (r->to_instr->typ != INSTR_INSTR)
2656 xg_get_insn_size (insn)
2659 assert (insn->insn_type == ITYPE_INSN);
2660 return xtensa_insn_length (xtensa_default_isa, insn->opcode);
2665 xg_get_build_instr_size (insn)
2668 assert (insn->typ == INSTR_INSTR);
2669 return xtensa_insn_length (xtensa_default_isa, insn->opcode);
2674 xg_is_narrow_insn (insn)
2677 TransitionTable *table = xg_build_widen_table ();
2680 assert (insn->insn_type == ITYPE_INSN);
2681 assert (insn->opcode < table->num_opcodes);
2683 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2685 TransitionRule *rule = l->rule;
2687 if (xg_instruction_matches_rule (insn, rule)
2688 && is_unique_insn_expansion (rule))
2690 /* It only generates one instruction... */
2691 assert (insn->insn_type == ITYPE_INSN);
2692 /* ...and it is a larger instruction. */
2693 if (xg_get_insn_size (insn)
2694 < xg_get_build_instr_size (rule->to_instr))
2702 return (num_match == 1);
2707 xg_is_single_relaxable_insn (insn)
2710 TransitionTable *table = xg_build_widen_table ();
2713 assert (insn->insn_type == ITYPE_INSN);
2714 assert (insn->opcode < table->num_opcodes);
2716 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2718 TransitionRule *rule = l->rule;
2720 if (xg_instruction_matches_rule (insn, rule)
2721 && is_unique_insn_expansion (rule))
2723 assert (insn->insn_type == ITYPE_INSN);
2724 /* ... and it is a larger instruction. */
2725 if (xg_get_insn_size (insn)
2726 <= xg_get_build_instr_size (rule->to_instr))
2734 return (num_match == 1);
2738 /* Return the largest size instruction that this instruction can
2739 expand to. Currently, in all cases, this is 3 bytes. Of course we
2740 could just calculate this once and generate a table. */
2743 xg_get_max_narrow_insn_size (opcode)
2744 xtensa_opcode opcode;
2746 /* Go ahead and compute it, but it better be 3. */
2747 TransitionTable *table = xg_build_widen_table ();
2749 int old_size = xtensa_insn_length (xtensa_default_isa, opcode);
2750 assert (opcode < table->num_opcodes);
2752 /* Actually we can do better. Check to see of Only one applies. */
2753 for (l = table->table[opcode]; l != NULL; l = l->next)
2755 TransitionRule *rule = l->rule;
2757 /* If it only generates one instruction. */
2758 if (is_unique_insn_expansion (rule))
2760 int new_size = xtensa_insn_length (xtensa_default_isa,
2761 rule->to_instr->opcode);
2762 if (new_size > old_size)
2764 assert (new_size == 3);
2773 /* Return the maximum number of bytes this opcode can expand to. */
2776 xg_get_max_insn_widen_size (opcode)
2777 xtensa_opcode opcode;
2779 TransitionTable *table = xg_build_widen_table ();
2781 int max_size = xtensa_insn_length (xtensa_default_isa, opcode);
2783 assert (opcode < table->num_opcodes);
2785 for (l = table->table[opcode]; l != NULL; l = l->next)
2787 TransitionRule *rule = l->rule;
2788 BuildInstr *build_list;
2793 build_list = rule->to_instr;
2794 if (is_unique_insn_expansion (rule))
2796 assert (build_list->typ == INSTR_INSTR);
2797 this_size = xg_get_max_insn_widen_size (build_list->opcode);
2800 for (; build_list != NULL; build_list = build_list->next)
2802 switch (build_list->typ)
2805 this_size += xtensa_insn_length (xtensa_default_isa,
2806 build_list->opcode);
2809 case INSTR_LITERAL_DEF:
2810 case INSTR_LABEL_DEF:
2815 if (this_size > max_size)
2816 max_size = this_size;
2822 /* Return the maximum number of literal bytes this opcode can generate. */
2825 xg_get_max_insn_widen_literal_size (opcode)
2826 xtensa_opcode opcode;
2828 TransitionTable *table = xg_build_widen_table ();
2832 assert (opcode < table->num_opcodes);
2834 for (l = table->table[opcode]; l != NULL; l = l->next)
2836 TransitionRule *rule = l->rule;
2837 BuildInstr *build_list;
2842 build_list = rule->to_instr;
2843 if (is_unique_insn_expansion (rule))
2845 assert (build_list->typ == INSTR_INSTR);
2846 this_size = xg_get_max_insn_widen_literal_size (build_list->opcode);
2849 for (; build_list != NULL; build_list = build_list->next)
2851 switch (build_list->typ)
2853 case INSTR_LITERAL_DEF:
2854 /* hard coded 4-byte literal. */
2858 case INSTR_LABEL_DEF:
2863 if (this_size > max_size)
2864 max_size = this_size;
2871 xg_is_relaxable_insn (insn, lateral_steps)
2875 int steps_taken = 0;
2876 TransitionTable *table = xg_build_widen_table ();
2879 assert (insn->insn_type == ITYPE_INSN);
2880 assert (insn->opcode < table->num_opcodes);
2882 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2884 TransitionRule *rule = l->rule;
2886 if (xg_instruction_matches_rule (insn, rule))
2888 if (steps_taken == lateral_steps)
2898 get_special_literal_symbol ()
2900 static symbolS *sym = NULL;
2903 sym = symbol_find_or_make ("SPECIAL_LITERAL0\001");
2909 get_special_label_symbol ()
2911 static symbolS *sym = NULL;
2914 sym = symbol_find_or_make ("SPECIAL_LABEL0\001");
2919 /* Return true on success. */
2922 xg_build_to_insn (targ, insn, bi)
2930 memset (targ, 0, sizeof (TInsn));
2935 targ->opcode = bi->opcode;
2936 targ->insn_type = ITYPE_INSN;
2937 targ->is_specific_opcode = FALSE;
2939 for (; op != NULL; op = op->next)
2941 int op_num = op->op_num;
2942 int op_data = op->op_data;
2944 assert (op->op_num < MAX_INSN_ARGS);
2946 if (targ->ntok <= op_num)
2947 targ->ntok = op_num + 1;
2952 set_expr_const (&targ->tok[op_num], op_data);
2955 assert (op_data < insn->ntok);
2956 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
2959 sym = get_special_literal_symbol ();
2960 set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
2963 sym = get_special_label_symbol ();
2964 set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
2967 /* currently handles:
2970 OP_OPERAND_F32MINUS */
2971 if (xg_has_userdef_op_fn (op->typ))
2973 assert (op_data < insn->ntok);
2974 if (expr_is_const (&insn->tok[op_data]))
2977 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
2978 val = xg_apply_userdef_op_fn (op->typ,
2981 targ->tok[op_num].X_add_number = val;
2984 return FALSE; /* We cannot use a relocation for this. */
2993 case INSTR_LITERAL_DEF:
2995 targ->opcode = XTENSA_UNDEFINED;
2996 targ->insn_type = ITYPE_LITERAL;
2997 targ->is_specific_opcode = FALSE;
2998 for (; op != NULL; op = op->next)
3000 int op_num = op->op_num;
3001 int op_data = op->op_data;
3002 assert (op->op_num < MAX_INSN_ARGS);
3004 if (targ->ntok <= op_num)
3005 targ->ntok = op_num + 1;
3010 assert (op_data < insn->ntok);
3011 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
3023 case INSTR_LABEL_DEF:
3025 targ->opcode = XTENSA_UNDEFINED;
3026 targ->insn_type = ITYPE_LABEL;
3027 targ->is_specific_opcode = FALSE;
3028 /* Literal with no ops. is a label? */
3029 assert (op == NULL);
3040 /* Return true on success. */
3043 xg_build_to_stack (istack, insn, bi)
3048 for (; bi != NULL; bi = bi->next)
3050 TInsn *next_insn = istack_push_space (istack);
3052 if (!xg_build_to_insn (next_insn, insn, bi))
3059 /* Return true on valid expansion. */
3062 xg_expand_to_stack (istack, insn, lateral_steps)
3067 int stack_size = istack->ninsn;
3068 int steps_taken = 0;
3069 TransitionTable *table = xg_build_widen_table ();
3072 assert (insn->insn_type == ITYPE_INSN);
3073 assert (insn->opcode < table->num_opcodes);
3075 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3077 TransitionRule *rule = l->rule;
3079 if (xg_instruction_matches_rule (insn, rule))
3081 if (lateral_steps == steps_taken)
3085 /* This is it. Expand the rule to the stack. */
3086 if (!xg_build_to_stack (istack, insn, rule->to_instr))
3089 /* Check to see if it fits. */
3090 for (i = stack_size; i < istack->ninsn; i++)
3092 TInsn *insn = &istack->insn[i];
3094 if (insn->insn_type == ITYPE_INSN
3095 && !tinsn_has_symbolic_operands (insn)
3096 && !xg_immeds_fit (insn))
3098 istack->ninsn = stack_size;
3112 xg_expand_narrow (targ, insn)
3116 TransitionTable *table = xg_build_widen_table ();
3119 assert (insn->insn_type == ITYPE_INSN);
3120 assert (insn->opcode < table->num_opcodes);
3122 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3124 TransitionRule *rule = l->rule;
3125 if (xg_instruction_matches_rule (insn, rule)
3126 && is_unique_insn_expansion (rule))
3128 /* Is it a larger instruction? */
3129 if (xg_get_insn_size (insn)
3130 <= xg_get_build_instr_size (rule->to_instr))
3132 xg_build_to_insn (targ, insn, rule->to_instr);
3141 /* Assumes: All immeds are constants. Check that all constants fit
3142 into their immeds; return false if not. */
3145 xg_immeds_fit (insn)
3151 assert (insn->insn_type == ITYPE_INSN);
3152 for (i = 0; i < n; ++i)
3154 const expressionS *expr = &insn->tok[i];
3155 xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa,
3157 if (!operand_is_immed (opnd))
3165 if (xg_check_operand (expr->X_add_number, opnd))
3170 /* The symbol should have a fixup associated with it. */
3179 /* This should only be called after we have an initial
3180 estimate of the addresses. */
3183 xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch)
3191 offsetT target, pc, new_offset;
3195 assert (insn->insn_type == ITYPE_INSN);
3197 for (i = 0; i < n; ++i)
3199 const expressionS *expr = &insn->tok[i];
3200 xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa,
3202 if (!operand_is_immed (opnd))
3209 if (xg_check_operand (expr->X_add_number, opnd))
3214 /* We only allow symbols for pc-relative stuff.
3215 If pc_frag == 0, then we don't have frag locations yet. */
3219 /* If it is PC-relative and the symbol is in the same segment as
3221 if (!xtensa_operand_isPCRelative (opnd)
3222 || S_GET_SEGMENT (expr->X_add_symbol) != pc_seg)
3225 symbolP = expr->X_add_symbol;
3226 target = S_GET_VALUE (symbolP) + expr->X_add_number;
3227 pc = pc_frag->fr_address + pc_offset;
3229 /* If frag has yet to be reached on this pass, assume it
3230 will move by STRETCH just as we did. If this is not so,
3231 it will be because some frag between grows, and that will
3232 force another pass. Beware zero-length frags. There
3233 should be a faster way to do this. */
3235 if (stretch && is_dnrange (pc_frag, symbolP, stretch))
3238 new_offset = xtensa_operand_do_reloc (opnd, target, pc);
3239 if (xg_check_operand (new_offset, opnd))
3244 /* The symbol should have a fixup associated with it. */
3253 /* This will check to see if the value can be converted into the
3254 operand type. It will return true if it does not fit. */
3257 xg_check_operand (value, operand)
3259 xtensa_operand operand;
3261 uint32 valbuf = value;
3262 return (xtensa_operand_encode (operand, &valbuf) != xtensa_encode_result_ok);
3266 /* Check if a symbol is pointing to somewhere after
3267 the start frag, given that the segment has stretched
3268 by stretch during relaxation.
3270 This is more complicated than it might appear at first blush
3271 because of the stretching that goes on. Here is how the check
3274 If the symbol and the frag are in the same segment, then
3275 the symbol could be down range. Note that this function
3276 assumes that start_frag is in now_seg.
3278 If the symbol is pointing to a frag with an address greater than
3279 than the start_frag's address, then it _could_ be down range.
3281 The problem comes because target_frag may or may not have had
3282 stretch bytes added to its address already, depending on if it is
3283 before or after start frag. (And if we knew that, then we wouldn't
3284 need this function.) start_frag has definitely already had stretch
3285 bytes added to its address.
3287 If target_frag's address hasn't been adjusted yet, then to
3288 determine if it comes after start_frag, we need to subtract
3289 stretch from start_frag's address.
3291 If target_frag's address has been adjusted, then it might have
3292 been adjusted such that it comes after start_frag's address minus
3295 So, in that case, we scan for it down stream to within
3296 stretch bytes. We could search to the end of the fr_chain, but
3297 that ends up taking too much time (over a minute on some gnu
3301 is_dnrange (start_frag, sym, stretch)
3306 if (S_GET_SEGMENT (sym) == now_seg)
3308 fragS *cur_frag = symbol_get_frag (sym);
3310 if (cur_frag->fr_address >= start_frag->fr_address - stretch)
3312 int distance = stretch;
3314 while (cur_frag && distance >= 0)
3316 distance -= cur_frag->fr_fix;
3317 if (cur_frag == start_frag)
3319 cur_frag = cur_frag->fr_next;
3328 /* Relax the assembly instruction at least "min_steps".
3329 Return the number of steps taken. */
3332 xg_assembly_relax (istack, insn, pc_seg, pc_frag, pc_offset, min_steps,
3337 fragS *pc_frag; /* If pc_frag == 0, then no pc-relative. */
3338 offsetT pc_offset; /* Offset in fragment. */
3339 int min_steps; /* Minimum number of conversion steps. */
3340 long stretch; /* Number of bytes stretched so far. */
3342 int steps_taken = 0;
3344 /* assert (has no symbolic operands)
3345 Some of its immeds don't fit.
3346 Try to build a relaxed version.
3347 This may go through a couple of stages
3348 of single instruction transformations before
3351 TInsn single_target;
3353 int lateral_steps = 0;
3354 int istack_size = istack->ninsn;
3356 if (xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch)
3357 && steps_taken >= min_steps)
3359 istack_push (istack, insn);
3362 tinsn_copy (¤t_insn, insn);
3364 /* Walk through all of the single instruction expansions. */
3365 while (xg_is_single_relaxable_insn (¤t_insn))
3367 int error_val = xg_expand_narrow (&single_target, ¤t_insn);
3369 assert (!error_val);
3371 if (xg_symbolic_immeds_fit (&single_target, pc_seg, pc_frag, pc_offset,
3375 if (steps_taken >= min_steps)
3377 istack_push (istack, &single_target);
3381 tinsn_copy (¤t_insn, &single_target);
3384 /* Now check for a multi-instruction expansion. */
3385 while (xg_is_relaxable_insn (¤t_insn, lateral_steps))
3387 if (xg_symbolic_immeds_fit (¤t_insn, pc_seg, pc_frag, pc_offset,
3390 if (steps_taken >= min_steps)
3392 istack_push (istack, ¤t_insn);
3397 if (xg_expand_to_stack (istack, ¤t_insn, lateral_steps))
3399 if (steps_taken >= min_steps)
3403 istack->ninsn = istack_size;
3406 /* It's not going to work -- use the original. */
3407 istack_push (istack, insn);
3413 xg_force_frag_space (size)
3416 /* This may have the side effect of creating a new fragment for the
3417 space to go into. I just do not like the name of the "frag"
3424 xg_finish_frag (last_insn, state, max_growth, is_insn)
3426 enum xtensa_relax_statesE state;
3428 bfd_boolean is_insn;
3430 /* Finish off this fragment so that it has at LEAST the desired
3431 max_growth. If it doesn't fit in this fragment, close this one
3432 and start a new one. In either case, return a pointer to the
3433 beginning of the growth area. */
3436 xg_force_frag_space (max_growth);
3438 old_frag = frag_now;
3440 frag_now->fr_opcode = last_insn;
3442 frag_now->tc_frag_data.is_insn = TRUE;
3444 frag_var (rs_machine_dependent, max_growth, max_growth,
3445 state, frag_now->fr_symbol, frag_now->fr_offset, last_insn);
3447 /* Just to make sure that we did not split it up. */
3448 assert (old_frag->fr_next == frag_now);
3453 is_branch_jmp_to_next (insn, fragP)
3457 xtensa_isa isa = xtensa_default_isa;
3459 int num_ops = xtensa_num_operands (isa, insn->opcode);
3464 if (is_loop_opcode (insn->opcode))
3467 for (i = 0; i < num_ops; i++)
3469 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
3470 char *kind = xtensa_operand_kind (opnd);
3471 if (strlen (kind) == 1 && *kind == 'l')
3477 if (target_op == -1)
3480 if (insn->ntok <= target_op)
3483 if (insn->tok[target_op].X_op != O_symbol)
3486 sym = insn->tok[target_op].X_add_symbol;
3490 if (insn->tok[target_op].X_add_number != 0)
3493 target_frag = symbol_get_frag (sym);
3494 if (target_frag == NULL)
3497 if (is_next_frag_target (fragP->fr_next, target_frag)
3498 && S_GET_VALUE (sym) == target_frag->fr_address)
3506 xg_add_branch_and_loop_targets (insn)
3509 xtensa_isa isa = xtensa_default_isa;
3510 int num_ops = xtensa_num_operands (isa, insn->opcode);
3512 if (is_loop_opcode (insn->opcode))
3515 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
3516 char *kind = xtensa_operand_kind (opnd);
3517 if (strlen (kind) == 1 && *kind == 'l')
3518 if (insn->tok[i].X_op == O_symbol)
3519 add_target_symbol (insn->tok[i].X_add_symbol, TRUE);
3523 /* Currently, we do not add branch targets. This is an optimization
3524 for later that tries to align only branch targets, not just any
3525 label in a text section. */
3527 if (align_only_targets)
3531 for (i = 0; i < insn->ntok && i < num_ops; i++)
3533 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
3534 char *kind = xtensa_operand_kind (opnd);
3535 if (strlen (kind) == 1 && *kind == 'l'
3536 && insn->tok[i].X_op == O_symbol)
3537 add_target_symbol (insn->tok[i].X_add_symbol, FALSE);
3543 /* Return the transition rule that matches or NULL if none matches. */
3546 xg_instruction_matches_rule (insn, rule)
3548 TransitionRule *rule;
3550 PreconditionList *condition_l;
3552 if (rule->opcode != insn->opcode)
3555 for (condition_l = rule->conditions;
3556 condition_l != NULL;
3557 condition_l = condition_l->next)
3561 Precondition *cond = condition_l->precond;
3566 /* The expression must be the constant. */
3567 assert (cond->op_num < insn->ntok);
3568 exp1 = &insn->tok[cond->op_num];
3569 if (!expr_is_const (exp1))
3574 if (get_expr_const (exp1) != cond->op_data)
3578 if (get_expr_const (exp1) == cond->op_data)
3585 assert (cond->op_num < insn->ntok);
3586 assert (cond->op_data < insn->ntok);
3587 exp1 = &insn->tok[cond->op_num];
3588 exp2 = &insn->tok[cond->op_data];
3593 if (!expr_is_equal (exp1, exp2))
3597 if (expr_is_equal (exp1, exp2))
3614 xg_instruction_match (insn)
3617 TransitionTable *table = xg_build_simplify_table ();
3619 assert (insn->opcode < table->num_opcodes);
3621 /* Walk through all of the possible transitions. */
3622 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3624 TransitionRule *rule = l->rule;
3625 if (xg_instruction_matches_rule (insn, rule))
3632 /* Return false if no error. */
3635 xg_build_token_insn (instr_spec, old_insn, new_insn)
3636 BuildInstr *instr_spec;
3643 switch (instr_spec->typ)
3646 new_insn->insn_type = ITYPE_INSN;
3647 new_insn->opcode = instr_spec->opcode;
3648 new_insn->is_specific_opcode = FALSE;
3650 case INSTR_LITERAL_DEF:
3651 new_insn->insn_type = ITYPE_LITERAL;
3652 new_insn->opcode = XTENSA_UNDEFINED;
3653 new_insn->is_specific_opcode = FALSE;
3655 case INSTR_LABEL_DEF:
3656 as_bad (_("INSTR_LABEL_DEF not supported yet"));
3660 for (b_op = instr_spec->ops; b_op != NULL; b_op = b_op->next)
3663 const expressionS *src_exp;
3669 /* The expression must be the constant. */
3670 assert (b_op->op_num < MAX_INSN_ARGS);
3671 exp = &new_insn->tok[b_op->op_num];
3672 set_expr_const (exp, b_op->op_data);
3676 assert (b_op->op_num < MAX_INSN_ARGS);
3677 assert (b_op->op_data < (unsigned) old_insn->ntok);
3678 src_exp = &old_insn->tok[b_op->op_data];
3679 exp = &new_insn->tok[b_op->op_num];
3680 copy_expr (exp, src_exp);
3685 as_bad (_("can't handle generation of literal/labels yet"));
3689 as_bad (_("can't handle undefined OP TYPE"));
3694 new_insn->ntok = num_ops;
3699 /* Return true if it was simplified. */
3702 xg_simplify_insn (old_insn, new_insn)
3706 TransitionRule *rule = xg_instruction_match (old_insn);
3707 BuildInstr *insn_spec;
3711 insn_spec = rule->to_instr;
3712 /* There should only be one. */
3713 assert (insn_spec != NULL);
3714 assert (insn_spec->next == NULL);
3715 if (insn_spec->next != NULL)
3718 xg_build_token_insn (insn_spec, old_insn, new_insn);
3724 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
3725 l32i.n. (2) Check the number of operands. (3) Place the instruction
3726 tokens into the stack or if we can relax it at assembly time, place
3727 multiple instructions/literals onto the stack. Return false if no
3731 xg_expand_assembly_insn (istack, orig_insn)
3737 memset (&new_insn, 0, sizeof (TInsn));
3739 /* On return, we will be using the "use_tokens" with "use_ntok".
3740 This will reduce things like addi to addi.n. */
3741 if (code_density_available () && !orig_insn->is_specific_opcode)
3743 if (xg_simplify_insn (orig_insn, &new_insn))
3744 orig_insn = &new_insn;
3747 noperands = xtensa_num_operands (xtensa_default_isa, orig_insn->opcode);
3748 if (orig_insn->ntok < noperands)
3750 as_bad (_("found %d operands for '%s': Expected %d"),
3752 xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
3756 if (orig_insn->ntok > noperands)
3757 as_warn (_("found too many (%d) operands for '%s': Expected %d"),
3759 xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
3762 /* If there are not enough operands, we will assert above. If there
3763 are too many, just cut out the extras here. */
3765 orig_insn->ntok = noperands;
3769 Instructions with all constant immeds:
3770 Assemble them and relax the instruction if possible.
3771 Give error if not possible; no fixup needed.
3773 Instructions with symbolic immeds:
3774 Assemble them with a Fix up (that may cause instruction expansion).
3775 Also close out the fragment if the fixup may cause instruction expansion.
3777 There are some other special cases where we need alignment.
3778 1) before certain instructions with required alignment (OPCODE_ALIGN)
3779 2) before labels that have jumps (LABEL_ALIGN)
3780 3) after call instructions (RETURN_ALIGN)
3781 Multiple of these may be possible on the same fragment.
3782 If so, make sure to satisfy the required alignment.
3783 Then try to get the desired alignment. */
3785 if (tinsn_has_invalid_symbolic_operands (orig_insn))
3788 if (orig_insn->is_specific_opcode || !can_relax ())
3790 istack_push (istack, orig_insn);
3794 if (tinsn_has_symbolic_operands (orig_insn))
3796 if (tinsn_has_complex_operands (orig_insn))
3797 xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
3799 istack_push (istack, orig_insn);
3803 if (xg_immeds_fit (orig_insn))
3804 istack_push (istack, orig_insn);
3806 xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
3810 for (i = 0; i < istack->ninsn; i++)
3812 if (xg_simplify_insn (&new_insn, &istack->insn[i]))
3813 istack->insn[i] = new_insn;
3821 /* Currently all literals that are generated here are 32-bit L32R targets. */
3824 xg_assemble_literal (insn)
3825 /* const */ TInsn *insn;
3828 symbolS *lit_sym = NULL;
3830 /* size = 4 for L32R. It could easily be larger when we move to
3831 larger constants. Add a parameter later. */
3832 offsetT litsize = 4;
3833 offsetT litalign = 2; /* 2^2 = 4 */
3834 expressionS saved_loc;
3835 set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ());
3837 assert (insn->insn_type == ITYPE_LITERAL);
3838 assert (insn->ntok = 1); /* must be only one token here */
3840 xtensa_switch_to_literal_fragment (&state);
3842 /* Force a 4-byte align here. Note that this opens a new frag, so all
3843 literals done with this function have a frag to themselves. That's
3844 important for the way text section literals work. */
3845 frag_align (litalign, 0, 0);
3847 emit_expr (&insn->tok[0], litsize);
3849 assert (frag_now->tc_frag_data.literal_frag == NULL);
3850 frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
3851 frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
3852 lit_sym = frag_now->fr_symbol;
3853 frag_now->tc_frag_data.is_literal = TRUE;
3856 xtensa_restore_emit_state (&state);
3862 xg_assemble_literal_space (size)
3863 /* const */ int size;
3866 /* We might have to do something about this alignment. It only
3867 takes effect if something is placed here. */
3868 offsetT litalign = 2; /* 2^2 = 4 */
3869 fragS *lit_saved_frag;
3871 expressionS saved_loc;
3873 assert (size % 4 == 0);
3874 set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ());
3876 xtensa_switch_to_literal_fragment (&state);
3878 /* Force a 4-byte align here. */
3879 frag_align (litalign, 0, 0);
3881 xg_force_frag_space (size);
3883 lit_saved_frag = frag_now;
3884 frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
3885 frag_now->tc_frag_data.is_literal = TRUE;
3886 frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
3887 xg_finish_frag (0, RELAX_LITERAL, size, FALSE);
3890 xtensa_restore_emit_state (&state);
3891 frag_now->tc_frag_data.literal_frag = lit_saved_frag;
3896 xtensa_create_literal_symbol (sec, frag)
3900 static int lit_num = 0;
3901 static char name[256];
3904 sprintf (name, ".L_lit_sym%d", lit_num);
3905 fragSym = xtensa_create_local_symbol (stdoutput, name, sec, 0, frag_now);
3907 frag->tc_frag_data.is_literal = TRUE;
3913 /* Create a local symbol. If it is in a linkonce section, we have to
3914 be careful to make sure that if it is used in a relocation that the
3915 symbol will be in the output file. */
3918 xtensa_create_local_symbol (abfd, name, sec, value, frag)
3927 if (get_is_linkonce_section (abfd, sec))
3929 symbolP = symbol_new (name, sec, value, frag);
3930 S_CLEAR_EXTERNAL (symbolP);
3931 /* symbolP->local = 1; */
3934 symbolP = symbol_new (name, sec, value, frag);
3940 /* Return true if the section flags are marked linkonce
3941 or the name is .gnu.linkonce*. */
3944 get_is_linkonce_section (abfd, sec)
3945 bfd *abfd ATTRIBUTE_UNUSED;
3948 flagword flags, link_once_flags;
3950 flags = bfd_get_section_flags (abfd, sec);
3951 link_once_flags = (flags & SEC_LINK_ONCE);
3953 /* Flags might not be set yet. */
3954 if (!link_once_flags)
3956 static size_t len = sizeof ".gnu.linkonce.t.";
3958 if (strncmp (segment_name (sec), ".gnu.linkonce.t.", len - 1) == 0)
3959 link_once_flags = SEC_LINK_ONCE;
3961 return (link_once_flags != 0);
3965 /* Emit an instruction to the current fragment. If record_fix is true,
3966 then this instruction will not change and we can go ahead and record
3967 the fixup. If record_fix is false, then the instruction may change
3968 and we are going to close out this fragment. Go ahead and set the
3969 fr_symbol and fr_offset instead of adding a fixup. */
3972 xg_emit_insn (t_insn, record_fix)
3974 bfd_boolean record_fix;
3976 bfd_boolean ok = TRUE;
3977 xtensa_isa isa = xtensa_default_isa;
3978 xtensa_opcode opcode = t_insn->opcode;
3979 bfd_boolean has_fixup = FALSE;
3985 static xtensa_insnbuf insnbuf = NULL;
3987 /* Use a static pointer to the insn buffer so we don't have to call
3988 malloc each time through. */
3990 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
3992 has_fixup = tinsn_to_insnbuf (t_insn, insnbuf);
3994 noperands = xtensa_num_operands (isa, opcode);
3995 assert (noperands == t_insn->ntok);
3997 byte_count = xtensa_insn_length (isa, opcode);
3999 /* This should NEVER cause us to jump into a new frag;
4000 we've already reserved space. */
4001 old_size = frag_now_fix ();
4002 f = frag_more (byte_count);
4003 assert (oldfrag == frag_now);
4005 /* This needs to generate a record that lists the parts that are
4007 if (!frag_now->tc_frag_data.is_insn)
4009 /* If we are at the beginning of a fragment, switch this
4010 fragment to an instruction fragment. */
4011 if (now_seg != absolute_section && old_size != 0)
4012 as_warn (_("instruction fragment may contain data"));
4013 frag_now->tc_frag_data.is_insn = TRUE;
4016 xtensa_insnbuf_to_chars (isa, insnbuf, f);
4018 /* Now spit out the opcode fixup.... */
4022 for (i = 0; i < noperands; ++i)
4024 expressionS *expr = &t_insn->tok[i];
4028 if (get_relaxable_immed (opcode) == i)
4032 if (!xg_add_opcode_fix (opcode, i, expr, frag_now,
4033 f - frag_now->fr_literal))
4038 /* Write it to the fr_offset, fr_symbol. */
4039 frag_now->fr_symbol = expr->X_add_symbol;
4040 frag_now->fr_offset = expr->X_add_number;
4045 as_bad (_("invalid operand %d on '%s'"),
4046 i, xtensa_opcode_name (isa, opcode));
4056 as_bad (_("invalid expression for operand %d on '%s'"),
4057 i, xtensa_opcode_name (isa, opcode));
4068 xg_emit_insn_to_buf (t_insn, buf, fragP, offset, build_fix)
4073 bfd_boolean build_fix;
4075 static xtensa_insnbuf insnbuf = NULL;
4076 bfd_boolean has_symbolic_immed = FALSE;
4077 bfd_boolean ok = TRUE;
4079 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
4081 has_symbolic_immed = tinsn_to_insnbuf (t_insn, insnbuf);
4082 if (has_symbolic_immed && build_fix)
4085 int opnum = get_relaxable_immed (t_insn->opcode);
4086 expressionS *exp = &t_insn->tok[opnum];
4088 if (!xg_add_opcode_fix (t_insn->opcode,
4089 opnum, exp, fragP, offset))
4092 fragP->tc_frag_data.is_insn = TRUE;
4093 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
4098 /* Put in a fixup record based on the opcode.
4099 Return true on success. */
4102 xg_add_opcode_fix (opcode, opnum, expr, fragP, offset)
4103 xtensa_opcode opcode;
4109 bfd_reloc_code_real_type reloc;
4110 reloc_howto_type *howto;
4114 reloc = opnum_to_reloc (opnum);
4115 if (reloc == BFD_RELOC_NONE)
4117 as_bad (_("invalid relocation operand %i on '%s'"),
4118 opnum, xtensa_opcode_name (xtensa_default_isa, opcode));
4122 howto = bfd_reloc_type_lookup (stdoutput, reloc);
4126 as_bad (_("undefined symbol for opcode \"%s\"."),
4127 xtensa_opcode_name (xtensa_default_isa, opcode));
4131 insn_length = xtensa_insn_length (xtensa_default_isa, opcode);
4132 the_fix = fix_new_exp (fragP, offset, insn_length, expr,
4133 howto->pc_relative, reloc);
4135 if (expr->X_add_symbol &&
4136 (S_IS_EXTERNAL (expr->X_add_symbol) || S_IS_WEAK (expr->X_add_symbol)))
4137 the_fix->fx_plt = TRUE;
4144 xg_resolve_literals (insn, lit_sym)
4148 symbolS *sym = get_special_literal_symbol ();
4152 assert (insn->insn_type == ITYPE_INSN);
4153 for (i = 0; i < insn->ntok; i++)
4154 if (insn->tok[i].X_add_symbol == sym)
4155 insn->tok[i].X_add_symbol = lit_sym;
4161 xg_resolve_labels (insn, label_sym)
4165 symbolS *sym = get_special_label_symbol ();
4167 /* assert(!insn->is_literal); */
4168 for (i = 0; i < insn->ntok; i++)
4169 if (insn->tok[i].X_add_symbol == sym)
4170 insn->tok[i].X_add_symbol = label_sym;
4176 xg_assemble_tokens (insn)
4177 /*const */ TInsn *insn;
4179 /* By the time we get here, there's not too much left to do.
4180 1) Check our assumptions.
4181 2) Check if the current instruction is "narrow".
4182 If so, then finish the frag, create another one.
4183 We could also go back to change some previous
4184 "narrow" frags into no-change ones if we have more than
4185 MAX_NARROW_ALIGNMENT of them without alignment restrictions
4189 1) It has constant operands and doesn't fit.
4190 Go ahead and assemble it so it will fail.
4191 2) It has constant operands that fit.
4192 If narrow and !is_specific_opcode,
4193 assemble it and put in a relocation
4196 3) It has a symbolic immediate operand
4197 a) Find the worst-case relaxation required
4198 b) Find the worst-case literal pool space required.
4199 Insert appropriate alignment & space in the literal.
4201 Add the relocation. */
4203 assert (insn->insn_type == ITYPE_INSN);
4205 if (!tinsn_has_symbolic_operands (insn))
4207 if (xg_is_narrow_insn (insn) && !insn->is_specific_opcode)
4209 /* assemble it but add max required space */
4210 int max_size = xg_get_max_narrow_insn_size (insn->opcode);
4211 int min_size = xg_get_insn_size (insn);
4213 assert (max_size == 3);
4214 /* make sure we have enough space to widen it */
4215 xg_force_frag_space (max_size);
4216 /* Output the instruction. It may cause an error if some
4217 operands do not fit. */
4218 last_insn = frag_more (0);
4219 if (xg_emit_insn (insn, TRUE))
4220 as_warn (_("instruction with constant operands does not fit"));
4221 xg_finish_frag (last_insn, RELAX_NARROW, max_size - min_size, TRUE);
4225 /* Assemble it. No relocation needed. */
4226 int max_size = xg_get_insn_size (insn);
4227 xg_force_frag_space (max_size);
4228 if (xg_emit_insn (insn, FALSE))
4229 as_warn (_("instruction with constant operands does not "
4230 "fit without widening"));
4231 /* frag_more (max_size); */
4233 /* Special case for jx. If the jx is the next to last
4234 instruction in a loop, we will add a NOP after it. This
4235 avoids a hardware issue that could occur if the jx jumped
4236 to the next instruction. */
4237 if (software_avoid_b_j_loop_end
4238 && is_jx_opcode (insn->opcode))
4240 maybe_has_b_j_loop_end = TRUE;
4241 /* add 2 of these */
4242 frag_now->tc_frag_data.is_insn = TRUE;
4243 frag_var (rs_machine_dependent, 4, 4,
4244 RELAX_ADD_NOP_IF_PRE_LOOP_END,
4245 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4251 /* Need to assemble it with space for the relocation. */
4252 if (!insn->is_specific_opcode)
4254 /* Assemble it but add max required space. */
4256 int min_size = xg_get_insn_size (insn);
4257 int max_size = xg_get_max_insn_widen_size (insn->opcode);
4258 int max_literal_size =
4259 xg_get_max_insn_widen_literal_size (insn->opcode);
4262 symbolS *immed_sym = xg_get_insn_immed_symbol (insn);
4263 set_frag_segment (frag_now, now_seg);
4266 /* Make sure we have enough space to widen the instruction.
4267 This may open a new fragment. */
4268 xg_force_frag_space (max_size);
4269 if (max_literal_size != 0)
4270 xg_assemble_literal_space (max_literal_size);
4272 /* Output the instruction. It may cause an error if some
4273 operands do not fit. Emit the incomplete instruction. */
4274 last_insn = frag_more (0);
4275 xg_emit_insn (insn, FALSE);
4277 xg_finish_frag (last_insn, RELAX_IMMED, max_size - min_size, TRUE);
4279 /* Special cases for loops:
4280 close_loop_end should be inserted AFTER short_loop.
4281 Make sure that CLOSE loops are processed BEFORE short_loops
4282 when converting them. */
4284 /* "short_loop": add a NOP if the loop is < 4 bytes. */
4285 if (software_avoid_short_loop
4286 && is_loop_opcode (insn->opcode))
4288 maybe_has_short_loop = TRUE;
4289 frag_now->tc_frag_data.is_insn = TRUE;
4290 frag_var (rs_machine_dependent, 4, 4,
4291 RELAX_ADD_NOP_IF_SHORT_LOOP,
4292 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4293 frag_now->tc_frag_data.is_insn = TRUE;
4294 frag_var (rs_machine_dependent, 4, 4,
4295 RELAX_ADD_NOP_IF_SHORT_LOOP,
4296 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4299 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
4300 loop at least 12 bytes away from another loop's loop
4302 if (software_avoid_close_loop_end
4303 && is_loop_opcode (insn->opcode))
4305 maybe_has_close_loop_end = TRUE;
4306 frag_now->tc_frag_data.is_insn = TRUE;
4307 frag_var (rs_machine_dependent, 12, 12,
4308 RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
4309 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4314 /* Assemble it in place. No expansion will be required,
4315 but we'll still need a relocation record. */
4316 int max_size = xg_get_insn_size (insn);
4317 xg_force_frag_space (max_size);
4318 if (xg_emit_insn (insn, TRUE))
4319 as_warn (_("instruction's constant operands do not fit"));
4325 /* Return true if the instruction can write to the specified
4326 integer register. */
4329 is_register_writer (insn, regset, regnum)
4336 xtensa_isa isa = xtensa_default_isa;
4338 num_ops = xtensa_num_operands (isa, insn->opcode);
4340 for (i = 0; i < num_ops; i++)
4342 xtensa_operand operand = xtensa_get_operand (isa, insn->opcode, i);
4343 char inout = xtensa_operand_inout (operand);
4345 if (inout == '>' || inout == '=')
4347 if (strcmp (xtensa_operand_kind (operand), regset) == 0)
4349 if ((insn->tok[i].X_op == O_register)
4350 && (insn->tok[i].X_add_number == regnum))
4360 is_bad_loopend_opcode (tinsn)
4361 const TInsn * tinsn;
4363 xtensa_opcode opcode = tinsn->opcode;
4365 if (opcode == XTENSA_UNDEFINED)
4368 if (opcode == xtensa_call0_opcode
4369 || opcode == xtensa_callx0_opcode
4370 || opcode == xtensa_call4_opcode
4371 || opcode == xtensa_callx4_opcode
4372 || opcode == xtensa_call8_opcode
4373 || opcode == xtensa_callx8_opcode
4374 || opcode == xtensa_call12_opcode
4375 || opcode == xtensa_callx12_opcode
4376 || opcode == xtensa_isync_opcode
4377 || opcode == xtensa_ret_opcode
4378 || opcode == xtensa_ret_n_opcode
4379 || opcode == xtensa_retw_opcode
4380 || opcode == xtensa_retw_n_opcode
4381 || opcode == xtensa_waiti_opcode)
4384 /* An RSR of LCOUNT is illegal as the last opcode in a loop. */
4385 if (opcode == xtensa_rsr_opcode
4387 && tinsn->tok[1].X_op == O_constant
4388 && tinsn->tok[1].X_add_number == 2)
4395 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4396 This allows the debugger to add unaligned labels.
4397 Also, the assembler generates stabs labels that need
4398 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4401 is_unaligned_label (sym)
4404 const char *name = S_GET_NAME (sym);
4405 static size_t fake_size = 0;
4409 && name[1] == 'L' && (name[2] == 'n' || name[2] == 'M'))
4412 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4414 fake_size = strlen (FAKE_LABEL_NAME);
4417 && strncmp (FAKE_LABEL_NAME, name, fake_size) == 0
4418 && (name[fake_size] == 'F'
4419 || name[fake_size] == 'L'
4420 || (name[fake_size] == 'e'
4421 && strncmp ("endfunc", name+fake_size, 7) == 0)))
4429 next_non_empty_frag (fragP)
4432 fragS *next_fragP = fragP->fr_next;
4434 /* Sometimes an empty will end up here due storage allocation issues.
4435 So we have to skip until we find something legit. */
4436 while (next_fragP && next_fragP->fr_fix == 0)
4437 next_fragP = next_fragP->fr_next;
4439 if (next_fragP == NULL || next_fragP->fr_fix == 0)
4447 next_frag_opcode (fragP)
4448 const fragS * fragP;
4450 const fragS *next_fragP = next_non_empty_frag (fragP);
4451 static xtensa_insnbuf insnbuf = NULL;
4452 xtensa_isa isa = xtensa_default_isa;
4455 insnbuf = xtensa_insnbuf_alloc (isa);
4457 if (next_fragP == NULL)
4458 return XTENSA_UNDEFINED;
4460 xtensa_insnbuf_from_chars (isa, insnbuf, next_fragP->fr_literal);
4461 return xtensa_decode_insn (isa, insnbuf);
4465 /* Return true if the target frag is one of the next non-empty frags. */
4468 is_next_frag_target (fragP, target)
4470 const fragS *target;
4475 for (; fragP; fragP = fragP->fr_next)
4477 if (fragP == target)
4479 if (fragP->fr_fix != 0)
4481 if (fragP->fr_type == rs_fill && fragP->fr_offset != 0)
4483 if ((fragP->fr_type == rs_align || fragP->fr_type == rs_align_code)
4484 && ((fragP->fr_address % (1 << fragP->fr_offset)) != 0))
4486 if (fragP->fr_type == rs_space)
4493 /* If the next legit fragment is an end-of-loop marker,
4494 switch its state so it will instantiate a NOP. */
4497 update_next_frag_nop_state (fragP)
4500 fragS *next_fragP = fragP->fr_next;
4502 while (next_fragP && next_fragP->fr_fix == 0)
4504 if (next_fragP->fr_type == rs_machine_dependent
4505 && next_fragP->fr_subtype == RELAX_LOOP_END)
4507 next_fragP->fr_subtype = RELAX_LOOP_END_ADD_NOP;
4510 next_fragP = next_fragP->fr_next;
4516 next_frag_is_branch_target (fragP)
4519 /* Sometimes an empty will end up here due storage allocation issues,
4520 so we have to skip until we find something legit. */
4521 for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
4523 if (fragP->tc_frag_data.is_branch_target)
4525 if (fragP->fr_fix != 0)
4533 next_frag_is_loop_target (fragP)
4536 /* Sometimes an empty will end up here due storage allocation issues.
4537 So we have to skip until we find something legit. */
4538 for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
4540 if (fragP->tc_frag_data.is_loop_target)
4542 if (fragP->fr_fix != 0)
4550 next_frag_pre_opcode_bytes (fragp)
4553 const fragS *next_fragp = fragp->fr_next;
4555 xtensa_opcode next_opcode = next_frag_opcode (fragp);
4556 if (!is_loop_opcode (next_opcode))
4559 /* Sometimes an empty will end up here due storage allocation issues.
4560 So we have to skip until we find something legit. */
4561 while (next_fragp->fr_fix == 0)
4562 next_fragp = next_fragp->fr_next;
4564 if (next_fragp->fr_type != rs_machine_dependent)
4567 /* There is some implicit knowledge encoded in here.
4568 The LOOP instructions that are NOT RELAX_IMMED have
4570 if (next_fragp->fr_subtype > RELAX_IMMED)
4571 return get_expanded_loop_offset (next_opcode);
4577 /* Mark a location where we can later insert literal frags. Update
4578 the section's literal_pool_loc, so subsequent literals can be
4579 placed nearest to their use. */
4582 xtensa_mark_literal_pool_location (move_labels)
4583 bfd_boolean move_labels;
4585 /* Any labels pointing to the current location need
4586 to be adjusted to after the literal pool. */
4588 fragS *label_target = frag_now;
4589 fragS *pool_location;
4590 offsetT label_offset = frag_now_fix ();
4592 frag_align (2, 0, 0);
4594 /* We stash info in the fr_var of these frags
4595 so we can later move the literal's fixes into this
4596 frchain's fix list. We can use fr_var because fr_var's
4597 interpretation depends solely on the fr_type and subtype. */
4598 pool_location = frag_now;
4599 frag_variant (rs_machine_dependent, 0, (int) frchain_now,
4600 RELAX_LITERAL_POOL_BEGIN, NULL, 0, NULL);
4601 frag_variant (rs_machine_dependent, 0, (int) now_seg,
4602 RELAX_LITERAL_POOL_END, NULL, 0, NULL);
4604 /* Now put a frag into the literal pool that points to this location. */
4605 set_literal_pool_location (now_seg, pool_location);
4606 xtensa_switch_to_literal_fragment (&s);
4608 /* Close whatever frag is there. */
4609 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
4610 frag_now->tc_frag_data.literal_frag = pool_location;
4611 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
4612 xtensa_restore_emit_state (&s);
4614 xtensa_move_labels (label_target, label_offset, frag_now, 0);
4619 xtensa_move_labels (old_frag, old_offset, new_frag, new_offset)
4622 fragS *new_frag ATTRIBUTE_UNUSED;
4627 /* Repeat until there are no more.... */
4628 for (old_sym = xtensa_find_label (old_frag, old_offset, TRUE);
4630 old_sym = xtensa_find_label (old_frag, old_offset, TRUE))
4632 S_SET_VALUE (old_sym, (valueT) new_offset);
4633 symbol_set_frag (old_sym, frag_now);
4638 /* Assemble a NOP of the requested size in the buffer. User must have
4639 allocated "buf" with at least "size" bytes. */
4642 assemble_nop (size, buf)
4646 static xtensa_insnbuf insnbuf = NULL;
4649 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
4651 tinsn_init (&t_insn);
4655 t_insn.opcode = xtensa_nop_n_opcode;
4657 if (t_insn.opcode == XTENSA_UNDEFINED)
4658 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4659 tinsn_to_insnbuf (&t_insn, insnbuf);
4660 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
4664 t_insn.opcode = xtensa_or_opcode;
4665 assert (t_insn.opcode != XTENSA_UNDEFINED);
4666 if (t_insn.opcode == XTENSA_UNDEFINED)
4667 as_fatal (_("opcode 'OR' unavailable in this configuration"));
4668 set_expr_const (&t_insn.tok[0], 1);
4669 set_expr_const (&t_insn.tok[1], 1);
4670 set_expr_const (&t_insn.tok[2], 1);
4672 tinsn_to_insnbuf (&t_insn, insnbuf);
4673 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
4677 as_fatal (_("invalid %d-byte NOP requested"), size);
4682 /* Return the number of bytes for the offset of the expanded loop
4683 instruction. This should be incorporated into the relaxation
4684 specification but is hard-coded here. This is used to auto-align
4685 the loop instruction. It is invalid to call this function if the
4686 configuration does not have loops or if the opcode is not a loop
4690 get_expanded_loop_offset (opcode)
4691 xtensa_opcode opcode;
4693 /* This is the OFFSET of the loop instruction in the expanded loop.
4694 This MUST correspond directly to the specification of the loop
4695 expansion. It will be validated on fragment conversion. */
4696 if (opcode == XTENSA_UNDEFINED)
4697 as_fatal (_("get_expanded_loop_offset: undefined opcode"));
4698 if (opcode == xtensa_loop_opcode)
4700 if (opcode == xtensa_loopnez_opcode)
4702 if (opcode == xtensa_loopgtz_opcode)
4704 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4710 get_literal_pool_location (seg)
4713 return seg_info (seg)->tc_segment_info_data.literal_pool_loc;
4718 set_literal_pool_location (seg, literal_pool_loc)
4720 fragS *literal_pool_loc;
4722 seg_info (seg)->tc_segment_info_data.literal_pool_loc = literal_pool_loc;
4726 /* External Functions and Other GAS Hooks. */
4729 xtensa_target_format ()
4731 return (target_big_endian ? "elf32-xtensa-be" : "elf32-xtensa-le");
4736 xtensa_file_arch_init (abfd)
4739 bfd_set_private_flags (abfd, 0x100 | 0x200);
4744 md_number_to_chars (buf, val, n)
4749 if (target_big_endian)
4750 number_to_chars_bigendian (buf, val, n);
4752 number_to_chars_littleendian (buf, val, n);
4756 /* This function is called once, at assembler startup time. It should
4757 set up all the tables, etc. that the MD part of the assembler will
4763 segT current_section = now_seg;
4764 int current_subsec = now_subseg;
4768 isa = xtensa_isa_init ();
4770 /* ISA was already initialized by xtensa_init(). */
4771 isa = xtensa_default_isa;
4774 /* Set up the .literal, .fini.literal and .init.literal sections. */
4775 memset (&default_lit_sections, 0, sizeof (default_lit_sections));
4776 default_lit_sections.init_lit_seg_name = INIT_LITERAL_SECTION_NAME;
4777 default_lit_sections.fini_lit_seg_name = FINI_LITERAL_SECTION_NAME;
4778 default_lit_sections.lit_seg_name = LITERAL_SECTION_NAME;
4780 subseg_set (current_section, current_subsec);
4782 xtensa_addi_opcode = xtensa_opcode_lookup (isa, "addi");
4783 xtensa_addmi_opcode = xtensa_opcode_lookup (isa, "addmi");
4784 xtensa_call0_opcode = xtensa_opcode_lookup (isa, "call0");
4785 xtensa_call4_opcode = xtensa_opcode_lookup (isa, "call4");
4786 xtensa_call8_opcode = xtensa_opcode_lookup (isa, "call8");
4787 xtensa_call12_opcode = xtensa_opcode_lookup (isa, "call12");
4788 xtensa_callx0_opcode = xtensa_opcode_lookup (isa, "callx0");
4789 xtensa_callx4_opcode = xtensa_opcode_lookup (isa, "callx4");
4790 xtensa_callx8_opcode = xtensa_opcode_lookup (isa, "callx8");
4791 xtensa_callx12_opcode = xtensa_opcode_lookup (isa, "callx12");
4792 xtensa_entry_opcode = xtensa_opcode_lookup (isa, "entry");
4793 xtensa_isync_opcode = xtensa_opcode_lookup (isa, "isync");
4794 xtensa_j_opcode = xtensa_opcode_lookup (isa, "j");
4795 xtensa_jx_opcode = xtensa_opcode_lookup (isa, "jx");
4796 xtensa_loop_opcode = xtensa_opcode_lookup (isa, "loop");
4797 xtensa_loopnez_opcode = xtensa_opcode_lookup (isa, "loopnez");
4798 xtensa_loopgtz_opcode = xtensa_opcode_lookup (isa, "loopgtz");
4799 xtensa_nop_n_opcode = xtensa_opcode_lookup (isa, "nop.n");
4800 xtensa_or_opcode = xtensa_opcode_lookup (isa, "or");
4801 xtensa_ret_opcode = xtensa_opcode_lookup (isa, "ret");
4802 xtensa_ret_n_opcode = xtensa_opcode_lookup (isa, "ret.n");
4803 xtensa_retw_opcode = xtensa_opcode_lookup (isa, "retw");
4804 xtensa_retw_n_opcode = xtensa_opcode_lookup (isa, "retw.n");
4805 xtensa_rsr_opcode = xtensa_opcode_lookup (isa, "rsr");
4806 xtensa_waiti_opcode = xtensa_opcode_lookup (isa, "waiti");
4810 /* tc_frob_label hook */
4813 xtensa_frob_label (sym)
4816 xtensa_define_label (sym);
4817 if (is_loop_target_label (sym)
4818 && (get_last_insn_flags (now_seg, now_subseg)
4819 & FLAG_IS_BAD_LOOPEND) != 0)
4820 as_bad (_("invalid last instruction for a zero-overhead loop"));
4822 /* No target aligning in the absolute section. */
4823 if (now_seg != absolute_section && align_targets
4824 && !is_unaligned_label (sym))
4826 fragS *old_frag = frag_now;
4827 offsetT old_offset = frag_now_fix ();
4828 if (frag_now->tc_frag_data.is_literal)
4830 /* frag_now->tc_frag_data.is_insn = TRUE; */
4831 frag_var (rs_machine_dependent, 4, 4,
4832 RELAX_DESIRE_ALIGN_IF_TARGET,
4833 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4834 xtensa_move_labels (old_frag, old_offset, frag_now, 0);
4835 /* Once we know whether or not the label is a branch target
4836 We will suppress some of these alignments. */
4841 /* md_flush_pending_output hook */
4844 xtensa_flush_pending_output ()
4846 /* If there is a non-zero instruction fragment, close it. */
4847 if (frag_now_fix () != 0 && frag_now->tc_frag_data.is_insn)
4849 frag_wane (frag_now);
4852 frag_now->tc_frag_data.is_insn = FALSE;
4860 xtensa_isa isa = xtensa_default_isa;
4863 bfd_boolean has_underbar = FALSE;
4864 char *arg_strings[MAX_INSN_ARGS];
4866 IStack istack; /* Put instructions into here. */
4867 TInsn orig_insn; /* Original instruction from the input. */
4869 symbolS *lit_sym = NULL;
4871 if (frag_now->tc_frag_data.is_literal)
4873 static bfd_boolean reported = 0;
4875 as_bad (_("cannot assemble '%s' into a literal fragment"), str);
4882 istack_init (&istack);
4883 tinsn_init (&orig_insn);
4885 /* Split off the opcode. */
4886 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
4887 opname = xmalloc (opnamelen + 1);
4888 memcpy (opname, str, opnamelen);
4889 opname[opnamelen] = '\0';
4891 num_args = tokenize_arguments (arg_strings, str + opnamelen);
4894 as_bad (_("syntax error"));
4898 if (xg_translate_idioms (&opname, &num_args, arg_strings))
4901 /* Check for an underbar prefix. */
4904 has_underbar = TRUE;
4908 orig_insn.insn_type = ITYPE_INSN;
4910 orig_insn.is_specific_opcode = (has_underbar || !use_generics ());
4911 specific_opcode = orig_insn.is_specific_opcode;
4913 orig_insn.opcode = xtensa_opcode_lookup (isa, opname);
4914 if (orig_insn.opcode == XTENSA_UNDEFINED)
4916 as_bad (_("unknown opcode %s"), opname);
4920 if (frag_now_fix () != 0 && !frag_now->tc_frag_data.is_insn)
4922 frag_wane (frag_now);
4926 if (software_a0_b_retw_interlock)
4928 if ((get_last_insn_flags (now_seg, now_subseg) & FLAG_IS_A0_WRITER) != 0
4929 && is_conditional_branch_opcode (orig_insn.opcode))
4931 has_a0_b_retw = TRUE;
4933 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
4934 After the first assembly pass we will check all of them and
4935 add a nop if needed. */
4936 frag_now->tc_frag_data.is_insn = TRUE;
4937 frag_var (rs_machine_dependent, 4, 4,
4938 RELAX_ADD_NOP_IF_A0_B_RETW,
4939 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4940 frag_now->tc_frag_data.is_insn = TRUE;
4941 frag_var (rs_machine_dependent, 4, 4,
4942 RELAX_ADD_NOP_IF_A0_B_RETW,
4943 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4947 /* Special case: The call instructions should be marked "specific opcode"
4948 to keep them from expanding. */
4949 if (!use_longcalls () && is_direct_call_opcode (orig_insn.opcode))
4950 orig_insn.is_specific_opcode = TRUE;
4952 /* Parse the arguments. */
4953 if (parse_arguments (&orig_insn, num_args, arg_strings))
4955 as_bad (_("syntax error"));
4959 /* Free the opcode and argument strings, now that they've been parsed. */
4960 free (has_underbar ? opname - 1 : opname);
4962 while (num_args-- > 0)
4963 free (arg_strings[num_args]);
4965 /* Check for the right number and type of arguments. */
4966 if (tinsn_check_arguments (&orig_insn))
4969 /* See if the instruction implies an aligned section. */
4970 if (is_entry_opcode (orig_insn.opcode) || is_loop_opcode (orig_insn.opcode))
4971 record_alignment (now_seg, 2);
4973 xg_add_branch_and_loop_targets (&orig_insn);
4975 /* Special cases for instructions that force an alignment... */
4976 if (!orig_insn.is_specific_opcode && is_loop_opcode (orig_insn.opcode))
4978 fragS *old_frag = frag_now;
4979 offsetT old_offset = frag_now_fix ();
4980 symbolS *old_sym = NULL;
4983 frag_now->tc_frag_data.is_insn = TRUE;
4984 frag_now->tc_frag_data.is_no_density = !code_density_available ();
4985 max_fill = get_text_align_max_fill_size
4986 (get_text_align_power (XTENSA_FETCH_WIDTH),
4987 TRUE, frag_now->tc_frag_data.is_no_density);
4988 frag_var (rs_machine_dependent, max_fill, max_fill,
4989 RELAX_ALIGN_NEXT_OPCODE, frag_now->fr_symbol,
4990 frag_now->fr_offset, NULL);
4992 /* Repeat until there are no more. */
4993 while ((old_sym = xtensa_find_label (old_frag, old_offset, FALSE)))
4995 S_SET_VALUE (old_sym, (valueT) 0);
4996 symbol_set_frag (old_sym, frag_now);
5000 /* Special count for "entry" instruction. */
5001 if (is_entry_opcode (orig_insn.opcode))
5003 /* Check that the second opcode (#1) is >= 16. */
5004 if (orig_insn.ntok >= 2)
5006 expressionS *exp = &orig_insn.tok[1];
5010 if (exp->X_add_number < 16)
5011 as_warn (_("entry instruction with stack decrement < 16"));
5015 as_warn (_("entry instruction with non-constant decrement"));
5020 if (!orig_insn.is_specific_opcode && is_entry_opcode (orig_insn.opcode))
5022 xtensa_mark_literal_pool_location (TRUE);
5024 /* Automatically align ENTRY instructions. */
5025 frag_align (2, 0, 0);
5028 if (software_a0_b_retw_interlock)
5029 set_last_insn_flags (now_seg, now_subseg, FLAG_IS_A0_WRITER,
5030 is_register_writer (&orig_insn, "a", 0));
5032 set_last_insn_flags (now_seg, now_subseg, FLAG_IS_BAD_LOOPEND,
5033 is_bad_loopend_opcode (&orig_insn));
5036 assemble_tokens (opcode, tok, ntok);
5037 expand the tokens from the orig_insn into the
5038 stack of instructions that will not expand
5039 unless required at relaxation time. */
5040 if (xg_expand_assembly_insn (&istack, &orig_insn))
5043 for (i = 0; i < istack.ninsn; i++)
5045 TInsn *insn = &istack.insn[i];
5046 if (insn->insn_type == ITYPE_LITERAL)
5048 assert (lit_sym == NULL);
5049 lit_sym = xg_assemble_literal (insn);
5054 xg_resolve_literals (insn, lit_sym);
5055 xg_assemble_tokens (insn);
5059 /* Now, if the original opcode was a call... */
5060 if (align_targets && is_call_opcode (orig_insn.opcode))
5062 frag_now->tc_frag_data.is_insn = TRUE;
5063 frag_var (rs_machine_dependent, 4, 4,
5065 frag_now->fr_symbol,
5066 frag_now->fr_offset,
5072 /* TC_CONS_FIX_NEW hook: Check for "@PLT" suffix on symbol references.
5073 If found, use an XTENSA_PLT reloc for 4-byte values. Otherwise, this
5074 is the same as the standard code in read.c. */
5077 xtensa_cons_fix_new (frag, where, size, exp)
5083 bfd_reloc_code_real_type r;
5084 bfd_boolean plt = FALSE;
5086 if (*input_line_pointer == '@')
5088 if (!strncmp (input_line_pointer, PLT_SUFFIX, strlen (PLT_SUFFIX) - 1)
5089 && !strncmp (input_line_pointer, plt_suffix,
5090 strlen (plt_suffix) - 1))
5092 as_bad (_("undefined @ suffix '%s', expected '%s'"),
5093 input_line_pointer, plt_suffix);
5094 ignore_rest_of_line ();
5098 input_line_pointer += strlen (plt_suffix);
5111 r = plt ? BFD_RELOC_XTENSA_PLT : BFD_RELOC_32;
5117 as_bad (_("unsupported BFD relocation size %u"), size);
5121 fix_new_exp (frag, where, size, exp, 0, r);
5125 /* TC_FRAG_INIT hook */
5128 xtensa_frag_init (frag)
5131 frag->tc_frag_data.is_no_density = !code_density_available ();
5136 md_undefined_symbol (name)
5137 char *name ATTRIBUTE_UNUSED;
5143 /* Round up a section size to the appropriate boundary. */
5146 md_section_align (segment, size)
5147 segT segment ATTRIBUTE_UNUSED;
5150 return size; /* Byte alignment is fine. */
5155 md_pcrel_from (fixP)
5159 static xtensa_insnbuf insnbuf = NULL;
5161 xtensa_operand operand;
5162 xtensa_opcode opcode;
5163 xtensa_isa isa = xtensa_default_isa;
5164 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
5169 if (fixP->fx_r_type == BFD_RELOC_XTENSA_ASM_EXPAND)
5173 insnbuf = xtensa_insnbuf_alloc (isa);
5175 insn_p = &fixP->fx_frag->fr_literal[fixP->fx_where];
5176 xtensa_insnbuf_from_chars (isa, insnbuf, insn_p);
5177 opcode = xtensa_decode_insn (isa, insnbuf);
5179 opnum = reloc_to_opnum (fixP->fx_r_type);
5182 as_fatal (_("invalid operand relocation for '%s' instruction"),
5183 xtensa_opcode_name (isa, opcode));
5184 if (opnum >= xtensa_num_operands (isa, opcode))
5185 as_fatal (_("invalid relocation for operand %d in '%s' instruction"),
5186 opnum, xtensa_opcode_name (isa, opcode));
5187 operand = xtensa_get_operand (isa, opcode, opnum);
5190 as_warn_where (fixP->fx_file,
5192 _("invalid relocation type %d for %s instruction"),
5193 fixP->fx_r_type, xtensa_opcode_name (isa, opcode));
5197 if (!operand_is_pcrel_label (operand))
5199 as_bad_where (fixP->fx_file,
5201 _("invalid relocation for operand %d of '%s'"),
5202 opnum, xtensa_opcode_name (isa, opcode));
5205 if (!xtensa_operand_isPCRelative (operand))
5207 as_warn_where (fixP->fx_file,
5209 _("non-PCREL relocation operand %d for '%s': %s"),
5210 opnum, xtensa_opcode_name (isa, opcode),
5211 bfd_get_reloc_code_name (fixP->fx_r_type));
5215 return 0 - xtensa_operand_do_reloc (operand, 0, addr);
5219 /* tc_symbol_new_hook */
5222 xtensa_symbol_new_hook (symbolP)
5225 symbolP->sy_tc.plt = 0;
5229 /* tc_fix_adjustable hook */
5232 xtensa_fix_adjustable (fixP)
5235 /* We need the symbol name for the VTABLE entries. */
5236 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
5237 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
5245 md_apply_fix3 (fixP, valP, seg)
5248 segT seg ATTRIBUTE_UNUSED;
5250 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
5252 /* This happens when the relocation is within the current section.
5253 It seems this implies a PCREL operation. We'll catch it and error
5256 char *const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
5257 static xtensa_insnbuf insnbuf = NULL;
5258 xtensa_opcode opcode;
5261 switch (fixP->fx_r_type)
5263 case BFD_RELOC_XTENSA_ASM_EXPAND:
5267 case BFD_RELOC_XTENSA_ASM_SIMPLIFY:
5268 as_bad (_("unhandled local relocation fix %s"),
5269 bfd_get_reloc_code_name (fixP->fx_r_type));
5275 /* The only one we support that isn't an instruction field. */
5276 md_number_to_chars (fixpos, *valP, fixP->fx_size);
5280 case BFD_RELOC_XTENSA_OP0:
5281 case BFD_RELOC_XTENSA_OP1:
5282 case BFD_RELOC_XTENSA_OP2:
5283 isa = xtensa_default_isa;
5285 insnbuf = xtensa_insnbuf_alloc (isa);
5287 xtensa_insnbuf_from_chars (isa, insnbuf, fixpos);
5288 opcode = xtensa_decode_insn (isa, insnbuf);
5289 if (opcode == XTENSA_UNDEFINED)
5290 as_fatal (_("undecodable FIX"));
5292 xtensa_insnbuf_set_immediate_field (opcode, insnbuf, *valP,
5293 fixP->fx_file, fixP->fx_line);
5295 fixP->fx_frag->tc_frag_data.is_insn = TRUE;
5296 xtensa_insnbuf_to_chars (isa, insnbuf, fixpos);
5300 case BFD_RELOC_VTABLE_INHERIT:
5301 case BFD_RELOC_VTABLE_ENTRY:
5306 as_bad (_("unhandled local relocation fix %s"),
5307 bfd_get_reloc_code_name (fixP->fx_r_type));
5314 md_atof (type, litP, sizeP)
5320 LITTLENUM_TYPE words[4];
5336 return "bad call to md_atof";
5339 t = atof_ieee (input_line_pointer, type, words);
5341 input_line_pointer = t;
5345 for (i = prec - 1; i >= 0; i--)
5348 if (target_big_endian)
5349 idx = (prec - 1 - i);
5351 md_number_to_chars (litP, (valueT) words[idx], 2);
5360 md_estimate_size_before_relax (fragP, seg)
5362 segT seg ATTRIBUTE_UNUSED;
5364 return fragP->tc_frag_data.text_expansion;
5368 /* Translate internal representation of relocation info to BFD target
5372 tc_gen_reloc (section, fixp)
5373 asection *section ATTRIBUTE_UNUSED;
5378 reloc = (arelent *) xmalloc (sizeof (arelent));
5379 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5380 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
5381 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5383 /* Make sure none of our internal relocations make it this far.
5384 They'd better have been fully resolved by this point. */
5385 assert ((int) fixp->fx_r_type > 0);
5387 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
5388 if (reloc->howto == NULL)
5390 as_bad_where (fixp->fx_file, fixp->fx_line,
5391 _("cannot represent `%s' relocation in object file"),
5392 bfd_get_reloc_code_name (fixp->fx_r_type));
5396 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
5398 as_fatal (_("internal error? cannot generate `%s' relocation"),
5399 bfd_get_reloc_code_name (fixp->fx_r_type));
5401 assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
5403 reloc->addend = fixp->fx_offset;
5405 switch (fixp->fx_r_type)
5407 case BFD_RELOC_XTENSA_OP0:
5408 case BFD_RELOC_XTENSA_OP1:
5409 case BFD_RELOC_XTENSA_OP2:
5410 case BFD_RELOC_XTENSA_ASM_EXPAND:
5412 case BFD_RELOC_XTENSA_PLT:
5413 case BFD_RELOC_VTABLE_INHERIT:
5414 case BFD_RELOC_VTABLE_ENTRY:
5417 case BFD_RELOC_XTENSA_ASM_SIMPLIFY:
5418 as_warn (_("emitting simplification relocation"));
5422 as_warn (_("emitting unknown relocation"));
5432 directive_balance ();
5433 xtensa_move_literals ();
5435 xtensa_reorder_segments ();
5436 xtensa_mark_target_fragments ();
5437 xtensa_cleanup_align_frags ();
5438 xtensa_fix_target_frags ();
5439 if (software_a0_b_retw_interlock && has_a0_b_retw)
5440 xtensa_fix_a0_b_retw_frags ();
5441 if (software_avoid_b_j_loop_end && maybe_has_b_j_loop_end)
5442 xtensa_fix_b_j_loop_end_frags ();
5444 /* "close_loop_end" should be processed BEFORE "short_loop". */
5445 if (software_avoid_close_loop_end && maybe_has_close_loop_end)
5446 xtensa_fix_close_loop_end_frags ();
5448 if (software_avoid_short_loop && maybe_has_short_loop)
5449 xtensa_fix_short_loop_frags ();
5451 xtensa_sanity_check ();
5456 xtensa_cleanup_align_frags ()
5460 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5464 /* Walk over all of the fragments in a subsection. */
5465 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5467 if ((fragP->fr_type == rs_align
5468 || fragP->fr_type == rs_align_code
5469 || (fragP->fr_type == rs_machine_dependent
5470 && (fragP->fr_subtype == RELAX_DESIRE_ALIGN
5471 || fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)))
5472 && fragP->fr_fix == 0)
5474 fragS * next = fragP->fr_next;
5477 && next->fr_type == rs_machine_dependent
5478 && next->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
5481 next = next->fr_next;
5489 /* Re-process all of the fragments looking to convert all of the
5490 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
5491 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
5492 If the next fragment starts with a loop target, AND the previous
5493 fragment can be expanded to negate the branch, convert this to a
5494 RELAX_LOOP_END. Otherwise, convert to a .fill 0. */
5497 xtensa_fix_target_frags ()
5501 /* When this routine is called, all of the subsections are still intact
5502 so we walk over subsections instead of sections. */
5503 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5505 bfd_boolean prev_frag_can_negate_branch = FALSE;
5508 /* Walk over all of the fragments in a subsection. */
5509 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5511 if (fragP->fr_type == rs_machine_dependent
5512 && fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
5514 if (next_frag_is_loop_target (fragP))
5516 if (prev_frag_can_negate_branch)
5517 fragP->fr_subtype = RELAX_LOOP_END;
5520 if (!align_only_targets ||
5521 next_frag_is_branch_target (fragP))
5522 fragP->fr_subtype = RELAX_DESIRE_ALIGN;
5527 else if (!align_only_targets
5528 || next_frag_is_branch_target (fragP))
5529 fragP->fr_subtype = RELAX_DESIRE_ALIGN;
5533 if (fragP->fr_fix != 0)
5534 prev_frag_can_negate_branch = FALSE;
5535 if (frag_can_negate_branch (fragP))
5536 prev_frag_can_negate_branch = TRUE;
5543 frag_can_negate_branch (fragP)
5546 if (fragP->fr_type == rs_machine_dependent
5547 && fragP->fr_subtype == RELAX_IMMED)
5550 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5551 if (is_negatable_branch (&t_insn))
5558 /* Re-process all of the fragments looking to convert all of the
5559 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
5560 conditional branch or a retw/retw.n, convert this frag to one that
5561 will generate a NOP. In any case close it off with a .fill 0. */
5564 xtensa_fix_a0_b_retw_frags ()
5568 /* When this routine is called, all of the subsections are still intact
5569 so we walk over subsections instead of sections. */
5570 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5574 /* Walk over all of the fragments in a subsection. */
5575 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5577 if (fragP->fr_type == rs_machine_dependent
5578 && fragP->fr_subtype == RELAX_ADD_NOP_IF_A0_B_RETW)
5580 if (next_instrs_are_b_retw (fragP))
5581 relax_frag_add_nop (fragP);
5591 next_instrs_are_b_retw (fragP)
5594 xtensa_opcode opcode;
5595 const fragS *next_fragP = next_non_empty_frag (fragP);
5596 static xtensa_insnbuf insnbuf = NULL;
5597 xtensa_isa isa = xtensa_default_isa;
5601 insnbuf = xtensa_insnbuf_alloc (isa);
5603 if (next_fragP == NULL)
5606 /* Check for the conditional branch. */
5607 xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]);
5608 opcode = xtensa_decode_insn (isa, insnbuf);
5610 if (!is_conditional_branch_opcode (opcode))
5613 offset += xtensa_insn_length (isa, opcode);
5614 if (offset == next_fragP->fr_fix)
5616 next_fragP = next_non_empty_frag (next_fragP);
5619 if (next_fragP == NULL)
5622 /* Check for the retw/retw.n. */
5623 xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]);
5624 opcode = xtensa_decode_insn (isa, insnbuf);
5626 if (is_windowed_return_opcode (opcode))
5632 /* Re-process all of the fragments looking to convert all of the
5633 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
5634 loop end label, convert this frag to one that will generate a NOP.
5635 In any case close it off with a .fill 0. */
5638 xtensa_fix_b_j_loop_end_frags ()
5642 /* When this routine is called, all of the subsections are still intact
5643 so we walk over subsections instead of sections. */
5644 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5648 /* Walk over all of the fragments in a subsection. */
5649 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5651 if (fragP->fr_type == rs_machine_dependent
5652 && fragP->fr_subtype == RELAX_ADD_NOP_IF_PRE_LOOP_END)
5654 if (next_instr_is_loop_end (fragP))
5655 relax_frag_add_nop (fragP);
5665 next_instr_is_loop_end (fragP)
5668 const fragS *next_fragP;
5670 if (next_frag_is_loop_target (fragP))
5673 next_fragP = next_non_empty_frag (fragP);
5674 if (next_fragP == NULL)
5677 if (!next_frag_is_loop_target (next_fragP))
5680 /* If the size is >= 3 then there is more than one instruction here.
5681 The hardware bug will not fire. */
5682 if (next_fragP->fr_fix > 3)
5689 /* Re-process all of the fragments looking to convert all of the
5690 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
5691 not MY loop's loop end within 12 bytes, add enough nops here to
5692 make it at least 12 bytes away. In any case close it off with a
5696 xtensa_fix_close_loop_end_frags ()
5700 /* When this routine is called, all of the subsections are still intact
5701 so we walk over subsections instead of sections. */
5702 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5706 fragS *current_target = NULL;
5707 offsetT current_offset = 0;
5709 /* Walk over all of the fragments in a subsection. */
5710 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5712 if (fragP->fr_type == rs_machine_dependent
5713 && fragP->fr_subtype == RELAX_IMMED)
5715 /* Read it. If the instruction is a loop, get the target. */
5716 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode);
5717 if (is_loop_opcode (opcode))
5721 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5722 tinsn_immed_from_frag (&t_insn, fragP);
5724 /* Get the current fragment target. */
5725 if (fragP->fr_symbol)
5727 current_target = symbol_get_frag (fragP->fr_symbol);
5728 current_offset = fragP->fr_offset;
5734 && fragP->fr_type == rs_machine_dependent
5735 && fragP->fr_subtype == RELAX_ADD_NOP_IF_CLOSE_LOOP_END)
5738 size_t bytes_added = 0;
5740 #define REQUIRED_LOOP_DIVIDING_BYTES 12
5741 /* Max out at 12. */
5742 min_bytes = min_bytes_to_other_loop_end
5743 (fragP->fr_next, current_target, current_offset,
5744 REQUIRED_LOOP_DIVIDING_BYTES);
5746 if (min_bytes < REQUIRED_LOOP_DIVIDING_BYTES)
5748 while (min_bytes + bytes_added
5749 < REQUIRED_LOOP_DIVIDING_BYTES)
5753 if (fragP->fr_var < length)
5754 as_warn (_("fr_var %lu < length %d; ignoring"),
5755 fragP->fr_var, length);
5758 assemble_nop (length,
5759 fragP->fr_literal + fragP->fr_fix);
5760 fragP->fr_fix += length;
5761 fragP->fr_var -= length;
5763 bytes_added += length;
5774 min_bytes_to_other_loop_end (fragP, current_target, current_offset, max_size)
5776 fragS *current_target;
5777 offsetT current_offset;
5781 fragS *current_fragP;
5783 for (current_fragP = fragP;
5785 current_fragP = current_fragP->fr_next)
5787 if (current_fragP->tc_frag_data.is_loop_target
5788 && current_fragP != current_target)
5789 return offset + current_offset;
5791 offset += unrelaxed_frag_min_size (current_fragP);
5793 if (offset + current_offset >= max_size)
5801 unrelaxed_frag_min_size (fragP)
5804 size_t size = fragP->fr_fix;
5807 if (fragP->fr_type == rs_fill)
5808 size += fragP->fr_offset;
5814 /* Re-process all of the fragments looking to convert all
5815 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
5818 1) the instruction size count to the loop end label
5819 is too short (<= 2 instructions),
5820 2) loop has a jump or branch in it
5823 1) software_avoid_all_short_loops is true
5824 2) The generating loop was a 'loopgtz' or 'loopnez'
5825 3) the instruction size count to the loop end label is too short
5827 then convert this frag (and maybe the next one) to generate a NOP.
5828 In any case close it off with a .fill 0. */
5831 xtensa_fix_short_loop_frags ()
5835 /* When this routine is called, all of the subsections are still intact
5836 so we walk over subsections instead of sections. */
5837 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5840 fragS *current_target = NULL;
5841 offsetT current_offset = 0;
5842 xtensa_opcode current_opcode = XTENSA_UNDEFINED;
5844 /* Walk over all of the fragments in a subsection. */
5845 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5847 /* check on the current loop */
5848 if (fragP->fr_type == rs_machine_dependent
5849 && fragP->fr_subtype == RELAX_IMMED)
5851 /* Read it. If the instruction is a loop, get the target. */
5852 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode);
5853 if (is_loop_opcode (opcode))
5857 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5858 tinsn_immed_from_frag (&t_insn, fragP);
5860 /* Get the current fragment target. */
5861 if (fragP->fr_symbol)
5863 current_target = symbol_get_frag (fragP->fr_symbol);
5864 current_offset = fragP->fr_offset;
5865 current_opcode = opcode;
5870 if (fragP->fr_type == rs_machine_dependent
5871 && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
5874 count_insns_to_loop_end (fragP->fr_next, TRUE, 3);
5876 && (branch_before_loop_end (fragP->fr_next)
5877 || (software_avoid_all_short_loops
5878 && current_opcode != XTENSA_UNDEFINED
5879 && !is_the_loop_opcode (current_opcode))))
5880 relax_frag_add_nop (fragP);
5890 count_insns_to_loop_end (base_fragP, count_relax_add, max_count)
5892 bfd_boolean count_relax_add;
5895 fragS *fragP = NULL;
5896 size_t insn_count = 0;
5900 for (; fragP && !fragP->tc_frag_data.is_loop_target; fragP = fragP->fr_next)
5902 insn_count += unrelaxed_frag_min_insn_count (fragP);
5903 if (insn_count >= max_count)
5906 if (count_relax_add)
5908 if (fragP->fr_type == rs_machine_dependent
5909 && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
5911 /* In order to add the appropriate number of
5912 NOPs, we count an instruction for downstream
5915 if (insn_count >= max_count)
5925 unrelaxed_frag_min_insn_count (fragP)
5928 size_t insn_count = 0;
5931 if (!fragP->tc_frag_data.is_insn)
5934 /* Decode the fixed instructions. */
5935 while (offset < fragP->fr_fix)
5937 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset);
5938 if (opcode == XTENSA_UNDEFINED)
5940 as_fatal (_("undecodable instruction in instruction frag"));
5943 offset += xtensa_insn_length (xtensa_default_isa, opcode);
5952 branch_before_loop_end (base_fragP)
5957 for (fragP = base_fragP;
5958 fragP && !fragP->tc_frag_data.is_loop_target;
5959 fragP = fragP->fr_next)
5961 if (unrelaxed_frag_has_b_j (fragP))
5969 unrelaxed_frag_has_b_j (fragP)
5972 size_t insn_count = 0;
5975 if (!fragP->tc_frag_data.is_insn)
5978 /* Decode the fixed instructions. */
5979 while (offset < fragP->fr_fix)
5981 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset);
5982 if (opcode == XTENSA_UNDEFINED)
5984 as_fatal (_("undecodable instruction in instruction frag"));
5987 if (is_branch_or_jump_opcode (opcode))
5989 offset += xtensa_insn_length (xtensa_default_isa, opcode);
5995 /* Checks to be made after initial assembly but before relaxation. */
5998 xtensa_sanity_check ()
6005 as_where (&file_name, &line);
6006 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
6010 /* Walk over all of the fragments in a subsection. */
6011 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
6013 /* Currently we only check for empty loops here. */
6014 if (fragP->fr_type == rs_machine_dependent
6015 && fragP->fr_subtype == RELAX_IMMED)
6017 static xtensa_insnbuf insnbuf = NULL;
6020 if (fragP->fr_opcode != NULL)
6023 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6024 tinsn_from_chars (&t_insn, fragP->fr_opcode);
6025 tinsn_immed_from_frag (&t_insn, fragP);
6027 if (is_loop_opcode (t_insn.opcode))
6029 if (is_empty_loop (&t_insn, fragP))
6031 new_logical_line (fragP->fr_file, fragP->fr_line);
6032 as_bad (_("invalid empty loop"));
6034 if (!is_local_forward_loop (&t_insn, fragP))
6036 new_logical_line (fragP->fr_file, fragP->fr_line);
6037 as_bad (_("loop target does not follow "
6038 "loop instruction in section"));
6045 new_logical_line (file_name, line);
6049 #define LOOP_IMMED_OPN 1
6051 /* Return true if the loop target is the next non-zero fragment. */
6054 is_empty_loop (insn, fragP)
6058 const expressionS *expr;
6062 if (insn->insn_type != ITYPE_INSN)
6065 if (!is_loop_opcode (insn->opcode))
6068 if (insn->ntok <= LOOP_IMMED_OPN)
6071 expr = &insn->tok[LOOP_IMMED_OPN];
6073 if (expr->X_op != O_symbol)
6076 symbolP = expr->X_add_symbol;
6080 if (symbol_get_frag (symbolP) == NULL)
6083 if (S_GET_VALUE (symbolP) != 0)
6086 /* Walk through the zero-size fragments from this one. If we find
6087 the target fragment, then this is a zero-size loop. */
6088 for (next_fragP = fragP->fr_next;
6090 next_fragP = next_fragP->fr_next)
6092 if (next_fragP == symbol_get_frag (symbolP))
6094 if (next_fragP->fr_fix != 0)
6102 is_local_forward_loop (insn, fragP)
6106 const expressionS *expr;
6110 if (insn->insn_type != ITYPE_INSN)
6113 if (!is_loop_opcode (insn->opcode))
6116 if (insn->ntok <= LOOP_IMMED_OPN)
6119 expr = &insn->tok[LOOP_IMMED_OPN];
6121 if (expr->X_op != O_symbol)
6124 symbolP = expr->X_add_symbol;
6128 if (symbol_get_frag (symbolP) == NULL)
6131 /* Walk through fragments until we find the target.
6132 If we do not find the target, then this is an invalid loop. */
6133 for (next_fragP = fragP->fr_next;
6135 next_fragP = next_fragP->fr_next)
6136 if (next_fragP == symbol_get_frag (symbolP))
6143 /* Alignment Functions. */
6146 get_text_align_power (target_size)
6150 for (i = 0; i < sizeof (size_t); i++)
6152 if (target_size <= (1 << i))
6155 as_fatal (_("get_text_align_power: argument too large"));
6161 get_text_align_max_fill_size (align_pow, use_nops, use_no_density)
6163 bfd_boolean use_nops;
6164 bfd_boolean use_no_density;
6167 return (1 << align_pow);
6169 return 3 * (1 << align_pow);
6171 return 1 + (1 << align_pow);
6175 /* get_text_align_fill_size ()
6179 target_size = size of next instruction
6180 align_pow = get_text_align_power (target_size).
6184 address = current address + loop instruction size;
6185 target_size = 3 (for 2 or 3 byte target)
6186 = 8 (for 8 byte target)
6187 align_pow = get_text_align_power (target_size);
6189 use_no_density = set appropriately
6191 address = current address + loop instruction size;
6193 align_pow = get_text_align_power (target_size);
6195 use_no_density = 0. */
6198 get_text_align_fill_size (address, align_pow, target_size,
6199 use_nops, use_no_density)
6203 bfd_boolean use_nops;
6204 bfd_boolean use_no_density;
6208 align_pow: log2 (required alignment).
6210 target_size: alignment must allow the new_address and
6211 new_address+target_size-1.
6213 use_nops: if true, then we can only use 2 or 3 byte nops.
6215 use_no_density: if use_nops and use_no_density, we can only use
6218 Usually, for non-zero target_size, the align_pow is the power of 2
6219 that is greater than or equal to the target_size. This handles the
6220 2-byte, 3-byte and 8-byte instructions. */
6222 size_t alignment = (1 << align_pow);
6225 /* This is the easy case. */
6227 mod = address % alignment;
6229 mod = alignment - mod;
6230 assert ((address + mod) % alignment == 0);
6234 /* This is the slightly harder case. */
6235 assert ((int) alignment >= target_size);
6236 assert (target_size > 0);
6237 if (!use_no_density)
6240 for (i = 0; i < alignment * 2; i++)
6244 if ((address + i) >> align_pow ==
6245 (address + i + target_size - 1) >> align_pow)
6253 /* Can only fill multiples of 3. */
6254 for (i = 0; i <= alignment * 3; i += 3)
6256 if ((address + i) >> align_pow ==
6257 (address + i + target_size - 1) >> align_pow)
6266 /* This will assert if it is not possible. */
6269 get_text_align_nop_count (fill_size, use_no_density)
6271 bfd_boolean use_no_density;
6276 assert (fill_size % 3 == 0);
6277 return (fill_size / 3);
6280 assert (fill_size != 1); /* Bad argument. */
6282 while (fill_size > 1)
6284 size_t insn_size = 3;
6285 if (fill_size == 2 || fill_size == 4)
6287 fill_size -= insn_size;
6290 assert (fill_size != 1); /* Bad algorithm. */
6296 get_text_align_nth_nop_size (fill_size, n, use_no_density)
6299 bfd_boolean use_no_density;
6303 assert (get_text_align_nop_count (fill_size, use_no_density) > n);
6308 while (fill_size > 1)
6310 size_t insn_size = 3;
6311 if (fill_size == 2 || fill_size == 4)
6313 fill_size -= insn_size;
6323 /* For the given fragment, find the appropriate address
6324 for it to begin at if we are using NOPs to align it. */
6327 get_noop_aligned_address (fragP, address)
6331 static xtensa_insnbuf insnbuf = NULL;
6332 size_t fill_size = 0;
6335 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6337 switch (fragP->fr_type)
6339 case rs_machine_dependent:
6340 if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
6342 /* The rule is: get next fragment's FIRST instruction. Find
6343 the smallest number of bytes that need to be added to
6344 ensure that the next fragment's FIRST instruction will fit
6347 E.G., 2 bytes : 0, 1, 2 mod 4
6350 If the FIRST instruction MIGHT be relaxed,
6351 assume that it will become a 3 byte instruction. */
6353 int target_insn_size;
6354 xtensa_opcode opcode = next_frag_opcode (fragP);
6355 addressT pre_opcode_bytes;
6357 if (opcode == XTENSA_UNDEFINED)
6359 as_bad_where (fragP->fr_file, fragP->fr_line,
6360 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6361 as_fatal (_("cannot continue"));
6364 target_insn_size = xtensa_insn_length (xtensa_default_isa, opcode);
6366 pre_opcode_bytes = next_frag_pre_opcode_bytes (fragP);
6368 if (is_loop_opcode (opcode))
6370 /* next_fragP should be the loop. */
6371 const fragS *next_fragP = next_non_empty_frag (fragP);
6372 xtensa_opcode next_opcode = next_frag_opcode (next_fragP);
6375 pre_opcode_bytes += target_insn_size;
6377 /* For loops, the alignment depends on the size of the
6378 instruction following the loop, not the loop instruction. */
6379 if (next_opcode == XTENSA_UNDEFINED)
6380 target_insn_size = 3;
6384 xtensa_insn_length (xtensa_default_isa, next_opcode);
6386 if (target_insn_size == 2)
6387 target_insn_size = 3; /* ISA specifies this. */
6390 /* If it was 8, then we'll need a larger alignment
6392 alignment = get_text_align_power (target_insn_size);
6394 /* Is Now_seg valid */
6395 record_alignment (now_seg, alignment);
6398 as_fatal (_("expected loop opcode in relax align next target"));
6400 fill_size = get_text_align_fill_size
6401 (address + pre_opcode_bytes,
6402 get_text_align_power (target_insn_size),
6403 target_insn_size, TRUE, fragP->tc_frag_data.is_no_density);
6409 fill_size = get_text_align_fill_size
6410 (address, fragP->fr_offset, 1, TRUE,
6411 fragP->tc_frag_data.is_no_density);
6415 as_fatal (_("expected align_code or RELAX_ALIGN_NEXT_OPCODE"));
6418 return address + fill_size;
6422 /* 3 mechanisms for relaxing an alignment:
6424 Align to a power of 2.
6425 Align so the next fragment's instruction does not cross a word boundary.
6426 Align the current instruction so that if the next instruction
6427 were 3 bytes, it would not cross a word boundary.
6431 zeros - This is easy; always insert zeros.
6432 nops - 3 and 2 byte instructions
6436 >=5 : 3 byte instruction + fn(n-3)
6437 widening - widen previous instructions. */
6440 get_widen_aligned_address (fragP, address)
6444 addressT align_pow, new_address, loop_insn_offset;
6447 xtensa_opcode opcode, next_opcode;
6448 static xtensa_insnbuf insnbuf = NULL;
6451 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6453 if (fragP->fr_type == rs_align || fragP->fr_type == rs_align_code)
6455 align_pow = fragP->fr_offset;
6456 new_address = ((address + ((1 << align_pow) - 1))
6457 << align_pow) >> align_pow;
6461 if (fragP->fr_type == rs_machine_dependent)
6463 switch (fragP->fr_subtype)
6465 case RELAX_DESIRE_ALIGN:
6467 /* The rule is: get the next fragment's FIRST instruction.
6468 Find the smallest number of bytes needed to be added
6469 in order to ensure that the next fragment is FIRST
6470 instruction will fit in a single word.
6471 i.e. 2 bytes : 0, 1, 2. mod 4
6473 If the FIRST instruction MIGHT be relaxed,
6474 assume that it will become a 3-byte instruction. */
6477 /* Check to see if it might be 2 bytes. */
6478 next_opcode = next_frag_opcode (fragP);
6479 if (next_opcode != XTENSA_UNDEFINED
6480 && xtensa_insn_length (xtensa_default_isa, next_opcode) == 2)
6483 assert (insn_size <= 4);
6484 for (new_address = address; new_address < address + 4; new_address++)
6486 if (new_address >> 2 == (new_address + insn_size - 1) >> 2)
6489 as_bad (_("internal error aligning"));
6492 case RELAX_ALIGN_NEXT_OPCODE:
6493 /* The rule is: get next fragment's FIRST instruction.
6494 Find the smallest number of bytes needed to be added
6495 in order to ensure that the next fragment's FIRST
6496 instruction will fit in a single word.
6497 i.e. 2 bytes : 0, 1, 2. mod 4
6499 If the FIRST instruction MIGHT be relaxed,
6500 assume that it will become a 3 byte instruction. */
6502 opcode = next_frag_opcode (fragP);
6503 if (opcode == XTENSA_UNDEFINED)
6505 as_bad_where (fragP->fr_file, fragP->fr_line,
6506 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6507 as_fatal (_("cannot continue"));
6509 insn_size = xtensa_insn_length (xtensa_default_isa, opcode);
6510 assert (insn_size <= 4);
6511 assert (is_loop_opcode (opcode));
6513 loop_insn_offset = 0;
6514 next_frag = next_non_empty_frag (fragP);
6516 /* If the loop has been expanded then the loop
6517 instruction could be at an offset from this fragment. */
6518 if (next_frag->fr_subtype != RELAX_IMMED)
6519 loop_insn_offset = get_expanded_loop_offset (opcode);
6521 for (new_address = address; new_address < address + 4; new_address++)
6523 if ((new_address + loop_insn_offset + insn_size) >> 2 ==
6524 (new_address + loop_insn_offset + insn_size + 2) >> 2)
6527 as_bad (_("internal error aligning"));
6531 as_bad (_("internal error aligning"));
6535 as_bad (_("internal error aligning"));
6540 /* md_relax_frag Hook and Helper Functions. */
6542 /* Return the number of bytes added to this fragment, given that the
6543 input has been stretched already by "stretch". */
6546 xtensa_relax_frag (fragP, stretch, stretched_p)
6551 int unreported = fragP->tc_frag_data.unreported_expansion;
6552 long new_stretch = 0;
6556 as_where (&file_name, &line);
6557 new_logical_line (fragP->fr_file, fragP->fr_line);
6559 fragP->tc_frag_data.unreported_expansion = 0;
6561 switch (fragP->fr_subtype)
6563 case RELAX_ALIGN_NEXT_OPCODE:
6564 /* Always convert. */
6565 new_stretch = relax_frag_text_align (fragP, stretch);
6568 case RELAX_LOOP_END:
6572 case RELAX_LOOP_END_ADD_NOP:
6573 /* Add a NOP and switch to .fill 0. */
6574 new_stretch = relax_frag_add_nop (fragP);
6577 case RELAX_DESIRE_ALIGN:
6578 /* We REALLY want to change the relaxation order here. This
6579 should do NOTHING. The narrowing before it will either align
6584 case RELAX_LITERAL_FINAL:
6587 case RELAX_LITERAL_NR:
6589 fragP->fr_subtype = RELAX_LITERAL_FINAL;
6590 assert (unreported == lit_size);
6591 memset (&fragP->fr_literal[fragP->fr_fix], 0, 4);
6592 fragP->fr_var -= lit_size;
6593 fragP->fr_fix += lit_size;
6598 new_stretch = relax_frag_narrow (fragP, stretch);
6602 case RELAX_IMMED_STEP1:
6603 case RELAX_IMMED_STEP2:
6604 /* Place the immediate. */
6605 new_stretch = relax_frag_immed (now_seg, fragP, stretch,
6606 fragP->fr_subtype - RELAX_IMMED,
6610 case RELAX_LITERAL_POOL_BEGIN:
6611 case RELAX_LITERAL_POOL_END:
6612 /* No relaxation required. */
6616 as_bad (_("bad relaxation state"));
6619 new_logical_line (file_name, line);
6625 relax_frag_text_align (fragP, stretch)
6629 addressT old_address, old_next_address, old_size;
6630 addressT new_address, new_next_address, new_size;
6633 /* Overview of the relaxation procedure for alignment
6634 inside an executable section:
6636 The old size is stored in the tc_frag_data.text_expansion field.
6638 Calculate the new address, fix up the text_expansion and
6639 return the growth. */
6641 /* Calculate the old address of this fragment and the next fragment. */
6642 old_address = fragP->fr_address - stretch;
6643 old_next_address = (fragP->fr_address - stretch + fragP->fr_fix +
6644 fragP->tc_frag_data.text_expansion);
6645 old_size = old_next_address - old_address;
6647 /* Calculate the new address of this fragment and the next fragment. */
6648 new_address = fragP->fr_address;
6650 get_noop_aligned_address (fragP, fragP->fr_address + fragP->fr_fix);
6651 new_size = new_next_address - new_address;
6653 growth = new_size - old_size;
6655 /* Fix up the text_expansion field and return the new growth. */
6656 fragP->tc_frag_data.text_expansion += growth;
6661 /* Add a NOP (i.e., "or a1, a1, a1"). Use the 3-byte one because we
6662 don't know about the availability of density yet. TODO: When the
6663 flags are stored per fragment, use NOP.N when possible. */
6666 relax_frag_add_nop (fragP)
6669 static xtensa_insnbuf insnbuf = NULL;
6671 char *nop_buf = fragP->fr_literal + fragP->fr_fix;
6674 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6676 tinsn_init (&t_insn);
6677 t_insn.opcode = xtensa_or_opcode;
6678 assert (t_insn.opcode != XTENSA_UNDEFINED);
6681 set_expr_const (&t_insn.tok[0], 1);
6682 set_expr_const (&t_insn.tok[1], 1);
6683 set_expr_const (&t_insn.tok[2], 1);
6685 tinsn_to_insnbuf (&t_insn, insnbuf);
6686 fragP->tc_frag_data.is_insn = TRUE;
6687 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, nop_buf);
6689 length = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
6690 if (fragP->fr_var < length)
6692 as_warn (_("fr_var (%ld) < length (%d); ignoring"),
6693 fragP->fr_var, length);
6698 fragP->fr_fix += length;
6699 fragP->fr_var -= length;
6706 relax_frag_narrow (fragP, stretch)
6710 /* Overview of the relaxation procedure for alignment inside an
6711 executable section: Find the number of widenings required and the
6712 number of nop bytes required. Store the number of bytes ALREADY
6713 widened. If there are enough instructions to widen (must go back
6714 ONLY through NARROW fragments), mark each of the fragments as TO BE
6715 widened, recalculate the fragment addresses. */
6717 assert (fragP->fr_type == rs_machine_dependent
6718 && fragP->fr_subtype == RELAX_NARROW);
6720 if (!future_alignment_required (fragP, 0))
6722 /* If already expanded but no longer needed because of a prior
6723 stretch, it is SAFE to unexpand because the next fragment will
6724 NEVER start at an address > the previous time through the
6726 if (fragP->tc_frag_data.text_expansion)
6730 fragP->tc_frag_data.text_expansion = 0;
6733 /* Otherwise we have to live with this bad choice. */
6739 if (fragP->tc_frag_data.text_expansion == 0)
6741 fragP->tc_frag_data.text_expansion = 1;
6750 future_alignment_required (fragP, stretch)
6754 long address = fragP->fr_address + stretch;
6756 addressT aligned_address;
6757 offsetT desired_diff;
6761 /* Limit this to a small search. */
6764 address += fragP->fr_fix;
6766 switch (fragP->fr_type)
6769 address += fragP->fr_offset * fragP->fr_var;
6772 case rs_machine_dependent:
6773 switch (fragP->fr_subtype)
6776 /* address += fragP->fr_fix; */
6781 address += (/* fragP->fr_fix + */
6782 fragP->tc_frag_data.text_expansion);
6785 case RELAX_ALIGN_NEXT_OPCODE:
6786 case RELAX_DESIRE_ALIGN:
6787 /* address += fragP->fr_fix; */
6788 aligned_address = get_widen_aligned_address (fragP, address);
6789 desired_diff = aligned_address - address;
6790 assert (desired_diff >= 0);
6791 /* If there are enough wideners in between do it. */
6792 /* return (num_widens == desired_diff); */
6793 if (num_widens == desired_diff)
6795 if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
6807 fragP = fragP->fr_next;
6815 relax_frag_immed (segP, fragP, stretch, min_steps, stretched_p)
6822 static xtensa_insnbuf insnbuf = NULL;
6825 bfd_boolean negatable_branch = FALSE;
6826 bfd_boolean branch_jmp_to_next = FALSE;
6828 offsetT frag_offset;
6831 int num_text_bytes, num_literal_bytes;
6832 int literal_diff, text_diff;
6834 assert (fragP->fr_opcode != NULL);
6837 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6839 tinsn_from_chars (&t_insn, fragP->fr_opcode);
6840 tinsn_immed_from_frag (&t_insn, fragP);
6842 negatable_branch = is_negatable_branch (&t_insn);
6844 old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
6846 if (software_avoid_b_j_loop_end)
6847 branch_jmp_to_next = is_branch_jmp_to_next (&t_insn, fragP);
6849 /* Special case: replace a branch to the next instruction with a NOP.
6850 This is required to work around a hardware bug in T1040.0 and also
6851 serves as an optimization. */
6853 if (branch_jmp_to_next
6854 && ((old_size == 2) || (old_size == 3))
6855 && !next_frag_is_loop_target (fragP))
6858 /* Here is the fun stuff: Get the immediate field from this
6859 instruction. If it fits, we are done. If not, find the next
6860 instruction sequence that fits. */
6862 frag_offset = fragP->fr_opcode - fragP->fr_literal;
6863 istack_init (&istack);
6864 num_steps = xg_assembly_relax (&istack, &t_insn, segP, fragP, frag_offset,
6865 min_steps, stretch);
6866 if (num_steps < min_steps)
6868 as_fatal (_("internal error: relaxation failed"));
6872 if (num_steps > RELAX_IMMED_MAXSTEPS)
6874 as_fatal (_("internal error: relaxation requires too many steps"));
6878 fragP->fr_subtype = (int) RELAX_IMMED + num_steps;
6880 /* Figure out the number of bytes needed. */
6882 num_text_bytes = get_num_stack_text_bytes (&istack) - old_size;
6883 num_literal_bytes = get_num_stack_literal_bytes (&istack);
6884 literal_diff = num_literal_bytes - fragP->tc_frag_data.literal_expansion;
6885 text_diff = num_text_bytes - fragP->tc_frag_data.text_expansion;
6887 /* It MUST get larger. If not, we could get an infinite loop. */
6888 know (num_text_bytes >= 0);
6889 know (literal_diff >= 0 && text_diff >= 0);
6891 fragP->tc_frag_data.text_expansion = num_text_bytes;
6892 fragP->tc_frag_data.literal_expansion = num_literal_bytes;
6894 /* Find the associated expandable literal for this. */
6895 if (literal_diff != 0)
6897 lit_fragP = fragP->tc_frag_data.literal_frag;
6900 assert (literal_diff == 4);
6901 lit_fragP->tc_frag_data.unreported_expansion += literal_diff;
6903 /* We expect that the literal section state has NOT been
6905 assert (lit_fragP->fr_type == rs_machine_dependent
6906 && lit_fragP->fr_subtype == RELAX_LITERAL);
6907 lit_fragP->fr_subtype = RELAX_LITERAL_NR;
6909 /* We need to mark this section for another iteration
6915 /* This implicitly uses the assumption that a branch is negated
6916 when the size of the output increases by at least 2 bytes. */
6918 if (negatable_branch && num_text_bytes >= 2)
6920 /* If next frag is a loop end, then switch it to add a NOP. */
6921 update_next_frag_nop_state (fragP);
6928 /* md_convert_frag Hook and Helper Functions. */
6931 md_convert_frag (abfd, sec, fragp)
6932 bfd *abfd ATTRIBUTE_UNUSED;
6939 as_where (&file_name, &line);
6940 new_logical_line (fragp->fr_file, fragp->fr_line);
6942 switch (fragp->fr_subtype)
6944 case RELAX_ALIGN_NEXT_OPCODE:
6945 /* Always convert. */
6946 convert_frag_align_next_opcode (fragp);
6949 case RELAX_DESIRE_ALIGN:
6950 /* Do nothing. If not aligned already, too bad. */
6954 case RELAX_LITERAL_FINAL:
6958 /* No conversion. */
6959 convert_frag_narrow (fragp);
6963 case RELAX_IMMED_STEP1:
6964 case RELAX_IMMED_STEP2:
6965 /* Place the immediate. */
6966 convert_frag_immed (sec, fragp, fragp->fr_subtype - RELAX_IMMED);
6969 case RELAX_LITERAL_NR:
6970 if (use_literal_section)
6972 /* This should have been handled during relaxation. When
6973 relaxing a code segment, literals sometimes need to be
6974 added to the corresponding literal segment. If that
6975 literal segment has already been relaxed, then we end up
6976 in this situation. Marking the literal segments as data
6977 would make this happen less often (since GAS always relaxes
6978 code before data), but we could still get into trouble if
6979 there are instructions in a segment that is not marked as
6980 containing code. Until we can implement a better solution,
6981 cheat and adjust the addresses of all the following frags.
6982 This could break subsequent alignments, but the linker's
6983 literal coalescing will do that anyway. */
6986 fragp->fr_subtype = RELAX_LITERAL_FINAL;
6987 assert (fragp->tc_frag_data.unreported_expansion == 4);
6988 memset (&fragp->fr_literal[fragp->fr_fix], 0, 4);
6991 for (f = fragp->fr_next; f; f = f->fr_next)
6995 as_bad (_("invalid relaxation fragment result"));
7000 new_logical_line (file_name, line);
7005 convert_frag_align_next_opcode (fragp)
7008 char *nop_buf; /* Location for Writing. */
7011 bfd_boolean use_no_density = fragp->tc_frag_data.is_no_density;
7012 addressT aligned_address;
7013 size_t fill_size, nop_count;
7015 aligned_address = get_noop_aligned_address (fragp, fragp->fr_address +
7017 fill_size = aligned_address - (fragp->fr_address + fragp->fr_fix);
7018 nop_count = get_text_align_nop_count (fill_size, use_no_density);
7019 nop_buf = fragp->fr_literal + fragp->fr_fix;
7021 for (i = 0; i < nop_count; i++)
7024 nop_size = get_text_align_nth_nop_size (fill_size, i, use_no_density);
7026 assemble_nop (nop_size, nop_buf);
7027 nop_buf += nop_size;
7030 fragp->fr_fix += fill_size;
7031 fragp->fr_var -= fill_size;
7036 convert_frag_narrow (fragP)
7039 static xtensa_insnbuf insnbuf = NULL;
7040 TInsn t_insn, single_target;
7041 int size, old_size, diff, error_val;
7042 offsetT frag_offset;
7044 if (fragP->tc_frag_data.text_expansion == 0)
7046 /* No conversion. */
7051 assert (fragP->fr_opcode != NULL);
7054 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
7056 tinsn_from_chars (&t_insn, fragP->fr_opcode);
7057 tinsn_immed_from_frag (&t_insn, fragP);
7059 /* Just convert it to a wide form.... */
7061 old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
7063 tinsn_init (&single_target);
7064 frag_offset = fragP->fr_opcode - fragP->fr_literal;
7066 error_val = xg_expand_narrow (&single_target, &t_insn);
7068 as_bad (_("unable to widen instruction"));
7070 size = xtensa_insn_length (xtensa_default_isa, single_target.opcode);
7071 xg_emit_insn_to_buf (&single_target, fragP->fr_opcode,
7072 fragP, frag_offset, TRUE);
7074 diff = size - old_size;
7076 assert (diff <= fragP->fr_var);
7077 fragP->fr_var -= diff;
7078 fragP->fr_fix += diff;
7086 convert_frag_immed (segP, fragP, min_steps)
7091 char *immed_instr = fragP->fr_opcode;
7092 static xtensa_insnbuf insnbuf = NULL;
7094 bfd_boolean expanded = FALSE;
7095 char *fr_opcode = fragP->fr_opcode;
7096 bfd_boolean branch_jmp_to_next = FALSE;
7099 assert (fragP->fr_opcode != NULL);
7102 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
7104 tinsn_from_chars (&orig_t_insn, fragP->fr_opcode);
7105 tinsn_immed_from_frag (&orig_t_insn, fragP);
7107 /* Here is the fun stuff: Get the immediate field from this
7108 instruction. If it fits, we're done. If not, find the next
7109 instruction sequence that fits. */
7111 if (software_avoid_b_j_loop_end)
7112 branch_jmp_to_next = is_branch_jmp_to_next (&orig_t_insn, fragP);
7114 if (branch_jmp_to_next && !next_frag_is_loop_target (fragP))
7116 /* Conversion just inserts a NOP and marks the fix as completed. */
7117 size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode);
7118 assemble_nop (size, fragP->fr_opcode);
7125 symbolS *lit_sym = NULL;
7129 symbolS *gen_label = NULL;
7130 offsetT frag_offset;
7132 /* It does not fit. Find something that does and
7133 convert immediately. */
7134 frag_offset = fragP->fr_opcode - fragP->fr_literal;
7135 istack_init (&istack);
7136 xg_assembly_relax (&istack, &orig_t_insn,
7137 segP, fragP, frag_offset, min_steps, 0);
7139 old_size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode);
7141 /* Assemble this right inline. */
7143 /* First, create the mapping from a label name to the REAL label. */
7145 for (i = 0; i < istack.ninsn; i++)
7147 TInsn *t_insn = &istack.insn[i];
7151 switch (t_insn->insn_type)
7154 if (lit_sym != NULL)
7155 as_bad (_("multiple literals in expansion"));
7156 /* First find the appropriate space in the literal pool. */
7157 lit_frag = fragP->tc_frag_data.literal_frag;
7158 if (lit_frag == NULL)
7159 as_bad (_("no registered fragment for literal"));
7160 if (t_insn->ntok != 1)
7161 as_bad (_("number of literal tokens != 1"));
7163 /* Set the literal symbol and add a fixup. */
7164 lit_sym = lit_frag->fr_symbol;
7168 assert (gen_label == NULL);
7169 gen_label = symbol_new (FAKE_LABEL_NAME, now_seg,
7170 fragP->fr_opcode - fragP->fr_literal +
7175 size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode);
7182 for (i = 0; i < istack.ninsn; i++)
7184 TInsn *t_insn = &istack.insn[i];
7189 switch (t_insn->insn_type)
7192 lit_frag = fragP->tc_frag_data.literal_frag;
7193 /* already checked */
7194 assert (lit_frag != NULL);
7195 assert (lit_sym != NULL);
7196 assert (t_insn->ntok == 1);
7198 target_seg = S_GET_SEGMENT (lit_sym);
7199 assert (target_seg);
7200 fix_new_exp_in_seg (target_seg, 0, lit_frag, 0, 4,
7201 &t_insn->tok[0], FALSE, BFD_RELOC_32);
7208 xg_resolve_labels (t_insn, gen_label);
7209 xg_resolve_literals (t_insn, lit_sym);
7210 size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode);
7212 xg_emit_insn_to_buf (t_insn, immed_instr, fragP,
7213 immed_instr - fragP->fr_literal, TRUE);
7214 immed_instr += size;
7219 diff = total_size - old_size;
7223 assert (diff <= fragP->fr_var);
7224 fragP->fr_var -= diff;
7225 fragP->fr_fix += diff;
7231 /* Check for undefined immediates in LOOP instructions. */
7232 if (is_loop_opcode (orig_t_insn.opcode))
7235 sym = orig_t_insn.tok[1].X_add_symbol;
7236 if (sym != NULL && !S_IS_DEFINED (sym))
7238 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
7241 sym = orig_t_insn.tok[1].X_op_symbol;
7242 if (sym != NULL && !S_IS_DEFINED (sym))
7244 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
7249 if (expanded && is_loop_opcode (orig_t_insn.opcode))
7250 convert_frag_immed_finish_loop (segP, fragP, &orig_t_insn);
7252 if (expanded && is_direct_call_opcode (orig_t_insn.opcode))
7254 /* Add an expansion note on the expanded instruction. */
7255 fix_new_exp_in_seg (now_seg, 0, fragP, fr_opcode - fragP->fr_literal, 4,
7256 &orig_t_insn.tok[0], TRUE,
7257 BFD_RELOC_XTENSA_ASM_EXPAND);
7263 /* Add a new fix expression into the desired segment. We have to
7264 switch to that segment to do this. */
7267 fix_new_exp_in_seg (new_seg, new_subseg,
7268 frag, where, size, exp, pcrel, r_type)
7276 bfd_reloc_code_real_type r_type;
7280 subsegT subseg = now_subseg;
7281 assert (new_seg != 0);
7282 subseg_set (new_seg, new_subseg);
7284 if (r_type == BFD_RELOC_32
7285 && exp->X_add_symbol
7286 && exp->X_add_symbol->sy_tc.plt == 1)
7288 r_type = BFD_RELOC_XTENSA_PLT;
7291 new_fix = fix_new_exp (frag, where, size, exp, pcrel, r_type);
7292 subseg_set (seg, subseg);
7297 /* Relax a loop instruction so that it can span loop >256 bytes. */
7303 addi as, as, lo8(label-.L1)
7304 addmi as, as, mid8(label-.L1)
7314 convert_frag_immed_finish_loop (segP, fragP, t_insn)
7322 unsigned long target;
7323 static xtensa_insnbuf insnbuf = NULL;
7324 unsigned int loop_length, loop_length_hi, loop_length_lo;
7325 xtensa_isa isa = xtensa_default_isa;
7326 addressT loop_offset;
7327 addressT addi_offset = 9;
7328 addressT addmi_offset = 12;
7331 insnbuf = xtensa_insnbuf_alloc (isa);
7333 /* Get the loop offset. */
7334 loop_offset = get_expanded_loop_offset (t_insn->opcode);
7335 /* Validate that there really is a LOOP at the loop_offset. */
7336 tinsn_from_chars (&loop_insn, fragP->fr_opcode + loop_offset);
7338 if (!is_loop_opcode (loop_insn.opcode))
7340 as_bad_where (fragP->fr_file, fragP->fr_line,
7341 _("loop relaxation specification does not correspond"));
7344 addi_offset += loop_offset;
7345 addmi_offset += loop_offset;
7347 assert (t_insn->ntok == 2);
7348 target = get_expression_value (segP, &t_insn->tok[1]);
7351 know (symbolP->sy_frag);
7352 know (!(S_GET_SEGMENT (symbolP) == absolute_section)
7353 || symbol_get_frag (symbolP) == &zero_address_frag);
7355 loop_length = target - (fragP->fr_address + fragP->fr_fix);
7356 loop_length_hi = loop_length & ~0x0ff;
7357 loop_length_lo = loop_length & 0x0ff;
7358 if (loop_length_lo >= 128)
7360 loop_length_lo -= 256;
7361 loop_length_hi += 256;
7364 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
7365 32512. If the loop is larger than that, then we just fail. */
7366 if (loop_length_hi > 32512)
7367 as_bad_where (fragP->fr_file, fragP->fr_line,
7368 _("loop too long for LOOP instruction"));
7370 tinsn_from_chars (&addi_insn, fragP->fr_opcode + addi_offset);
7371 assert (addi_insn.opcode == xtensa_addi_opcode);
7373 tinsn_from_chars (&addmi_insn, fragP->fr_opcode + addmi_offset);
7374 assert (addmi_insn.opcode == xtensa_addmi_opcode);
7376 set_expr_const (&addi_insn.tok[2], loop_length_lo);
7377 tinsn_to_insnbuf (&addi_insn, insnbuf);
7379 fragP->tc_frag_data.is_insn = TRUE;
7380 xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addi_offset);
7382 set_expr_const (&addmi_insn.tok[2], loop_length_hi);
7383 tinsn_to_insnbuf (&addmi_insn, insnbuf);
7384 xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addmi_offset);
7389 get_expression_value (segP, exp)
7393 if (exp->X_op == O_constant)
7394 return exp->X_add_number;
7395 if (exp->X_op == O_symbol)
7397 /* Find the fragment. */
7398 symbolS *sym = exp->X_add_symbol;
7400 assert (S_GET_SEGMENT (sym) == segP
7401 || S_GET_SEGMENT (sym) == absolute_section);
7403 return (S_GET_VALUE (sym) + exp->X_add_number);
7405 as_bad (_("invalid expression evaluation type %d"), exp->X_op);
7410 /* A map that keeps information on a per-subsegment basis. This is
7411 maintained during initial assembly, but is invalid once the
7412 subsegments are smashed together. I.E., it cannot be used during
7415 typedef struct subseg_map_struct
7424 struct subseg_map_struct *next;
7427 static subseg_map *sseg_map = NULL;
7431 get_last_insn_flags (seg, subseg)
7435 subseg_map *subseg_e;
7437 for (subseg_e = sseg_map; subseg_e != NULL; subseg_e = subseg_e->next)
7438 if (seg == subseg_e->seg && subseg == subseg_e->subseg)
7439 return subseg_e->flags;
7446 set_last_insn_flags (seg, subseg, fl, val)
7452 subseg_map *subseg_e;
7454 for (subseg_e = sseg_map; subseg_e; subseg_e = subseg_e->next)
7455 if (seg == subseg_e->seg && subseg == subseg_e->subseg)
7460 subseg_e = (subseg_map *) xmalloc (sizeof (subseg_map));
7461 memset (subseg_e, 0, sizeof (subseg_map));
7462 subseg_e->seg = seg;
7463 subseg_e->subseg = subseg;
7464 subseg_e->flags = 0;
7465 subseg_e->next = sseg_map;
7466 sseg_map = subseg_e;
7470 subseg_e->flags |= fl;
7472 subseg_e->flags &= ~fl;
7476 /* Segment Lists and emit_state Stuff. */
7478 /* Remove the segment from the global sections list. */
7481 xtensa_remove_section (sec)
7484 /* Handle brain-dead bfd_section_list_remove macro, which
7485 expect the address of the prior section's "next" field, not
7486 just the address of the section to remove. */
7488 segT *ps_next_ptr = &stdoutput->sections;
7489 while (*ps_next_ptr != sec && *ps_next_ptr != NULL)
7490 ps_next_ptr = &(*ps_next_ptr)->next;
7492 assert (*ps_next_ptr != NULL);
7494 bfd_section_list_remove (stdoutput, ps_next_ptr);
7499 xtensa_insert_section (after_sec, sec)
7503 segT *after_sec_next;
7504 if (after_sec == NULL)
7505 after_sec_next = &stdoutput->sections;
7507 after_sec_next = &after_sec->next;
7509 bfd_section_list_insert (stdoutput, after_sec_next, sec);
7514 xtensa_move_seg_list_to_beginning (head)
7520 segT literal_section = head->seg;
7522 /* Move the literal section to the front of the section list. */
7523 assert (literal_section);
7524 xtensa_remove_section (literal_section);
7525 xtensa_insert_section (NULL, literal_section);
7533 xtensa_move_literals ()
7536 frchainS *frchain_from, *frchain_to;
7537 fragS *search_frag, *next_frag, *last_frag, *literal_pool, *insert_after;
7538 fragS **frag_splice;
7541 fixS *fix, *next_fix, **fix_splice;
7543 /* As clunky as this is, we can't rely on frag_var
7544 and frag_variant to get called in all situations. */
7546 segment = literal_head->next;
7549 frchain_from = seg_info (segment->seg)->frchainP;
7550 search_frag = frchain_from->frch_root;
7553 search_frag->tc_frag_data.is_literal = TRUE;
7554 search_frag = search_frag->fr_next;
7556 segment = segment->next;
7559 if (use_literal_section)
7562 segment = literal_head->next;
7565 frchain_from = seg_info (segment->seg)->frchainP;
7566 search_frag = frchain_from->frch_root;
7567 literal_pool = NULL;
7569 frag_splice = &(frchain_from->frch_root);
7571 while (!search_frag->tc_frag_data.literal_frag)
7573 assert (search_frag->fr_fix == 0
7574 || search_frag->fr_type == rs_align);
7575 search_frag = search_frag->fr_next;
7578 assert (search_frag->tc_frag_data.literal_frag->fr_subtype
7579 == RELAX_LITERAL_POOL_BEGIN);
7580 xtensa_switch_section_emit_state (&state, segment->seg, 0);
7582 /* Make sure that all the frags in this series are closed, and
7583 that there is at least one left over of zero-size. This
7584 prevents us from making a segment with an frchain without any
7586 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7587 last_frag = frag_now;
7588 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7590 while (search_frag != frag_now)
7592 next_frag = search_frag->fr_next;
7594 /* First, move the frag out of the literal section and
7595 to the appropriate place. */
7596 if (search_frag->tc_frag_data.literal_frag)
7598 literal_pool = search_frag->tc_frag_data.literal_frag;
7599 assert (literal_pool->fr_subtype == RELAX_LITERAL_POOL_BEGIN);
7600 /* Note that we set this fr_var to be a fix
7601 chain when we created the literal pool location
7602 as RELAX_LITERAL_POOL_BEGIN. */
7603 frchain_to = (frchainS *) literal_pool->fr_var;
7605 insert_after = literal_pool;
7607 while (insert_after->fr_next->fr_subtype != RELAX_LITERAL_POOL_END)
7608 insert_after = insert_after->fr_next;
7610 dest_seg = (segT) insert_after->fr_next->fr_var;
7612 *frag_splice = next_frag;
7613 search_frag->fr_next = insert_after->fr_next;
7614 insert_after->fr_next = search_frag;
7615 search_frag->tc_frag_data.lit_seg = dest_seg;
7617 /* Now move any fixups associated with this frag to the
7619 fix = frchain_from->fix_root;
7620 fix_splice = &(frchain_from->fix_root);
7623 next_fix = fix->fx_next;
7624 if (fix->fx_frag == search_frag)
7626 *fix_splice = next_fix;
7627 fix->fx_next = frchain_to->fix_root;
7628 frchain_to->fix_root = fix;
7629 if (frchain_to->fix_tail == NULL)
7630 frchain_to->fix_tail = fix;
7633 fix_splice = &(fix->fx_next);
7636 search_frag = next_frag;
7639 if (frchain_from->fix_root != NULL)
7641 frchain_from = seg_info (segment->seg)->frchainP;
7642 as_warn (_("fixes not all moved from %s"), segment->seg->name);
7644 assert (frchain_from->fix_root == NULL);
7646 frchain_from->fix_tail = NULL;
7647 xtensa_restore_emit_state (&state);
7648 segment = segment->next;
7651 xtensa_move_frag_symbols ();
7656 xtensa_move_frag_symbol (sym)
7659 fragS *frag = symbol_get_frag (sym);
7661 if (frag->tc_frag_data.lit_seg != (segT) 0)
7662 S_SET_SEGMENT (sym, frag->tc_frag_data.lit_seg);
7667 xtensa_move_frag_symbols ()
7671 /* Although you might think that only one of these lists should be
7672 searched, it turns out that the difference of the two sets
7673 (either way) is not empty. They do overlap quite a bit,
7676 for (symbolP = symbol_rootP; symbolP; symbolP = symbolP->sy_next)
7677 xtensa_move_frag_symbol (symbolP);
7679 map_over_defined_symbols (xtensa_move_frag_symbol);
7684 xtensa_reorder_seg_list (head, after)
7688 /* Move all of the sections in the section list to come
7689 after "after" in the gnu segment list. */
7694 segT literal_section = head->seg;
7696 /* Move the literal section after "after". */
7697 assert (literal_section);
7698 if (literal_section != after)
7700 xtensa_remove_section (literal_section);
7701 xtensa_insert_section (after, literal_section);
7709 /* Push all the literal segments to the end of the gnu list. */
7712 xtensa_reorder_segments ()
7719 for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
7722 /* Now that we have the last section, push all the literal
7723 sections to the end. */
7724 last_sec = get_last_sec ();
7725 xtensa_reorder_seg_list (literal_head, last_sec);
7726 xtensa_reorder_seg_list (init_literal_head, last_sec);
7727 xtensa_reorder_seg_list (fini_literal_head, last_sec);
7729 /* Now perform the final error check. */
7730 for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
7732 assert (new_count == old_count);
7739 segT last_sec = stdoutput->sections;
7740 while (last_sec->next != NULL)
7741 last_sec = last_sec->next;
7747 /* Change the emit state (seg, subseg, and frag related stuff) to the
7748 correct location. Return a emit_state which can be passed to
7749 xtensa_restore_emit_state to return to current fragment. */
7752 xtensa_switch_to_literal_fragment (result)
7755 /* When we mark a literal pool location, we want to put a frag in
7756 the literal pool that points to it. But to do that, we want to
7757 switch_to_literal_fragment. But literal sections don't have
7758 literal pools, so their location is always null, so we would
7759 recurse forever. This is kind of hacky, but it works. */
7761 static bfd_boolean recursive = FALSE;
7762 fragS *pool_location = get_literal_pool_location (now_seg);
7763 bfd_boolean is_init =
7764 (now_seg && !strcmp (segment_name (now_seg), INIT_SECTION_NAME));
7766 bfd_boolean is_fini =
7767 (now_seg && !strcmp (segment_name (now_seg), FINI_SECTION_NAME));
7770 if (pool_location == NULL
7771 && !use_literal_section
7773 && !is_init && ! is_fini)
7775 as_warn (_("inlining literal pool; "
7776 "specify location with .literal_position."));
7778 xtensa_mark_literal_pool_location (FALSE);
7782 /* Special case: If we are in the ".fini" or ".init" section, then
7783 we will ALWAYS be generating to the ".fini.literal" and
7784 ".init.literal" sections. */
7788 cache_literal_section (init_literal_head,
7789 default_lit_sections.init_lit_seg_name,
7790 &default_lit_sections.init_lit_seg);
7791 xtensa_switch_section_emit_state (result,
7792 default_lit_sections.init_lit_seg, 0);
7796 cache_literal_section (fini_literal_head,
7797 default_lit_sections.fini_lit_seg_name,
7798 &default_lit_sections.fini_lit_seg);
7799 xtensa_switch_section_emit_state (result,
7800 default_lit_sections.fini_lit_seg, 0);
7804 cache_literal_section (literal_head,
7805 default_lit_sections.lit_seg_name,
7806 &default_lit_sections.lit_seg);
7807 xtensa_switch_section_emit_state (result,
7808 default_lit_sections.lit_seg, 0);
7811 if (!use_literal_section &&
7812 !is_init && !is_fini &&
7813 get_literal_pool_location (now_seg) != pool_location)
7815 /* Close whatever frag is there. */
7816 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7817 frag_now->tc_frag_data.literal_frag = pool_location;
7818 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7821 /* Do a 4 byte align here. */
7822 frag_align (2, 0, 0);
7826 /* Call this function before emitting data into the literal section.
7827 This is a helper function for xtensa_switch_to_literal_fragment.
7828 This is similar to a .section new_now_seg subseg. */
7831 xtensa_switch_section_emit_state (state, new_now_seg, new_now_subseg)
7834 subsegT new_now_subseg;
7836 state->name = now_seg->name;
7837 state->now_seg = now_seg;
7838 state->now_subseg = now_subseg;
7839 state->generating_literals = generating_literals;
7840 generating_literals++;
7841 subseg_new (segment_name (new_now_seg), new_now_subseg);
7845 /* Use to restore the emitting into the normal place. */
7848 xtensa_restore_emit_state (state)
7851 generating_literals = state->generating_literals;
7852 subseg_new (state->name, state->now_subseg);
7856 /* Get a segment of a given name. If the segment is already
7857 present, return it; otherwise, create a new one. */
7860 cache_literal_section (head, name, seg)
7865 segT current_section = now_seg;
7866 int current_subsec = now_subseg;
7870 *seg = retrieve_literal_seg (head, name);
7871 subseg_set (current_section, current_subsec);
7875 /* Get a segment of a given name. If the segment is already
7876 present, return it; otherwise, create a new one. */
7879 retrieve_literal_seg (head, name)
7887 ret = seg_present (name);
7890 ret = subseg_new (name, (subsegT) 0);
7891 add_seg_list (head, ret);
7892 bfd_set_section_flags (stdoutput, ret, SEC_HAS_CONTENTS |
7893 SEC_READONLY | SEC_ALLOC | SEC_LOAD | SEC_CODE);
7894 bfd_set_section_alignment (stdoutput, ret, 2);
7901 /* Return a segment of a given name if it is present. */
7908 seg = stdoutput->sections;
7912 if (!strcmp (segment_name (seg), name))
7921 /* Add a segment to a segment list. */
7924 add_seg_list (head, seg)
7929 n = (seg_list *) xmalloc (sizeof (seg_list));
7933 n->next = head->next;
7938 /* Set up Property Tables after Relaxation. */
7940 #define XTENSA_INSN_SEC_NAME ".xt.insn"
7941 #define XTENSA_LIT_SEC_NAME ".xt.lit"
7944 xtensa_post_relax_hook ()
7946 xtensa_move_seg_list_to_beginning (literal_head);
7947 xtensa_move_seg_list_to_beginning (init_literal_head);
7948 xtensa_move_seg_list_to_beginning (fini_literal_head);
7950 xtensa_create_property_segments (get_frag_is_insn,
7951 XTENSA_INSN_SEC_NAME,
7953 if (use_literal_section)
7954 xtensa_create_property_segments (get_frag_is_literal,
7955 XTENSA_LIT_SEC_NAME,
7961 get_frag_is_literal (fragP)
7964 assert (fragP != NULL);
7965 return (fragP->tc_frag_data.is_literal);
7970 get_frag_is_insn (fragP)
7973 assert (fragP != NULL);
7974 return (fragP->tc_frag_data.is_insn);
7979 xtensa_create_property_segments (property_function, section_name_base,
7981 frag_predicate property_function;
7982 const char * section_name_base;
7983 xt_section_type sec_type;
7987 /* Walk over all of the current segments.
7988 Walk over each fragment
7989 For each fragment that has instructions
7990 Build an instruction record (append where possible). */
7992 for (seclist = &stdoutput->sections;
7993 seclist && *seclist;
7994 seclist = &(*seclist)->next)
7996 segT sec = *seclist;
7997 if (section_has_property (sec, property_function))
7999 char * property_section_name =
8000 xtensa_get_property_section_name (stdoutput, sec,
8002 segT insn_sec = retrieve_xtensa_section (property_section_name);
8003 segment_info_type *xt_seg_info = retrieve_segment_info (insn_sec);
8004 xtensa_block_info ** xt_blocks =
8005 &xt_seg_info->tc_segment_info_data.blocks[sec_type];
8006 /* Walk over all of the frchains here and add new sections. */
8007 add_xt_block_frags (sec, insn_sec, xt_blocks, property_function);
8011 /* Now we fill them out.... */
8013 for (seclist = &stdoutput->sections;
8014 seclist && *seclist;
8015 seclist = &(*seclist)->next)
8017 segment_info_type *seginfo;
8018 xtensa_block_info *block;
8019 segT sec = *seclist;
8020 seginfo = seg_info (sec);
8021 block = seginfo->tc_segment_info_data.blocks[sec_type];
8025 xtensa_block_info *cur_block;
8026 /* This is a section with some data. */
8027 size_t num_recs = 0;
8030 for (cur_block = block; cur_block; cur_block = cur_block->next)
8033 rec_size = num_recs * 8;
8034 bfd_set_section_size (stdoutput, sec, rec_size);
8036 /* In order to make this work with the assembler, we have to
8037 build some frags and then build the "fixups" for it. It
8038 would be easier to just set the contents then set the
8043 /* Allocate a fragment and leak it. */
8051 frag_size = sizeof (fragS) + rec_size;
8052 fragP = (fragS *) xmalloc (frag_size);
8054 memset (fragP, 0, frag_size);
8055 fragP->fr_address = 0;
8056 fragP->fr_next = NULL;
8057 fragP->fr_fix = rec_size;
8059 fragP->fr_type = rs_fill;
8060 /* the rest are zeros */
8062 frchainP = seginfo->frchainP;
8063 frchainP->frch_root = fragP;
8064 frchainP->frch_last = fragP;
8066 fixes = (fixS *) xmalloc (sizeof (fixS) * num_recs);
8067 memset (fixes, 0, sizeof (fixS) * num_recs);
8069 seginfo->fix_root = fixes;
8070 seginfo->fix_tail = &fixes[num_recs - 1];
8072 frag_data = &fragP->fr_literal[0];
8073 for (i = 0; i < num_recs; i++)
8075 fixS *fix = &fixes[i];
8078 /* Write the fixup. */
8079 if (i != num_recs - 1)
8080 fix->fx_next = &fixes[i + 1];
8082 fix->fx_next = NULL;
8085 fix->fx_frag = fragP;
8086 fix->fx_where = i * 8;
8087 fix->fx_addsy = section_symbol (cur_block->sec);
8088 fix->fx_offset = cur_block->offset;
8089 fix->fx_r_type = BFD_RELOC_32;
8090 fix->fx_file = "Internal Assembly";
8093 /* Write the length. */
8094 md_number_to_chars (&frag_data[4 + 8 * i],
8095 cur_block->size, 4);
8096 cur_block = cur_block->next;
8105 retrieve_segment_info (seg)
8108 segment_info_type *seginfo;
8109 seginfo = (segment_info_type *) bfd_get_section_userdata (stdoutput, seg);
8114 seginfo = (segment_info_type *) xmalloc (sizeof (*seginfo));
8115 memset ((PTR) seginfo, 0, sizeof (*seginfo));
8116 seginfo->fix_root = NULL;
8117 seginfo->fix_tail = NULL;
8118 seginfo->bfd_section = seg;
8120 /* We will not be dealing with these, only our special ones. */
8122 if (seg == bfd_abs_section_ptr)
8123 abs_seg_info = seginfo;
8124 else if (seg == bfd_und_section_ptr)
8125 und_seg_info = seginfo;
8128 bfd_set_section_userdata (stdoutput, seg, (PTR) seginfo);
8130 seg_fix_rootP = &segment_info[seg].fix_root;
8131 seg_fix_tailP = &segment_info[seg].fix_tail;
8134 frchainP = (frchainS *) xmalloc (sizeof (frchainS));
8135 frchainP->frch_root = NULL;
8136 frchainP->frch_last = NULL;
8137 frchainP->frch_next = NULL;
8138 frchainP->frch_seg = seg;
8139 frchainP->frch_subseg = 0;
8140 frchainP->fix_root = NULL;
8141 frchainP->fix_tail = NULL;
8142 /* Do not init the objstack. */
8143 /* obstack_begin (&frchainP->frch_obstack, chunksize); */
8144 /* frchainP->frch_frag_now = fragP; */
8145 frchainP->frch_frag_now = NULL;
8147 seginfo->frchainP = frchainP;
8155 retrieve_xtensa_section (sec_name)
8158 bfd *abfd = stdoutput;
8159 flagword flags, out_flags, link_once_flags;
8162 flags = bfd_get_section_flags (abfd, now_seg);
8163 link_once_flags = (flags & SEC_LINK_ONCE);
8164 if (link_once_flags)
8165 link_once_flags |= (flags & SEC_LINK_DUPLICATES);
8166 out_flags = (SEC_RELOC | SEC_HAS_CONTENTS | SEC_READONLY | link_once_flags);
8168 s = bfd_make_section_old_way (abfd, sec_name);
8170 as_bad (_("could not create section %s"), sec_name);
8171 if (!bfd_set_section_flags (abfd, s, out_flags))
8172 as_bad (_("invalid flag combination on section %s"), sec_name);
8179 section_has_property (sec, property_function)
8181 frag_predicate property_function;
8183 segment_info_type *seginfo = seg_info (sec);
8186 if (seginfo && seginfo->frchainP)
8188 for (fragP = seginfo->frchainP->frch_root; fragP; fragP = fragP->fr_next)
8190 if (property_function (fragP)
8191 && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
8199 /* Two types of block sections exist right now: literal and insns. */
8202 add_xt_block_frags (sec, xt_block_sec, xt_block, property_function)
8205 xtensa_block_info **xt_block;
8206 frag_predicate property_function;
8208 segment_info_type *seg_info;
8209 segment_info_type *xt_seg_info;
8213 xt_seg_info = retrieve_segment_info (xt_block_sec);
8214 seg_info = retrieve_segment_info (sec);
8216 /* Build it if needed. */
8217 while (*xt_block != NULL)
8218 xt_block = &(*xt_block)->next;
8219 /* We are either at NULL at the beginning or at the end. */
8221 /* Walk through the frags. */
8224 if (seg_info->frchainP)
8226 for (fragP = seg_info->frchainP->frch_root;
8228 fragP = fragP->fr_next)
8230 if (property_function (fragP)
8231 && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
8233 if (*xt_block != NULL)
8235 if ((*xt_block)->offset + (*xt_block)->size
8236 == fragP->fr_address)
8237 (*xt_block)->size += fragP->fr_fix;
8239 xt_block = &((*xt_block)->next);
8241 if (*xt_block == NULL)
8243 xtensa_block_info *new_block = (xtensa_block_info *)
8244 xmalloc (sizeof (xtensa_block_info));
8245 new_block->sec = sec;
8246 new_block->offset = fragP->fr_address;
8247 new_block->size = fragP->fr_fix;
8248 new_block->next = NULL;
8249 *xt_block = new_block;
8257 /* Instruction Stack Functions (from "xtensa-istack.h"). */
8263 memset (stack, 0, sizeof (IStack));
8269 istack_empty (stack)
8272 return (stack->ninsn == 0);
8280 return (stack->ninsn == MAX_ISTACK);
8284 /* Return a pointer to the top IStack entry.
8285 It is an error to call this if istack_empty () is true. */
8291 int rec = stack->ninsn - 1;
8292 assert (!istack_empty (stack));
8293 return &stack->insn[rec];
8297 /* Add a new TInsn to an IStack.
8298 It is an error to call this if istack_full () is true. */
8301 istack_push (stack, insn)
8305 int rec = stack->ninsn;
8306 assert (!istack_full (stack));
8307 tinsn_copy (&stack->insn[rec], insn);
8312 /* Clear space for the next TInsn on the IStack and return a pointer
8313 to it. It is an error to call this if istack_full () is true. */
8316 istack_push_space (stack)
8319 int rec = stack->ninsn;
8321 assert (!istack_full (stack));
8322 insn = &stack->insn[rec];
8323 memset (insn, 0, sizeof (TInsn));
8329 /* Remove the last pushed instruction. It is an error to call this if
8330 istack_empty () returns true. */
8336 int rec = stack->ninsn - 1;
8337 assert (!istack_empty (stack));
8339 memset (&stack->insn[rec], 0, sizeof (TInsn));
8343 /* TInsn functions. */
8349 memset (dst, 0, sizeof (TInsn));
8354 tinsn_copy (dst, src)
8359 memcpy (dst, src, sizeof (TInsn));
8363 /* Get the ``num''th token of the TInsn.
8364 It is illegal to call this if num > insn->ntoks. */
8367 tinsn_get_tok (insn, num)
8371 assert (num < insn->ntok);
8372 return &insn->tok[num];
8376 /* Return true if ANY of the operands in the insn are symbolic. */
8379 tinsn_has_symbolic_operands (insn)
8385 assert (insn->insn_type == ITYPE_INSN);
8387 for (i = 0; i < n; ++i)
8389 switch (insn->tok[i].X_op)
8403 tinsn_has_invalid_symbolic_operands (insn)
8409 assert (insn->insn_type == ITYPE_INSN);
8411 for (i = 0; i < n; ++i)
8413 switch (insn->tok[i].X_op)
8419 if (i == get_relaxable_immed (insn->opcode))
8421 as_bad (_("invalid symbolic operand %d on '%s'"),
8422 i, xtensa_opcode_name (xtensa_default_isa, insn->opcode));
8430 /* For assembly code with complex expressions (e.g. subtraction),
8431 we have to build them in the literal pool so that
8432 their results are calculated correctly after relaxation.
8433 The relaxation only handles expressions that
8434 boil down to SYMBOL + OFFSET. */
8437 tinsn_has_complex_operands (insn)
8442 assert (insn->insn_type == ITYPE_INSN);
8443 for (i = 0; i < n; ++i)
8445 switch (insn->tok[i].X_op)
8459 /* Convert the constant operands in the t_insn to insnbuf.
8460 Return true if there is a symbol in the immediate field.
8462 Before this is called,
8463 1) the number of operands are correct
8464 2) the t_insn is a ITYPE_INSN
8465 3) ONLY the relaxable_ is built
8466 4) All operands are O_constant, O_symbol. All constants fit
8467 The return value tells whether there are any remaining O_symbols. */
8470 tinsn_to_insnbuf (t_insn, insnbuf)
8472 xtensa_insnbuf insnbuf;
8474 xtensa_isa isa = xtensa_default_isa;
8475 xtensa_opcode opcode = t_insn->opcode;
8476 bfd_boolean has_fixup = FALSE;
8477 int noperands = xtensa_num_operands (isa, opcode);
8483 assert (t_insn->insn_type == ITYPE_INSN);
8484 if (noperands != t_insn->ntok)
8485 as_fatal (_("operand number mismatch"));
8487 xtensa_encode_insn (isa, opcode, insnbuf);
8489 for (i = 0; i < noperands; ++i)
8491 expressionS *expr = &t_insn->tok[i];
8492 xtensa_operand operand = xtensa_get_operand (isa, opcode, i);
8496 /* The register number has already been checked in
8497 expression_maybe_register, so we don't need to check here. */
8498 opnd_value = expr->X_add_number;
8499 (void) xtensa_operand_encode (operand, &opnd_value);
8500 xtensa_operand_set_field (operand, insnbuf, opnd_value);
8504 as_where (&file_name, &line);
8505 /* It is a constant and we called this function,
8506 then we have to try to fit it. */
8507 xtensa_insnbuf_set_operand (insnbuf, opcode, operand,
8508 expr->X_add_number, file_name, line);
8521 /* Check the instruction arguments. Return true on failure. */
8524 tinsn_check_arguments (insn)
8527 xtensa_isa isa = xtensa_default_isa;
8528 xtensa_opcode opcode = insn->opcode;
8530 if (opcode == XTENSA_UNDEFINED)
8532 as_bad (_("invalid opcode"));
8536 if (xtensa_num_operands (isa, opcode) > insn->ntok)
8538 as_bad (_("too few operands"));
8542 if (xtensa_num_operands (isa, opcode) < insn->ntok)
8544 as_bad (_("too many operands"));
8551 /* Load an instruction from its encoded form. */
8554 tinsn_from_chars (t_insn, f)
8558 static xtensa_insnbuf insnbuf = NULL;
8560 xtensa_opcode opcode;
8561 xtensa_isa isa = xtensa_default_isa;
8564 insnbuf = xtensa_insnbuf_alloc (isa);
8566 xtensa_insnbuf_from_chars (isa, insnbuf, f);
8567 opcode = xtensa_decode_insn (isa, insnbuf);
8569 /* Find the immed. */
8570 tinsn_init (t_insn);
8571 t_insn->insn_type = ITYPE_INSN;
8572 t_insn->is_specific_opcode = FALSE; /* Must not be specific. */
8573 t_insn->opcode = opcode;
8574 t_insn->ntok = xtensa_num_operands (isa, opcode);
8575 for (i = 0; i < t_insn->ntok; i++)
8577 set_expr_const (&t_insn->tok[i],
8578 xtensa_insnbuf_get_operand (insnbuf, opcode, i));
8583 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
8586 tinsn_immed_from_frag (t_insn, fragP)
8590 xtensa_opcode opcode = t_insn->opcode;
8593 if (fragP->fr_symbol)
8595 opnum = get_relaxable_immed (opcode);
8596 set_expr_symbol_offset (&t_insn->tok[opnum],
8597 fragP->fr_symbol, fragP->fr_offset);
8603 get_num_stack_text_bytes (istack)
8609 for (i = 0; i < istack->ninsn; i++)
8611 TInsn *t_insn = &istack->insn[i];
8612 if (t_insn->insn_type == ITYPE_INSN)
8613 text_bytes += xg_get_insn_size (t_insn);
8620 get_num_stack_literal_bytes (istack)
8626 for (i = 0; i < istack->ninsn; i++)
8628 TInsn *t_insn = &istack->insn[i];
8630 if (t_insn->insn_type == ITYPE_LITERAL && t_insn->ntok == 1)
8637 /* Expression utilities. */
8639 /* Return true if the expression is an integer constant. */
8643 const expressionS *s;
8645 return (s->X_op == O_constant);
8649 /* Get the expression constant.
8650 Calling this is illegal if expr_is_const () returns true. */
8654 const expressionS *s;
8656 assert (expr_is_const (s));
8657 return s->X_add_number;
8661 /* Set the expression to a constant value. */
8664 set_expr_const (s, val)
8668 s->X_op = O_constant;
8669 s->X_add_number = val;
8670 s->X_add_symbol = NULL;
8671 s->X_op_symbol = NULL;
8675 /* Set the expression to a symbol + constant offset. */
8678 set_expr_symbol_offset (s, sym, offset)
8684 s->X_add_symbol = sym;
8685 s->X_op_symbol = NULL; /* unused */
8686 s->X_add_number = offset;
8691 expr_is_equal (s1, s2)
8695 if (s1->X_op != s2->X_op)
8697 if (s1->X_add_symbol != s2->X_add_symbol)
8699 if (s1->X_op_symbol != s2->X_op_symbol)
8701 if (s1->X_add_number != s2->X_add_number)
8708 copy_expr (dst, src)
8710 const expressionS *src;
8712 memcpy (dst, src, sizeof (expressionS));
8716 /* Support for Tensilica's "--rename-section" option. */
8718 #ifdef XTENSA_SECTION_RENAME
8720 struct rename_section_struct
8724 struct rename_section_struct *next;
8727 static struct rename_section_struct *section_rename;
8730 /* Parse the string oldname=new_name:oldname2=new_name2
8731 and call add_section_rename. */
8734 build_section_rename (arg)
8737 char *this_arg = NULL;
8738 char *next_arg = NULL;
8740 for (this_arg = strdup (arg); this_arg != NULL; this_arg = next_arg)
8744 next_arg = strchr (this_arg, ':');
8752 char *old_name = this_arg;
8753 char *new_name = strchr (this_arg, '=');
8755 if (*old_name == '\0')
8757 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
8760 if (!new_name || new_name[1] == '\0')
8762 as_warn (_("ignoring invalid '-rename-section' "
8763 "specification: '%s'"), old_name);
8768 add_section_rename (old_name, new_name);
8775 add_section_rename (old_name, new_name)
8779 struct rename_section_struct *r = section_rename;
8781 /* Check for invalid section renaming. */
8782 for (r = section_rename; r != NULL; r = r->next)
8784 if (strcmp (r->old_name, old_name) == 0)
8785 as_bad (_("section %s renamed multiple times"), old_name);
8786 if (strcmp (r->new_name, new_name) == 0)
8787 as_bad (_("multiple sections remapped to output section %s"),
8792 r = (struct rename_section_struct *)
8793 xmalloc (sizeof (struct rename_section_struct));
8794 r->old_name = strdup (old_name);
8795 r->new_name = strdup (new_name);
8796 r->next = section_rename;
8802 xtensa_section_rename (name)
8805 struct rename_section_struct *r = section_rename;
8807 for (r = section_rename; r != NULL; r = r->next)
8808 if (strcmp (r->old_name, name) == 0)
8814 #endif /* XTENSA_SECTION_RENAME */