1 /* tc-c4x.c -- Assemble for the Texas Instruments TMS320C[34]x.
2 Copyright (C) 1997,1998, 2002 Free Software Foundation.
4 Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
26 o .align cannot handle fill-data-width larger than 0xFF/8-bits. It
27 should be possible to define a 32-bits pattern.
29 o .align fills all section with NOP's when used regardless if has
30 been used in .text or .data. (However the .align is primarely
31 intended used in .text sections. If you require something else,
32 use .align <size>,0x00)
34 o .align: Implement a 'bu' insn if the number of nop's exeeds 4
35 within the align frag. if(fragsize>4words) insert bu fragend+1
38 o .usect if has symbol on previous line not implemented
40 o .sym, .eos, .stag, .etag, .member not implemented
42 o Evaluation of constant floating point expressions (expr.c needs
45 o Support 'abc' constants (that is 0x616263)
52 #include "opcode/tic4x.h"
58 /* OK, we accept a syntax similar to the other well known C30
59 assembly tools. With C4X_ALT_SYNTAX defined we are more
60 flexible, allowing a more Unix-like syntax: `%' in front of
61 register names, `#' in front of immediate constants, and
62 not requiring `@' in front of direct addresses. */
64 #define C4X_ALT_SYNTAX
66 /* Equal to MAX_PRECISION in atof-ieee.c. */
67 #define MAX_LITTLENUMS 6 /* (12 bytes) */
69 /* Handle of the inst mnemonic hash table. */
70 static struct hash_control *c4x_op_hash = NULL;
72 /* Handle asg pseudo. */
73 static struct hash_control *c4x_asg_hash = NULL;
75 static unsigned int c4x_cpu = 0; /* Default to TMS320C40. */
76 static unsigned int c4x_revision = 0; /* CPU revision */
77 static unsigned int c4x_idle2 = 0; /* Idle2 support */
78 static unsigned int c4x_lowpower = 0; /* Lowpower support */
79 static unsigned int c4x_enhanced = 0; /* Enhanced opcode support */
80 static unsigned int c4x_big_model = 0; /* Default to small memory model. */
81 static unsigned int c4x_reg_args = 0; /* Default to args passed on stack. */
82 static unsigned long c4x_oplevel = 0; /* Opcode level */
84 #define OPTION_CPU 'm'
85 #define OPTION_BIG (OPTION_MD_BASE + 1)
86 #define OPTION_SMALL (OPTION_MD_BASE + 2)
87 #define OPTION_MEMPARM (OPTION_MD_BASE + 3)
88 #define OPTION_REGPARM (OPTION_MD_BASE + 4)
89 #define OPTION_IDLE2 (OPTION_MD_BASE + 5)
90 #define OPTION_LOWPOWER (OPTION_MD_BASE + 6)
91 #define OPTION_ENHANCED (OPTION_MD_BASE + 7)
92 #define OPTION_REV (OPTION_MD_BASE + 8)
94 CONST char *md_shortopts = "bm:prs";
95 struct option md_longopts[] =
97 { "mcpu", required_argument, NULL, OPTION_CPU },
98 { "mdsp", required_argument, NULL, OPTION_CPU },
99 { "mbig", no_argument, NULL, OPTION_BIG },
100 { "msmall", no_argument, NULL, OPTION_SMALL },
101 { "mmemparm", no_argument, NULL, OPTION_MEMPARM },
102 { "mregparm", no_argument, NULL, OPTION_REGPARM },
103 { "midle2", no_argument, NULL, OPTION_IDLE2 },
104 { "mlowpower", no_argument, NULL, OPTION_LOWPOWER },
105 { "menhanced", no_argument, NULL, OPTION_ENHANCED },
106 { "mrev", required_argument, NULL, OPTION_REV },
107 { NULL, no_argument, NULL, 0 }
110 size_t md_longopts_size = sizeof (md_longopts);
115 M_UNKNOWN, M_IMMED, M_DIRECT, M_REGISTER, M_INDIRECT,
116 M_IMMED_F, M_PARALLEL, M_HI
120 typedef struct c4x_operand
122 c4x_addr_mode_t mode; /* Addressing mode. */
123 expressionS expr; /* Expression. */
124 int disp; /* Displacement for indirect addressing. */
125 int aregno; /* Aux. register number. */
126 LITTLENUM_TYPE fwords[MAX_LITTLENUMS]; /* Float immed. number. */
130 typedef struct c4x_insn
132 char name[C4X_NAME_MAX]; /* Mnemonic of instruction. */
133 unsigned int in_use; /* True if in_use. */
134 unsigned int parallel; /* True if parallel instruction. */
135 unsigned int nchars; /* This is always 4 for the C30. */
136 unsigned long opcode; /* Opcode number. */
137 expressionS exp; /* Expression required for relocation. */
138 int reloc; /* Relocation type required. */
139 int pcrel; /* True if relocation PC relative. */
140 char *pname; /* Name of instruction in parallel. */
141 unsigned int num_operands; /* Number of operands in total. */
142 c4x_inst_t *inst; /* Pointer to first template. */
143 c4x_operand_t operands[C4X_OPERANDS_MAX];
147 static c4x_insn_t the_insn; /* Info about our instruction. */
148 static c4x_insn_t *insn = &the_insn;
150 static int c4x_gen_to_words
151 PARAMS ((FLONUM_TYPE, LITTLENUM_TYPE *, int ));
152 static char *c4x_atof
153 PARAMS ((char *, char, LITTLENUM_TYPE * ));
154 static void c4x_insert_reg
155 PARAMS ((char *, int ));
156 static void c4x_insert_sym
157 PARAMS ((char *, int ));
158 static char *c4x_expression
159 PARAMS ((char *, expressionS *));
160 static char *c4x_expression_abs
161 PARAMS ((char *, int *));
162 static void c4x_emit_char
163 PARAMS ((char, int));
164 static void c4x_seg_alloc
165 PARAMS ((char *, segT, int, symbolS *));
170 static void c4x_globl
174 static void c4x_stringer
178 static void c4x_newblock
184 static void c4x_usect
186 static void c4x_version
188 static void c4x_init_regtable
190 static void c4x_init_symbols
192 static int c4x_inst_insert
193 PARAMS ((c4x_inst_t *));
194 static c4x_inst_t *c4x_inst_make
195 PARAMS ((char *, unsigned long, char *));
196 static int c4x_inst_add
197 PARAMS ((c4x_inst_t *));
202 static int c4x_indirect_parse
203 PARAMS ((c4x_operand_t *, const c4x_indirect_t *));
204 static char *c4x_operand_parse
205 PARAMS ((char *, c4x_operand_t *));
206 static int c4x_operands_match
207 PARAMS ((c4x_inst_t *, c4x_insn_t *, int));
208 static void c4x_insn_check
209 PARAMS ((c4x_insn_t *));
210 static void c4x_insn_output
211 PARAMS ((c4x_insn_t *));
212 static int c4x_operands_parse
213 PARAMS ((char *, c4x_operand_t *, int ));
219 PARAMS ((int, char *, int *));
221 PARAMS ((fixS *, valueT *, segT ));
223 PARAMS ((bfd *, segT, fragS *));
224 void md_create_short_jump
225 PARAMS ((char *, addressT, addressT, fragS *, symbolS *));
226 void md_create_long_jump
227 PARAMS ((char *, addressT, addressT, fragS *, symbolS *));
228 int md_estimate_size_before_relax
229 PARAMS ((register fragS *, segT));
231 PARAMS ((int, char *));
234 int c4x_unrecognized_line
236 symbolS *md_undefined_symbol
239 PARAMS ((expressionS *));
240 valueT md_section_align
241 PARAMS ((segT, valueT));
242 static int c4x_pc_offset
243 PARAMS ((unsigned int));
247 PARAMS ((int, const char *, int, int));
250 arelent *tc_gen_reloc
251 PARAMS ((asection *, fixS *));
257 {"align", s_align_bytes, 32},
258 {"ascii", c4x_stringer, 1},
259 {"asciz", c4x_stringer, 0},
261 {"block", s_space, 4},
262 {"byte", c4x_cons, 1},
264 {"copy", s_include, 0},
265 {"def", c4x_globl, 0},
267 {"eval", c4x_eval, 0},
268 {"global", c4x_globl, 0},
269 {"globl", c4x_globl, 0},
270 {"hword", c4x_cons, 2},
271 {"ieee", float_cons, 'i'},
272 {"int", c4x_cons, 4}, /* .int allocates 4 bytes. */
273 {"ldouble", float_cons, 'e'},
274 {"newblock", c4x_newblock, 0},
275 {"ref", s_ignore, 0}, /* All undefined treated as external. */
277 {"sect", c4x_sect, 1}, /* Define named section. */
278 {"space", s_space, 4},
279 {"string", c4x_stringer, 0},
280 {"usect", c4x_usect, 0}, /* Reserve space in uninit. named sect. */
281 {"version", c4x_version, 0},
282 {"word", c4x_cons, 4}, /* .word allocates 4 bytes. */
283 {"xdef", c4x_globl, 0},
287 int md_short_jump_size = 4;
288 int md_long_jump_size = 4;
289 const int md_reloc_size = RELSZ; /* Coff headers. */
291 /* This array holds the chars that always start a comment. If the
292 pre-processor is disabled, these aren't very useful. */
293 #ifdef C4X_ALT_SYNTAX
294 const char comment_chars[] = ";!";
296 const char comment_chars[] = ";";
299 /* This array holds the chars that only start a comment at the beginning of
300 a line. If the line seems to have the form '# 123 filename'
301 .line and .file directives will appear in the pre-processed output.
302 Note that input_file.c hand checks for '#' at the beginning of the
303 first line of the input file. This is because the compiler outputs
304 #NO_APP at the beginning of its output.
305 Also note that comments like this one will always work. */
306 const char line_comment_chars[] = "#*";
308 /* We needed an unused char for line separation to work around the
309 lack of macros, using sed and such. */
310 const char line_separator_chars[] = "&";
312 /* Chars that can be used to separate mant from exp in floating point nums. */
313 const char EXP_CHARS[] = "eE";
315 /* Chars that mean this number is a floating point constant. */
318 const char FLT_CHARS[] = "fFilsS";
320 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
321 changed in read.c. Ideally it shouldn't have to know about it at
322 all, but nothing is ideal around here. */
324 /* Flonums returned here. */
325 extern FLONUM_TYPE generic_floating_point_number;
327 /* Precision in LittleNums. */
328 #define MAX_PRECISION (4) /* Its a bit overkill for us, but the code
330 #define S_PRECISION (1) /* Short float constants 16-bit. */
331 #define F_PRECISION (2) /* Float and double types 32-bit. */
332 #define E_PRECISION (4) /* Extended precision, 64-bit (real 40-bit). */
335 /* Turn generic_floating_point_number into a real short/float/double. */
337 c4x_gen_to_words (flonum, words, precision)
339 LITTLENUM_TYPE *words;
342 int return_value = 0;
343 LITTLENUM_TYPE *p; /* Littlenum pointer. */
344 int mantissa_bits; /* Bits in mantissa field. */
345 int exponent_bits; /* Bits in exponent field. */
347 unsigned int sone; /* Scaled one. */
348 unsigned int sfract; /* Scaled fraction. */
349 unsigned int smant; /* Scaled mantissa. */
351 unsigned int mover; /* Mantissa overflow bits */
352 unsigned int rbit; /* Round bit. */
353 int shift; /* Shift count. */
355 /* NOTE: Svein Seldal <Svein.Seldal@solidas.com>
356 The code in this function is altered slightly to support floats
357 with 31-bits mantissas, thus the documentation below may be a
358 little bit inaccurate.
360 By Michael P. Hayes <m.hayes@elec.canterbury.ac.nz>
361 Here is how a generic floating point number is stored using
362 flonums (an extension of bignums) where p is a pointer to an
365 For example 2e-3 is stored with exp = -4 and
372 with low = &bits[2], high = &bits[5], and leader = &bits[5].
374 This number can be written as
375 0x0083126e978d4fde.00000000 * 65536**-4 or
376 0x0.0083126e978d4fde * 65536**0 or
377 0x0.83126e978d4fde * 2**-8 = 2e-3
379 Note that low points to the 65536**0 littlenum (bits[2]) and
380 leader points to the most significant non-zero littlenum
383 TMS320C3X floating point numbers are a bit of a strange beast.
384 The 32-bit flavour has the 8 MSBs representing the exponent in
385 twos complement format (-128 to +127). There is then a sign bit
386 followed by 23 bits of mantissa. The mantissa is expressed in
387 twos complement format with the binary point after the most
388 significant non sign bit. The bit after the binary point is
389 suppressed since it is the complement of the sign bit. The
390 effective mantissa is thus 24 bits. Zero is represented by an
393 The 16-bit flavour has the 4 MSBs representing the exponent in
394 twos complement format (-8 to +7). There is then a sign bit
395 followed by 11 bits of mantissa. The mantissa is expressed in
396 twos complement format with the binary point after the most
397 significant non sign bit. The bit after the binary point is
398 suppressed since it is the complement of the sign bit. The
399 effective mantissa is thus 12 bits. Zero is represented by an
400 exponent of -8. For example,
402 number norm mant m x e s i fraction f
403 +0.500 => 1.00000000000 -1 -1 0 1 .00000000000 (1 + 0) * 2^(-1)
404 +0.999 => 1.11111111111 -1 -1 0 1 .11111111111 (1 + 0.99) * 2^(-1)
405 +1.000 => 1.00000000000 0 0 0 1 .00000000000 (1 + 0) * 2^(0)
406 +1.500 => 1.10000000000 0 0 0 1 .10000000000 (1 + 0.5) * 2^(0)
407 +1.999 => 1.11111111111 0 0 0 1 .11111111111 (1 + 0.9) * 2^(0)
408 +2.000 => 1.00000000000 1 1 0 1 .00000000000 (1 + 0) * 2^(1)
409 +4.000 => 1.00000000000 2 2 0 1 .00000000000 (1 + 0) * 2^(2)
410 -0.500 => 1.00000000000 -1 -1 1 0 .10000000000 (-2 + 0) * 2^(-2)
411 -1.000 => 1.00000000000 0 -1 1 0 .00000000000 (-2 + 0) * 2^(-1)
412 -1.500 => 1.10000000000 0 0 1 0 .10000000000 (-2 + 0.5) * 2^(0)
413 -1.999 => 1.11111111111 0 0 1 0 .00000000001 (-2 + 0.11) * 2^(0)
414 -2.000 => 1.00000000000 1 1 1 0 .00000000000 (-2 + 0) * 2^(0)
415 -4.000 => 1.00000000000 2 1 1 0 .00000000000 (-2 + 0) * 2^(1)
417 where e is the exponent, s is the sign bit, i is the implied bit,
418 and f is the fraction stored in the mantissa field.
420 num = (1 + f) * 2^x = m * 2^e if s = 0
421 num = (-2 + f) * 2^x = -m * 2^e if s = 1
422 where 0 <= f < 1.0 and 1.0 <= m < 2.0
424 The fraction (f) and exponent (e) fields for the TMS320C3X format
425 can be derived from the normalised mantissa (m) and exponent (x) using:
427 f = m - 1, e = x if s = 0
428 f = 2 - m, e = x if s = 1 and m != 1.0
429 f = 0, e = x - 1 if s = 1 and m = 1.0
430 f = 0, e = -8 if m = 0
433 OK, the other issue we have to consider is rounding since the
434 mantissa has a much higher potential precision than what we can
435 represent. To do this we add half the smallest storable fraction.
436 We then have to renormalise the number to allow for overflow.
438 To convert a generic flonum into a TMS320C3X floating point
439 number, here's what we try to do....
441 The first thing is to generate a normalised mantissa (m) where
442 1.0 <= m < 2 and to convert the exponent from base 16 to base 2.
443 We desire the binary point to be placed after the most significant
444 non zero bit. This process is done in two steps: firstly, the
445 littlenum with the most significant non zero bit is located (this
446 is done for us since leader points to this littlenum) and the
447 binary point (which is currently after the LSB of the littlenum
448 pointed to by low) is moved to before the MSB of the littlenum
449 pointed to by leader. This requires the exponent to be adjusted
450 by leader - low + 1. In the earlier example, the new exponent is
451 thus -4 + (5 - 2 + 1) = 0 (base 65536). We now need to convert
452 the exponent to base 2 by multiplying the exponent by 16 (log2
453 65536). The exponent base 2 is thus also zero.
455 The second step is to hunt for the most significant non zero bit
456 in the leader littlenum. We do this by left shifting a copy of
457 the leader littlenum until bit 16 is set (0x10000) and counting
458 the number of shifts, S, required. The number of shifts then has to
459 be added to correct the exponent (base 2). For our example, this
460 will require 9 shifts and thus our normalised exponent (base 2) is
461 0 + 9 = 9. Note that the worst case scenario is when the leader
462 littlenum is 1, thus requiring 16 shifts.
464 We now have to left shift the other littlenums by the same amount,
465 propagating the shifted bits into the more significant littlenums.
466 To save a lot of unecessary shifting we only have to consider
467 two or three littlenums, since the greatest number of mantissa
468 bits required is 24 + 1 rounding bit. While two littlenums
469 provide 32 bits of precision, the most significant littlenum
470 may only contain a single significant bit and thus an extra
471 littlenum is required.
473 Denoting the number of bits in the fraction field as F, we require
474 G = F + 2 bits (one extra bit is for rounding, the other gets
475 suppressed). Say we required S shifts to find the most
476 significant bit in the leader littlenum, the number of left shifts
477 required to move this bit into bit position G - 1 is L = G + S - 17.
478 Note that this shift count may be negative for the short floating
479 point flavour (where F = 11 and thus G = 13 and potentially S < 3).
480 If L > 0 we have to shunt the next littlenum into position. Bit
481 15 (the MSB) of the next littlenum needs to get moved into position
482 L - 1 (If L > 15 we need all the bits of this littlenum and
483 some more from the next one.). We subtract 16 from L and use this
484 as the left shift count; the resultant value we or with the
485 previous result. If L > 0, we repeat this operation. */
487 if (precision != S_PRECISION)
489 if (precision == E_PRECISION)
490 words[2] = words[3] = 0x0000;
492 /* 0.0e0 or NaN seen. */
493 if (flonum.low > flonum.leader /* = 0.0e0 */
494 || flonum.sign == 0) /* = NaN */
497 as_bad ("Nan, using zero.");
502 if (flonum.sign == 'P')
504 /* +INF: Replace with maximum float. */
505 if (precision == S_PRECISION)
512 if (precision == E_PRECISION)
519 else if (flonum.sign == 'N')
521 /* -INF: Replace with maximum float. */
522 if (precision == S_PRECISION)
526 if (precision == E_PRECISION)
531 exponent = (flonum.exponent + flonum.leader - flonum.low + 1) * 16;
533 if (!(tmp = *flonum.leader))
534 abort (); /* Hmmm. */
535 shift = 0; /* Find position of first sig. bit. */
538 exponent -= (16 - shift); /* Adjust exponent. */
540 if (precision == S_PRECISION) /* Allow 1 rounding bit. */
545 else if(precision == F_PRECISION)
550 else /* E_PRECISION */
556 shift = mantissa_bits - shift;
561 /* Store the mantissa data into smant and the roundbit into rbit */
562 for (p = flonum.leader; p >= flonum.low && shift > -16; p--)
564 tmp = shift >= 0 ? *p << shift : *p >> -shift;
565 rbit = shift < 0 ? ((*p >> (-shift-1)) & 0x1) : 0;
570 /* OK, we've got our scaled mantissa so let's round it up */
573 /* If the mantissa is going to overflow when added, lets store
574 the extra bit in mover. -- A special case exists when
575 mantissa_bits is 31 (E_PRECISION). Then the first test cannot
576 be trusted, as result is host-dependent, thus the second
578 if( smant == ((unsigned)(1<<(mantissa_bits+1))-1)
579 || smant == (unsigned)-1 ) /* This is to catch E_PRECISION cases */
584 /* Get the scaled one value */
585 sone = (1 << (mantissa_bits));
587 /* The number may be unnormalised so renormalise it... */
591 smant |= sone; /* Insert the bit from mover into smant */
595 /* The binary point is now between bit positions 11 and 10 or 23 and 22,
596 i.e., between mantissa_bits - 1 and mantissa_bits - 2 and the
597 bit at mantissa_bits - 1 should be set. */
599 abort (); /* Ooops. */
601 if (flonum.sign == '+')
602 sfract = smant - sone; /* smant - 1.0. */
605 /* This seems to work. */
613 sfract = -smant & (sone-1); /* 2.0 - smant. */
615 sfract |= sone; /* Insert sign bit. */
618 if (abs (exponent) >= (1 << (exponent_bits - 1)))
619 as_bad ("Cannot represent exponent in %d bits", exponent_bits);
621 /* Force exponent to fit in desired field width. */
622 exponent &= (1 << (exponent_bits)) - 1;
624 if (precision == E_PRECISION)
626 /* Map the float part first (100% equal format as F_PRECISION) */
627 words[0] = exponent << (mantissa_bits+1-24);
628 words[0] |= sfract >> 24;
629 words[1] = sfract >> 8;
631 /* Map the mantissa in the next */
632 words[2] = sfract >> 16;
633 words[3] = sfract & 0xffff;
637 /* Insert the exponent data into the word */
638 sfract |= exponent << (mantissa_bits+1);
640 if (precision == S_PRECISION)
644 words[0] = sfract >> 16;
645 words[1] = sfract & 0xffff;
652 /* Returns pointer past text consumed. */
654 c4x_atof (str, what_kind, words)
657 LITTLENUM_TYPE *words;
659 /* Extra bits for zeroed low-order bits. The 1st MAX_PRECISION are
660 zeroed, the last contain flonum bits. */
661 static LITTLENUM_TYPE bits[MAX_PRECISION + MAX_PRECISION + GUARD];
663 /* Number of 16-bit words in the format. */
665 FLONUM_TYPE save_gen_flonum;
667 /* We have to save the generic_floating_point_number because it
668 contains storage allocation about the array of LITTLENUMs where
669 the value is actually stored. We will allocate our own array of
670 littlenums below, but have to restore the global one on exit. */
671 save_gen_flonum = generic_floating_point_number;
674 generic_floating_point_number.low = bits + MAX_PRECISION;
675 generic_floating_point_number.high = NULL;
676 generic_floating_point_number.leader = NULL;
677 generic_floating_point_number.exponent = 0;
678 generic_floating_point_number.sign = '\0';
680 /* Use more LittleNums than seems necessary: the highest flonum may
681 have 15 leading 0 bits, so could be useless. */
683 memset (bits, '\0', sizeof (LITTLENUM_TYPE) * MAX_PRECISION);
689 precision = S_PRECISION;
696 precision = F_PRECISION;
701 precision = E_PRECISION;
705 as_bad ("Invalid floating point number");
709 generic_floating_point_number.high
710 = generic_floating_point_number.low + precision - 1 + GUARD;
712 if (atof_generic (&return_value, ".", EXP_CHARS,
713 &generic_floating_point_number))
715 as_bad ("Invalid floating point number");
719 c4x_gen_to_words (generic_floating_point_number,
722 /* Restore the generic_floating_point_number's storage alloc (and
724 generic_floating_point_number = save_gen_flonum;
730 c4x_insert_reg (regname, regnum)
737 symbol_table_insert (symbol_new (regname, reg_section, (valueT) regnum,
738 &zero_address_frag));
739 for (i = 0; regname[i]; i++)
740 buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
743 symbol_table_insert (symbol_new (buf, reg_section, (valueT) regnum,
744 &zero_address_frag));
748 c4x_insert_sym (symname, value)
754 symbolP = symbol_new (symname, absolute_section,
755 (valueT) value, &zero_address_frag);
756 SF_SET_LOCAL (symbolP);
757 symbol_table_insert (symbolP);
761 c4x_expression (str, exp)
768 t = input_line_pointer; /* Save line pointer. */
769 input_line_pointer = str;
771 s = input_line_pointer;
772 input_line_pointer = t; /* Restore line pointer. */
773 return s; /* Return pointer to where parsing stopped. */
777 c4x_expression_abs (str, value)
784 t = input_line_pointer; /* Save line pointer. */
785 input_line_pointer = str;
786 *value = get_absolute_expression ();
787 s = input_line_pointer;
788 input_line_pointer = t; /* Restore line pointer. */
799 exp.X_op = O_constant;
800 exp.X_add_number = c;
805 c4x_seg_alloc (name, seg, size, symbolP)
806 char *name ATTRIBUTE_UNUSED;
807 segT seg ATTRIBUTE_UNUSED;
811 /* Note that the size is in words
812 so we multiply it by 4 to get the number of bytes to allocate. */
814 /* If we have symbol: .usect ".fred", size etc.,
815 the symbol needs to point to the first location reserved
822 p = frag_var (rs_fill, 1, 1, (relax_substateT) 0,
824 size * OCTETS_PER_BYTE, (char *) 0);
829 /* .asg ["]character-string["], symbol */
832 int x ATTRIBUTE_UNUSED;
840 str = input_line_pointer;
842 /* Skip string expression. */
843 while (*input_line_pointer != ',' && *input_line_pointer)
844 input_line_pointer++;
845 if (*input_line_pointer != ',')
847 as_bad ("Comma expected\n");
850 *input_line_pointer++ = '\0';
851 name = input_line_pointer;
852 c = get_symbol_end (); /* Get terminator. */
853 tmp = xmalloc (strlen (str) + 1);
856 tmp = xmalloc (strlen (name) + 1);
859 if (hash_find (c4x_asg_hash, name))
860 hash_replace (c4x_asg_hash, name, (PTR) str);
862 hash_insert (c4x_asg_hash, name, (PTR) str);
863 *input_line_pointer = c;
864 demand_empty_rest_of_line ();
867 /* .bss symbol, size */
870 int x ATTRIBUTE_UNUSED;
877 subsegT current_subseg;
880 current_seg = now_seg; /* Save current seg. */
881 current_subseg = now_subseg; /* Save current subseg. */
884 name = input_line_pointer;
885 c = get_symbol_end (); /* Get terminator. */
888 as_bad (".bss size argument missing\n");
893 c4x_expression_abs (++input_line_pointer, &size);
896 as_bad (".bss size %d < 0!", size);
899 subseg_set (bss_section, 0);
900 symbolP = symbol_find_or_make (name);
902 if (S_GET_SEGMENT (symbolP) == bss_section)
903 symbol_get_frag (symbolP)->fr_symbol = 0;
905 symbol_set_frag (symbolP, frag_now);
907 p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
908 size * OCTETS_PER_BYTE, (char *) 0);
909 *p = 0; /* Fill char. */
911 S_SET_SEGMENT (symbolP, bss_section);
913 /* The symbol may already have been created with a preceding
914 ".globl" directive -- be careful not to step on storage class
915 in that case. Otherwise, set it to static. */
916 if (S_GET_STORAGE_CLASS (symbolP) != C_EXT)
917 S_SET_STORAGE_CLASS (symbolP, C_STAT);
919 subseg_set (current_seg, current_subseg); /* Restore current seg. */
920 demand_empty_rest_of_line ();
925 int ignore ATTRIBUTE_UNUSED;
933 name = input_line_pointer;
934 c = get_symbol_end ();
935 symbolP = symbol_find_or_make (name);
936 *input_line_pointer = c;
938 S_SET_STORAGE_CLASS (symbolP, C_EXT);
941 input_line_pointer++;
943 if (*input_line_pointer == '\n')
949 demand_empty_rest_of_line ();
952 /* Handle .byte, .word. .int, .long */
957 register unsigned int c;
961 if (*input_line_pointer == '"')
963 input_line_pointer++;
964 while (is_a_char (c = next_char_of_string ()))
965 c4x_emit_char (c, 4);
966 know (input_line_pointer[-1] == '\"');
972 input_line_pointer = c4x_expression (input_line_pointer, &exp);
973 if (exp.X_op == O_constant)
978 exp.X_add_number &= 255;
981 exp.X_add_number &= 65535;
985 /* Perhaps we should disallow .byte and .hword with
986 a non constant expression that will require relocation. */
990 while (*input_line_pointer++ == ',');
992 input_line_pointer--; /* Put terminator back into stream. */
993 demand_empty_rest_of_line ();
996 /* Handle .ascii, .asciz, .string */
998 c4x_stringer (append_zero)
999 int append_zero; /*ex: bytes */
1002 register unsigned int c;
1008 if (*input_line_pointer == '"')
1010 input_line_pointer++;
1011 while (is_a_char (c = next_char_of_string ()))
1013 c4x_emit_char (c, 1);
1019 c4x_emit_char (c, 1);
1023 know (input_line_pointer[-1] == '\"');
1029 input_line_pointer = c4x_expression (input_line_pointer, &exp);
1030 if (exp.X_op != O_constant)
1032 as_bad("Non-constant symbols not allowed\n");
1035 exp.X_add_number &= 255; /* Limit numeber to 8-bit */
1036 emit_expr (&exp, 1);
1040 while (*input_line_pointer++ == ',');
1042 /* Fill out the rest of the expression with 0's to fill up a full word */
1044 c4x_emit_char (0, 4-(bytes&0x3));
1046 input_line_pointer--; /* Put terminator back into stream. */
1047 demand_empty_rest_of_line ();
1050 /* .eval expression, symbol */
1053 int x ATTRIBUTE_UNUSED;
1060 input_line_pointer =
1061 c4x_expression_abs (input_line_pointer, &value);
1062 if (*input_line_pointer++ != ',')
1064 as_bad ("Symbol missing\n");
1067 name = input_line_pointer;
1068 c = get_symbol_end (); /* Get terminator. */
1069 demand_empty_rest_of_line ();
1070 c4x_insert_sym (name, value);
1073 /* Reset local labels. */
1076 int x ATTRIBUTE_UNUSED;
1078 dollar_label_clear ();
1081 /* .sect "section-name" [, value] */
1082 /* .sect ["]section-name[:subsection-name]["] [, value] */
1085 int x ATTRIBUTE_UNUSED;
1089 char *subsection_name;
1095 if (*input_line_pointer == '"')
1096 input_line_pointer++;
1097 section_name = input_line_pointer;
1098 c = get_symbol_end (); /* Get terminator. */
1099 input_line_pointer++; /* Skip null symbol terminator. */
1100 name = xmalloc (input_line_pointer - section_name + 1);
1101 strcpy (name, section_name);
1103 /* TI C from version 5.0 allows a section name to contain a
1104 subsection name as well. The subsection name is separated by a
1105 ':' from the section name. Currently we scan the subsection
1106 name and discard it.
1107 Volker Kuhlmann <v.kuhlmann@elec.canterbury.ac.nz>. */
1110 subsection_name = input_line_pointer;
1111 c = get_symbol_end (); /* Get terminator. */
1112 input_line_pointer++; /* Skip null symbol terminator. */
1113 as_warn (".sect: subsection name ignored");
1116 /* We might still have a '"' to discard, but the character after a
1117 symbol name will be overwritten with a \0 by get_symbol_end()
1121 input_line_pointer =
1122 c4x_expression_abs (input_line_pointer, &num);
1123 else if (*input_line_pointer == ',')
1125 input_line_pointer =
1126 c4x_expression_abs (++input_line_pointer, &num);
1131 seg = subseg_new (name, num);
1132 if (line_label != NULL)
1134 S_SET_SEGMENT (line_label, seg);
1135 symbol_set_frag (line_label, frag_now);
1138 if (bfd_get_section_flags (stdoutput, seg) == SEC_NO_FLAGS)
1140 if (!bfd_set_section_flags (stdoutput, seg, SEC_DATA))
1141 as_warn ("Error setting flags for \"%s\": %s", name,
1142 bfd_errmsg (bfd_get_error ()));
1145 /* If the last character overwritten by get_symbol_end() was an
1146 end-of-line, we must restore it or the end of the line will not be
1147 recognised and scanning extends into the next line, stopping with
1148 an error (blame Volker Kuhlmann <v.kuhlmann@elec.canterbury.ac.nz>
1149 if this is not true). */
1150 if (is_end_of_line[(unsigned char) c])
1151 *(--input_line_pointer) = c;
1153 demand_empty_rest_of_line ();
1156 /* symbol[:] .set value or .set symbol, value */
1159 int x ATTRIBUTE_UNUSED;
1164 if ((symbolP = line_label) == NULL)
1169 name = input_line_pointer;
1170 c = get_symbol_end (); /* Get terminator. */
1173 as_bad (".set syntax invalid\n");
1174 ignore_rest_of_line ();
1177 symbolP = symbol_find_or_make (name);
1180 symbol_table_insert (symbolP);
1182 pseudo_set (symbolP);
1183 demand_empty_rest_of_line ();
1186 /* [symbol] .usect ["]section-name["], size-in-words [, alignment-flag] */
1189 int x ATTRIBUTE_UNUSED;
1195 int size, alignment_flag;
1197 subsegT current_subseg;
1199 current_seg = now_seg; /* save current seg. */
1200 current_subseg = now_subseg; /* save current subseg. */
1203 if (*input_line_pointer == '"')
1204 input_line_pointer++;
1205 section_name = input_line_pointer;
1206 c = get_symbol_end (); /* Get terminator. */
1207 input_line_pointer++; /* Skip null symbol terminator. */
1208 name = xmalloc (input_line_pointer - section_name + 1);
1209 strcpy (name, section_name);
1212 input_line_pointer =
1213 c4x_expression_abs (input_line_pointer, &size);
1214 else if (*input_line_pointer == ',')
1216 input_line_pointer =
1217 c4x_expression_abs (++input_line_pointer, &size);
1222 /* Read a possibly present third argument (alignment flag) [VK]. */
1223 if (*input_line_pointer == ',')
1225 input_line_pointer =
1226 c4x_expression_abs (++input_line_pointer, &alignment_flag);
1231 as_warn (".usect: non-zero alignment flag ignored");
1233 seg = subseg_new (name, 0);
1234 if (line_label != NULL)
1236 S_SET_SEGMENT (line_label, seg);
1237 symbol_set_frag (line_label, frag_now);
1238 S_SET_VALUE (line_label, frag_now_fix ());
1240 seg_info (seg)->bss = 1; /* Uninitialised data. */
1241 if (!bfd_set_section_flags (stdoutput, seg, SEC_ALLOC))
1242 as_warn ("Error setting flags for \"%s\": %s", name,
1243 bfd_errmsg (bfd_get_error ()));
1244 c4x_seg_alloc (name, seg, size, line_label);
1246 if (S_GET_STORAGE_CLASS (line_label) != C_EXT)
1247 S_SET_STORAGE_CLASS (line_label, C_STAT);
1249 subseg_set (current_seg, current_subseg); /* Restore current seg. */
1250 demand_empty_rest_of_line ();
1253 /* .version cpu-version. */
1256 int x ATTRIBUTE_UNUSED;
1260 input_line_pointer =
1261 c4x_expression_abs (input_line_pointer, &temp);
1262 if (!IS_CPU_C3X (temp) && !IS_CPU_C4X (temp))
1263 as_bad ("This assembler does not support processor generation %d",
1266 if (c4x_cpu && temp != c4x_cpu)
1267 as_warn ("Changing processor generation on fly not supported...");
1269 demand_empty_rest_of_line ();
1273 c4x_init_regtable ()
1277 for (i = 0; i < c3x_num_registers; i++)
1278 c4x_insert_reg (c3x_registers[i].name,
1279 c3x_registers[i].regno);
1281 if (IS_CPU_C4X (c4x_cpu))
1283 /* Add additional C4x registers, overriding some C3x ones. */
1284 for (i = 0; i < c4x_num_registers; i++)
1285 c4x_insert_reg (c4x_registers[i].name,
1286 c4x_registers[i].regno);
1293 /* The TI tools accept case insensitive versions of these symbols,
1298 .TMS320xx 30,31,32,40,or 44 set according to -v flag
1299 .C3X or .C3x 1 or 0 1 if -v30,-v31,or -v32
1300 .C30 1 or 0 1 if -v30
1301 .C31 1 or 0 1 if -v31
1302 .C32 1 or 0 1 if -v32
1303 .C4X or .C4x 1 or 0 1 if -v40, or -v44
1304 .C40 1 or 0 1 if -v40
1305 .C44 1 or 0 1 if -v44
1307 .REGPARM 1 or 0 1 if -mr option used
1308 .BIGMODEL 1 or 0 1 if -mb option used
1310 These symbols are currently supported but will be removed in a
1312 .TMS320C30 1 or 0 1 if -v30,-v31,or -v32
1313 .TMS320C31 1 or 0 1 if -v31
1314 .TMS320C32 1 or 0 1 if -v32
1315 .TMS320C40 1 or 0 1 if -v40, or -v44
1316 .TMS320C44 1 or 0 1 if -v44
1318 Source: TI: TMS320C3x/C4x Assembly Language Tools User's Guide,
1319 1997, SPRU035C, p. 3-17/3-18. */
1320 c4x_insert_sym (".REGPARM", c4x_reg_args);
1321 c4x_insert_sym (".MEMPARM", !c4x_reg_args);
1322 c4x_insert_sym (".BIGMODEL", c4x_big_model);
1323 c4x_insert_sym (".C30INTERRUPT", 0);
1324 c4x_insert_sym (".TMS320xx", c4x_cpu == 0 ? 40 : c4x_cpu);
1325 c4x_insert_sym (".C3X", c4x_cpu == 30 || c4x_cpu == 31 || c4x_cpu == 32 || c4x_cpu == 33);
1326 c4x_insert_sym (".C3x", c4x_cpu == 30 || c4x_cpu == 31 || c4x_cpu == 32 || c4x_cpu == 33);
1327 c4x_insert_sym (".C4X", c4x_cpu == 0 || c4x_cpu == 40 || c4x_cpu == 44);
1328 c4x_insert_sym (".C4x", c4x_cpu == 0 || c4x_cpu == 40 || c4x_cpu == 44);
1329 /* Do we need to have the following symbols also in lower case? */
1330 c4x_insert_sym (".TMS320C30", c4x_cpu == 30 || c4x_cpu == 31 || c4x_cpu == 32 || c4x_cpu == 33);
1331 c4x_insert_sym (".tms320C30", c4x_cpu == 30 || c4x_cpu == 31 || c4x_cpu == 32 || c4x_cpu == 33);
1332 c4x_insert_sym (".TMS320C31", c4x_cpu == 31);
1333 c4x_insert_sym (".tms320C31", c4x_cpu == 31);
1334 c4x_insert_sym (".TMS320C32", c4x_cpu == 32);
1335 c4x_insert_sym (".tms320C32", c4x_cpu == 32);
1336 c4x_insert_sym (".TMS320C33", c4x_cpu == 33);
1337 c4x_insert_sym (".tms320C33", c4x_cpu == 33);
1338 c4x_insert_sym (".TMS320C40", c4x_cpu == 40 || c4x_cpu == 44 || c4x_cpu == 0);
1339 c4x_insert_sym (".tms320C40", c4x_cpu == 40 || c4x_cpu == 44 || c4x_cpu == 0);
1340 c4x_insert_sym (".TMS320C44", c4x_cpu == 44);
1341 c4x_insert_sym (".tms320C44", c4x_cpu == 44);
1342 c4x_insert_sym (".TMX320C40", 0); /* C40 first pass silicon ? */
1343 c4x_insert_sym (".tmx320C40", 0);
1346 /* Insert a new instruction template into hash table. */
1348 c4x_inst_insert (inst)
1351 static char prev_name[16];
1352 const char *retval = NULL;
1354 /* Only insert the first name if have several similar entries. */
1355 if (!strcmp (inst->name, prev_name) || inst->name[0] == '\0')
1358 retval = hash_insert (c4x_op_hash, inst->name, (PTR) inst);
1360 fprintf (stderr, "internal error: can't hash `%s': %s\n",
1361 inst->name, retval);
1363 strcpy (prev_name, inst->name);
1364 return retval == NULL;
1367 /* Make a new instruction template. */
1369 c4x_inst_make (name, opcode, args)
1371 unsigned long opcode;
1374 static c4x_inst_t *insts = NULL;
1375 static char *names = NULL;
1376 static int index = 0;
1380 /* Allocate memory to store name strings. */
1381 names = (char *) xmalloc (sizeof (char) * 8192);
1382 /* Allocate memory for additional insts. */
1383 insts = (c4x_inst_t *)
1384 xmalloc (sizeof (c4x_inst_t) * 1024);
1386 insts[index].name = names;
1387 insts[index].opcode = opcode;
1388 insts[index].opmask = 0xffffffff;
1389 insts[index].args = args;
1397 return &insts[index - 1];
1400 /* Add instruction template, creating dynamic templates as required. */
1402 c4x_inst_add (insts)
1405 char *s = insts->name;
1413 /* We do not care about INSNs that is not a part of our
1415 if (!insts->oplevel & c4x_oplevel)
1424 /* Dynamically create all the conditional insts. */
1425 for (i = 0; i < num_conds; i++)
1429 char *c = c4x_conds[i].name;
1439 /* If instruction found then have already processed it. */
1440 if (hash_find (c4x_op_hash, name))
1445 inst = c4x_inst_make (name, insts[k].opcode +
1446 (c4x_conds[i].cond <<
1447 (*s == 'B' ? 16 : 23)),
1449 if (k == 0) /* Save strcmp() with following func. */
1450 ok &= c4x_inst_insert (inst);
1453 while (!strcmp (insts->name,
1460 return c4x_inst_insert (insts);
1470 /* This function is called once, at assembler startup time. It should
1471 set up all the tables, etc., that the MD part of the assembler will
1479 /* Setup the proper opcode level according to the
1480 commandline parameters */
1481 c4x_oplevel = OP_C3X;
1483 if ( IS_CPU_C4X(c4x_cpu) )
1484 c4x_oplevel |= OP_C4X;
1486 if ( ( c4x_cpu == 31 && c4x_revision >= 6)
1487 || (c4x_cpu == 32 && c4x_revision >= 2)
1490 c4x_oplevel |= OP_ENH;
1492 if ( ( c4x_cpu == 30 && c4x_revision >= 7)
1493 || (c4x_cpu == 31 && c4x_revision >= 5)
1496 c4x_oplevel |= OP_LPWR;
1498 if ( ( c4x_cpu == 30 && c4x_revision >= 7)
1499 || (c4x_cpu == 31 && c4x_revision >= 5)
1502 || (c4x_cpu == 40 && c4x_revision >= 5)
1505 c4x_oplevel |= OP_IDLE2;
1507 /* Create hash table for mnemonics. */
1508 c4x_op_hash = hash_new ();
1510 /* Create hash table for asg pseudo. */
1511 c4x_asg_hash = hash_new ();
1513 /* Add mnemonics to hash table, expanding conditional mnemonics on fly. */
1514 for (i = 0; i < c4x_num_insts; i++)
1515 ok &= c4x_inst_add ((void *) &c4x_insts[i]);
1517 /* Create dummy inst to avoid errors accessing end of table. */
1518 c4x_inst_make ("", 0, "");
1521 as_fatal ("Broken assembler. No assembly attempted.");
1523 /* Add registers to symbol table. */
1524 c4x_init_regtable ();
1526 /* Add predefined symbols to symbol table. */
1527 c4x_init_symbols ();
1533 bfd_set_arch_mach (stdoutput, bfd_arch_tic4x,
1534 IS_CPU_C4X (c4x_cpu) ? bfd_mach_c4x : bfd_mach_c3x);
1538 c4x_indirect_parse (operand, indirect)
1539 c4x_operand_t *operand;
1540 const c4x_indirect_t *indirect;
1542 char *n = indirect->name;
1543 char *s = input_line_pointer;
1553 case 'a': /* Need to match aux register. */
1555 #ifdef C4X_ALT_SYNTAX
1559 while (isalnum (*s))
1562 if (!(symbolP = symbol_find (name)))
1565 if (S_GET_SEGMENT (symbolP) != reg_section)
1568 operand->aregno = S_GET_VALUE (symbolP);
1569 if (operand->aregno >= REG_AR0 && operand->aregno <= REG_AR7)
1572 as_bad ("Auxiliary register AR0--AR7 required for indirect");
1575 case 'd': /* Need to match constant for disp. */
1576 #ifdef C4X_ALT_SYNTAX
1577 if (*s == '%') /* expr() will die if we don't skip this. */
1580 s = c4x_expression (s, &operand->expr);
1581 if (operand->expr.X_op != O_constant)
1583 operand->disp = operand->expr.X_add_number;
1584 if (operand->disp < 0 || operand->disp > 255)
1586 as_bad ("Bad displacement %d (require 0--255)\n",
1592 case 'y': /* Need to match IR0. */
1593 case 'z': /* Need to match IR1. */
1594 #ifdef C4X_ALT_SYNTAX
1598 s = c4x_expression (s, &operand->expr);
1599 if (operand->expr.X_op != O_register)
1601 if (operand->expr.X_add_number != REG_IR0
1602 && operand->expr.X_add_number != REG_IR1)
1604 as_bad ("Index register IR0,IR1 required for displacement");
1608 if (*n == 'y' && operand->expr.X_add_number == REG_IR0)
1610 if (*n == 'z' && operand->expr.X_add_number == REG_IR1)
1615 if (*s != '(') /* No displacement, assume to be 1. */
1626 if (tolower (*s) != *n)
1631 if (*s != ' ' && *s != ',' && *s != '\0')
1633 input_line_pointer = s;
1638 c4x_operand_parse (s, operand)
1640 c4x_operand_t *operand;
1645 expressionS *exp = &operand->expr;
1646 char *save = input_line_pointer;
1649 struct hash_entry *entry = NULL;
1651 input_line_pointer = s;
1654 str = input_line_pointer;
1655 c = get_symbol_end (); /* Get terminator. */
1656 new = input_line_pointer;
1657 if (strlen (str) && (entry = hash_find (c4x_asg_hash, str)) != NULL)
1659 *input_line_pointer = c;
1660 input_line_pointer = (char *) entry;
1664 *input_line_pointer = c;
1665 input_line_pointer = str;
1668 operand->mode = M_UNKNOWN;
1669 switch (*input_line_pointer)
1671 #ifdef C4X_ALT_SYNTAX
1673 input_line_pointer = c4x_expression (++input_line_pointer, exp);
1674 if (exp->X_op != O_register)
1675 as_bad ("Expecting a register name");
1676 operand->mode = M_REGISTER;
1680 /* Denotes high 16 bits. */
1681 input_line_pointer = c4x_expression (++input_line_pointer, exp);
1682 if (exp->X_op == O_constant)
1683 operand->mode = M_IMMED;
1684 else if (exp->X_op == O_big)
1686 if (exp->X_add_number)
1687 as_bad ("Number too large"); /* bignum required */
1690 c4x_gen_to_words (generic_floating_point_number,
1691 operand->fwords, S_PRECISION);
1692 operand->mode = M_IMMED_F;
1695 /* Allow ori ^foo, ar0 to be equivalent to ldi .hi.foo, ar0 */
1696 /* WARNING : The TI C40 assembler cannot do this. */
1697 else if (exp->X_op == O_symbol)
1699 operand->mode = M_HI;
1704 input_line_pointer = c4x_expression (++input_line_pointer, exp);
1705 if (exp->X_op == O_constant)
1706 operand->mode = M_IMMED;
1707 else if (exp->X_op == O_big)
1709 if (exp->X_add_number > 0)
1710 as_bad ("Number too large"); /* bignum required. */
1713 c4x_gen_to_words (generic_floating_point_number,
1714 operand->fwords, S_PRECISION);
1715 operand->mode = M_IMMED_F;
1718 /* Allow ori foo, ar0 to be equivalent to ldi .lo.foo, ar0 */
1719 /* WARNING : The TI C40 assembler cannot do this. */
1720 else if (exp->X_op == O_symbol)
1722 operand->mode = M_IMMED;
1727 as_bad ("Expecting a constant value");
1732 input_line_pointer = c4x_expression (++input_line_pointer, exp);
1733 if (exp->X_op != O_constant && exp->X_op != O_symbol)
1734 as_bad ("Bad direct addressing construct %s", s);
1735 if (exp->X_op == O_constant)
1737 if (exp->X_add_number < 0)
1738 as_bad ("Direct value of %ld is not suitable",
1739 (long) exp->X_add_number);
1741 operand->mode = M_DIRECT;
1746 for (i = 0; i < c4x_num_indirects; i++)
1747 if ((ret = c4x_indirect_parse (operand, &c4x_indirects[i])))
1751 if (i < c4x_num_indirects)
1753 operand->mode = M_INDIRECT;
1754 /* Indirect addressing mode number. */
1755 operand->expr.X_add_number = c4x_indirects[i].modn;
1756 /* Convert *+ARn(0) to *ARn etc. Maybe we should
1757 squeal about silly ones? */
1758 if (operand->expr.X_add_number < 0x08 && !operand->disp)
1759 operand->expr.X_add_number = 0x18;
1762 as_bad ("Unknown indirect addressing mode");
1766 operand->mode = M_IMMED; /* Assume immediate. */
1767 str = input_line_pointer;
1768 input_line_pointer = c4x_expression (input_line_pointer, exp);
1769 if (exp->X_op == O_register)
1771 know (exp->X_add_symbol == 0);
1772 know (exp->X_op_symbol == 0);
1773 operand->mode = M_REGISTER;
1776 else if (exp->X_op == O_big)
1778 if (exp->X_add_number > 0)
1779 as_bad ("Number too large"); /* bignum required. */
1782 c4x_gen_to_words (generic_floating_point_number,
1783 operand->fwords, S_PRECISION);
1784 operand->mode = M_IMMED_F;
1788 #ifdef C4X_ALT_SYNTAX
1789 /* Allow ldi foo, ar0 to be equivalent to ldi @foo, ar0. */
1790 else if (exp->X_op == O_symbol)
1792 operand->mode = M_DIRECT;
1798 new = input_line_pointer;
1799 input_line_pointer = save;
1804 c4x_operands_match (inst, insn, check)
1809 const char *args = inst->args;
1810 unsigned long opcode = inst->opcode;
1811 int num_operands = insn->num_operands;
1812 c4x_operand_t *operand = insn->operands;
1813 expressionS *exp = &operand->expr;
1817 /* Build the opcode, checking as we go to make sure that the
1820 If an operand matches, we modify insn or opcode appropriately,
1821 and do a "continue". If an operand fails to match, we "break". */
1823 insn->nchars = 4; /* Instructions always 4 bytes. */
1824 insn->reloc = NO_RELOC;
1829 insn->opcode = opcode;
1830 return num_operands == 0;
1838 case '\0': /* End of args. */
1839 if (num_operands == 1)
1841 insn->opcode = opcode;
1844 break; /* Too many operands. */
1846 case '#': /* This is only used for ldp. */
1847 if (operand->mode != M_DIRECT && operand->mode != M_IMMED)
1849 /* While this looks like a direct addressing mode, we actually
1850 use an immediate mode form of ldiu or ldpk instruction. */
1851 if (exp->X_op == O_constant)
1853 if( ( IS_CPU_C4X (c4x_cpu) && exp->X_add_number <= 65535 )
1854 || ( IS_CPU_C3X (c4x_cpu) && exp->X_add_number <= 255 ) )
1856 INSERTS (opcode, exp->X_add_number, 15, 0);
1862 as_bad ("Immediate value of %ld is too large for ldf",
1863 (long) exp->X_add_number);
1868 else if (exp->X_op == O_symbol)
1870 insn->reloc = BFD_RELOC_HI16;
1874 break; /* Not direct (dp) addressing. */
1876 case '@': /* direct. */
1877 if (operand->mode != M_DIRECT)
1879 if (exp->X_op == O_constant)
1881 if(exp->X_add_number <= 65535)
1883 /* Store only the 16 LSBs of the number. */
1884 INSERTS (opcode, exp->X_add_number, 15, 0);
1890 as_bad ("Direct value of %ld is too large",
1891 (long) exp->X_add_number);
1896 else if (exp->X_op == O_symbol)
1898 insn->reloc = BFD_RELOC_LO16;
1902 break; /* Not direct addressing. */
1905 if (operand->mode != M_REGISTER)
1907 reg = exp->X_add_number;
1908 if (reg >= REG_AR0 && reg <= REG_AR7)
1909 INSERTU (opcode, reg - REG_AR0, 24, 22);
1913 as_bad ("Destination register must be ARn");
1918 case 'B': /* Unsigned integer immediate. */
1919 /* Allow br label or br @label. */
1920 if (operand->mode != M_IMMED && operand->mode != M_DIRECT)
1922 if (exp->X_op == O_constant)
1924 if (exp->X_add_number < (1 << 24))
1926 INSERTU (opcode, exp->X_add_number, 23, 0);
1932 as_bad ("Immediate value of %ld is too large",
1933 (long) exp->X_add_number);
1938 if (IS_CPU_C4X (c4x_cpu))
1940 insn->reloc = BFD_RELOC_24_PCREL;
1945 insn->reloc = BFD_RELOC_24;
1952 if (!IS_CPU_C4X (c4x_cpu))
1954 if (operand->mode != M_INDIRECT)
1956 /* Require either *+ARn(disp) or *ARn. */
1957 if (operand->expr.X_add_number != 0
1958 && operand->expr.X_add_number != 0x18)
1961 as_bad ("Invalid indirect addressing mode");
1965 INSERTU (opcode, operand->aregno - REG_AR0, 2, 0);
1966 INSERTU (opcode, operand->disp, 7, 3);
1970 if (!(operand->mode == M_REGISTER))
1972 INSERTU (opcode, exp->X_add_number, 7, 0);
1976 if (!(operand->mode == M_REGISTER))
1978 reg = exp->X_add_number;
1979 if ( (reg >= REG_R0 && reg <= REG_R7)
1980 || (IS_CPU_C4X (c4x_cpu) && reg >= REG_R8 && reg <= REG_R11) )
1981 INSERTU (opcode, reg, 7, 0);
1985 as_bad ("Register must be Rn");
1991 if (operand->mode != M_IMMED_F
1992 && !(operand->mode == M_IMMED && exp->X_op == O_constant))
1995 if (operand->mode != M_IMMED_F)
1997 /* OK, we 've got something like cmpf 0, r0
1998 Why can't they stick in a bloody decimal point ?! */
2001 /* Create floating point number string. */
2002 sprintf (string, "%d.0", (int) exp->X_add_number);
2003 c4x_atof (string, 's', operand->fwords);
2006 INSERTU (opcode, operand->fwords[0], 15, 0);
2010 if (operand->mode != M_REGISTER)
2012 INSERTU (opcode, exp->X_add_number, 15, 8);
2016 if (operand->mode != M_REGISTER)
2018 reg = exp->X_add_number;
2019 if ( (reg >= REG_R0 && reg <= REG_R7)
2020 || (IS_CPU_C4X (c4x_cpu) && reg >= REG_R8 && reg <= REG_R11) )
2021 INSERTU (opcode, reg, 15, 8);
2025 as_bad ("Register must be Rn");
2031 if (operand->mode != M_REGISTER)
2033 reg = exp->X_add_number;
2034 if (reg >= REG_R0 && reg <= REG_R7)
2035 INSERTU (opcode, reg - REG_R0, 18, 16);
2039 as_bad ("Register must be R0--R7");
2045 if ( operand->mode == M_REGISTER
2046 && c4x_oplevel & OP_ENH )
2048 reg = exp->X_add_number;
2049 INSERTU (opcode, reg, 4, 0);
2050 INSERTU (opcode, 7, 7, 5);
2056 if (operand->mode != M_INDIRECT)
2058 if (operand->disp != 0 && operand->disp != 1)
2060 if (IS_CPU_C4X (c4x_cpu))
2063 as_bad ("Invalid indirect addressing mode displacement %d",
2068 INSERTU (opcode, operand->aregno - REG_AR0, 2, 0);
2069 INSERTU (opcode, operand->expr.X_add_number, 7, 3);
2073 if ( operand->mode == M_REGISTER
2074 && c4x_oplevel & OP_ENH )
2076 reg = exp->X_add_number;
2077 INSERTU (opcode, reg, 12, 8);
2078 INSERTU (opcode, 7, 15, 13);
2084 if (operand->mode != M_INDIRECT)
2086 if (operand->disp != 0 && operand->disp != 1)
2088 if (IS_CPU_C4X (c4x_cpu))
2091 as_bad ("Invalid indirect addressing mode displacement %d",
2096 INSERTU (opcode, operand->aregno - REG_AR0, 10, 8);
2097 INSERTU (opcode, operand->expr.X_add_number, 15, 11);
2101 if (operand->mode != M_REGISTER)
2103 reg = exp->X_add_number;
2104 if (reg >= REG_R0 && reg <= REG_R7)
2105 INSERTU (opcode, reg - REG_R0, 21, 19);
2109 as_bad ("Register must be R0--R7");
2115 if (operand->mode != M_REGISTER)
2117 reg = exp->X_add_number;
2118 if (reg >= REG_R0 && reg <= REG_R7)
2119 INSERTU (opcode, reg - REG_R0, 24, 22);
2123 as_bad ("Register must be R0--R7");
2129 if (operand->mode != M_REGISTER)
2131 reg = exp->X_add_number;
2132 if (reg == REG_R2 || reg == REG_R3)
2133 INSERTU (opcode, reg - REG_R2, 22, 22);
2137 as_bad ("Destination register must be R2 or R3");
2143 if (operand->mode != M_REGISTER)
2145 reg = exp->X_add_number;
2146 if (reg == REG_R0 || reg == REG_R1)
2147 INSERTU (opcode, reg - REG_R0, 23, 23);
2151 as_bad ("Destination register must be R0 or R1");
2157 if (!IS_CPU_C4X (c4x_cpu))
2159 if (operand->mode != M_INDIRECT)
2161 /* Require either *+ARn(disp) or *ARn. */
2162 if (operand->expr.X_add_number != 0
2163 && operand->expr.X_add_number != 0x18)
2166 as_bad ("Invalid indirect addressing mode");
2170 INSERTU (opcode, operand->aregno - REG_AR0, 10, 8);
2171 INSERTU (opcode, operand->disp, 15, 11);
2174 case 'P': /* PC relative displacement. */
2175 /* Allow br label or br @label. */
2176 if (operand->mode != M_IMMED && operand->mode != M_DIRECT)
2178 if (exp->X_op == O_constant)
2180 if (exp->X_add_number >= -32768 && exp->X_add_number <= 32767)
2182 INSERTS (opcode, exp->X_add_number, 15, 0);
2188 as_bad ("Displacement value of %ld is too large",
2189 (long) exp->X_add_number);
2194 insn->reloc = BFD_RELOC_16_PCREL;
2200 if (operand->mode != M_REGISTER)
2202 reg = exp->X_add_number;
2203 INSERTU (opcode, reg, 15, 0);
2207 if (operand->mode != M_REGISTER)
2209 reg = exp->X_add_number;
2210 if ( (reg >= REG_R0 && reg <= REG_R7)
2211 || (IS_CPU_C4X (c4x_cpu) && reg >= REG_R8 && reg <= REG_R11) )
2212 INSERTU (opcode, reg, 15, 0);
2216 as_bad ("Register must be Rn");
2222 if (operand->mode != M_REGISTER)
2224 reg = exp->X_add_number;
2225 INSERTU (opcode, reg, 20, 16);
2229 if (operand->mode != M_REGISTER)
2231 reg = exp->X_add_number;
2232 if ( (reg >= REG_R0 && reg <= REG_R7)
2233 || (IS_CPU_C4X (c4x_cpu) && reg >= REG_R8 && reg <= REG_R11) )
2234 INSERTU (opcode, reg, 20, 16);
2238 as_bad ("Register must be Rn");
2243 case 'S': /* Short immediate int. */
2244 if (operand->mode != M_IMMED && operand->mode != M_HI)
2246 if (exp->X_op == O_big)
2249 as_bad ("Floating point number not valid in expression");
2253 if (exp->X_op == O_constant)
2255 if (exp->X_add_number >= -32768 && exp->X_add_number <= 65535)
2257 INSERTS (opcode, exp->X_add_number, 15, 0);
2263 as_bad ("Signed immediate value %ld too large",
2264 (long) exp->X_add_number);
2269 else if (exp->X_op == O_symbol)
2271 if (operand->mode == M_HI)
2273 insn->reloc = BFD_RELOC_HI16;
2277 insn->reloc = BFD_RELOC_LO16;
2282 /* Handle cases like ldi foo - $, ar0 where foo
2283 is a forward reference. Perhaps we should check
2284 for X_op == O_symbol and disallow things like
2286 insn->reloc = BFD_RELOC_16;
2290 case 'T': /* 5-bit immediate value for c4x stik. */
2291 if (!IS_CPU_C4X (c4x_cpu))
2293 if (operand->mode != M_IMMED)
2295 if (exp->X_op == O_constant)
2297 if (exp->X_add_number < 16 && exp->X_add_number >= -16)
2299 INSERTS (opcode, exp->X_add_number, 20, 16);
2305 as_bad ("Immediate value of %ld is too large",
2306 (long) exp->X_add_number);
2311 break; /* No relocations allowed. */
2313 case 'U': /* Unsigned integer immediate. */
2314 if (operand->mode != M_IMMED && operand->mode != M_HI)
2316 if (exp->X_op == O_constant)
2318 if (exp->X_add_number < (1 << 16) && exp->X_add_number >= 0)
2320 INSERTU (opcode, exp->X_add_number, 15, 0);
2326 as_bad ("Unsigned immediate value %ld too large",
2327 (long) exp->X_add_number);
2332 else if (exp->X_op == O_symbol)
2334 if (operand->mode == M_HI)
2335 insn->reloc = BFD_RELOC_HI16;
2337 insn->reloc = BFD_RELOC_LO16;
2342 insn->reloc = BFD_RELOC_16;
2346 case 'V': /* Trap numbers (immediate field). */
2347 if (operand->mode != M_IMMED)
2349 if (exp->X_op == O_constant)
2351 if (exp->X_add_number < 512 && IS_CPU_C4X (c4x_cpu))
2353 INSERTU (opcode, exp->X_add_number, 8, 0);
2356 else if (exp->X_add_number < 32 && IS_CPU_C3X (c4x_cpu))
2358 INSERTU (opcode, exp->X_add_number | 0x20, 4, 0);
2364 as_bad ("Immediate value of %ld is too large",
2365 (long) exp->X_add_number);
2370 break; /* No relocations allowed. */
2372 case 'W': /* Short immediate int (0--7). */
2373 if (!IS_CPU_C4X (c4x_cpu))
2375 if (operand->mode != M_IMMED)
2377 if (exp->X_op == O_big)
2380 as_bad ("Floating point number not valid in expression");
2384 if (exp->X_op == O_constant)
2386 if (exp->X_add_number >= -256 && exp->X_add_number <= 127)
2388 INSERTS (opcode, exp->X_add_number, 7, 0);
2394 as_bad ("Immediate value %ld too large",
2395 (long) exp->X_add_number);
2400 insn->reloc = BFD_RELOC_16;
2404 case 'X': /* Expansion register for c4x. */
2405 if (operand->mode != M_REGISTER)
2407 reg = exp->X_add_number;
2408 if (reg >= REG_IVTP && reg <= REG_TVTP)
2409 INSERTU (opcode, reg - REG_IVTP, 4, 0);
2413 as_bad ("Register must be ivtp or tvtp");
2418 case 'Y': /* Address register for c4x lda. */
2419 if (operand->mode != M_REGISTER)
2421 reg = exp->X_add_number;
2422 if (reg >= REG_AR0 && reg <= REG_SP)
2423 INSERTU (opcode, reg, 20, 16);
2427 as_bad ("Register must be address register");
2432 case 'Z': /* Expansion register for c4x. */
2433 if (operand->mode != M_REGISTER)
2435 reg = exp->X_add_number;
2436 if (reg >= REG_IVTP && reg <= REG_TVTP)
2437 INSERTU (opcode, reg - REG_IVTP, 20, 16);
2441 as_bad ("Register must be ivtp or tvtp");
2447 if (operand->mode != M_INDIRECT)
2449 INSERTS (opcode, operand->disp, 7, 0);
2450 INSERTU (opcode, operand->aregno - REG_AR0, 10, 8);
2451 INSERTU (opcode, operand->expr.X_add_number, 15, 11);
2454 case '|': /* treat as `,' if have ldi_ldi form. */
2457 if (--num_operands < 0)
2458 break; /* Too few operands. */
2460 if (operand->mode != M_PARALLEL)
2465 case ',': /* Another operand. */
2466 if (--num_operands < 0)
2467 break; /* Too few operands. */
2469 exp = &operand->expr;
2472 case ';': /* Another optional operand. */
2473 if (num_operands == 1 || operand[1].mode == M_PARALLEL)
2475 if (--num_operands < 0)
2476 break; /* Too few operands. */
2478 exp = &operand->expr;
2489 c4x_insn_check (insn)
2493 if (!strcmp(insn->name, "lda"))
2495 if (insn->num_operands < 2 || insn->num_operands > 2)
2496 as_fatal ("Illegal internal LDA insn definition");
2498 if ( insn->operands[0].mode == M_REGISTER
2499 && insn->operands[1].mode == M_REGISTER
2500 && insn->operands[0].expr.X_add_number == insn->operands[1].expr.X_add_number )
2501 as_bad ("Source and destination register should not be equal");
2503 else if( !strcmp(insn->name, "ldi_ldi")
2504 || !strcmp(insn->name, "ldi1_ldi2")
2505 || !strcmp(insn->name, "ldi2_ldi1")
2506 || !strcmp(insn->name, "ldf_ldf")
2507 || !strcmp(insn->name, "ldf1_ldf2")
2508 || !strcmp(insn->name, "ldf2_ldf1") )
2510 if ( insn->num_operands < 4 && insn->num_operands > 5 )
2511 as_fatal ("Illegal internal %s insn definition", insn->name);
2513 if ( insn->operands[1].mode == M_REGISTER
2514 && insn->operands[insn->num_operands-1].mode == M_REGISTER
2515 && insn->operands[1].expr.X_add_number == insn->operands[insn->num_operands-1].expr.X_add_number )
2516 as_warn ("Equal parallell destination registers, one result will be discarded");
2521 c4x_insn_output (insn)
2526 /* Grab another fragment for opcode. */
2527 dst = frag_more (insn->nchars);
2529 /* Put out opcode word as a series of bytes in little endian order. */
2530 md_number_to_chars (dst, insn->opcode, insn->nchars);
2532 /* Put out the symbol-dependent stuff. */
2533 if (insn->reloc != NO_RELOC)
2535 /* Where is the offset into the fragment for this instruction. */
2536 fix_new_exp (frag_now,
2537 dst - frag_now->fr_literal, /* where */
2538 insn->nchars, /* size */
2545 /* Parse the operands. */
2547 c4x_operands_parse (s, operands, num_operands)
2549 c4x_operand_t *operands;
2553 return num_operands;
2556 s = c4x_operand_parse (s, &operands[num_operands++]);
2557 while (num_operands < C4X_OPERANDS_MAX && *s++ == ',');
2559 if (num_operands > C4X_OPERANDS_MAX)
2561 as_bad ("Too many operands scanned");
2564 return num_operands;
2567 /* Assemble a single instruction. Its label has already been handled
2568 by the generic front end. We just parse mnemonic and operands, and
2569 produce the bytes of data and relocation. */
2578 c4x_inst_t *inst; /* Instruction template. */
2579 c4x_inst_t *first_inst;
2581 if (str && insn->parallel)
2585 /* Find mnemonic (second part of parallel instruction). */
2587 /* Skip past instruction mnemonic. */
2588 while (*s && *s != ' ' && *s != '*')
2591 if (*s) /* Null terminate for hash_find. */
2592 *s++ = '\0'; /* and skip past null. */
2593 strcat (insn->name, "_");
2594 strncat (insn->name, str, C4X_NAME_MAX - strlen (insn->name));
2596 /* Kludge to overcome problems with scrubber removing
2597 space between mnemonic and indirect operand (starting with *)
2598 on second line of parallel instruction. */
2602 insn->operands[insn->num_operands++].mode = M_PARALLEL;
2604 if ((i = c4x_operands_parse
2605 (s, insn->operands, insn->num_operands)) < 0)
2611 insn->num_operands = i;
2617 if ((insn->inst = (struct c4x_inst *)
2618 hash_find (c4x_op_hash, insn->name)) == NULL)
2620 as_bad ("Unknown opcode `%s'.", insn->name);
2630 ok = c4x_operands_match (inst, insn, 1);
2637 } while (!ok && !strcmp (inst->name, inst[1].name) && inst++);
2641 c4x_insn_check (insn);
2642 c4x_insn_output (insn);
2647 c4x_operands_match (first_inst, insn, 0);
2648 as_bad ("Invalid operands for %s", insn->name);
2651 as_bad ("Invalid instruction %s", insn->name);
2656 /* Find mnemonic. */
2658 while (*s && *s != ' ') /* Skip past instruction mnemonic. */
2660 if (*s) /* Null terminate for hash_find. */
2661 *s++ = '\0'; /* and skip past null. */
2662 strncpy (insn->name, str, C4X_NAME_MAX - 3);
2664 if ((i = c4x_operands_parse (s, insn->operands, 0)) < 0)
2666 insn->inst = NULL; /* Flag that error occured. */
2671 insn->num_operands = i;
2686 /* Turn a string in input_line_pointer into a floating point constant
2687 of type type, and store the appropriate bytes in *litP. The number
2688 of LITTLENUMS emitted is stored in *sizeP. An error message is
2689 returned, or NULL on OK. */
2692 md_atof (type, litP, sizeP)
2699 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2700 LITTLENUM_TYPE *wordP;
2705 case 's': /* .single */
2711 case 'd': /* .double */
2713 case 'f': /* .float or .single */
2716 prec = 2; /* 1 32-bit word */
2719 case 'i': /* .ieee */
2723 type = 'f'; /* Rewrite type to be usable by atof_ieee() */
2726 case 'e': /* .ldouble */
2728 prec = 4; /* 2 32-bit words */
2734 return "Bad call to md_atof()";
2738 t = atof_ieee (input_line_pointer, type, words);
2740 t = c4x_atof (input_line_pointer, type, words);
2742 input_line_pointer = t;
2743 *sizeP = prec * sizeof (LITTLENUM_TYPE);
2745 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2746 little endian byte order. */
2747 /* SES: However it is required to put the words (32-bits) out in the
2748 correct order, hence we write 2 and 2 littlenums in little endian
2749 order, while we keep the original order on successive words. */
2750 for(wordP = words; wordP<(words+prec) ; wordP+=2)
2752 if (wordP<(words+prec-1)) /* Dump wordP[1] (if we have one) */
2754 md_number_to_chars (litP, (valueT) (wordP[1]),
2755 sizeof (LITTLENUM_TYPE));
2756 litP += sizeof (LITTLENUM_TYPE);
2760 md_number_to_chars (litP, (valueT) (wordP[0]),
2761 sizeof (LITTLENUM_TYPE));
2762 litP += sizeof (LITTLENUM_TYPE);
2768 md_apply_fix3 (fixP, value, seg)
2771 segT seg ATTRIBUTE_UNUSED;
2773 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2774 valueT val = *value;
2776 switch (fixP->fx_r_type)
2778 case BFD_RELOC_HI16:
2782 case BFD_RELOC_LO16:
2789 switch (fixP->fx_r_type)
2794 case BFD_RELOC_24_PCREL:
2797 case BFD_RELOC_16_PCREL:
2798 case BFD_RELOC_LO16:
2799 case BFD_RELOC_HI16:
2806 as_bad ("Bad relocation type: 0x%02x", fixP->fx_r_type);
2810 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) fixP->fx_done = 1;
2813 /* Should never be called for c4x. */
2815 md_convert_frag (headers, sec, fragP)
2816 bfd *headers ATTRIBUTE_UNUSED;
2817 segT sec ATTRIBUTE_UNUSED;
2818 fragS *fragP ATTRIBUTE_UNUSED;
2820 as_fatal ("md_convert_frag");
2823 /* Should never be called for c4x. */
2825 md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
2826 char *ptr ATTRIBUTE_UNUSED;
2827 addressT from_addr ATTRIBUTE_UNUSED;
2828 addressT to_addr ATTRIBUTE_UNUSED;
2829 fragS *frag ATTRIBUTE_UNUSED;
2830 symbolS *to_symbol ATTRIBUTE_UNUSED;
2832 as_fatal ("md_create_short_jmp\n");
2835 /* Should never be called for c4x. */
2837 md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
2838 char *ptr ATTRIBUTE_UNUSED;
2839 addressT from_addr ATTRIBUTE_UNUSED;
2840 addressT to_addr ATTRIBUTE_UNUSED;
2841 fragS *frag ATTRIBUTE_UNUSED;
2842 symbolS *to_symbol ATTRIBUTE_UNUSED;
2844 as_fatal ("md_create_long_jump\n");
2847 /* Should never be called for c4x. */
2849 md_estimate_size_before_relax (fragP, segtype)
2850 register fragS *fragP ATTRIBUTE_UNUSED;
2851 segT segtype ATTRIBUTE_UNUSED;
2853 as_fatal ("md_estimate_size_before_relax\n");
2859 md_parse_option (c, arg)
2865 case OPTION_CPU: /* cpu brand */
2866 if (tolower (*arg) == 'c')
2868 c4x_cpu = atoi (arg);
2869 if (!IS_CPU_C3X (c4x_cpu) && !IS_CPU_C4X (c4x_cpu))
2870 as_warn ("Unsupported processor generation %d", c4x_cpu);
2873 case OPTION_REV: /* cpu revision */
2874 c4x_revision = atoi (arg);
2878 as_warn ("Option -b is depreciated, please use -mbig");
2879 case OPTION_BIG: /* big model */
2884 as_warn ("Option -p is depreciated, please use -mmemparm");
2885 case OPTION_MEMPARM: /* push args */
2890 as_warn ("Option -r is depreciated, please use -mregparm");
2891 case OPTION_REGPARM: /* register args */
2896 as_warn ("Option -s is depreciated, please use -msmall");
2897 case OPTION_SMALL: /* small model */
2905 case OPTION_LOWPOWER:
2909 case OPTION_ENHANCED:
2921 md_show_usage (stream)
2925 _("\nTIC4X options:\n"
2926 " -mcpu=CPU -mCPU select architecture variant. CPU can be:\n"
2928 " 31 - TMS320C31, TMS320LC31\n"
2930 " 33 - TMS320VC33\n"
2933 " -mrev=REV set cpu hardware revision (integer numbers).\n"
2934 " Combinations of -mcpu and -mrev will enable/disable\n"
2935 " the appropriate options (-midle2, -mlowpower and\n"
2936 " -menhanced) according to the selected type\n"
2937 " -mbig select big memory model\n"
2938 " -msmall select small memory model (default)\n"
2939 " -mregparm select register parameters (default)\n"
2940 " -mmemparm select memory parameters\n"
2941 " -midle2 enable IDLE2 support\n"
2942 " -mlowpower enable LOPOWER and MAXSPEED support\n"
2943 " -menhanced enable enhanced opcode support\n"));
2946 /* This is called when a line is unrecognized. This is used to handle
2947 definitions of TI C3x tools style local labels $n where n is a single
2950 c4x_unrecognized_line (c)
2956 if (c != '$' || !isdigit (input_line_pointer[0]))
2959 s = input_line_pointer;
2961 /* Let's allow multiple digit local labels. */
2963 while (isdigit (*s))
2965 lab = lab * 10 + *s - '0';
2969 if (dollar_label_defined (lab))
2971 as_bad ("Label \"$%d\" redefined", lab);
2975 define_dollar_label (lab);
2976 colon (dollar_label_name (lab, 0));
2977 input_line_pointer = s + 1;
2982 /* Handle local labels peculiar to us referred to in an expression. */
2984 md_undefined_symbol (name)
2987 /* Look for local labels of the form $n. */
2988 if (name[0] == '$' && isdigit (name[1]))
2994 while (isdigit ((unsigned char) *s))
2996 lab = lab * 10 + *s - '0';
2999 if (dollar_label_defined (lab))
3001 name = dollar_label_name (lab, 0);
3002 symbolP = symbol_find (name);
3006 name = dollar_label_name (lab, 1);
3007 symbolP = symbol_find_or_make (name);
3015 /* Parse an operand that is machine-specific. */
3017 md_operand (expressionP)
3018 expressionS *expressionP ATTRIBUTE_UNUSED;
3022 /* Round up a section size to the appropriate boundary---do we need this? */
3024 md_section_align (segment, size)
3025 segT segment ATTRIBUTE_UNUSED;
3028 return size; /* Byte (i.e., 32-bit) alignment is fine? */
3035 /* Determine the PC offset for a C[34]x instruction.
3036 This could be simplified using some boolean algebra
3037 but at the expense of readability. */
3041 case 0x62: /* call (C4x) */
3042 case 0x64: /* rptb (C4x) */
3044 case 0x61: /* brd */
3045 case 0x63: /* laj */
3046 case 0x65: /* rptbd (C4x) */
3048 case 0x66: /* swi */
3055 switch ((op & 0xffe00000) >> 20)
3057 case 0x6a0: /* bB */
3058 case 0x720: /* callB */
3059 case 0x740: /* trapB */
3062 case 0x6a2: /* bBd */
3063 case 0x6a6: /* bBat */
3064 case 0x6aa: /* bBaf */
3065 case 0x722: /* lajB */
3066 case 0x748: /* latB */
3067 case 0x798: /* rptbd */
3074 switch ((op & 0xfe200000) >> 20)
3076 case 0x6e0: /* dbB */
3079 case 0x6e2: /* dbBd */
3089 /* Exactly what point is a PC-relative offset relative TO?
3090 With the C3x we have the following:
3091 DBcond, Bcond disp + PC + 1 => PC
3092 DBcondD, BcondD disp + PC + 3 => PC
3095 md_pcrel_from (fixP)
3098 unsigned char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3101 op = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0];
3103 return ((fixP->fx_where + fixP->fx_frag->fr_address) >> 2) +
3107 /* Fill the alignment area with NOP's on .text, unless fill-data
3110 c4x_do_align (alignment, fill, len, max)
3111 int alignment ATTRIBUTE_UNUSED;
3112 const char *fill ATTRIBUTE_UNUSED;
3113 int len ATTRIBUTE_UNUSED;
3114 int max ATTRIBUTE_UNUSED;
3116 unsigned long nop = NOP_OPCODE;
3118 /* Because we are talking lwords, not bytes, adjust aligment to do words */
3121 if (alignment != 0 && !need_pass_2)
3125 /*if (subseg_text_p (now_seg))*/ /* FIXME: doesnt work for .text for some reason */
3126 frag_align_pattern( alignment, (const char *)&nop, sizeof(nop), max);
3129 frag_align (alignment, 0, max);*/
3132 frag_align (alignment, *fill, max);
3134 frag_align_pattern (alignment, fill, len, max);
3137 /* Return 1 to skip the default aligment function */
3141 /* Look for and remove parallel instruction operator ||. */
3145 char *s = input_line_pointer;
3149 /* If parallel instruction prefix found at start of line, skip it. */
3150 if (*input_line_pointer == '|' && input_line_pointer[1] == '|')
3155 input_line_pointer += 2;
3156 /* So line counters get bumped. */
3157 input_line_pointer[-1] = '\n';
3164 input_line_pointer = s;
3169 tc_gen_reloc (seg, fixP)
3170 asection *seg ATTRIBUTE_UNUSED;
3175 reloc = (arelent *) xmalloc (sizeof (arelent));
3177 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
3178 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
3179 reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
3180 reloc->address /= OCTETS_PER_BYTE;
3181 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
3182 if (reloc->howto == (reloc_howto_type *) NULL)
3184 as_bad_where (fixP->fx_file, fixP->fx_line,
3185 "Reloc %d not supported by object file format",
3186 (int) fixP->fx_r_type);
3190 if (fixP->fx_r_type == BFD_RELOC_HI16)
3191 reloc->addend = fixP->fx_offset;
3193 reloc->addend = fixP->fx_addnumber;