1 /* tc-c30.c -- Assembly code for the Texas Instruments TMS320C30
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3 Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 /* Texas Instruments TMS320C30 machine specific gas.
23 Written by Steven Haworth (steve@pm.cse.rmit.edu.au).
24 Bugs & suggestions are completely welcome. This is free software.
25 Please help us make it better. */
28 #include "safe-ctype.h"
29 #include "opcode/tic30.h"
31 /* Put here all non-digit non-letter characters that may occur in an
33 static char operand_special_chars[] = "%$-+(,)*._~/<>&^!:[@]";
34 static const char *ordinal_names[] =
36 N_("first"), N_("second"), N_("third"), N_("fourth"), N_("fifth")
39 const char comment_chars[] = ";";
40 const char line_comment_chars[] = "*";
41 const char line_separator_chars[] = "";
43 const char *md_shortopts = "";
44 struct option md_longopts[] =
46 {NULL, no_argument, NULL, 0}
49 size_t md_longopts_size = sizeof (md_longopts);
51 /* Chars that mean this number is a floating point constant.
54 const char FLT_CHARS[] = "fFdDxX";
56 /* Chars that can be used to separate mant from exp in floating point
58 const char EXP_CHARS[] = "eE";
60 /* Tables for lexical analysis. */
61 static char opcode_chars[256];
62 static char register_chars[256];
63 static char operand_chars[256];
64 static char space_chars[256];
65 static char identifier_chars[256];
66 static char digit_chars[256];
69 #define is_opcode_char(x) (opcode_chars [(unsigned char) x])
70 #define is_operand_char(x) (operand_chars [(unsigned char) x])
71 #define is_register_char(x) (register_chars [(unsigned char) x])
72 #define is_space_char(x) (space_chars [(unsigned char) x])
73 #define is_identifier_char(x) (identifier_chars [(unsigned char) x])
74 #define is_digit_char(x) (digit_chars [(unsigned char) x])
76 const pseudo_typeS md_pseudo_table[] =
81 static int ATTRIBUTE_PRINTF_1
82 debug (const char *string, ...)
89 va_start (argptr, string);
90 vsprintf (str, string, argptr);
94 fputs (str, USE_STDOUT ? stdout : stderr);
101 /* Hash table for opcode lookup. */
102 static struct hash_control *op_hash;
103 /* Hash table for parallel opcode lookup. */
104 static struct hash_control *parop_hash;
105 /* Hash table for register lookup. */
106 static struct hash_control *reg_hash;
107 /* Hash table for indirect addressing lookup. */
108 static struct hash_control *ind_hash;
113 const char *hash_err;
115 debug ("In md_begin()\n");
116 op_hash = hash_new ();
119 const insn_template *current_optab = tic30_optab;
121 for (; current_optab < tic30_optab_end; current_optab++)
123 hash_err = hash_insert (op_hash, current_optab->name,
124 (char *) current_optab);
126 as_fatal ("Internal Error: Can't Hash %s: %s",
127 current_optab->name, hash_err);
131 parop_hash = hash_new ();
134 const partemplate *current_parop = tic30_paroptab;
136 for (; current_parop < tic30_paroptab_end; current_parop++)
138 hash_err = hash_insert (parop_hash, current_parop->name,
139 (char *) current_parop);
141 as_fatal ("Internal Error: Can't Hash %s: %s",
142 current_parop->name, hash_err);
146 reg_hash = hash_new ();
149 const reg *current_reg = tic30_regtab;
151 for (; current_reg < tic30_regtab_end; current_reg++)
153 hash_err = hash_insert (reg_hash, current_reg->name,
154 (char *) current_reg);
156 as_fatal ("Internal Error: Can't Hash %s: %s",
157 current_reg->name, hash_err);
161 ind_hash = hash_new ();
164 const ind_addr_type *current_ind = tic30_indaddr_tab;
166 for (; current_ind < tic30_indaddrtab_end; current_ind++)
168 hash_err = hash_insert (ind_hash, current_ind->syntax,
169 (char *) current_ind);
171 as_fatal ("Internal Error: Can't Hash %s: %s",
172 current_ind->syntax, hash_err);
176 /* Fill in lexical tables: opcode_chars, operand_chars, space_chars. */
181 for (c = 0; c < 256; c++)
183 if (ISLOWER (c) || ISDIGIT (c))
186 register_chars[c] = c;
188 else if (ISUPPER (c))
190 opcode_chars[c] = TOLOWER (c);
191 register_chars[c] = opcode_chars[c];
193 else if (c == ')' || c == '(')
194 register_chars[c] = c;
196 if (ISUPPER (c) || ISLOWER (c) || ISDIGIT (c))
197 operand_chars[c] = c;
199 if (ISDIGIT (c) || c == '-')
202 if (ISALPHA (c) || c == '_' || c == '.' || ISDIGIT (c))
203 identifier_chars[c] = c;
205 if (c == ' ' || c == '\t')
211 for (p = operand_special_chars; *p != '\0'; p++)
212 operand_chars[(unsigned char) *p] = *p;
216 /* Address Mode OR values. */
217 #define AM_Register 0x00000000
218 #define AM_Direct 0x00200000
219 #define AM_Indirect 0x00400000
220 #define AM_Immediate 0x00600000
221 #define AM_NotReq 0xFFFFFFFF
223 /* PC Relative OR values. */
224 #define PC_Register 0x00000000
225 #define PC_Relative 0x02000000
235 expressionS direct_expr;
253 unsigned int u_number;
255 expressionS imm_expr;
259 insn_template *opcode;
263 insn_template *tm; /* Template of current instruction. */
264 unsigned opcode; /* Final opcode. */
265 unsigned int operands; /* Number of given operands. */
266 /* Type of operand given in instruction. */
267 operand *operand_type[MAX_OPERANDS];
268 unsigned addressing_mode; /* Final addressing mode of instruction. */
271 struct tic30_insn insn;
272 static int found_parallel_insn;
274 static char output_invalid_buf[sizeof (unsigned char) * 2 + 6];
277 output_invalid (char c)
280 snprintf (output_invalid_buf, sizeof (output_invalid_buf),
283 snprintf (output_invalid_buf, sizeof (output_invalid_buf),
284 "(0x%x)", (unsigned char) c);
285 return output_invalid_buf;
288 /* next_line points to the next line after the current instruction
289 (current_line). Search for the parallel bars, and if found, merge two
290 lines into internal syntax for a parallel instruction:
291 q_[INSN1]_[INSN2] [OPERANDS1] | [OPERANDS2]
292 By this stage, all comments are scrubbed, and only the bare lines are
296 #define START_OPCODE 1
298 #define START_OPERANDS 3
299 #define END_OPERANDS 4
302 tic30_find_parallel_insn (char *current_line, char *next_line)
304 int found_parallel = 0;
305 char first_opcode[256];
306 char second_opcode[256];
307 char first_operands[256];
308 char second_operands[256];
311 debug ("In tic30_find_parallel_insn()\n");
312 while (!is_end_of_line[(unsigned char) *next_line])
314 if (*next_line == PARALLEL_SEPARATOR
315 && *(next_line + 1) == PARALLEL_SEPARATOR)
325 debug ("Found a parallel instruction\n");
329 char *op, *operands, *line;
331 for (i = 0; i < 2; i++)
335 op = &first_opcode[0];
336 operands = &first_operands[0];
341 op = &second_opcode[0];
342 operands = &second_operands[0];
347 int search_status = NONE;
351 while (!is_end_of_line[(unsigned char) (c = *line)])
353 if (is_opcode_char (c) && search_status == NONE)
355 op[char_ptr++] = TOLOWER (c);
356 search_status = START_OPCODE;
358 else if (is_opcode_char (c) && search_status == START_OPCODE)
359 op[char_ptr++] = TOLOWER (c);
360 else if (!is_opcode_char (c) && search_status == START_OPCODE)
364 search_status = END_OPCODE;
366 else if (is_operand_char (c) && search_status == START_OPERANDS)
367 operands[char_ptr++] = c;
369 if (is_operand_char (c) && search_status == END_OPCODE)
371 operands[char_ptr++] = c;
372 search_status = START_OPERANDS;
377 if (search_status != START_OPERANDS)
379 operands[char_ptr] = '\0';
383 parallel_insn = malloc (strlen (first_opcode) + strlen (first_operands)
384 + strlen (second_opcode) + strlen (second_operands) + 8);
385 sprintf (parallel_insn, "q_%s_%s %s | %s",
386 first_opcode, second_opcode,
387 first_operands, second_operands);
388 debug ("parallel insn = %s\n", parallel_insn);
389 return parallel_insn;
395 #undef START_OPERANDS
399 tic30_operand (char *token)
404 debug ("In tic30_operand with %s\n", token);
405 current_op = malloc (sizeof (* current_op));
406 memset (current_op, '\0', sizeof (operand));
408 if (*token == DIRECT_REFERENCE)
410 char *token_posn = token + 1;
411 int direct_label = 0;
413 debug ("Found direct reference\n");
416 if (!is_digit_char (*token_posn))
423 char *save_input_line_pointer;
426 debug ("Direct reference is a label\n");
427 current_op->direct.label = token + 1;
428 save_input_line_pointer = input_line_pointer;
429 input_line_pointer = token + 1;
430 debug ("Current input_line_pointer: %s\n", input_line_pointer);
431 retval = expression (¤t_op->direct.direct_expr);
433 debug ("Expression type: %d\n",
434 current_op->direct.direct_expr.X_op);
435 debug ("Expression addnum: %ld\n",
436 (long) current_op->direct.direct_expr.X_add_number);
437 debug ("Segment: %p\n", retval);
439 input_line_pointer = save_input_line_pointer;
441 if (current_op->direct.direct_expr.X_op == O_constant)
443 current_op->direct.address =
444 current_op->direct.direct_expr.X_add_number;
445 current_op->direct.resolved = 1;
450 debug ("Direct reference is a number\n");
451 current_op->direct.address = atoi (token + 1);
452 current_op->direct.resolved = 1;
454 current_op->op_type = Direct;
456 else if (*token == INDIRECT_REFERENCE)
458 /* Indirect reference operand. */
464 ind_addr_type *ind_addr_op;
467 ind_buffer = xmalloc (strlen (token));
469 debug ("Found indirect reference\n");
470 ind_buffer[0] = *token;
472 for (count = 1; count < strlen (token); count++)
475 ind_buffer[buffer_posn] = TOLOWER (*(token + count));
477 if ((*(token + count - 1) == 'a' || *(token + count - 1) == 'A')
478 && (*(token + count) == 'r' || *(token + count) == 'R'))
480 /* AR reference is found, so get its number and remove
481 it from the buffer so it can pass through hash_find(). */
484 as_bad (_("More than one AR register found in indirect reference"));
488 if (*(token + count + 1) < '0' || *(token + count + 1) > '7')
490 as_bad (_("Illegal AR register in indirect reference"));
494 ar_number = *(token + count + 1) - '0';
499 if (*(token + count) == '(')
501 /* Parenthesis found, so check if a displacement value is
502 inside. If so, get the value and remove it from the
504 if (is_digit_char (*(token + count + 1)))
511 as_bad (_("More than one displacement found in indirect reference"));
516 while (*(token + count) != ')')
518 if (!is_digit_char (*(token + count)))
520 as_bad (_("Invalid displacement in indirect reference"));
524 disp[disp_posn++] = *(token + (count++));
526 disp[disp_posn] = '\0';
527 disp_number = atoi (disp);
535 ind_buffer[buffer_posn] = '\0';
538 as_bad (_("AR register not found in indirect reference"));
543 ind_addr_op = (ind_addr_type *) hash_find (ind_hash, ind_buffer);
546 debug ("Found indirect reference: %s\n", ind_addr_op->syntax);
547 if (ind_addr_op->displacement == IMPLIED_DISP)
552 else if ((ind_addr_op->displacement == DISP_REQUIRED) && !found_disp)
554 /* Maybe an implied displacement of 1 again. */
555 as_bad (_("required displacement wasn't given in indirect reference"));
562 as_bad (_("illegal indirect reference"));
567 if (found_disp && (disp_number < 0 || disp_number > 255))
569 as_bad (_("displacement must be an unsigned 8-bit number"));
574 current_op->indirect.mod = ind_addr_op->modfield;
575 current_op->indirect.disp = disp_number;
576 current_op->indirect.ARnum = ar_number;
577 current_op->op_type = Indirect;
582 reg *regop = (reg *) hash_find (reg_hash, token);
586 debug ("Found register operand: %s\n", regop->name);
587 if (regop->regtype == REG_ARn)
588 current_op->op_type = ARn;
589 else if (regop->regtype == REG_Rn)
590 current_op->op_type = Rn;
591 else if (regop->regtype == REG_DP)
592 current_op->op_type = DPReg;
594 current_op->op_type = OtherReg;
595 current_op->reg.opcode = regop->opcode;
599 if (!is_digit_char (*token)
600 || *(token + 1) == 'x'
601 || strchr (token, 'h'))
603 char *save_input_line_pointer;
606 debug ("Probably a label: %s\n", token);
607 current_op->immediate.label = xstrdup (token);
608 save_input_line_pointer = input_line_pointer;
609 input_line_pointer = token;
611 debug ("Current input_line_pointer: %s\n", input_line_pointer);
612 retval = expression (¤t_op->immediate.imm_expr);
613 debug ("Expression type: %d\n",
614 current_op->immediate.imm_expr.X_op);
615 debug ("Expression addnum: %ld\n",
616 (long) current_op->immediate.imm_expr.X_add_number);
617 debug ("Segment: %p\n", retval);
618 input_line_pointer = save_input_line_pointer;
620 if (current_op->immediate.imm_expr.X_op == O_constant)
622 current_op->immediate.s_number
623 = current_op->immediate.imm_expr.X_add_number;
624 current_op->immediate.u_number
625 = (unsigned int) current_op->immediate.imm_expr.X_add_number;
626 current_op->immediate.resolved = 1;
631 debug ("Found a number or displacement\n");
632 for (count = 0; count < strlen (token); count++)
633 if (*(token + count) == '.')
634 current_op->immediate.decimal_found = 1;
635 current_op->immediate.label = xstrdup (token);
636 current_op->immediate.f_number = (float) atof (token);
637 current_op->immediate.s_number = (int) atoi (token);
638 current_op->immediate.u_number = (unsigned int) atoi (token);
639 current_op->immediate.resolved = 1;
641 current_op->op_type = Disp | Abs24 | Imm16 | Imm24;
642 if (current_op->immediate.u_number <= 31)
643 current_op->op_type |= IVector;
649 struct tic30_par_insn
651 partemplate *tm; /* Template of current parallel instruction. */
652 unsigned operands[2]; /* Number of given operands for each insn. */
653 /* Type of operand given in instruction. */
654 operand *operand_type[2][MAX_OPERANDS];
655 int swap_operands; /* Whether to swap operands around. */
656 unsigned p_field; /* Value of p field in multiply add/sub instructions. */
657 unsigned opcode; /* Final opcode. */
660 struct tic30_par_insn p_insn;
663 tic30_parallel_insn (char *token)
665 static partemplate *p_opcode;
666 char *current_posn = token;
670 debug ("In tic30_parallel_insn with %s\n", token);
671 memset (&p_insn, '\0', sizeof (p_insn));
673 while (is_opcode_char (*current_posn))
676 /* Find instruction. */
677 save_char = *current_posn;
678 *current_posn = '\0';
679 p_opcode = (partemplate *) hash_find (parop_hash, token);
682 debug ("Found instruction %s\n", p_opcode->name);
683 p_insn.tm = p_opcode;
687 char first_opcode[6] = {0};
688 char second_opcode[6] = {0};
690 int current_opcode = -1;
693 for (i = 0; i < strlen (token); i++)
695 char ch = *(token + i);
697 if (ch == '_' && current_opcode == -1)
703 if (ch == '_' && current_opcode == 0)
710 switch (current_opcode)
713 first_opcode[char_ptr++] = ch;
716 second_opcode[char_ptr++] = ch;
721 debug ("first_opcode = %s\n", first_opcode);
722 debug ("second_opcode = %s\n", second_opcode);
723 sprintf (token, "q_%s_%s", second_opcode, first_opcode);
724 p_opcode = (partemplate *) hash_find (parop_hash, token);
728 debug ("Found instruction %s\n", p_opcode->name);
729 p_insn.tm = p_opcode;
730 p_insn.swap_operands = 1;
735 *current_posn = save_char;
740 int paren_not_balanced;
741 int expecting_operand = 0;
742 int found_separator = 0;
746 /* Skip optional white space before operand. */
747 while (!is_operand_char (*current_posn)
748 && *current_posn != END_OF_INSN)
750 if (!is_space_char (*current_posn)
751 && *current_posn != PARALLEL_SEPARATOR)
753 as_bad (_("Invalid character %s before %s operand"),
754 output_invalid (*current_posn),
755 ordinal_names[insn.operands]);
758 if (*current_posn == PARALLEL_SEPARATOR)
763 token_start = current_posn;
764 paren_not_balanced = 0;
766 while (paren_not_balanced || *current_posn != ',')
768 if (*current_posn == END_OF_INSN)
770 if (paren_not_balanced)
772 as_bad (_("Unbalanced parenthesis in %s operand."),
773 ordinal_names[insn.operands]);
779 else if (*current_posn == PARALLEL_SEPARATOR)
781 while (is_space_char (*(current_posn - 1)))
785 else if (!is_operand_char (*current_posn)
786 && !is_space_char (*current_posn))
788 as_bad (_("Invalid character %s in %s operand"),
789 output_invalid (*current_posn),
790 ordinal_names[insn.operands]);
794 if (*current_posn == '(')
795 ++paren_not_balanced;
796 if (*current_posn == ')')
797 --paren_not_balanced;
801 if (current_posn != token_start)
803 /* Yes, we've read in another operand. */
804 p_insn.operands[found_separator]++;
805 if (p_insn.operands[found_separator] > MAX_OPERANDS)
807 as_bad (_("Spurious operands; (%d operands/instruction max)"),
812 /* Now parse operand adding info to 'insn' as we go along. */
813 save_char = *current_posn;
814 *current_posn = '\0';
815 p_insn.operand_type[found_separator][p_insn.operands[found_separator] - 1] =
816 tic30_operand (token_start);
817 *current_posn = save_char;
818 if (!p_insn.operand_type[found_separator][p_insn.operands[found_separator] - 1])
823 if (expecting_operand)
825 as_bad (_("Expecting operand after ','; got nothing"));
828 if (*current_posn == ',')
830 as_bad (_("Expecting operand before ','; got nothing"));
835 /* Now *current_posn must be either ',' or END_OF_INSN. */
836 if (*current_posn == ',')
838 if (*++current_posn == END_OF_INSN)
840 /* Just skip it, if it's \n complain. */
841 as_bad (_("Expecting operand after ','; got nothing"));
844 expecting_operand = 1;
847 while (*current_posn != END_OF_INSN);
850 if (p_insn.swap_operands)
855 temp_num = p_insn.operands[0];
856 p_insn.operands[0] = p_insn.operands[1];
857 p_insn.operands[1] = temp_num;
858 for (i = 0; i < MAX_OPERANDS; i++)
860 temp_op = p_insn.operand_type[0][i];
861 p_insn.operand_type[0][i] = p_insn.operand_type[1][i];
862 p_insn.operand_type[1][i] = temp_op;
866 if (p_insn.operands[0] != p_insn.tm->operands_1)
868 as_bad (_("incorrect number of operands given in the first instruction"));
872 if (p_insn.operands[1] != p_insn.tm->operands_2)
874 as_bad (_("incorrect number of operands given in the second instruction"));
878 debug ("Number of operands in first insn: %d\n", p_insn.operands[0]);
879 debug ("Number of operands in second insn: %d\n", p_insn.operands[1]);
882 /* Now check if operands are correct. */
887 for (count = 0; count < 2; count++)
890 for (i = 0; i < p_insn.operands[count]; i++)
892 if ((p_insn.operand_type[count][i]->op_type &
893 p_insn.tm->operand_types[count][i]) == 0)
895 as_bad (_("%s instruction, operand %d doesn't match"),
896 ordinal_names[count], i + 1);
900 /* Get number of R register and indirect reference contained
901 within the first two operands of each instruction. This is
902 required for the multiply parallel instructions which require
903 two R registers and two indirect references, but not in any
905 if ((p_insn.operand_type[count][i]->op_type & Rn) && i < 2)
907 else if ((p_insn.operand_type[count][i]->op_type & Indirect)
913 if ((p_insn.tm->operand_types[0][0] & (Indirect | Rn))
916 /* Check for the multiply instructions. */
919 as_bad (_("incorrect format for multiply parallel instruction"));
925 /* Shouldn't get here. */
926 as_bad (_("incorrect format for multiply parallel instruction"));
930 if ((p_insn.operand_type[0][2]->reg.opcode != 0x00)
931 && (p_insn.operand_type[0][2]->reg.opcode != 0x01))
933 as_bad (_("destination for multiply can only be R0 or R1"));
937 if ((p_insn.operand_type[1][2]->reg.opcode != 0x02)
938 && (p_insn.operand_type[1][2]->reg.opcode != 0x03))
940 as_bad (_("destination for add/subtract can only be R2 or R3"));
944 /* Now determine the P field for the instruction. */
945 if (p_insn.operand_type[0][0]->op_type & Indirect)
947 if (p_insn.operand_type[0][1]->op_type & Indirect)
948 p_insn.p_field = 0x00000000; /* Ind * Ind, Rn +/- Rn. */
949 else if (p_insn.operand_type[1][0]->op_type & Indirect)
950 p_insn.p_field = 0x01000000; /* Ind * Rn, Ind +/- Rn. */
952 p_insn.p_field = 0x03000000; /* Ind * Rn, Rn +/- Ind. */
956 if (p_insn.operand_type[0][1]->op_type & Rn)
957 p_insn.p_field = 0x02000000; /* Rn * Rn, Ind +/- Ind. */
958 else if (p_insn.operand_type[1][0]->op_type & Indirect)
961 p_insn.p_field = 0x01000000; /* Rn * Ind, Ind +/- Rn. */
962 /* Need to swap the two multiply operands around so that
963 everything is in its place for the opcode makeup.
964 ie so Ind * Rn, Ind +/- Rn. */
965 temp = p_insn.operand_type[0][0];
966 p_insn.operand_type[0][0] = p_insn.operand_type[0][1];
967 p_insn.operand_type[0][1] = temp;
972 p_insn.p_field = 0x03000000; /* Rn * Ind, Rn +/- Ind. */
973 temp = p_insn.operand_type[0][0];
974 p_insn.operand_type[0][0] = p_insn.operand_type[0][1];
975 p_insn.operand_type[0][1] = temp;
981 debug ("P field: %08X\n", p_insn.p_field);
983 /* Finalise opcode. This is easier for parallel instructions as they have
984 to be fully resolved, there are no memory addresses allowed, except
985 through indirect addressing, so there are no labels to resolve. */
986 p_insn.opcode = p_insn.tm->base_opcode;
988 switch (p_insn.tm->oporder)
991 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum);
992 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 3);
993 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum << 8);
994 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 11);
995 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
996 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 22);
1000 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum);
1001 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 3);
1002 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.ARnum << 8);
1003 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.mod << 11);
1004 p_insn.opcode |= (p_insn.operand_type[1][1]->reg.opcode << 19);
1005 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 22);
1006 if (p_insn.operand_type[1][1]->reg.opcode == p_insn.operand_type[0][1]->reg.opcode)
1007 as_warn (_("loading the same register in parallel operation"));
1011 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.ARnum);
1012 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.mod << 3);
1013 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum << 8);
1014 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 11);
1015 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
1016 p_insn.opcode |= (p_insn.operand_type[0][0]->reg.opcode << 22);
1020 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum);
1021 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 3);
1022 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum << 8);
1023 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 11);
1024 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
1025 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 19);
1026 p_insn.opcode |= (p_insn.operand_type[0][2]->reg.opcode << 22);
1030 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.ARnum);
1031 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.mod << 3);
1032 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum << 8);
1033 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 11);
1034 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
1035 p_insn.opcode |= (p_insn.operand_type[0][0]->reg.opcode << 19);
1036 p_insn.opcode |= (p_insn.operand_type[0][2]->reg.opcode << 22);
1040 p_insn.opcode |= p_insn.p_field;
1041 if (p_insn.operand_type[0][2]->reg.opcode == 0x01)
1042 p_insn.opcode |= 0x00800000;
1043 if (p_insn.operand_type[1][2]->reg.opcode == 0x03)
1044 p_insn.opcode |= 0x00400000;
1046 switch (p_insn.p_field)
1049 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.ARnum);
1050 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.mod << 3);
1051 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum << 8);
1052 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 11);
1053 p_insn.opcode |= (p_insn.operand_type[1][1]->reg.opcode << 16);
1054 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 19);
1057 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.ARnum);
1058 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.mod << 3);
1059 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum << 8);
1060 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 11);
1061 p_insn.opcode |= (p_insn.operand_type[1][1]->reg.opcode << 16);
1062 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 19);
1065 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum);
1066 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 3);
1067 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.ARnum << 8);
1068 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.mod << 11);
1069 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 16);
1070 p_insn.opcode |= (p_insn.operand_type[0][0]->reg.opcode << 19);
1073 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum);
1074 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 3);
1075 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum << 8);
1076 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 11);
1077 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
1078 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 19);
1087 p = frag_more (INSN_SIZE);
1088 md_number_to_chars (p, (valueT) p_insn.opcode, INSN_SIZE);
1094 for (i = 0; i < 2; i++)
1095 for (j = 0; j < p_insn.operands[i]; j++)
1096 free (p_insn.operand_type[i][j]);
1099 debug ("Final opcode: %08X\n", p_insn.opcode);
1105 /* In order to get gas to ignore any | chars at the start of a line,
1106 this function returns true if a | is found in a line. */
1109 tic30_unrecognized_line (int c)
1111 debug ("In tc_unrecognized_line\n");
1112 return (c == PARALLEL_SEPARATOR);
1116 md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
1117 segT segment ATTRIBUTE_UNUSED)
1119 debug ("In md_estimate_size_before_relax()\n");
1124 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
1125 segT sec ATTRIBUTE_UNUSED,
1126 fragS *fragP ATTRIBUTE_UNUSED)
1128 debug ("In md_convert_frag()\n");
1132 md_apply_fix (fixS *fixP,
1134 segT seg ATTRIBUTE_UNUSED)
1136 valueT value = *valP;
1138 debug ("In md_apply_fix() with value = %ld\n", (long) value);
1139 debug ("Values in fixP\n");
1140 debug ("fx_size = %d\n", fixP->fx_size);
1141 debug ("fx_pcrel = %d\n", fixP->fx_pcrel);
1142 debug ("fx_where = %ld\n", fixP->fx_where);
1143 debug ("fx_offset = %d\n", (int) fixP->fx_offset);
1145 char *buf = fixP->fx_frag->fr_literal + fixP->fx_where;
1148 if (fixP->fx_size == 1)
1149 /* Special fix for LDP instruction. */
1150 value = (value & 0x00FF0000) >> 16;
1152 debug ("new value = %ld\n", (long) value);
1153 md_number_to_chars (buf, value, fixP->fx_size);
1156 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1161 md_parse_option (int c ATTRIBUTE_UNUSED,
1162 const char *arg ATTRIBUTE_UNUSED)
1164 debug ("In md_parse_option()\n");
1169 md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
1171 debug ("In md_show_usage()\n");
1175 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1177 debug ("In md_undefined_symbol()\n");
1178 return (symbolS *) 0;
1182 md_section_align (segT segment, valueT size)
1184 debug ("In md_section_align() segment = %p and size = %lu\n",
1185 segment, (unsigned long) size);
1186 size = (size + 3) / 4;
1188 debug ("New size value = %lu\n", (unsigned long) size);
1193 md_pcrel_from (fixS *fixP)
1197 debug ("In md_pcrel_from()\n");
1198 debug ("fx_where = %ld\n", fixP->fx_where);
1199 debug ("fx_size = %d\n", fixP->fx_size);
1200 /* Find the opcode that represents the current instruction in the
1201 fr_literal storage area, and check bit 21. Bit 21 contains whether the
1202 current instruction is a delayed one or not, and then set the offset
1203 value appropriately. */
1204 if (fixP->fx_frag->fr_literal[fixP->fx_where - fixP->fx_size + 1] & 0x20)
1208 debug ("offset = %d\n", offset);
1209 /* PC Relative instructions have a format:
1210 displacement = Label - (PC + offset)
1211 This function returns PC + offset where:
1212 fx_where - fx_size = PC
1213 INSN_SIZE * offset = offset number of instructions. */
1214 return fixP->fx_where - fixP->fx_size + (INSN_SIZE * offset);
1218 md_atof (int what_statement_type,
1225 unsigned long value;
1228 debug ("In md_atof()\n");
1229 debug ("precision = %c\n", what_statement_type);
1230 debug ("literal = %s\n", literalP);
1232 token = input_line_pointer;
1233 while (!is_end_of_line[(unsigned char) *input_line_pointer]
1234 && (*input_line_pointer != ','))
1236 debug ("%c", *input_line_pointer);
1237 input_line_pointer++;
1240 keepval = *input_line_pointer;
1241 *input_line_pointer = '\0';
1243 float_value = (float) atof (token);
1244 *input_line_pointer = keepval;
1245 debug ("float_value = %f\n", float_value);
1247 switch (what_statement_type)
1265 return _("Unrecognized or unsupported floating point constant");
1268 if (float_value == 0.0)
1269 value = (prec == 2) ? 0x00008000L : 0x80000000L;
1272 unsigned long exp, sign, mant, tmsfloat;
1280 converter.f = float_value;
1281 tmsfloat = converter.l;
1282 sign = tmsfloat & 0x80000000;
1283 mant = tmsfloat & 0x007FFFFF;
1284 exp = tmsfloat & 0x7F800000;
1286 if (exp == 0xFF000000)
1300 mant = mant & 0x007FFFFF;
1302 mant = mant & 0x00FFFFFF;
1306 exp = (long) exp - 0x01000000;
1309 tmsfloat = exp | mant;
1316 if (tmsfloat == 0x80000000)
1321 expon = (tmsfloat & 0xFF000000);
1323 mantis = tmsfloat & 0x007FFFFF;
1324 if (tmsfloat & 0x00800000)
1326 mantis |= 0xFF000000;
1327 mantis += 0x00000800;
1329 mantis |= 0x00000800;
1336 mantis |= 0x00800000;
1337 mantis += 0x00000800;
1338 expon += (mantis >> 24);
1348 mantis = (expon << 12) | mantis;
1349 value = mantis & 0xFFFF;
1354 md_number_to_chars (literalP, value, prec);
1360 md_number_to_chars (char *buf, valueT val, int n)
1362 debug ("In md_number_to_chars()\n");
1363 number_to_chars_bigendian (buf, val, n);
1366 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
1367 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
1370 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixP)
1373 bfd_reloc_code_real_type code = 0;
1375 debug ("In tc_gen_reloc()\n");
1376 debug ("fixP.size = %d\n", fixP->fx_size);
1377 debug ("fixP.pcrel = %d\n", fixP->fx_pcrel);
1378 debug ("addsy.name = %s\n", S_GET_NAME (fixP->fx_addsy));
1380 switch (F (fixP->fx_size, fixP->fx_pcrel))
1382 MAP (1, 0, BFD_RELOC_TIC30_LDP);
1383 MAP (2, 0, BFD_RELOC_16);
1384 MAP (3, 0, BFD_RELOC_24);
1385 MAP (2, 1, BFD_RELOC_16_PCREL);
1386 MAP (4, 0, BFD_RELOC_32);
1388 as_bad (_("Can not do %d byte %srelocation"), fixP->fx_size,
1389 fixP->fx_pcrel ? _("pc-relative ") : "");
1394 rel = xmalloc (sizeof (* rel));
1395 gas_assert (rel != 0);
1396 rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1397 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
1398 rel->address = fixP->fx_frag->fr_address + fixP->fx_where;
1400 rel->howto = bfd_reloc_type_lookup (stdoutput, code);
1405 name = S_GET_NAME (fixP->fx_addsy);
1408 as_fatal ("Cannot generate relocation type for symbol %s, code %s",
1409 name, bfd_get_reloc_code_name (code));
1415 md_operand (expressionS *expressionP ATTRIBUTE_UNUSED)
1417 debug ("In md_operand()\n");
1421 md_assemble (char *line)
1429 debug ("In md_assemble() with argument %s\n", line);
1430 memset (&insn, '\0', sizeof (insn));
1431 if (found_parallel_insn)
1433 debug ("Line is second part of parallel instruction\n\n");
1434 found_parallel_insn = 0;
1438 tic30_find_parallel_insn (line, input_line_pointer + 1)) == NULL)
1439 current_posn = line;
1441 found_parallel_insn = 1;
1443 while (is_space_char (*current_posn))
1446 token_start = current_posn;
1448 if (!is_opcode_char (*current_posn))
1450 as_bad (_("Invalid character %s in opcode"),
1451 output_invalid (*current_posn));
1454 /* Check if instruction is a parallel instruction
1455 by seeing if the first character is a q. */
1456 if (*token_start == 'q')
1458 if (tic30_parallel_insn (token_start))
1460 if (found_parallel_insn)
1465 while (is_opcode_char (*current_posn))
1468 /* Find instruction. */
1469 save_char = *current_posn;
1470 *current_posn = '\0';
1471 op = (insn_template *) hash_find (op_hash, token_start);
1474 debug ("Found instruction %s\n", op->name);
1479 debug ("Didn't find insn\n");
1480 as_bad (_("Unknown TMS320C30 instruction: %s"), token_start);
1483 *current_posn = save_char;
1486 if (*current_posn != END_OF_INSN)
1488 /* Find operands. */
1489 int paren_not_balanced;
1490 int expecting_operand = 0;
1494 /* Skip optional white space before operand. */
1495 while (!is_operand_char (*current_posn)
1496 && *current_posn != END_OF_INSN)
1498 if (!is_space_char (*current_posn))
1500 as_bad (_("Invalid character %s before %s operand"),
1501 output_invalid (*current_posn),
1502 ordinal_names[insn.operands]);
1507 token_start = current_posn;
1508 paren_not_balanced = 0;
1509 while (paren_not_balanced || *current_posn != ',')
1511 if (*current_posn == END_OF_INSN)
1513 if (paren_not_balanced)
1515 as_bad (_("Unbalanced parenthesis in %s operand."),
1516 ordinal_names[insn.operands]);
1522 else if (!is_operand_char (*current_posn)
1523 && !is_space_char (*current_posn))
1525 as_bad (_("Invalid character %s in %s operand"),
1526 output_invalid (*current_posn),
1527 ordinal_names[insn.operands]);
1530 if (*current_posn == '(')
1531 ++paren_not_balanced;
1532 if (*current_posn == ')')
1533 --paren_not_balanced;
1536 if (current_posn != token_start)
1538 /* Yes, we've read in another operand. */
1539 this_operand = insn.operands++;
1540 if (insn.operands > MAX_OPERANDS)
1542 as_bad (_("Spurious operands; (%d operands/instruction max)"),
1547 /* Now parse operand adding info to 'insn' as we go along. */
1548 save_char = *current_posn;
1549 *current_posn = '\0';
1550 insn.operand_type[this_operand] = tic30_operand (token_start);
1551 *current_posn = save_char;
1552 if (insn.operand_type[this_operand] == NULL)
1557 if (expecting_operand)
1559 as_bad (_("Expecting operand after ','; got nothing"));
1562 if (*current_posn == ',')
1564 as_bad (_("Expecting operand before ','; got nothing"));
1569 /* Now *current_posn must be either ',' or END_OF_INSN. */
1570 if (*current_posn == ',')
1572 if (*++current_posn == END_OF_INSN)
1574 /* Just skip it, if it's \n complain. */
1575 as_bad (_("Expecting operand after ','; got nothing"));
1578 expecting_operand = 1;
1581 while (*current_posn != END_OF_INSN);
1584 debug ("Number of operands found: %d\n", insn.operands);
1586 /* Check that number of operands is correct. */
1587 if (insn.operands != insn.tm->operands)
1590 unsigned int numops = insn.tm->operands;
1592 /* If operands are not the same, then see if any of the operands are
1593 not required. Then recheck with number of given operands. If they
1594 are still not the same, then give an error, otherwise carry on. */
1595 for (i = 0; i < insn.tm->operands; i++)
1596 if (insn.tm->operand_types[i] & NotReq)
1598 if (insn.operands != numops)
1600 as_bad (_("Incorrect number of operands given"));
1604 insn.addressing_mode = AM_NotReq;
1605 for (count = 0; count < insn.operands; count++)
1607 if (insn.operand_type[count]->op_type & insn.tm->operand_types[count])
1609 debug ("Operand %d matches\n", count + 1);
1610 /* If instruction has two operands and has an AddressMode
1611 modifier then set addressing mode type for instruction. */
1612 if (insn.tm->opcode_modifier == AddressMode)
1615 /* Store instruction uses the second
1616 operand for the address mode. */
1617 if ((insn.tm->operand_types[1] & (Indirect | Direct))
1618 == (Indirect | Direct))
1621 if (insn.operand_type[addr_insn]->op_type & (AllReg))
1622 insn.addressing_mode = AM_Register;
1623 else if (insn.operand_type[addr_insn]->op_type & Direct)
1624 insn.addressing_mode = AM_Direct;
1625 else if (insn.operand_type[addr_insn]->op_type & Indirect)
1626 insn.addressing_mode = AM_Indirect;
1628 insn.addressing_mode = AM_Immediate;
1633 as_bad (_("The %s operand doesn't match"), ordinal_names[count]);
1638 /* Now set the addressing mode for 3 operand instructions. */
1639 if ((insn.tm->operand_types[0] & op3T1)
1640 && (insn.tm->operand_types[1] & op3T2))
1642 /* Set the addressing mode to the values used for 2 operand
1643 instructions in the G addressing field of the opcode. */
1645 switch (insn.operand_type[0]->op_type)
1651 if (insn.operand_type[1]->op_type & (AllReg))
1652 insn.addressing_mode = AM_Register;
1653 else if (insn.operand_type[1]->op_type & Indirect)
1654 insn.addressing_mode = AM_Direct;
1657 /* Shouldn't make it to this stage. */
1658 as_bad (_("Incompatible first and second operands in instruction"));
1663 if (insn.operand_type[1]->op_type & (AllReg))
1664 insn.addressing_mode = AM_Indirect;
1665 else if (insn.operand_type[1]->op_type & Indirect)
1666 insn.addressing_mode = AM_Immediate;
1669 /* Shouldn't make it to this stage. */
1670 as_bad (_("Incompatible first and second operands in instruction"));
1675 /* Now make up the opcode for the 3 operand instructions. As in
1676 parallel instructions, there will be no unresolved values, so they
1677 can be fully formed and added to the frag table. */
1678 insn.opcode = insn.tm->base_opcode;
1679 if (insn.operand_type[0]->op_type & Indirect)
1681 insn.opcode |= (insn.operand_type[0]->indirect.ARnum);
1682 insn.opcode |= (insn.operand_type[0]->indirect.mod << 3);
1685 insn.opcode |= (insn.operand_type[0]->reg.opcode);
1687 if (insn.operand_type[1]->op_type & Indirect)
1689 insn.opcode |= (insn.operand_type[1]->indirect.ARnum << 8);
1690 insn.opcode |= (insn.operand_type[1]->indirect.mod << 11);
1693 insn.opcode |= (insn.operand_type[1]->reg.opcode << 8);
1695 if (insn.operands == 3)
1696 insn.opcode |= (insn.operand_type[2]->reg.opcode << 16);
1698 insn.opcode |= insn.addressing_mode;
1699 p = frag_more (INSN_SIZE);
1700 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1704 /* Not a three operand instruction. */
1707 insn.opcode = insn.tm->base_opcode;
1708 /* Create frag for instruction - all instructions are 4 bytes long. */
1709 p = frag_more (INSN_SIZE);
1710 if ((insn.operands > 0) && (insn.tm->opcode_modifier == AddressMode))
1712 insn.opcode |= insn.addressing_mode;
1713 if (insn.addressing_mode == AM_Indirect)
1715 /* Determine which operand gives the addressing mode. */
1716 if (insn.operand_type[0]->op_type & Indirect)
1718 if ((insn.operands > 1)
1719 && (insn.operand_type[1]->op_type & Indirect))
1721 insn.opcode |= (insn.operand_type[am_insn]->indirect.disp);
1722 insn.opcode |= (insn.operand_type[am_insn]->indirect.ARnum << 8);
1723 insn.opcode |= (insn.operand_type[am_insn]->indirect.mod << 11);
1724 if (insn.operands > 1)
1725 insn.opcode |= (insn.operand_type[!am_insn]->reg.opcode << 16);
1726 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1728 else if (insn.addressing_mode == AM_Register)
1730 insn.opcode |= (insn.operand_type[0]->reg.opcode);
1731 if (insn.operands > 1)
1732 insn.opcode |= (insn.operand_type[1]->reg.opcode << 16);
1733 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1735 else if (insn.addressing_mode == AM_Direct)
1737 if (insn.operand_type[0]->op_type & Direct)
1739 if ((insn.operands > 1)
1740 && (insn.operand_type[1]->op_type & Direct))
1742 if (insn.operands > 1)
1744 (insn.operand_type[! am_insn]->reg.opcode << 16);
1745 if (insn.operand_type[am_insn]->direct.resolved == 1)
1747 /* Resolved values can be placed straight
1748 into instruction word, and output. */
1750 (insn.operand_type[am_insn]->direct.address & 0x0000FFFF);
1751 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1755 /* Unresolved direct addressing mode instruction. */
1756 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1757 fix_new_exp (frag_now, p + 2 - (frag_now->fr_literal), 2,
1758 & insn.operand_type[am_insn]->direct.direct_expr,
1762 else if (insn.addressing_mode == AM_Immediate)
1764 if (insn.operand_type[0]->immediate.resolved == 1)
1769 if (insn.operands > 1)
1770 insn.opcode |= (insn.operand_type[1]->reg.opcode << 16);
1772 switch (insn.tm->imm_arg_type)
1775 debug ("Floating point first operand\n");
1776 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1778 keeploc = input_line_pointer;
1779 input_line_pointer =
1780 insn.operand_type[0]->immediate.label;
1782 if (md_atof ('f', p + 2, & size) != 0)
1784 as_bad (_("invalid short form floating point immediate operand"));
1788 input_line_pointer = keeploc;
1792 debug ("Unsigned int first operand\n");
1793 if (insn.operand_type[0]->immediate.decimal_found)
1794 as_warn (_("rounding down first operand float to unsigned int"));
1795 if (insn.operand_type[0]->immediate.u_number > 0xFFFF)
1796 as_warn (_("only lower 16-bits of first operand are used"));
1798 (insn.operand_type[0]->immediate.u_number & 0x0000FFFFL);
1799 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1803 debug ("Int first operand\n");
1805 if (insn.operand_type[0]->immediate.decimal_found)
1806 as_warn (_("rounding down first operand float to signed int"));
1808 if (insn.operand_type[0]->immediate.s_number < -32768 ||
1809 insn.operand_type[0]->immediate.s_number > 32767)
1811 as_bad (_("first operand is too large for 16-bit signed int"));
1815 (insn.operand_type[0]->immediate.s_number & 0x0000FFFFL);
1816 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1822 /* Unresolved immediate label. */
1823 if (insn.operands > 1)
1824 insn.opcode |= (insn.operand_type[1]->reg.opcode << 16);
1825 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1826 fix_new_exp (frag_now, p + 2 - (frag_now->fr_literal), 2,
1827 & insn.operand_type[0]->immediate.imm_expr,
1832 else if (insn.tm->opcode_modifier == PCRel)
1834 /* Conditional Branch and Call instructions. */
1835 if ((insn.tm->operand_types[0] & (AllReg | Disp))
1838 if (insn.operand_type[0]->op_type & (AllReg))
1840 insn.opcode |= (insn.operand_type[0]->reg.opcode);
1841 insn.opcode |= PC_Register;
1842 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1846 insn.opcode |= PC_Relative;
1847 if (insn.operand_type[0]->immediate.resolved == 1)
1850 (insn.operand_type[0]->immediate.s_number & 0x0000FFFF);
1851 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1855 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1856 fix_new_exp (frag_now, p + 2 - (frag_now->fr_literal),
1857 2, & insn.operand_type[0]->immediate.imm_expr,
1862 else if ((insn.tm->operand_types[0] & ARn) == ARn)
1864 /* Decrement and Branch instructions. */
1865 insn.opcode |= ((insn.operand_type[0]->reg.opcode - 0x08) << 22);
1866 if (insn.operand_type[1]->op_type & (AllReg))
1868 insn.opcode |= (insn.operand_type[1]->reg.opcode);
1869 insn.opcode |= PC_Register;
1870 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1872 else if (insn.operand_type[1]->immediate.resolved == 1)
1874 if (insn.operand_type[0]->immediate.decimal_found)
1876 as_bad (_("first operand is floating point"));
1879 if (insn.operand_type[0]->immediate.s_number < -32768 ||
1880 insn.operand_type[0]->immediate.s_number > 32767)
1882 as_bad (_("first operand is too large for 16-bit signed int"));
1885 insn.opcode |= (insn.operand_type[1]->immediate.s_number);
1886 insn.opcode |= PC_Relative;
1887 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1891 insn.opcode |= PC_Relative;
1892 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1893 fix_new_exp (frag_now, p + 2 - frag_now->fr_literal, 2,
1894 & insn.operand_type[1]->immediate.imm_expr,
1899 else if (insn.tm->operand_types[0] == IVector)
1901 /* Trap instructions. */
1902 if (insn.operand_type[0]->op_type & IVector)
1903 insn.opcode |= (insn.operand_type[0]->immediate.u_number);
1906 /* Shouldn't get here. */
1907 as_bad (_("interrupt vector for trap instruction out of range"));
1910 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1912 else if (insn.tm->opcode_modifier == StackOp
1913 || insn.tm->opcode_modifier == Rotate)
1915 /* Push, Pop and Rotate instructions. */
1916 insn.opcode |= (insn.operand_type[0]->reg.opcode << 16);
1917 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1919 else if ((insn.tm->operand_types[0] & (Abs24 | Direct))
1920 == (Abs24 | Direct))
1922 /* LDP Instruction needs to be tested
1923 for before the next section. */
1924 if (insn.operand_type[0]->op_type & Direct)
1926 if (insn.operand_type[0]->direct.resolved == 1)
1928 /* Direct addressing uses lower 8 bits of direct address. */
1930 (insn.operand_type[0]->direct.address & 0x00FF0000) >> 16;
1931 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1937 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1938 fix = fix_new_exp (frag_now, p + 3 - (frag_now->fr_literal),
1939 1, &insn.operand_type[0]->direct.direct_expr, 0, 0);
1940 /* Ensure that the assembler doesn't complain
1941 about fitting a 24-bit address into 8 bits. */
1942 fix->fx_no_overflow = 1;
1947 if (insn.operand_type[0]->immediate.resolved == 1)
1949 /* Immediate addressing uses upper 8 bits of address. */
1950 if (insn.operand_type[0]->immediate.u_number > 0x00FFFFFF)
1952 as_bad (_("LDP instruction needs a 24-bit operand"));
1956 ((insn.operand_type[0]->immediate.u_number & 0x00FF0000) >> 16);
1957 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1962 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1963 fix = fix_new_exp (frag_now, p + 3 - (frag_now->fr_literal),
1964 1, &insn.operand_type[0]->immediate.imm_expr,
1966 fix->fx_no_overflow = 1;
1970 else if (insn.tm->operand_types[0] & (Imm24))
1972 /* Unconditional Branch and Call instructions. */
1973 if (insn.operand_type[0]->immediate.resolved == 1)
1975 if (insn.operand_type[0]->immediate.u_number > 0x00FFFFFF)
1976 as_warn (_("first operand is too large for a 24-bit displacement"));
1978 (insn.operand_type[0]->immediate.u_number & 0x00FFFFFF);
1979 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1983 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1984 fix_new_exp (frag_now, p + 1 - (frag_now->fr_literal), 3,
1985 & insn.operand_type[0]->immediate.imm_expr, 0, 0);
1988 else if (insn.tm->operand_types[0] & NotReq)
1989 /* Check for NOP instruction without arguments. */
1990 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1992 else if (insn.tm->operands == 0)
1993 /* Check for instructions without operands. */
1994 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1996 debug ("Addressing mode: %08X\n", insn.addressing_mode);
2000 for (i = 0; i < insn.operands; i++)
2002 if (insn.operand_type[i]->immediate.label)
2003 free (insn.operand_type[i]->immediate.label);
2004 free (insn.operand_type[i]);
2007 debug ("Final opcode: %08X\n", insn.opcode);