1 /* tc-c30.c -- Assembly code for the Texas Instruments TMS320C30
2 Copyright (C) 1998-2018 Free Software Foundation, Inc.
3 Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 /* Texas Instruments TMS320C30 machine specific gas.
23 Written by Steven Haworth (steve@pm.cse.rmit.edu.au).
24 Bugs & suggestions are completely welcome. This is free software.
25 Please help us make it better. */
28 #include "safe-ctype.h"
29 #include "opcode/tic30.h"
31 /* Put here all non-digit non-letter characters that may occur in an
33 static char operand_special_chars[] = "%$-+(,)*._~/<>&^!:[@]";
34 static const char *ordinal_names[] =
36 N_("first"), N_("second"), N_("third"), N_("fourth"), N_("fifth")
39 const char comment_chars[] = ";";
40 const char line_comment_chars[] = "*";
41 const char line_separator_chars[] = "";
43 const char *md_shortopts = "";
44 struct option md_longopts[] =
46 {NULL, no_argument, NULL, 0}
49 size_t md_longopts_size = sizeof (md_longopts);
51 /* Chars that mean this number is a floating point constant.
54 const char FLT_CHARS[] = "fFdDxX";
56 /* Chars that can be used to separate mant from exp in floating point
58 const char EXP_CHARS[] = "eE";
60 /* Tables for lexical analysis. */
61 static char opcode_chars[256];
62 static char register_chars[256];
63 static char operand_chars[256];
64 static char space_chars[256];
65 static char identifier_chars[256];
66 static char digit_chars[256];
69 #define is_opcode_char(x) (opcode_chars [(unsigned char) x])
70 #define is_operand_char(x) (operand_chars [(unsigned char) x])
71 #define is_register_char(x) (register_chars [(unsigned char) x])
72 #define is_space_char(x) (space_chars [(unsigned char) x])
73 #define is_identifier_char(x) (identifier_chars [(unsigned char) x])
74 #define is_digit_char(x) (digit_chars [(unsigned char) x])
76 const pseudo_typeS md_pseudo_table[] =
81 static int ATTRIBUTE_PRINTF_1
82 debug (const char *string, ...)
89 va_start (argptr, string);
90 vsprintf (str, string, argptr);
94 fputs (str, USE_STDOUT ? stdout : stderr);
101 /* Hash table for opcode lookup. */
102 static struct hash_control *op_hash;
103 /* Hash table for parallel opcode lookup. */
104 static struct hash_control *parop_hash;
105 /* Hash table for register lookup. */
106 static struct hash_control *reg_hash;
107 /* Hash table for indirect addressing lookup. */
108 static struct hash_control *ind_hash;
113 const char *hash_err;
115 debug ("In md_begin()\n");
116 op_hash = hash_new ();
119 const insn_template *current_optab = tic30_optab;
121 for (; current_optab < tic30_optab_end; current_optab++)
123 hash_err = hash_insert (op_hash, current_optab->name,
124 (char *) current_optab);
126 as_fatal ("Internal Error: Can't Hash %s: %s",
127 current_optab->name, hash_err);
131 parop_hash = hash_new ();
134 const partemplate *current_parop = tic30_paroptab;
136 for (; current_parop < tic30_paroptab_end; current_parop++)
138 hash_err = hash_insert (parop_hash, current_parop->name,
139 (char *) current_parop);
141 as_fatal ("Internal Error: Can't Hash %s: %s",
142 current_parop->name, hash_err);
146 reg_hash = hash_new ();
149 const reg *current_reg = tic30_regtab;
151 for (; current_reg < tic30_regtab_end; current_reg++)
153 hash_err = hash_insert (reg_hash, current_reg->name,
154 (char *) current_reg);
156 as_fatal ("Internal Error: Can't Hash %s: %s",
157 current_reg->name, hash_err);
161 ind_hash = hash_new ();
164 const ind_addr_type *current_ind = tic30_indaddr_tab;
166 for (; current_ind < tic30_indaddrtab_end; current_ind++)
168 hash_err = hash_insert (ind_hash, current_ind->syntax,
169 (char *) current_ind);
171 as_fatal ("Internal Error: Can't Hash %s: %s",
172 current_ind->syntax, hash_err);
176 /* Fill in lexical tables: opcode_chars, operand_chars, space_chars. */
181 for (c = 0; c < 256; c++)
183 if (ISLOWER (c) || ISDIGIT (c))
186 register_chars[c] = c;
188 else if (ISUPPER (c))
190 opcode_chars[c] = TOLOWER (c);
191 register_chars[c] = opcode_chars[c];
193 else if (c == ')' || c == '(')
194 register_chars[c] = c;
196 if (ISUPPER (c) || ISLOWER (c) || ISDIGIT (c))
197 operand_chars[c] = c;
199 if (ISDIGIT (c) || c == '-')
202 if (ISALPHA (c) || c == '_' || c == '.' || ISDIGIT (c))
203 identifier_chars[c] = c;
205 if (c == ' ' || c == '\t')
211 for (p = operand_special_chars; *p != '\0'; p++)
212 operand_chars[(unsigned char) *p] = *p;
216 /* Address Mode OR values. */
217 #define AM_Register 0x00000000
218 #define AM_Direct 0x00200000
219 #define AM_Indirect 0x00400000
220 #define AM_Immediate 0x00600000
221 #define AM_NotReq 0xFFFFFFFF
223 /* PC Relative OR values. */
224 #define PC_Register 0x00000000
225 #define PC_Relative 0x02000000
235 expressionS direct_expr;
253 unsigned int u_number;
255 expressionS imm_expr;
259 insn_template *opcode;
263 insn_template *tm; /* Template of current instruction. */
264 unsigned opcode; /* Final opcode. */
265 unsigned int operands; /* Number of given operands. */
266 /* Type of operand given in instruction. */
267 operand *operand_type[MAX_OPERANDS];
268 unsigned addressing_mode; /* Final addressing mode of instruction. */
271 struct tic30_insn insn;
272 static int found_parallel_insn;
274 static char output_invalid_buf[sizeof (unsigned char) * 2 + 6];
277 output_invalid (char c)
280 snprintf (output_invalid_buf, sizeof (output_invalid_buf),
283 snprintf (output_invalid_buf, sizeof (output_invalid_buf),
284 "(0x%x)", (unsigned char) c);
285 return output_invalid_buf;
288 /* next_line points to the next line after the current instruction
289 (current_line). Search for the parallel bars, and if found, merge two
290 lines into internal syntax for a parallel instruction:
291 q_[INSN1]_[INSN2] [OPERANDS1] | [OPERANDS2]
292 By this stage, all comments are scrubbed, and only the bare lines are
296 #define START_OPCODE 1
298 #define START_OPERANDS 3
299 #define END_OPERANDS 4
302 tic30_find_parallel_insn (char *current_line, char *next_line)
304 int found_parallel = 0;
305 char first_opcode[256];
306 char second_opcode[256];
307 char first_operands[256];
308 char second_operands[256];
311 debug ("In tic30_find_parallel_insn()\n");
312 while (!is_end_of_line[(unsigned char) *next_line])
314 if (*next_line == PARALLEL_SEPARATOR
315 && *(next_line + 1) == PARALLEL_SEPARATOR)
325 debug ("Found a parallel instruction\n");
329 char *op, *operands, *line;
331 for (i = 0; i < 2; i++)
335 op = &first_opcode[0];
336 operands = &first_operands[0];
341 op = &second_opcode[0];
342 operands = &second_operands[0];
347 int search_status = NONE;
351 while (!is_end_of_line[(unsigned char) (c = *line)])
353 if (is_opcode_char (c) && search_status == NONE)
355 op[char_ptr++] = TOLOWER (c);
356 search_status = START_OPCODE;
358 else if (is_opcode_char (c) && search_status == START_OPCODE)
359 op[char_ptr++] = TOLOWER (c);
360 else if (!is_opcode_char (c) && search_status == START_OPCODE)
364 search_status = END_OPCODE;
366 else if (is_operand_char (c) && search_status == START_OPERANDS)
367 operands[char_ptr++] = c;
369 if (is_operand_char (c) && search_status == END_OPCODE)
371 operands[char_ptr++] = c;
372 search_status = START_OPERANDS;
377 if (search_status != START_OPERANDS)
379 operands[char_ptr] = '\0';
384 parallel_insn = concat ("q_", first_opcode, "_", second_opcode, " ",
385 first_operands, " | ", second_operands,
387 debug ("parallel insn = %s\n", parallel_insn);
388 return parallel_insn;
394 #undef START_OPERANDS
398 tic30_operand (char *token)
403 debug ("In tic30_operand with %s\n", token);
404 current_op = XCNEW (operand);
406 if (*token == DIRECT_REFERENCE)
408 char *token_posn = token + 1;
409 int direct_label = 0;
411 debug ("Found direct reference\n");
414 if (!is_digit_char (*token_posn))
421 char *save_input_line_pointer;
424 debug ("Direct reference is a label\n");
425 current_op->direct.label = token + 1;
426 save_input_line_pointer = input_line_pointer;
427 input_line_pointer = token + 1;
428 debug ("Current input_line_pointer: %s\n", input_line_pointer);
429 retval = expression (¤t_op->direct.direct_expr);
431 debug ("Expression type: %d\n",
432 current_op->direct.direct_expr.X_op);
433 debug ("Expression addnum: %ld\n",
434 (long) current_op->direct.direct_expr.X_add_number);
435 debug ("Segment: %p\n", retval);
437 input_line_pointer = save_input_line_pointer;
439 if (current_op->direct.direct_expr.X_op == O_constant)
441 current_op->direct.address =
442 current_op->direct.direct_expr.X_add_number;
443 current_op->direct.resolved = 1;
448 debug ("Direct reference is a number\n");
449 current_op->direct.address = atoi (token + 1);
450 current_op->direct.resolved = 1;
452 current_op->op_type = Direct;
454 else if (*token == INDIRECT_REFERENCE)
456 /* Indirect reference operand. */
462 ind_addr_type *ind_addr_op;
465 ind_buffer = XNEWVEC (char, strlen (token));
467 debug ("Found indirect reference\n");
468 ind_buffer[0] = *token;
470 for (count = 1; count < strlen (token); count++)
473 ind_buffer[buffer_posn] = TOLOWER (*(token + count));
475 if ((*(token + count - 1) == 'a' || *(token + count - 1) == 'A')
476 && (*(token + count) == 'r' || *(token + count) == 'R'))
478 /* AR reference is found, so get its number and remove
479 it from the buffer so it can pass through hash_find(). */
482 as_bad (_("More than one AR register found in indirect reference"));
486 if (*(token + count + 1) < '0' || *(token + count + 1) > '7')
488 as_bad (_("Illegal AR register in indirect reference"));
492 ar_number = *(token + count + 1) - '0';
497 if (*(token + count) == '(')
499 /* Parenthesis found, so check if a displacement value is
500 inside. If so, get the value and remove it from the
502 if (is_digit_char (*(token + count + 1)))
509 as_bad (_("More than one displacement found in indirect reference"));
514 while (*(token + count) != ')')
516 if (!is_digit_char (*(token + count)))
518 as_bad (_("Invalid displacement in indirect reference"));
522 disp[disp_posn++] = *(token + (count++));
524 disp[disp_posn] = '\0';
525 disp_number = atoi (disp);
533 ind_buffer[buffer_posn] = '\0';
536 as_bad (_("AR register not found in indirect reference"));
541 ind_addr_op = (ind_addr_type *) hash_find (ind_hash, ind_buffer);
544 debug ("Found indirect reference: %s\n", ind_addr_op->syntax);
545 if (ind_addr_op->displacement == IMPLIED_DISP)
550 else if ((ind_addr_op->displacement == DISP_REQUIRED) && !found_disp)
552 /* Maybe an implied displacement of 1 again. */
553 as_bad (_("required displacement wasn't given in indirect reference"));
560 as_bad (_("illegal indirect reference"));
565 if (found_disp && (disp_number < 0 || disp_number > 255))
567 as_bad (_("displacement must be an unsigned 8-bit number"));
572 current_op->indirect.mod = ind_addr_op->modfield;
573 current_op->indirect.disp = disp_number;
574 current_op->indirect.ARnum = ar_number;
575 current_op->op_type = Indirect;
580 reg *regop = (reg *) hash_find (reg_hash, token);
584 debug ("Found register operand: %s\n", regop->name);
585 if (regop->regtype == REG_ARn)
586 current_op->op_type = ARn;
587 else if (regop->regtype == REG_Rn)
588 current_op->op_type = Rn;
589 else if (regop->regtype == REG_DP)
590 current_op->op_type = DPReg;
592 current_op->op_type = OtherReg;
593 current_op->reg.opcode = regop->opcode;
597 if (!is_digit_char (*token)
598 || *(token + 1) == 'x'
599 || strchr (token, 'h'))
601 char *save_input_line_pointer;
604 debug ("Probably a label: %s\n", token);
605 current_op->immediate.label = xstrdup (token);
606 save_input_line_pointer = input_line_pointer;
607 input_line_pointer = token;
609 debug ("Current input_line_pointer: %s\n", input_line_pointer);
610 retval = expression (¤t_op->immediate.imm_expr);
611 debug ("Expression type: %d\n",
612 current_op->immediate.imm_expr.X_op);
613 debug ("Expression addnum: %ld\n",
614 (long) current_op->immediate.imm_expr.X_add_number);
615 debug ("Segment: %p\n", retval);
616 input_line_pointer = save_input_line_pointer;
618 if (current_op->immediate.imm_expr.X_op == O_constant)
620 current_op->immediate.s_number
621 = current_op->immediate.imm_expr.X_add_number;
622 current_op->immediate.u_number
623 = (unsigned int) current_op->immediate.imm_expr.X_add_number;
624 current_op->immediate.resolved = 1;
629 debug ("Found a number or displacement\n");
630 for (count = 0; count < strlen (token); count++)
631 if (*(token + count) == '.')
632 current_op->immediate.decimal_found = 1;
633 current_op->immediate.label = xstrdup (token);
634 current_op->immediate.f_number = (float) atof (token);
635 current_op->immediate.s_number = (int) atoi (token);
636 current_op->immediate.u_number = (unsigned int) atoi (token);
637 current_op->immediate.resolved = 1;
639 current_op->op_type = Disp | Abs24 | Imm16 | Imm24;
640 if (current_op->immediate.u_number <= 31)
641 current_op->op_type |= IVector;
647 struct tic30_par_insn
649 partemplate *tm; /* Template of current parallel instruction. */
650 unsigned operands[2]; /* Number of given operands for each insn. */
651 /* Type of operand given in instruction. */
652 operand *operand_type[2][MAX_OPERANDS];
653 int swap_operands; /* Whether to swap operands around. */
654 unsigned p_field; /* Value of p field in multiply add/sub instructions. */
655 unsigned opcode; /* Final opcode. */
658 struct tic30_par_insn p_insn;
661 tic30_parallel_insn (char *token)
663 static partemplate *p_opcode;
664 char *current_posn = token;
668 debug ("In tic30_parallel_insn with %s\n", token);
669 memset (&p_insn, '\0', sizeof (p_insn));
671 while (is_opcode_char (*current_posn))
674 /* Find instruction. */
675 save_char = *current_posn;
676 *current_posn = '\0';
677 p_opcode = (partemplate *) hash_find (parop_hash, token);
680 debug ("Found instruction %s\n", p_opcode->name);
681 p_insn.tm = p_opcode;
685 char first_opcode[6] = {0};
686 char second_opcode[6] = {0};
688 int current_opcode = -1;
691 for (i = 0; i < strlen (token); i++)
693 char ch = *(token + i);
695 if (ch == '_' && current_opcode == -1)
701 if (ch == '_' && current_opcode == 0)
708 switch (current_opcode)
711 first_opcode[char_ptr++] = ch;
714 second_opcode[char_ptr++] = ch;
719 debug ("first_opcode = %s\n", first_opcode);
720 debug ("second_opcode = %s\n", second_opcode);
721 sprintf (token, "q_%s_%s", second_opcode, first_opcode);
722 p_opcode = (partemplate *) hash_find (parop_hash, token);
726 debug ("Found instruction %s\n", p_opcode->name);
727 p_insn.tm = p_opcode;
728 p_insn.swap_operands = 1;
733 *current_posn = save_char;
738 int paren_not_balanced;
739 int expecting_operand = 0;
740 int found_separator = 0;
744 /* Skip optional white space before operand. */
745 while (!is_operand_char (*current_posn)
746 && *current_posn != END_OF_INSN)
748 if (!is_space_char (*current_posn)
749 && *current_posn != PARALLEL_SEPARATOR)
751 as_bad (_("Invalid character %s before %s operand"),
752 output_invalid (*current_posn),
753 ordinal_names[insn.operands]);
756 if (*current_posn == PARALLEL_SEPARATOR)
761 token_start = current_posn;
762 paren_not_balanced = 0;
764 while (paren_not_balanced || *current_posn != ',')
766 if (*current_posn == END_OF_INSN)
768 if (paren_not_balanced)
770 as_bad (_("Unbalanced parenthesis in %s operand."),
771 ordinal_names[insn.operands]);
777 else if (*current_posn == PARALLEL_SEPARATOR)
779 while (is_space_char (*(current_posn - 1)))
783 else if (!is_operand_char (*current_posn)
784 && !is_space_char (*current_posn))
786 as_bad (_("Invalid character %s in %s operand"),
787 output_invalid (*current_posn),
788 ordinal_names[insn.operands]);
792 if (*current_posn == '(')
793 ++paren_not_balanced;
794 if (*current_posn == ')')
795 --paren_not_balanced;
799 if (current_posn != token_start)
801 /* Yes, we've read in another operand. */
802 p_insn.operands[found_separator]++;
803 if (p_insn.operands[found_separator] > MAX_OPERANDS)
805 as_bad (_("Spurious operands; (%d operands/instruction max)"),
810 /* Now parse operand adding info to 'insn' as we go along. */
811 save_char = *current_posn;
812 *current_posn = '\0';
813 p_insn.operand_type[found_separator][p_insn.operands[found_separator] - 1] =
814 tic30_operand (token_start);
815 *current_posn = save_char;
816 if (!p_insn.operand_type[found_separator][p_insn.operands[found_separator] - 1])
821 if (expecting_operand)
823 as_bad (_("Expecting operand after ','; got nothing"));
826 if (*current_posn == ',')
828 as_bad (_("Expecting operand before ','; got nothing"));
833 /* Now *current_posn must be either ',' or END_OF_INSN. */
834 if (*current_posn == ',')
836 if (*++current_posn == END_OF_INSN)
838 /* Just skip it, if it's \n complain. */
839 as_bad (_("Expecting operand after ','; got nothing"));
842 expecting_operand = 1;
845 while (*current_posn != END_OF_INSN);
848 if (p_insn.swap_operands)
853 temp_num = p_insn.operands[0];
854 p_insn.operands[0] = p_insn.operands[1];
855 p_insn.operands[1] = temp_num;
856 for (i = 0; i < MAX_OPERANDS; i++)
858 temp_op = p_insn.operand_type[0][i];
859 p_insn.operand_type[0][i] = p_insn.operand_type[1][i];
860 p_insn.operand_type[1][i] = temp_op;
864 if (p_insn.operands[0] != p_insn.tm->operands_1)
866 as_bad (_("incorrect number of operands given in the first instruction"));
870 if (p_insn.operands[1] != p_insn.tm->operands_2)
872 as_bad (_("incorrect number of operands given in the second instruction"));
876 debug ("Number of operands in first insn: %d\n", p_insn.operands[0]);
877 debug ("Number of operands in second insn: %d\n", p_insn.operands[1]);
880 /* Now check if operands are correct. */
885 for (count = 0; count < 2; count++)
888 for (i = 0; i < p_insn.operands[count]; i++)
890 if ((p_insn.operand_type[count][i]->op_type &
891 p_insn.tm->operand_types[count][i]) == 0)
893 as_bad (_("%s instruction, operand %d doesn't match"),
894 ordinal_names[count], i + 1);
898 /* Get number of R register and indirect reference contained
899 within the first two operands of each instruction. This is
900 required for the multiply parallel instructions which require
901 two R registers and two indirect references, but not in any
903 if ((p_insn.operand_type[count][i]->op_type & Rn) && i < 2)
905 else if ((p_insn.operand_type[count][i]->op_type & Indirect)
911 if ((p_insn.tm->operand_types[0][0] & (Indirect | Rn))
914 /* Check for the multiply instructions. */
917 as_bad (_("incorrect format for multiply parallel instruction"));
923 /* Shouldn't get here. */
924 as_bad (_("incorrect format for multiply parallel instruction"));
928 if ((p_insn.operand_type[0][2]->reg.opcode != 0x00)
929 && (p_insn.operand_type[0][2]->reg.opcode != 0x01))
931 as_bad (_("destination for multiply can only be R0 or R1"));
935 if ((p_insn.operand_type[1][2]->reg.opcode != 0x02)
936 && (p_insn.operand_type[1][2]->reg.opcode != 0x03))
938 as_bad (_("destination for add/subtract can only be R2 or R3"));
942 /* Now determine the P field for the instruction. */
943 if (p_insn.operand_type[0][0]->op_type & Indirect)
945 if (p_insn.operand_type[0][1]->op_type & Indirect)
946 p_insn.p_field = 0x00000000; /* Ind * Ind, Rn +/- Rn. */
947 else if (p_insn.operand_type[1][0]->op_type & Indirect)
948 p_insn.p_field = 0x01000000; /* Ind * Rn, Ind +/- Rn. */
950 p_insn.p_field = 0x03000000; /* Ind * Rn, Rn +/- Ind. */
954 if (p_insn.operand_type[0][1]->op_type & Rn)
955 p_insn.p_field = 0x02000000; /* Rn * Rn, Ind +/- Ind. */
956 else if (p_insn.operand_type[1][0]->op_type & Indirect)
959 p_insn.p_field = 0x01000000; /* Rn * Ind, Ind +/- Rn. */
960 /* Need to swap the two multiply operands around so that
961 everything is in its place for the opcode makeup.
962 ie so Ind * Rn, Ind +/- Rn. */
963 temp = p_insn.operand_type[0][0];
964 p_insn.operand_type[0][0] = p_insn.operand_type[0][1];
965 p_insn.operand_type[0][1] = temp;
970 p_insn.p_field = 0x03000000; /* Rn * Ind, Rn +/- Ind. */
971 temp = p_insn.operand_type[0][0];
972 p_insn.operand_type[0][0] = p_insn.operand_type[0][1];
973 p_insn.operand_type[0][1] = temp;
979 debug ("P field: %08X\n", p_insn.p_field);
981 /* Finalise opcode. This is easier for parallel instructions as they have
982 to be fully resolved, there are no memory addresses allowed, except
983 through indirect addressing, so there are no labels to resolve. */
984 p_insn.opcode = p_insn.tm->base_opcode;
986 switch (p_insn.tm->oporder)
989 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum);
990 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 3);
991 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum << 8);
992 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 11);
993 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
994 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 22);
998 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum);
999 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 3);
1000 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.ARnum << 8);
1001 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.mod << 11);
1002 p_insn.opcode |= (p_insn.operand_type[1][1]->reg.opcode << 19);
1003 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 22);
1004 if (p_insn.operand_type[1][1]->reg.opcode == p_insn.operand_type[0][1]->reg.opcode)
1005 as_warn (_("loading the same register in parallel operation"));
1009 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.ARnum);
1010 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.mod << 3);
1011 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum << 8);
1012 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 11);
1013 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
1014 p_insn.opcode |= (p_insn.operand_type[0][0]->reg.opcode << 22);
1018 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum);
1019 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 3);
1020 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum << 8);
1021 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 11);
1022 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
1023 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 19);
1024 p_insn.opcode |= (p_insn.operand_type[0][2]->reg.opcode << 22);
1028 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.ARnum);
1029 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.mod << 3);
1030 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum << 8);
1031 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 11);
1032 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
1033 p_insn.opcode |= (p_insn.operand_type[0][0]->reg.opcode << 19);
1034 p_insn.opcode |= (p_insn.operand_type[0][2]->reg.opcode << 22);
1038 p_insn.opcode |= p_insn.p_field;
1039 if (p_insn.operand_type[0][2]->reg.opcode == 0x01)
1040 p_insn.opcode |= 0x00800000;
1041 if (p_insn.operand_type[1][2]->reg.opcode == 0x03)
1042 p_insn.opcode |= 0x00400000;
1044 switch (p_insn.p_field)
1047 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.ARnum);
1048 p_insn.opcode |= (p_insn.operand_type[0][1]->indirect.mod << 3);
1049 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum << 8);
1050 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 11);
1051 p_insn.opcode |= (p_insn.operand_type[1][1]->reg.opcode << 16);
1052 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 19);
1055 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.ARnum);
1056 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.mod << 3);
1057 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum << 8);
1058 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 11);
1059 p_insn.opcode |= (p_insn.operand_type[1][1]->reg.opcode << 16);
1060 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 19);
1063 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum);
1064 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 3);
1065 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.ARnum << 8);
1066 p_insn.opcode |= (p_insn.operand_type[1][0]->indirect.mod << 11);
1067 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 16);
1068 p_insn.opcode |= (p_insn.operand_type[0][0]->reg.opcode << 19);
1071 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.ARnum);
1072 p_insn.opcode |= (p_insn.operand_type[1][1]->indirect.mod << 3);
1073 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.ARnum << 8);
1074 p_insn.opcode |= (p_insn.operand_type[0][0]->indirect.mod << 11);
1075 p_insn.opcode |= (p_insn.operand_type[1][0]->reg.opcode << 16);
1076 p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 19);
1085 p = frag_more (INSN_SIZE);
1086 md_number_to_chars (p, (valueT) p_insn.opcode, INSN_SIZE);
1092 for (i = 0; i < 2; i++)
1093 for (j = 0; j < p_insn.operands[i]; j++)
1094 free (p_insn.operand_type[i][j]);
1097 debug ("Final opcode: %08X\n", p_insn.opcode);
1103 /* In order to get gas to ignore any | chars at the start of a line,
1104 this function returns true if a | is found in a line. */
1107 tic30_unrecognized_line (int c)
1109 debug ("In tc_unrecognized_line\n");
1110 return (c == PARALLEL_SEPARATOR);
1114 md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
1115 segT segment ATTRIBUTE_UNUSED)
1117 debug ("In md_estimate_size_before_relax()\n");
1122 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
1123 segT sec ATTRIBUTE_UNUSED,
1124 fragS *fragP ATTRIBUTE_UNUSED)
1126 debug ("In md_convert_frag()\n");
1130 md_apply_fix (fixS *fixP,
1132 segT seg ATTRIBUTE_UNUSED)
1134 valueT value = *valP;
1136 debug ("In md_apply_fix() with value = %ld\n", (long) value);
1137 debug ("Values in fixP\n");
1138 debug ("fx_size = %d\n", fixP->fx_size);
1139 debug ("fx_pcrel = %d\n", fixP->fx_pcrel);
1140 debug ("fx_where = %ld\n", fixP->fx_where);
1141 debug ("fx_offset = %d\n", (int) fixP->fx_offset);
1143 char *buf = fixP->fx_frag->fr_literal + fixP->fx_where;
1146 if (fixP->fx_size == 1)
1147 /* Special fix for LDP instruction. */
1148 value = (value & 0x00FF0000) >> 16;
1150 debug ("new value = %ld\n", (long) value);
1151 md_number_to_chars (buf, value, fixP->fx_size);
1154 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1159 md_parse_option (int c ATTRIBUTE_UNUSED,
1160 const char *arg ATTRIBUTE_UNUSED)
1162 debug ("In md_parse_option()\n");
1167 md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
1169 debug ("In md_show_usage()\n");
1173 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1175 debug ("In md_undefined_symbol()\n");
1176 return (symbolS *) 0;
1180 md_section_align (segT segment, valueT size)
1182 debug ("In md_section_align() segment = %p and size = %lu\n",
1183 segment, (unsigned long) size);
1184 size = (size + 3) / 4;
1186 debug ("New size value = %lu\n", (unsigned long) size);
1191 md_pcrel_from (fixS *fixP)
1195 debug ("In md_pcrel_from()\n");
1196 debug ("fx_where = %ld\n", fixP->fx_where);
1197 debug ("fx_size = %d\n", fixP->fx_size);
1198 /* Find the opcode that represents the current instruction in the
1199 fr_literal storage area, and check bit 21. Bit 21 contains whether the
1200 current instruction is a delayed one or not, and then set the offset
1201 value appropriately. */
1202 if (fixP->fx_frag->fr_literal[fixP->fx_where - fixP->fx_size + 1] & 0x20)
1206 debug ("offset = %d\n", offset);
1207 /* PC Relative instructions have a format:
1208 displacement = Label - (PC + offset)
1209 This function returns PC + offset where:
1210 fx_where - fx_size = PC
1211 INSN_SIZE * offset = offset number of instructions. */
1212 return fixP->fx_where - fixP->fx_size + (INSN_SIZE * offset);
1216 md_atof (int what_statement_type,
1223 unsigned long value;
1226 debug ("In md_atof()\n");
1227 debug ("precision = %c\n", what_statement_type);
1228 debug ("literal = %s\n", literalP);
1230 token = input_line_pointer;
1231 while (!is_end_of_line[(unsigned char) *input_line_pointer]
1232 && (*input_line_pointer != ','))
1234 debug ("%c", *input_line_pointer);
1235 input_line_pointer++;
1238 keepval = *input_line_pointer;
1239 *input_line_pointer = '\0';
1241 float_value = (float) atof (token);
1242 *input_line_pointer = keepval;
1243 debug ("float_value = %f\n", float_value);
1245 switch (what_statement_type)
1263 return _("Unrecognized or unsupported floating point constant");
1266 if (float_value == 0.0)
1267 value = (prec == 2) ? 0x00008000L : 0x80000000L;
1270 unsigned long exp, sign, mant, tmsfloat;
1278 converter.f = float_value;
1279 tmsfloat = converter.l;
1280 sign = tmsfloat & 0x80000000;
1281 mant = tmsfloat & 0x007FFFFF;
1282 exp = tmsfloat & 0x7F800000;
1284 if (exp == 0xFF000000)
1298 mant = mant & 0x007FFFFF;
1300 mant = mant & 0x00FFFFFF;
1304 exp = (long) exp - 0x01000000;
1307 tmsfloat = exp | mant;
1314 if (tmsfloat == 0x80000000)
1319 expon = (tmsfloat & 0xFF000000);
1321 mantis = tmsfloat & 0x007FFFFF;
1322 if (tmsfloat & 0x00800000)
1324 mantis |= 0xFF000000;
1325 mantis += 0x00000800;
1327 mantis |= 0x00000800;
1334 mantis |= 0x00800000;
1335 mantis += 0x00000800;
1336 expon += (mantis >> 24);
1346 mantis = (expon << 12) | mantis;
1347 value = mantis & 0xFFFF;
1352 md_number_to_chars (literalP, value, prec);
1358 md_number_to_chars (char *buf, valueT val, int n)
1360 debug ("In md_number_to_chars()\n");
1361 number_to_chars_bigendian (buf, val, n);
1364 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
1365 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
1368 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixP)
1371 bfd_reloc_code_real_type code = 0;
1373 debug ("In tc_gen_reloc()\n");
1374 debug ("fixP.size = %d\n", fixP->fx_size);
1375 debug ("fixP.pcrel = %d\n", fixP->fx_pcrel);
1376 debug ("addsy.name = %s\n", S_GET_NAME (fixP->fx_addsy));
1378 switch (F (fixP->fx_size, fixP->fx_pcrel))
1380 MAP (1, 0, BFD_RELOC_TIC30_LDP);
1381 MAP (2, 0, BFD_RELOC_16);
1382 MAP (3, 0, BFD_RELOC_24);
1383 MAP (2, 1, BFD_RELOC_16_PCREL);
1384 MAP (4, 0, BFD_RELOC_32);
1386 as_bad (_("Can not do %d byte %srelocation"), fixP->fx_size,
1387 fixP->fx_pcrel ? _("pc-relative ") : "");
1392 rel = XNEW (arelent);
1393 gas_assert (rel != 0);
1394 rel->sym_ptr_ptr = XNEW (asymbol *);
1395 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
1396 rel->address = fixP->fx_frag->fr_address + fixP->fx_where;
1398 rel->howto = bfd_reloc_type_lookup (stdoutput, code);
1403 name = S_GET_NAME (fixP->fx_addsy);
1406 as_fatal ("Cannot generate relocation type for symbol %s, code %s",
1407 name, bfd_get_reloc_code_name (code));
1413 md_operand (expressionS *expressionP ATTRIBUTE_UNUSED)
1415 debug ("In md_operand()\n");
1419 md_assemble (char *line)
1427 debug ("In md_assemble() with argument %s\n", line);
1428 memset (&insn, '\0', sizeof (insn));
1429 if (found_parallel_insn)
1431 debug ("Line is second part of parallel instruction\n\n");
1432 found_parallel_insn = 0;
1436 tic30_find_parallel_insn (line, input_line_pointer + 1)) == NULL)
1437 current_posn = line;
1439 found_parallel_insn = 1;
1441 while (is_space_char (*current_posn))
1444 token_start = current_posn;
1446 if (!is_opcode_char (*current_posn))
1448 as_bad (_("Invalid character %s in opcode"),
1449 output_invalid (*current_posn));
1452 /* Check if instruction is a parallel instruction
1453 by seeing if the first character is a q. */
1454 if (*token_start == 'q')
1456 if (tic30_parallel_insn (token_start))
1458 if (found_parallel_insn)
1463 while (is_opcode_char (*current_posn))
1466 /* Find instruction. */
1467 save_char = *current_posn;
1468 *current_posn = '\0';
1469 op = (insn_template *) hash_find (op_hash, token_start);
1472 debug ("Found instruction %s\n", op->name);
1477 debug ("Didn't find insn\n");
1478 as_bad (_("Unknown TMS320C30 instruction: %s"), token_start);
1481 *current_posn = save_char;
1484 if (*current_posn != END_OF_INSN)
1486 /* Find operands. */
1487 int paren_not_balanced;
1488 int expecting_operand = 0;
1492 /* Skip optional white space before operand. */
1493 while (!is_operand_char (*current_posn)
1494 && *current_posn != END_OF_INSN)
1496 if (!is_space_char (*current_posn))
1498 as_bad (_("Invalid character %s before %s operand"),
1499 output_invalid (*current_posn),
1500 ordinal_names[insn.operands]);
1505 token_start = current_posn;
1506 paren_not_balanced = 0;
1507 while (paren_not_balanced || *current_posn != ',')
1509 if (*current_posn == END_OF_INSN)
1511 if (paren_not_balanced)
1513 as_bad (_("Unbalanced parenthesis in %s operand."),
1514 ordinal_names[insn.operands]);
1520 else if (!is_operand_char (*current_posn)
1521 && !is_space_char (*current_posn))
1523 as_bad (_("Invalid character %s in %s operand"),
1524 output_invalid (*current_posn),
1525 ordinal_names[insn.operands]);
1528 if (*current_posn == '(')
1529 ++paren_not_balanced;
1530 if (*current_posn == ')')
1531 --paren_not_balanced;
1534 if (current_posn != token_start)
1536 /* Yes, we've read in another operand. */
1537 this_operand = insn.operands++;
1538 if (insn.operands > MAX_OPERANDS)
1540 as_bad (_("Spurious operands; (%d operands/instruction max)"),
1545 /* Now parse operand adding info to 'insn' as we go along. */
1546 save_char = *current_posn;
1547 *current_posn = '\0';
1548 insn.operand_type[this_operand] = tic30_operand (token_start);
1549 *current_posn = save_char;
1550 if (insn.operand_type[this_operand] == NULL)
1555 if (expecting_operand)
1557 as_bad (_("Expecting operand after ','; got nothing"));
1560 if (*current_posn == ',')
1562 as_bad (_("Expecting operand before ','; got nothing"));
1567 /* Now *current_posn must be either ',' or END_OF_INSN. */
1568 if (*current_posn == ',')
1570 if (*++current_posn == END_OF_INSN)
1572 /* Just skip it, if it's \n complain. */
1573 as_bad (_("Expecting operand after ','; got nothing"));
1576 expecting_operand = 1;
1579 while (*current_posn != END_OF_INSN);
1582 debug ("Number of operands found: %d\n", insn.operands);
1584 /* Check that number of operands is correct. */
1585 if (insn.operands != insn.tm->operands)
1588 unsigned int numops = insn.tm->operands;
1590 /* If operands are not the same, then see if any of the operands are
1591 not required. Then recheck with number of given operands. If they
1592 are still not the same, then give an error, otherwise carry on. */
1593 for (i = 0; i < insn.tm->operands; i++)
1594 if (insn.tm->operand_types[i] & NotReq)
1596 if (insn.operands != numops)
1598 as_bad (_("Incorrect number of operands given"));
1602 insn.addressing_mode = AM_NotReq;
1603 for (count = 0; count < insn.operands; count++)
1605 if (insn.operand_type[count]->op_type & insn.tm->operand_types[count])
1607 debug ("Operand %d matches\n", count + 1);
1608 /* If instruction has two operands and has an AddressMode
1609 modifier then set addressing mode type for instruction. */
1610 if (insn.tm->opcode_modifier == AddressMode)
1613 /* Store instruction uses the second
1614 operand for the address mode. */
1615 if ((insn.tm->operand_types[1] & (Indirect | Direct))
1616 == (Indirect | Direct))
1619 if (insn.operand_type[addr_insn]->op_type & (AllReg))
1620 insn.addressing_mode = AM_Register;
1621 else if (insn.operand_type[addr_insn]->op_type & Direct)
1622 insn.addressing_mode = AM_Direct;
1623 else if (insn.operand_type[addr_insn]->op_type & Indirect)
1624 insn.addressing_mode = AM_Indirect;
1626 insn.addressing_mode = AM_Immediate;
1631 as_bad (_("The %s operand doesn't match"), ordinal_names[count]);
1636 /* Now set the addressing mode for 3 operand instructions. */
1637 if ((insn.tm->operand_types[0] & op3T1)
1638 && (insn.tm->operand_types[1] & op3T2))
1640 /* Set the addressing mode to the values used for 2 operand
1641 instructions in the G addressing field of the opcode. */
1643 switch (insn.operand_type[0]->op_type)
1649 if (insn.operand_type[1]->op_type & (AllReg))
1650 insn.addressing_mode = AM_Register;
1651 else if (insn.operand_type[1]->op_type & Indirect)
1652 insn.addressing_mode = AM_Direct;
1655 /* Shouldn't make it to this stage. */
1656 as_bad (_("Incompatible first and second operands in instruction"));
1661 if (insn.operand_type[1]->op_type & (AllReg))
1662 insn.addressing_mode = AM_Indirect;
1663 else if (insn.operand_type[1]->op_type & Indirect)
1664 insn.addressing_mode = AM_Immediate;
1667 /* Shouldn't make it to this stage. */
1668 as_bad (_("Incompatible first and second operands in instruction"));
1673 /* Now make up the opcode for the 3 operand instructions. As in
1674 parallel instructions, there will be no unresolved values, so they
1675 can be fully formed and added to the frag table. */
1676 insn.opcode = insn.tm->base_opcode;
1677 if (insn.operand_type[0]->op_type & Indirect)
1679 insn.opcode |= (insn.operand_type[0]->indirect.ARnum);
1680 insn.opcode |= (insn.operand_type[0]->indirect.mod << 3);
1683 insn.opcode |= (insn.operand_type[0]->reg.opcode);
1685 if (insn.operand_type[1]->op_type & Indirect)
1687 insn.opcode |= (insn.operand_type[1]->indirect.ARnum << 8);
1688 insn.opcode |= (insn.operand_type[1]->indirect.mod << 11);
1691 insn.opcode |= (insn.operand_type[1]->reg.opcode << 8);
1693 if (insn.operands == 3)
1694 insn.opcode |= (insn.operand_type[2]->reg.opcode << 16);
1696 insn.opcode |= insn.addressing_mode;
1697 p = frag_more (INSN_SIZE);
1698 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1702 /* Not a three operand instruction. */
1705 insn.opcode = insn.tm->base_opcode;
1706 /* Create frag for instruction - all instructions are 4 bytes long. */
1707 p = frag_more (INSN_SIZE);
1708 if ((insn.operands > 0) && (insn.tm->opcode_modifier == AddressMode))
1710 insn.opcode |= insn.addressing_mode;
1711 if (insn.addressing_mode == AM_Indirect)
1713 /* Determine which operand gives the addressing mode. */
1714 if (insn.operand_type[0]->op_type & Indirect)
1716 if ((insn.operands > 1)
1717 && (insn.operand_type[1]->op_type & Indirect))
1719 insn.opcode |= (insn.operand_type[am_insn]->indirect.disp);
1720 insn.opcode |= (insn.operand_type[am_insn]->indirect.ARnum << 8);
1721 insn.opcode |= (insn.operand_type[am_insn]->indirect.mod << 11);
1722 if (insn.operands > 1)
1723 insn.opcode |= (insn.operand_type[!am_insn]->reg.opcode << 16);
1724 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1726 else if (insn.addressing_mode == AM_Register)
1728 insn.opcode |= (insn.operand_type[0]->reg.opcode);
1729 if (insn.operands > 1)
1730 insn.opcode |= (insn.operand_type[1]->reg.opcode << 16);
1731 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1733 else if (insn.addressing_mode == AM_Direct)
1735 if (insn.operand_type[0]->op_type & Direct)
1737 if ((insn.operands > 1)
1738 && (insn.operand_type[1]->op_type & Direct))
1740 if (insn.operands > 1)
1742 (insn.operand_type[! am_insn]->reg.opcode << 16);
1743 if (insn.operand_type[am_insn]->direct.resolved == 1)
1745 /* Resolved values can be placed straight
1746 into instruction word, and output. */
1748 (insn.operand_type[am_insn]->direct.address & 0x0000FFFF);
1749 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1753 /* Unresolved direct addressing mode instruction. */
1754 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1755 fix_new_exp (frag_now, p + 2 - (frag_now->fr_literal), 2,
1756 & insn.operand_type[am_insn]->direct.direct_expr,
1760 else if (insn.addressing_mode == AM_Immediate)
1762 if (insn.operand_type[0]->immediate.resolved == 1)
1767 if (insn.operands > 1)
1768 insn.opcode |= (insn.operand_type[1]->reg.opcode << 16);
1770 switch (insn.tm->imm_arg_type)
1773 debug ("Floating point first operand\n");
1774 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1776 keeploc = input_line_pointer;
1777 input_line_pointer =
1778 insn.operand_type[0]->immediate.label;
1780 if (md_atof ('f', p + 2, & size) != 0)
1782 as_bad (_("invalid short form floating point immediate operand"));
1786 input_line_pointer = keeploc;
1790 debug ("Unsigned int first operand\n");
1791 if (insn.operand_type[0]->immediate.decimal_found)
1792 as_warn (_("rounding down first operand float to unsigned int"));
1793 if (insn.operand_type[0]->immediate.u_number > 0xFFFF)
1794 as_warn (_("only lower 16-bits of first operand are used"));
1796 (insn.operand_type[0]->immediate.u_number & 0x0000FFFFL);
1797 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1801 debug ("Int first operand\n");
1803 if (insn.operand_type[0]->immediate.decimal_found)
1804 as_warn (_("rounding down first operand float to signed int"));
1806 if (insn.operand_type[0]->immediate.s_number < -32768 ||
1807 insn.operand_type[0]->immediate.s_number > 32767)
1809 as_bad (_("first operand is too large for 16-bit signed int"));
1813 (insn.operand_type[0]->immediate.s_number & 0x0000FFFFL);
1814 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1820 /* Unresolved immediate label. */
1821 if (insn.operands > 1)
1822 insn.opcode |= (insn.operand_type[1]->reg.opcode << 16);
1823 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1824 fix_new_exp (frag_now, p + 2 - (frag_now->fr_literal), 2,
1825 & insn.operand_type[0]->immediate.imm_expr,
1830 else if (insn.tm->opcode_modifier == PCRel)
1832 /* Conditional Branch and Call instructions. */
1833 if ((insn.tm->operand_types[0] & (AllReg | Disp))
1836 if (insn.operand_type[0]->op_type & (AllReg))
1838 insn.opcode |= (insn.operand_type[0]->reg.opcode);
1839 insn.opcode |= PC_Register;
1840 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1844 insn.opcode |= PC_Relative;
1845 if (insn.operand_type[0]->immediate.resolved == 1)
1848 (insn.operand_type[0]->immediate.s_number & 0x0000FFFF);
1849 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1853 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1854 fix_new_exp (frag_now, p + 2 - (frag_now->fr_literal),
1855 2, & insn.operand_type[0]->immediate.imm_expr,
1860 else if ((insn.tm->operand_types[0] & ARn) == ARn)
1862 /* Decrement and Branch instructions. */
1863 insn.opcode |= ((insn.operand_type[0]->reg.opcode - 0x08) << 22);
1864 if (insn.operand_type[1]->op_type & (AllReg))
1866 insn.opcode |= (insn.operand_type[1]->reg.opcode);
1867 insn.opcode |= PC_Register;
1868 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1870 else if (insn.operand_type[1]->immediate.resolved == 1)
1872 if (insn.operand_type[0]->immediate.decimal_found)
1874 as_bad (_("first operand is floating point"));
1877 if (insn.operand_type[0]->immediate.s_number < -32768 ||
1878 insn.operand_type[0]->immediate.s_number > 32767)
1880 as_bad (_("first operand is too large for 16-bit signed int"));
1883 insn.opcode |= (insn.operand_type[1]->immediate.s_number);
1884 insn.opcode |= PC_Relative;
1885 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1889 insn.opcode |= PC_Relative;
1890 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1891 fix_new_exp (frag_now, p + 2 - frag_now->fr_literal, 2,
1892 & insn.operand_type[1]->immediate.imm_expr,
1897 else if (insn.tm->operand_types[0] == IVector)
1899 /* Trap instructions. */
1900 if (insn.operand_type[0]->op_type & IVector)
1901 insn.opcode |= (insn.operand_type[0]->immediate.u_number);
1904 /* Shouldn't get here. */
1905 as_bad (_("interrupt vector for trap instruction out of range"));
1908 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1910 else if (insn.tm->opcode_modifier == StackOp
1911 || insn.tm->opcode_modifier == Rotate)
1913 /* Push, Pop and Rotate instructions. */
1914 insn.opcode |= (insn.operand_type[0]->reg.opcode << 16);
1915 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1917 else if ((insn.tm->operand_types[0] & (Abs24 | Direct))
1918 == (Abs24 | Direct))
1920 /* LDP Instruction needs to be tested
1921 for before the next section. */
1922 if (insn.operand_type[0]->op_type & Direct)
1924 if (insn.operand_type[0]->direct.resolved == 1)
1926 /* Direct addressing uses lower 8 bits of direct address. */
1928 (insn.operand_type[0]->direct.address & 0x00FF0000) >> 16;
1929 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1935 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1936 fix = fix_new_exp (frag_now, p + 3 - (frag_now->fr_literal),
1937 1, &insn.operand_type[0]->direct.direct_expr, 0, 0);
1938 /* Ensure that the assembler doesn't complain
1939 about fitting a 24-bit address into 8 bits. */
1940 fix->fx_no_overflow = 1;
1945 if (insn.operand_type[0]->immediate.resolved == 1)
1947 /* Immediate addressing uses upper 8 bits of address. */
1948 if (insn.operand_type[0]->immediate.u_number > 0x00FFFFFF)
1950 as_bad (_("LDP instruction needs a 24-bit operand"));
1954 ((insn.operand_type[0]->immediate.u_number & 0x00FF0000) >> 16);
1955 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1960 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1961 fix = fix_new_exp (frag_now, p + 3 - (frag_now->fr_literal),
1962 1, &insn.operand_type[0]->immediate.imm_expr,
1964 fix->fx_no_overflow = 1;
1968 else if (insn.tm->operand_types[0] & (Imm24))
1970 /* Unconditional Branch and Call instructions. */
1971 if (insn.operand_type[0]->immediate.resolved == 1)
1973 if (insn.operand_type[0]->immediate.u_number > 0x00FFFFFF)
1974 as_warn (_("first operand is too large for a 24-bit displacement"));
1976 (insn.operand_type[0]->immediate.u_number & 0x00FFFFFF);
1977 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1981 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1982 fix_new_exp (frag_now, p + 1 - (frag_now->fr_literal), 3,
1983 & insn.operand_type[0]->immediate.imm_expr, 0, 0);
1986 else if (insn.tm->operand_types[0] & NotReq)
1987 /* Check for NOP instruction without arguments. */
1988 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1990 else if (insn.tm->operands == 0)
1991 /* Check for instructions without operands. */
1992 md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
1994 debug ("Addressing mode: %08X\n", insn.addressing_mode);
1998 for (i = 0; i < insn.operands; i++)
2000 if (insn.operand_type[i]->immediate.label)
2001 free (insn.operand_type[i]->immediate.label);
2002 free (insn.operand_type[i]);
2005 debug ("Final opcode: %08X\n", insn.opcode);