1 /* tc-sparc.c -- Assemble for the SPARC
2 Copyright (C) 1989, 90-95, 1996 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public
17 License along with GAS; see the file COPYING. If not, write
18 to the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
27 /* careful, this file includes data *declarations* */
28 #include "opcode/sparc.h"
30 static void sparc_ip PARAMS ((char *, const struct sparc_opcode **));
32 /* Current architecture. We don't bump up unless necessary. */
33 static enum sparc_opcode_arch_val current_architecture = SPARC_OPCODE_ARCH_V6;
35 /* The maximum architecture level we can bump up to.
36 In a 32 bit environment, don't allow bumping up to v9 by default.
37 The native assembler works this way. The user is required to pass
38 an explicit argument before we'll create v9 object files. However, if
39 we don't see any v9 insns, a v9 object file is not created. */
41 static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_V9;
43 /* ??? This should be V8, but sparclite support was added by making it the
44 default. GCC now passes -Asparclite, so maybe sometime in the future
45 we can set this to V8. */
46 static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_SPARCLITE;
49 static int architecture_requested;
50 static int warn_on_bump;
52 /* If warn_on_bump and the needed architecture is higher than this
53 architecture, issue a warning. */
54 static enum sparc_opcode_arch_val warn_after_architecture;
56 /* Non-zero if we are generating PIC code. */
59 extern int target_big_endian;
61 /* handle of the OPCODE hash table */
62 static struct hash_control *op_hash;
64 static void s_data1 PARAMS ((void));
65 static void s_seg PARAMS ((int));
66 static void s_proc PARAMS ((int));
67 static void s_reserve PARAMS ((int));
68 static void s_common PARAMS ((int));
69 static void s_empty PARAMS ((int));
70 static void s_uacons PARAMS ((int));
72 const pseudo_typeS md_pseudo_table[] =
74 {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */
75 {"common", s_common, 0},
76 {"empty", s_empty, 0},
77 {"global", s_globl, 0},
79 {"optim", s_ignore, 0},
81 {"reserve", s_reserve, 0},
87 /* these are specific to sparc/svr4 */
88 {"pushsection", obj_elf_section, 0},
89 {"popsection", obj_elf_previous, 0},
90 {"uahalf", s_uacons, 2},
91 {"uaword", s_uacons, 4},
92 {"uaxword", s_uacons, 8},
97 const int md_reloc_size = 12; /* Size of relocation record */
99 /* This array holds the chars that always start a comment. If the
100 pre-processor is disabled, these aren't very useful */
101 const char comment_chars[] = "!"; /* JF removed '|' from comment_chars */
103 /* This array holds the chars that only start a comment at the beginning of
104 a line. If the line seems to have the form '# 123 filename'
105 .line and .file directives will appear in the pre-processed output */
106 /* Note that input_file.c hand checks for '#' at the beginning of the
107 first line of the input file. This is because the compiler outputs
108 #NO_APP at the beginning of its output. */
109 /* Also note that comments started like this one will always
110 work if '/' isn't otherwise defined. */
111 const char line_comment_chars[] = "#";
113 const char line_separator_chars[] = "";
115 /* Chars that can be used to separate mant from exp in floating point nums */
116 const char EXP_CHARS[] = "eE";
118 /* Chars that mean this number is a floating point constant */
121 const char FLT_CHARS[] = "rRsSfFdDxXpP";
123 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
124 changed in read.c. Ideally it shouldn't have to know about it at all,
125 but nothing is ideal around here. */
127 static unsigned char octal[256];
128 #define isoctal(c) octal[(unsigned char) (c)]
129 static unsigned char toHex[256];
134 unsigned long opcode;
135 struct nlist *nlistp;
138 bfd_reloc_code_real_type reloc;
141 struct sparc_it the_insn, set_insn;
143 /* Return non-zero if VAL is in the range -(MAX+1) to MAX. */
146 in_signed_range (val, max)
147 bfd_signed_vma val, max;
158 /* Return non-zero if VAL is in the range -(MAX/2+1) to MAX.
159 (e.g. -15 to +31). */
162 in_bitfield_range (val, max)
163 bfd_signed_vma val, max;
169 if (val < ~(max >> 1))
183 for (i = 0; (mask & 1) == 0; ++i)
189 static void print_insn PARAMS ((struct sparc_it *insn));
191 static int getExpression PARAMS ((char *str));
193 static char *expr_end;
194 static int special_case;
197 * Instructions that require wierd handling because they're longer than
200 #define SPECIAL_CASE_SET 1
201 #define SPECIAL_CASE_FDIV 2
203 /* The last instruction to be assembled. */
204 static const struct sparc_opcode *last_insn;
207 * sort of like s_lcomm
211 static int max_alignment = 15;
226 name = input_line_pointer;
227 c = get_symbol_end ();
228 p = input_line_pointer;
232 if (*input_line_pointer != ',')
234 as_bad ("Expected comma after name");
235 ignore_rest_of_line ();
239 ++input_line_pointer;
241 if ((size = get_absolute_expression ()) < 0)
243 as_bad ("BSS length (%d.) <0! Ignored.", size);
244 ignore_rest_of_line ();
249 symbolP = symbol_find_or_make (name);
252 if (strncmp (input_line_pointer, ",\"bss\"", 6) != 0
253 && strncmp (input_line_pointer, ",\".bss\"", 7) != 0)
255 as_bad ("bad .reserve segment -- expected BSS segment");
259 if (input_line_pointer[2] == '.')
260 input_line_pointer += 7;
262 input_line_pointer += 6;
265 if (*input_line_pointer == ',')
267 ++input_line_pointer;
270 if (*input_line_pointer == '\n')
272 as_bad ("Missing alignment");
276 align = get_absolute_expression ();
278 if (align > max_alignment)
280 align = max_alignment;
281 as_warn ("Alignment too large: %d. assumed.", align);
287 as_warn ("Alignment negative. 0 assumed.");
290 record_alignment (bss_section, align);
292 /* convert to a power of 2 alignment */
293 for (temp = 0; (align & 1) == 0; align >>= 1, ++temp);;
297 as_bad ("Alignment not a power of 2");
298 ignore_rest_of_line ();
300 } /* not a power of two */
303 } /* if has optional alignment */
307 if (!S_IS_DEFINED (symbolP)
309 && S_GET_OTHER (symbolP) == 0
310 && S_GET_DESC (symbolP) == 0
317 segT current_seg = now_seg;
318 subsegT current_subseg = now_subseg;
320 subseg_set (bss_section, 1); /* switch to bss */
323 frag_align (align, 0); /* do alignment */
325 /* detach from old frag */
326 if (S_GET_SEGMENT(symbolP) == bss_section)
327 symbolP->sy_frag->fr_symbol = NULL;
329 symbolP->sy_frag = frag_now;
330 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP,
334 S_SET_SEGMENT (symbolP, bss_section);
336 subseg_set (current_seg, current_subseg);
341 as_warn("Ignoring attempt to re-define symbol %s",
342 S_GET_NAME (symbolP));
343 } /* if not redefining */
345 demand_empty_rest_of_line ();
358 name = input_line_pointer;
359 c = get_symbol_end ();
360 /* just after name is now '\0' */
361 p = input_line_pointer;
364 if (*input_line_pointer != ',')
366 as_bad ("Expected comma after symbol-name");
367 ignore_rest_of_line ();
370 input_line_pointer++; /* skip ',' */
371 if ((temp = get_absolute_expression ()) < 0)
373 as_bad (".COMMon length (%d.) <0! Ignored.", temp);
374 ignore_rest_of_line ();
379 symbolP = symbol_find_or_make (name);
381 if (S_IS_DEFINED (symbolP))
383 as_bad ("Ignoring attempt to re-define symbol");
384 ignore_rest_of_line ();
387 if (S_GET_VALUE (symbolP) != 0)
389 if (S_GET_VALUE (symbolP) != size)
391 as_warn ("Length of .comm \"%s\" is already %ld. Not changed to %d.",
392 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
398 S_SET_VALUE (symbolP, (valueT) size);
399 S_SET_EXTERNAL (symbolP);
402 know (symbolP->sy_frag == &zero_address_frag);
403 if (*input_line_pointer != ',')
405 as_bad ("Expected comma after common length");
406 ignore_rest_of_line ();
409 input_line_pointer++;
411 if (*input_line_pointer != '"')
413 temp = get_absolute_expression ();
415 if (temp > max_alignment)
417 temp = max_alignment;
418 as_warn ("Common alignment too large: %d. assumed", temp);
424 as_warn ("Common alignment negative; 0 assumed");
435 old_subsec = now_subseg;
437 record_alignment (bss_section, align);
438 subseg_set (bss_section, 0);
440 frag_align (align, 0);
441 if (S_GET_SEGMENT (symbolP) == bss_section)
442 symbolP->sy_frag->fr_symbol = 0;
443 symbolP->sy_frag = frag_now;
444 p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
447 S_SET_SEGMENT (symbolP, bss_section);
448 S_CLEAR_EXTERNAL (symbolP);
449 subseg_set (old_sec, old_subsec);
455 S_SET_VALUE (symbolP, (valueT) size);
457 S_SET_ALIGN (symbolP, temp);
459 S_SET_EXTERNAL (symbolP);
460 /* should be common, but this is how gas does it for now */
461 S_SET_SEGMENT (symbolP, bfd_und_section_ptr);
466 input_line_pointer++;
467 /* @@ Some use the dot, some don't. Can we get some consistency?? */
468 if (*input_line_pointer == '.')
469 input_line_pointer++;
470 /* @@ Some say data, some say bss. */
471 if (strncmp (input_line_pointer, "bss\"", 4)
472 && strncmp (input_line_pointer, "data\"", 5))
474 while (*--input_line_pointer != '"')
476 input_line_pointer--;
477 goto bad_common_segment;
479 while (*input_line_pointer++ != '"')
481 goto allocate_common;
483 demand_empty_rest_of_line ();
488 p = input_line_pointer;
489 while (*p && *p != '\n')
493 as_bad ("bad .common segment %s", input_line_pointer + 1);
495 input_line_pointer = p;
496 ignore_rest_of_line ();
501 /* Handle the .empty pseudo-op. This supresses the warnings about
502 invalid delay slot usage. */
508 /* The easy way to implement is to just forget about the last
518 if (strncmp (input_line_pointer, "\"text\"", 6) == 0)
520 input_line_pointer += 6;
524 if (strncmp (input_line_pointer, "\"data\"", 6) == 0)
526 input_line_pointer += 6;
530 if (strncmp (input_line_pointer, "\"data1\"", 7) == 0)
532 input_line_pointer += 7;
536 if (strncmp (input_line_pointer, "\"bss\"", 5) == 0)
538 input_line_pointer += 5;
539 /* We only support 2 segments -- text and data -- for now, so
540 things in the "bss segment" will have to go into data for now.
541 You can still allocate SEG_BSS stuff with .lcomm or .reserve. */
542 subseg_set (data_section, 255); /* FIXME-SOMEDAY */
545 as_bad ("Unknown segment type");
546 demand_empty_rest_of_line ();
552 subseg_set (data_section, 1);
553 demand_empty_rest_of_line ();
560 while (!is_end_of_line[(unsigned char) *input_line_pointer])
562 ++input_line_pointer;
564 ++input_line_pointer;
567 /* This static variable is set by s_uacons to tell sparc_cons_align
568 that the expession does not need to be aligned. */
570 static int sparc_no_align_cons = 0;
572 /* This handles the unaligned space allocation pseudo-ops, such as
573 .uaword. .uaword is just like .word, but the value does not need
580 /* Tell sparc_cons_align not to align this value. */
581 sparc_no_align_cons = 1;
585 /* We require .word, et. al., to be aligned correctly. We do it by
586 setting up an rs_align_code frag, and checking in HANDLE_ALIGN to
587 make sure that no unexpected alignment was introduced. */
590 sparc_cons_align (nbytes)
596 if (sparc_no_align_cons)
598 /* This is an unaligned pseudo-op. */
599 sparc_no_align_cons = 0;
604 while ((nbytes & 1) == 0)
613 if (now_seg == absolute_section)
615 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
616 as_bad ("misaligned data");
620 p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0,
621 (symbolS *) NULL, (long) nalign, (char *) NULL);
623 record_alignment (now_seg, nalign);
626 /* This is where we do the unexpected alignment check. */
629 sparc_handle_align (fragp)
632 if (fragp->fr_type == rs_align_code
633 && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0)
634 as_bad_where (fragp->fr_file, fragp->fr_line, "misaligned data");
637 /* sparc64 priviledged registers */
639 struct priv_reg_entry
645 struct priv_reg_entry priv_reg_table[] =
664 {"", -1}, /* end marker */
669 struct priv_reg_entry *p, *q;
671 return strcmp (q->name, p->name);
674 /* This function is called once, at assembler startup time. It should
675 set up all the tables, etc. that the MD part of the assembler will need. */
680 register const char *retval = NULL;
682 register unsigned int i = 0;
684 op_hash = hash_new ();
686 while (i < sparc_num_opcodes)
688 const char *name = sparc_opcodes[i].name;
689 retval = hash_insert (op_hash, name, &sparc_opcodes[i]);
692 fprintf (stderr, "internal error: can't hash `%s': %s\n",
693 sparc_opcodes[i].name, retval);
698 if (sparc_opcodes[i].match & sparc_opcodes[i].lose)
700 fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n",
701 sparc_opcodes[i].name, sparc_opcodes[i].args);
706 while (i < sparc_num_opcodes
707 && !strcmp (sparc_opcodes[i].name, name));
711 as_fatal ("Broken assembler. No assembly attempted.");
713 for (i = '0'; i < '8'; ++i)
715 for (i = '0'; i <= '9'; ++i)
717 for (i = 'a'; i <= 'f'; ++i)
718 toHex[i] = i + 10 - 'a';
719 for (i = 'A'; i <= 'F'; ++i)
720 toHex[i] = i + 10 - 'A';
722 qsort (priv_reg_table, sizeof (priv_reg_table) / sizeof (priv_reg_table[0]),
723 sizeof (priv_reg_table[0]), cmp_reg_entry);
725 target_big_endian = 1;
727 /* If -bump, record the architecture level at which we start issuing
728 warnings. The behaviour is different depending upon whether an
729 architecture was explicitly specified. If it wasn't, we issue warnings
730 for all upwards bumps. If it was, we don't start issuing warnings until
731 we need to bump beyond the requested architecture or when we bump between
732 conflicting architectures. */
735 && architecture_requested)
737 /* `max_architecture' records the requested architecture.
738 Issue warnings if we go above it. */
739 warn_after_architecture = max_architecture;
741 /* Find the highest architecture level that doesn't conflict with
742 the requested one. */
743 for (max_architecture = SPARC_OPCODE_ARCH_MAX;
744 max_architecture > warn_after_architecture;
746 if (! SPARC_OPCODE_CONFLICT_P (max_architecture,
747 warn_after_architecture))
752 /* Called after all assembly has been done. */
758 if (current_architecture == SPARC_OPCODE_ARCH_V9A)
759 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a);
761 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9);
763 if (current_architecture == SPARC_OPCODE_ARCH_V9)
764 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus);
765 else if (current_architecture == SPARC_OPCODE_ARCH_V9A)
766 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa);
767 else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET)
768 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet);
771 /* The sparclite is treated like a normal sparc. Perhaps it shouldn't
772 be but for now it is (since that's the way it's always been
774 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc);
783 const struct sparc_opcode *insn;
788 sparc_ip (str, &insn);
790 /* We warn about attempts to put a floating point branch in a delay
794 && (insn->flags & F_FBR) != 0
795 && (last_insn->flags & F_DELAYED) != 0)
796 as_warn ("FP branch in delay slot");
798 /* SPARC before v9 requires a nop instruction between a floating
799 point instruction and a floating point branch. We insert one
800 automatically, with a warning. */
801 if (max_architecture < SPARC_OPCODE_ARCH_V9
804 && (insn->flags & F_FBR) != 0
805 && (last_insn->flags & F_FLOAT) != 0)
807 as_warn ("FP branch preceded by FP instruction; NOP inserted");
809 md_number_to_chars (toP, (valueT) 0x01000000, 4);
812 /* See if "set" operand is absolute and small; skip sethi if so. */
813 if (special_case == SPECIAL_CASE_SET
814 && the_insn.exp.X_op == O_constant)
816 if (the_insn.exp.X_add_number >= -(1 << 12)
817 && the_insn.exp.X_add_number < (1 << 12))
819 the_insn.opcode = 0x80102000 /* or %g0,imm,... */
820 | (the_insn.opcode & 0x3E000000) /* dest reg */
821 | (the_insn.exp.X_add_number & 0x1FFF); /* imm */
822 special_case = 0; /* No longer special */
823 the_insn.reloc = BFD_RELOC_NONE; /* No longer relocated */
828 /* put out the opcode */
829 md_number_to_chars (toP, (valueT) the_insn.opcode, 4);
831 /* put out the symbol-dependent stuff */
832 if (the_insn.reloc != BFD_RELOC_NONE)
834 fix_new_exp (frag_now, /* which frag */
835 (toP - frag_now->fr_literal), /* where */
844 switch (special_case)
846 case SPECIAL_CASE_SET:
848 assert (the_insn.reloc == BFD_RELOC_HI22);
849 /* See if "set" operand has no low-order bits; skip OR if so. */
850 if (the_insn.exp.X_op == O_constant
851 && ((the_insn.exp.X_add_number & 0x3FF) == 0))
854 rsd = (the_insn.opcode >> 25) & 0x1f;
855 the_insn.opcode = 0x80102000 | (rsd << 25) | (rsd << 14);
856 md_number_to_chars (toP, (valueT) the_insn.opcode, 4);
857 fix_new_exp (frag_now, /* which frag */
858 (toP - frag_now->fr_literal), /* where */
865 case SPECIAL_CASE_FDIV:
866 /* According to information leaked from Sun, the "fdiv" instructions
867 on early SPARC machines would produce incorrect results sometimes.
868 The workaround is to add an fmovs of the destination register to
869 itself just after the instruction. This was true on machines
870 with Weitek 1165 float chips, such as the Sun-4/260 and /280. */
872 assert (the_insn.reloc == BFD_RELOC_NONE);
874 rsd = (the_insn.opcode >> 25) & 0x1f;
875 the_insn.opcode = 0x81A00020 | (rsd << 25) | rsd; /* fmovs dest,dest */
876 md_number_to_chars (toP, (valueT) the_insn.opcode, 4);
883 as_fatal ("failed sanity check.");
887 /* Implement big shift right. */
893 if (sizeof (bfd_vma) <= 4 && amount >= 32)
894 as_fatal ("Support for 64-bit arithmetic not compiled in.");
895 return val >> amount;
898 /* Parse an argument that can be expressed as a keyword.
899 (eg: #StoreStore or %ccfr).
900 The result is a boolean indicating success.
901 If successful, INPUT_POINTER is updated. */
904 parse_keyword_arg (lookup_fn, input_pointerP, valueP)
906 char **input_pointerP;
913 for (q = p + (*p == '#' || *p == '%'); isalpha (*q) || *q == '_'; ++q)
917 value = (*lookup_fn) (p);
926 /* Parse an argument that is a constant expression.
927 The result is a boolean indicating success. */
930 parse_const_expr_arg (input_pointerP, valueP)
931 char **input_pointerP;
934 char *save = input_line_pointer;
937 input_line_pointer = *input_pointerP;
938 /* The next expression may be something other than a constant
939 (say if we're not processing the right variant of the insn).
940 Don't call expression unless we're sure it will succeed as it will
941 signal an error (which we want to defer until later). */
942 /* FIXME: It might be better to define md_operand and have it recognize
943 things like %asi, etc. but continuing that route through to the end
945 if (*input_line_pointer == '%')
947 input_line_pointer = save;
951 *input_pointerP = input_line_pointer;
952 input_line_pointer = save;
953 if (exp.X_op != O_constant)
955 *valueP = exp.X_add_number;
960 sparc_ip (str, pinsn)
962 const struct sparc_opcode **pinsn;
964 char *error_message = "";
968 const struct sparc_opcode *insn;
970 unsigned long opcode;
971 unsigned int mask = 0;
974 long immediate_max = 0;
977 for (s = str; islower (*s) || (*s >= '0' && *s <= '3'); ++s)
995 as_fatal ("Unknown opcode: `%s'", str);
997 insn = (struct sparc_opcode *) hash_find (op_hash, str);
1001 as_bad ("Unknown opcode: `%s'", str);
1012 opcode = insn->match;
1013 memset (&the_insn, '\0', sizeof (the_insn));
1014 the_insn.reloc = BFD_RELOC_NONE;
1018 * Build the opcode, checking as we go to make
1019 * sure that the operands match
1021 for (args = insn->args;; ++args)
1029 /* Parse a series of masks. */
1036 if (! parse_keyword_arg (sparc_encode_membar, &s,
1039 error_message = ": invalid membar mask name";
1043 while (*s == ' ') { ++s; continue; }
1044 if (*s == '|' || *s == '+')
1046 while (*s == ' ') { ++s; continue; }
1051 if (! parse_const_expr_arg (&s, &kmask))
1053 error_message = ": invalid membar mask expression";
1056 if (kmask < 0 || kmask > 127)
1058 error_message = ": invalid membar mask number";
1063 opcode |= MEMBAR (kmask);
1071 /* Parse a prefetch function. */
1074 if (! parse_keyword_arg (sparc_encode_prefetch, &s, &fcn))
1076 error_message = ": invalid prefetch function name";
1082 if (! parse_const_expr_arg (&s, &fcn))
1084 error_message = ": invalid prefetch function expression";
1087 if (fcn < 0 || fcn > 31)
1089 error_message = ": invalid prefetch function number";
1099 /* Parse a sparc64 privileged register. */
1102 struct priv_reg_entry *p = priv_reg_table;
1103 unsigned int len = 9999999; /* init to make gcc happy */
1106 while (p->name[0] > s[0])
1108 while (p->name[0] == s[0])
1110 len = strlen (p->name);
1111 if (strncmp (p->name, s, len) == 0)
1115 if (p->name[0] != s[0])
1117 error_message = ": unrecognizable privileged register";
1121 opcode |= (p->regnum << 14);
1123 opcode |= (p->regnum << 25);
1129 error_message = ": unrecognizable privileged register";
1135 if (strncmp (s, "%asr", 4) == 0)
1143 while (isdigit (*s))
1145 num = num * 10 + *s - '0';
1149 if (current_architecture >= SPARC_OPCODE_ARCH_V9)
1151 if (num < 16 || 31 < num)
1153 error_message = ": asr number must be between 16 and 31";
1159 if (num < 0 || 31 < num)
1161 error_message = ": asr number must be between 0 and 31";
1166 opcode |= (*args == 'M' ? RS1 (num) : RD (num));
1171 error_message = ": expecting %asrN";
1178 the_insn.reloc = BFD_RELOC_SPARC_11;
1179 immediate_max = 0x03FF;
1183 the_insn.reloc = BFD_RELOC_SPARC_10;
1184 immediate_max = 0x01FF;
1188 /* V8 systems don't understand BFD_RELOC_SPARC_5. */
1189 if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
1190 the_insn.reloc = BFD_RELOC_SPARC_5;
1192 the_insn.reloc = BFD_RELOC_SPARC13;
1193 /* These fields are unsigned, but for upward compatibility,
1194 allow negative values as well. */
1195 immediate_max = 0x1f;
1199 /* V8 systems don't understand BFD_RELOC_SPARC_6. */
1200 if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
1201 the_insn.reloc = BFD_RELOC_SPARC_6;
1203 the_insn.reloc = BFD_RELOC_SPARC13;
1204 /* These fields are unsigned, but for upward compatibility,
1205 allow negative values as well. */
1206 immediate_max = 0x3f;
1210 the_insn.reloc = /* RELOC_WDISP2_14 */ BFD_RELOC_SPARC_WDISP16;
1215 the_insn.reloc = BFD_RELOC_SPARC_WDISP19;
1220 if (*s == 'p' && s[1] == 'n')
1228 if (*s == 'p' && s[1] == 't')
1240 if (strncmp (s, "%icc", 4) == 0)
1252 if (strncmp (s, "%xcc", 4) == 0)
1264 if (strncmp (s, "%fcc0", 5) == 0)
1276 if (strncmp (s, "%fcc1", 5) == 0)
1288 if (strncmp (s, "%fcc2", 5) == 0)
1300 if (strncmp (s, "%fcc3", 5) == 0)
1308 if (strncmp (s, "%pc", 3) == 0)
1316 if (strncmp (s, "%tick", 5) == 0)
1323 case '\0': /* end of args */
1342 case '[': /* these must match exactly */
1350 case '#': /* must be at least one digit */
1353 while (isdigit (*s))
1361 case 'C': /* coprocessor state register */
1362 if (strncmp (s, "%csr", 4) == 0)
1369 case 'b': /* next operand is a coprocessor register */
1372 if (*s++ == '%' && *s++ == 'c' && isdigit (*s))
1377 mask = 10 * (mask - '0') + (*s++ - '0');
1391 opcode |= mask << 14;
1399 opcode |= mask << 25;
1405 case 'r': /* next operand must be a register */
1415 case 'f': /* frame pointer */
1423 case 'g': /* global register */
1424 if (isoctal (c = *s++))
1431 case 'i': /* in register */
1432 if (isoctal (c = *s++))
1434 mask = c - '0' + 24;
1439 case 'l': /* local register */
1440 if (isoctal (c = *s++))
1442 mask = (c - '0' + 16);
1447 case 'o': /* out register */
1448 if (isoctal (c = *s++))
1450 mask = (c - '0' + 8);
1455 case 's': /* stack pointer */
1463 case 'r': /* any register */
1464 if (!isdigit (c = *s++))
1481 if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32)
1497 /* Got the register, now figure out where
1498 it goes in the opcode. */
1502 opcode |= mask << 14;
1510 opcode |= mask << 25;
1514 opcode |= (mask << 25) | (mask << 14);
1518 opcode |= (mask << 25) | (mask << 0);
1524 case 'e': /* next operand is a floating point register */
1539 && ((format = *s) == 'f')
1542 for (mask = 0; isdigit (*s); ++s)
1544 mask = 10 * mask + (*s - '0');
1545 } /* read the number */
1553 } /* register must be even numbered */
1561 } /* register must be multiple of 4 */
1565 if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
1566 error_message = ": There are only 64 f registers; [0-63]";
1568 error_message = ": There are only 32 f registers; [0-31]";
1571 else if (mask >= 32)
1573 if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
1576 mask -= 31; /* wrap high bit */
1580 error_message = ": There are only 32 f registers; [0-31]";
1588 } /* if not an 'f' register. */
1595 opcode |= RS1 (mask);
1602 opcode |= RS2 (mask);
1608 opcode |= RD (mask);
1617 if (strncmp (s, "%fsr", 4) == 0)
1624 case 'h': /* high 22 bits */
1625 the_insn.reloc = BFD_RELOC_HI22;
1628 case 'l': /* 22 bit PC relative immediate */
1629 the_insn.reloc = BFD_RELOC_SPARC_WDISP22;
1633 case 'L': /* 30 bit immediate */
1634 the_insn.reloc = BFD_RELOC_32_PCREL_S2;
1638 case 'n': /* 22 bit immediate */
1639 the_insn.reloc = BFD_RELOC_SPARC22;
1642 case 'i': /* 13 bit immediate */
1643 the_insn.reloc = BFD_RELOC_SPARC13;
1644 immediate_max = 0x0FFF;
1653 if ((c = s[1]) == 'h' && s[2] == 'i')
1655 the_insn.reloc = BFD_RELOC_HI22;
1658 else if (c == 'l' && s[2] == 'o')
1660 the_insn.reloc = BFD_RELOC_LO10;
1667 the_insn.reloc = BFD_RELOC_SPARC_HH22;
1675 the_insn.reloc = BFD_RELOC_SPARC_HM10;
1682 /* Note that if the getExpression() fails, we will still
1683 have created U entries in the symbol table for the
1684 'symbols' in the input string. Try not to create U
1685 symbols for registers, etc. */
1687 /* This stuff checks to see if the expression ends in
1688 +%reg. If it does, it removes the register from
1689 the expression, and re-sets 's' to point to the
1694 for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++);;
1696 if (s1 != s && isdigit (s1[-1]))
1698 if (s1[-2] == '%' && s1[-3] == '+')
1702 (void) getExpression (s);
1707 else if (strchr ("goli0123456789", s1[-2]) && s1[-3] == '%' && s1[-4] == '+')
1711 (void) getExpression (s);
1718 (void) getExpression (s);
1721 if (the_insn.exp.X_op == O_constant
1722 && the_insn.exp.X_add_symbol == 0
1723 && the_insn.exp.X_op_symbol == 0)
1725 /* Handle %uhi/%ulo by moving the upper word to the lower
1726 one and pretending it's %hi/%lo. We also need to watch
1727 for %hi/%lo: the top word needs to be zeroed otherwise
1728 fixup_segment will complain the value is too big. */
1729 switch (the_insn.reloc)
1731 case BFD_RELOC_SPARC_HH22:
1732 the_insn.reloc = BFD_RELOC_HI22;
1733 the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32);
1735 case BFD_RELOC_SPARC_HM10:
1736 the_insn.reloc = BFD_RELOC_LO10;
1737 the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32);
1739 case BFD_RELOC_HI22:
1740 case BFD_RELOC_LO10:
1741 the_insn.exp.X_add_number &= 0xffffffff;
1747 /* For pc-relative call instructions, we reject
1748 constants to get better code. */
1750 && the_insn.reloc == BFD_RELOC_32_PCREL_S2
1751 && in_signed_range (the_insn.exp.X_add_number, 0x3fff)
1754 error_message = ": PC-relative operand can't be a constant";
1757 /* Check for invalid constant values. Don't warn if
1758 constant was inside %hi or %lo, since these
1759 truncate the constant to fit. */
1760 if (immediate_max != 0
1761 && the_insn.reloc != BFD_RELOC_LO10
1762 && the_insn.reloc != BFD_RELOC_HI22
1763 && !in_signed_range (the_insn.exp.X_add_number,
1768 /* Who knows? After relocation, we may be within
1769 range. Let the linker figure it out. */
1771 the_insn.exp.X_op = O_symbol;
1772 the_insn.exp.X_add_symbol = section_symbol (absolute_section);
1775 /* Immediate value is non-pcrel, and out of
1777 as_bad ("constant value %ld out of range (%ld .. %ld)",
1778 the_insn.exp.X_add_number,
1779 ~immediate_max, immediate_max);
1783 /* Reset to prevent extraneous range check. */
1803 if (! parse_keyword_arg (sparc_encode_asi, &s, &asi))
1805 error_message = ": invalid ASI name";
1811 if (! parse_const_expr_arg (&s, &asi))
1813 error_message = ": invalid ASI expression";
1816 if (asi < 0 || asi > 255)
1818 error_message = ": invalid ASI number";
1822 opcode |= ASI (asi);
1824 } /* alternate space */
1827 if (strncmp (s, "%psr", 4) == 0)
1834 case 'q': /* floating point queue */
1835 if (strncmp (s, "%fq", 3) == 0)
1842 case 'Q': /* coprocessor queue */
1843 if (strncmp (s, "%cq", 3) == 0)
1851 if (strcmp (str, "set") == 0)
1853 special_case = SPECIAL_CASE_SET;
1856 else if (strncmp (str, "fdiv", 4) == 0)
1858 special_case = SPECIAL_CASE_FDIV;
1864 if (strncmp (s, "%asi", 4) != 0)
1870 if (strncmp (s, "%fprs", 5) != 0)
1876 if (strncmp (s, "%ccr", 4) != 0)
1882 if (strncmp (s, "%tbr", 4) != 0)
1888 if (strncmp (s, "%wim", 4) != 0)
1895 char *push = input_line_pointer;
1898 input_line_pointer = s;
1900 if (e.X_op == O_constant)
1902 int n = e.X_add_number;
1903 if (n != e.X_add_number || (n & ~0x1ff) != 0)
1904 as_bad ("OPF immediate operand out of range (0-0x1ff)");
1906 opcode |= e.X_add_number << 5;
1909 as_bad ("non-immediate OPF operand, ignored");
1910 s = input_line_pointer;
1911 input_line_pointer = push;
1916 if (strncmp (s, "%y", 2) != 0)
1924 /* Parse a sparclet cpreg. */
1926 if (! parse_keyword_arg (sparc_encode_sparclet_cpreg, &s, &cpreg))
1928 error_message = ": invalid cpreg name";
1931 opcode |= (*args == 'U' ? RS1 (cpreg) : RD (cpreg));
1936 as_fatal ("failed sanity check.");
1937 } /* switch on arg code */
1939 /* Break out of for() loop. */
1941 } /* for each arg that we expect */
1946 /* Args don't match. */
1947 if (((unsigned) (&insn[1] - sparc_opcodes)) < sparc_num_opcodes
1948 && (insn->name == insn[1].name
1949 || !strcmp (insn->name, insn[1].name)))
1957 as_bad ("Illegal operands%s", error_message);
1963 /* We have a match. Now see if the architecture is ok. */
1964 int needed_arch_mask = insn->architecture;
1968 needed_arch_mask &= ~ ((1 << SPARC_OPCODE_ARCH_V9)
1969 | (1 << SPARC_OPCODE_ARCH_V9A));
1970 needed_arch_mask |= (1 << SPARC_OPCODE_ARCH_V9);
1973 if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (current_architecture))
1975 /* Can we bump up the architecture? */
1976 else if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (max_architecture))
1978 enum sparc_opcode_arch_val needed_architecture =
1979 sparc_ffs (SPARC_OPCODE_SUPPORTED (max_architecture)
1980 & needed_arch_mask);
1982 assert (needed_architecture <= SPARC_OPCODE_ARCH_MAX);
1984 && needed_architecture > warn_after_architecture)
1986 as_warn ("architecture bumped from \"%s\" to \"%s\" on \"%s\"",
1987 sparc_opcode_archs[current_architecture].name,
1988 sparc_opcode_archs[needed_architecture].name,
1990 warn_after_architecture = needed_architecture;
1992 current_architecture = needed_architecture;
1995 /* ??? This seems to be a bit fragile. What if the next entry in
1996 the opcode table is the one we want and it is supported?
1997 It is possible to arrange the table today so that this can't
1998 happen but what about tomorrow? */
2001 int arch,printed_one_p = 0;
2003 char required_archs[SPARC_OPCODE_ARCH_MAX * 16];
2005 /* Create a list of the architectures that support the insn. */
2006 needed_arch_mask &= ~ SPARC_OPCODE_SUPPORTED (max_architecture);
2008 arch = sparc_ffs (needed_arch_mask);
2009 while ((1 << arch) <= needed_arch_mask)
2011 if ((1 << arch) & needed_arch_mask)
2015 strcpy (p, sparc_opcode_archs[arch].name);
2022 as_bad ("Architecture mismatch on \"%s\".", str);
2023 as_tsktsk (" (Requires %s; requested architecture is %s.)",
2025 sparc_opcode_archs[max_architecture].name);
2031 } /* forever looking for a match */
2033 the_insn.opcode = opcode;
2043 save_in = input_line_pointer;
2044 input_line_pointer = str;
2045 seg = expression (&the_insn.exp);
2046 if (seg != absolute_section
2047 && seg != text_section
2048 && seg != data_section
2049 && seg != bss_section
2050 && seg != undefined_section)
2052 the_insn.error = "bad segment";
2053 expr_end = input_line_pointer;
2054 input_line_pointer = save_in;
2057 expr_end = input_line_pointer;
2058 input_line_pointer = save_in;
2060 } /* getExpression() */
2064 This is identical to the md_atof in m68k.c. I think this is right,
2067 Turn a string in input_line_pointer into a floating point constant of type
2068 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
2069 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
2072 /* Equal to MAX_PRECISION in atof-ieee.c */
2073 #define MAX_LITTLENUMS 6
2076 md_atof (type, litP, sizeP)
2082 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2083 LITTLENUM_TYPE *wordP;
2116 return "Bad call to MD_ATOF()";
2118 t = atof_ieee (input_line_pointer, type, words);
2120 input_line_pointer = t;
2121 *sizeP = prec * sizeof (LITTLENUM_TYPE);
2122 for (wordP = words; prec--;)
2124 md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE));
2125 litP += sizeof (LITTLENUM_TYPE);
2131 * Write out big-endian.
2134 md_number_to_chars (buf, val, n)
2139 number_to_chars_bigendian (buf, val, n);
2142 /* Apply a fixS to the frags, now that we know the value it ought to
2146 md_apply_fix (fixP, value)
2150 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2155 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2157 fixP->fx_addnumber = val; /* Remember value for emit_reloc */
2160 /* FIXME: SPARC ELF relocations don't use an addend in the data
2161 field itself. This whole approach should be somehow combined
2162 with the calls to bfd_perform_relocation. Also, the value passed
2163 in by fixup_segment includes the value of a defined symbol. We
2164 don't want to include the value of an externally visible symbol. */
2165 if (fixP->fx_addsy != NULL)
2167 if ((S_IS_EXTERNAL (fixP->fx_addsy)
2168 || S_IS_WEAK (fixP->fx_addsy)
2169 || (sparc_pic_code && ! fixP->fx_pcrel))
2170 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section
2171 && S_GET_SEGMENT (fixP->fx_addsy) != undefined_section
2172 && ! bfd_is_com_section (S_GET_SEGMENT (fixP->fx_addsy)))
2173 fixP->fx_addnumber -= S_GET_VALUE (fixP->fx_addsy);
2178 /* This is a hack. There should be a better way to
2179 handle this. Probably in terms of howto fields, once
2180 we can look at these fixups in terms of howtos. */
2181 if (fixP->fx_r_type == BFD_RELOC_32_PCREL_S2 && fixP->fx_addsy)
2182 val += fixP->fx_where + fixP->fx_frag->fr_address;
2185 /* FIXME: More ridiculous gas reloc hacking. If we are going to
2186 generate a reloc, then we just want to let the reloc addend set
2187 the value. We do not want to also stuff the addend into the
2188 object file. Including the addend in the object file works when
2189 doing a static link, because the linker will ignore the object
2190 file contents. However, the dynamic linker does not ignore the
2191 object file contents. */
2192 if (fixP->fx_addsy != NULL
2193 && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2)
2196 /* When generating PIC code, we do not want an addend for a reloc
2197 against a local symbol. We adjust fx_addnumber to cancel out the
2198 value already included in val, and to also cancel out the
2199 adjustment which bfd_install_relocation will create. */
2201 && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2
2202 && fixP->fx_addsy != NULL
2203 && ! S_IS_COMMON (fixP->fx_addsy)
2204 && (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) == 0)
2205 fixP->fx_addnumber -= 2 * S_GET_VALUE (fixP->fx_addsy);
2208 switch (fixP->fx_r_type)
2222 case BFD_RELOC_32_PCREL_S2:
2224 /* FIXME: This increment-by-one deserves a comment of why it's
2226 if (! sparc_pic_code
2227 || fixP->fx_addsy == NULL
2228 || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0)
2230 buf[0] |= (val >> 24) & 0x3f;
2238 bfd_vma valh = BSR (val, 32);
2239 buf[0] = valh >> 24;
2240 buf[1] = valh >> 16;
2250 case BFD_RELOC_SPARC_11:
2251 if (! in_signed_range (val, 0x7ff))
2252 as_bad ("relocation overflow.");
2254 buf[2] |= (val >> 8) & 0x7;
2258 case BFD_RELOC_SPARC_10:
2259 if (! in_signed_range (val, 0x3ff))
2260 as_bad ("relocation overflow.");
2262 buf[2] |= (val >> 8) & 0x3;
2266 case BFD_RELOC_SPARC_6:
2267 if (! in_bitfield_range (val, 0x3f))
2268 as_bad ("relocation overflow.");
2270 buf[3] |= val & 0x3f;
2273 case BFD_RELOC_SPARC_5:
2274 if (! in_bitfield_range (val, 0x1f))
2275 as_bad ("relocation overflow.");
2277 buf[3] |= val & 0x1f;
2280 case BFD_RELOC_SPARC_WDISP16:
2281 /* FIXME: simplify */
2282 if (((val > 0) && (val & ~0x3fffc))
2283 || ((val < 0) && (~(val - 1) & ~0x3fffc)))
2285 as_bad ("relocation overflow.");
2288 /* FIXME: The +1 deserves a comment. */
2289 val = (val >> 2) + 1;
2290 buf[1] |= ((val >> 14) & 0x3) << 4;
2291 buf[2] |= (val >> 8) & 0x3f;
2295 case BFD_RELOC_SPARC_WDISP19:
2296 /* FIXME: simplify */
2297 if (((val > 0) && (val & ~0x1ffffc))
2298 || ((val < 0) && (~(val - 1) & ~0x1ffffc)))
2300 as_bad ("relocation overflow.");
2303 /* FIXME: The +1 deserves a comment. */
2304 val = (val >> 2) + 1;
2305 buf[1] |= (val >> 16) & 0x7;
2306 buf[2] = (val >> 8) & 0xff;
2310 case BFD_RELOC_SPARC_HH22:
2311 val = BSR (val, 32);
2312 /* intentional fallthrough */
2314 case BFD_RELOC_SPARC_LM22:
2315 case BFD_RELOC_HI22:
2316 if (!fixP->fx_addsy)
2318 buf[1] |= (val >> 26) & 0x3f;
2329 case BFD_RELOC_SPARC22:
2330 if (val & ~0x003fffff)
2332 as_bad ("relocation overflow");
2334 buf[1] |= (val >> 16) & 0x3f;
2339 case BFD_RELOC_SPARC_HM10:
2340 val = BSR (val, 32);
2341 /* intentional fallthrough */
2343 case BFD_RELOC_LO10:
2344 if (!fixP->fx_addsy)
2346 buf[2] |= (val >> 8) & 0x03;
2353 case BFD_RELOC_SPARC13:
2354 if (! in_signed_range (val, 0x1fff))
2355 as_bad ("relocation overflow");
2357 buf[2] |= (val >> 8) & 0x1f;
2361 case BFD_RELOC_SPARC_WDISP22:
2362 val = (val >> 2) + 1;
2364 case BFD_RELOC_SPARC_BASE22:
2365 buf[1] |= (val >> 16) & 0x3f;
2370 case BFD_RELOC_NONE:
2372 as_bad ("bad or unhandled relocation type: 0x%02x", fixP->fx_r_type);
2376 /* Are we finished with this relocation now? */
2377 if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
2383 /* Translate internal representation of relocation info to BFD target
2386 tc_gen_reloc (section, fixp)
2391 bfd_reloc_code_real_type code;
2393 reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
2394 assert (reloc != 0);
2396 reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
2397 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2399 switch (fixp->fx_r_type)
2403 case BFD_RELOC_HI22:
2404 case BFD_RELOC_LO10:
2405 case BFD_RELOC_32_PCREL_S2:
2406 case BFD_RELOC_SPARC13:
2407 case BFD_RELOC_SPARC_BASE13:
2408 case BFD_RELOC_SPARC_WDISP16:
2409 case BFD_RELOC_SPARC_WDISP19:
2410 case BFD_RELOC_SPARC_WDISP22:
2412 case BFD_RELOC_SPARC_5:
2413 case BFD_RELOC_SPARC_6:
2414 case BFD_RELOC_SPARC_10:
2415 case BFD_RELOC_SPARC_11:
2416 case BFD_RELOC_SPARC_HH22:
2417 case BFD_RELOC_SPARC_HM10:
2418 case BFD_RELOC_SPARC_LM22:
2419 case BFD_RELOC_SPARC_PC_HH22:
2420 case BFD_RELOC_SPARC_PC_HM10:
2421 case BFD_RELOC_SPARC_PC_LM22:
2422 code = fixp->fx_r_type;
2428 #if defined (OBJ_ELF) || defined (OBJ_AOUT)
2429 /* If we are generating PIC code, we need to generate a different
2433 #define GOT_NAME "_GLOBAL_OFFSET_TABLE_"
2435 #define GOT_NAME "__GLOBAL_OFFSET_TABLE_"
2442 case BFD_RELOC_32_PCREL_S2:
2443 if (! S_IS_DEFINED (fixp->fx_addsy)
2444 || S_IS_EXTERNAL (fixp->fx_addsy)
2445 || S_IS_WEAK (fixp->fx_addsy))
2446 code = BFD_RELOC_SPARC_WPLT30;
2448 case BFD_RELOC_HI22:
2449 if (fixp->fx_addsy != NULL
2450 && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
2451 code = BFD_RELOC_SPARC_PC22;
2453 code = BFD_RELOC_SPARC_GOT22;
2455 case BFD_RELOC_LO10:
2456 if (fixp->fx_addsy != NULL
2457 && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
2458 code = BFD_RELOC_SPARC_PC10;
2460 code = BFD_RELOC_SPARC_GOT10;
2462 case BFD_RELOC_SPARC13:
2463 code = BFD_RELOC_SPARC_GOT13;
2469 #endif /* defined (OBJ_ELF) || defined (OBJ_AOUT) */
2471 reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
2472 if (reloc->howto == 0)
2474 as_bad_where (fixp->fx_file, fixp->fx_line,
2475 "internal error: can't export reloc type %d (`%s')",
2476 fixp->fx_r_type, bfd_get_reloc_code_name (code));
2480 /* @@ Why fx_addnumber sometimes and fx_offset other times? */
2483 if (reloc->howto->pc_relative == 0
2484 || code == BFD_RELOC_SPARC_PC10
2485 || code == BFD_RELOC_SPARC_PC22)
2486 reloc->addend = fixp->fx_addnumber;
2488 reloc->addend = fixp->fx_offset - reloc->address;
2490 #else /* elf or coff */
2492 if (reloc->howto->pc_relative == 0
2493 || code == BFD_RELOC_SPARC_PC10
2494 || code == BFD_RELOC_SPARC_PC22)
2495 reloc->addend = fixp->fx_addnumber;
2496 else if ((fixp->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0)
2497 reloc->addend = (section->vma
2498 + fixp->fx_addnumber
2499 + md_pcrel_from (fixp));
2501 reloc->addend = fixp->fx_offset;
2509 /* for debugging only */
2512 struct sparc_it *insn;
2514 const char *const Reloc[] = {
2543 fprintf (stderr, "ERROR: %s\n");
2544 fprintf (stderr, "opcode=0x%08x\n", insn->opcode);
2545 fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]);
2546 fprintf (stderr, "exp = {\n");
2547 fprintf (stderr, "\t\tX_add_symbol = %s\n",
2548 ((insn->exp.X_add_symbol != NULL)
2549 ? ((S_GET_NAME (insn->exp.X_add_symbol) != NULL)
2550 ? S_GET_NAME (insn->exp.X_add_symbol)
2553 fprintf (stderr, "\t\tX_sub_symbol = %s\n",
2554 ((insn->exp.X_op_symbol != NULL)
2555 ? (S_GET_NAME (insn->exp.X_op_symbol)
2556 ? S_GET_NAME (insn->exp.X_op_symbol)
2559 fprintf (stderr, "\t\tX_add_number = %d\n",
2560 insn->exp.X_add_number);
2561 fprintf (stderr, "}\n");
2567 * Invocation line includes a switch not recognized by the base assembler.
2568 * See if it's a processor-specific option. These are:
2571 * Warn on architecture bumps. See also -A.
2573 * -Av6, -Av7, -Av8, -Av9, -Av9a, -Asparclite
2574 * -xarch=v8plus, -xarch=v8plusa
2575 * Select the architecture. Instructions or features not
2576 * supported by the selected architecture cause fatal errors.
2578 * The default is to start at v6, and bump the architecture up
2579 * whenever an instruction is seen at a higher level. If 32 bit
2580 * environments, v9 is not bumped up to, the user must pass -Av9.
2582 * -xarch=v8plus{,a} is for compatibility with the Sun assembler.
2584 * If -bump is specified, a warning is printing when bumping to
2587 * If an architecture is specified, all instructions must match
2588 * that architecture. Any higher level instructions are flagged
2589 * as errors. Note that in the 32 bit environment specifying
2590 * -Av9 does not automatically create a v9 object file, a v9
2591 * insn must be seen.
2593 * If both an architecture and -bump are specified, the
2594 * architecture starts at the specified level, but bumps are
2595 * warnings. Note that we can't set `current_architecture' to
2596 * the requested level in this case: in the 32 bit environment,
2597 * we still must avoid creating v9 object files unless v9 insns
2601 * Bumping between incompatible architectures is always an
2602 * error. For example, from sparclite to v9.
2606 CONST char *md_shortopts = "A:K:VQ:sq";
2609 CONST char *md_shortopts = "A:k";
2611 CONST char *md_shortopts = "A:";
2614 struct option md_longopts[] = {
2615 #define OPTION_BUMP (OPTION_MD_BASE)
2616 {"bump", no_argument, NULL, OPTION_BUMP},
2617 #define OPTION_SPARC (OPTION_MD_BASE + 1)
2618 {"sparc", no_argument, NULL, OPTION_SPARC},
2619 #define OPTION_XARCH (OPTION_MD_BASE + 2)
2620 {"xarch", required_argument, NULL, OPTION_XARCH},
2621 {NULL, no_argument, NULL, 0}
2623 size_t md_longopts_size = sizeof(md_longopts);
2626 md_parse_option (c, arg)
2634 warn_after_architecture = SPARC_OPCODE_ARCH_V6;
2638 /* ??? We could add v8plus and v8plusa to sparc_opcode_archs.
2639 But we might want v8plus to mean something different than v9
2640 someday, and we'd recognize more -xarch options than Sun's
2641 assembler does (which may lead to a conflict someday). */
2642 if (strcmp (arg, "v8plus") == 0)
2644 else if (strcmp (arg, "v8plusa") == 0)
2648 as_bad ("invalid architecture -xarch=%s", arg);
2656 enum sparc_opcode_arch_val new_arch = sparc_opcode_lookup_arch (arg);
2658 if (new_arch == SPARC_OPCODE_ARCH_BAD)
2660 as_bad ("invalid architecture -A%s", arg);
2665 max_architecture = new_arch;
2666 architecture_requested = 1;
2672 /* Ignore -sparc, used by SunOS make default .s.o rule. */
2683 print_version_id ();
2687 /* Qy - do emit .comment
2688 Qn - do not emit .comment */
2692 /* use .stab instead of .stab.excl */
2696 /* quick -- native assembler does fewer checks */
2700 if (strcmp (arg, "PIC") != 0)
2701 as_warn ("Unrecognized option following -K");
2715 md_show_usage (stream)
2718 const struct sparc_opcode_arch *arch;
2720 fprintf(stream, "SPARC options:\n");
2721 for (arch = &sparc_opcode_archs[0]; arch->name; arch++)
2723 if (arch != &sparc_opcode_archs[0])
2724 fprintf (stream, " | ");
2725 fprintf (stream, "-A%s", arch->name);
2727 fprintf (stream, "\n-xarch=v8plus | -xarch=v8plusa\n");
2729 specify variant of SPARC architecture\n\
2730 -bump warn when assembler switches architectures\n\
2734 -k generate PIC\n");
2738 -KPIC generate PIC\n\
2739 -V print assembler version number\n\
2746 /* We have no need to default values of symbols. */
2750 md_undefined_symbol (name)
2754 } /* md_undefined_symbol() */
2756 /* Round up a section size to the appropriate boundary. */
2758 md_section_align (segment, size)
2763 /* This is not right for ELF; a.out wants it, and COFF will force
2764 the alignment anyways. */
2765 valueT align = ((valueT) 1
2766 << (valueT) bfd_get_section_alignment (stdoutput, segment));
2768 /* turn alignment value into a mask */
2770 newsize = (size + align) & ~align;
2777 /* Exactly what point is a PC-relative offset relative TO?
2778 On the sparc, they're relative to the address of the offset, plus
2779 its size. This gets us to the following instruction.
2780 (??? Is this right? FIXME-SOON) */
2782 md_pcrel_from (fixP)
2787 ret = fixP->fx_where + fixP->fx_frag->fr_address;
2788 if (! sparc_pic_code
2789 || fixP->fx_addsy == NULL
2790 || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0)
2791 ret += fixP->fx_size;
2795 /* end of tc-sparc.c */