1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright (C) 1993-2014 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
26 #include "opcodes/sh-opc.h"
27 #include "safe-ctype.h"
28 #include "struc-symbol.h"
34 #include "dwarf2dbg.h"
35 #include "dw2gencfi.h"
41 expressionS immediate;
45 const char comment_chars[] = "!";
46 const char line_separator_chars[] = ";";
47 const char line_comment_chars[] = "!#";
49 static void s_uses (int);
50 static void s_uacons (int);
53 static void sh_elf_cons (int);
55 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
59 big (int ignore ATTRIBUTE_UNUSED)
61 if (! target_big_endian)
62 as_bad (_("directive .big encountered when option -big required"));
64 /* Stop further messages. */
65 target_big_endian = 1;
69 little (int ignore ATTRIBUTE_UNUSED)
71 if (target_big_endian)
72 as_bad (_("directive .little encountered when option -little required"));
74 /* Stop further messages. */
75 target_big_endian = 0;
78 /* This table describes all the machine specific pseudo-ops the assembler
79 has to support. The fields are:
80 pseudo-op name without dot
81 function to call to execute this pseudo-op
82 Integer arg to pass to the function. */
84 const pseudo_typeS md_pseudo_table[] =
87 {"long", sh_elf_cons, 4},
88 {"int", sh_elf_cons, 4},
89 {"word", sh_elf_cons, 2},
90 {"short", sh_elf_cons, 2},
96 {"form", listing_psize, 0},
97 {"little", little, 0},
98 {"heading", listing_title, 0},
99 {"import", s_ignore, 0},
100 {"page", listing_eject, 0},
101 {"program", s_ignore, 0},
103 {"uaword", s_uacons, 2},
104 {"ualong", s_uacons, 4},
105 {"uaquad", s_uacons, 8},
106 {"2byte", s_uacons, 2},
107 {"4byte", s_uacons, 4},
108 {"8byte", s_uacons, 8},
110 {"mode", s_sh64_mode, 0 },
112 /* Have the old name too. */
113 {"isa", s_sh64_mode, 0 },
115 /* Assert that the right ABI is used. */
116 {"abi", s_sh64_abi, 0 },
118 { "vtable_inherit", sh64_vtable_inherit, 0 },
119 { "vtable_entry", sh64_vtable_entry, 0 },
120 #endif /* HAVE_SH64 */
124 int sh_relax; /* set if -relax seen */
126 /* Whether -small was seen. */
130 /* Flag to generate relocations against symbol values for local symbols. */
132 static int dont_adjust_reloc_32;
134 /* Flag to indicate that '$' is allowed as a register prefix. */
136 static int allow_dollar_register_prefix;
138 /* Preset architecture set, if given; zero otherwise. */
140 static unsigned int preset_target_arch;
142 /* The bit mask of architectures that could
143 accommodate the insns seen so far. */
144 static unsigned int valid_arch;
147 /* Whether --fdpic was given. */
151 const char EXP_CHARS[] = "eE";
153 /* Chars that mean this number is a floating point constant. */
156 const char FLT_CHARS[] = "rRsSfFdDxXpP";
158 #define C(a,b) ENCODE_RELAX(a,b)
160 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
161 #define GET_WHAT(x) ((x>>4))
163 /* These are the three types of relaxable instruction. */
164 /* These are the types of relaxable instructions; except for END which is
167 #define COND_JUMP_DELAY 2
168 #define UNCOND_JUMP 3
172 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
173 #define SH64PCREL16_32 4
174 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
175 #define SH64PCREL16_64 5
177 /* Variants of the above for adjusting the insn to PTA or PTB according to
179 #define SH64PCREL16PT_32 6
180 #define SH64PCREL16PT_64 7
182 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
183 #define MOVI_IMM_32 8
184 #define MOVI_IMM_32_PCREL 9
185 #define MOVI_IMM_64 10
186 #define MOVI_IMM_64_PCREL 11
189 #else /* HAVE_SH64 */
193 #endif /* HAVE_SH64 */
199 #define UNDEF_WORD_DISP 4
205 #define UNDEF_SH64PCREL 0
206 #define SH64PCREL16 1
207 #define SH64PCREL32 2
208 #define SH64PCREL48 3
209 #define SH64PCREL64 4
210 #define SH64PCRELPLT 5
218 #define MOVI_GOTOFF 6
220 #endif /* HAVE_SH64 */
222 /* Branch displacements are from the address of the branch plus
223 four, thus all minimum and maximum values have 4 added to them. */
226 #define COND8_LENGTH 2
228 /* There is one extra instruction before the branch, so we must add
229 two more bytes to account for it. */
230 #define COND12_F 4100
231 #define COND12_M -4090
232 #define COND12_LENGTH 6
234 #define COND12_DELAY_LENGTH 4
236 /* ??? The minimum and maximum values are wrong, but this does not matter
237 since this relocation type is not supported yet. */
238 #define COND32_F (1<<30)
239 #define COND32_M -(1<<30)
240 #define COND32_LENGTH 14
242 #define UNCOND12_F 4098
243 #define UNCOND12_M -4092
244 #define UNCOND12_LENGTH 2
246 /* ??? The minimum and maximum values are wrong, but this does not matter
247 since this relocation type is not supported yet. */
248 #define UNCOND32_F (1<<30)
249 #define UNCOND32_M -(1<<30)
250 #define UNCOND32_LENGTH 14
253 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
254 TRd" as is the current insn, so no extra length. Note that the "reach"
255 is calculated from the address *after* that insn, but the offset in the
256 insn is calculated from the beginning of the insn. We also need to
257 take into account the implicit 1 coded as the "A" in PTA when counting
258 forward. If PTB reaches an odd address, we trap that as an error
259 elsewhere, so we don't have to have different relaxation entries. We
260 don't add a one to the negative range, since PTB would then have the
261 farthest backward-reaching value skipped, not generated at relaxation. */
262 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
263 #define SH64PCREL16_M (-32768 * 4 - 4)
264 #define SH64PCREL16_LENGTH 0
266 /* The next step is to change that PT insn into
267 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
268 SHORI (label - datalabel Ln) & 65535, R25
271 which means two extra insns, 8 extra bytes. This is the limit for the
274 The expressions look a bit bad since we have to adjust this to avoid overflow on a
276 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
277 #define SH64PCREL32_LENGTH (2 * 4)
279 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
281 #if BFD_HOST_64BIT_LONG
282 /* The "reach" type is long, so we can only do this for a 64-bit-long
284 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
285 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
286 #define SH64PCREL48_M (((long) -1 << 47) - 4)
287 #define SH64PCREL48_LENGTH (3 * 4)
289 /* If the host does not have 64-bit longs, just make this state identical
290 in reach to the 32-bit state. Note that we have a slightly incorrect
291 reach, but the correct one above will overflow a 32-bit number. */
292 #define SH64PCREL32_M (((long) -1 << 30) * 2)
293 #define SH64PCREL48_F SH64PCREL32_F
294 #define SH64PCREL48_M SH64PCREL32_M
295 #define SH64PCREL48_LENGTH (3 * 4)
296 #endif /* BFD_HOST_64BIT_LONG */
298 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
300 #define SH64PCREL64_LENGTH (4 * 4)
302 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
303 SH64PCREL expansions. The PCREL one is similar, but the other has no
304 pc-relative reach; it must be fully expanded in
305 shmedia_md_estimate_size_before_relax. */
306 #define MOVI_16_LENGTH 0
307 #define MOVI_16_F (32767 - 4)
308 #define MOVI_16_M (-32768 - 4)
309 #define MOVI_32_LENGTH 4
310 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
311 #define MOVI_48_LENGTH 8
313 #if BFD_HOST_64BIT_LONG
314 /* The "reach" type is long, so we can only do this for a 64-bit-long
316 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
317 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
318 #define MOVI_48_M (((long) -1 << 47) - 4)
320 /* If the host does not have 64-bit longs, just make this state identical
321 in reach to the 32-bit state. Note that we have a slightly incorrect
322 reach, but the correct one above will overflow a 32-bit number. */
323 #define MOVI_32_M (((long) -1 << 30) * 2)
324 #define MOVI_48_F MOVI_32_F
325 #define MOVI_48_M MOVI_32_M
326 #endif /* BFD_HOST_64BIT_LONG */
328 #define MOVI_64_LENGTH 12
329 #endif /* HAVE_SH64 */
331 #define EMPTY { 0, 0, 0, 0 }
333 const relax_typeS md_relax_table[C (END, 0)] = {
334 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
335 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
338 /* C (COND_JUMP, COND8) */
339 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
340 /* C (COND_JUMP, COND12) */
341 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
342 /* C (COND_JUMP, COND32) */
343 { COND32_F, COND32_M, COND32_LENGTH, 0, },
344 /* C (COND_JUMP, UNDEF_WORD_DISP) */
345 { 0, 0, COND32_LENGTH, 0, },
347 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
350 /* C (COND_JUMP_DELAY, COND8) */
351 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
352 /* C (COND_JUMP_DELAY, COND12) */
353 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
354 /* C (COND_JUMP_DELAY, COND32) */
355 { COND32_F, COND32_M, COND32_LENGTH, 0, },
356 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
357 { 0, 0, COND32_LENGTH, 0, },
359 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
362 /* C (UNCOND_JUMP, UNCOND12) */
363 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
364 /* C (UNCOND_JUMP, UNCOND32) */
365 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
367 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
368 { 0, 0, UNCOND32_LENGTH, 0, },
370 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
373 /* C (SH64PCREL16_32, SH64PCREL16) */
375 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) },
376 /* C (SH64PCREL16_32, SH64PCREL32) */
377 { 0, 0, SH64PCREL32_LENGTH, 0 },
379 /* C (SH64PCREL16_32, SH64PCRELPLT) */
380 { 0, 0, SH64PCREL32_LENGTH, 0 },
382 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
384 /* C (SH64PCREL16_64, SH64PCREL16) */
386 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) },
387 /* C (SH64PCREL16_64, SH64PCREL32) */
388 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) },
389 /* C (SH64PCREL16_64, SH64PCREL48) */
390 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) },
391 /* C (SH64PCREL16_64, SH64PCREL64) */
392 { 0, 0, SH64PCREL64_LENGTH, 0 },
393 /* C (SH64PCREL16_64, SH64PCRELPLT) */
394 { 0, 0, SH64PCREL64_LENGTH, 0 },
396 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
398 /* C (SH64PCREL16PT_32, SH64PCREL16) */
400 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) },
401 /* C (SH64PCREL16PT_32, SH64PCREL32) */
402 { 0, 0, SH64PCREL32_LENGTH, 0 },
404 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
405 { 0, 0, SH64PCREL32_LENGTH, 0 },
407 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
409 /* C (SH64PCREL16PT_64, SH64PCREL16) */
411 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) },
412 /* C (SH64PCREL16PT_64, SH64PCREL32) */
416 C (SH64PCREL16PT_64, SH64PCREL48) },
417 /* C (SH64PCREL16PT_64, SH64PCREL48) */
418 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) },
419 /* C (SH64PCREL16PT_64, SH64PCREL64) */
420 { 0, 0, SH64PCREL64_LENGTH, 0 },
421 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
422 { 0, 0, SH64PCREL64_LENGTH, 0},
424 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
426 /* C (MOVI_IMM_32, UNDEF_MOVI) */
427 { 0, 0, MOVI_32_LENGTH, 0 },
428 /* C (MOVI_IMM_32, MOVI_16) */
429 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) },
430 /* C (MOVI_IMM_32, MOVI_32) */
431 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 },
433 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
434 { 0, 0, MOVI_32_LENGTH, 0 },
435 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
437 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
439 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) },
440 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
441 { 0, 0, MOVI_32_LENGTH, 0 },
443 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
444 { 0, 0, MOVI_32_LENGTH, 0 },
446 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
447 { 0, 0, MOVI_32_LENGTH, 0 },
448 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
450 /* C (MOVI_IMM_64, UNDEF_MOVI) */
451 { 0, 0, MOVI_64_LENGTH, 0 },
452 /* C (MOVI_IMM_64, MOVI_16) */
453 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) },
454 /* C (MOVI_IMM_64, MOVI_32) */
455 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) },
456 /* C (MOVI_IMM_64, MOVI_48) */
457 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) },
458 /* C (MOVI_IMM_64, MOVI_64) */
459 { 0, 0, MOVI_64_LENGTH, 0 },
461 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
462 { 0, 0, MOVI_64_LENGTH, 0 },
463 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
465 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
467 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) },
468 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
469 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) },
470 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
471 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) },
472 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
473 { 0, 0, MOVI_64_LENGTH, 0 },
474 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
475 { 0, 0, MOVI_64_LENGTH, 0 },
477 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
478 { 0, 0, MOVI_64_LENGTH, 0 },
479 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
481 #endif /* HAVE_SH64 */
487 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
491 /* Determinet whether the symbol needs any kind of PIC relocation. */
494 sh_PIC_related_p (symbolS *sym)
501 if (sym == GOT_symbol)
505 if (sh_PIC_related_p (*symbol_get_tc (sym)))
509 exp = symbol_get_value_expression (sym);
511 return (exp->X_op == O_PIC_reloc
512 || sh_PIC_related_p (exp->X_add_symbol)
513 || sh_PIC_related_p (exp->X_op_symbol));
516 /* Determine the relocation type to be used to represent the
517 expression, that may be rearranged. */
520 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p)
522 expressionS *exp = main_exp;
524 /* This is here for backward-compatibility only. GCC used to generated:
526 f@PLT + . - (.LPCS# + 2)
528 but we'd rather be able to handle this as a PIC-related reference
529 plus/minus a symbol. However, gas' parser gives us:
531 O_subtract (O_add (f@PLT, .), .LPCS#+2)
533 so we attempt to transform this into:
535 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
537 which we can handle simply below. */
538 if (exp->X_op == O_subtract)
540 if (sh_PIC_related_p (exp->X_op_symbol))
543 exp = symbol_get_value_expression (exp->X_add_symbol);
545 if (exp && sh_PIC_related_p (exp->X_op_symbol))
548 if (exp && exp->X_op == O_add
549 && sh_PIC_related_p (exp->X_add_symbol))
551 symbolS *sym = exp->X_add_symbol;
553 exp->X_op = O_subtract;
554 exp->X_add_symbol = main_exp->X_op_symbol;
556 main_exp->X_op_symbol = main_exp->X_add_symbol;
557 main_exp->X_add_symbol = sym;
559 main_exp->X_add_number += exp->X_add_number;
560 exp->X_add_number = 0;
565 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol))
568 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract)
571 if (exp->X_add_symbol
572 && (exp->X_add_symbol == GOT_symbol
574 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol)))
578 case BFD_RELOC_SH_IMM_LOW16:
579 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16;
582 case BFD_RELOC_SH_IMM_MEDLOW16:
583 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16;
586 case BFD_RELOC_SH_IMM_MEDHI16:
587 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16;
590 case BFD_RELOC_SH_IMM_HI16:
591 *r_type_p = BFD_RELOC_SH_GOTPC_HI16;
595 case BFD_RELOC_UNUSED:
596 *r_type_p = BFD_RELOC_SH_GOTPC;
605 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
607 *r_type_p = BFD_RELOC_SH_GOTPC;
611 exp = symbol_get_value_expression (exp->X_add_symbol);
616 if (exp->X_op == O_PIC_reloc)
621 case BFD_RELOC_UNUSED:
622 *r_type_p = exp->X_md;
625 case BFD_RELOC_SH_DISP20:
628 case BFD_RELOC_32_GOT_PCREL:
629 *r_type_p = BFD_RELOC_SH_GOT20;
632 case BFD_RELOC_32_GOTOFF:
633 *r_type_p = BFD_RELOC_SH_GOTOFF20;
636 case BFD_RELOC_SH_GOTFUNCDESC:
637 *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20;
640 case BFD_RELOC_SH_GOTOFFFUNCDESC:
641 *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20;
650 case BFD_RELOC_SH_IMM_LOW16:
653 case BFD_RELOC_32_GOTOFF:
654 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16;
657 case BFD_RELOC_SH_GOTPLT32:
658 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16;
661 case BFD_RELOC_32_GOT_PCREL:
662 *r_type_p = BFD_RELOC_SH_GOT_LOW16;
665 case BFD_RELOC_32_PLT_PCREL:
666 *r_type_p = BFD_RELOC_SH_PLT_LOW16;
674 case BFD_RELOC_SH_IMM_MEDLOW16:
677 case BFD_RELOC_32_GOTOFF:
678 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16;
681 case BFD_RELOC_SH_GOTPLT32:
682 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16;
685 case BFD_RELOC_32_GOT_PCREL:
686 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16;
689 case BFD_RELOC_32_PLT_PCREL:
690 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16;
698 case BFD_RELOC_SH_IMM_MEDHI16:
701 case BFD_RELOC_32_GOTOFF:
702 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16;
705 case BFD_RELOC_SH_GOTPLT32:
706 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16;
709 case BFD_RELOC_32_GOT_PCREL:
710 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16;
713 case BFD_RELOC_32_PLT_PCREL:
714 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16;
722 case BFD_RELOC_SH_IMM_HI16:
725 case BFD_RELOC_32_GOTOFF:
726 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16;
729 case BFD_RELOC_SH_GOTPLT32:
730 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16;
733 case BFD_RELOC_32_GOT_PCREL:
734 *r_type_p = BFD_RELOC_SH_GOT_HI16;
737 case BFD_RELOC_32_PLT_PCREL:
738 *r_type_p = BFD_RELOC_SH_PLT_HI16;
751 exp->X_op = O_symbol;
754 main_exp->X_add_symbol = exp->X_add_symbol;
755 main_exp->X_add_number += exp->X_add_number;
759 return (sh_PIC_related_p (exp->X_add_symbol)
760 || sh_PIC_related_p (exp->X_op_symbol));
765 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
768 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp,
769 bfd_reloc_code_real_type r_type)
771 r_type = BFD_RELOC_UNUSED;
773 if (sh_check_fixup (exp, &r_type))
774 as_bad (_("Invalid PIC expression."));
776 if (r_type == BFD_RELOC_UNUSED)
780 r_type = BFD_RELOC_8;
784 r_type = BFD_RELOC_16;
788 r_type = BFD_RELOC_32;
792 r_type = BFD_RELOC_64;
801 as_bad (_("unsupported BFD relocation size %u"), size);
802 r_type = BFD_RELOC_UNUSED;
805 fix_new_exp (frag, off, size, exp, 0, r_type);
808 /* The regular cons() function, that reads constants, doesn't support
809 suffixes such as @GOT, @GOTOFF and @PLT, that generate
810 machine-specific relocation types. So we must define it here. */
811 /* Clobbers input_line_pointer, checks end-of-line. */
812 /* NBYTES 1=.byte, 2=.word, 4=.long */
814 sh_elf_cons (int nbytes)
820 /* Update existing range to include a previous insn, if there was one. */
821 sh64_update_contents_mark (TRUE);
823 /* We need to make sure the contents type is set to data. */
826 #endif /* HAVE_SH64 */
828 if (is_it_end_of_statement ())
830 demand_empty_rest_of_line ();
835 md_cons_align (nbytes);
841 emit_expr (&exp, (unsigned int) nbytes);
843 while (*input_line_pointer++ == ',');
845 input_line_pointer--; /* Put terminator back into stream. */
846 if (*input_line_pointer == '#' || *input_line_pointer == '!')
848 while (! is_end_of_line[(unsigned char) *input_line_pointer++]);
851 demand_empty_rest_of_line ();
854 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
858 align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2,
864 /* Start with offset initialised to difference between the two frags.
865 Prior to assigning frag addresses this will be zero. */
866 off = frag1->fr_address - frag2->fr_address;
873 /* Maybe frag2 is after frag1. */
875 while (frag->fr_type == rs_fill
876 || frag->fr_type == rs_align_test)
878 if (frag->fr_type == rs_fill)
879 off += frag->fr_fix + frag->fr_offset * frag->fr_var;
882 frag = frag->fr_next;
892 /* Maybe frag1 is after frag2. */
893 off = frag1->fr_address - frag2->fr_address;
895 while (frag->fr_type == rs_fill
896 || frag->fr_type == rs_align_test)
898 if (frag->fr_type == rs_fill)
899 off -= frag->fr_fix + frag->fr_offset * frag->fr_var;
902 frag = frag->fr_next;
915 /* Optimize a difference of symbols which have rs_align_test frag if
919 sh_optimize_expr (expressionS *l, operatorT op, expressionS *r)
924 && l->X_op == O_symbol
925 && r->X_op == O_symbol
926 && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol)
927 && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol))
928 || r->X_add_symbol == l->X_add_symbol)
929 && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol),
930 symbol_get_frag (r->X_add_symbol),
933 offsetT symval_diff = S_GET_VALUE (l->X_add_symbol)
934 - S_GET_VALUE (r->X_add_symbol);
935 subtract_from_result (l, r->X_add_number, r->X_extrabit);
936 subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0);
937 add_to_result (l, symval_diff, symval_diff < 0);
938 l->X_op = O_constant;
946 /* This function is called once, at assembler startup time. This should
947 set up all the tables, etc that the MD part of the assembler needs. */
952 const sh_opcode_info *opcode;
953 char *prev_name = "";
954 unsigned int target_arch;
957 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp;
958 valid_arch = target_arch;
964 opcode_hash_control = hash_new ();
966 /* Insert unique names into hash table. */
967 for (opcode = sh_table; opcode->name; opcode++)
969 if (strcmp (prev_name, opcode->name) != 0)
971 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch))
973 prev_name = opcode->name;
974 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
981 static int reg_x, reg_y;
985 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
987 /* Try to parse a reg name. Return the number of chars consumed. */
990 parse_reg_without_prefix (char *src, int *mode, int *reg)
992 char l0 = TOLOWER (src[0]);
993 char l1 = l0 ? TOLOWER (src[1]) : 0;
995 /* We use ! IDENT_CHAR for the next character after the register name, to
996 make sure that we won't accidentally recognize a symbol name such as
997 'sram' or sr_ram as being a reference to the register 'sr'. */
1003 if (src[2] >= '0' && src[2] <= '5'
1004 && ! IDENT_CHAR ((unsigned char) src[3]))
1007 *reg = 10 + src[2] - '0';
1011 if (l1 >= '0' && l1 <= '9'
1012 && ! IDENT_CHAR ((unsigned char) src[2]))
1018 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0
1019 && ! IDENT_CHAR ((unsigned char) src[7]))
1026 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
1031 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
1042 if (! IDENT_CHAR ((unsigned char) src[2]))
1048 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
1057 if (! IDENT_CHAR ((unsigned char) src[2]))
1063 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
1071 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1'
1072 && ! IDENT_CHAR ((unsigned char) src[3]))
1075 *reg = 4 + (l1 - '0');
1078 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1'
1079 && ! IDENT_CHAR ((unsigned char) src[3]))
1082 *reg = 6 + (l1 - '0');
1085 if (l1 == 's' && src[2] >= '0' && src[2] <= '3'
1086 && ! IDENT_CHAR ((unsigned char) src[3]))
1091 *reg = n | ((~n & 2) << 1);
1096 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2]))
1118 if (l0 == 'x' && l1 >= '0' && l1 <= '1'
1119 && ! IDENT_CHAR ((unsigned char) src[2]))
1122 *reg = A_X0_NUM + l1 - '0';
1126 if (l0 == 'y' && l1 >= '0' && l1 <= '1'
1127 && ! IDENT_CHAR ((unsigned char) src[2]))
1130 *reg = A_Y0_NUM + l1 - '0';
1134 if (l0 == 'm' && l1 >= '0' && l1 <= '1'
1135 && ! IDENT_CHAR ((unsigned char) src[2]))
1138 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM;
1144 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
1150 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c'
1151 && ! IDENT_CHAR ((unsigned char) src[3]))
1157 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r'
1158 && ! IDENT_CHAR ((unsigned char) src[3]))
1164 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r'
1165 && ! IDENT_CHAR ((unsigned char) src[3]))
1171 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1172 && ! IDENT_CHAR ((unsigned char) src[3]))
1178 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
1184 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
1191 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
1196 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
1198 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1199 and use an uninitialized immediate. */
1203 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1204 && ! IDENT_CHAR ((unsigned char) src[3]))
1209 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1210 && ! IDENT_CHAR ((unsigned char) src[3]))
1216 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1217 && ! IDENT_CHAR ((unsigned char) src[3]))
1222 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c'
1223 && ! IDENT_CHAR ((unsigned char) src[4]))
1225 if (TOLOWER (src[3]) == 'l')
1230 if (TOLOWER (src[3]) == 'h')
1236 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd'
1237 && ! IDENT_CHAR ((unsigned char) src[3]))
1242 if (l0 == 'f' && l1 == 'r')
1246 if (src[3] >= '0' && src[3] <= '5'
1247 && ! IDENT_CHAR ((unsigned char) src[4]))
1250 *reg = 10 + src[3] - '0';
1254 if (src[2] >= '0' && src[2] <= '9'
1255 && ! IDENT_CHAR ((unsigned char) src[3]))
1258 *reg = (src[2] - '0');
1262 if (l0 == 'd' && l1 == 'r')
1266 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
1267 && ! IDENT_CHAR ((unsigned char) src[4]))
1270 *reg = 10 + src[3] - '0';
1274 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
1275 && ! IDENT_CHAR ((unsigned char) src[3]))
1278 *reg = (src[2] - '0');
1282 if (l0 == 'x' && l1 == 'd')
1286 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
1287 && ! IDENT_CHAR ((unsigned char) src[4]))
1290 *reg = 11 + src[3] - '0';
1294 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
1295 && ! IDENT_CHAR ((unsigned char) src[3]))
1298 *reg = (src[2] - '0') + 1;
1302 if (l0 == 'f' && l1 == 'v')
1304 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
1310 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
1311 && ! IDENT_CHAR ((unsigned char) src[3]))
1314 *reg = (src[2] - '0');
1318 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u'
1319 && TOLOWER (src[3]) == 'l'
1320 && ! IDENT_CHAR ((unsigned char) src[4]))
1326 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's'
1327 && TOLOWER (src[3]) == 'c'
1328 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
1334 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't'
1335 && TOLOWER (src[3]) == 'r'
1336 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
1345 /* Like parse_reg_without_prefix, but this version supports
1346 $-prefixed register names if enabled by the user. */
1349 parse_reg (char *src, int *mode, int *reg)
1351 unsigned int prefix;
1352 unsigned int consumed;
1356 if (allow_dollar_register_prefix)
1367 consumed = parse_reg_without_prefix (src, mode, reg);
1372 return consumed + prefix;
1376 parse_exp (char *s, sh_operand_info *op)
1381 save = input_line_pointer;
1382 input_line_pointer = s;
1383 expression (&op->immediate);
1384 if (op->immediate.X_op == O_absent)
1385 as_bad (_("missing operand"));
1386 new_pointer = input_line_pointer;
1387 input_line_pointer = save;
1391 /* The many forms of operand:
1394 @Rn Register indirect
1407 pr, gbr, vbr, macl, mach
1411 parse_at (char *src, sh_operand_info *op)
1418 src = parse_at (src, op);
1419 if (op->type == A_DISP_TBR)
1420 op->type = A_DISP2_TBR;
1422 as_bad (_("illegal double indirection"));
1424 else if (src[0] == '-')
1426 /* Must be predecrement. */
1429 len = parse_reg (src, &mode, &(op->reg));
1430 if (mode != A_REG_N)
1431 as_bad (_("illegal register after @-"));
1436 else if (src[0] == '(')
1438 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1441 len = parse_reg (src, &mode, &(op->reg));
1442 if (len && mode == A_REG_N)
1447 as_bad (_("must be @(r0,...)"));
1452 /* Now can be rn or gbr. */
1453 len = parse_reg (src, &mode, &(op->reg));
1463 op->type = A_R0_GBR;
1465 else if (mode == A_REG_N)
1467 op->type = A_IND_R0_REG_N;
1471 as_bad (_("syntax error in @(r0,...)"));
1476 as_bad (_("syntax error in @(r0...)"));
1481 /* Must be an @(disp,.. thing). */
1482 src = parse_exp (src, op);
1485 /* Now can be rn, gbr or pc. */
1486 len = parse_reg (src, &mode, &op->reg);
1489 if (mode == A_REG_N)
1491 op->type = A_DISP_REG_N;
1493 else if (mode == A_GBR)
1495 op->type = A_DISP_GBR;
1497 else if (mode == A_TBR)
1499 op->type = A_DISP_TBR;
1501 else if (mode == A_PC)
1503 /* We want @(expr, pc) to uniformly address . + expr,
1504 no matter if expr is a constant, or a more complex
1505 expression, e.g. sym-. or sym1-sym2.
1506 However, we also used to accept @(sym,pc)
1507 as addressing sym, i.e. meaning the same as plain sym.
1508 Some existing code does use the @(sym,pc) syntax, so
1509 we give it the old semantics for now, but warn about
1510 its use, so that users have some time to fix their code.
1512 Note that due to this backward compatibility hack,
1513 we'll get unexpected results when @(offset, pc) is used,
1514 and offset is a symbol that is set later to an an address
1515 difference, or an external symbol that is set to an
1516 address difference in another source file, so we want to
1517 eventually remove it. */
1518 if (op->immediate.X_op == O_symbol)
1520 op->type = A_DISP_PC;
1521 as_warn (_("Deprecated syntax."));
1525 op->type = A_DISP_PC_ABS;
1526 /* Such operands don't get corrected for PC==.+4, so
1527 make the correction here. */
1528 op->immediate.X_add_number -= 4;
1533 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1538 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1543 as_bad (_("expecting )"));
1549 src += parse_reg (src, &mode, &(op->reg));
1550 if (mode != A_REG_N)
1551 as_bad (_("illegal register after @"));
1558 l0 = TOLOWER (src[0]);
1559 l1 = TOLOWER (src[1]);
1561 if ((l0 == 'r' && l1 == '8')
1562 || (l0 == 'i' && (l1 == 'x' || l1 == 's')))
1565 op->type = AX_PMOD_N;
1567 else if ( (l0 == 'r' && l1 == '9')
1568 || (l0 == 'i' && l1 == 'y'))
1571 op->type = AY_PMOD_N;
1583 get_operand (char **ptr, sh_operand_info *op)
1592 *ptr = parse_exp (src, op);
1597 else if (src[0] == '@')
1599 *ptr = parse_at (src, op);
1602 len = parse_reg (src, &mode, &(op->reg));
1611 /* Not a reg, the only thing left is a displacement. */
1612 *ptr = parse_exp (src, op);
1613 op->type = A_DISP_PC;
1619 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand)
1624 /* The pre-processor will eliminate whitespace in front of '@'
1625 after the first argument; we may be called multiple times
1626 from assemble_ppi, so don't insist on finding whitespace here. */
1630 get_operand (&ptr, operand + 0);
1637 get_operand (&ptr, operand + 1);
1638 /* ??? Hack: psha/pshl have a varying operand number depending on
1639 the type of the first operand. We handle this by having the
1640 three-operand version first and reducing the number of operands
1641 parsed to two if we see that the first operand is an immediate.
1642 This works because no insn with three operands has an immediate
1643 as first operand. */
1644 if (info->arg[2] && operand[0].type != A_IMM)
1650 get_operand (&ptr, operand + 2);
1654 operand[2].type = 0;
1659 operand[1].type = 0;
1660 operand[2].type = 0;
1665 operand[0].type = 0;
1666 operand[1].type = 0;
1667 operand[2].type = 0;
1672 /* Passed a pointer to a list of opcodes which use different
1673 addressing modes, return the opcode which matches the opcodes
1676 static sh_opcode_info *
1677 get_specific (sh_opcode_info *opcode, sh_operand_info *operands)
1679 sh_opcode_info *this_try = opcode;
1680 char *name = opcode->name;
1683 while (opcode->name)
1685 this_try = opcode++;
1686 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0))
1688 /* We've looked so far down the table that we've run out of
1689 opcodes with the same name. */
1693 /* Look at both operands needed by the opcodes and provided by
1694 the user - since an arg test will often fail on the same arg
1695 again and again, we'll try and test the last failing arg the
1696 first on each opcode try. */
1697 for (n = 0; this_try->arg[n]; n++)
1699 sh_operand_info *user = operands + n;
1700 sh_arg_type arg = this_try->arg[n];
1705 if (user->type == A_DISP_PC_ABS)
1716 if (user->type != arg)
1720 /* opcode needs r0 */
1721 if (user->type != A_REG_N || user->reg != 0)
1725 if (user->type != A_R0_GBR || user->reg != 0)
1729 if (user->type != F_REG_N || user->reg != 0)
1737 case A_IND_R0_REG_N:
1746 /* Opcode needs rn */
1747 if (user->type != arg)
1752 if (user->type != D_REG_N && user->type != X_REG_N)
1768 if (user->type != arg)
1773 if (user->type != arg)
1779 if (user->type != A_INC_N)
1781 if (user->reg != 15)
1787 if (user->type != A_DEC_N)
1789 if (user->reg != 15)
1798 case A_IND_R0_REG_M:
1801 /* Opcode needs rn */
1802 if (user->type != arg - A_REG_M + A_REG_N)
1808 if (user->type != A_DEC_N)
1810 if (user->reg < 2 || user->reg > 5)
1816 if (user->type != A_INC_N)
1818 if (user->reg < 2 || user->reg > 5)
1824 if (user->type != A_IND_N)
1826 if (user->reg < 2 || user->reg > 5)
1832 if (user->type != AX_PMOD_N)
1834 if (user->reg < 2 || user->reg > 5)
1840 if (user->type != A_INC_N)
1842 if (user->reg < 4 || user->reg > 5)
1848 if (user->type != A_IND_N)
1850 if (user->reg < 4 || user->reg > 5)
1856 if (user->type != AX_PMOD_N)
1858 if (user->reg < 4 || user->reg > 5)
1864 if (user->type != A_INC_N)
1866 if ((user->reg < 4 || user->reg > 5)
1867 && (user->reg < 0 || user->reg > 1))
1873 if (user->type != A_IND_N)
1875 if ((user->reg < 4 || user->reg > 5)
1876 && (user->reg < 0 || user->reg > 1))
1882 if (user->type != AX_PMOD_N)
1884 if ((user->reg < 4 || user->reg > 5)
1885 && (user->reg < 0 || user->reg > 1))
1891 if (user->type != A_INC_N)
1893 if (user->reg < 6 || user->reg > 7)
1899 if (user->type != A_IND_N)
1901 if (user->reg < 6 || user->reg > 7)
1907 if (user->type != AY_PMOD_N)
1909 if (user->reg < 6 || user->reg > 7)
1915 if (user->type != A_INC_N)
1917 if ((user->reg < 6 || user->reg > 7)
1918 && (user->reg < 2 || user->reg > 3))
1924 if (user->type != A_IND_N)
1926 if ((user->reg < 6 || user->reg > 7)
1927 && (user->reg < 2 || user->reg > 3))
1933 if (user->type != AY_PMOD_N)
1935 if ((user->reg < 6 || user->reg > 7)
1936 && (user->reg < 2 || user->reg > 3))
1942 if (user->type != DSP_REG_N)
1944 if (user->reg != A_A0_NUM
1945 && user->reg != A_A1_NUM)
1951 if (user->type != DSP_REG_N)
1973 if (user->type != DSP_REG_N)
1995 if (user->type != DSP_REG_N)
2017 if (user->type != DSP_REG_N)
2039 if (user->type != DSP_REG_N)
2061 if (user->type != DSP_REG_N)
2083 if (user->type != DSP_REG_N)
2105 if (user->type != DSP_REG_N)
2127 if (user->type != DSP_REG_N)
2149 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
2153 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
2157 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
2161 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
2165 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
2175 /* Opcode needs rn */
2176 if (user->type != arg - F_REG_M + F_REG_N)
2181 if (user->type != D_REG_N && user->type != X_REG_N)
2186 if (user->type != XMTRX_M4)
2192 printf (_("unhandled %d\n"), arg);
2195 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up)
2196 && ( arg == A_DISP_REG_M
2197 || arg == A_DISP_REG_N))
2199 /* Check a few key IMM* fields for overflow. */
2201 long val = user->immediate.X_add_number;
2203 for (opf = 0; opf < 4; opf ++)
2204 switch (this_try->nibbles[opf])
2208 if (val < 0 || val > 15)
2213 if (val < 0 || val > 15 * 2)
2218 if (val < 0 || val > 15 * 4)
2226 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch))
2228 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch);
2238 insert (char *where, int how, int pcrel, sh_operand_info *op)
2240 fix_new_exp (frag_now,
2241 where - frag_now->fr_literal,
2249 insert4 (char * where, int how, int pcrel, sh_operand_info * op)
2251 fix_new_exp (frag_now,
2252 where - frag_now->fr_literal,
2259 build_relax (sh_opcode_info *opcode, sh_operand_info *op)
2261 int high_byte = target_big_endian ? 0 : 1;
2264 if (opcode->arg[0] == A_BDISP8)
2266 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
2267 p = frag_var (rs_machine_dependent,
2268 md_relax_table[C (what, COND32)].rlx_length,
2269 md_relax_table[C (what, COND8)].rlx_length,
2271 op->immediate.X_add_symbol,
2272 op->immediate.X_add_number,
2274 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
2276 else if (opcode->arg[0] == A_BDISP12)
2278 p = frag_var (rs_machine_dependent,
2279 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
2280 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
2282 op->immediate.X_add_symbol,
2283 op->immediate.X_add_number,
2285 p[high_byte] = (opcode->nibbles[0] << 4);
2290 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2293 insert_loop_bounds (char *output, sh_operand_info *operand)
2298 /* Since the low byte of the opcode will be overwritten by the reloc, we
2299 can just stash the high byte into both bytes and ignore endianness. */
2302 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
2303 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
2307 static int count = 0;
2309 /* If the last loop insn is a two-byte-insn, it is in danger of being
2310 swapped with the insn after it. To prevent this, create a new
2311 symbol - complete with SH_LABEL reloc - after the last loop insn.
2312 If the last loop insn is four bytes long, the symbol will be
2313 right in the middle, but four byte insns are not swapped anyways. */
2314 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2315 Hence a 9 digit number should be enough to count all REPEATs. */
2317 sprintf (name, "_R%x", count++ & 0x3fffffff);
2318 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag);
2319 /* Make this a local symbol. */
2321 SF_SET_LOCAL (end_sym);
2322 #endif /* OBJ_COFF */
2323 symbol_table_insert (end_sym);
2324 end_sym->sy_value = operand[1].immediate;
2325 end_sym->sy_value.X_add_number += 2;
2326 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
2329 output = frag_more (2);
2332 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
2333 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
2335 return frag_more (2);
2338 /* Now we know what sort of opcodes it is, let's build the bytes. */
2341 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand)
2346 unsigned int size = 2;
2347 int low_byte = target_big_endian ? 1 : 0;
2349 bfd_reloc_code_real_type r_type;
2351 int unhandled_pic = 0;
2364 for (indx = 0; indx < 3; indx++)
2365 if (opcode->arg[indx] == A_IMM
2366 && operand[indx].type == A_IMM
2367 && (operand[indx].immediate.X_op == O_PIC_reloc
2368 || sh_PIC_related_p (operand[indx].immediate.X_add_symbol)
2369 || sh_PIC_related_p (operand[indx].immediate.X_op_symbol)))
2373 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
2375 output = frag_more (4);
2380 output = frag_more (2);
2382 for (indx = 0; indx < max_index; indx++)
2384 sh_nibble_type i = opcode->nibbles[indx];
2401 if (reg_n < 2 || reg_n > 5)
2402 as_bad (_("Invalid register: 'r%d'"), reg_n);
2403 nbuf[indx] = (reg_n & 3) | 4;
2406 nbuf[indx] = reg_n | (reg_m >> 2);
2409 nbuf[indx] = reg_b | 0x08;
2412 nbuf[indx] = reg_n | 0x01;
2417 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand);
2422 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand);
2425 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand);
2428 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand);
2431 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand);
2434 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand);
2437 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1);
2440 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1);
2443 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1);
2446 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1);
2451 r_type = BFD_RELOC_SH_DISP20;
2453 if (sh_check_fixup (&operand->immediate, &r_type))
2454 as_bad (_("Invalid PIC expression."));
2457 insert4 (output, r_type, 0, operand);
2460 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand);
2463 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
2466 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
2469 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
2472 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
2475 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
2478 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
2481 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
2484 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
2487 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
2490 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
2493 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
2496 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
2499 insert (output, BFD_RELOC_SH_PCRELIMM8BY4,
2500 operand->type != A_DISP_PC_ABS, operand);
2503 insert (output, BFD_RELOC_SH_PCRELIMM8BY2,
2504 operand->type != A_DISP_PC_ABS, operand);
2507 output = insert_loop_bounds (output, operand);
2508 nbuf[indx] = opcode->nibbles[3];
2512 printf (_("failed for %d\n"), i);
2518 as_bad (_("misplaced PIC operand"));
2520 if (!target_big_endian)
2522 output[1] = (nbuf[0] << 4) | (nbuf[1]);
2523 output[0] = (nbuf[2] << 4) | (nbuf[3]);
2527 output[0] = (nbuf[0] << 4) | (nbuf[1]);
2528 output[1] = (nbuf[2] << 4) | (nbuf[3]);
2530 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
2532 if (!target_big_endian)
2534 output[3] = (nbuf[4] << 4) | (nbuf[5]);
2535 output[2] = (nbuf[6] << 4) | (nbuf[7]);
2539 output[2] = (nbuf[4] << 4) | (nbuf[5]);
2540 output[3] = (nbuf[6] << 4) | (nbuf[7]);
2546 /* Find an opcode at the start of *STR_P in the hash table, and set
2547 *STR_P to the first character after the last one read. */
2549 static sh_opcode_info *
2550 find_cooked_opcode (char **str_p)
2553 unsigned char *op_start;
2554 unsigned char *op_end;
2556 unsigned int nlen = 0;
2558 /* Drop leading whitespace. */
2562 /* Find the op code end.
2563 The pre-processor will eliminate whitespace in front of
2564 any '@' after the first argument; we may be called from
2565 assemble_ppi, so the opcode might be terminated by an '@'. */
2566 for (op_start = op_end = (unsigned char *) str;
2568 && nlen < sizeof (name) - 1
2569 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
2572 unsigned char c = op_start[nlen];
2574 /* The machine independent code will convert CMP/EQ into cmp/EQ
2575 because it thinks the '/' is the end of the symbol. Moreover,
2576 all but the first sub-insn is a parallel processing insn won't
2577 be capitalized. Instead of hacking up the machine independent
2578 code, we just deal with it here. */
2585 *str_p = (char *) op_end;
2588 as_bad (_("can't find opcode "));
2590 return (sh_opcode_info *) hash_find (opcode_hash_control, name);
2593 /* Assemble a parallel processing insn. */
2594 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2597 assemble_ppi (char *op_end, sh_opcode_info *opcode)
2609 sh_operand_info operand[3];
2611 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2612 Make sure we encode a defined insn pattern. */
2617 if (opcode->arg[0] != A_END)
2618 op_end = get_operands (opcode, op_end, operand);
2620 opcode = get_specific (opcode, operand);
2623 /* Couldn't find an opcode which matched the operands. */
2624 char *where = frag_more (2);
2629 as_bad (_("invalid operands for opcode"));
2633 if (opcode->nibbles[0] != PPI)
2634 as_bad (_("insn can't be combined with parallel processing insn"));
2636 switch (opcode->nibbles[1])
2641 as_bad (_("multiple movx specifications"));
2646 as_bad (_("multiple movy specifications"));
2652 as_bad (_("multiple movx specifications"));
2653 if ((reg_n < 4 || reg_n > 5)
2654 && (reg_n < 0 || reg_n > 1))
2655 as_bad (_("invalid movx address register"));
2656 if (movy && movy != DDT_BASE)
2657 as_bad (_("insn cannot be combined with non-nopy"));
2658 movx = ((((reg_n & 1) != 0) << 9)
2659 + (((reg_n & 4) == 0) << 8)
2661 + (opcode->nibbles[2] << 4)
2662 + opcode->nibbles[3]
2668 as_bad (_("multiple movy specifications"));
2669 if ((reg_n < 6 || reg_n > 7)
2670 && (reg_n < 2 || reg_n > 3))
2671 as_bad (_("invalid movy address register"));
2672 if (movx && movx != DDT_BASE)
2673 as_bad (_("insn cannot be combined with non-nopx"));
2674 movy = ((((reg_n & 1) != 0) << 8)
2675 + (((reg_n & 4) == 0) << 9)
2677 + (opcode->nibbles[2] << 4)
2678 + opcode->nibbles[3]
2684 as_bad (_("multiple movx specifications"));
2686 as_bad (_("previous movy requires nopx"));
2687 if (reg_n < 4 || reg_n > 5)
2688 as_bad (_("invalid movx address register"));
2689 if (opcode->nibbles[2] & 8)
2691 if (reg_m == A_A1_NUM)
2693 else if (reg_m != A_A0_NUM)
2694 as_bad (_("invalid movx dsp register"));
2699 as_bad (_("invalid movx dsp register"));
2702 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
2707 as_bad (_("multiple movy specifications"));
2709 as_bad (_("previous movx requires nopy"));
2710 if (opcode->nibbles[2] & 8)
2712 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2715 if (reg_m == A_A1_NUM)
2717 else if (reg_m != A_A0_NUM)
2718 as_bad (_("invalid movy dsp register"));
2723 as_bad (_("invalid movy dsp register"));
2726 if (reg_n < 6 || reg_n > 7)
2727 as_bad (_("invalid movy address register"));
2728 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
2732 if (operand[0].immediate.X_op != O_constant)
2733 as_bad (_("dsp immediate shift value not constant"));
2734 field_b = ((opcode->nibbles[2] << 12)
2735 | (operand[0].immediate.X_add_number & 127) << 4
2742 goto try_another_opcode;
2747 as_bad (_("multiple parallel processing specifications"));
2748 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2749 + (reg_x << 6) + (reg_y << 4) + reg_n);
2750 switch (opcode->nibbles[4])
2758 field_b += opcode->nibbles[4] << 4;
2766 as_bad (_("multiple condition specifications"));
2767 cond = opcode->nibbles[2] << 8;
2769 goto skip_cond_check;
2773 as_bad (_("multiple parallel processing specifications"));
2774 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2775 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
2777 switch (opcode->nibbles[4])
2785 field_b += opcode->nibbles[4] << 4;
2794 if ((field_b & 0xef00) == 0xa100)
2796 /* pclr Dz pmuls Se,Sf,Dg */
2797 else if ((field_b & 0xff00) == 0x8d00
2798 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up)))
2800 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up);
2804 as_bad (_("insn cannot be combined with pmuls"));
2805 switch (field_b & 0xf)
2808 field_b += 0 - A_X0_NUM;
2811 field_b += 1 - A_Y0_NUM;
2814 field_b += 2 - A_A0_NUM;
2817 field_b += 3 - A_A1_NUM;
2820 as_bad (_("bad combined pmuls output operand"));
2822 /* Generate warning if the destination register for padd / psub
2823 and pmuls is the same ( only for A0 or A1 ).
2824 If the last nibble is 1010 then A0 is used in both
2825 padd / psub and pmuls. If it is 1111 then A1 is used
2826 as destination register in both padd / psub and pmuls. */
2828 if ((((field_b | reg_efg) & 0x000F) == 0x000A)
2829 || (((field_b | reg_efg) & 0x000F) == 0x000F))
2830 as_warn (_("destination register is same for parallel insns"));
2832 field_b += 0x4000 + reg_efg;
2839 as_bad (_("condition not followed by conditionalizable insn"));
2845 opcode = find_cooked_opcode (&op_end);
2849 (_("unrecognized characters at end of parallel processing insn")));
2854 move_code = movx | movy;
2857 /* Parallel processing insn. */
2858 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
2860 output = frag_more (4);
2862 if (! target_big_endian)
2864 output[3] = ppi_code >> 8;
2865 output[2] = ppi_code;
2869 output[2] = ppi_code >> 8;
2870 output[3] = ppi_code;
2872 move_code |= 0xf800;
2876 /* Just a double data transfer. */
2877 output = frag_more (2);
2880 if (! target_big_endian)
2882 output[1] = move_code >> 8;
2883 output[0] = move_code;
2887 output[0] = move_code >> 8;
2888 output[1] = move_code;
2893 /* This is the guts of the machine-dependent assembler. STR points to a
2894 machine dependent instruction. This function is supposed to emit
2895 the frags/bytes it assembles to. */
2898 md_assemble (char *str)
2901 sh_operand_info operand[3];
2902 sh_opcode_info *opcode;
2903 unsigned int size = 0;
2904 char *initial_str = str;
2907 if (sh64_isa_mode == sh64_isa_shmedia)
2909 shmedia_md_assemble (str);
2914 /* If we've seen pseudo-directives, make sure any emitted data or
2915 frags are marked as data. */
2918 sh64_update_contents_mark (TRUE);
2919 sh64_set_contents_type (CRT_SH5_ISA16);
2924 #endif /* HAVE_SH64 */
2926 opcode = find_cooked_opcode (&str);
2931 /* The opcode is not in the hash table.
2932 This means we definitely have an assembly failure,
2933 but the instruction may be valid in another CPU variant.
2934 In this case emit something better than 'unknown opcode'.
2935 Search the full table in sh-opc.h to check. */
2937 char *name = initial_str;
2938 int name_length = 0;
2939 const sh_opcode_info *op;
2942 /* identify opcode in string */
2943 while (ISSPACE (*name))
2947 while (!ISSPACE (name[name_length]))
2952 /* search for opcode in full list */
2953 for (op = sh_table; op->name; op++)
2955 if (strncasecmp (op->name, name, name_length) == 0
2956 && op->name[name_length] == '\0')
2965 as_bad (_("opcode not valid for this cpu variant"));
2969 as_bad (_("unknown opcode"));
2975 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
2977 /* Output a CODE reloc to tell the linker that the following
2978 bytes are instructions, not data. */
2979 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2981 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
2984 if (opcode->nibbles[0] == PPI)
2986 size = assemble_ppi (op_end, opcode);
2990 if (opcode->arg[0] == A_BDISP12
2991 || opcode->arg[0] == A_BDISP8)
2993 /* Since we skip get_specific here, we have to check & update
2995 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch))
2996 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch);
2998 as_bad (_("Delayed branches not available on SH1"));
2999 parse_exp (op_end + 1, &operand[0]);
3000 build_relax (opcode, &operand[0]);
3002 /* All branches are currently 16 bit. */
3007 if (opcode->arg[0] == A_END)
3009 /* Ignore trailing whitespace. If there is any, it has already
3010 been compressed to a single space. */
3016 op_end = get_operands (opcode, op_end, operand);
3018 opcode = get_specific (opcode, operand);
3022 /* Couldn't find an opcode which matched the operands. */
3023 char *where = frag_more (2);
3028 as_bad (_("invalid operands for opcode"));
3033 as_bad (_("excess operands: '%s'"), op_end);
3035 size = build_Mytes (opcode, operand);
3040 dwarf2_emit_insn (size);
3043 /* This routine is called each time a label definition is seen. It
3044 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
3047 sh_frob_label (symbolS *sym)
3049 static fragS *last_label_frag;
3050 static int last_label_offset;
3053 && seg_info (now_seg)->tc_segment_info_data.in_code)
3057 offset = frag_now_fix ();
3058 if (frag_now != last_label_frag
3059 || offset != last_label_offset)
3061 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
3062 last_label_frag = frag_now;
3063 last_label_offset = offset;
3067 dwarf2_emit_label (sym);
3070 /* This routine is called when the assembler is about to output some
3071 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
3074 sh_flush_pending_output (void)
3077 && seg_info (now_seg)->tc_segment_info_data.in_code)
3079 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
3081 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
3086 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
3091 /* Various routines to kill one day. */
3094 md_atof (int type, char *litP, int *sizeP)
3096 return ieee_md_atof (type, litP, sizeP, target_big_endian);
3099 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
3100 call instruction. It refers to a label of the instruction which
3101 loads the register which the call uses. We use it to generate a
3102 special reloc for the linker. */
3105 s_uses (int ignore ATTRIBUTE_UNUSED)
3110 as_warn (_(".uses pseudo-op seen when not relaxing"));
3114 if (ex.X_op != O_symbol || ex.X_add_number != 0)
3116 as_bad (_("bad .uses format"));
3117 ignore_rest_of_line ();
3121 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
3123 demand_empty_rest_of_line ();
3128 OPTION_RELAX = OPTION_MD_BASE,
3135 OPTION_ALLOW_REG_PREFIX,
3139 OPTION_SHCOMPACT_CONST_CRANGE,
3147 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */
3150 const char *md_shortopts = "";
3151 struct option md_longopts[] =
3153 {"relax", no_argument, NULL, OPTION_RELAX},
3154 {"big", no_argument, NULL, OPTION_BIG},
3155 {"little", no_argument, NULL, OPTION_LITTLE},
3156 /* The next two switches are here because the
3157 generic parts of the linker testsuite uses them. */
3158 {"EB", no_argument, NULL, OPTION_BIG},
3159 {"EL", no_argument, NULL, OPTION_LITTLE},
3160 {"small", no_argument, NULL, OPTION_SMALL},
3161 {"dsp", no_argument, NULL, OPTION_DSP},
3162 {"isa", required_argument, NULL, OPTION_ISA},
3163 {"renesas", no_argument, NULL, OPTION_RENESAS},
3164 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX},
3167 {"abi", required_argument, NULL, OPTION_ABI},
3168 {"no-mix", no_argument, NULL, OPTION_NO_MIX},
3169 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE},
3170 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND},
3171 {"expand-pt32", no_argument, NULL, OPTION_PT32},
3172 #endif /* HAVE_SH64 */
3173 { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX },
3176 {"fdpic", no_argument, NULL, OPTION_FDPIC},
3179 {NULL, no_argument, NULL, 0}
3181 size_t md_longopts_size = sizeof (md_longopts);
3184 md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
3193 target_big_endian = 1;
3197 target_big_endian = 0;
3205 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
3208 case OPTION_RENESAS:
3209 dont_adjust_reloc_32 = 1;
3212 case OPTION_ALLOW_REG_PREFIX:
3213 allow_dollar_register_prefix = 1;
3217 if (strcasecmp (arg, "dsp") == 0)
3218 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
3219 else if (strcasecmp (arg, "fp") == 0)
3220 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp;
3221 else if (strcasecmp (arg, "any") == 0)
3222 preset_target_arch = arch_sh_up;
3224 else if (strcasecmp (arg, "shmedia") == 0)
3226 if (sh64_isa_mode == sh64_isa_shcompact)
3227 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3228 sh64_isa_mode = sh64_isa_shmedia;
3230 else if (strcasecmp (arg, "shcompact") == 0)
3232 if (sh64_isa_mode == sh64_isa_shmedia)
3233 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3234 if (sh64_abi == sh64_abi_64)
3235 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3236 sh64_isa_mode = sh64_isa_shcompact;
3238 #endif /* HAVE_SH64 */
3241 extern const bfd_arch_info_type bfd_sh_arch;
3242 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
3244 preset_target_arch = 0;
3245 for (; bfd_arch; bfd_arch=bfd_arch->next)
3247 int len = strlen(bfd_arch->printable_name);
3249 if (bfd_arch->mach == bfd_mach_sh5)
3252 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0)
3255 if (arg[len] == '\0')
3256 preset_target_arch =
3257 sh_get_arch_from_bfd_mach (bfd_arch->mach);
3258 else if (strcasecmp(&arg[len], "-up") == 0)
3259 preset_target_arch =
3260 sh_get_arch_up_from_bfd_mach (bfd_arch->mach);
3266 if (!preset_target_arch)
3267 as_bad (_("Invalid argument to --isa option: %s"), arg);
3273 if (strcmp (arg, "32") == 0)
3275 if (sh64_abi == sh64_abi_64)
3276 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3277 sh64_abi = sh64_abi_32;
3279 else if (strcmp (arg, "64") == 0)
3281 if (sh64_abi == sh64_abi_32)
3282 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3283 if (sh64_isa_mode == sh64_isa_shcompact)
3284 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3285 sh64_abi = sh64_abi_64;
3288 as_bad (_("Invalid argument to --abi option: %s"), arg);
3295 case OPTION_SHCOMPACT_CONST_CRANGE:
3296 sh64_shcompact_const_crange = TRUE;
3299 case OPTION_NO_EXPAND:
3300 sh64_expand = FALSE;
3306 #endif /* HAVE_SH64 */
3308 case OPTION_H_TICK_HEX:
3309 enable_h_tick_hex = 1;
3316 #endif /* OBJ_ELF */
3326 md_show_usage (FILE *stream)
3328 fprintf (stream, _("\
3330 --little generate little endian code\n\
3331 --big generate big endian code\n\
3332 --relax alter jump instructions for long displacements\n\
3333 --renesas disable optimization with section symbol for\n\
3334 compatibility with Renesas assembler.\n\
3335 --small align sections to 4 byte boundaries, not 16\n\
3336 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3337 --allow-reg-prefix allow '$' as a register name prefix.\n\
3338 --isa=[any use most appropriate isa\n\
3339 | dsp same as '-dsp'\n\
3342 extern const bfd_arch_info_type bfd_sh_arch;
3343 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
3345 for (; bfd_arch; bfd_arch=bfd_arch->next)
3346 if (bfd_arch->mach != bfd_mach_sh5)
3348 fprintf (stream, "\n | %s", bfd_arch->printable_name);
3349 fprintf (stream, "\n | %s-up", bfd_arch->printable_name);
3352 fprintf (stream, "]\n");
3354 fprintf (stream, _("\
3355 --isa=[shmedia set as the default instruction set for SH64\n\
3359 fprintf (stream, _("\
3360 --abi=[32|64] set size of expanded SHmedia operands and object\n\
3362 --shcompact-const-crange emit code-range descriptors for constants in\n\
3363 SHcompact code sections\n\
3364 --no-mix disallow SHmedia code in the same section as\n\
3365 constants and SHcompact code\n\
3366 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3367 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3368 to 32 bits only\n"));
3369 #endif /* HAVE_SH64 */
3371 fprintf (stream, _("\
3372 --fdpic generate an FDPIC object file\n"));
3373 #endif /* OBJ_ELF */
3376 /* This struct is used to pass arguments to sh_count_relocs through
3377 bfd_map_over_sections. */
3379 struct sh_count_relocs
3381 /* Symbol we are looking for. */
3383 /* Count of relocs found. */
3387 /* Count the number of fixups in a section which refer to a particular
3388 symbol. This is called via bfd_map_over_sections. */
3391 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data)
3393 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
3394 segment_info_type *seginfo;
3398 seginfo = seg_info (sec);
3399 if (seginfo == NULL)
3403 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
3405 if (fix->fx_addsy == sym)
3413 /* Handle the count relocs for a particular section.
3414 This is called via bfd_map_over_sections. */
3417 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec,
3418 void *ignore ATTRIBUTE_UNUSED)
3420 segment_info_type *seginfo;
3423 seginfo = seg_info (sec);
3424 if (seginfo == NULL)
3427 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
3431 sym = fix->fx_addsy;
3432 /* Check for a local_symbol. */
3433 if (sym && sym->bsym == NULL)
3435 struct local_symbol *ls = (struct local_symbol *)sym;
3436 /* See if it's been converted. If so, canonicalize. */
3437 if (local_symbol_converted_p (ls))
3438 fix->fx_addsy = local_symbol_get_real_symbol (ls);
3442 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
3447 struct sh_count_relocs info;
3449 if (fix->fx_r_type != BFD_RELOC_SH_USES)
3452 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3453 symbol in the same section. */
3454 sym = fix->fx_addsy;
3456 || fix->fx_subsy != NULL
3457 || fix->fx_addnumber != 0
3458 || S_GET_SEGMENT (sym) != sec
3459 || S_IS_EXTERNAL (sym))
3461 as_warn_where (fix->fx_file, fix->fx_line,
3462 _(".uses does not refer to a local symbol in the same section"));
3466 /* Look through the fixups again, this time looking for one
3467 at the same location as sym. */
3468 val = S_GET_VALUE (sym);
3469 for (fscan = seginfo->fix_root;
3471 fscan = fscan->fx_next)
3472 if (val == fscan->fx_frag->fr_address + fscan->fx_where
3473 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
3474 && fscan->fx_r_type != BFD_RELOC_SH_CODE
3475 && fscan->fx_r_type != BFD_RELOC_SH_DATA
3476 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
3480 as_warn_where (fix->fx_file, fix->fx_line,
3481 _("can't find fixup pointed to by .uses"));
3485 if (fscan->fx_tcbit)
3487 /* We've already done this one. */
3491 /* The variable fscan should also be a fixup to a local symbol
3492 in the same section. */
3493 sym = fscan->fx_addsy;
3495 || fscan->fx_subsy != NULL
3496 || fscan->fx_addnumber != 0
3497 || S_GET_SEGMENT (sym) != sec
3498 || S_IS_EXTERNAL (sym))
3500 as_warn_where (fix->fx_file, fix->fx_line,
3501 _(".uses target does not refer to a local symbol in the same section"));
3505 /* Now we look through all the fixups of all the sections,
3506 counting the number of times we find a reference to sym. */
3509 bfd_map_over_sections (stdoutput, sh_count_relocs, &info);
3514 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3515 We have already adjusted the value of sym to include the
3516 fragment address, so we undo that adjustment here. */
3517 subseg_change (sec, 0);
3518 fix_new (fscan->fx_frag,
3519 S_GET_VALUE (sym) - fscan->fx_frag->fr_address,
3520 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
3524 /* This function is called after the symbol table has been completed,
3525 but before the relocs or section contents have been written out.
3526 If we have seen any .uses pseudo-ops, they point to an instruction
3527 which loads a register with the address of a function. We look
3528 through the fixups to find where the function address is being
3529 loaded from. We then generate a COUNT reloc giving the number of
3530 times that function address is referred to. The linker uses this
3531 information when doing relaxing, to decide when it can eliminate
3532 the stored function address entirely. */
3538 shmedia_frob_file_before_adjust ();
3544 bfd_map_over_sections (stdoutput, sh_frob_section, NULL);
3547 /* Called after relaxing. Set the correct sizes of the fragments, and
3548 create relocs so that md_apply_fix will fill in the correct values. */
3551 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP)
3555 switch (fragP->fr_subtype)
3557 case C (COND_JUMP, COND8):
3558 case C (COND_JUMP_DELAY, COND8):
3559 subseg_change (seg, 0);
3560 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
3561 1, BFD_RELOC_SH_PCDISP8BY2);
3566 case C (UNCOND_JUMP, UNCOND12):
3567 subseg_change (seg, 0);
3568 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
3569 1, BFD_RELOC_SH_PCDISP12BY2);
3574 case C (UNCOND_JUMP, UNCOND32):
3575 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
3576 if (fragP->fr_symbol == NULL)
3577 as_bad_where (fragP->fr_file, fragP->fr_line,
3578 _("displacement overflows 12-bit field"));
3579 else if (S_IS_DEFINED (fragP->fr_symbol))
3580 as_bad_where (fragP->fr_file, fragP->fr_line,
3581 _("displacement to defined symbol %s overflows 12-bit field"),
3582 S_GET_NAME (fragP->fr_symbol));
3584 as_bad_where (fragP->fr_file, fragP->fr_line,
3585 _("displacement to undefined symbol %s overflows 12-bit field"),
3586 S_GET_NAME (fragP->fr_symbol));
3587 /* Stabilize this frag, so we don't trip an assert. */
3588 fragP->fr_fix += fragP->fr_var;
3592 case C (COND_JUMP, COND12):
3593 case C (COND_JUMP_DELAY, COND12):
3594 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3595 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3596 was due to gas incorrectly relaxing an out-of-range conditional
3597 branch with delay slot. It turned:
3598 bf.s L6 (slot mov.l r12,@(44,r0))
3601 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3603 32: 10 cb mov.l r12,@(44,r0)
3604 Therefore, branches with delay slots have to be handled
3605 differently from ones without delay slots. */
3607 unsigned char *buffer =
3608 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
3609 int highbyte = target_big_endian ? 0 : 1;
3610 int lowbyte = target_big_endian ? 1 : 0;
3611 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
3613 /* Toggle the true/false bit of the bcond. */
3614 buffer[highbyte] ^= 0x2;
3616 /* If this is a delayed branch, we may not put the bra in the
3617 slot. So we change it to a non-delayed branch, like that:
3618 b! cond slot_label; bra disp; slot_label: slot_insn
3619 ??? We should try if swapping the conditional branch and
3620 its delay-slot insn already makes the branch reach. */
3622 /* Build a relocation to six / four bytes farther on. */
3623 subseg_change (seg, 0);
3624 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg),
3625 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
3626 1, BFD_RELOC_SH_PCDISP8BY2);
3628 /* Set up a jump instruction. */
3629 buffer[highbyte + 2] = 0xa0;
3630 buffer[lowbyte + 2] = 0;
3631 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
3632 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
3636 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
3641 /* Fill in a NOP instruction. */
3642 buffer[highbyte + 4] = 0x0;
3643 buffer[lowbyte + 4] = 0x9;
3652 case C (COND_JUMP, COND32):
3653 case C (COND_JUMP_DELAY, COND32):
3654 case C (COND_JUMP, UNDEF_WORD_DISP):
3655 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3656 if (fragP->fr_symbol == NULL)
3657 as_bad_where (fragP->fr_file, fragP->fr_line,
3658 _("displacement overflows 8-bit field"));
3659 else if (S_IS_DEFINED (fragP->fr_symbol))
3660 as_bad_where (fragP->fr_file, fragP->fr_line,
3661 _("displacement to defined symbol %s overflows 8-bit field"),
3662 S_GET_NAME (fragP->fr_symbol));
3664 as_bad_where (fragP->fr_file, fragP->fr_line,
3665 _("displacement to undefined symbol %s overflows 8-bit field "),
3666 S_GET_NAME (fragP->fr_symbol));
3667 /* Stabilize this frag, so we don't trip an assert. */
3668 fragP->fr_fix += fragP->fr_var;
3674 shmedia_md_convert_frag (headers, seg, fragP, TRUE);
3680 if (donerelax && !sh_relax)
3681 as_warn_where (fragP->fr_file, fragP->fr_line,
3682 _("overflow in branch to %s; converted into longer instruction sequence"),
3683 (fragP->fr_symbol != NULL
3684 ? S_GET_NAME (fragP->fr_symbol)
3689 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size)
3693 #else /* ! OBJ_ELF */
3694 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
3695 & (-1 << bfd_get_section_alignment (stdoutput, seg)));
3696 #endif /* ! OBJ_ELF */
3699 /* This static variable is set by s_uacons to tell sh_cons_align that
3700 the expression does not need to be aligned. */
3702 static int sh_no_align_cons = 0;
3704 /* This handles the unaligned space allocation pseudo-ops, such as
3705 .uaword. .uaword is just like .word, but the value does not need
3709 s_uacons (int bytes)
3711 /* Tell sh_cons_align not to align this value. */
3712 sh_no_align_cons = 1;
3716 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3717 aligned correctly. Note that this can cause warnings to be issued
3718 when assembling initialized structured which were declared with the
3719 packed attribute. FIXME: Perhaps we should require an option to
3720 enable this warning? */
3723 sh_cons_align (int nbytes)
3727 if (sh_no_align_cons)
3729 /* This is an unaligned pseudo-op. */
3730 sh_no_align_cons = 0;
3735 while ((nbytes & 1) == 0)
3744 if (now_seg == absolute_section)
3746 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
3747 as_warn (_("misaligned data"));
3751 frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
3752 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
3754 record_alignment (now_seg, nalign);
3757 /* When relaxing, we need to output a reloc for any .align directive
3758 that requests alignment to a four byte boundary or larger. This is
3759 also where we check for misaligned data. */
3762 sh_handle_align (fragS *frag)
3764 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix;
3766 if (frag->fr_type == rs_align_code)
3768 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
3769 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
3771 char *p = frag->fr_literal + frag->fr_fix;
3780 if (target_big_endian)
3782 memcpy (p, big_nop_pattern, sizeof big_nop_pattern);
3783 frag->fr_var = sizeof big_nop_pattern;
3787 memcpy (p, little_nop_pattern, sizeof little_nop_pattern);
3788 frag->fr_var = sizeof little_nop_pattern;
3791 else if (frag->fr_type == rs_align_test)
3794 as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data"));
3798 && (frag->fr_type == rs_align
3799 || frag->fr_type == rs_align_code)
3800 && frag->fr_address + frag->fr_fix > 0
3801 && frag->fr_offset > 1
3802 && now_seg != bss_section)
3803 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
3804 BFD_RELOC_SH_ALIGN);
3807 /* See whether the relocation should be resolved locally. */
3810 sh_local_pcrel (fixS *fix)
3813 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2
3814 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2
3815 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2
3816 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4
3817 || fix->fx_r_type == BFD_RELOC_8_PCREL
3818 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16
3819 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32));
3822 /* See whether we need to force a relocation into the output file.
3823 This is used to force out switch and PC relative relocations when
3827 sh_force_relocation (fixS *fix)
3829 /* These relocations can't make it into a DSO, so no use forcing
3830 them for global symbols. */
3831 if (sh_local_pcrel (fix))
3834 /* Make sure some relocations get emitted. */
3835 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START
3836 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END
3837 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32
3838 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32
3839 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32
3840 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32
3841 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32
3842 || generic_force_reloc (fix))
3848 return (fix->fx_pcrel
3849 || SWITCH_TABLE (fix)
3850 || fix->fx_r_type == BFD_RELOC_SH_COUNT
3851 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
3852 || fix->fx_r_type == BFD_RELOC_SH_CODE
3853 || fix->fx_r_type == BFD_RELOC_SH_DATA
3855 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE
3857 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
3862 sh_fix_adjustable (fixS *fixP)
3864 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL
3865 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL
3866 || fixP->fx_r_type == BFD_RELOC_SH_GOT20
3867 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC
3868 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC
3869 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20
3870 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC
3871 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20
3872 || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC
3873 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32)
3874 || fixP->fx_r_type == BFD_RELOC_RVA)
3877 /* We need the symbol name for the VTABLE entries */
3878 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3879 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
3886 sh_elf_final_processing (void)
3890 /* Set file-specific flags to indicate if this code needs
3891 a processor with the sh-dsp / sh2e ISA to execute. */
3893 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3894 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3895 if (sh64_isa_mode != sh64_isa_unspecified)
3898 #elif defined TARGET_SYMBIAN
3901 extern int sh_symbian_find_elf_flags (unsigned int);
3903 val = sh_symbian_find_elf_flags (valid_arch);
3906 #endif /* HAVE_SH64 */
3907 val = sh_find_elf_flags (valid_arch);
3909 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
3910 elf_elfheader (stdoutput)->e_flags |= val;
3913 elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC;
3918 /* Return the target format for uClinux. */
3921 sh_uclinux_target_format (void)
3924 return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic");
3926 return (!target_big_endian ? "elf32-shl" : "elf32-sh");
3930 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3931 assembly-time value. If we're generating a reloc for FIXP,
3932 see whether the addend should be stored in-place or whether
3933 it should be in an ELF r_addend field. */
3936 apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size)
3938 reloc_howto_type *howto;
3940 if (fixP->fx_addsy != NULL || fixP->fx_pcrel)
3942 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
3943 if (howto && !howto->partial_inplace)
3945 fixP->fx_addnumber = val;
3949 md_number_to_chars (buf, val, size);
3952 /* Apply a fixup to the object file. */
3955 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
3957 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3958 int lowbyte = target_big_endian ? 1 : 0;
3959 int highbyte = target_big_endian ? 0 : 1;
3960 long val = (long) *valP;
3964 /* A difference between two symbols, the second of which is in the
3965 current section, is transformed in a PC-relative relocation to
3966 the other symbol. We have to adjust the relocation type here. */
3970 /* Safeguard; this must not occur for non-sh64 configurations. */
3971 gas_assert (fixP->fx_r_type != BFD_RELOC_64);
3974 switch (fixP->fx_r_type)
3980 fixP->fx_r_type = BFD_RELOC_32_PCREL;
3983 /* Currently, we only support 32-bit PCREL relocations.
3984 We'd need a new reloc type to handle 16_PCREL, and
3985 8_PCREL is already taken for R_SH_SWITCH8, which
3986 apparently does something completely different than what
3989 bfd_set_error (bfd_error_bad_value);
3993 bfd_set_error (bfd_error_bad_value);
3998 /* The function adjust_reloc_syms won't convert a reloc against a weak
3999 symbol into a reloc against a section, but bfd_install_relocation
4000 will screw up if the symbol is defined, so we have to adjust val here
4001 to avoid the screw up later.
4003 For ordinary relocs, this does not happen for ELF, since for ELF,
4004 bfd_install_relocation uses the "special function" field of the
4005 howto, and does not execute the code that needs to be undone, as long
4006 as the special function does not return bfd_reloc_continue.
4007 It can happen for GOT- and PLT-type relocs the way they are
4008 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
4009 doesn't matter here since those relocs don't use VAL; see below. */
4010 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
4011 && fixP->fx_addsy != NULL
4012 && S_IS_WEAK (fixP->fx_addsy))
4013 val -= S_GET_VALUE (fixP->fx_addsy);
4015 if (SWITCH_TABLE (fixP))
4016 val -= S_GET_VALUE (fixP->fx_subsy);
4020 switch (fixP->fx_r_type)
4022 case BFD_RELOC_SH_IMM3:
4024 * buf = (* buf & 0xf8) | (val & 0x7);
4026 case BFD_RELOC_SH_IMM3U:
4028 * buf = (* buf & 0x8f) | ((val & 0x7) << 4);
4030 case BFD_RELOC_SH_DISP12:
4032 buf[lowbyte] = val & 0xff;
4033 buf[highbyte] |= (val >> 8) & 0x0f;
4035 case BFD_RELOC_SH_DISP12BY2:
4038 buf[lowbyte] = (val >> 1) & 0xff;
4039 buf[highbyte] |= (val >> 9) & 0x0f;
4041 case BFD_RELOC_SH_DISP12BY4:
4044 buf[lowbyte] = (val >> 2) & 0xff;
4045 buf[highbyte] |= (val >> 10) & 0x0f;
4047 case BFD_RELOC_SH_DISP12BY8:
4050 buf[lowbyte] = (val >> 3) & 0xff;
4051 buf[highbyte] |= (val >> 11) & 0x0f;
4053 case BFD_RELOC_SH_DISP20:
4054 if (! target_big_endian)
4058 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0);
4059 buf[2] = (val >> 8) & 0xff;
4060 buf[3] = val & 0xff;
4062 case BFD_RELOC_SH_DISP20BY8:
4063 if (!target_big_endian)
4068 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0);
4069 buf[2] = (val >> 16) & 0xff;
4070 buf[3] = (val >> 8) & 0xff;
4073 case BFD_RELOC_SH_IMM4:
4075 *buf = (*buf & 0xf0) | (val & 0xf);
4078 case BFD_RELOC_SH_IMM4BY2:
4081 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
4084 case BFD_RELOC_SH_IMM4BY4:
4087 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
4090 case BFD_RELOC_SH_IMM8BY2:
4096 case BFD_RELOC_SH_IMM8BY4:
4103 case BFD_RELOC_SH_IMM8:
4104 /* Sometimes the 8 bit value is sign extended (e.g., add) and
4105 sometimes it is not (e.g., and). We permit any 8 bit value.
4106 Note that adding further restrictions may invalidate
4107 reasonable looking assembly code, such as ``and -0x1,r0''. */
4113 case BFD_RELOC_SH_PCRELIMM8BY4:
4114 /* If we are dealing with a known destination ... */
4115 if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
4116 && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy)))
4118 /* Don't silently move the destination due to misalignment.
4119 The absolute address is the fragment base plus the offset into
4120 the fragment plus the pc relative offset to the label. */
4121 if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3)
4122 as_bad_where (fixP->fx_file, fixP->fx_line,
4123 _("offset to unaligned destination"));
4125 /* The displacement cannot be zero or backward even if aligned.
4126 Allow -2 because val has already been adjusted somewhere. */
4128 as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset"));
4131 /* The lower two bits of the PC are cleared before the
4132 displacement is added in. We can assume that the destination
4133 is on a 4 byte boundary. If this instruction is also on a 4
4134 byte boundary, then we want
4136 and target - here is a multiple of 4.
4137 Otherwise, we are on a 2 byte boundary, and we want
4138 (target - (here - 2)) / 4
4139 and target - here is not a multiple of 4. Computing
4140 (target - (here - 2)) / 4 == (target - here + 2) / 4
4141 works for both cases, since in the first case the addition of
4142 2 will be removed by the division. target - here is in the
4144 val = (val + 2) / 4;
4146 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
4150 case BFD_RELOC_SH_PCRELIMM8BY2:
4153 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
4157 case BFD_RELOC_SH_PCDISP8BY2:
4159 if (val < -0x80 || val > 0x7f)
4160 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
4164 case BFD_RELOC_SH_PCDISP12BY2:
4166 if (val < -0x800 || val > 0x7ff)
4167 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
4168 buf[lowbyte] = val & 0xff;
4169 buf[highbyte] |= (val >> 8) & 0xf;
4174 apply_full_field_fix (fixP, buf, *valP, 8);
4179 case BFD_RELOC_32_PCREL:
4180 apply_full_field_fix (fixP, buf, val, 4);
4184 apply_full_field_fix (fixP, buf, val, 2);
4187 case BFD_RELOC_SH_USES:
4188 /* Pass the value into sh_reloc(). */
4189 fixP->fx_addnumber = val;
4192 case BFD_RELOC_SH_COUNT:
4193 case BFD_RELOC_SH_ALIGN:
4194 case BFD_RELOC_SH_CODE:
4195 case BFD_RELOC_SH_DATA:
4196 case BFD_RELOC_SH_LABEL:
4197 /* Nothing to do here. */
4200 case BFD_RELOC_SH_LOOP_START:
4201 case BFD_RELOC_SH_LOOP_END:
4203 case BFD_RELOC_VTABLE_INHERIT:
4204 case BFD_RELOC_VTABLE_ENTRY:
4209 case BFD_RELOC_32_PLT_PCREL:
4210 /* Make the jump instruction point to the address of the operand. At
4211 runtime we merely add the offset to the actual PLT entry. */
4212 * valP = 0xfffffffc;
4213 val = fixP->fx_offset;
4215 val -= S_GET_VALUE (fixP->fx_subsy);
4216 apply_full_field_fix (fixP, buf, val, 4);
4219 case BFD_RELOC_SH_GOTPC:
4220 /* This is tough to explain. We end up with this one if we have
4221 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
4222 The goal here is to obtain the absolute address of the GOT,
4223 and it is strongly preferable from a performance point of
4224 view to avoid using a runtime relocation for this. There are
4225 cases where you have something like:
4227 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
4229 and here no correction would be required. Internally in the
4230 assembler we treat operands of this form as not being pcrel
4231 since the '.' is explicitly mentioned, and I wonder whether
4232 it would simplify matters to do it this way. Who knows. In
4233 earlier versions of the PIC patches, the pcrel_adjust field
4234 was used to store the correction, but since the expression is
4235 not pcrel, I felt it would be confusing to do it this way. */
4237 apply_full_field_fix (fixP, buf, val, 4);
4240 case BFD_RELOC_SH_TLS_GD_32:
4241 case BFD_RELOC_SH_TLS_LD_32:
4242 case BFD_RELOC_SH_TLS_IE_32:
4243 S_SET_THREAD_LOCAL (fixP->fx_addsy);
4245 case BFD_RELOC_32_GOT_PCREL:
4246 case BFD_RELOC_SH_GOT20:
4247 case BFD_RELOC_SH_GOTPLT32:
4248 case BFD_RELOC_SH_GOTFUNCDESC:
4249 case BFD_RELOC_SH_GOTFUNCDESC20:
4250 case BFD_RELOC_SH_GOTOFFFUNCDESC:
4251 case BFD_RELOC_SH_GOTOFFFUNCDESC20:
4252 case BFD_RELOC_SH_FUNCDESC:
4253 * valP = 0; /* Fully resolved at runtime. No addend. */
4254 apply_full_field_fix (fixP, buf, 0, 4);
4257 case BFD_RELOC_SH_TLS_LDO_32:
4258 case BFD_RELOC_SH_TLS_LE_32:
4259 S_SET_THREAD_LOCAL (fixP->fx_addsy);
4261 case BFD_RELOC_32_GOTOFF:
4262 case BFD_RELOC_SH_GOTOFF20:
4263 apply_full_field_fix (fixP, buf, val, 4);
4269 shmedia_md_apply_fix (fixP, valP);
4278 if ((val & ((1 << shift) - 1)) != 0)
4279 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
4283 val = ((val >> shift)
4284 | ((long) -1 & ~ ((long) -1 >> shift)));
4287 /* Extend sign for 64-bit host. */
4288 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
4289 if (max != 0 && (val < min || val > max))
4290 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
4292 /* Stop the generic code from trying to overlow check the value as well.
4293 It may not have the correct value anyway, as we do not store val back
4295 fixP->fx_no_overflow = 1;
4297 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
4301 /* Called just before address relaxation. Return the length
4302 by which a fragment must grow to reach it's destination. */
4305 md_estimate_size_before_relax (fragS *fragP, segT segment_type)
4309 switch (fragP->fr_subtype)
4313 return shmedia_md_estimate_size_before_relax (fragP, segment_type);
4319 case C (UNCOND_JUMP, UNDEF_DISP):
4320 /* Used to be a branch to somewhere which was unknown. */
4321 if (!fragP->fr_symbol)
4323 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
4325 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
4327 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
4331 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
4335 case C (COND_JUMP, UNDEF_DISP):
4336 case C (COND_JUMP_DELAY, UNDEF_DISP):
4337 what = GET_WHAT (fragP->fr_subtype);
4338 /* Used to be a branch to somewhere which was unknown. */
4339 if (fragP->fr_symbol
4340 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
4342 /* Got a symbol and it's defined in this segment, become byte
4343 sized - maybe it will fix up. */
4344 fragP->fr_subtype = C (what, COND8);
4346 else if (fragP->fr_symbol)
4348 /* Its got a segment, but its not ours, so it will always be long. */
4349 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
4353 /* We know the abs value. */
4354 fragP->fr_subtype = C (what, COND8);
4358 case C (UNCOND_JUMP, UNCOND12):
4359 case C (UNCOND_JUMP, UNCOND32):
4360 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
4361 case C (COND_JUMP, COND8):
4362 case C (COND_JUMP, COND12):
4363 case C (COND_JUMP, COND32):
4364 case C (COND_JUMP, UNDEF_WORD_DISP):
4365 case C (COND_JUMP_DELAY, COND8):
4366 case C (COND_JUMP_DELAY, COND12):
4367 case C (COND_JUMP_DELAY, COND32):
4368 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
4369 /* When relaxing a section for the second time, we don't need to
4370 do anything besides return the current size. */
4374 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length;
4375 return fragP->fr_var;
4378 /* Put number into target byte order. */
4381 md_number_to_chars (char *ptr, valueT use, int nbytes)
4384 /* We might need to set the contents type to data. */
4385 sh64_flag_output ();
4388 if (! target_big_endian)
4389 number_to_chars_littleendian (ptr, use, nbytes);
4391 number_to_chars_bigendian (ptr, use, nbytes);
4394 /* This version is used in obj-coff.c eg. for the sh-hms target. */
4397 md_pcrel_from (fixS *fixP)
4399 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
4403 md_pcrel_from_section (fixS *fixP, segT sec)
4405 if (! sh_local_pcrel (fixP)
4406 && fixP->fx_addsy != (symbolS *) NULL
4407 && (generic_force_reloc (fixP)
4408 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
4410 /* The symbol is undefined (or is defined but not in this section,
4411 or we're not sure about it being the final definition). Let the
4412 linker figure it out. We need to adjust the subtraction of a
4413 symbol to the position of the relocated data, though. */
4414 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0;
4417 return md_pcrel_from (fixP);
4420 /* Create a reloc. */
4423 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
4426 bfd_reloc_code_real_type r_type;
4428 rel = (arelent *) xmalloc (sizeof (arelent));
4429 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
4430 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
4431 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
4433 r_type = fixp->fx_r_type;
4435 if (SWITCH_TABLE (fixp))
4437 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
4438 rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy);
4439 if (r_type == BFD_RELOC_16)
4440 r_type = BFD_RELOC_SH_SWITCH16;
4441 else if (r_type == BFD_RELOC_8)
4442 r_type = BFD_RELOC_8_PCREL;
4443 else if (r_type == BFD_RELOC_32)
4444 r_type = BFD_RELOC_SH_SWITCH32;
4448 else if (r_type == BFD_RELOC_SH_USES)
4449 rel->addend = fixp->fx_addnumber;
4450 else if (r_type == BFD_RELOC_SH_COUNT)
4451 rel->addend = fixp->fx_offset;
4452 else if (r_type == BFD_RELOC_SH_ALIGN)
4453 rel->addend = fixp->fx_offset;
4454 else if (r_type == BFD_RELOC_VTABLE_INHERIT
4455 || r_type == BFD_RELOC_VTABLE_ENTRY)
4456 rel->addend = fixp->fx_offset;
4457 else if (r_type == BFD_RELOC_SH_LOOP_START
4458 || r_type == BFD_RELOC_SH_LOOP_END)
4459 rel->addend = fixp->fx_offset;
4460 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
4463 rel->address = rel->addend = fixp->fx_offset;
4466 else if (shmedia_init_reloc (rel, fixp))
4470 rel->addend = fixp->fx_addnumber;
4472 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
4474 if (rel->howto == NULL)
4476 as_bad_where (fixp->fx_file, fixp->fx_line,
4477 _("Cannot represent relocation type %s"),
4478 bfd_get_reloc_code_name (r_type));
4479 /* Set howto to a garbage value so that we can keep going. */
4480 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
4481 gas_assert (rel->howto != NULL);
4484 else if (rel->howto->type == R_SH_IND12W)
4485 rel->addend += fixp->fx_offset - 4;
4492 inline static char *
4493 sh_end_of_match (char *cont, char *what)
4495 int len = strlen (what);
4497 if (strncasecmp (cont, what, strlen (what)) == 0
4498 && ! is_part_of_name (cont[len]))
4505 sh_parse_name (char const *name,
4507 enum expr_mode mode,
4510 char *next = input_line_pointer;
4515 exprP->X_op_symbol = NULL;
4517 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
4520 GOT_symbol = symbol_find_or_make (name);
4522 exprP->X_add_symbol = GOT_symbol;
4524 /* If we have an absolute symbol or a reg, then we know its
4526 segment = S_GET_SEGMENT (exprP->X_add_symbol);
4527 if (mode != expr_defer && segment == absolute_section)
4529 exprP->X_op = O_constant;
4530 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
4531 exprP->X_add_symbol = NULL;
4533 else if (mode != expr_defer && segment == reg_section)
4535 exprP->X_op = O_register;
4536 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
4537 exprP->X_add_symbol = NULL;
4541 exprP->X_op = O_symbol;
4542 exprP->X_add_number = 0;
4548 exprP->X_add_symbol = symbol_find_or_make (name);
4550 if (*nextcharP != '@')
4552 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF")))
4553 reloc_type = BFD_RELOC_32_GOTOFF;
4554 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT")))
4555 reloc_type = BFD_RELOC_SH_GOTPLT32;
4556 else if ((next_end = sh_end_of_match (next + 1, "GOT")))
4557 reloc_type = BFD_RELOC_32_GOT_PCREL;
4558 else if ((next_end = sh_end_of_match (next + 1, "PLT")))
4559 reloc_type = BFD_RELOC_32_PLT_PCREL;
4560 else if ((next_end = sh_end_of_match (next + 1, "TLSGD")))
4561 reloc_type = BFD_RELOC_SH_TLS_GD_32;
4562 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM")))
4563 reloc_type = BFD_RELOC_SH_TLS_LD_32;
4564 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF")))
4565 reloc_type = BFD_RELOC_SH_TLS_IE_32;
4566 else if ((next_end = sh_end_of_match (next + 1, "TPOFF")))
4567 reloc_type = BFD_RELOC_SH_TLS_LE_32;
4568 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF")))
4569 reloc_type = BFD_RELOC_SH_TLS_LDO_32;
4570 else if ((next_end = sh_end_of_match (next + 1, "PCREL")))
4571 reloc_type = BFD_RELOC_32_PCREL;
4572 else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC")))
4573 reloc_type = BFD_RELOC_SH_GOTFUNCDESC;
4574 else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC")))
4575 reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC;
4576 else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC")))
4577 reloc_type = BFD_RELOC_SH_FUNCDESC;
4581 *input_line_pointer = *nextcharP;
4582 input_line_pointer = next_end;
4583 *nextcharP = *input_line_pointer;
4584 *input_line_pointer = '\0';
4586 exprP->X_op = O_PIC_reloc;
4587 exprP->X_add_number = 0;
4588 exprP->X_md = reloc_type;
4594 sh_cfi_frame_initial_instructions (void)
4596 cfi_add_CFA_def_cfa (15, 0);
4600 sh_regname_to_dw2regnum (char *regname)
4602 unsigned int regnum = -1;
4606 static struct { char *name; int dw2regnum; } regnames[] =
4608 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4609 { "macl", 21 }, { "fpul", 23 }
4612 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
4613 if (strcmp (regnames[i].name, regname) == 0)
4614 return regnames[i].dw2regnum;
4616 if (regname[0] == 'r')
4619 regnum = strtoul (p, &q, 10);
4620 if (p == q || *q || regnum >= 16)
4623 else if (regname[0] == 'f' && regname[1] == 'r')
4626 regnum = strtoul (p, &q, 10);
4627 if (p == q || *q || regnum >= 16)
4631 else if (regname[0] == 'x' && regname[1] == 'd')
4634 regnum = strtoul (p, &q, 10);
4635 if (p == q || *q || regnum >= 8)
4641 #endif /* OBJ_ELF */