1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
43 expressionS immediate;
47 const char comment_chars[] = "!";
48 const char line_separator_chars[] = ";";
49 const char line_comment_chars[] = "!#";
51 static void s_uses PARAMS ((int));
53 static void sh_count_relocs PARAMS ((bfd *, segT, PTR));
54 static void sh_frob_section PARAMS ((bfd *, segT, PTR));
56 static void s_uacons PARAMS ((int));
57 static sh_opcode_info *find_cooked_opcode PARAMS ((char **));
58 static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *));
59 static void little PARAMS ((int));
60 static void big PARAMS ((int));
61 static int parse_reg PARAMS ((char *, int *, int *));
62 static char *parse_exp PARAMS ((char *, sh_operand_info *));
63 static char *parse_at PARAMS ((char *, sh_operand_info *));
64 static void get_operand PARAMS ((char **, sh_operand_info *));
65 static char *get_operands
66 PARAMS ((sh_opcode_info *, char *, sh_operand_info *));
67 static sh_opcode_info *get_specific
68 PARAMS ((sh_opcode_info *, sh_operand_info *));
69 static void insert PARAMS ((char *, int, int, sh_operand_info *));
70 static void build_relax PARAMS ((sh_opcode_info *, sh_operand_info *));
71 static char *insert_loop_bounds PARAMS ((char *, sh_operand_info *));
72 static unsigned int build_Mytes
73 PARAMS ((sh_opcode_info *, sh_operand_info *));
76 static void sh_elf_cons PARAMS ((int));
78 inline static int sh_PIC_related_p PARAMS ((symbolS *));
79 static int sh_check_fixup PARAMS ((expressionS *, bfd_reloc_code_real_type *));
80 inline static char *sh_end_of_match PARAMS ((char *, char *));
82 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
87 int ignore ATTRIBUTE_UNUSED;
89 if (! target_big_endian)
90 as_bad (_("directive .big encountered when option -big required"));
92 /* Stop further messages. */
93 target_big_endian = 1;
98 int ignore ATTRIBUTE_UNUSED;
100 if (target_big_endian)
101 as_bad (_("directive .little encountered when option -little required"));
103 /* Stop further messages. */
104 target_big_endian = 0;
107 /* This table describes all the machine specific pseudo-ops the assembler
108 has to support. The fields are:
109 pseudo-op name without dot
110 function to call to execute this pseudo-op
111 Integer arg to pass to the function. */
113 const pseudo_typeS md_pseudo_table[] =
116 {"long", sh_elf_cons, 4},
117 {"int", sh_elf_cons, 4},
118 {"word", sh_elf_cons, 2},
119 {"short", sh_elf_cons, 2},
125 {"form", listing_psize, 0},
126 {"little", little, 0},
127 {"heading", listing_title, 0},
128 {"import", s_ignore, 0},
129 {"page", listing_eject, 0},
130 {"program", s_ignore, 0},
132 {"uaword", s_uacons, 2},
133 {"ualong", s_uacons, 4},
134 {"uaquad", s_uacons, 8},
135 {"2byte", s_uacons, 2},
136 {"4byte", s_uacons, 4},
137 {"8byte", s_uacons, 8},
139 {"file", dwarf2_directive_file, 0 },
140 {"loc", dwarf2_directive_loc, 0 },
143 {"mode", s_sh64_mode, 0 },
145 /* Have the old name too. */
146 {"isa", s_sh64_mode, 0 },
148 /* Assert that the right ABI is used. */
149 {"abi", s_sh64_abi, 0 },
151 { "vtable_inherit", sh64_vtable_inherit, 0 },
152 { "vtable_entry", sh64_vtable_entry, 0 },
153 #endif /* HAVE_SH64 */
157 /*int md_reloc_size; */
159 int sh_relax; /* set if -relax seen */
161 /* Whether -small was seen. */
165 /* Whether -dsp was seen. */
169 /* The bit mask of architectures that could
170 accomodate the insns seen so far. */
171 static int valid_arch;
173 const char EXP_CHARS[] = "eE";
175 /* Chars that mean this number is a floating point constant. */
178 const char FLT_CHARS[] = "rRsSfFdDxXpP";
180 #define C(a,b) ENCODE_RELAX(a,b)
182 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
183 #define GET_WHAT(x) ((x>>4))
185 /* These are the three types of relaxable instrction. */
186 /* These are the types of relaxable instructions; except for END which is
189 #define COND_JUMP_DELAY 2
190 #define UNCOND_JUMP 3
194 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
195 #define SH64PCREL16_32 4
196 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
197 #define SH64PCREL16_64 5
199 /* Variants of the above for adjusting the insn to PTA or PTB according to
201 #define SH64PCREL16PT_32 6
202 #define SH64PCREL16PT_64 7
204 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
205 #define MOVI_IMM_32 8
206 #define MOVI_IMM_32_PCREL 9
207 #define MOVI_IMM_64 10
208 #define MOVI_IMM_64_PCREL 11
211 #else /* HAVE_SH64 */
215 #endif /* HAVE_SH64 */
221 #define UNDEF_WORD_DISP 4
227 #define UNDEF_SH64PCREL 0
228 #define SH64PCREL16 1
229 #define SH64PCREL32 2
230 #define SH64PCREL48 3
231 #define SH64PCREL64 4
232 #define SH64PCRELPLT 5
240 #define MOVI_GOTOFF 6
242 #endif /* HAVE_SH64 */
244 /* Branch displacements are from the address of the branch plus
245 four, thus all minimum and maximum values have 4 added to them. */
248 #define COND8_LENGTH 2
250 /* There is one extra instruction before the branch, so we must add
251 two more bytes to account for it. */
252 #define COND12_F 4100
253 #define COND12_M -4090
254 #define COND12_LENGTH 6
256 #define COND12_DELAY_LENGTH 4
258 /* ??? The minimum and maximum values are wrong, but this does not matter
259 since this relocation type is not supported yet. */
260 #define COND32_F (1<<30)
261 #define COND32_M -(1<<30)
262 #define COND32_LENGTH 14
264 #define UNCOND12_F 4098
265 #define UNCOND12_M -4092
266 #define UNCOND12_LENGTH 2
268 /* ??? The minimum and maximum values are wrong, but this does not matter
269 since this relocation type is not supported yet. */
270 #define UNCOND32_F (1<<30)
271 #define UNCOND32_M -(1<<30)
272 #define UNCOND32_LENGTH 14
275 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
276 TRd" as is the current insn, so no extra length. Note that the "reach"
277 is calculated from the address *after* that insn, but the offset in the
278 insn is calculated from the beginning of the insn. We also need to
279 take into account the implicit 1 coded as the "A" in PTA when counting
280 forward. If PTB reaches an odd address, we trap that as an error
281 elsewhere, so we don't have to have different relaxation entries. We
282 don't add a one to the negative range, since PTB would then have the
283 farthest backward-reaching value skipped, not generated at relaxation. */
284 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
285 #define SH64PCREL16_M (-32768 * 4 - 4)
286 #define SH64PCREL16_LENGTH 0
288 /* The next step is to change that PT insn into
289 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
290 SHORI (label - datalabel Ln) & 65535, R25
293 which means two extra insns, 8 extra bytes. This is the limit for the
296 The expressions look a bit bad since we have to adjust this to avoid overflow on a
298 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
299 #define SH64PCREL32_LENGTH (2 * 4)
301 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
303 #if BFD_HOST_64BIT_LONG
304 /* The "reach" type is long, so we can only do this for a 64-bit-long
306 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
307 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
308 #define SH64PCREL48_M (((long) -1 << 47) - 4)
309 #define SH64PCREL48_LENGTH (3 * 4)
311 /* If the host does not have 64-bit longs, just make this state identical
312 in reach to the 32-bit state. Note that we have a slightly incorrect
313 reach, but the correct one above will overflow a 32-bit number. */
314 #define SH64PCREL32_M (((long) -1 << 30) * 2)
315 #define SH64PCREL48_F SH64PCREL32_F
316 #define SH64PCREL48_M SH64PCREL32_M
317 #define SH64PCREL48_LENGTH (3 * 4)
318 #endif /* BFD_HOST_64BIT_LONG */
320 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
322 #define SH64PCREL64_LENGTH (4 * 4)
324 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
325 SH64PCREL expansions. The PCREL one is similar, but the other has no
326 pc-relative reach; it must be fully expanded in
327 shmedia_md_estimate_size_before_relax. */
328 #define MOVI_16_LENGTH 0
329 #define MOVI_16_F (32767 - 4)
330 #define MOVI_16_M (-32768 - 4)
331 #define MOVI_32_LENGTH 4
332 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
333 #define MOVI_48_LENGTH 8
335 #if BFD_HOST_64BIT_LONG
336 /* The "reach" type is long, so we can only do this for a 64-bit-long
338 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
339 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
340 #define MOVI_48_M (((long) -1 << 47) - 4)
342 /* If the host does not have 64-bit longs, just make this state identical
343 in reach to the 32-bit state. Note that we have a slightly incorrect
344 reach, but the correct one above will overflow a 32-bit number. */
345 #define MOVI_32_M (((long) -1 << 30) * 2)
346 #define MOVI_48_F MOVI_32_F
347 #define MOVI_48_M MOVI_32_M
348 #endif /* BFD_HOST_64BIT_LONG */
350 #define MOVI_64_LENGTH 12
351 #endif /* HAVE_SH64 */
353 #define EMPTY { 0, 0, 0, 0 }
355 const relax_typeS md_relax_table[C (END, 0)] = {
356 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
357 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
360 /* C (COND_JUMP, COND8) */
361 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
362 /* C (COND_JUMP, COND12) */
363 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
364 /* C (COND_JUMP, COND32) */
365 { COND32_F, COND32_M, COND32_LENGTH, 0, },
366 /* C (COND_JUMP, UNDEF_WORD_DISP) */
367 { 0, 0, COND32_LENGTH, 0, },
369 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
372 /* C (COND_JUMP_DELAY, COND8) */
373 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
374 /* C (COND_JUMP_DELAY, COND12) */
375 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
376 /* C (COND_JUMP_DELAY, COND32) */
377 { COND32_F, COND32_M, COND32_LENGTH, 0, },
378 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
379 { 0, 0, COND32_LENGTH, 0, },
381 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
384 /* C (UNCOND_JUMP, UNCOND12) */
385 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
386 /* C (UNCOND_JUMP, UNCOND32) */
387 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
389 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
390 { 0, 0, UNCOND32_LENGTH, 0, },
392 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
395 /* C (SH64PCREL16_32, SH64PCREL16) */
397 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) },
398 /* C (SH64PCREL16_32, SH64PCREL32) */
399 { 0, 0, SH64PCREL32_LENGTH, 0 },
401 /* C (SH64PCREL16_32, SH64PCRELPLT) */
402 { 0, 0, SH64PCREL32_LENGTH, 0 },
404 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
406 /* C (SH64PCREL16_64, SH64PCREL16) */
408 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) },
409 /* C (SH64PCREL16_64, SH64PCREL32) */
410 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) },
411 /* C (SH64PCREL16_64, SH64PCREL48) */
412 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) },
413 /* C (SH64PCREL16_64, SH64PCREL64) */
414 { 0, 0, SH64PCREL64_LENGTH, 0 },
415 /* C (SH64PCREL16_64, SH64PCRELPLT) */
416 { 0, 0, SH64PCREL64_LENGTH, 0 },
418 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
420 /* C (SH64PCREL16PT_32, SH64PCREL16) */
422 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) },
423 /* C (SH64PCREL16PT_32, SH64PCREL32) */
424 { 0, 0, SH64PCREL32_LENGTH, 0 },
426 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
427 { 0, 0, SH64PCREL32_LENGTH, 0 },
429 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
431 /* C (SH64PCREL16PT_64, SH64PCREL16) */
433 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) },
434 /* C (SH64PCREL16PT_64, SH64PCREL32) */
438 C (SH64PCREL16PT_64, SH64PCREL48) },
439 /* C (SH64PCREL16PT_64, SH64PCREL48) */
440 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) },
441 /* C (SH64PCREL16PT_64, SH64PCREL64) */
442 { 0, 0, SH64PCREL64_LENGTH, 0 },
443 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
444 { 0, 0, SH64PCREL64_LENGTH, 0},
446 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
448 /* C (MOVI_IMM_32, UNDEF_MOVI) */
449 { 0, 0, MOVI_32_LENGTH, 0 },
450 /* C (MOVI_IMM_32, MOVI_16) */
451 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) },
452 /* C (MOVI_IMM_32, MOVI_32) */
453 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 },
455 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
456 { 0, 0, MOVI_32_LENGTH, 0 },
457 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
459 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
461 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) },
462 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
463 { 0, 0, MOVI_32_LENGTH, 0 },
465 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
466 { 0, 0, MOVI_32_LENGTH, 0 },
468 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
469 { 0, 0, MOVI_32_LENGTH, 0 },
470 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
472 /* C (MOVI_IMM_64, UNDEF_MOVI) */
473 { 0, 0, MOVI_64_LENGTH, 0 },
474 /* C (MOVI_IMM_64, MOVI_16) */
475 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) },
476 /* C (MOVI_IMM_64, MOVI_32) */
477 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) },
478 /* C (MOVI_IMM_64, MOVI_48) */
479 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) },
480 /* C (MOVI_IMM_64, MOVI_64) */
481 { 0, 0, MOVI_64_LENGTH, 0 },
483 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
484 { 0, 0, MOVI_64_LENGTH, 0 },
485 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
487 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
489 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) },
490 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
491 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) },
492 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
493 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) },
494 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
495 { 0, 0, MOVI_64_LENGTH, 0 },
496 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
497 { 0, 0, MOVI_64_LENGTH, 0 },
499 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
500 { 0, 0, MOVI_64_LENGTH, 0 },
501 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
503 #endif /* HAVE_SH64 */
509 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
513 /* Determinet whether the symbol needs any kind of PIC relocation. */
516 sh_PIC_related_p (sym)
524 if (sym == GOT_symbol)
528 if (sh_PIC_related_p (*symbol_get_tc (sym)))
532 exp = symbol_get_value_expression (sym);
534 return (exp->X_op == O_PIC_reloc
535 || sh_PIC_related_p (exp->X_add_symbol)
536 || sh_PIC_related_p (exp->X_op_symbol));
539 /* Determine the relocation type to be used to represent the
540 expression, that may be rearranged. */
543 sh_check_fixup (main_exp, r_type_p)
544 expressionS *main_exp;
545 bfd_reloc_code_real_type *r_type_p;
547 expressionS *exp = main_exp;
549 /* This is here for backward-compatibility only. GCC used to generated:
551 f@PLT + . - (.LPCS# + 2)
553 but we'd rather be able to handle this as a PIC-related reference
554 plus/minus a symbol. However, gas' parser gives us:
556 O_subtract (O_add (f@PLT, .), .LPCS#+2)
558 so we attempt to transform this into:
560 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
562 which we can handle simply below. */
563 if (exp->X_op == O_subtract)
565 if (sh_PIC_related_p (exp->X_op_symbol))
568 exp = symbol_get_value_expression (exp->X_add_symbol);
570 if (exp && sh_PIC_related_p (exp->X_op_symbol))
573 if (exp && exp->X_op == O_add
574 && sh_PIC_related_p (exp->X_add_symbol))
576 symbolS *sym = exp->X_add_symbol;
578 exp->X_op = O_subtract;
579 exp->X_add_symbol = main_exp->X_op_symbol;
581 main_exp->X_op_symbol = main_exp->X_add_symbol;
582 main_exp->X_add_symbol = sym;
584 main_exp->X_add_number += exp->X_add_number;
585 exp->X_add_number = 0;
590 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol))
593 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract)
596 if (exp->X_add_symbol
597 && (exp->X_add_symbol == GOT_symbol
599 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol)))
603 case BFD_RELOC_SH_IMM_LOW16:
604 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16;
607 case BFD_RELOC_SH_IMM_MEDLOW16:
608 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16;
611 case BFD_RELOC_SH_IMM_MEDHI16:
612 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16;
615 case BFD_RELOC_SH_IMM_HI16:
616 *r_type_p = BFD_RELOC_SH_GOTPC_HI16;
620 case BFD_RELOC_UNUSED:
621 *r_type_p = BFD_RELOC_SH_GOTPC;
630 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
632 *r_type_p = BFD_RELOC_SH_GOTPC;
636 exp = symbol_get_value_expression (exp->X_add_symbol);
641 if (exp->X_op == O_PIC_reloc)
647 case BFD_RELOC_UNUSED:
648 *r_type_p = exp->X_md;
651 case BFD_RELOC_SH_IMM_LOW16:
654 case BFD_RELOC_32_GOTOFF:
655 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16;
658 case BFD_RELOC_SH_GOTPLT32:
659 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16;
662 case BFD_RELOC_32_GOT_PCREL:
663 *r_type_p = BFD_RELOC_SH_GOT_LOW16;
666 case BFD_RELOC_32_PLT_PCREL:
667 *r_type_p = BFD_RELOC_SH_PLT_LOW16;
675 case BFD_RELOC_SH_IMM_MEDLOW16:
678 case BFD_RELOC_32_GOTOFF:
679 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16;
682 case BFD_RELOC_SH_GOTPLT32:
683 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16;
686 case BFD_RELOC_32_GOT_PCREL:
687 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16;
690 case BFD_RELOC_32_PLT_PCREL:
691 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16;
699 case BFD_RELOC_SH_IMM_MEDHI16:
702 case BFD_RELOC_32_GOTOFF:
703 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16;
706 case BFD_RELOC_SH_GOTPLT32:
707 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16;
710 case BFD_RELOC_32_GOT_PCREL:
711 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16;
714 case BFD_RELOC_32_PLT_PCREL:
715 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16;
723 case BFD_RELOC_SH_IMM_HI16:
726 case BFD_RELOC_32_GOTOFF:
727 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16;
730 case BFD_RELOC_SH_GOTPLT32:
731 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16;
734 case BFD_RELOC_32_GOT_PCREL:
735 *r_type_p = BFD_RELOC_SH_GOT_HI16;
738 case BFD_RELOC_32_PLT_PCREL:
739 *r_type_p = BFD_RELOC_SH_PLT_HI16;
751 *r_type_p = exp->X_md;
754 exp->X_op = O_symbol;
757 main_exp->X_add_symbol = exp->X_add_symbol;
758 main_exp->X_add_number += exp->X_add_number;
762 return (sh_PIC_related_p (exp->X_add_symbol)
763 || sh_PIC_related_p (exp->X_op_symbol));
768 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
771 sh_cons_fix_new (frag, off, size, exp)
776 bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED;
778 if (sh_check_fixup (exp, &r_type))
779 as_bad (_("Invalid PIC expression."));
781 if (r_type == BFD_RELOC_UNUSED)
785 r_type = BFD_RELOC_8;
789 r_type = BFD_RELOC_16;
793 r_type = BFD_RELOC_32;
798 r_type = BFD_RELOC_64;
808 as_bad (_("unsupported BFD relocation size %u"), size);
809 r_type = BFD_RELOC_UNUSED;
812 fix_new_exp (frag, off, size, exp, 0, r_type);
815 /* The regular cons() function, that reads constants, doesn't support
816 suffixes such as @GOT, @GOTOFF and @PLT, that generate
817 machine-specific relocation types. So we must define it here. */
818 /* Clobbers input_line_pointer, checks end-of-line. */
821 register int nbytes; /* 1=.byte, 2=.word, 4=.long */
827 /* Update existing range to include a previous insn, if there was one. */
828 sh64_update_contents_mark (true);
830 /* We need to make sure the contents type is set to data. */
833 #endif /* HAVE_SH64 */
835 if (is_it_end_of_statement ())
837 demand_empty_rest_of_line ();
844 emit_expr (&exp, (unsigned int) nbytes);
846 while (*input_line_pointer++ == ',');
848 input_line_pointer--; /* Put terminator back into stream. */
849 if (*input_line_pointer == '#' || *input_line_pointer == '!')
851 while (! is_end_of_line[(unsigned char) *input_line_pointer++]);
854 demand_empty_rest_of_line ();
859 /* This function is called once, at assembler startup time. This should
860 set up all the tables, etc that the MD part of the assembler needs. */
865 sh_opcode_info *opcode;
866 char *prev_name = "";
869 target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up);
870 valid_arch = target_arch;
876 opcode_hash_control = hash_new ();
878 /* Insert unique names into hash table. */
879 for (opcode = sh_table; opcode->name; opcode++)
881 if (strcmp (prev_name, opcode->name))
883 if (! (opcode->arch & target_arch))
885 prev_name = opcode->name;
886 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
890 /* Make all the opcodes with the same name point to the same
892 opcode->name = prev_name;
899 static int reg_x, reg_y;
903 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
905 /* Try to parse a reg name. Return the number of chars consumed. */
908 parse_reg (src, mode, reg)
913 char l0 = TOLOWER (src[0]);
914 char l1 = l0 ? TOLOWER (src[1]) : 0;
916 /* We use ! IDENT_CHAR for the next character after the register name, to
917 make sure that we won't accidentally recognize a symbol name such as
918 'sram' or sr_ram as being a reference to the register 'sr'. */
924 if (src[2] >= '0' && src[2] <= '5'
925 && ! IDENT_CHAR ((unsigned char) src[3]))
928 *reg = 10 + src[2] - '0';
932 if (l1 >= '0' && l1 <= '9'
933 && ! IDENT_CHAR ((unsigned char) src[2]))
939 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0
940 && ! IDENT_CHAR ((unsigned char) src[7]))
947 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
952 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
963 if (! IDENT_CHAR ((unsigned char) src[2]))
969 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
978 if (! IDENT_CHAR ((unsigned char) src[2]))
984 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
992 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1'
993 && ! IDENT_CHAR ((unsigned char) src[3]))
996 *reg = 4 + (l1 - '0');
999 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1'
1000 && ! IDENT_CHAR ((unsigned char) src[3]))
1003 *reg = 6 + (l1 - '0');
1006 if (l1 == 's' && src[2] >= '0' && src[2] <= '3'
1007 && ! IDENT_CHAR ((unsigned char) src[3]))
1012 *reg = n | ((~n & 2) << 1);
1017 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2]))
1039 if (l0 == 'x' && l1 >= '0' && l1 <= '1'
1040 && ! IDENT_CHAR ((unsigned char) src[2]))
1043 *reg = A_X0_NUM + l1 - '0';
1047 if (l0 == 'y' && l1 >= '0' && l1 <= '1'
1048 && ! IDENT_CHAR ((unsigned char) src[2]))
1051 *reg = A_Y0_NUM + l1 - '0';
1055 if (l0 == 'm' && l1 >= '0' && l1 <= '1'
1056 && ! IDENT_CHAR ((unsigned char) src[2]))
1059 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM;
1065 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
1071 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c'
1072 && ! IDENT_CHAR ((unsigned char) src[3]))
1078 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r'
1079 && ! IDENT_CHAR ((unsigned char) src[3]))
1085 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r'
1086 && ! IDENT_CHAR ((unsigned char) src[3]))
1092 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1093 && ! IDENT_CHAR ((unsigned char) src[3]))
1099 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
1105 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
1112 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
1117 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
1119 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1120 and use an uninitialized immediate. */
1124 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1125 && ! IDENT_CHAR ((unsigned char) src[3]))
1130 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1131 && ! IDENT_CHAR ((unsigned char) src[3]))
1137 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c'
1138 && ! IDENT_CHAR ((unsigned char) src[4]))
1140 if (TOLOWER (src[3]) == 'l')
1145 if (TOLOWER (src[3]) == 'h')
1151 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd'
1152 && ! IDENT_CHAR ((unsigned char) src[3]))
1157 if (l0 == 'f' && l1 == 'r')
1161 if (src[3] >= '0' && src[3] <= '5'
1162 && ! IDENT_CHAR ((unsigned char) src[4]))
1165 *reg = 10 + src[3] - '0';
1169 if (src[2] >= '0' && src[2] <= '9'
1170 && ! IDENT_CHAR ((unsigned char) src[3]))
1173 *reg = (src[2] - '0');
1177 if (l0 == 'd' && l1 == 'r')
1181 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
1182 && ! IDENT_CHAR ((unsigned char) src[4]))
1185 *reg = 10 + src[3] - '0';
1189 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
1190 && ! IDENT_CHAR ((unsigned char) src[3]))
1193 *reg = (src[2] - '0');
1197 if (l0 == 'x' && l1 == 'd')
1201 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
1202 && ! IDENT_CHAR ((unsigned char) src[4]))
1205 *reg = 11 + src[3] - '0';
1209 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
1210 && ! IDENT_CHAR ((unsigned char) src[3]))
1213 *reg = (src[2] - '0') + 1;
1217 if (l0 == 'f' && l1 == 'v')
1219 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
1225 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
1226 && ! IDENT_CHAR ((unsigned char) src[3]))
1229 *reg = (src[2] - '0');
1233 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u'
1234 && TOLOWER (src[3]) == 'l'
1235 && ! IDENT_CHAR ((unsigned char) src[4]))
1241 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's'
1242 && TOLOWER (src[3]) == 'c'
1243 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
1249 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't'
1250 && TOLOWER (src[3]) == 'r'
1251 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
1263 sh_operand_info *op;
1268 save = input_line_pointer;
1269 input_line_pointer = s;
1270 expression (&op->immediate);
1271 if (op->immediate.X_op == O_absent)
1272 as_bad (_("missing operand"));
1274 else if (op->immediate.X_op == O_PIC_reloc
1275 || sh_PIC_related_p (op->immediate.X_add_symbol)
1276 || sh_PIC_related_p (op->immediate.X_op_symbol))
1277 as_bad (_("misplaced PIC operand"));
1279 new = input_line_pointer;
1280 input_line_pointer = save;
1284 /* The many forms of operand:
1287 @Rn Register indirect
1300 pr, gbr, vbr, macl, mach
1306 sh_operand_info *op;
1313 /* Must be predecrement. */
1316 len = parse_reg (src, &mode, &(op->reg));
1317 if (mode != A_REG_N)
1318 as_bad (_("illegal register after @-"));
1323 else if (src[0] == '(')
1325 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1328 len = parse_reg (src, &mode, &(op->reg));
1329 if (len && mode == A_REG_N)
1334 as_bad (_("must be @(r0,...)"));
1339 /* Now can be rn or gbr. */
1340 len = parse_reg (src, &mode, &(op->reg));
1350 op->type = A_R0_GBR;
1352 else if (mode == A_REG_N)
1354 op->type = A_IND_R0_REG_N;
1358 as_bad (_("syntax error in @(r0,...)"));
1363 as_bad (_("syntax error in @(r0...)"));
1368 /* Must be an @(disp,.. thing). */
1369 src = parse_exp (src, op);
1372 /* Now can be rn, gbr or pc. */
1373 len = parse_reg (src, &mode, &op->reg);
1376 if (mode == A_REG_N)
1378 op->type = A_DISP_REG_N;
1380 else if (mode == A_GBR)
1382 op->type = A_DISP_GBR;
1384 else if (mode == A_PC)
1386 /* We want @(expr, pc) to uniformly address . + expr,
1387 no matter if expr is a constant, or a more complex
1388 expression, e.g. sym-. or sym1-sym2.
1389 However, we also used to accept @(sym,pc)
1390 as adressing sym, i.e. meaning the same as plain sym.
1391 Some existing code does use the @(sym,pc) syntax, so
1392 we give it the old semantics for now, but warn about
1393 its use, so that users have some time to fix their code.
1395 Note that due to this backward compatibility hack,
1396 we'll get unexpected results when @(offset, pc) is used,
1397 and offset is a symbol that is set later to an an address
1398 difference, or an external symbol that is set to an
1399 address difference in another source file, so we want to
1400 eventually remove it. */
1401 if (op->immediate.X_op == O_symbol)
1403 op->type = A_DISP_PC;
1404 as_warn (_("Deprecated syntax."));
1408 op->type = A_DISP_PC_ABS;
1409 /* Such operands don't get corrected for PC==.+4, so
1410 make the correction here. */
1411 op->immediate.X_add_number -= 4;
1416 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1421 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1426 as_bad (_("expecting )"));
1432 src += parse_reg (src, &mode, &(op->reg));
1433 if (mode != A_REG_N)
1434 as_bad (_("illegal register after @"));
1441 l0 = TOLOWER (src[0]);
1442 l1 = TOLOWER (src[1]);
1444 if ((l0 == 'r' && l1 == '8')
1445 || (l0 == 'i' && (l1 == 'x' || l1 == 's')))
1448 op->type = A_PMOD_N;
1450 else if ( (l0 == 'r' && l1 == '9')
1451 || (l0 == 'i' && l1 == 'y'))
1454 op->type = A_PMODY_N;
1466 get_operand (ptr, op)
1468 sh_operand_info *op;
1477 *ptr = parse_exp (src, op);
1482 else if (src[0] == '@')
1484 *ptr = parse_at (src, op);
1487 len = parse_reg (src, &mode, &(op->reg));
1496 /* Not a reg, the only thing left is a displacement. */
1497 *ptr = parse_exp (src, op);
1498 op->type = A_DISP_PC;
1504 get_operands (info, args, operand)
1505 sh_opcode_info *info;
1507 sh_operand_info *operand;
1512 /* The pre-processor will eliminate whitespace in front of '@'
1513 after the first argument; we may be called multiple times
1514 from assemble_ppi, so don't insist on finding whitespace here. */
1518 get_operand (&ptr, operand + 0);
1525 get_operand (&ptr, operand + 1);
1526 /* ??? Hack: psha/pshl have a varying operand number depending on
1527 the type of the first operand. We handle this by having the
1528 three-operand version first and reducing the number of operands
1529 parsed to two if we see that the first operand is an immediate.
1530 This works because no insn with three operands has an immediate
1531 as first operand. */
1532 if (info->arg[2] && operand[0].type != A_IMM)
1538 get_operand (&ptr, operand + 2);
1542 operand[2].type = 0;
1547 operand[1].type = 0;
1548 operand[2].type = 0;
1553 operand[0].type = 0;
1554 operand[1].type = 0;
1555 operand[2].type = 0;
1560 /* Passed a pointer to a list of opcodes which use different
1561 addressing modes, return the opcode which matches the opcodes
1564 static sh_opcode_info *
1565 get_specific (opcode, operands)
1566 sh_opcode_info *opcode;
1567 sh_operand_info *operands;
1569 sh_opcode_info *this_try = opcode;
1570 char *name = opcode->name;
1573 while (opcode->name)
1575 this_try = opcode++;
1576 if (this_try->name != name)
1578 /* We've looked so far down the table that we've run out of
1579 opcodes with the same name. */
1583 /* Look at both operands needed by the opcodes and provided by
1584 the user - since an arg test will often fail on the same arg
1585 again and again, we'll try and test the last failing arg the
1586 first on each opcode try. */
1587 for (n = 0; this_try->arg[n]; n++)
1589 sh_operand_info *user = operands + n;
1590 sh_arg_type arg = this_try->arg[n];
1595 if (user->type == A_DISP_PC_ABS)
1605 if (user->type != arg)
1609 /* opcode needs r0 */
1610 if (user->type != A_REG_N || user->reg != 0)
1614 if (user->type != A_R0_GBR || user->reg != 0)
1618 if (user->type != F_REG_N || user->reg != 0)
1626 case A_IND_R0_REG_N:
1637 /* Opcode needs rn */
1638 if (user->type != arg)
1643 if (user->type != D_REG_N && user->type != X_REG_N)
1658 if (user->type != arg)
1663 if (user->type != arg)
1672 case A_IND_R0_REG_M:
1675 /* Opcode needs rn */
1676 if (user->type != arg - A_REG_M + A_REG_N)
1682 if (user->type != DSP_REG_N)
1704 if (user->type != DSP_REG_N)
1726 if (user->type != DSP_REG_N)
1748 if (user->type != DSP_REG_N)
1770 if (user->type != DSP_REG_N)
1792 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
1796 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
1800 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
1804 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
1808 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
1818 /* Opcode needs rn */
1819 if (user->type != arg - F_REG_M + F_REG_N)
1824 if (user->type != D_REG_N && user->type != X_REG_N)
1829 if (user->type != XMTRX_M4)
1835 printf (_("unhandled %d\n"), arg);
1839 if ( !(valid_arch & this_try->arch))
1841 valid_arch &= this_try->arch;
1851 insert (where, how, pcrel, op)
1855 sh_operand_info *op;
1857 fix_new_exp (frag_now,
1858 where - frag_now->fr_literal,
1866 build_relax (opcode, op)
1867 sh_opcode_info *opcode;
1868 sh_operand_info *op;
1870 int high_byte = target_big_endian ? 0 : 1;
1873 if (opcode->arg[0] == A_BDISP8)
1875 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
1876 p = frag_var (rs_machine_dependent,
1877 md_relax_table[C (what, COND32)].rlx_length,
1878 md_relax_table[C (what, COND8)].rlx_length,
1880 op->immediate.X_add_symbol,
1881 op->immediate.X_add_number,
1883 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
1885 else if (opcode->arg[0] == A_BDISP12)
1887 p = frag_var (rs_machine_dependent,
1888 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
1889 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
1891 op->immediate.X_add_symbol,
1892 op->immediate.X_add_number,
1894 p[high_byte] = (opcode->nibbles[0] << 4);
1899 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1902 insert_loop_bounds (output, operand)
1904 sh_operand_info *operand;
1909 /* Since the low byte of the opcode will be overwritten by the reloc, we
1910 can just stash the high byte into both bytes and ignore endianness. */
1913 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1914 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1918 static int count = 0;
1920 /* If the last loop insn is a two-byte-insn, it is in danger of being
1921 swapped with the insn after it. To prevent this, create a new
1922 symbol - complete with SH_LABEL reloc - after the last loop insn.
1923 If the last loop insn is four bytes long, the symbol will be
1924 right in the middle, but four byte insns are not swapped anyways. */
1925 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1926 Hence a 9 digit number should be enough to count all REPEATs. */
1928 sprintf (name, "_R%x", count++ & 0x3fffffff);
1929 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag);
1930 /* Make this a local symbol. */
1932 SF_SET_LOCAL (end_sym);
1933 #endif /* OBJ_COFF */
1934 symbol_table_insert (end_sym);
1935 end_sym->sy_value = operand[1].immediate;
1936 end_sym->sy_value.X_add_number += 2;
1937 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
1940 output = frag_more (2);
1943 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1944 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1946 return frag_more (2);
1949 /* Now we know what sort of opcodes it is, let's build the bytes. */
1952 build_Mytes (opcode, operand)
1953 sh_opcode_info *opcode;
1954 sh_operand_info *operand;
1958 char *output = frag_more (2);
1959 unsigned int size = 2;
1960 int low_byte = target_big_endian ? 1 : 0;
1966 for (index = 0; index < 4; index++)
1968 sh_nibble_type i = opcode->nibbles[index];
1978 nbuf[index] = reg_n;
1981 nbuf[index] = reg_m;
1984 if (reg_n < 2 || reg_n > 5)
1985 as_bad (_("Invalid register: 'r%d'"), reg_n);
1986 nbuf[index] = (reg_n & 3) | 4;
1989 nbuf[index] = reg_n | (reg_m >> 2);
1992 nbuf[index] = reg_b | 0x08;
1995 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
1998 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
2001 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
2004 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
2007 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
2010 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
2013 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
2016 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
2019 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
2022 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
2025 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
2028 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
2031 insert (output, BFD_RELOC_SH_PCRELIMM8BY4,
2032 operand->type != A_DISP_PC_ABS, operand);
2035 insert (output, BFD_RELOC_SH_PCRELIMM8BY2,
2036 operand->type != A_DISP_PC_ABS, operand);
2039 output = insert_loop_bounds (output, operand);
2040 nbuf[index] = opcode->nibbles[3];
2044 printf (_("failed for %d\n"), i);
2048 if (!target_big_endian)
2050 output[1] = (nbuf[0] << 4) | (nbuf[1]);
2051 output[0] = (nbuf[2] << 4) | (nbuf[3]);
2055 output[0] = (nbuf[0] << 4) | (nbuf[1]);
2056 output[1] = (nbuf[2] << 4) | (nbuf[3]);
2061 /* Find an opcode at the start of *STR_P in the hash table, and set
2062 *STR_P to the first character after the last one read. */
2064 static sh_opcode_info *
2065 find_cooked_opcode (str_p)
2069 unsigned char *op_start;
2070 unsigned char *op_end;
2074 /* Drop leading whitespace. */
2078 /* Find the op code end.
2079 The pre-processor will eliminate whitespace in front of
2080 any '@' after the first argument; we may be called from
2081 assemble_ppi, so the opcode might be terminated by an '@'. */
2082 for (op_start = op_end = (unsigned char *) (str);
2085 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
2088 unsigned char c = op_start[nlen];
2090 /* The machine independent code will convert CMP/EQ into cmp/EQ
2091 because it thinks the '/' is the end of the symbol. Moreover,
2092 all but the first sub-insn is a parallel processing insn won't
2093 be capitalized. Instead of hacking up the machine independent
2094 code, we just deal with it here. */
2104 as_bad (_("can't find opcode "));
2106 return (sh_opcode_info *) hash_find (opcode_hash_control, name);
2109 /* Assemble a parallel processing insn. */
2110 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2113 assemble_ppi (op_end, opcode)
2115 sh_opcode_info *opcode;
2125 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2126 Make sure we encode a defined insn pattern. */
2133 sh_operand_info operand[3];
2135 if (opcode->arg[0] != A_END)
2136 op_end = get_operands (opcode, op_end, operand);
2137 opcode = get_specific (opcode, operand);
2140 /* Couldn't find an opcode which matched the operands. */
2141 char *where = frag_more (2);
2146 as_bad (_("invalid operands for opcode"));
2150 if (opcode->nibbles[0] != PPI)
2151 as_bad (_("insn can't be combined with parallel processing insn"));
2153 switch (opcode->nibbles[1])
2158 as_bad (_("multiple movx specifications"));
2163 as_bad (_("multiple movy specifications"));
2169 as_bad (_("multiple movx specifications"));
2170 if (reg_n < 4 || reg_n > 5)
2171 as_bad (_("invalid movx address register"));
2172 if (opcode->nibbles[2] & 8)
2174 if (reg_m == A_A1_NUM)
2176 else if (reg_m != A_A0_NUM)
2177 as_bad (_("invalid movx dsp register"));
2182 as_bad (_("invalid movx dsp register"));
2185 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
2190 as_bad (_("multiple movy specifications"));
2191 if (opcode->nibbles[2] & 8)
2193 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2196 if (reg_m == A_A1_NUM)
2198 else if (reg_m != A_A0_NUM)
2199 as_bad (_("invalid movy dsp register"));
2204 as_bad (_("invalid movy dsp register"));
2207 if (reg_n < 6 || reg_n > 7)
2208 as_bad (_("invalid movy address register"));
2209 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
2213 if (operand[0].immediate.X_op != O_constant)
2214 as_bad (_("dsp immediate shift value not constant"));
2215 field_b = ((opcode->nibbles[2] << 12)
2216 | (operand[0].immediate.X_add_number & 127) << 4
2221 as_bad (_("multiple parallel processing specifications"));
2222 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2223 + (reg_x << 6) + (reg_y << 4) + reg_n);
2227 as_bad (_("multiple condition specifications"));
2228 cond = opcode->nibbles[2] << 8;
2230 goto skip_cond_check;
2234 as_bad (_("multiple parallel processing specifications"));
2235 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2236 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
2242 if ((field_b & 0xef00) != 0xa100)
2243 as_bad (_("insn cannot be combined with pmuls"));
2245 switch (field_b & 0xf)
2248 field_b += 0 - A_X0_NUM;
2251 field_b += 1 - A_Y0_NUM;
2254 field_b += 2 - A_A0_NUM;
2257 field_b += 3 - A_A1_NUM;
2260 as_bad (_("bad padd / psub pmuls output operand"));
2262 /* Generate warning if the destination register for padd / psub
2263 and pmuls is the same ( only for A0 or A1 ).
2264 If the last nibble is 1010 then A0 is used in both
2265 padd / psub and pmuls. If it is 1111 then A1 is used
2266 as destination register in both padd / psub and pmuls. */
2268 if ((((field_b | reg_efg) & 0x000F) == 0x000A)
2269 || (((field_b | reg_efg) & 0x000F) == 0x000F))
2270 as_warn (_("destination register is same for parallel insns"));
2272 field_b += 0x4000 + reg_efg;
2279 as_bad (_("condition not followed by conditionalizable insn"));
2285 opcode = find_cooked_opcode (&op_end);
2289 (_("unrecognized characters at end of parallel processing insn")));
2294 move_code = movx | movy;
2297 /* Parallel processing insn. */
2298 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
2300 output = frag_more (4);
2302 if (! target_big_endian)
2304 output[3] = ppi_code >> 8;
2305 output[2] = ppi_code;
2309 output[2] = ppi_code >> 8;
2310 output[3] = ppi_code;
2312 move_code |= 0xf800;
2316 /* Just a double data transfer. */
2317 output = frag_more (2);
2320 if (! target_big_endian)
2322 output[1] = move_code >> 8;
2323 output[0] = move_code;
2327 output[0] = move_code >> 8;
2328 output[1] = move_code;
2333 /* This is the guts of the machine-dependent assembler. STR points to a
2334 machine dependent instruction. This function is supposed to emit
2335 the frags/bytes it assembles to. */
2341 unsigned char *op_end;
2342 sh_operand_info operand[3];
2343 sh_opcode_info *opcode;
2344 unsigned int size = 0;
2347 if (sh64_isa_mode == sh64_isa_shmedia)
2349 shmedia_md_assemble (str);
2354 /* If we've seen pseudo-directives, make sure any emitted data or
2355 frags are marked as data. */
2356 if (seen_insn == false)
2358 sh64_update_contents_mark (true);
2359 sh64_set_contents_type (CRT_SH5_ISA16);
2364 #endif /* HAVE_SH64 */
2366 opcode = find_cooked_opcode (&str);
2371 as_bad (_("unknown opcode"));
2376 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
2378 /* Output a CODE reloc to tell the linker that the following
2379 bytes are instructions, not data. */
2380 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2382 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
2385 if (opcode->nibbles[0] == PPI)
2387 size = assemble_ppi (op_end, opcode);
2391 if (opcode->arg[0] == A_BDISP12
2392 || opcode->arg[0] == A_BDISP8)
2394 parse_exp (op_end + 1, &operand[0]);
2395 build_relax (opcode, &operand[0]);
2399 if (opcode->arg[0] == A_END)
2401 /* Ignore trailing whitespace. If there is any, it has already
2402 been compressed to a single space. */
2408 op_end = get_operands (opcode, op_end, operand);
2410 opcode = get_specific (opcode, operand);
2414 /* Couldn't find an opcode which matched the operands. */
2415 char *where = frag_more (2);
2420 as_bad (_("invalid operands for opcode"));
2425 as_bad (_("excess operands: '%s'"), op_end);
2427 size = build_Mytes (opcode, operand);
2432 #ifdef BFD_ASSEMBLER
2433 dwarf2_emit_insn (size);
2437 /* This routine is called each time a label definition is seen. It
2438 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2443 static fragS *last_label_frag;
2444 static int last_label_offset;
2447 && seg_info (now_seg)->tc_segment_info_data.in_code)
2451 offset = frag_now_fix ();
2452 if (frag_now != last_label_frag
2453 || offset != last_label_offset)
2455 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
2456 last_label_frag = frag_now;
2457 last_label_offset = offset;
2462 /* This routine is called when the assembler is about to output some
2463 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2466 sh_flush_pending_output ()
2469 && seg_info (now_seg)->tc_segment_info_data.in_code)
2471 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2473 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
2478 md_undefined_symbol (name)
2479 char *name ATTRIBUTE_UNUSED;
2485 #ifndef BFD_ASSEMBLER
2488 tc_crawl_symbol_chain (headers)
2489 object_headers *headers ATTRIBUTE_UNUSED;
2491 printf (_("call to tc_crawl_symbol_chain \n"));
2495 tc_headers_hook (headers)
2496 object_headers *headers ATTRIBUTE_UNUSED;
2498 printf (_("call to tc_headers_hook \n"));
2504 /* Various routines to kill one day. */
2505 /* Equal to MAX_PRECISION in atof-ieee.c. */
2506 #define MAX_LITTLENUMS 6
2508 /* Turn a string in input_line_pointer into a floating point constant
2509 of type TYPE, and store the appropriate bytes in *LITP. The number
2510 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2511 returned, or NULL on OK. */
2514 md_atof (type, litP, sizeP)
2520 LITTLENUM_TYPE words[4];
2536 return _("bad call to md_atof");
2539 t = atof_ieee (input_line_pointer, type, words);
2541 input_line_pointer = t;
2545 if (! target_big_endian)
2547 for (i = prec - 1; i >= 0; i--)
2549 md_number_to_chars (litP, (valueT) words[i], 2);
2555 for (i = 0; i < prec; i++)
2557 md_number_to_chars (litP, (valueT) words[i], 2);
2565 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2566 call instruction. It refers to a label of the instruction which
2567 loads the register which the call uses. We use it to generate a
2568 special reloc for the linker. */
2572 int ignore ATTRIBUTE_UNUSED;
2577 as_warn (_(".uses pseudo-op seen when not relaxing"));
2581 if (ex.X_op != O_symbol || ex.X_add_number != 0)
2583 as_bad (_("bad .uses format"));
2584 ignore_rest_of_line ();
2588 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
2590 demand_empty_rest_of_line ();
2593 const char *md_shortopts = "";
2594 struct option md_longopts[] =
2596 #define OPTION_RELAX (OPTION_MD_BASE)
2597 #define OPTION_BIG (OPTION_MD_BASE + 1)
2598 #define OPTION_LITTLE (OPTION_BIG + 1)
2599 #define OPTION_SMALL (OPTION_LITTLE + 1)
2600 #define OPTION_DSP (OPTION_SMALL + 1)
2602 {"relax", no_argument, NULL, OPTION_RELAX},
2603 {"big", no_argument, NULL, OPTION_BIG},
2604 {"little", no_argument, NULL, OPTION_LITTLE},
2605 {"small", no_argument, NULL, OPTION_SMALL},
2606 {"dsp", no_argument, NULL, OPTION_DSP},
2608 #define OPTION_ISA (OPTION_DSP + 1)
2609 #define OPTION_ABI (OPTION_ISA + 1)
2610 #define OPTION_NO_MIX (OPTION_ABI + 1)
2611 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
2612 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
2613 #define OPTION_PT32 (OPTION_NO_EXPAND + 1)
2614 {"isa", required_argument, NULL, OPTION_ISA},
2615 {"abi", required_argument, NULL, OPTION_ABI},
2616 {"no-mix", no_argument, NULL, OPTION_NO_MIX},
2617 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE},
2618 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND},
2619 {"expand-pt32", no_argument, NULL, OPTION_PT32},
2620 #endif /* HAVE_SH64 */
2622 {NULL, no_argument, NULL, 0}
2624 size_t md_longopts_size = sizeof (md_longopts);
2627 md_parse_option (c, arg)
2629 char *arg ATTRIBUTE_UNUSED;
2638 target_big_endian = 1;
2642 target_big_endian = 0;
2655 if (strcasecmp (arg, "shmedia") == 0)
2657 if (sh64_isa_mode == sh64_isa_shcompact)
2658 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
2659 sh64_isa_mode = sh64_isa_shmedia;
2661 else if (strcasecmp (arg, "shcompact") == 0)
2663 if (sh64_isa_mode == sh64_isa_shmedia)
2664 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
2665 if (sh64_abi == sh64_abi_64)
2666 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
2667 sh64_isa_mode = sh64_isa_shcompact;
2670 as_bad ("Invalid argument to --isa option: %s", arg);
2674 if (strcmp (arg, "32") == 0)
2676 if (sh64_abi == sh64_abi_64)
2677 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
2678 sh64_abi = sh64_abi_32;
2680 else if (strcmp (arg, "64") == 0)
2682 if (sh64_abi == sh64_abi_32)
2683 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
2684 if (sh64_isa_mode == sh64_isa_shcompact)
2685 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
2686 sh64_abi = sh64_abi_64;
2689 as_bad ("Invalid argument to --abi option: %s", arg);
2696 case OPTION_SHCOMPACT_CONST_CRANGE:
2697 sh64_shcompact_const_crange = true;
2700 case OPTION_NO_EXPAND:
2701 sh64_expand = false;
2707 #endif /* HAVE_SH64 */
2717 md_show_usage (stream)
2720 fprintf (stream, _("\
2722 -little generate little endian code\n\
2723 -big generate big endian code\n\
2724 -relax alter jump instructions for long displacements\n\
2725 -small align sections to 4 byte boundaries, not 16\n\
2726 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
2728 fprintf (stream, _("\
2729 -isa=[shmedia set default instruction set for SH64\n\
2733 -abi=[32|64] set size of expanded SHmedia operands and object\n\
2735 -shcompact-const-crange emit code-range descriptors for constants in\n\
2736 SHcompact code sections\n\
2737 -no-mix disallow SHmedia code in the same section as\n\
2738 constants and SHcompact code\n\
2739 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
2740 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
2742 #endif /* HAVE_SH64 */
2745 /* This struct is used to pass arguments to sh_count_relocs through
2746 bfd_map_over_sections. */
2748 struct sh_count_relocs
2750 /* Symbol we are looking for. */
2752 /* Count of relocs found. */
2756 /* Count the number of fixups in a section which refer to a particular
2757 symbol. When using BFD_ASSEMBLER, this is called via
2758 bfd_map_over_sections. */
2761 sh_count_relocs (abfd, sec, data)
2762 bfd *abfd ATTRIBUTE_UNUSED;
2766 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
2767 segment_info_type *seginfo;
2771 seginfo = seg_info (sec);
2772 if (seginfo == NULL)
2776 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2778 if (fix->fx_addsy == sym)
2786 /* Handle the count relocs for a particular section. When using
2787 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2790 sh_frob_section (abfd, sec, ignore)
2791 bfd *abfd ATTRIBUTE_UNUSED;
2793 PTR ignore ATTRIBUTE_UNUSED;
2795 segment_info_type *seginfo;
2798 seginfo = seg_info (sec);
2799 if (seginfo == NULL)
2802 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2807 struct sh_count_relocs info;
2809 if (fix->fx_r_type != BFD_RELOC_SH_USES)
2812 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2813 symbol in the same section. */
2814 sym = fix->fx_addsy;
2816 || fix->fx_subsy != NULL
2817 || fix->fx_addnumber != 0
2818 || S_GET_SEGMENT (sym) != sec
2819 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2820 || S_GET_STORAGE_CLASS (sym) == C_EXT
2822 || S_IS_EXTERNAL (sym))
2824 as_warn_where (fix->fx_file, fix->fx_line,
2825 _(".uses does not refer to a local symbol in the same section"));
2829 /* Look through the fixups again, this time looking for one
2830 at the same location as sym. */
2831 val = S_GET_VALUE (sym);
2832 for (fscan = seginfo->fix_root;
2834 fscan = fscan->fx_next)
2835 if (val == fscan->fx_frag->fr_address + fscan->fx_where
2836 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
2837 && fscan->fx_r_type != BFD_RELOC_SH_CODE
2838 && fscan->fx_r_type != BFD_RELOC_SH_DATA
2839 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
2843 as_warn_where (fix->fx_file, fix->fx_line,
2844 _("can't find fixup pointed to by .uses"));
2848 if (fscan->fx_tcbit)
2850 /* We've already done this one. */
2854 /* The variable fscan should also be a fixup to a local symbol
2855 in the same section. */
2856 sym = fscan->fx_addsy;
2858 || fscan->fx_subsy != NULL
2859 || fscan->fx_addnumber != 0
2860 || S_GET_SEGMENT (sym) != sec
2861 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2862 || S_GET_STORAGE_CLASS (sym) == C_EXT
2864 || S_IS_EXTERNAL (sym))
2866 as_warn_where (fix->fx_file, fix->fx_line,
2867 _(".uses target does not refer to a local symbol in the same section"));
2871 /* Now we look through all the fixups of all the sections,
2872 counting the number of times we find a reference to sym. */
2875 #ifdef BFD_ASSEMBLER
2876 bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info);
2881 for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
2882 sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info);
2889 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2890 We have already adjusted the value of sym to include the
2891 fragment address, so we undo that adjustment here. */
2892 subseg_change (sec, 0);
2893 fix_new (fscan->fx_frag,
2894 S_GET_VALUE (sym) - fscan->fx_frag->fr_address,
2895 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
2899 /* This function is called after the symbol table has been completed,
2900 but before the relocs or section contents have been written out.
2901 If we have seen any .uses pseudo-ops, they point to an instruction
2902 which loads a register with the address of a function. We look
2903 through the fixups to find where the function address is being
2904 loaded from. We then generate a COUNT reloc giving the number of
2905 times that function address is referred to. The linker uses this
2906 information when doing relaxing, to decide when it can eliminate
2907 the stored function address entirely. */
2913 shmedia_frob_file_before_adjust ();
2919 #ifdef BFD_ASSEMBLER
2920 bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL);
2925 for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
2926 sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL);
2931 /* Called after relaxing. Set the correct sizes of the fragments, and
2932 create relocs so that md_apply_fix3 will fill in the correct values. */
2935 md_convert_frag (headers, seg, fragP)
2936 #ifdef BFD_ASSEMBLER
2937 bfd *headers ATTRIBUTE_UNUSED;
2939 object_headers *headers ATTRIBUTE_UNUSED;
2946 switch (fragP->fr_subtype)
2948 case C (COND_JUMP, COND8):
2949 case C (COND_JUMP_DELAY, COND8):
2950 subseg_change (seg, 0);
2951 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2952 1, BFD_RELOC_SH_PCDISP8BY2);
2957 case C (UNCOND_JUMP, UNCOND12):
2958 subseg_change (seg, 0);
2959 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2960 1, BFD_RELOC_SH_PCDISP12BY2);
2965 case C (UNCOND_JUMP, UNCOND32):
2966 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
2967 if (fragP->fr_symbol == NULL)
2968 as_bad_where (fragP->fr_file, fragP->fr_line,
2969 _("displacement overflows 12-bit field"));
2970 else if (S_IS_DEFINED (fragP->fr_symbol))
2971 as_bad_where (fragP->fr_file, fragP->fr_line,
2972 _("displacement to defined symbol %s overflows 12-bit field"),
2973 S_GET_NAME (fragP->fr_symbol));
2975 as_bad_where (fragP->fr_file, fragP->fr_line,
2976 _("displacement to undefined symbol %s overflows 12-bit field"),
2977 S_GET_NAME (fragP->fr_symbol));
2978 /* Stabilize this frag, so we don't trip an assert. */
2979 fragP->fr_fix += fragP->fr_var;
2983 case C (COND_JUMP, COND12):
2984 case C (COND_JUMP_DELAY, COND12):
2985 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2986 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2987 was due to gas incorrectly relaxing an out-of-range conditional
2988 branch with delay slot. It turned:
2989 bf.s L6 (slot mov.l r12,@(44,r0))
2992 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2994 32: 10 cb mov.l r12,@(44,r0)
2995 Therefore, branches with delay slots have to be handled
2996 differently from ones without delay slots. */
2998 unsigned char *buffer =
2999 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
3000 int highbyte = target_big_endian ? 0 : 1;
3001 int lowbyte = target_big_endian ? 1 : 0;
3002 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
3004 /* Toggle the true/false bit of the bcond. */
3005 buffer[highbyte] ^= 0x2;
3007 /* If this is a delayed branch, we may not put the bra in the
3008 slot. So we change it to a non-delayed branch, like that:
3009 b! cond slot_label; bra disp; slot_label: slot_insn
3010 ??? We should try if swapping the conditional branch and
3011 its delay-slot insn already makes the branch reach. */
3013 /* Build a relocation to six / four bytes farther on. */
3014 subseg_change (seg, 0);
3015 fix_new (fragP, fragP->fr_fix, 2,
3016 #ifdef BFD_ASSEMBLER
3017 section_symbol (seg),
3019 seg_info (seg)->dot,
3021 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
3022 1, BFD_RELOC_SH_PCDISP8BY2);
3024 /* Set up a jump instruction. */
3025 buffer[highbyte + 2] = 0xa0;
3026 buffer[lowbyte + 2] = 0;
3027 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
3028 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
3032 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
3037 /* Fill in a NOP instruction. */
3038 buffer[highbyte + 4] = 0x0;
3039 buffer[lowbyte + 4] = 0x9;
3048 case C (COND_JUMP, COND32):
3049 case C (COND_JUMP_DELAY, COND32):
3050 case C (COND_JUMP, UNDEF_WORD_DISP):
3051 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3052 if (fragP->fr_symbol == NULL)
3053 as_bad_where (fragP->fr_file, fragP->fr_line,
3054 _("displacement overflows 8-bit field"));
3055 else if (S_IS_DEFINED (fragP->fr_symbol))
3056 as_bad_where (fragP->fr_file, fragP->fr_line,
3057 _("displacement to defined symbol %s overflows 8-bit field"),
3058 S_GET_NAME (fragP->fr_symbol));
3060 as_bad_where (fragP->fr_file, fragP->fr_line,
3061 _("displacement to undefined symbol %s overflows 8-bit field "),
3062 S_GET_NAME (fragP->fr_symbol));
3063 /* Stabilize this frag, so we don't trip an assert. */
3064 fragP->fr_fix += fragP->fr_var;
3070 shmedia_md_convert_frag (headers, seg, fragP, true);
3076 if (donerelax && !sh_relax)
3077 as_warn_where (fragP->fr_file, fragP->fr_line,
3078 _("overflow in branch to %s; converted into longer instruction sequence"),
3079 (fragP->fr_symbol != NULL
3080 ? S_GET_NAME (fragP->fr_symbol)
3085 md_section_align (seg, size)
3086 segT seg ATTRIBUTE_UNUSED;
3089 #ifdef BFD_ASSEMBLER
3092 #else /* ! OBJ_ELF */
3093 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
3094 & (-1 << bfd_get_section_alignment (stdoutput, seg)));
3095 #endif /* ! OBJ_ELF */
3096 #else /* ! BFD_ASSEMBLER */
3097 return ((size + (1 << section_alignment[(int) seg]) - 1)
3098 & (-1 << section_alignment[(int) seg]));
3099 #endif /* ! BFD_ASSEMBLER */
3102 /* This static variable is set by s_uacons to tell sh_cons_align that
3103 the expession does not need to be aligned. */
3105 static int sh_no_align_cons = 0;
3107 /* This handles the unaligned space allocation pseudo-ops, such as
3108 .uaword. .uaword is just like .word, but the value does not need
3115 /* Tell sh_cons_align not to align this value. */
3116 sh_no_align_cons = 1;
3120 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3121 aligned correctly. Note that this can cause warnings to be issued
3122 when assembling initialized structured which were declared with the
3123 packed attribute. FIXME: Perhaps we should require an option to
3124 enable this warning? */
3127 sh_cons_align (nbytes)
3133 if (sh_no_align_cons)
3135 /* This is an unaligned pseudo-op. */
3136 sh_no_align_cons = 0;
3141 while ((nbytes & 1) == 0)
3150 if (now_seg == absolute_section)
3152 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
3153 as_warn (_("misaligned data"));
3157 p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
3158 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
3160 record_alignment (now_seg, nalign);
3163 /* When relaxing, we need to output a reloc for any .align directive
3164 that requests alignment to a four byte boundary or larger. This is
3165 also where we check for misaligned data. */
3168 sh_handle_align (frag)
3171 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix;
3173 if (frag->fr_type == rs_align_code)
3175 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
3176 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
3178 char *p = frag->fr_literal + frag->fr_fix;
3187 if (target_big_endian)
3189 memcpy (p, big_nop_pattern, sizeof big_nop_pattern);
3190 frag->fr_var = sizeof big_nop_pattern;
3194 memcpy (p, little_nop_pattern, sizeof little_nop_pattern);
3195 frag->fr_var = sizeof little_nop_pattern;
3198 else if (frag->fr_type == rs_align_test)
3201 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
3205 && (frag->fr_type == rs_align
3206 || frag->fr_type == rs_align_code)
3207 && frag->fr_address + frag->fr_fix > 0
3208 && frag->fr_offset > 1
3209 && now_seg != bss_section)
3210 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
3211 BFD_RELOC_SH_ALIGN);
3214 /* This macro decides whether a particular reloc is an entry in a
3215 switch table. It is used when relaxing, because the linker needs
3216 to know about all such entries so that it can adjust them if
3219 #ifdef BFD_ASSEMBLER
3220 #define SWITCH_TABLE_CONS(fix) (0)
3222 #define SWITCH_TABLE_CONS(fix) \
3223 ((fix)->fx_r_type == 0 \
3224 && ((fix)->fx_size == 2 \
3225 || (fix)->fx_size == 1 \
3226 || (fix)->fx_size == 4))
3229 #define SWITCH_TABLE(fix) \
3230 ((fix)->fx_addsy != NULL \
3231 && (fix)->fx_subsy != NULL \
3232 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
3233 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
3234 && ((fix)->fx_r_type == BFD_RELOC_32 \
3235 || (fix)->fx_r_type == BFD_RELOC_16 \
3236 || (fix)->fx_r_type == BFD_RELOC_8 \
3237 || SWITCH_TABLE_CONS (fix)))
3239 /* See whether we need to force a relocation into the output file.
3240 This is used to force out switch and PC relative relocations when
3244 sh_force_relocation (fix)
3248 if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3249 || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY
3250 || fix->fx_r_type == BFD_RELOC_SH_LOOP_START
3251 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END)
3257 return (fix->fx_pcrel
3258 || SWITCH_TABLE (fix)
3259 || fix->fx_r_type == BFD_RELOC_SH_COUNT
3260 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
3261 || fix->fx_r_type == BFD_RELOC_SH_CODE
3262 || fix->fx_r_type == BFD_RELOC_SH_DATA
3264 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE
3266 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
3271 sh_fix_adjustable (fixP)
3275 if (fixP->fx_addsy == NULL)
3278 if (fixP->fx_r_type == BFD_RELOC_SH_PCDISP8BY2
3279 || fixP->fx_r_type == BFD_RELOC_SH_PCDISP12BY2
3280 || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2
3281 || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4
3282 || fixP->fx_r_type == BFD_RELOC_8_PCREL
3283 || fixP->fx_r_type == BFD_RELOC_SH_SWITCH16
3284 || fixP->fx_r_type == BFD_RELOC_SH_SWITCH32)
3287 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP)
3288 || fixP->fx_r_type == BFD_RELOC_RVA)
3291 /* We need the symbol name for the VTABLE entries */
3292 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3293 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
3300 sh_elf_final_processing ()
3304 /* Set file-specific flags to indicate if this code needs
3305 a processor with the sh-dsp / sh3e ISA to execute. */
3307 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3308 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3309 if (sh64_isa_mode != sh64_isa_unspecified)
3312 #endif /* HAVE_SH64 */
3313 if (valid_arch & arch_sh1)
3315 else if (valid_arch & arch_sh2)
3317 else if (valid_arch & arch_sh_dsp)
3319 else if (valid_arch & arch_sh3)
3321 else if (valid_arch & arch_sh3_dsp)
3323 else if (valid_arch & arch_sh3e)
3325 else if (valid_arch & arch_sh4)
3330 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
3331 elf_elfheader (stdoutput)->e_flags |= val;
3335 /* Apply a fixup to the object file. */
3338 md_apply_fix3 (fixP, valP, seg)
3341 segT seg ATTRIBUTE_UNUSED;
3343 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3344 int lowbyte = target_big_endian ? 1 : 0;
3345 int highbyte = target_big_endian ? 0 : 1;
3346 long val = (long) *valP;
3350 #ifdef BFD_ASSEMBLER
3351 /* A difference between two symbols, the second of which is in the
3352 current section, is transformed in a PC-relative relocation to
3353 the other symbol. We have to adjust the relocation type here. */
3356 switch (fixP->fx_r_type)
3362 fixP->fx_r_type = BFD_RELOC_32_PCREL;
3365 /* Currently, we only support 32-bit PCREL relocations.
3366 We'd need a new reloc type to handle 16_PCREL, and
3367 8_PCREL is already taken for R_SH_SWITCH8, which
3368 apparently does something completely different than what
3371 bfd_set_error (bfd_error_bad_value);
3375 bfd_set_error (bfd_error_bad_value);
3380 /* The function adjust_reloc_syms won't convert a reloc against a weak
3381 symbol into a reloc against a section, but bfd_install_relocation
3382 will screw up if the symbol is defined, so we have to adjust val here
3383 to avoid the screw up later.
3385 For ordinary relocs, this does not happen for ELF, since for ELF,
3386 bfd_install_relocation uses the "special function" field of the
3387 howto, and does not execute the code that needs to be undone, as long
3388 as the special function does not return bfd_reloc_continue.
3389 It can happen for GOT- and PLT-type relocs the way they are
3390 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3391 doesn't matter here since those relocs don't use VAL; see below. */
3392 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
3393 && fixP->fx_addsy != NULL
3394 && S_IS_WEAK (fixP->fx_addsy))
3395 val -= S_GET_VALUE (fixP->fx_addsy);
3398 #ifndef BFD_ASSEMBLER
3399 if (fixP->fx_r_type == 0)
3401 if (fixP->fx_size == 2)
3402 fixP->fx_r_type = BFD_RELOC_16;
3403 else if (fixP->fx_size == 4)
3404 fixP->fx_r_type = BFD_RELOC_32;
3405 else if (fixP->fx_size == 1)
3406 fixP->fx_r_type = BFD_RELOC_8;
3414 switch (fixP->fx_r_type)
3416 case BFD_RELOC_SH_IMM4:
3418 *buf = (*buf & 0xf0) | (val & 0xf);
3421 case BFD_RELOC_SH_IMM4BY2:
3424 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
3427 case BFD_RELOC_SH_IMM4BY4:
3430 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
3433 case BFD_RELOC_SH_IMM8BY2:
3439 case BFD_RELOC_SH_IMM8BY4:
3446 case BFD_RELOC_SH_IMM8:
3447 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3448 sometimes it is not (e.g., and). We permit any 8 bit value.
3449 Note that adding further restrictions may invalidate
3450 reasonable looking assembly code, such as ``and -0x1,r0''. */
3456 case BFD_RELOC_SH_PCRELIMM8BY4:
3457 /* The lower two bits of the PC are cleared before the
3458 displacement is added in. We can assume that the destination
3459 is on a 4 byte bounday. If this instruction is also on a 4
3460 byte boundary, then we want
3462 and target - here is a multiple of 4.
3463 Otherwise, we are on a 2 byte boundary, and we want
3464 (target - (here - 2)) / 4
3465 and target - here is not a multiple of 4. Computing
3466 (target - (here - 2)) / 4 == (target - here + 2) / 4
3467 works for both cases, since in the first case the addition of
3468 2 will be removed by the division. target - here is in the
3470 val = (val + 2) / 4;
3472 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3476 case BFD_RELOC_SH_PCRELIMM8BY2:
3479 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3483 case BFD_RELOC_SH_PCDISP8BY2:
3485 if (val < -0x80 || val > 0x7f)
3486 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3490 case BFD_RELOC_SH_PCDISP12BY2:
3492 if (val < -0x800 || val > 0x7ff)
3493 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3494 buf[lowbyte] = val & 0xff;
3495 buf[highbyte] |= (val >> 8) & 0xf;
3499 case BFD_RELOC_32_PCREL:
3500 md_number_to_chars (buf, val, 4);
3504 md_number_to_chars (buf, val, 2);
3507 case BFD_RELOC_SH_USES:
3508 /* Pass the value into sh_coff_reloc_mangle. */
3509 fixP->fx_addnumber = val;
3512 case BFD_RELOC_SH_COUNT:
3513 case BFD_RELOC_SH_ALIGN:
3514 case BFD_RELOC_SH_CODE:
3515 case BFD_RELOC_SH_DATA:
3516 case BFD_RELOC_SH_LABEL:
3517 /* Nothing to do here. */
3520 case BFD_RELOC_SH_LOOP_START:
3521 case BFD_RELOC_SH_LOOP_END:
3523 case BFD_RELOC_VTABLE_INHERIT:
3524 case BFD_RELOC_VTABLE_ENTRY:
3529 case BFD_RELOC_32_PLT_PCREL:
3530 /* Make the jump instruction point to the address of the operand. At
3531 runtime we merely add the offset to the actual PLT entry. */
3532 * valP = 0xfffffffc;
3533 val = fixP->fx_addnumber;
3535 val -= S_GET_VALUE (fixP->fx_subsy);
3536 md_number_to_chars (buf, val, 4);
3539 case BFD_RELOC_SH_GOTPC:
3540 /* This is tough to explain. We end up with this one if we have
3541 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3542 The goal here is to obtain the absolute address of the GOT,
3543 and it is strongly preferable from a performance point of
3544 view to avoid using a runtime relocation for this. There are
3545 cases where you have something like:
3547 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3549 and here no correction would be required. Internally in the
3550 assembler we treat operands of this form as not being pcrel
3551 since the '.' is explicitly mentioned, and I wonder whether
3552 it would simplify matters to do it this way. Who knows. In
3553 earlier versions of the PIC patches, the pcrel_adjust field
3554 was used to store the correction, but since the expression is
3555 not pcrel, I felt it would be confusing to do it this way. */
3557 md_number_to_chars (buf, val, 4);
3560 case BFD_RELOC_32_GOT_PCREL:
3561 case BFD_RELOC_SH_GOTPLT32:
3562 * valP = 0; /* Fully resolved at runtime. No addend. */
3563 md_number_to_chars (buf, 0, 4);
3566 case BFD_RELOC_32_GOTOFF:
3567 md_number_to_chars (buf, val, 4);
3573 shmedia_md_apply_fix3 (fixP, valP);
3582 if ((val & ((1 << shift) - 1)) != 0)
3583 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
3587 val = ((val >> shift)
3588 | ((long) -1 & ~ ((long) -1 >> shift)));
3590 if (max != 0 && (val < min || val > max))
3591 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
3593 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
3597 /* Called just before address relaxation. Return the length
3598 by which a fragment must grow to reach it's destination. */
3601 md_estimate_size_before_relax (fragP, segment_type)
3602 register fragS *fragP;
3603 register segT segment_type;
3607 switch (fragP->fr_subtype)
3611 return shmedia_md_estimate_size_before_relax (fragP, segment_type);
3617 case C (UNCOND_JUMP, UNDEF_DISP):
3618 /* Used to be a branch to somewhere which was unknown. */
3619 if (!fragP->fr_symbol)
3621 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
3623 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3625 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
3629 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
3633 case C (COND_JUMP, UNDEF_DISP):
3634 case C (COND_JUMP_DELAY, UNDEF_DISP):
3635 what = GET_WHAT (fragP->fr_subtype);
3636 /* Used to be a branch to somewhere which was unknown. */
3637 if (fragP->fr_symbol
3638 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3640 /* Got a symbol and it's defined in this segment, become byte
3641 sized - maybe it will fix up. */
3642 fragP->fr_subtype = C (what, COND8);
3644 else if (fragP->fr_symbol)
3646 /* Its got a segment, but its not ours, so it will always be long. */
3647 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
3651 /* We know the abs value. */
3652 fragP->fr_subtype = C (what, COND8);
3656 case C (UNCOND_JUMP, UNCOND12):
3657 case C (UNCOND_JUMP, UNCOND32):
3658 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
3659 case C (COND_JUMP, COND8):
3660 case C (COND_JUMP, COND12):
3661 case C (COND_JUMP, COND32):
3662 case C (COND_JUMP, UNDEF_WORD_DISP):
3663 case C (COND_JUMP_DELAY, COND8):
3664 case C (COND_JUMP_DELAY, COND12):
3665 case C (COND_JUMP_DELAY, COND32):
3666 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3667 /* When relaxing a section for the second time, we don't need to
3668 do anything besides return the current size. */
3672 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length;
3673 return fragP->fr_var;
3676 /* Put number into target byte order. */
3679 md_number_to_chars (ptr, use, nbytes)
3685 /* We might need to set the contents type to data. */
3686 sh64_flag_output ();
3689 if (! target_big_endian)
3690 number_to_chars_littleendian (ptr, use, nbytes);
3692 number_to_chars_bigendian (ptr, use, nbytes);
3695 /* This version is used in obj-coff.c when not using BFD_ASSEMBLER.
3696 eg for the sh-hms target. */
3699 md_pcrel_from (fixP)
3702 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
3706 md_pcrel_from_section (fixP, sec)
3710 if (fixP->fx_addsy != (symbolS *) NULL
3711 && (! S_IS_DEFINED (fixP->fx_addsy)
3712 || S_IS_EXTERN (fixP->fx_addsy)
3713 || S_IS_WEAK (fixP->fx_addsy)
3714 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
3716 /* The symbol is undefined (or is defined but not in this section,
3717 or we're not sure about it being the final definition). Let the
3718 linker figure it out. We need to adjust the subtraction of a
3719 symbol to the position of the relocated data, though. */
3720 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0;
3723 return md_pcrel_from (fixP);
3729 tc_coff_sizemachdep (frag)
3732 return md_relax_table[frag->fr_subtype].rlx_length;
3735 #endif /* OBJ_COFF */
3737 #ifndef BFD_ASSEMBLER
3740 /* Map BFD relocs to SH COFF relocs. */
3744 bfd_reloc_code_real_type bfd_reloc;
3748 static const struct reloc_map coff_reloc_map[] =
3750 { BFD_RELOC_32, R_SH_IMM32 },
3751 { BFD_RELOC_16, R_SH_IMM16 },
3752 { BFD_RELOC_8, R_SH_IMM8 },
3753 { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 },
3754 { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP },
3755 { BFD_RELOC_SH_IMM4, R_SH_IMM4 },
3756 { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 },
3757 { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 },
3758 { BFD_RELOC_SH_IMM8, R_SH_IMM8 },
3759 { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 },
3760 { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 },
3761 { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 },
3762 { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 },
3763 { BFD_RELOC_8_PCREL, R_SH_SWITCH8 },
3764 { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 },
3765 { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 },
3766 { BFD_RELOC_SH_USES, R_SH_USES },
3767 { BFD_RELOC_SH_COUNT, R_SH_COUNT },
3768 { BFD_RELOC_SH_ALIGN, R_SH_ALIGN },
3769 { BFD_RELOC_SH_CODE, R_SH_CODE },
3770 { BFD_RELOC_SH_DATA, R_SH_DATA },
3771 { BFD_RELOC_SH_LABEL, R_SH_LABEL },
3772 { BFD_RELOC_UNUSED, 0 }
3775 /* Adjust a reloc for the SH. This is similar to the generic code,
3776 but does some minor tweaking. */
3779 sh_coff_reloc_mangle (seg, fix, intr, paddr)
3780 segment_info_type *seg;
3782 struct internal_reloc *intr;
3785 symbolS *symbol_ptr = fix->fx_addsy;
3788 intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where;
3790 if (! SWITCH_TABLE (fix))
3792 const struct reloc_map *rm;
3794 for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++)
3795 if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type)
3797 if (rm->bfd_reloc == BFD_RELOC_UNUSED)
3798 as_bad_where (fix->fx_file, fix->fx_line,
3799 _("Can not represent %s relocation in this object file format"),
3800 bfd_get_reloc_code_name (fix->fx_r_type));
3801 intr->r_type = rm->sh_reloc;
3808 if (fix->fx_r_type == BFD_RELOC_16)
3809 intr->r_type = R_SH_SWITCH16;
3810 else if (fix->fx_r_type == BFD_RELOC_8)
3811 intr->r_type = R_SH_SWITCH8;
3812 else if (fix->fx_r_type == BFD_RELOC_32)
3813 intr->r_type = R_SH_SWITCH32;
3817 /* For a switch reloc, we set r_offset to the difference between
3818 the reloc address and the subtrahend. When the linker is
3819 doing relaxing, it can use the determine the starting and
3820 ending points of the switch difference expression. */
3821 intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy);
3824 /* PC relative relocs are always against the current section. */
3825 if (symbol_ptr == NULL)
3827 switch (fix->fx_r_type)
3829 case BFD_RELOC_SH_PCRELIMM8BY2:
3830 case BFD_RELOC_SH_PCRELIMM8BY4:
3831 case BFD_RELOC_SH_PCDISP8BY2:
3832 case BFD_RELOC_SH_PCDISP12BY2:
3833 case BFD_RELOC_SH_USES:
3834 symbol_ptr = seg->dot;
3841 if (fix->fx_r_type == BFD_RELOC_SH_USES)
3843 /* We can't store the offset in the object file, since this
3844 reloc does not take up any space, so we store it in r_offset.
3845 The fx_addnumber field was set in md_apply_fix3. */
3846 intr->r_offset = fix->fx_addnumber;
3848 else if (fix->fx_r_type == BFD_RELOC_SH_COUNT)
3850 /* We can't store the count in the object file, since this reloc
3851 does not take up any space, so we store it in r_offset. The
3852 fx_offset field was set when the fixup was created in
3853 sh_coff_frob_file. */
3854 intr->r_offset = fix->fx_offset;
3855 /* This reloc is always absolute. */
3858 else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN)
3860 /* Store the alignment in the r_offset field. */
3861 intr->r_offset = fix->fx_offset;
3862 /* This reloc is always absolute. */
3865 else if (fix->fx_r_type == BFD_RELOC_SH_CODE
3866 || fix->fx_r_type == BFD_RELOC_SH_DATA
3867 || fix->fx_r_type == BFD_RELOC_SH_LABEL)
3869 /* These relocs are always absolute. */
3873 /* Turn the segment of the symbol into an offset. */
3874 if (symbol_ptr != NULL)
3876 dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot;
3878 intr->r_symndx = dot->sy_number;
3880 intr->r_symndx = symbol_ptr->sy_number;
3883 intr->r_symndx = -1;
3886 #endif /* OBJ_COFF */
3887 #endif /* ! BFD_ASSEMBLER */
3889 #ifdef BFD_ASSEMBLER
3891 /* Create a reloc. */
3894 tc_gen_reloc (section, fixp)
3895 asection *section ATTRIBUTE_UNUSED;
3899 bfd_reloc_code_real_type r_type;
3901 rel = (arelent *) xmalloc (sizeof (arelent));
3902 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
3903 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
3904 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
3907 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
3909 fixp->fx_addnumber -= S_GET_VALUE (fixp->fx_subsy);
3913 r_type = fixp->fx_r_type;
3915 if (SWITCH_TABLE (fixp))
3917 rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy);
3918 if (r_type == BFD_RELOC_16)
3919 r_type = BFD_RELOC_SH_SWITCH16;
3920 else if (r_type == BFD_RELOC_8)
3921 r_type = BFD_RELOC_8_PCREL;
3922 else if (r_type == BFD_RELOC_32)
3923 r_type = BFD_RELOC_SH_SWITCH32;
3927 else if (r_type == BFD_RELOC_SH_USES)
3928 rel->addend = fixp->fx_addnumber;
3929 else if (r_type == BFD_RELOC_SH_COUNT)
3930 rel->addend = fixp->fx_offset;
3931 else if (r_type == BFD_RELOC_SH_ALIGN)
3932 rel->addend = fixp->fx_offset;
3933 else if (r_type == BFD_RELOC_VTABLE_INHERIT
3934 || r_type == BFD_RELOC_VTABLE_ENTRY)
3935 rel->addend = fixp->fx_offset;
3936 else if (r_type == BFD_RELOC_SH_LOOP_START
3937 || r_type == BFD_RELOC_SH_LOOP_END)
3938 rel->addend = fixp->fx_offset;
3939 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
3942 rel->address = rel->addend = fixp->fx_offset;
3945 else if (shmedia_init_reloc (rel, fixp))
3948 else if (fixp->fx_pcrel)
3949 rel->addend = fixp->fx_addnumber;
3950 else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF)
3951 rel->addend = fixp->fx_addnumber;
3955 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
3956 if (rel->howto == NULL || fixp->fx_subsy)
3958 as_bad_where (fixp->fx_file, fixp->fx_line,
3959 _("Cannot represent relocation type %s"),
3960 bfd_get_reloc_code_name (r_type));
3961 /* Set howto to a garbage value so that we can keep going. */
3962 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3963 assert (rel->howto != NULL);
3970 inline static char *
3971 sh_end_of_match (cont, what)
3974 int len = strlen (what);
3976 if (strncasecmp (cont, what, strlen (what)) == 0
3977 && ! is_part_of_name (cont[len]))
3984 sh_parse_name (name, exprP, nextcharP)
3989 char *next = input_line_pointer;
3994 exprP->X_op_symbol = NULL;
3996 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
3999 GOT_symbol = symbol_find_or_make (name);
4001 exprP->X_add_symbol = GOT_symbol;
4003 /* If we have an absolute symbol or a reg, then we know its
4005 segment = S_GET_SEGMENT (exprP->X_add_symbol);
4006 if (segment == absolute_section)
4008 exprP->X_op = O_constant;
4009 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
4010 exprP->X_add_symbol = NULL;
4012 else if (segment == reg_section)
4014 exprP->X_op = O_register;
4015 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
4016 exprP->X_add_symbol = NULL;
4020 exprP->X_op = O_symbol;
4021 exprP->X_add_number = 0;
4027 exprP->X_add_symbol = symbol_find_or_make (name);
4029 if (*nextcharP != '@')
4031 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF")))
4032 reloc_type = BFD_RELOC_32_GOTOFF;
4033 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT")))
4034 reloc_type = BFD_RELOC_SH_GOTPLT32;
4035 else if ((next_end = sh_end_of_match (next + 1, "GOT")))
4036 reloc_type = BFD_RELOC_32_GOT_PCREL;
4037 else if ((next_end = sh_end_of_match (next + 1, "PLT")))
4038 reloc_type = BFD_RELOC_32_PLT_PCREL;
4042 *input_line_pointer = *nextcharP;
4043 input_line_pointer = next_end;
4044 *nextcharP = *input_line_pointer;
4045 *input_line_pointer = '\0';
4047 exprP->X_op = O_PIC_reloc;
4048 exprP->X_add_number = 0;
4049 exprP->X_md = reloc_type;
4054 #endif /* BFD_ASSEMBLER */