1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
39 const char comment_chars[] = "!";
40 const char line_separator_chars[] = ";";
41 const char line_comment_chars[] = "!#";
43 static void s_uses PARAMS ((int));
45 static void sh_count_relocs PARAMS ((bfd *, segT, PTR));
46 static void sh_frob_section PARAMS ((bfd *, segT, PTR));
49 void s_align_bytes ();
50 static void s_uacons PARAMS ((int));
51 static sh_opcode_info *find_cooked_opcode PARAMS ((char **));
52 static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *));
55 static void sh_elf_cons PARAMS ((int));
57 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
64 int ignore ATTRIBUTE_UNUSED;
67 target_big_endian = 0;
70 /* This table describes all the machine specific pseudo-ops the assembler
71 has to support. The fields are:
72 pseudo-op name without dot
73 function to call to execute this pseudo-op
74 Integer arg to pass to the function. */
76 const pseudo_typeS md_pseudo_table[] =
79 {"long", sh_elf_cons, 4},
80 {"int", sh_elf_cons, 4},
81 {"word", sh_elf_cons, 2},
82 {"short", sh_elf_cons, 2},
87 {"form", listing_psize, 0},
88 {"little", little, 0},
89 {"heading", listing_title, 0},
90 {"import", s_ignore, 0},
91 {"page", listing_eject, 0},
92 {"program", s_ignore, 0},
94 {"uaword", s_uacons, 2},
95 {"ualong", s_uacons, 4},
96 {"uaquad", s_uacons, 8},
97 {"2byte", s_uacons, 2},
98 {"4byte", s_uacons, 4},
99 {"8byte", s_uacons, 8},
101 {"file", dwarf2_directive_file, 0 },
102 {"loc", dwarf2_directive_loc, 0 },
107 /*int md_reloc_size; */
109 int sh_relax; /* set if -relax seen */
111 /* Whether -small was seen. */
115 /* Whether -dsp was seen. */
119 /* The bit mask of architectures that could
120 accomodate the insns seen so far. */
121 static int valid_arch;
123 const char EXP_CHARS[] = "eE";
125 /* Chars that mean this number is a floating point constant. */
128 const char FLT_CHARS[] = "rRsSfFdDxXpP";
130 #define C(a,b) ENCODE_RELAX(a,b)
132 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
133 #define GET_WHAT(x) ((x>>4))
135 /* These are the three types of relaxable instrction. */
137 #define COND_JUMP_DELAY 2
138 #define UNCOND_JUMP 3
145 #define UNDEF_WORD_DISP 4
150 /* Branch displacements are from the address of the branch plus
151 four, thus all minimum and maximum values have 4 added to them. */
154 #define COND8_LENGTH 2
156 /* There is one extra instruction before the branch, so we must add
157 two more bytes to account for it. */
158 #define COND12_F 4100
159 #define COND12_M -4090
160 #define COND12_LENGTH 6
162 #define COND12_DELAY_LENGTH 4
164 /* ??? The minimum and maximum values are wrong, but this does not matter
165 since this relocation type is not supported yet. */
166 #define COND32_F (1<<30)
167 #define COND32_M -(1<<30)
168 #define COND32_LENGTH 14
170 #define UNCOND12_F 4098
171 #define UNCOND12_M -4092
172 #define UNCOND12_LENGTH 2
174 /* ??? The minimum and maximum values are wrong, but this does not matter
175 since this relocation type is not supported yet. */
176 #define UNCOND32_F (1<<30)
177 #define UNCOND32_M -(1<<30)
178 #define UNCOND32_LENGTH 14
180 #define EMPTY { 0, 0, 0, 0 }
182 const relax_typeS md_relax_table[C (END, 0)] = {
183 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
184 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
187 /* C (COND_JUMP, COND8) */
188 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
189 /* C (COND_JUMP, COND12) */
190 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
191 /* C (COND_JUMP, COND32) */
192 { COND32_F, COND32_M, COND32_LENGTH, 0, },
193 /* C (COND_JUMP, UNDEF_WORD_DISP) */
194 { 0, 0, COND32_LENGTH, 0, },
196 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
199 /* C (COND_JUMP_DELAY, COND8) */
200 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
201 /* C (COND_JUMP_DELAY, COND12) */
202 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
203 /* C (COND_JUMP_DELAY, COND32) */
204 { COND32_F, COND32_M, COND32_LENGTH, 0, },
205 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
206 { 0, 0, COND32_LENGTH, 0, },
208 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
211 /* C (UNCOND_JUMP, UNCOND12) */
212 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
213 /* C (UNCOND_JUMP, UNCOND32) */
214 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
216 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
217 { 0, 0, UNCOND32_LENGTH, 0, },
219 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
224 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
228 /* Parse @got, etc. and return the desired relocation.
229 If we have additional arithmetic expression, then we fill in new_exp_p. */
230 static bfd_reloc_code_real_type
231 sh_elf_suffix (str_p, exp_p, new_exp_p)
233 expressionS *exp_p, *new_exp_p;
238 bfd_reloc_code_real_type reloc;
248 #define MAP(str,reloc) { str, sizeof (str)-1, reloc }
250 static struct map_bfd mapping[] = {
251 MAP ("got", BFD_RELOC_32_GOT_PCREL),
252 MAP ("plt", BFD_RELOC_32_PLT_PCREL),
253 MAP ("gotoff", BFD_RELOC_32_GOTOFF),
254 { (char *)0, 0, BFD_RELOC_UNUSED }
258 return BFD_RELOC_UNUSED;
260 for (ch = *str, str2 = ident;
261 (str2 < ident + sizeof (ident) - 1
262 && (isalnum (ch) || ch == '@'));
265 *str2++ = (islower (ch)) ? ch : tolower (ch);
272 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
273 if (ch == ptr->string[0]
274 && len == ptr->length
275 && memcmp (ident, ptr->string, ptr->length) == 0)
277 /* Now check for identifier@suffix+constant */
278 if (*str == '-' || *str == '+')
280 char *orig_line = input_line_pointer;
282 input_line_pointer = str;
283 expression (new_exp_p);
284 if (new_exp_p->X_op == O_constant)
286 exp_p->X_add_number += new_exp_p->X_add_number;
287 str = input_line_pointer;
289 if (new_exp_p->X_op == O_subtract)
290 str = input_line_pointer;
292 if (&input_line_pointer != str_p)
293 input_line_pointer = orig_line;
300 return BFD_RELOC_UNUSED;
303 /* The regular cons() function, that reads constants, doesn't support
304 suffixes such as @GOT, @GOTOFF and @PLT, that generate
305 machine-specific relocation types. So we must define it here. */
306 /* Clobbers input_line_pointer, checks end-of-line. */
309 register int nbytes; /* 1=.byte, 2=.word, 4=.long */
311 expressionS exp, new_exp;
312 bfd_reloc_code_real_type reloc;
315 if (is_it_end_of_statement ())
317 demand_empty_rest_of_line ();
324 new_exp.X_op = O_absent;
325 new_exp.X_add_symbol = new_exp.X_op_symbol = NULL;
326 /* If the _GLOBAL_OFFSET_TABLE_ symbol hasn't been found yet,
327 use the name of the symbol to tell whether it's the
328 _GLOBAL_OFFSET_TABLE_. If it has, comparing the symbols is
330 if (! GOT_symbol && exp.X_add_symbol)
331 name = S_GET_NAME (exp.X_add_symbol);
334 /* Check whether this expression involves the
335 _GLOBAL_OFFSET_TABLE_ symbol, by itself or added to a
336 difference of two other symbols. */
337 if (((GOT_symbol && GOT_symbol == exp.X_add_symbol)
338 || (! GOT_symbol && name
339 && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0))
340 && (exp.X_op == O_symbol
341 || (exp.X_op == O_add
342 && ((symbol_get_value_expression (exp.X_op_symbol)->X_op)
345 reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput,
347 int size = bfd_get_reloc_size (reloc_howto);
349 if (GOT_symbol == NULL)
350 GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME);
353 as_bad (_("%s relocations do not fit in %d bytes\n"),
354 reloc_howto->name, nbytes);
357 register char *p = frag_more ((int) nbytes);
358 int offset = nbytes - size;
360 fix_new_exp (frag_now, p - frag_now->fr_literal + offset,
361 size, &exp, 0, TC_RELOC_GLOBAL_OFFSET_TABLE);
364 /* Check if this symbol involves one of the magic suffixes, such
365 as @GOT, @GOTOFF or @PLT, and determine which relocation type
367 else if ((exp.X_op == O_symbol || (exp.X_op == O_add && exp.X_op_symbol))
368 && *input_line_pointer == '@'
369 && ((reloc = sh_elf_suffix (&input_line_pointer, &exp, &new_exp))
370 != BFD_RELOC_UNUSED))
372 reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput,
374 int size = bfd_get_reloc_size (reloc_howto);
376 /* Force a GOT to be generated. */
377 if (GOT_symbol == NULL)
378 GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME);
381 as_bad (_("%s relocations do not fit in %d bytes\n"),
382 reloc_howto->name, nbytes);
385 register char *p = frag_more ((int) nbytes);
386 int offset = nbytes - size;
388 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
390 if (new_exp.X_op != O_absent)
391 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
392 &new_exp, 0, BFD_RELOC_32);
396 emit_expr (&exp, (unsigned int) nbytes);
398 while (*input_line_pointer++ == ',');
400 input_line_pointer--; /* Put terminator back into stream. */
401 if (*input_line_pointer == '#' || *input_line_pointer == '!')
403 while (! is_end_of_line[(unsigned char) *input_line_pointer++]);
406 demand_empty_rest_of_line ();
411 /* This function is called once, at assembler startup time. This should
412 set up all the tables, etc that the MD part of the assembler needs. */
417 sh_opcode_info *opcode;
418 char *prev_name = "";
422 /* The WinCE OS only supports little endian executables. */
423 target_big_endian = 0;
426 target_big_endian = 1;
429 target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up);
430 valid_arch = target_arch;
432 opcode_hash_control = hash_new ();
434 /* Insert unique names into hash table. */
435 for (opcode = sh_table; opcode->name; opcode++)
437 if (strcmp (prev_name, opcode->name))
439 if (! (opcode->arch & target_arch))
441 prev_name = opcode->name;
442 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
446 /* Make all the opcodes with the same name point to the same
448 opcode->name = prev_name;
455 static int reg_x, reg_y;
463 expressionS immediate;
467 #define IDENT_CHAR(c) (isalnum (c) || (c) == '_')
469 /* Try to parse a reg name. Return the number of chars consumed. */
472 parse_reg (src, mode, reg)
477 char l0 = tolower (src[0]);
478 char l1 = l0 ? tolower (src[1]) : 0;
480 /* We use ! IDENT_CHAR for the next character after the register name, to
481 make sure that we won't accidentally recognize a symbol name such as
482 'sram' or sr_ram as being a reference to the register 'sr'. */
488 if (src[2] >= '0' && src[2] <= '5'
489 && ! IDENT_CHAR ((unsigned char) src[3]))
492 *reg = 10 + src[2] - '0';
496 if (l1 >= '0' && l1 <= '9'
497 && ! IDENT_CHAR ((unsigned char) src[2]))
503 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0
504 && ! IDENT_CHAR ((unsigned char) src[7]))
511 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
516 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
527 if (! IDENT_CHAR ((unsigned char) src[2]))
533 if (tolower (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
542 if (! IDENT_CHAR ((unsigned char) src[2]))
548 if (tolower (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
556 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1'
557 && ! IDENT_CHAR ((unsigned char) src[3]))
560 *reg = 4 + (l1 - '0');
563 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1'
564 && ! IDENT_CHAR ((unsigned char) src[3]))
567 *reg = 6 + (l1 - '0');
570 if (l1 == 's' && src[2] >= '0' && src[2] <= '3'
571 && ! IDENT_CHAR ((unsigned char) src[3]))
576 *reg = n | ((~n & 2) << 1);
581 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[3]))
603 if (l0 == 'x' && l1 >= '0' && l1 <= '1'
604 && ! IDENT_CHAR ((unsigned char) src[2]))
607 *reg = A_X0_NUM + l1 - '0';
611 if (l0 == 'y' && l1 >= '0' && l1 <= '1'
612 && ! IDENT_CHAR ((unsigned char) src[2]))
615 *reg = A_Y0_NUM + l1 - '0';
619 if (l0 == 'm' && l1 >= '0' && l1 <= '1'
620 && ! IDENT_CHAR ((unsigned char) src[2]))
623 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM;
629 && tolower (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
635 if (l0 == 's' && l1 == 'p' && tolower (src[2]) == 'c'
636 && ! IDENT_CHAR ((unsigned char) src[3]))
642 if (l0 == 's' && l1 == 'g' && tolower (src[2]) == 'r'
643 && ! IDENT_CHAR ((unsigned char) src[3]))
649 if (l0 == 'd' && l1 == 's' && tolower (src[2]) == 'r'
650 && ! IDENT_CHAR ((unsigned char) src[3]))
656 if (l0 == 'd' && l1 == 'b' && tolower (src[2]) == 'r'
657 && ! IDENT_CHAR ((unsigned char) src[3]))
663 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
669 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
676 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
681 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
683 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
684 and use an uninitialized immediate. */
688 if (l0 == 'g' && l1 == 'b' && tolower (src[2]) == 'r'
689 && ! IDENT_CHAR ((unsigned char) src[3]))
694 if (l0 == 'v' && l1 == 'b' && tolower (src[2]) == 'r'
695 && ! IDENT_CHAR ((unsigned char) src[3]))
701 if (l0 == 'm' && l1 == 'a' && tolower (src[2]) == 'c'
702 && ! IDENT_CHAR ((unsigned char) src[4]))
704 if (tolower (src[3]) == 'l')
709 if (tolower (src[3]) == 'h')
715 if (l0 == 'm' && l1 == 'o' && tolower (src[2]) == 'd'
716 && ! IDENT_CHAR ((unsigned char) src[4]))
721 if (l0 == 'f' && l1 == 'r')
725 if (src[3] >= '0' && src[3] <= '5'
726 && ! IDENT_CHAR ((unsigned char) src[4]))
729 *reg = 10 + src[3] - '0';
733 if (src[2] >= '0' && src[2] <= '9'
734 && ! IDENT_CHAR ((unsigned char) src[3]))
737 *reg = (src[2] - '0');
741 if (l0 == 'd' && l1 == 'r')
745 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
746 && ! IDENT_CHAR ((unsigned char) src[4]))
749 *reg = 10 + src[3] - '0';
753 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
754 && ! IDENT_CHAR ((unsigned char) src[3]))
757 *reg = (src[2] - '0');
761 if (l0 == 'x' && l1 == 'd')
765 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
766 && ! IDENT_CHAR ((unsigned char) src[4]))
769 *reg = 11 + src[3] - '0';
773 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
774 && ! IDENT_CHAR ((unsigned char) src[3]))
777 *reg = (src[2] - '0') + 1;
781 if (l0 == 'f' && l1 == 'v')
783 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
789 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
790 && ! IDENT_CHAR ((unsigned char) src[3]))
793 *reg = (src[2] - '0');
797 if (l0 == 'f' && l1 == 'p' && tolower (src[2]) == 'u'
798 && tolower (src[3]) == 'l'
799 && ! IDENT_CHAR ((unsigned char) src[4]))
805 if (l0 == 'f' && l1 == 'p' && tolower (src[2]) == 's'
806 && tolower (src[3]) == 'c'
807 && tolower (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
813 if (l0 == 'x' && l1 == 'm' && tolower (src[2]) == 't'
814 && tolower (src[3]) == 'r'
815 && tolower (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
829 /* JF: '.' is pseudo symbol with value of current location
830 in current segment. */
831 fake = FAKE_LABEL_NAME;
832 return symbol_new (fake,
834 (valueT) frag_now_fix (),
846 save = input_line_pointer;
847 input_line_pointer = s;
848 expression (&op->immediate);
849 if (op->immediate.X_op == O_absent)
850 as_bad (_("missing operand"));
851 new = input_line_pointer;
852 input_line_pointer = save;
856 /* The many forms of operand:
859 @Rn Register indirect
872 pr, gbr, vbr, macl, mach
885 /* Must be predecrement. */
888 len = parse_reg (src, &mode, &(op->reg));
890 as_bad (_("illegal register after @-"));
895 else if (src[0] == '(')
897 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
900 len = parse_reg (src, &mode, &(op->reg));
901 if (len && mode == A_REG_N)
906 as_bad (_("must be @(r0,...)"));
910 /* Now can be rn or gbr */
911 len = parse_reg (src, &mode, &(op->reg));
916 else if (mode == A_REG_N)
918 op->type = A_IND_R0_REG_N;
922 as_bad (_("syntax error in @(r0,...)"));
927 /* Must be an @(disp,.. thing) */
928 src = parse_exp (src, op);
931 /* Now can be rn, gbr or pc */
932 len = parse_reg (src, &mode, &op->reg);
937 op->type = A_DISP_REG_N;
939 else if (mode == A_GBR)
941 op->type = A_DISP_GBR;
943 else if (mode == A_PC)
945 /* Turn a plain @(4,pc) into @(.+4,pc). */
946 if (op->immediate.X_op == O_constant)
948 op->immediate.X_add_symbol = dot();
949 op->immediate.X_op = O_symbol;
951 op->type = A_DISP_PC;
955 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
960 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
965 as_bad (_("expecting )"));
971 src += parse_reg (src, &mode, &(op->reg));
974 as_bad (_("illegal register after @"));
979 if ((src[0] == 'r' && src[1] == '8')
980 || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's')))
985 if ((src[0] == 'r' && src[1] == '9')
986 || (src[0] == 'i' && src[1] == 'y'))
989 op->type = A_PMODY_N;
1003 get_operand (ptr, op)
1005 sh_operand_info *op;
1014 *ptr = parse_exp (src, op);
1019 else if (src[0] == '@')
1021 *ptr = parse_at (src, op);
1024 len = parse_reg (src, &mode, &(op->reg));
1033 /* Not a reg, the only thing left is a displacement. */
1034 *ptr = parse_exp (src, op);
1035 op->type = A_DISP_PC;
1041 get_operands (info, args, operand)
1042 sh_opcode_info *info;
1044 sh_operand_info *operand;
1049 /* The pre-processor will eliminate whitespace in front of '@'
1050 after the first argument; we may be called multiple times
1051 from assemble_ppi, so don't insist on finding whitespace here. */
1055 get_operand (&ptr, operand + 0);
1062 get_operand (&ptr, operand + 1);
1063 /* ??? Hack: psha/pshl have a varying operand number depending on
1064 the type of the first operand. We handle this by having the
1065 three-operand version first and reducing the number of operands
1066 parsed to two if we see that the first operand is an immediate.
1067 This works because no insn with three operands has an immediate
1068 as first operand. */
1069 if (info->arg[2] && operand[0].type != A_IMM)
1075 get_operand (&ptr, operand + 2);
1079 operand[2].type = 0;
1084 operand[1].type = 0;
1085 operand[2].type = 0;
1090 operand[0].type = 0;
1091 operand[1].type = 0;
1092 operand[2].type = 0;
1097 /* Passed a pointer to a list of opcodes which use different
1098 addressing modes, return the opcode which matches the opcodes
1101 static sh_opcode_info *
1102 get_specific (opcode, operands)
1103 sh_opcode_info *opcode;
1104 sh_operand_info *operands;
1106 sh_opcode_info *this_try = opcode;
1107 char *name = opcode->name;
1110 while (opcode->name)
1112 this_try = opcode++;
1113 if (this_try->name != name)
1115 /* We've looked so far down the table that we've run out of
1116 opcodes with the same name. */
1120 /* Look at both operands needed by the opcodes and provided by
1121 the user - since an arg test will often fail on the same arg
1122 again and again, we'll try and test the last failing arg the
1123 first on each opcode try. */
1124 for (n = 0; this_try->arg[n]; n++)
1126 sh_operand_info *user = operands + n;
1127 sh_arg_type arg = this_try->arg[n];
1139 if (user->type != arg)
1143 /* opcode needs r0 */
1144 if (user->type != A_REG_N || user->reg != 0)
1148 if (user->type != A_R0_GBR || user->reg != 0)
1152 if (user->type != F_REG_N || user->reg != 0)
1160 case A_IND_R0_REG_N:
1171 /* Opcode needs rn */
1172 if (user->type != arg)
1177 if (user->type != D_REG_N && user->type != X_REG_N)
1192 if (user->type != arg)
1197 if (user->type != arg)
1206 case A_IND_R0_REG_M:
1209 /* Opcode needs rn */
1210 if (user->type != arg - A_REG_M + A_REG_N)
1216 if (user->type != DSP_REG_N)
1238 if (user->type != DSP_REG_N)
1260 if (user->type != DSP_REG_N)
1282 if (user->type != DSP_REG_N)
1304 if (user->type != DSP_REG_N)
1326 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
1330 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
1334 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
1338 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
1342 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
1352 /* Opcode needs rn */
1353 if (user->type != arg - F_REG_M + F_REG_N)
1358 if (user->type != D_REG_N && user->type != X_REG_N)
1363 if (user->type != XMTRX_M4)
1369 printf (_("unhandled %d\n"), arg);
1373 if ( !(valid_arch & this_try->arch))
1375 valid_arch &= this_try->arch;
1385 check (operand, low, high)
1386 expressionS *operand;
1390 if (operand->X_op != O_constant
1391 || operand->X_add_number < low
1392 || operand->X_add_number > high)
1394 as_bad (_("operand must be absolute in range %d..%d"), low, high);
1396 return operand->X_add_number;
1400 insert (where, how, pcrel, op)
1404 sh_operand_info *op;
1406 fix_new_exp (frag_now,
1407 where - frag_now->fr_literal,
1415 build_relax (opcode, op)
1416 sh_opcode_info *opcode;
1417 sh_operand_info *op;
1419 int high_byte = target_big_endian ? 0 : 1;
1422 if (opcode->arg[0] == A_BDISP8)
1424 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
1425 p = frag_var (rs_machine_dependent,
1426 md_relax_table[C (what, COND32)].rlx_length,
1427 md_relax_table[C (what, COND8)].rlx_length,
1429 op->immediate.X_add_symbol,
1430 op->immediate.X_add_number,
1432 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
1434 else if (opcode->arg[0] == A_BDISP12)
1436 p = frag_var (rs_machine_dependent,
1437 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
1438 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
1440 op->immediate.X_add_symbol,
1441 op->immediate.X_add_number,
1443 p[high_byte] = (opcode->nibbles[0] << 4);
1448 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1451 insert_loop_bounds (output, operand)
1453 sh_operand_info *operand;
1458 /* Since the low byte of the opcode will be overwritten by the reloc, we
1459 can just stash the high byte into both bytes and ignore endianness. */
1462 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1463 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1467 static int count = 0;
1469 /* If the last loop insn is a two-byte-insn, it is in danger of being
1470 swapped with the insn after it. To prevent this, create a new
1471 symbol - complete with SH_LABEL reloc - after the last loop insn.
1472 If the last loop insn is four bytes long, the symbol will be
1473 right in the middle, but four byte insns are not swapped anyways. */
1474 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1475 Hence a 9 digit number should be enough to count all REPEATs. */
1477 sprintf (name, "_R%x", count++ & 0x3fffffff);
1478 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag);
1479 /* Make this a local symbol. */
1481 SF_SET_LOCAL (end_sym);
1482 #endif /* OBJ_COFF */
1483 symbol_table_insert (end_sym);
1484 end_sym->sy_value = operand[1].immediate;
1485 end_sym->sy_value.X_add_number += 2;
1486 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
1489 output = frag_more (2);
1492 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1493 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1495 return frag_more (2);
1498 /* Now we know what sort of opcodes it is, let's build the bytes. */
1501 build_Mytes (opcode, operand)
1502 sh_opcode_info *opcode;
1503 sh_operand_info *operand;
1508 char *output = frag_more (2);
1509 unsigned int size = 2;
1510 int low_byte = target_big_endian ? 1 : 0;
1516 for (index = 0; index < 4; index++)
1518 sh_nibble_type i = opcode->nibbles[index];
1528 nbuf[index] = reg_n;
1531 nbuf[index] = reg_m;
1534 if (reg_n < 2 || reg_n > 5)
1535 as_bad (_("Invalid register: 'r%d'"), reg_n);
1536 nbuf[index] = (reg_n & 3) | 4;
1539 nbuf[index] = reg_n | (reg_m >> 2);
1542 nbuf[index] = reg_b | 0x08;
1545 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
1548 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
1551 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
1554 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
1557 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
1560 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
1563 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
1566 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
1569 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
1572 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
1575 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
1578 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
1581 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1, operand);
1584 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1, operand);
1587 output = insert_loop_bounds (output, operand);
1588 nbuf[index] = opcode->nibbles[3];
1592 printf (_("failed for %d\n"), i);
1596 if (!target_big_endian)
1598 output[1] = (nbuf[0] << 4) | (nbuf[1]);
1599 output[0] = (nbuf[2] << 4) | (nbuf[3]);
1603 output[0] = (nbuf[0] << 4) | (nbuf[1]);
1604 output[1] = (nbuf[2] << 4) | (nbuf[3]);
1609 /* Find an opcode at the start of *STR_P in the hash table, and set
1610 *STR_P to the first character after the last one read. */
1612 static sh_opcode_info *
1613 find_cooked_opcode (str_p)
1617 unsigned char *op_start;
1618 unsigned char *op_end;
1622 /* Drop leading whitespace. */
1626 /* Find the op code end.
1627 The pre-processor will eliminate whitespace in front of
1628 any '@' after the first argument; we may be called from
1629 assemble_ppi, so the opcode might be terminated by an '@'. */
1630 for (op_start = op_end = (unsigned char *) (str);
1633 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
1636 unsigned char c = op_start[nlen];
1638 /* The machine independent code will convert CMP/EQ into cmp/EQ
1639 because it thinks the '/' is the end of the symbol. Moreover,
1640 all but the first sub-insn is a parallel processing insn won't
1641 be capitailzed. Instead of hacking up the machine independent
1642 code, we just deal with it here. */
1643 c = isupper (c) ? tolower (c) : c;
1652 as_bad (_("can't find opcode "));
1654 return (sh_opcode_info *) hash_find (opcode_hash_control, name);
1657 /* Assemble a parallel processing insn. */
1658 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1661 assemble_ppi (op_end, opcode)
1663 sh_opcode_info *opcode;
1673 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1674 Make sure we encode a defined insn pattern. */
1680 sh_operand_info operand[3];
1682 if (opcode->arg[0] != A_END)
1683 op_end = get_operands (opcode, op_end, operand);
1684 opcode = get_specific (opcode, operand);
1687 /* Couldn't find an opcode which matched the operands. */
1688 char *where = frag_more (2);
1693 as_bad (_("invalid operands for opcode"));
1697 if (opcode->nibbles[0] != PPI)
1698 as_bad (_("insn can't be combined with parallel processing insn"));
1700 switch (opcode->nibbles[1])
1705 as_bad (_("multiple movx specifications"));
1710 as_bad (_("multiple movy specifications"));
1716 as_bad (_("multiple movx specifications"));
1717 if (reg_n < 4 || reg_n > 5)
1718 as_bad (_("invalid movx address register"));
1719 if (opcode->nibbles[2] & 8)
1721 if (reg_m == A_A1_NUM)
1723 else if (reg_m != A_A0_NUM)
1724 as_bad (_("invalid movx dsp register"));
1729 as_bad (_("invalid movx dsp register"));
1732 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
1737 as_bad (_("multiple movy specifications"));
1738 if (opcode->nibbles[2] & 8)
1740 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1743 if (reg_m == A_A1_NUM)
1745 else if (reg_m != A_A0_NUM)
1746 as_bad (_("invalid movy dsp register"));
1751 as_bad (_("invalid movy dsp register"));
1754 if (reg_n < 6 || reg_n > 7)
1755 as_bad (_("invalid movy address register"));
1756 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
1760 if (operand[0].immediate.X_op != O_constant)
1761 as_bad (_("dsp immediate shift value not constant"));
1762 field_b = ((opcode->nibbles[2] << 12)
1763 | (operand[0].immediate.X_add_number & 127) << 4
1768 as_bad (_("multiple parallel processing specifications"));
1769 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
1770 + (reg_x << 6) + (reg_y << 4) + reg_n);
1774 as_bad (_("multiple condition specifications"));
1775 cond = opcode->nibbles[2] << 8;
1777 goto skip_cond_check;
1781 as_bad (_("multiple parallel processing specifications"));
1782 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
1783 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
1789 if ((field_b & 0xef00) != 0xa100)
1790 as_bad (_("insn cannot be combined with pmuls"));
1792 switch (field_b & 0xf)
1795 field_b += 0 - A_X0_NUM;
1798 field_b += 1 - A_Y0_NUM;
1801 field_b += 2 - A_A0_NUM;
1804 field_b += 3 - A_A1_NUM;
1807 as_bad (_("bad padd / psub pmuls output operand"));
1810 field_b += 0x4000 + reg_efg;
1817 as_bad (_("condition not followed by conditionalizable insn"));
1823 opcode = find_cooked_opcode (&op_end);
1827 (_("unrecognized characters at end of parallel processing insn")));
1832 move_code = movx | movy;
1835 /* Parallel processing insn. */
1836 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
1838 output = frag_more (4);
1840 if (! target_big_endian)
1842 output[3] = ppi_code >> 8;
1843 output[2] = ppi_code;
1847 output[2] = ppi_code >> 8;
1848 output[3] = ppi_code;
1850 move_code |= 0xf800;
1854 /* Just a double data transfer. */
1855 output = frag_more (2);
1858 if (! target_big_endian)
1860 output[1] = move_code >> 8;
1861 output[0] = move_code;
1865 output[0] = move_code >> 8;
1866 output[1] = move_code;
1871 /* This is the guts of the machine-dependent assembler. STR points to a
1872 machine dependent instruction. This function is supposed to emit
1873 the frags/bytes it assembles to. */
1879 unsigned char *op_end;
1880 sh_operand_info operand[3];
1881 sh_opcode_info *opcode;
1882 unsigned int size = 0;
1884 opcode = find_cooked_opcode (&str);
1889 as_bad (_("unknown opcode"));
1894 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
1896 /* Output a CODE reloc to tell the linker that the following
1897 bytes are instructions, not data. */
1898 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
1900 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
1903 if (opcode->nibbles[0] == PPI)
1905 size = assemble_ppi (op_end, opcode);
1909 if (opcode->arg[0] == A_BDISP12
1910 || opcode->arg[0] == A_BDISP8)
1912 parse_exp (op_end + 1, &operand[0]);
1913 build_relax (opcode, &operand[0]);
1917 if (opcode->arg[0] == A_END)
1919 /* Ignore trailing whitespace. If there is any, it has already
1920 been compressed to a single space. */
1926 op_end = get_operands (opcode, op_end, operand);
1928 opcode = get_specific (opcode, operand);
1932 /* Couldn't find an opcode which matched the operands. */
1933 char *where = frag_more (2);
1938 as_bad (_("invalid operands for opcode"));
1943 as_bad (_("excess operands: '%s'"), op_end);
1945 size = build_Mytes (opcode, operand);
1950 #ifdef BFD_ASSEMBLER
1951 dwarf2_emit_insn (size);
1955 /* This routine is called each time a label definition is seen. It
1956 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1961 static fragS *last_label_frag;
1962 static int last_label_offset;
1965 && seg_info (now_seg)->tc_segment_info_data.in_code)
1969 offset = frag_now_fix ();
1970 if (frag_now != last_label_frag
1971 || offset != last_label_offset)
1973 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
1974 last_label_frag = frag_now;
1975 last_label_offset = offset;
1980 /* This routine is called when the assembler is about to output some
1981 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1984 sh_flush_pending_output ()
1987 && seg_info (now_seg)->tc_segment_info_data.in_code)
1989 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
1991 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
1996 md_undefined_symbol (name)
2000 /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise we
2001 have no need to default values of symbols. */
2002 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2006 if (symbol_find (name))
2007 as_bad ("GOT already in the symbol table");
2009 GOT_symbol = symbol_new (name, undefined_section,
2010 (valueT)0, & zero_address_frag);
2015 #endif /* OBJ_ELF */
2021 #ifndef BFD_ASSEMBLER
2024 tc_crawl_symbol_chain (headers)
2025 object_headers *headers;
2027 printf (_("call to tc_crawl_symbol_chain \n"));
2031 tc_headers_hook (headers)
2032 object_headers *headers;
2034 printf (_("call to tc_headers_hook \n"));
2040 /* Various routines to kill one day. */
2041 /* Equal to MAX_PRECISION in atof-ieee.c. */
2042 #define MAX_LITTLENUMS 6
2044 /* Turn a string in input_line_pointer into a floating point constant
2045 of type TYPE, and store the appropriate bytes in *LITP. The number
2046 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2047 returned, or NULL on OK. */
2050 md_atof (type, litP, sizeP)
2056 LITTLENUM_TYPE words[4];
2072 return _("bad call to md_atof");
2075 t = atof_ieee (input_line_pointer, type, words);
2077 input_line_pointer = t;
2081 if (! target_big_endian)
2083 for (i = prec - 1; i >= 0; i--)
2085 md_number_to_chars (litP, (valueT) words[i], 2);
2091 for (i = 0; i < prec; i++)
2093 md_number_to_chars (litP, (valueT) words[i], 2);
2101 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2102 call instruction. It refers to a label of the instruction which
2103 loads the register which the call uses. We use it to generate a
2104 special reloc for the linker. */
2108 int ignore ATTRIBUTE_UNUSED;
2113 as_warn (_(".uses pseudo-op seen when not relaxing"));
2117 if (ex.X_op != O_symbol || ex.X_add_number != 0)
2119 as_bad (_("bad .uses format"));
2120 ignore_rest_of_line ();
2124 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
2126 demand_empty_rest_of_line ();
2129 CONST char *md_shortopts = "";
2130 struct option md_longopts[] =
2132 #define OPTION_RELAX (OPTION_MD_BASE)
2133 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
2134 #define OPTION_SMALL (OPTION_LITTLE + 1)
2135 #define OPTION_DSP (OPTION_SMALL + 1)
2137 {"relax", no_argument, NULL, OPTION_RELAX},
2138 {"little", no_argument, NULL, OPTION_LITTLE},
2139 {"small", no_argument, NULL, OPTION_SMALL},
2140 {"dsp", no_argument, NULL, OPTION_DSP},
2141 {NULL, no_argument, NULL, 0}
2143 size_t md_longopts_size = sizeof (md_longopts);
2146 md_parse_option (c, arg)
2148 char *arg ATTRIBUTE_UNUSED;
2158 target_big_endian = 0;
2177 md_show_usage (stream)
2180 fprintf (stream, _("\
2182 -little generate little endian code\n\
2183 -relax alter jump instructions for long displacements\n\
2184 -small align sections to 4 byte boundaries, not 16\n\
2185 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
2189 tc_Nout_fix_to_chars ()
2191 printf (_("call to tc_Nout_fix_to_chars \n"));
2195 /* This struct is used to pass arguments to sh_count_relocs through
2196 bfd_map_over_sections. */
2198 struct sh_count_relocs
2200 /* Symbol we are looking for. */
2202 /* Count of relocs found. */
2206 /* Count the number of fixups in a section which refer to a particular
2207 symbol. When using BFD_ASSEMBLER, this is called via
2208 bfd_map_over_sections. */
2211 sh_count_relocs (abfd, sec, data)
2212 bfd *abfd ATTRIBUTE_UNUSED;
2216 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
2217 segment_info_type *seginfo;
2221 seginfo = seg_info (sec);
2222 if (seginfo == NULL)
2226 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2228 if (fix->fx_addsy == sym)
2236 /* Handle the count relocs for a particular section. When using
2237 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2240 sh_frob_section (abfd, sec, ignore)
2241 bfd *abfd ATTRIBUTE_UNUSED;
2243 PTR ignore ATTRIBUTE_UNUSED;
2245 segment_info_type *seginfo;
2248 seginfo = seg_info (sec);
2249 if (seginfo == NULL)
2252 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2257 struct sh_count_relocs info;
2259 if (fix->fx_r_type != BFD_RELOC_SH_USES)
2262 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2263 symbol in the same section. */
2264 sym = fix->fx_addsy;
2266 || fix->fx_subsy != NULL
2267 || fix->fx_addnumber != 0
2268 || S_GET_SEGMENT (sym) != sec
2269 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2270 || S_GET_STORAGE_CLASS (sym) == C_EXT
2272 || S_IS_EXTERNAL (sym))
2274 as_warn_where (fix->fx_file, fix->fx_line,
2275 _(".uses does not refer to a local symbol in the same section"));
2279 /* Look through the fixups again, this time looking for one
2280 at the same location as sym. */
2281 val = S_GET_VALUE (sym);
2282 for (fscan = seginfo->fix_root;
2284 fscan = fscan->fx_next)
2285 if (val == fscan->fx_frag->fr_address + fscan->fx_where
2286 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
2287 && fscan->fx_r_type != BFD_RELOC_SH_CODE
2288 && fscan->fx_r_type != BFD_RELOC_SH_DATA
2289 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
2293 as_warn_where (fix->fx_file, fix->fx_line,
2294 _("can't find fixup pointed to by .uses"));
2298 if (fscan->fx_tcbit)
2300 /* We've already done this one. */
2304 /* The variable fscan should also be a fixup to a local symbol
2305 in the same section. */
2306 sym = fscan->fx_addsy;
2308 || fscan->fx_subsy != NULL
2309 || fscan->fx_addnumber != 0
2310 || S_GET_SEGMENT (sym) != sec
2311 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2312 || S_GET_STORAGE_CLASS (sym) == C_EXT
2314 || S_IS_EXTERNAL (sym))
2316 as_warn_where (fix->fx_file, fix->fx_line,
2317 _(".uses target does not refer to a local symbol in the same section"));
2321 /* Now we look through all the fixups of all the sections,
2322 counting the number of times we find a reference to sym. */
2325 #ifdef BFD_ASSEMBLER
2326 bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info);
2331 for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
2332 sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info);
2339 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2340 We have already adjusted the value of sym to include the
2341 fragment address, so we undo that adjustment here. */
2342 subseg_change (sec, 0);
2343 fix_new (symbol_get_frag (sym),
2344 S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address,
2345 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
2349 /* This function is called after the symbol table has been completed,
2350 but before the relocs or section contents have been written out.
2351 If we have seen any .uses pseudo-ops, they point to an instruction
2352 which loads a register with the address of a function. We look
2353 through the fixups to find where the function address is being
2354 loaded from. We then generate a COUNT reloc giving the number of
2355 times that function address is referred to. The linker uses this
2356 information when doing relaxing, to decide when it can eliminate
2357 the stored function address entirely. */
2365 #ifdef BFD_ASSEMBLER
2366 bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL);
2371 for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
2372 sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL);
2377 /* Called after relaxing. Set the correct sizes of the fragments, and
2378 create relocs so that md_apply_fix will fill in the correct values. */
2381 md_convert_frag (headers, seg, fragP)
2382 #ifdef BFD_ASSEMBLER
2383 bfd *headers ATTRIBUTE_UNUSED;
2385 object_headers *headers;
2392 switch (fragP->fr_subtype)
2394 case C (COND_JUMP, COND8):
2395 case C (COND_JUMP_DELAY, COND8):
2396 subseg_change (seg, 0);
2397 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2398 1, BFD_RELOC_SH_PCDISP8BY2);
2403 case C (UNCOND_JUMP, UNCOND12):
2404 subseg_change (seg, 0);
2405 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2406 1, BFD_RELOC_SH_PCDISP12BY2);
2411 case C (UNCOND_JUMP, UNCOND32):
2412 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
2413 if (fragP->fr_symbol == NULL)
2414 as_bad_where (fragP->fr_file, fragP->fr_line,
2415 _("displacement overflows 12-bit field"));
2416 else if (S_IS_DEFINED (fragP->fr_symbol))
2417 as_bad_where (fragP->fr_file, fragP->fr_line,
2418 _("displacement to defined symbol %s overflows 12-bit field"),
2419 S_GET_NAME (fragP->fr_symbol));
2421 as_bad_where (fragP->fr_file, fragP->fr_line,
2422 _("displacement to undefined symbol %s overflows 12-bit field"),
2423 S_GET_NAME (fragP->fr_symbol));
2424 /* Stabilize this frag, so we don't trip an assert. */
2425 fragP->fr_fix += fragP->fr_var;
2429 case C (COND_JUMP, COND12):
2430 case C (COND_JUMP_DELAY, COND12):
2431 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2432 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2433 was due to gas incorrectly relaxing an out-of-range conditional
2434 branch with delay slot. It turned:
2435 bf.s L6 (slot mov.l r12,@(44,r0))
2438 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2440 32: 10 cb mov.l r12,@(44,r0)
2441 Therefore, branches with delay slots have to be handled
2442 differently from ones without delay slots. */
2444 unsigned char *buffer =
2445 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
2446 int highbyte = target_big_endian ? 0 : 1;
2447 int lowbyte = target_big_endian ? 1 : 0;
2448 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
2450 /* Toggle the true/false bit of the bcond. */
2451 buffer[highbyte] ^= 0x2;
2453 /* If this is a dalayed branch, we may not put the the bra in the
2454 slot. So we change it to a non-delayed branch, like that:
2455 b! cond slot_label; bra disp; slot_label: slot_insn
2456 ??? We should try if swapping the conditional branch and
2457 its delay-slot insn already makes the branch reach. */
2459 /* Build a relocation to six / four bytes farther on. */
2460 subseg_change (seg, 0);
2461 fix_new (fragP, fragP->fr_fix, 2,
2462 #ifdef BFD_ASSEMBLER
2463 section_symbol (seg),
2465 seg_info (seg)->dot,
2467 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
2468 1, BFD_RELOC_SH_PCDISP8BY2);
2470 /* Set up a jump instruction. */
2471 buffer[highbyte + 2] = 0xa0;
2472 buffer[lowbyte + 2] = 0;
2473 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
2474 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
2478 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
2483 /* Fill in a NOP instruction. */
2484 buffer[highbyte + 4] = 0x0;
2485 buffer[lowbyte + 4] = 0x9;
2494 case C (COND_JUMP, COND32):
2495 case C (COND_JUMP_DELAY, COND32):
2496 case C (COND_JUMP, UNDEF_WORD_DISP):
2497 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
2498 if (fragP->fr_symbol == NULL)
2499 as_bad_where (fragP->fr_file, fragP->fr_line,
2500 _("displacement overflows 8-bit field"));
2501 else if (S_IS_DEFINED (fragP->fr_symbol))
2502 as_bad_where (fragP->fr_file, fragP->fr_line,
2503 _("displacement to defined symbol %s overflows 8-bit field"),
2504 S_GET_NAME (fragP->fr_symbol));
2506 as_bad_where (fragP->fr_file, fragP->fr_line,
2507 _("displacement to undefined symbol %s overflows 8-bit field "),
2508 S_GET_NAME (fragP->fr_symbol));
2509 /* Stabilize this frag, so we don't trip an assert. */
2510 fragP->fr_fix += fragP->fr_var;
2518 if (donerelax && !sh_relax)
2519 as_warn_where (fragP->fr_file, fragP->fr_line,
2520 _("overflow in branch to %s; converted into longer instruction sequence"),
2521 (fragP->fr_symbol != NULL
2522 ? S_GET_NAME (fragP->fr_symbol)
2527 md_section_align (seg, size)
2528 segT seg ATTRIBUTE_UNUSED;
2531 #ifdef BFD_ASSEMBLER
2534 #else /* ! OBJ_ELF */
2535 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
2536 & (-1 << bfd_get_section_alignment (stdoutput, seg)));
2537 #endif /* ! OBJ_ELF */
2538 #else /* ! BFD_ASSEMBLER */
2539 return ((size + (1 << section_alignment[(int) seg]) - 1)
2540 & (-1 << section_alignment[(int) seg]));
2541 #endif /* ! BFD_ASSEMBLER */
2544 /* This static variable is set by s_uacons to tell sh_cons_align that
2545 the expession does not need to be aligned. */
2547 static int sh_no_align_cons = 0;
2549 /* This handles the unaligned space allocation pseudo-ops, such as
2550 .uaword. .uaword is just like .word, but the value does not need
2557 /* Tell sh_cons_align not to align this value. */
2558 sh_no_align_cons = 1;
2562 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2563 aligned correctly. Note that this can cause warnings to be issued
2564 when assembling initialized structured which were declared with the
2565 packed attribute. FIXME: Perhaps we should require an option to
2566 enable this warning? */
2569 sh_cons_align (nbytes)
2575 if (sh_no_align_cons)
2577 /* This is an unaligned pseudo-op. */
2578 sh_no_align_cons = 0;
2583 while ((nbytes & 1) == 0)
2592 if (now_seg == absolute_section)
2594 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
2595 as_warn (_("misaligned data"));
2599 p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
2600 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
2602 record_alignment (now_seg, nalign);
2605 /* When relaxing, we need to output a reloc for any .align directive
2606 that requests alignment to a four byte boundary or larger. This is
2607 also where we check for misaligned data. */
2610 sh_handle_align (frag)
2613 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix;
2615 if (frag->fr_type == rs_align_code)
2617 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
2618 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
2620 char *p = frag->fr_literal + frag->fr_fix;
2629 if (target_big_endian)
2631 memcpy (p, big_nop_pattern, sizeof big_nop_pattern);
2632 frag->fr_var = sizeof big_nop_pattern;
2636 memcpy (p, little_nop_pattern, sizeof little_nop_pattern);
2637 frag->fr_var = sizeof little_nop_pattern;
2640 else if (frag->fr_type == rs_align_test)
2643 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
2647 && (frag->fr_type == rs_align
2648 || frag->fr_type == rs_align_code)
2649 && frag->fr_address + frag->fr_fix > 0
2650 && frag->fr_offset > 1
2651 && now_seg != bss_section)
2652 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
2653 BFD_RELOC_SH_ALIGN);
2656 /* This macro decides whether a particular reloc is an entry in a
2657 switch table. It is used when relaxing, because the linker needs
2658 to know about all such entries so that it can adjust them if
2661 #ifdef BFD_ASSEMBLER
2662 #define SWITCH_TABLE_CONS(fix) (0)
2664 #define SWITCH_TABLE_CONS(fix) \
2665 ((fix)->fx_r_type == 0 \
2666 && ((fix)->fx_size == 2 \
2667 || (fix)->fx_size == 1 \
2668 || (fix)->fx_size == 4))
2671 #define SWITCH_TABLE(fix) \
2672 ((fix)->fx_addsy != NULL \
2673 && (fix)->fx_subsy != NULL \
2674 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2675 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2676 && ((fix)->fx_r_type == BFD_RELOC_32 \
2677 || (fix)->fx_r_type == BFD_RELOC_16 \
2678 || (fix)->fx_r_type == BFD_RELOC_8 \
2679 || SWITCH_TABLE_CONS (fix)))
2681 /* See whether we need to force a relocation into the output file.
2682 This is used to force out switch and PC relative relocations when
2686 sh_force_relocation (fix)
2690 if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2691 || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2692 || fix->fx_r_type == BFD_RELOC_SH_LOOP_START
2693 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END)
2699 return (fix->fx_pcrel
2700 || SWITCH_TABLE (fix)
2701 || fix->fx_r_type == BFD_RELOC_SH_COUNT
2702 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
2703 || fix->fx_r_type == BFD_RELOC_SH_CODE
2704 || fix->fx_r_type == BFD_RELOC_SH_DATA
2705 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
2710 sh_fix_adjustable (fixP)
2714 if (fixP->fx_addsy == NULL)
2717 if (fixP->fx_r_type == BFD_RELOC_SH_PCDISP8BY2
2718 || fixP->fx_r_type == BFD_RELOC_SH_PCDISP12BY2
2719 || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2
2720 || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4
2721 || fixP->fx_r_type == BFD_RELOC_8_PCREL
2722 || fixP->fx_r_type == BFD_RELOC_SH_SWITCH16
2723 || fixP->fx_r_type == BFD_RELOC_SH_SWITCH32)
2726 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP)
2727 || fixP->fx_r_type == BFD_RELOC_32_GOTOFF
2728 || fixP->fx_r_type == BFD_RELOC_RVA)
2731 /* We need the symbol name for the VTABLE entries */
2732 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2733 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2740 sh_elf_final_processing ()
2744 /* Set file-specific flags to indicate if this code needs
2745 a processor with the sh-dsp / sh3e ISA to execute. */
2746 if (valid_arch & arch_sh1)
2748 else if (valid_arch & arch_sh2)
2750 else if (valid_arch & arch_sh_dsp)
2752 else if (valid_arch & arch_sh3)
2754 else if (valid_arch & arch_sh3_dsp)
2756 else if (valid_arch & arch_sh3e)
2758 else if (valid_arch & arch_sh4)
2763 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
2764 elf_elfheader (stdoutput)->e_flags |= val;
2768 /* Apply a fixup to the object file. */
2770 #ifdef BFD_ASSEMBLER
2772 md_apply_fix (fixP, valp)
2777 md_apply_fix (fixP, val)
2782 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2783 int lowbyte = target_big_endian ? 1 : 0;
2784 int highbyte = target_big_endian ? 0 : 1;
2785 #ifdef BFD_ASSEMBLER
2791 #ifdef BFD_ASSEMBLER
2792 /* A difference between two symbols, the second of which is in the
2793 current section, is transformed in a PC-relative relocation to
2794 the other symbol. We have to adjust the relocation type here. */
2797 switch (fixP->fx_r_type)
2803 fixP->fx_r_type = BFD_RELOC_32_PCREL;
2806 /* Currently, we only support 32-bit PCREL relocations.
2807 We'd need a new reloc type to handle 16_PCREL, and
2808 8_PCREL is already taken for R_SH_SWITCH8, which
2809 apparently does something completely different than what
2812 bfd_set_error (bfd_error_bad_value);
2816 bfd_set_error (bfd_error_bad_value);
2821 /* The function adjust_reloc_syms won't convert a reloc against a weak
2822 symbol into a reloc against a section, but bfd_install_relocation
2823 will screw up if the symbol is defined, so we have to adjust val here
2824 to avoid the screw up later.
2826 For ordinary relocs, this does not happen for ELF, since for ELF,
2827 bfd_install_relocation uses the "special function" field of the
2828 howto, and does not execute the code that needs to be undone, as long
2829 as the special function does not return bfd_reloc_continue.
2830 It can happen for GOT- and PLT-type relocs the way they are
2831 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
2832 doesn't matter here since those relocs don't use VAL; see below. */
2833 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
2834 && fixP->fx_addsy != NULL
2835 && S_IS_WEAK (fixP->fx_addsy))
2836 val -= S_GET_VALUE (fixP->fx_addsy);
2839 #ifndef BFD_ASSEMBLER
2840 if (fixP->fx_r_type == 0)
2842 if (fixP->fx_size == 2)
2843 fixP->fx_r_type = BFD_RELOC_16;
2844 else if (fixP->fx_size == 4)
2845 fixP->fx_r_type = BFD_RELOC_32;
2846 else if (fixP->fx_size == 1)
2847 fixP->fx_r_type = BFD_RELOC_8;
2855 switch (fixP->fx_r_type)
2857 case BFD_RELOC_SH_IMM4:
2859 *buf = (*buf & 0xf0) | (val & 0xf);
2862 case BFD_RELOC_SH_IMM4BY2:
2865 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
2868 case BFD_RELOC_SH_IMM4BY4:
2871 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
2874 case BFD_RELOC_SH_IMM8BY2:
2880 case BFD_RELOC_SH_IMM8BY4:
2887 case BFD_RELOC_SH_IMM8:
2888 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2889 sometimes it is not (e.g., and). We permit any 8 bit value.
2890 Note that adding further restrictions may invalidate
2891 reasonable looking assembly code, such as ``and -0x1,r0''. */
2897 case BFD_RELOC_SH_PCRELIMM8BY4:
2898 /* The lower two bits of the PC are cleared before the
2899 displacement is added in. We can assume that the destination
2900 is on a 4 byte bounday. If this instruction is also on a 4
2901 byte boundary, then we want
2903 and target - here is a multiple of 4.
2904 Otherwise, we are on a 2 byte boundary, and we want
2905 (target - (here - 2)) / 4
2906 and target - here is not a multiple of 4. Computing
2907 (target - (here - 2)) / 4 == (target - here + 2) / 4
2908 works for both cases, since in the first case the addition of
2909 2 will be removed by the division. target - here is in the
2911 val = (val + 2) / 4;
2913 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2917 case BFD_RELOC_SH_PCRELIMM8BY2:
2920 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2924 case BFD_RELOC_SH_PCDISP8BY2:
2926 if (val < -0x80 || val > 0x7f)
2927 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2931 case BFD_RELOC_SH_PCDISP12BY2:
2933 if (val < -0x800 || val > 0x7ff)
2934 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2935 buf[lowbyte] = val & 0xff;
2936 buf[highbyte] |= (val >> 8) & 0xf;
2940 case BFD_RELOC_32_PCREL:
2941 md_number_to_chars (buf, val, 4);
2945 md_number_to_chars (buf, val, 2);
2948 case BFD_RELOC_SH_USES:
2949 /* Pass the value into sh_coff_reloc_mangle. */
2950 fixP->fx_addnumber = val;
2953 case BFD_RELOC_SH_COUNT:
2954 case BFD_RELOC_SH_ALIGN:
2955 case BFD_RELOC_SH_CODE:
2956 case BFD_RELOC_SH_DATA:
2957 case BFD_RELOC_SH_LABEL:
2958 /* Nothing to do here. */
2961 case BFD_RELOC_SH_LOOP_START:
2962 case BFD_RELOC_SH_LOOP_END:
2964 case BFD_RELOC_VTABLE_INHERIT:
2965 case BFD_RELOC_VTABLE_ENTRY:
2967 #ifdef BFD_ASSEMBLER
2974 case BFD_RELOC_32_PLT_PCREL:
2975 /* Make the jump instruction point to the address of the operand. At
2976 runtime we merely add the offset to the actual PLT entry. */
2980 case BFD_RELOC_SH_GOTPC:
2981 /* This is tough to explain. We end up with this one if we have
2982 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
2983 The goal here is to obtain the absolute address of the GOT,
2984 and it is strongly preferable from a performance point of
2985 view to avoid using a runtime relocation for this. There are
2986 cases where you have something like:
2988 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
2990 and here no correction would be required. Internally in the
2991 assembler we treat operands of this form as not being pcrel
2992 since the '.' is explicitly mentioned, and I wonder whether
2993 it would simplify matters to do it this way. Who knows. In
2994 earlier versions of the PIC patches, the pcrel_adjust field
2995 was used to store the correction, but since the expression is
2996 not pcrel, I felt it would be confusing to do it this way. */
2998 md_number_to_chars (buf, val, 4);
3001 case BFD_RELOC_32_GOT_PCREL:
3002 *valp = 0; /* Fully resolved at runtime. No addend. */
3003 md_number_to_chars (buf, 0, 4);
3006 case BFD_RELOC_32_GOTOFF:
3016 if ((val & ((1 << shift) - 1)) != 0)
3017 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
3021 val = ((val >> shift)
3022 | ((long) -1 & ~ ((long) -1 >> shift)));
3024 if (max != 0 && (val < min || val > max))
3025 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
3027 #ifdef BFD_ASSEMBLER
3032 /* Called just before address relaxation. Return the length
3033 by which a fragment must grow to reach it's destination. */
3036 md_estimate_size_before_relax (fragP, segment_type)
3037 register fragS *fragP;
3038 register segT segment_type;
3042 switch (fragP->fr_subtype)
3047 case C (UNCOND_JUMP, UNDEF_DISP):
3048 /* Used to be a branch to somewhere which was unknown. */
3049 if (!fragP->fr_symbol)
3051 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
3053 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3055 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
3059 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
3063 case C (COND_JUMP, UNDEF_DISP):
3064 case C (COND_JUMP_DELAY, UNDEF_DISP):
3065 what = GET_WHAT (fragP->fr_subtype);
3066 /* Used to be a branch to somewhere which was unknown. */
3067 if (fragP->fr_symbol
3068 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3070 /* Got a symbol and it's defined in this segment, become byte
3071 sized - maybe it will fix up. */
3072 fragP->fr_subtype = C (what, COND8);
3074 else if (fragP->fr_symbol)
3076 /* Its got a segment, but its not ours, so it will always be long. */
3077 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
3081 /* We know the abs value. */
3082 fragP->fr_subtype = C (what, COND8);
3086 case C (UNCOND_JUMP, UNCOND12):
3087 case C (UNCOND_JUMP, UNCOND32):
3088 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
3089 case C (COND_JUMP, COND8):
3090 case C (COND_JUMP, COND12):
3091 case C (COND_JUMP, COND32):
3092 case C (COND_JUMP, UNDEF_WORD_DISP):
3093 case C (COND_JUMP_DELAY, COND8):
3094 case C (COND_JUMP_DELAY, COND12):
3095 case C (COND_JUMP_DELAY, COND32):
3096 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3097 /* When relaxing a section for the second time, we don't need to
3098 do anything besides return the current size. */
3102 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length;
3103 return fragP->fr_var;
3106 /* Put number into target byte order. */
3109 md_number_to_chars (ptr, use, nbytes)
3114 if (! target_big_endian)
3115 number_to_chars_littleendian (ptr, use, nbytes);
3117 number_to_chars_bigendian (ptr, use, nbytes);
3121 md_pcrel_from (fixP)
3124 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
3130 tc_coff_sizemachdep (frag)
3133 return md_relax_table[frag->fr_subtype].rlx_length;
3136 #endif /* OBJ_COFF */
3138 #ifndef BFD_ASSEMBLER
3141 /* Map BFD relocs to SH COFF relocs. */
3145 bfd_reloc_code_real_type bfd_reloc;
3149 static const struct reloc_map coff_reloc_map[] =
3151 { BFD_RELOC_32, R_SH_IMM32 },
3152 { BFD_RELOC_16, R_SH_IMM16 },
3153 { BFD_RELOC_8, R_SH_IMM8 },
3154 { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 },
3155 { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP },
3156 { BFD_RELOC_SH_IMM4, R_SH_IMM4 },
3157 { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 },
3158 { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 },
3159 { BFD_RELOC_SH_IMM8, R_SH_IMM8 },
3160 { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 },
3161 { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 },
3162 { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 },
3163 { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 },
3164 { BFD_RELOC_8_PCREL, R_SH_SWITCH8 },
3165 { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 },
3166 { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 },
3167 { BFD_RELOC_SH_USES, R_SH_USES },
3168 { BFD_RELOC_SH_COUNT, R_SH_COUNT },
3169 { BFD_RELOC_SH_ALIGN, R_SH_ALIGN },
3170 { BFD_RELOC_SH_CODE, R_SH_CODE },
3171 { BFD_RELOC_SH_DATA, R_SH_DATA },
3172 { BFD_RELOC_SH_LABEL, R_SH_LABEL },
3173 { BFD_RELOC_UNUSED, 0 }
3176 /* Adjust a reloc for the SH. This is similar to the generic code,
3177 but does some minor tweaking. */
3180 sh_coff_reloc_mangle (seg, fix, intr, paddr)
3181 segment_info_type *seg;
3183 struct internal_reloc *intr;
3186 symbolS *symbol_ptr = fix->fx_addsy;
3189 intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where;
3191 if (! SWITCH_TABLE (fix))
3193 const struct reloc_map *rm;
3195 for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++)
3196 if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type)
3198 if (rm->bfd_reloc == BFD_RELOC_UNUSED)
3199 as_bad_where (fix->fx_file, fix->fx_line,
3200 _("Can not represent %s relocation in this object file format"),
3201 bfd_get_reloc_code_name (fix->fx_r_type));
3202 intr->r_type = rm->sh_reloc;
3209 if (fix->fx_r_type == BFD_RELOC_16)
3210 intr->r_type = R_SH_SWITCH16;
3211 else if (fix->fx_r_type == BFD_RELOC_8)
3212 intr->r_type = R_SH_SWITCH8;
3213 else if (fix->fx_r_type == BFD_RELOC_32)
3214 intr->r_type = R_SH_SWITCH32;
3218 /* For a switch reloc, we set r_offset to the difference between
3219 the reloc address and the subtrahend. When the linker is
3220 doing relaxing, it can use the determine the starting and
3221 ending points of the switch difference expression. */
3222 intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy);
3225 /* PC relative relocs are always against the current section. */
3226 if (symbol_ptr == NULL)
3228 switch (fix->fx_r_type)
3230 case BFD_RELOC_SH_PCRELIMM8BY2:
3231 case BFD_RELOC_SH_PCRELIMM8BY4:
3232 case BFD_RELOC_SH_PCDISP8BY2:
3233 case BFD_RELOC_SH_PCDISP12BY2:
3234 case BFD_RELOC_SH_USES:
3235 symbol_ptr = seg->dot;
3242 if (fix->fx_r_type == BFD_RELOC_SH_USES)
3244 /* We can't store the offset in the object file, since this
3245 reloc does not take up any space, so we store it in r_offset.
3246 The fx_addnumber field was set in md_apply_fix. */
3247 intr->r_offset = fix->fx_addnumber;
3249 else if (fix->fx_r_type == BFD_RELOC_SH_COUNT)
3251 /* We can't store the count in the object file, since this reloc
3252 does not take up any space, so we store it in r_offset. The
3253 fx_offset field was set when the fixup was created in
3254 sh_coff_frob_file. */
3255 intr->r_offset = fix->fx_offset;
3256 /* This reloc is always absolute. */
3259 else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN)
3261 /* Store the alignment in the r_offset field. */
3262 intr->r_offset = fix->fx_offset;
3263 /* This reloc is always absolute. */
3266 else if (fix->fx_r_type == BFD_RELOC_SH_CODE
3267 || fix->fx_r_type == BFD_RELOC_SH_DATA
3268 || fix->fx_r_type == BFD_RELOC_SH_LABEL)
3270 /* These relocs are always absolute. */
3274 /* Turn the segment of the symbol into an offset. */
3275 if (symbol_ptr != NULL)
3277 dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot;
3279 intr->r_symndx = dot->sy_number;
3281 intr->r_symndx = symbol_ptr->sy_number;
3284 intr->r_symndx = -1;
3287 #endif /* OBJ_COFF */
3288 #endif /* ! BFD_ASSEMBLER */
3290 #ifdef BFD_ASSEMBLER
3292 /* Create a reloc. */
3295 tc_gen_reloc (section, fixp)
3296 asection *section ATTRIBUTE_UNUSED;
3300 bfd_reloc_code_real_type r_type;
3302 rel = (arelent *) xmalloc (sizeof (arelent));
3303 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
3304 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
3305 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
3307 r_type = fixp->fx_r_type;
3309 if (SWITCH_TABLE (fixp))
3311 rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy);
3312 if (r_type == BFD_RELOC_16)
3313 r_type = BFD_RELOC_SH_SWITCH16;
3314 else if (r_type == BFD_RELOC_8)
3315 r_type = BFD_RELOC_8_PCREL;
3316 else if (r_type == BFD_RELOC_32)
3317 r_type = BFD_RELOC_SH_SWITCH32;
3321 else if (r_type == BFD_RELOC_SH_USES)
3322 rel->addend = fixp->fx_addnumber;
3323 else if (r_type == BFD_RELOC_SH_COUNT)
3324 rel->addend = fixp->fx_offset;
3325 else if (r_type == BFD_RELOC_SH_ALIGN)
3326 rel->addend = fixp->fx_offset;
3327 else if (r_type == BFD_RELOC_VTABLE_INHERIT
3328 || r_type == BFD_RELOC_VTABLE_ENTRY)
3329 rel->addend = fixp->fx_offset;
3330 else if (r_type == BFD_RELOC_SH_LOOP_START
3331 || r_type == BFD_RELOC_SH_LOOP_END)
3332 rel->addend = fixp->fx_offset;
3333 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
3336 rel->address = rel->addend = fixp->fx_offset;
3338 else if (fixp->fx_pcrel)
3339 rel->addend = fixp->fx_addnumber;
3340 else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF)
3341 rel->addend = fixp->fx_addnumber;
3345 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
3346 if (rel->howto == NULL)
3348 as_bad_where (fixp->fx_file, fixp->fx_line,
3349 _("Cannot represent relocation type %s"),
3350 bfd_get_reloc_code_name (r_type));
3351 /* Set howto to a garbage value so that we can keep going. */
3352 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3353 assert (rel->howto != NULL);
3359 #endif /* BFD_ASSEMBLER */