1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
28 #include "opcodes/sh-opc.h"
30 #include "struc-symbol.h"
36 const char comment_chars[] = "!";
37 const char line_separator_chars[] = ";";
38 const char line_comment_chars[] = "!#";
40 static void s_uses PARAMS ((int));
42 static void sh_count_relocs PARAMS ((bfd *, segT, PTR));
43 static void sh_frob_section PARAMS ((bfd *, segT, PTR));
46 void s_align_bytes ();
47 static void s_uacons PARAMS ((int));
48 static sh_opcode_info *find_cooked_opcode PARAMS ((char **));
49 static void assemble_ppi PARAMS ((char *, sh_opcode_info *));
55 int ignore ATTRIBUTE_UNUSED;
58 target_big_endian = 0;
61 /* This table describes all the machine specific pseudo-ops the assembler
62 has to support. The fields are:
63 pseudo-op name without dot
64 function to call to execute this pseudo-op
65 Integer arg to pass to the function. */
67 const pseudo_typeS md_pseudo_table[] =
71 {"form", listing_psize, 0},
72 {"little", little, 0},
73 {"heading", listing_title, 0},
74 {"import", s_ignore, 0},
75 {"page", listing_eject, 0},
76 {"program", s_ignore, 0},
78 {"uaword", s_uacons, 2},
79 {"ualong", s_uacons, 4},
83 /*int md_reloc_size; */
85 int sh_relax; /* set if -relax seen */
87 /* Whether -small was seen. */
91 /* Whether -dsp was seen. */
95 /* The bit mask of architectures that could
96 accomodate the insns seen so far. */
97 static int valid_arch;
99 const char EXP_CHARS[] = "eE";
101 /* Chars that mean this number is a floating point constant. */
104 const char FLT_CHARS[] = "rRsSfFdDxXpP";
106 #define C(a,b) ENCODE_RELAX(a,b)
108 #define JREG 14 /* Register used as a temp when relaxing */
109 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
110 #define GET_WHAT(x) ((x>>4))
112 /* These are the three types of relaxable instrction. */
114 #define COND_JUMP_DELAY 2
115 #define UNCOND_JUMP 3
124 #define UNDEF_WORD_DISP 4
129 /* Branch displacements are from the address of the branch plus
130 four, thus all minimum and maximum values have 4 added to them. */
133 #define COND8_LENGTH 2
135 /* There is one extra instruction before the branch, so we must add
136 two more bytes to account for it. */
137 #define COND12_F 4100
138 #define COND12_M -4090
139 #define COND12_LENGTH 6
141 #define COND12_DELAY_LENGTH 4
143 /* ??? The minimum and maximum values are wrong, but this does not matter
144 since this relocation type is not supported yet. */
145 #define COND32_F (1<<30)
146 #define COND32_M -(1<<30)
147 #define COND32_LENGTH 14
149 #define UNCOND12_F 4098
150 #define UNCOND12_M -4092
151 #define UNCOND12_LENGTH 2
153 /* ??? The minimum and maximum values are wrong, but this does not matter
154 since this relocation type is not supported yet. */
155 #define UNCOND32_F (1<<30)
156 #define UNCOND32_M -(1<<30)
157 #define UNCOND32_LENGTH 14
159 #define EMPTY { 0, 0, 0, 0 }
161 const relax_typeS md_relax_table[C (END, 0)] = {
162 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
163 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
166 /* C (COND_JUMP, COND8) */
167 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
168 /* C (COND_JUMP, COND12) */
169 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
170 /* C (COND_JUMP, COND32) */
171 { COND32_F, COND32_M, COND32_LENGTH, 0, },
172 EMPTY, EMPTY, EMPTY, EMPTY,
173 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
176 /* C (COND_JUMP_DELAY, COND8) */
177 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
178 /* C (COND_JUMP_DELAY, COND12) */
179 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
180 /* C (COND_JUMP_DELAY, COND32) */
181 { COND32_F, COND32_M, COND32_LENGTH, 0, },
182 EMPTY, EMPTY, EMPTY, EMPTY,
183 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
186 /* C (UNCOND_JUMP, UNCOND12) */
187 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
188 /* C (UNCOND_JUMP, UNCOND32) */
189 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
190 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
191 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
196 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
198 /* This function is called once, at assembler startup time. This should
199 set up all the tables, etc that the MD part of the assembler needs. */
204 sh_opcode_info *opcode;
205 char *prev_name = "";
209 /* The WinCE OS only supports little endian executables. */
210 target_big_endian = 0;
213 target_big_endian = 1;
216 target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up);
217 valid_arch = target_arch;
219 opcode_hash_control = hash_new ();
221 /* Insert unique names into hash table. */
222 for (opcode = sh_table; opcode->name; opcode++)
224 if (strcmp (prev_name, opcode->name))
226 if (! (opcode->arch & target_arch))
228 prev_name = opcode->name;
229 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
233 /* Make all the opcodes with the same name point to the same
235 opcode->name = prev_name;
242 static int reg_x, reg_y;
250 expressionS immediate;
254 #define IDENT_CHAR(c) (isalnum (c) || (c) == '_')
256 /* Try to parse a reg name. Return the number of chars consumed. */
259 parse_reg (src, mode, reg)
264 /* We use ! IDENT_CHAR for the next character after the register name, to
265 make sure that we won't accidentally recognize a symbol name such as
266 'sram' or sr_ram as being a reference to the register 'sr'. */
272 if (src[2] >= '0' && src[2] <= '5'
273 && ! IDENT_CHAR ((unsigned char) src[3]))
276 *reg = 10 + src[2] - '0';
280 if (src[1] >= '0' && src[1] <= '9'
281 && ! IDENT_CHAR ((unsigned char) src[2]))
284 *reg = (src[1] - '0');
287 if (src[1] >= '0' && src[1] <= '7' && strncmp (&src[2], "_bank", 5) == 0
288 && ! IDENT_CHAR ((unsigned char) src[7]))
291 *reg = (src[1] - '0');
295 if (src[1] == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
300 if (src[1] == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
311 if (! IDENT_CHAR ((unsigned char) src[2]))
317 if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
326 if (! IDENT_CHAR ((unsigned char) src[2]))
332 if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
340 if (src[1] == 'x' && src[2] >= '0' && src[2] <= '1'
341 && ! IDENT_CHAR ((unsigned char) src[3]))
344 *reg = 4 + (src[1] - '0');
347 if (src[1] == 'y' && src[2] >= '0' && src[2] <= '1'
348 && ! IDENT_CHAR ((unsigned char) src[3]))
351 *reg = 6 + (src[1] - '0');
354 if (src[1] == 's' && src[2] >= '0' && src[2] <= '3'
355 && ! IDENT_CHAR ((unsigned char) src[3]))
357 int n = src[1] - '0';
360 *reg = n | ((~n & 2) << 1);
365 if (src[0] == 'i' && src[1] && ! IDENT_CHAR ((unsigned char) src[3]))
387 if (src[0] == 'x' && src[1] >= '0' && src[1] <= '1'
388 && ! IDENT_CHAR ((unsigned char) src[2]))
391 *reg = A_X0_NUM + src[1] - '0';
395 if (src[0] == 'y' && src[1] >= '0' && src[1] <= '1'
396 && ! IDENT_CHAR ((unsigned char) src[2]))
399 *reg = A_Y0_NUM + src[1] - '0';
403 if (src[0] == 'm' && src[1] >= '0' && src[1] <= '1'
404 && ! IDENT_CHAR ((unsigned char) src[2]))
407 *reg = src[1] == '0' ? A_M0_NUM : A_M1_NUM;
413 && src[2] == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
419 if (src[0] == 's' && src[1] == 'p' && src[2] == 'c'
420 && ! IDENT_CHAR ((unsigned char) src[3]))
426 if (src[0] == 's' && src[1] == 'g' && src[2] == 'r'
427 && ! IDENT_CHAR ((unsigned char) src[3]))
433 if (src[0] == 'd' && src[1] == 's' && src[2] == 'r'
434 && ! IDENT_CHAR ((unsigned char) src[3]))
440 if (src[0] == 'd' && src[1] == 'b' && src[2] == 'r'
441 && ! IDENT_CHAR ((unsigned char) src[3]))
447 if (src[0] == 's' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
453 if (src[0] == 's' && src[1] == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
460 if (src[0] == 'p' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
465 if (src[0] == 'p' && src[1] == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
467 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
468 and use an uninitialized immediate. */
472 if (src[0] == 'g' && src[1] == 'b' && src[2] == 'r'
473 && ! IDENT_CHAR ((unsigned char) src[3]))
478 if (src[0] == 'v' && src[1] == 'b' && src[2] == 'r'
479 && ! IDENT_CHAR ((unsigned char) src[3]))
485 if (src[0] == 'm' && src[1] == 'a' && src[2] == 'c'
486 && ! IDENT_CHAR ((unsigned char) src[4]))
499 if (src[0] == 'm' && src[1] == 'o' && src[2] == 'd'
500 && ! IDENT_CHAR ((unsigned char) src[4]))
505 if (src[0] == 'f' && src[1] == 'r')
509 if (src[3] >= '0' && src[3] <= '5'
510 && ! IDENT_CHAR ((unsigned char) src[4]))
513 *reg = 10 + src[3] - '0';
517 if (src[2] >= '0' && src[2] <= '9'
518 && ! IDENT_CHAR ((unsigned char) src[3]))
521 *reg = (src[2] - '0');
525 if (src[0] == 'd' && src[1] == 'r')
529 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
530 && ! IDENT_CHAR ((unsigned char) src[4]))
533 *reg = 10 + src[3] - '0';
537 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
538 && ! IDENT_CHAR ((unsigned char) src[3]))
541 *reg = (src[2] - '0');
545 if (src[0] == 'x' && src[1] == 'd')
549 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
550 && ! IDENT_CHAR ((unsigned char) src[4]))
553 *reg = 11 + src[3] - '0';
557 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
558 && ! IDENT_CHAR ((unsigned char) src[3]))
561 *reg = (src[2] - '0') + 1;
565 if (src[0] == 'f' && src[1] == 'v')
567 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
573 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
574 && ! IDENT_CHAR ((unsigned char) src[3]))
577 *reg = (src[2] - '0');
581 if (src[0] == 'f' && src[1] == 'p' && src[2] == 'u' && src[3] == 'l'
582 && ! IDENT_CHAR ((unsigned char) src[4]))
588 if (src[0] == 'f' && src[1] == 'p' && src[2] == 's' && src[3] == 'c'
589 && src[4] == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
595 if (src[0] == 'x' && src[1] == 'm' && src[2] == 't' && src[3] == 'r'
596 && src[4] == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
605 static symbolS *dot()
609 /* JF: '.' is pseudo symbol with value of current location
610 in current segment. */
611 fake = FAKE_LABEL_NAME;
612 return symbol_new (fake,
614 (valueT) frag_now_fix (),
629 save = input_line_pointer;
630 input_line_pointer = s;
631 expression (&op->immediate);
632 if (op->immediate.X_op == O_absent)
633 as_bad (_("missing operand"));
634 new = input_line_pointer;
635 input_line_pointer = save;
640 /* The many forms of operand:
643 @Rn Register indirect
656 pr, gbr, vbr, macl, mach
671 /* Must be predecrement. */
674 len = parse_reg (src, &mode, &(op->reg));
676 as_bad (_("illegal register after @-"));
681 else if (src[0] == '(')
683 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
686 len = parse_reg (src, &mode, &(op->reg));
687 if (len && mode == A_REG_N)
692 as_bad (_("must be @(r0,...)"));
696 /* Now can be rn or gbr */
697 len = parse_reg (src, &mode, &(op->reg));
702 else if (mode == A_REG_N)
704 op->type = A_IND_R0_REG_N;
708 as_bad (_("syntax error in @(r0,...)"));
713 /* Must be an @(disp,.. thing) */
714 src = parse_exp (src, op);
717 /* Now can be rn, gbr or pc */
718 len = parse_reg (src, &mode, &op->reg);
723 op->type = A_DISP_REG_N;
725 else if (mode == A_GBR)
727 op->type = A_DISP_GBR;
729 else if (mode == A_PC)
731 /* Turn a plain @(4,pc) into @(.+4,pc) */
732 if (op->immediate.X_op == O_constant) {
733 op->immediate.X_add_symbol = dot();
734 op->immediate.X_op = O_symbol;
736 op->type = A_DISP_PC;
740 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
745 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
750 as_bad (_("expecting )"));
756 src += parse_reg (src, &mode, &(op->reg));
759 as_bad (_("illegal register after @"));
764 if ((src[0] == 'r' && src[1] == '8')
765 || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's')))
770 if ((src[0] == 'r' && src[1] == '9')
771 || (src[0] == 'i' && src[1] == 'y'))
774 op->type = A_PMODY_N;
788 get_operand (ptr, op)
799 *ptr = parse_exp (src, op);
804 else if (src[0] == '@')
806 *ptr = parse_at (src, op);
809 len = parse_reg (src, &mode, &(op->reg));
818 /* Not a reg, the only thing left is a displacement. */
819 *ptr = parse_exp (src, op);
820 op->type = A_DISP_PC;
827 get_operands (info, args, operand)
828 sh_opcode_info *info;
830 sh_operand_info *operand;
835 /* The pre-processor will eliminate whitespace in front of '@'
836 after the first argument; we may be called multiple times
837 from assemble_ppi, so don't insist on finding whitespace here. */
841 get_operand (&ptr, operand + 0);
848 get_operand (&ptr, operand + 1);
849 /* ??? Hack: psha/pshl have a varying operand number depending on
850 the type of the first operand. We handle this by having the
851 three-operand version first and reducing the number of operands
852 parsed to two if we see that the first operand is an immediate.
853 This works because no insn with three operands has an immediate
855 if (info->arg[2] && operand[0].type != A_IMM)
861 get_operand (&ptr, operand + 2);
883 /* Passed a pointer to a list of opcodes which use different
884 addressing modes, return the opcode which matches the opcodes
889 get_specific (opcode, operands)
890 sh_opcode_info *opcode;
891 sh_operand_info *operands;
893 sh_opcode_info *this_try = opcode;
894 char *name = opcode->name;
899 if (this_try->name != name)
901 /* We've looked so far down the table that we've run out of
902 opcodes with the same name. */
906 /* Look at both operands needed by the opcodes and provided by
907 the user - since an arg test will often fail on the same arg
908 again and again, we'll try and test the last failing arg the
909 first on each opcode try. */
910 for (n = 0; this_try->arg[n]; n++)
912 sh_operand_info *user = operands + n;
913 sh_arg_type arg = this_try->arg[n];
925 if (user->type != arg)
929 /* opcode needs r0 */
930 if (user->type != A_REG_N || user->reg != 0)
934 if (user->type != A_R0_GBR || user->reg != 0)
938 if (user->type != F_REG_N || user->reg != 0)
957 /* Opcode needs rn */
958 if (user->type != arg)
963 if (user->type != D_REG_N && user->type != X_REG_N)
978 if (user->type != arg)
983 if (user->type != arg)
995 /* Opcode needs rn */
996 if (user->type != arg - A_REG_M + A_REG_N)
1002 if (user->type != DSP_REG_N)
1024 if (user->type != DSP_REG_N)
1046 if (user->type != DSP_REG_N)
1068 if (user->type != DSP_REG_N)
1090 if (user->type != DSP_REG_N)
1112 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
1116 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
1120 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
1124 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
1128 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
1138 /* Opcode needs rn */
1139 if (user->type != arg - F_REG_M + F_REG_N)
1144 if (user->type != D_REG_N && user->type != X_REG_N)
1149 if (user->type != XMTRX_M4)
1155 printf (_("unhandled %d\n"), arg);
1159 if ( !(valid_arch & this_try->arch))
1161 valid_arch &= this_try->arch;
1170 check (operand, low, high)
1171 expressionS *operand;
1175 if (operand->X_op != O_constant
1176 || operand->X_add_number < low
1177 || operand->X_add_number > high)
1179 as_bad (_("operand must be absolute in range %d..%d"), low, high);
1181 return operand->X_add_number;
1186 insert (where, how, pcrel, op)
1190 sh_operand_info *op;
1192 fix_new_exp (frag_now,
1193 where - frag_now->fr_literal,
1201 build_relax (opcode, op)
1202 sh_opcode_info *opcode;
1203 sh_operand_info *op;
1205 int high_byte = target_big_endian ? 0 : 1;
1208 if (opcode->arg[0] == A_BDISP8)
1210 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
1211 p = frag_var (rs_machine_dependent,
1212 md_relax_table[C (what, COND32)].rlx_length,
1213 md_relax_table[C (what, COND8)].rlx_length,
1215 op->immediate.X_add_symbol,
1216 op->immediate.X_add_number,
1218 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
1220 else if (opcode->arg[0] == A_BDISP12)
1222 p = frag_var (rs_machine_dependent,
1223 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
1224 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
1226 op->immediate.X_add_symbol,
1227 op->immediate.X_add_number,
1229 p[high_byte] = (opcode->nibbles[0] << 4);
1234 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1237 insert_loop_bounds (output, operand)
1239 sh_operand_info *operand;
1244 /* Since the low byte of the opcode will be overwritten by the reloc, we
1245 can just stash the high byte into both bytes and ignore endianness. */
1248 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1249 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1253 static int count = 0;
1255 /* If the last loop insn is a two-byte-insn, it is in danger of being
1256 swapped with the insn after it. To prevent this, create a new
1257 symbol - complete with SH_LABEL reloc - after the last loop insn.
1258 If the last loop insn is four bytes long, the symbol will be
1259 right in the middle, but four byte insns are not swapped anyways. */
1260 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1261 Hence a 9 digit number should be enough to count all REPEATs. */
1263 sprintf (name, "_R%x", count++ & 0x3fffffff);
1264 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag);
1265 /* Make this a local symbol. */
1267 SF_SET_LOCAL (end_sym);
1268 #endif /* OBJ_COFF */
1269 symbol_table_insert (end_sym);
1270 end_sym->sy_value = operand[1].immediate;
1271 end_sym->sy_value.X_add_number += 2;
1272 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
1275 output = frag_more (2);
1278 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1279 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1281 return frag_more (2);
1284 /* Now we know what sort of opcodes it is, let's build the bytes. */
1287 build_Mytes (opcode, operand)
1288 sh_opcode_info *opcode;
1289 sh_operand_info *operand;
1294 char *output = frag_more (2);
1295 int low_byte = target_big_endian ? 1 : 0;
1301 for (index = 0; index < 4; index++)
1303 sh_nibble_type i = opcode->nibbles[index];
1313 nbuf[index] = reg_n;
1316 nbuf[index] = reg_m;
1319 if (reg_n < 2 || reg_n > 5)
1320 as_bad (_("Invalid register: 'r%d'"), reg_n);
1321 nbuf[index] = (reg_n & 3) | 4;
1324 nbuf[index] = reg_n | (reg_m >> 2);
1327 nbuf[index] = reg_b | 0x08;
1330 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
1333 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
1336 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
1339 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
1342 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
1345 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
1348 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
1351 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
1354 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
1357 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
1360 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
1363 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
1366 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1, operand);
1369 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1, operand);
1372 output = insert_loop_bounds (output, operand);
1373 nbuf[index] = opcode->nibbles[3];
1377 printf (_("failed for %d\n"), i);
1381 if (! target_big_endian) {
1382 output[1] = (nbuf[0] << 4) | (nbuf[1]);
1383 output[0] = (nbuf[2] << 4) | (nbuf[3]);
1386 output[0] = (nbuf[0] << 4) | (nbuf[1]);
1387 output[1] = (nbuf[2] << 4) | (nbuf[3]);
1391 /* Find an opcode at the start of *STR_P in the hash table, and set
1392 *STR_P to the first character after the last one read. */
1394 static sh_opcode_info *
1395 find_cooked_opcode (str_p)
1399 unsigned char *op_start;
1400 unsigned char *op_end;
1404 /* Drop leading whitespace. */
1408 /* Find the op code end.
1409 The pre-processor will eliminate whitespace in front of
1410 any '@' after the first argument; we may be called from
1411 assemble_ppi, so the opcode might be terminated by an '@'. */
1412 for (op_start = op_end = (unsigned char *) (str);
1415 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
1418 unsigned char c = op_start[nlen];
1420 /* The machine independent code will convert CMP/EQ into cmp/EQ
1421 because it thinks the '/' is the end of the symbol. Moreover,
1422 all but the first sub-insn is a parallel processing insn won't
1423 be capitailzed. Instead of hacking up the machine independent
1424 code, we just deal with it here. */
1425 c = isupper (c) ? tolower (c) : c;
1434 as_bad (_("can't find opcode "));
1436 return (sh_opcode_info *) hash_find (opcode_hash_control, name);
1439 /* Assemble a parallel processing insn. */
1440 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1443 assemble_ppi (op_end, opcode)
1445 sh_opcode_info *opcode;
1454 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1455 Make sure we encode a defined insn pattern. */
1461 sh_operand_info operand[3];
1463 if (opcode->arg[0] != A_END)
1464 op_end = get_operands (opcode, op_end, operand);
1465 opcode = get_specific (opcode, operand);
1468 /* Couldn't find an opcode which matched the operands. */
1469 char *where = frag_more (2);
1473 as_bad (_("invalid operands for opcode"));
1477 if (opcode->nibbles[0] != PPI)
1478 as_bad (_("insn can't be combined with parallel processing insn"));
1480 switch (opcode->nibbles[1])
1485 as_bad (_("multiple movx specifications"));
1490 as_bad (_("multiple movy specifications"));
1496 as_bad (_("multiple movx specifications"));
1497 if (reg_n < 4 || reg_n > 5)
1498 as_bad (_("invalid movx address register"));
1499 if (opcode->nibbles[2] & 8)
1501 if (reg_m == A_A1_NUM)
1503 else if (reg_m != A_A0_NUM)
1504 as_bad (_("invalid movx dsp register"));
1509 as_bad (_("invalid movx dsp register"));
1512 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
1517 as_bad (_("multiple movy specifications"));
1518 if (opcode->nibbles[2] & 8)
1520 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1523 if (reg_m == A_A1_NUM)
1525 else if (reg_m != A_A0_NUM)
1526 as_bad (_("invalid movy dsp register"));
1531 as_bad (_("invalid movy dsp register"));
1534 if (reg_n < 6 || reg_n > 7)
1535 as_bad (_("invalid movy address register"));
1536 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
1540 if (operand[0].immediate.X_op != O_constant)
1541 as_bad (_("dsp immediate shift value not constant"));
1542 field_b = ((opcode->nibbles[2] << 12)
1543 | (operand[0].immediate.X_add_number & 127) << 4
1548 as_bad (_("multiple parallel processing specifications"));
1549 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
1550 + (reg_x << 6) + (reg_y << 4) + reg_n);
1554 as_bad (_("multiple condition specifications"));
1555 cond = opcode->nibbles[2] << 8;
1557 goto skip_cond_check;
1561 as_bad (_("multiple parallel processing specifications"));
1562 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
1563 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
1569 if ((field_b & 0xef00) != 0xa100)
1570 as_bad (_("insn cannot be combined with pmuls"));
1572 switch (field_b & 0xf)
1575 field_b += 0 - A_X0_NUM;
1578 field_b += 1 - A_Y0_NUM;
1581 field_b += 2 - A_A0_NUM;
1584 field_b += 3 - A_A1_NUM;
1587 as_bad (_("bad padd / psub pmuls output operand"));
1590 field_b += 0x4000 + reg_efg;
1597 as_bad (_("condition not followed by conditionalizable insn"));
1603 opcode = find_cooked_opcode (&op_end);
1607 (_("unrecognized characters at end of parallel processing insn")));
1612 move_code = movx | movy;
1615 /* Parallel processing insn. */
1616 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
1618 output = frag_more (4);
1619 if (! target_big_endian)
1621 output[3] = ppi_code >> 8;
1622 output[2] = ppi_code;
1626 output[2] = ppi_code >> 8;
1627 output[3] = ppi_code;
1629 move_code |= 0xf800;
1632 /* Just a double data transfer. */
1633 output = frag_more (2);
1634 if (! target_big_endian)
1636 output[1] = move_code >> 8;
1637 output[0] = move_code;
1641 output[0] = move_code >> 8;
1642 output[1] = move_code;
1646 /* This is the guts of the machine-dependent assembler. STR points to a
1647 machine dependent instruction. This function is supposed to emit
1648 the frags/bytes it assembles to. */
1654 unsigned char *op_end;
1655 sh_operand_info operand[3];
1656 sh_opcode_info *opcode;
1658 opcode = find_cooked_opcode (&str);
1663 as_bad (_("unknown opcode"));
1668 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
1670 /* Output a CODE reloc to tell the linker that the following
1671 bytes are instructions, not data. */
1672 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
1674 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
1677 if (opcode->nibbles[0] == PPI)
1679 assemble_ppi (op_end, opcode);
1683 if (opcode->arg[0] == A_BDISP12
1684 || opcode->arg[0] == A_BDISP8)
1686 parse_exp (op_end + 1, &operand[0]);
1687 build_relax (opcode, &operand[0]);
1691 if (opcode->arg[0] == A_END)
1693 /* Ignore trailing whitespace. If there is any, it has already
1694 been compressed to a single space. */
1700 op_end = get_operands (opcode, op_end, operand);
1702 opcode = get_specific (opcode, operand);
1706 /* Couldn't find an opcode which matched the operands. */
1707 char *where = frag_more (2);
1711 as_bad (_("invalid operands for opcode"));
1716 as_bad (_("excess operands: '%s'"), op_end);
1718 build_Mytes (opcode, operand);
1723 /* This routine is called each time a label definition is seen. It
1724 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1729 static fragS *last_label_frag;
1730 static int last_label_offset;
1733 && seg_info (now_seg)->tc_segment_info_data.in_code)
1737 offset = frag_now_fix ();
1738 if (frag_now != last_label_frag
1739 || offset != last_label_offset)
1741 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
1742 last_label_frag = frag_now;
1743 last_label_offset = offset;
1748 /* This routine is called when the assembler is about to output some
1749 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1752 sh_flush_pending_output ()
1755 && seg_info (now_seg)->tc_segment_info_data.in_code)
1757 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
1759 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
1764 md_undefined_symbol (name)
1771 #ifndef BFD_ASSEMBLER
1774 tc_crawl_symbol_chain (headers)
1775 object_headers *headers;
1777 printf (_("call to tc_crawl_symbol_chain \n"));
1781 tc_headers_hook (headers)
1782 object_headers *headers;
1784 printf (_("call to tc_headers_hook \n"));
1790 /* Various routines to kill one day. */
1791 /* Equal to MAX_PRECISION in atof-ieee.c. */
1792 #define MAX_LITTLENUMS 6
1794 /* Turn a string in input_line_pointer into a floating point constant
1795 of type TYPE, and store the appropriate bytes in *LITP. The number
1796 of LITTLENUMS emitted is stored in *SIZEP . An error message is
1797 returned, or NULL on OK. */
1800 md_atof (type, litP, sizeP)
1806 LITTLENUM_TYPE words[4];
1822 return _("bad call to md_atof");
1825 t = atof_ieee (input_line_pointer, type, words);
1827 input_line_pointer = t;
1831 if (! target_big_endian)
1833 for (i = prec - 1; i >= 0; i--)
1835 md_number_to_chars (litP, (valueT) words[i], 2);
1841 for (i = 0; i < prec; i++)
1843 md_number_to_chars (litP, (valueT) words[i], 2);
1851 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
1852 call instruction. It refers to a label of the instruction which
1853 loads the register which the call uses. We use it to generate a
1854 special reloc for the linker. */
1858 int ignore ATTRIBUTE_UNUSED;
1863 as_warn (_(".uses pseudo-op seen when not relaxing"));
1867 if (ex.X_op != O_symbol || ex.X_add_number != 0)
1869 as_bad (_("bad .uses format"));
1870 ignore_rest_of_line ();
1874 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
1876 demand_empty_rest_of_line ();
1879 CONST char *md_shortopts = "";
1880 struct option md_longopts[] =
1882 #define OPTION_RELAX (OPTION_MD_BASE)
1883 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
1884 #define OPTION_SMALL (OPTION_LITTLE + 1)
1885 #define OPTION_DSP (OPTION_SMALL + 1)
1887 {"relax", no_argument, NULL, OPTION_RELAX},
1888 {"little", no_argument, NULL, OPTION_LITTLE},
1889 {"small", no_argument, NULL, OPTION_SMALL},
1890 {"dsp", no_argument, NULL, OPTION_DSP},
1891 {NULL, no_argument, NULL, 0}
1893 size_t md_longopts_size = sizeof(md_longopts);
1896 md_parse_option (c, arg)
1898 char *arg ATTRIBUTE_UNUSED;
1908 target_big_endian = 0;
1927 md_show_usage (stream)
1930 fprintf(stream, _("\
1932 -little generate little endian code\n\
1933 -relax alter jump instructions for long displacements\n\
1934 -small align sections to 4 byte boundaries, not 16\n\
1935 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
1939 tc_Nout_fix_to_chars ()
1941 printf (_("call to tc_Nout_fix_to_chars \n"));
1945 /* This struct is used to pass arguments to sh_count_relocs through
1946 bfd_map_over_sections. */
1948 struct sh_count_relocs
1950 /* Symbol we are looking for. */
1952 /* Count of relocs found. */
1956 /* Count the number of fixups in a section which refer to a particular
1957 symbol. When using BFD_ASSEMBLER, this is called via
1958 bfd_map_over_sections. */
1962 sh_count_relocs (abfd, sec, data)
1963 bfd *abfd ATTRIBUTE_UNUSED;
1967 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
1968 segment_info_type *seginfo;
1972 seginfo = seg_info (sec);
1973 if (seginfo == NULL)
1977 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
1979 if (fix->fx_addsy == sym)
1987 /* Handle the count relocs for a particular section. When using
1988 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
1992 sh_frob_section (abfd, sec, ignore)
1993 bfd *abfd ATTRIBUTE_UNUSED;
1995 PTR ignore ATTRIBUTE_UNUSED;
1997 segment_info_type *seginfo;
2000 seginfo = seg_info (sec);
2001 if (seginfo == NULL)
2004 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2009 struct sh_count_relocs info;
2011 if (fix->fx_r_type != BFD_RELOC_SH_USES)
2014 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2015 symbol in the same section. */
2016 sym = fix->fx_addsy;
2018 || fix->fx_subsy != NULL
2019 || fix->fx_addnumber != 0
2020 || S_GET_SEGMENT (sym) != sec
2021 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2022 || S_GET_STORAGE_CLASS (sym) == C_EXT
2024 || S_IS_EXTERNAL (sym))
2026 as_warn_where (fix->fx_file, fix->fx_line,
2027 _(".uses does not refer to a local symbol in the same section"));
2031 /* Look through the fixups again, this time looking for one
2032 at the same location as sym. */
2033 val = S_GET_VALUE (sym);
2034 for (fscan = seginfo->fix_root;
2036 fscan = fscan->fx_next)
2037 if (val == fscan->fx_frag->fr_address + fscan->fx_where
2038 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
2039 && fscan->fx_r_type != BFD_RELOC_SH_CODE
2040 && fscan->fx_r_type != BFD_RELOC_SH_DATA
2041 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
2045 as_warn_where (fix->fx_file, fix->fx_line,
2046 _("can't find fixup pointed to by .uses"));
2050 if (fscan->fx_tcbit)
2052 /* We've already done this one. */
2056 /* The variable fscan should also be a fixup to a local symbol
2057 in the same section. */
2058 sym = fscan->fx_addsy;
2060 || fscan->fx_subsy != NULL
2061 || fscan->fx_addnumber != 0
2062 || S_GET_SEGMENT (sym) != sec
2063 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2064 || S_GET_STORAGE_CLASS (sym) == C_EXT
2066 || S_IS_EXTERNAL (sym))
2068 as_warn_where (fix->fx_file, fix->fx_line,
2069 _(".uses target does not refer to a local symbol in the same section"));
2073 /* Now we look through all the fixups of all the sections,
2074 counting the number of times we find a reference to sym. */
2077 #ifdef BFD_ASSEMBLER
2078 bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info);
2083 for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
2084 sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info);
2091 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2092 We have already adjusted the value of sym to include the
2093 fragment address, so we undo that adjustment here. */
2094 subseg_change (sec, 0);
2095 fix_new (symbol_get_frag (sym),
2096 S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address,
2097 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
2101 /* This function is called after the symbol table has been completed,
2102 but before the relocs or section contents have been written out.
2103 If we have seen any .uses pseudo-ops, they point to an instruction
2104 which loads a register with the address of a function. We look
2105 through the fixups to find where the function address is being
2106 loaded from. We then generate a COUNT reloc giving the number of
2107 times that function address is referred to. The linker uses this
2108 information when doing relaxing, to decide when it can eliminate
2109 the stored function address entirely. */
2117 #ifdef BFD_ASSEMBLER
2118 bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL);
2123 for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
2124 sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL);
2129 /* Called after relaxing. Set the correct sizes of the fragments, and
2130 create relocs so that md_apply_fix will fill in the correct values. */
2133 md_convert_frag (headers, seg, fragP)
2134 #ifdef BFD_ASSEMBLER
2135 bfd *headers ATTRIBUTE_UNUSED;
2137 object_headers *headers;
2144 switch (fragP->fr_subtype)
2146 case C (COND_JUMP, COND8):
2147 case C (COND_JUMP_DELAY, COND8):
2148 subseg_change (seg, 0);
2149 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2150 1, BFD_RELOC_SH_PCDISP8BY2);
2155 case C (UNCOND_JUMP, UNCOND12):
2156 subseg_change (seg, 0);
2157 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2158 1, BFD_RELOC_SH_PCDISP12BY2);
2163 case C (UNCOND_JUMP, UNCOND32):
2164 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
2165 if (fragP->fr_symbol == NULL)
2166 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
2167 (unsigned long) fragP->fr_address);
2168 else if (S_IS_DEFINED (fragP->fr_symbol))
2169 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
2170 (unsigned long) fragP->fr_address,
2171 S_GET_NAME (fragP->fr_symbol));
2173 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
2174 (unsigned long) fragP->fr_address,
2175 S_GET_NAME (fragP->fr_symbol));
2177 #if 0 /* This code works, but generates poor code and the compiler
2178 should never produce a sequence that requires it to be used. */
2180 /* A jump wont fit in 12 bits, make code which looks like
2186 int t = buffer[0] & 0x10;
2188 buffer[highbyte] = 0xa0; /* branch over move and disp */
2189 buffer[lowbyte] = 3;
2190 buffer[highbyte+2] = 0xd0 | JREG; /* Build mov insn */
2191 buffer[lowbyte+2] = 0x00;
2193 buffer[highbyte+4] = 0; /* space for 32 bit jump disp */
2194 buffer[lowbyte+4] = 0;
2195 buffer[highbyte+6] = 0;
2196 buffer[lowbyte+6] = 0;
2198 buffer[highbyte+8] = 0x40 | JREG; /* Build jmp @JREG */
2199 buffer[lowbyte+8] = t ? 0xb : 0x2b;
2201 buffer[highbyte+10] = 0x20; /* build nop */
2202 buffer[lowbyte+10] = 0x0b;
2204 /* Make reloc for the long disp. */
2212 fragP->fr_fix += UNCOND32_LENGTH;
2219 case C (COND_JUMP, COND12):
2220 case C (COND_JUMP_DELAY, COND12):
2221 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2222 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2223 was due to gas incorrectly relaxing an out-of-range conditional
2224 branch with delay slot. It turned:
2225 bf.s L6 (slot mov.l r12,@(44,r0))
2228 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2230 32: 10 cb mov.l r12,@(44,r0)
2231 Therefore, branches with delay slots have to be handled
2232 differently from ones without delay slots. */
2234 unsigned char *buffer =
2235 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
2236 int highbyte = target_big_endian ? 0 : 1;
2237 int lowbyte = target_big_endian ? 1 : 0;
2238 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
2240 /* Toggle the true/false bit of the bcond. */
2241 buffer[highbyte] ^= 0x2;
2243 /* If this is a dalayed branch, we may not put the the bra in the
2244 slot. So we change it to a non-delayed branch, like that:
2245 b! cond slot_label; bra disp; slot_label: slot_insn
2246 ??? We should try if swapping the conditional branch and
2247 its delay-slot insn already makes the branch reach. */
2249 /* Build a relocation to six / four bytes farther on. */
2250 subseg_change (seg, 0);
2251 fix_new (fragP, fragP->fr_fix, 2,
2252 #ifdef BFD_ASSEMBLER
2253 section_symbol (seg),
2255 seg_info (seg)->dot,
2257 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
2258 1, BFD_RELOC_SH_PCDISP8BY2);
2260 /* Set up a jump instruction. */
2261 buffer[highbyte + 2] = 0xa0;
2262 buffer[lowbyte + 2] = 0;
2263 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
2264 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
2268 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
2273 /* Fill in a NOP instruction. */
2274 buffer[highbyte + 4] = 0x0;
2275 buffer[lowbyte + 4] = 0x9;
2284 case C (COND_JUMP, COND32):
2285 case C (COND_JUMP_DELAY, COND32):
2286 case C (COND_JUMP, UNDEF_WORD_DISP):
2287 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
2288 if (fragP->fr_symbol == NULL)
2289 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
2290 (unsigned long) fragP->fr_address);
2291 else if (S_IS_DEFINED (fragP->fr_symbol))
2292 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
2293 (unsigned long) fragP->fr_address,
2294 S_GET_NAME (fragP->fr_symbol));
2296 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
2297 (unsigned long) fragP->fr_address,
2298 S_GET_NAME (fragP->fr_symbol));
2300 #if 0 /* This code works, but generates poor code, and the compiler
2301 should never produce a sequence that requires it to be used. */
2303 /* A bcond won't fit and it won't go into a 12 bit
2304 displacement either, the code sequence looks like:
2313 buffer[0] ^= 0x2; /* Toggle T/F bit */
2315 buffer[1] = 5; /* branch over mov, jump, nop and ptr */
2316 buffer[2] = 0xd0 | JREG; /* Build mov insn */
2318 buffer[4] = 0x40 | JREG; /* Build jmp @JREG */
2320 buffer[6] = 0x20; /* build nop */
2322 buffer[8] = 0; /* space for 32 bit jump disp */
2328 /* Make reloc for the long disp */
2336 fragP->fr_fix += COND32_LENGTH;
2347 if (donerelax && !sh_relax)
2348 as_warn_where (fragP->fr_file, fragP->fr_line,
2349 _("overflow in branch to %s; converted into longer instruction sequence"),
2350 (fragP->fr_symbol != NULL
2351 ? S_GET_NAME (fragP->fr_symbol)
2356 md_section_align (seg, size)
2360 #ifdef BFD_ASSEMBLER
2363 #else /* ! OBJ_ELF */
2364 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
2365 & (-1 << bfd_get_section_alignment (stdoutput, seg)));
2366 #endif /* ! OBJ_ELF */
2367 #else /* ! BFD_ASSEMBLER */
2368 return ((size + (1 << section_alignment[(int) seg]) - 1)
2369 & (-1 << section_alignment[(int) seg]));
2370 #endif /* ! BFD_ASSEMBLER */
2373 /* This static variable is set by s_uacons to tell sh_cons_align that
2374 the expession does not need to be aligned. */
2376 static int sh_no_align_cons = 0;
2378 /* This handles the unaligned space allocation pseudo-ops, such as
2379 .uaword. .uaword is just like .word, but the value does not need
2386 /* Tell sh_cons_align not to align this value. */
2387 sh_no_align_cons = 1;
2391 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2392 aligned correctly. Note that this can cause warnings to be issued
2393 when assembling initialized structured which were declared with the
2394 packed attribute. FIXME: Perhaps we should require an option to
2395 enable this warning? */
2398 sh_cons_align (nbytes)
2404 if (sh_no_align_cons)
2406 /* This is an unaligned pseudo-op. */
2407 sh_no_align_cons = 0;
2412 while ((nbytes & 1) == 0)
2421 if (now_seg == absolute_section)
2423 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
2424 as_warn (_("misaligned data"));
2428 p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0,
2429 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
2431 record_alignment (now_seg, nalign);
2434 /* When relaxing, we need to output a reloc for any .align directive
2435 that requests alignment to a four byte boundary or larger. This is
2436 also where we check for misaligned data. */
2439 sh_handle_align (frag)
2443 && frag->fr_type == rs_align
2444 && frag->fr_address + frag->fr_fix > 0
2445 && frag->fr_offset > 1
2446 && now_seg != bss_section)
2447 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
2448 BFD_RELOC_SH_ALIGN);
2450 if (frag->fr_type == rs_align_code
2451 && frag->fr_next->fr_address - frag->fr_address - frag->fr_fix != 0)
2452 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
2455 /* This macro decides whether a particular reloc is an entry in a
2456 switch table. It is used when relaxing, because the linker needs
2457 to know about all such entries so that it can adjust them if
2460 #ifdef BFD_ASSEMBLER
2461 #define SWITCH_TABLE_CONS(fix) (0)
2463 #define SWITCH_TABLE_CONS(fix) \
2464 ((fix)->fx_r_type == 0 \
2465 && ((fix)->fx_size == 2 \
2466 || (fix)->fx_size == 1 \
2467 || (fix)->fx_size == 4))
2470 #define SWITCH_TABLE(fix) \
2471 ((fix)->fx_addsy != NULL \
2472 && (fix)->fx_subsy != NULL \
2473 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2474 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2475 && ((fix)->fx_r_type == BFD_RELOC_32 \
2476 || (fix)->fx_r_type == BFD_RELOC_16 \
2477 || (fix)->fx_r_type == BFD_RELOC_8 \
2478 || SWITCH_TABLE_CONS (fix)))
2480 /* See whether we need to force a relocation into the output file.
2481 This is used to force out switch and PC relative relocations when
2485 sh_force_relocation (fix)
2489 if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2490 || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2491 || fix->fx_r_type == BFD_RELOC_SH_LOOP_START
2492 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END)
2498 return (fix->fx_pcrel
2499 || SWITCH_TABLE (fix)
2500 || fix->fx_r_type == BFD_RELOC_SH_COUNT
2501 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
2502 || fix->fx_r_type == BFD_RELOC_SH_CODE
2503 || fix->fx_r_type == BFD_RELOC_SH_DATA
2504 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
2509 sh_fix_adjustable (fixP)
2513 if (fixP->fx_addsy == NULL)
2516 /* We need the symbol name for the VTABLE entries */
2517 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2518 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2525 sh_elf_final_processing ()
2529 /* Set file-specific flags to indicate if this code needs
2530 a processor with the sh-dsp / sh3e ISA to execute. */
2531 if (valid_arch & arch_sh1)
2533 else if (valid_arch & arch_sh2)
2535 else if (valid_arch & arch_sh_dsp)
2537 else if (valid_arch & arch_sh3)
2539 else if (valid_arch & arch_sh3_dsp)
2541 else if (valid_arch & arch_sh3e)
2543 else if (valid_arch & arch_sh4)
2548 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
2549 elf_elfheader (stdoutput)->e_flags |= val;
2553 /* Apply a fixup to the object file. */
2555 #ifdef BFD_ASSEMBLER
2557 md_apply_fix (fixP, valp)
2562 md_apply_fix (fixP, val)
2567 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2568 int lowbyte = target_big_endian ? 1 : 0;
2569 int highbyte = target_big_endian ? 0 : 1;
2570 #ifdef BFD_ASSEMBLER
2576 #ifdef BFD_ASSEMBLER
2577 /* The function adjust_reloc_syms won't convert a reloc against a weak
2578 symbol into a reloc against a section, but bfd_install_relocation
2579 will screw up if the symbol is defined, so we have to adjust val here
2580 to avoid the screw up later. */
2581 if (fixP->fx_addsy != NULL
2582 && S_IS_WEAK (fixP->fx_addsy))
2583 val -= S_GET_VALUE (fixP->fx_addsy);
2586 #ifndef BFD_ASSEMBLER
2587 if (fixP->fx_r_type == 0)
2589 if (fixP->fx_size == 2)
2590 fixP->fx_r_type = BFD_RELOC_16;
2591 else if (fixP->fx_size == 4)
2592 fixP->fx_r_type = BFD_RELOC_32;
2593 else if (fixP->fx_size == 1)
2594 fixP->fx_r_type = BFD_RELOC_8;
2602 switch (fixP->fx_r_type)
2604 case BFD_RELOC_SH_IMM4:
2606 *buf = (*buf & 0xf0) | (val & 0xf);
2609 case BFD_RELOC_SH_IMM4BY2:
2612 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
2615 case BFD_RELOC_SH_IMM4BY4:
2618 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
2621 case BFD_RELOC_SH_IMM8BY2:
2627 case BFD_RELOC_SH_IMM8BY4:
2634 case BFD_RELOC_SH_IMM8:
2635 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2636 sometimes it is not (e.g., and). We permit any 8 bit value.
2637 Note that adding further restrictions may invalidate
2638 reasonable looking assembly code, such as ``and -0x1,r0''. */
2644 case BFD_RELOC_SH_PCRELIMM8BY4:
2645 /* The lower two bits of the PC are cleared before the
2646 displacement is added in. We can assume that the destination
2647 is on a 4 byte bounday. If this instruction is also on a 4
2648 byte boundary, then we want
2650 and target - here is a multiple of 4.
2651 Otherwise, we are on a 2 byte boundary, and we want
2652 (target - (here - 2)) / 4
2653 and target - here is not a multiple of 4. Computing
2654 (target - (here - 2)) / 4 == (target - here + 2) / 4
2655 works for both cases, since in the first case the addition of
2656 2 will be removed by the division. target - here is in the
2658 val = (val + 2) / 4;
2660 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2664 case BFD_RELOC_SH_PCRELIMM8BY2:
2667 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2671 case BFD_RELOC_SH_PCDISP8BY2:
2673 if (val < -0x80 || val > 0x7f)
2674 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2678 case BFD_RELOC_SH_PCDISP12BY2:
2680 if (val < -0x800 || val >= 0x7ff)
2681 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2682 buf[lowbyte] = val & 0xff;
2683 buf[highbyte] |= (val >> 8) & 0xf;
2687 if (! target_big_endian)
2704 if (! target_big_endian)
2716 case BFD_RELOC_SH_USES:
2717 /* Pass the value into sh_coff_reloc_mangle. */
2718 fixP->fx_addnumber = val;
2721 case BFD_RELOC_SH_COUNT:
2722 case BFD_RELOC_SH_ALIGN:
2723 case BFD_RELOC_SH_CODE:
2724 case BFD_RELOC_SH_DATA:
2725 case BFD_RELOC_SH_LABEL:
2726 /* Nothing to do here. */
2729 case BFD_RELOC_SH_LOOP_START:
2730 case BFD_RELOC_SH_LOOP_END:
2732 case BFD_RELOC_VTABLE_INHERIT:
2733 case BFD_RELOC_VTABLE_ENTRY:
2735 #ifdef BFD_ASSEMBLER
2747 if ((val & ((1 << shift) - 1)) != 0)
2748 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
2752 val = ((val >> shift)
2753 | ((long) -1 & ~ ((long) -1 >> shift)));
2755 if (max != 0 && (val < min || val > max))
2756 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
2758 #ifdef BFD_ASSEMBLER
2763 /* Called just before address relaxation. Return the length
2764 by which a fragment must grow to reach it's destination. */
2767 md_estimate_size_before_relax (fragP, segment_type)
2768 register fragS *fragP;
2769 register segT segment_type;
2771 switch (fragP->fr_subtype)
2773 case C (UNCOND_JUMP, UNDEF_DISP):
2774 /* Used to be a branch to somewhere which was unknown. */
2775 if (!fragP->fr_symbol)
2777 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
2778 fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length;
2780 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
2782 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
2783 fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length;
2787 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
2788 fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length;
2789 return md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length;
2795 case C (COND_JUMP, UNDEF_DISP):
2796 case C (COND_JUMP_DELAY, UNDEF_DISP):
2797 /* Used to be a branch to somewhere which was unknown. */
2798 if (fragP->fr_symbol
2799 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
2801 int what = GET_WHAT (fragP->fr_subtype);
2802 /* Got a symbol and it's defined in this segment, become byte
2803 sized - maybe it will fix up. */
2804 fragP->fr_subtype = C (what, COND8);
2805 fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length;
2807 else if (fragP->fr_symbol)
2809 int what = GET_WHAT (fragP->fr_subtype);
2810 /* Its got a segment, but its not ours, so it will always be long. */
2811 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
2812 fragP->fr_var = md_relax_table[C (what, COND32)].rlx_length;
2813 return md_relax_table[C (what, COND32)].rlx_length;
2817 int what = GET_WHAT (fragP->fr_subtype);
2818 /* We know the abs value. */
2819 fragP->fr_subtype = C (what, COND8);
2820 fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length;
2825 return fragP->fr_var;
2828 /* Put number into target byte order. */
2831 md_number_to_chars (ptr, use, nbytes)
2836 if (! target_big_endian)
2837 number_to_chars_littleendian (ptr, use, nbytes);
2839 number_to_chars_bigendian (ptr, use, nbytes);
2843 md_pcrel_from (fixP)
2846 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
2852 tc_coff_sizemachdep (frag)
2855 return md_relax_table[frag->fr_subtype].rlx_length;
2858 #endif /* OBJ_COFF */
2860 /* When we align the .text section, insert the correct NOP pattern. */
2863 sh_do_align (n, fill, len, max)
2866 int len ATTRIBUTE_UNUSED;
2870 && subseg_text_p (now_seg)
2873 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
2874 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
2876 /* First align to a 2 byte boundary, in case there is an odd
2878 frag_align (1, 0, 0);
2879 if (target_big_endian)
2880 frag_align_pattern (n, big_nop_pattern, sizeof big_nop_pattern, max);
2882 frag_align_pattern (n, little_nop_pattern, sizeof little_nop_pattern,
2890 #ifndef BFD_ASSEMBLER
2893 /* Map BFD relocs to SH COFF relocs. */
2897 bfd_reloc_code_real_type bfd_reloc;
2901 static const struct reloc_map coff_reloc_map[] =
2903 { BFD_RELOC_32, R_SH_IMM32 },
2904 { BFD_RELOC_16, R_SH_IMM16 },
2905 { BFD_RELOC_8, R_SH_IMM8 },
2906 { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 },
2907 { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP },
2908 { BFD_RELOC_SH_IMM4, R_SH_IMM4 },
2909 { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 },
2910 { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 },
2911 { BFD_RELOC_SH_IMM8, R_SH_IMM8 },
2912 { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 },
2913 { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 },
2914 { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 },
2915 { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 },
2916 { BFD_RELOC_8_PCREL, R_SH_SWITCH8 },
2917 { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 },
2918 { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 },
2919 { BFD_RELOC_SH_USES, R_SH_USES },
2920 { BFD_RELOC_SH_COUNT, R_SH_COUNT },
2921 { BFD_RELOC_SH_ALIGN, R_SH_ALIGN },
2922 { BFD_RELOC_SH_CODE, R_SH_CODE },
2923 { BFD_RELOC_SH_DATA, R_SH_DATA },
2924 { BFD_RELOC_SH_LABEL, R_SH_LABEL },
2925 { BFD_RELOC_UNUSED, 0 }
2928 /* Adjust a reloc for the SH. This is similar to the generic code,
2929 but does some minor tweaking. */
2932 sh_coff_reloc_mangle (seg, fix, intr, paddr)
2933 segment_info_type *seg;
2935 struct internal_reloc *intr;
2938 symbolS *symbol_ptr = fix->fx_addsy;
2941 intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where;
2943 if (! SWITCH_TABLE (fix))
2945 const struct reloc_map *rm;
2947 for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++)
2948 if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type)
2950 if (rm->bfd_reloc == BFD_RELOC_UNUSED)
2951 as_bad_where (fix->fx_file, fix->fx_line,
2952 _("Can not represent %s relocation in this object file format"),
2953 bfd_get_reloc_code_name (fix->fx_r_type));
2954 intr->r_type = rm->sh_reloc;
2961 if (fix->fx_r_type == BFD_RELOC_16)
2962 intr->r_type = R_SH_SWITCH16;
2963 else if (fix->fx_r_type == BFD_RELOC_8)
2964 intr->r_type = R_SH_SWITCH8;
2965 else if (fix->fx_r_type == BFD_RELOC_32)
2966 intr->r_type = R_SH_SWITCH32;
2970 /* For a switch reloc, we set r_offset to the difference between
2971 the reloc address and the subtrahend. When the linker is
2972 doing relaxing, it can use the determine the starting and
2973 ending points of the switch difference expression. */
2974 intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy);
2977 /* PC relative relocs are always against the current section. */
2978 if (symbol_ptr == NULL)
2980 switch (fix->fx_r_type)
2982 case BFD_RELOC_SH_PCRELIMM8BY2:
2983 case BFD_RELOC_SH_PCRELIMM8BY4:
2984 case BFD_RELOC_SH_PCDISP8BY2:
2985 case BFD_RELOC_SH_PCDISP12BY2:
2986 case BFD_RELOC_SH_USES:
2987 symbol_ptr = seg->dot;
2994 if (fix->fx_r_type == BFD_RELOC_SH_USES)
2996 /* We can't store the offset in the object file, since this
2997 reloc does not take up any space, so we store it in r_offset.
2998 The fx_addnumber field was set in md_apply_fix. */
2999 intr->r_offset = fix->fx_addnumber;
3001 else if (fix->fx_r_type == BFD_RELOC_SH_COUNT)
3003 /* We can't store the count in the object file, since this reloc
3004 does not take up any space, so we store it in r_offset. The
3005 fx_offset field was set when the fixup was created in
3006 sh_coff_frob_file. */
3007 intr->r_offset = fix->fx_offset;
3008 /* This reloc is always absolute. */
3011 else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN)
3013 /* Store the alignment in the r_offset field. */
3014 intr->r_offset = fix->fx_offset;
3015 /* This reloc is always absolute. */
3018 else if (fix->fx_r_type == BFD_RELOC_SH_CODE
3019 || fix->fx_r_type == BFD_RELOC_SH_DATA
3020 || fix->fx_r_type == BFD_RELOC_SH_LABEL)
3022 /* These relocs are always absolute. */
3026 /* Turn the segment of the symbol into an offset. */
3027 if (symbol_ptr != NULL)
3029 dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot;
3031 intr->r_symndx = dot->sy_number;
3033 intr->r_symndx = symbol_ptr->sy_number;
3036 intr->r_symndx = -1;
3039 #endif /* OBJ_COFF */
3040 #endif /* ! BFD_ASSEMBLER */
3042 #ifdef BFD_ASSEMBLER
3044 /* Create a reloc. */
3047 tc_gen_reloc (section, fixp)
3048 asection *section ATTRIBUTE_UNUSED;
3052 bfd_reloc_code_real_type r_type;
3054 rel = (arelent *) xmalloc (sizeof (arelent));
3055 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
3056 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
3057 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
3059 r_type = fixp->fx_r_type;
3061 if (SWITCH_TABLE (fixp))
3063 rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy);
3064 if (r_type == BFD_RELOC_16)
3065 r_type = BFD_RELOC_SH_SWITCH16;
3066 else if (r_type == BFD_RELOC_8)
3067 r_type = BFD_RELOC_8_PCREL;
3068 else if (r_type == BFD_RELOC_32)
3069 r_type = BFD_RELOC_SH_SWITCH32;
3073 else if (r_type == BFD_RELOC_SH_USES)
3074 rel->addend = fixp->fx_addnumber;
3075 else if (r_type == BFD_RELOC_SH_COUNT)
3076 rel->addend = fixp->fx_offset;
3077 else if (r_type == BFD_RELOC_SH_ALIGN)
3078 rel->addend = fixp->fx_offset;
3079 else if (r_type == BFD_RELOC_VTABLE_INHERIT
3080 || r_type == BFD_RELOC_VTABLE_ENTRY)
3081 rel->addend = fixp->fx_offset;
3082 else if (r_type == BFD_RELOC_SH_LOOP_START
3083 || r_type == BFD_RELOC_SH_LOOP_END)
3084 rel->addend = fixp->fx_offset;
3085 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
3088 rel->address = rel->addend = fixp->fx_offset;
3090 else if (fixp->fx_pcrel)
3091 rel->addend = fixp->fx_addnumber;
3095 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
3096 if (rel->howto == NULL)
3098 as_bad_where (fixp->fx_file, fixp->fx_line,
3099 _("Cannot represent relocation type %s"),
3100 bfd_get_reloc_code_name (r_type));
3101 /* Set howto to a garbage value so that we can keep going. */
3102 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3103 assert (rel->howto != NULL);
3109 #endif /* BFD_ASSEMBLER */