1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
43 expressionS immediate;
47 const char comment_chars[] = "!";
48 const char line_separator_chars[] = ";";
49 const char line_comment_chars[] = "!#";
51 static void s_uses PARAMS ((int));
53 static void sh_count_relocs PARAMS ((bfd *, segT, PTR));
54 static void sh_frob_section PARAMS ((bfd *, segT, PTR));
56 static void s_uacons PARAMS ((int));
57 static sh_opcode_info *find_cooked_opcode PARAMS ((char **));
58 static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *));
59 static void little PARAMS ((int));
60 static void big PARAMS ((int));
61 static int parse_reg PARAMS ((char *, int *, int *));
62 static symbolS *dot PARAMS ((void));
63 static char *parse_exp PARAMS ((char *, sh_operand_info *));
64 static char *parse_at PARAMS ((char *, sh_operand_info *));
65 static void get_operand PARAMS ((char **, sh_operand_info *));
66 static char *get_operands
67 PARAMS ((sh_opcode_info *, char *, sh_operand_info *));
68 static sh_opcode_info *get_specific
69 PARAMS ((sh_opcode_info *, sh_operand_info *));
70 static void insert PARAMS ((char *, int, int, sh_operand_info *));
71 static void build_relax PARAMS ((sh_opcode_info *, sh_operand_info *));
72 static char *insert_loop_bounds PARAMS ((char *, sh_operand_info *));
73 static unsigned int build_Mytes
74 PARAMS ((sh_opcode_info *, sh_operand_info *));
77 static void sh_elf_cons PARAMS ((int));
79 inline static int sh_PIC_related_p PARAMS ((symbolS *));
80 static int sh_check_fixup PARAMS ((expressionS *, bfd_reloc_code_real_type *));
81 inline static char *sh_end_of_match PARAMS ((char *, char *));
83 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
88 int ignore ATTRIBUTE_UNUSED;
90 if (! target_big_endian)
91 as_bad (_("directive .big encountered when option -big required"));
93 /* Stop further messages. */
94 target_big_endian = 1;
99 int ignore ATTRIBUTE_UNUSED;
101 if (target_big_endian)
102 as_bad (_("directive .little encountered when option -little required"));
104 /* Stop further messages. */
105 target_big_endian = 0;
108 /* This table describes all the machine specific pseudo-ops the assembler
109 has to support. The fields are:
110 pseudo-op name without dot
111 function to call to execute this pseudo-op
112 Integer arg to pass to the function. */
114 const pseudo_typeS md_pseudo_table[] =
117 {"long", sh_elf_cons, 4},
118 {"int", sh_elf_cons, 4},
119 {"word", sh_elf_cons, 2},
120 {"short", sh_elf_cons, 2},
126 {"form", listing_psize, 0},
127 {"little", little, 0},
128 {"heading", listing_title, 0},
129 {"import", s_ignore, 0},
130 {"page", listing_eject, 0},
131 {"program", s_ignore, 0},
133 {"uaword", s_uacons, 2},
134 {"ualong", s_uacons, 4},
135 {"uaquad", s_uacons, 8},
136 {"2byte", s_uacons, 2},
137 {"4byte", s_uacons, 4},
138 {"8byte", s_uacons, 8},
140 {"file", dwarf2_directive_file, 0 },
141 {"loc", dwarf2_directive_loc, 0 },
144 {"mode", s_sh64_mode, 0 },
146 /* Have the old name too. */
147 {"isa", s_sh64_mode, 0 },
149 /* Assert that the right ABI is used. */
150 {"abi", s_sh64_abi, 0 },
152 { "vtable_inherit", sh64_vtable_inherit, 0 },
153 { "vtable_entry", sh64_vtable_entry, 0 },
154 #endif /* HAVE_SH64 */
158 /*int md_reloc_size; */
160 int sh_relax; /* set if -relax seen */
162 /* Whether -small was seen. */
166 /* Whether -dsp was seen. */
170 /* The bit mask of architectures that could
171 accomodate the insns seen so far. */
172 static int valid_arch;
174 const char EXP_CHARS[] = "eE";
176 /* Chars that mean this number is a floating point constant. */
179 const char FLT_CHARS[] = "rRsSfFdDxXpP";
181 #define C(a,b) ENCODE_RELAX(a,b)
183 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
184 #define GET_WHAT(x) ((x>>4))
186 /* These are the three types of relaxable instrction. */
187 /* These are the types of relaxable instructions; except for END which is
190 #define COND_JUMP_DELAY 2
191 #define UNCOND_JUMP 3
195 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
196 #define SH64PCREL16_32 4
197 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
198 #define SH64PCREL16_64 5
200 /* Variants of the above for adjusting the insn to PTA or PTB according to
202 #define SH64PCREL16PT_32 6
203 #define SH64PCREL16PT_64 7
205 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
206 #define MOVI_IMM_32 8
207 #define MOVI_IMM_32_PCREL 9
208 #define MOVI_IMM_64 10
209 #define MOVI_IMM_64_PCREL 11
212 #else /* HAVE_SH64 */
216 #endif /* HAVE_SH64 */
222 #define UNDEF_WORD_DISP 4
228 #define UNDEF_SH64PCREL 0
229 #define SH64PCREL16 1
230 #define SH64PCREL32 2
231 #define SH64PCREL48 3
232 #define SH64PCREL64 4
233 #define SH64PCRELPLT 5
241 #define MOVI_GOTOFF 6
243 #endif /* HAVE_SH64 */
245 /* Branch displacements are from the address of the branch plus
246 four, thus all minimum and maximum values have 4 added to them. */
249 #define COND8_LENGTH 2
251 /* There is one extra instruction before the branch, so we must add
252 two more bytes to account for it. */
253 #define COND12_F 4100
254 #define COND12_M -4090
255 #define COND12_LENGTH 6
257 #define COND12_DELAY_LENGTH 4
259 /* ??? The minimum and maximum values are wrong, but this does not matter
260 since this relocation type is not supported yet. */
261 #define COND32_F (1<<30)
262 #define COND32_M -(1<<30)
263 #define COND32_LENGTH 14
265 #define UNCOND12_F 4098
266 #define UNCOND12_M -4092
267 #define UNCOND12_LENGTH 2
269 /* ??? The minimum and maximum values are wrong, but this does not matter
270 since this relocation type is not supported yet. */
271 #define UNCOND32_F (1<<30)
272 #define UNCOND32_M -(1<<30)
273 #define UNCOND32_LENGTH 14
276 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
277 TRd" as is the current insn, so no extra length. Note that the "reach"
278 is calculated from the address *after* that insn, but the offset in the
279 insn is calculated from the beginning of the insn. We also need to
280 take into account the implicit 1 coded as the "A" in PTA when counting
281 forward. If PTB reaches an odd address, we trap that as an error
282 elsewhere, so we don't have to have different relaxation entries. We
283 don't add a one to the negative range, since PTB would then have the
284 farthest backward-reaching value skipped, not generated at relaxation. */
285 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
286 #define SH64PCREL16_M (-32768 * 4 - 4)
287 #define SH64PCREL16_LENGTH 0
289 /* The next step is to change that PT insn into
290 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
291 SHORI (label - datalabel Ln) & 65535, R25
294 which means two extra insns, 8 extra bytes. This is the limit for the
297 The expressions look a bit bad since we have to adjust this to avoid overflow on a
299 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
300 #define SH64PCREL32_LENGTH (2 * 4)
302 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
304 #if BFD_HOST_64BIT_LONG
305 /* The "reach" type is long, so we can only do this for a 64-bit-long
307 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
308 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
309 #define SH64PCREL48_M (((long) -1 << 47) - 4)
310 #define SH64PCREL48_LENGTH (3 * 4)
312 /* If the host does not have 64-bit longs, just make this state identical
313 in reach to the 32-bit state. Note that we have a slightly incorrect
314 reach, but the correct one above will overflow a 32-bit number. */
315 #define SH64PCREL32_M (((long) -1 << 30) * 2)
316 #define SH64PCREL48_F SH64PCREL32_F
317 #define SH64PCREL48_M SH64PCREL32_M
318 #define SH64PCREL48_LENGTH (3 * 4)
319 #endif /* BFD_HOST_64BIT_LONG */
321 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
323 #define SH64PCREL64_LENGTH (4 * 4)
325 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
326 SH64PCREL expansions. The PCREL one is similar, but the other has no
327 pc-relative reach; it must be fully expanded in
328 shmedia_md_estimate_size_before_relax. */
329 #define MOVI_16_LENGTH 0
330 #define MOVI_16_F (32767 - 4)
331 #define MOVI_16_M (-32768 - 4)
332 #define MOVI_32_LENGTH 4
333 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
334 #define MOVI_48_LENGTH 8
336 #if BFD_HOST_64BIT_LONG
337 /* The "reach" type is long, so we can only do this for a 64-bit-long
339 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
340 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
341 #define MOVI_48_M (((long) -1 << 47) - 4)
343 /* If the host does not have 64-bit longs, just make this state identical
344 in reach to the 32-bit state. Note that we have a slightly incorrect
345 reach, but the correct one above will overflow a 32-bit number. */
346 #define MOVI_32_M (((long) -1 << 30) * 2)
347 #define MOVI_48_F MOVI_32_F
348 #define MOVI_48_M MOVI_32_M
349 #endif /* BFD_HOST_64BIT_LONG */
351 #define MOVI_64_LENGTH 12
352 #endif /* HAVE_SH64 */
354 #define EMPTY { 0, 0, 0, 0 }
356 const relax_typeS md_relax_table[C (END, 0)] = {
357 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
358 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
361 /* C (COND_JUMP, COND8) */
362 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
363 /* C (COND_JUMP, COND12) */
364 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
365 /* C (COND_JUMP, COND32) */
366 { COND32_F, COND32_M, COND32_LENGTH, 0, },
367 /* C (COND_JUMP, UNDEF_WORD_DISP) */
368 { 0, 0, COND32_LENGTH, 0, },
370 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
373 /* C (COND_JUMP_DELAY, COND8) */
374 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
375 /* C (COND_JUMP_DELAY, COND12) */
376 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
377 /* C (COND_JUMP_DELAY, COND32) */
378 { COND32_F, COND32_M, COND32_LENGTH, 0, },
379 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
380 { 0, 0, COND32_LENGTH, 0, },
382 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
385 /* C (UNCOND_JUMP, UNCOND12) */
386 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
387 /* C (UNCOND_JUMP, UNCOND32) */
388 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
390 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
391 { 0, 0, UNCOND32_LENGTH, 0, },
393 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
396 /* C (SH64PCREL16_32, SH64PCREL16) */
398 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) },
399 /* C (SH64PCREL16_32, SH64PCREL32) */
400 { 0, 0, SH64PCREL32_LENGTH, 0 },
402 /* C (SH64PCREL16_32, SH64PCRELPLT) */
403 { 0, 0, SH64PCREL32_LENGTH, 0 },
405 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
407 /* C (SH64PCREL16_64, SH64PCREL16) */
409 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) },
410 /* C (SH64PCREL16_64, SH64PCREL32) */
411 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) },
412 /* C (SH64PCREL16_64, SH64PCREL48) */
413 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) },
414 /* C (SH64PCREL16_64, SH64PCREL64) */
415 { 0, 0, SH64PCREL64_LENGTH, 0 },
416 /* C (SH64PCREL16_64, SH64PCRELPLT) */
417 { 0, 0, SH64PCREL64_LENGTH, 0 },
419 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
421 /* C (SH64PCREL16PT_32, SH64PCREL16) */
423 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) },
424 /* C (SH64PCREL16PT_32, SH64PCREL32) */
425 { 0, 0, SH64PCREL32_LENGTH, 0 },
427 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
428 { 0, 0, SH64PCREL32_LENGTH, 0 },
430 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
432 /* C (SH64PCREL16PT_64, SH64PCREL16) */
434 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) },
435 /* C (SH64PCREL16PT_64, SH64PCREL32) */
439 C (SH64PCREL16PT_64, SH64PCREL48) },
440 /* C (SH64PCREL16PT_64, SH64PCREL48) */
441 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) },
442 /* C (SH64PCREL16PT_64, SH64PCREL64) */
443 { 0, 0, SH64PCREL64_LENGTH, 0 },
444 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
445 { 0, 0, SH64PCREL64_LENGTH, 0},
447 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
449 /* C (MOVI_IMM_32, UNDEF_MOVI) */
450 { 0, 0, MOVI_32_LENGTH, 0 },
451 /* C (MOVI_IMM_32, MOVI_16) */
452 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) },
453 /* C (MOVI_IMM_32, MOVI_32) */
454 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 },
456 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
457 { 0, 0, MOVI_32_LENGTH, 0 },
458 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
460 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
462 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) },
463 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
464 { 0, 0, MOVI_32_LENGTH, 0 },
466 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
467 { 0, 0, MOVI_32_LENGTH, 0 },
469 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
470 { 0, 0, MOVI_32_LENGTH, 0 },
471 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
473 /* C (MOVI_IMM_64, UNDEF_MOVI) */
474 { 0, 0, MOVI_64_LENGTH, 0 },
475 /* C (MOVI_IMM_64, MOVI_16) */
476 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) },
477 /* C (MOVI_IMM_64, MOVI_32) */
478 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) },
479 /* C (MOVI_IMM_64, MOVI_48) */
480 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) },
481 /* C (MOVI_IMM_64, MOVI_64) */
482 { 0, 0, MOVI_64_LENGTH, 0 },
484 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
485 { 0, 0, MOVI_64_LENGTH, 0 },
486 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
488 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
490 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) },
491 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
492 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) },
493 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
494 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) },
495 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
496 { 0, 0, MOVI_64_LENGTH, 0 },
497 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
498 { 0, 0, MOVI_64_LENGTH, 0 },
500 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
501 { 0, 0, MOVI_64_LENGTH, 0 },
502 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
504 #endif /* HAVE_SH64 */
510 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
514 /* Determinet whether the symbol needs any kind of PIC relocation. */
517 sh_PIC_related_p (sym)
525 if (sym == GOT_symbol)
529 if (sh_PIC_related_p (*symbol_get_tc (sym)))
533 exp = symbol_get_value_expression (sym);
535 return (exp->X_op == O_PIC_reloc
536 || sh_PIC_related_p (exp->X_add_symbol)
537 || sh_PIC_related_p (exp->X_op_symbol));
540 /* Determine the relocation type to be used to represent the
541 expression, that may be rearranged. */
544 sh_check_fixup (main_exp, r_type_p)
545 expressionS *main_exp;
546 bfd_reloc_code_real_type *r_type_p;
548 expressionS *exp = main_exp;
550 /* This is here for backward-compatibility only. GCC used to generated:
552 f@PLT + . - (.LPCS# + 2)
554 but we'd rather be able to handle this as a PIC-related reference
555 plus/minus a symbol. However, gas' parser gives us:
557 O_subtract (O_add (f@PLT, .), .LPCS#+2)
559 so we attempt to transform this into:
561 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
563 which we can handle simply below. */
564 if (exp->X_op == O_subtract)
566 if (sh_PIC_related_p (exp->X_op_symbol))
569 exp = symbol_get_value_expression (exp->X_add_symbol);
571 if (exp && sh_PIC_related_p (exp->X_op_symbol))
574 if (exp && exp->X_op == O_add
575 && sh_PIC_related_p (exp->X_add_symbol))
577 symbolS *sym = exp->X_add_symbol;
579 exp->X_op = O_subtract;
580 exp->X_add_symbol = main_exp->X_op_symbol;
582 main_exp->X_op_symbol = main_exp->X_add_symbol;
583 main_exp->X_add_symbol = sym;
585 main_exp->X_add_number += exp->X_add_number;
586 exp->X_add_number = 0;
591 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol))
594 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract)
597 if (exp->X_add_symbol
598 && (exp->X_add_symbol == GOT_symbol
600 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol)))
604 case BFD_RELOC_SH_IMM_LOW16:
605 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16;
608 case BFD_RELOC_SH_IMM_MEDLOW16:
609 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16;
612 case BFD_RELOC_SH_IMM_MEDHI16:
613 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16;
616 case BFD_RELOC_SH_IMM_HI16:
617 *r_type_p = BFD_RELOC_SH_GOTPC_HI16;
621 case BFD_RELOC_UNUSED:
622 *r_type_p = BFD_RELOC_SH_GOTPC;
631 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
633 *r_type_p = BFD_RELOC_SH_GOTPC;
637 exp = symbol_get_value_expression (exp->X_add_symbol);
642 if (exp->X_op == O_PIC_reloc)
648 case BFD_RELOC_UNUSED:
649 *r_type_p = exp->X_md;
652 case BFD_RELOC_SH_IMM_LOW16:
655 case BFD_RELOC_32_GOTOFF:
656 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16;
659 case BFD_RELOC_SH_GOTPLT32:
660 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16;
663 case BFD_RELOC_32_GOT_PCREL:
664 *r_type_p = BFD_RELOC_SH_GOT_LOW16;
667 case BFD_RELOC_32_PLT_PCREL:
668 *r_type_p = BFD_RELOC_SH_PLT_LOW16;
676 case BFD_RELOC_SH_IMM_MEDLOW16:
679 case BFD_RELOC_32_GOTOFF:
680 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16;
683 case BFD_RELOC_SH_GOTPLT32:
684 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16;
687 case BFD_RELOC_32_GOT_PCREL:
688 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16;
691 case BFD_RELOC_32_PLT_PCREL:
692 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16;
700 case BFD_RELOC_SH_IMM_MEDHI16:
703 case BFD_RELOC_32_GOTOFF:
704 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16;
707 case BFD_RELOC_SH_GOTPLT32:
708 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16;
711 case BFD_RELOC_32_GOT_PCREL:
712 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16;
715 case BFD_RELOC_32_PLT_PCREL:
716 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16;
724 case BFD_RELOC_SH_IMM_HI16:
727 case BFD_RELOC_32_GOTOFF:
728 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16;
731 case BFD_RELOC_SH_GOTPLT32:
732 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16;
735 case BFD_RELOC_32_GOT_PCREL:
736 *r_type_p = BFD_RELOC_SH_GOT_HI16;
739 case BFD_RELOC_32_PLT_PCREL:
740 *r_type_p = BFD_RELOC_SH_PLT_HI16;
752 *r_type_p = exp->X_md;
755 exp->X_op = O_symbol;
758 main_exp->X_add_symbol = exp->X_add_symbol;
759 main_exp->X_add_number += exp->X_add_number;
763 return (sh_PIC_related_p (exp->X_add_symbol)
764 || sh_PIC_related_p (exp->X_op_symbol));
769 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
772 sh_cons_fix_new (frag, off, size, exp)
777 bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED;
779 if (sh_check_fixup (exp, &r_type))
780 as_bad (_("Invalid PIC expression."));
782 if (r_type == BFD_RELOC_UNUSED)
786 r_type = BFD_RELOC_8;
790 r_type = BFD_RELOC_16;
794 r_type = BFD_RELOC_32;
799 r_type = BFD_RELOC_64;
809 as_bad (_("unsupported BFD relocation size %u"), size);
810 r_type = BFD_RELOC_UNUSED;
813 fix_new_exp (frag, off, size, exp, 0, r_type);
816 /* The regular cons() function, that reads constants, doesn't support
817 suffixes such as @GOT, @GOTOFF and @PLT, that generate
818 machine-specific relocation types. So we must define it here. */
819 /* Clobbers input_line_pointer, checks end-of-line. */
822 register int nbytes; /* 1=.byte, 2=.word, 4=.long */
828 /* Update existing range to include a previous insn, if there was one. */
829 sh64_update_contents_mark (true);
831 /* We need to make sure the contents type is set to data. */
834 #endif /* HAVE_SH64 */
836 if (is_it_end_of_statement ())
838 demand_empty_rest_of_line ();
845 emit_expr (&exp, (unsigned int) nbytes);
847 while (*input_line_pointer++ == ',');
849 input_line_pointer--; /* Put terminator back into stream. */
850 if (*input_line_pointer == '#' || *input_line_pointer == '!')
852 while (! is_end_of_line[(unsigned char) *input_line_pointer++]);
855 demand_empty_rest_of_line ();
860 /* This function is called once, at assembler startup time. This should
861 set up all the tables, etc that the MD part of the assembler needs. */
866 sh_opcode_info *opcode;
867 char *prev_name = "";
870 target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up);
871 valid_arch = target_arch;
877 opcode_hash_control = hash_new ();
879 /* Insert unique names into hash table. */
880 for (opcode = sh_table; opcode->name; opcode++)
882 if (strcmp (prev_name, opcode->name))
884 if (! (opcode->arch & target_arch))
886 prev_name = opcode->name;
887 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
891 /* Make all the opcodes with the same name point to the same
893 opcode->name = prev_name;
900 static int reg_x, reg_y;
904 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
906 /* Try to parse a reg name. Return the number of chars consumed. */
909 parse_reg (src, mode, reg)
914 char l0 = TOLOWER (src[0]);
915 char l1 = l0 ? TOLOWER (src[1]) : 0;
917 /* We use ! IDENT_CHAR for the next character after the register name, to
918 make sure that we won't accidentally recognize a symbol name such as
919 'sram' or sr_ram as being a reference to the register 'sr'. */
925 if (src[2] >= '0' && src[2] <= '5'
926 && ! IDENT_CHAR ((unsigned char) src[3]))
929 *reg = 10 + src[2] - '0';
933 if (l1 >= '0' && l1 <= '9'
934 && ! IDENT_CHAR ((unsigned char) src[2]))
940 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0
941 && ! IDENT_CHAR ((unsigned char) src[7]))
948 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
953 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
964 if (! IDENT_CHAR ((unsigned char) src[2]))
970 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
979 if (! IDENT_CHAR ((unsigned char) src[2]))
985 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
993 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1'
994 && ! IDENT_CHAR ((unsigned char) src[3]))
997 *reg = 4 + (l1 - '0');
1000 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1'
1001 && ! IDENT_CHAR ((unsigned char) src[3]))
1004 *reg = 6 + (l1 - '0');
1007 if (l1 == 's' && src[2] >= '0' && src[2] <= '3'
1008 && ! IDENT_CHAR ((unsigned char) src[3]))
1013 *reg = n | ((~n & 2) << 1);
1018 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2]))
1040 if (l0 == 'x' && l1 >= '0' && l1 <= '1'
1041 && ! IDENT_CHAR ((unsigned char) src[2]))
1044 *reg = A_X0_NUM + l1 - '0';
1048 if (l0 == 'y' && l1 >= '0' && l1 <= '1'
1049 && ! IDENT_CHAR ((unsigned char) src[2]))
1052 *reg = A_Y0_NUM + l1 - '0';
1056 if (l0 == 'm' && l1 >= '0' && l1 <= '1'
1057 && ! IDENT_CHAR ((unsigned char) src[2]))
1060 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM;
1066 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
1072 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c'
1073 && ! IDENT_CHAR ((unsigned char) src[3]))
1079 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r'
1080 && ! IDENT_CHAR ((unsigned char) src[3]))
1086 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r'
1087 && ! IDENT_CHAR ((unsigned char) src[3]))
1093 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1094 && ! IDENT_CHAR ((unsigned char) src[3]))
1100 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
1106 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
1113 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
1118 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
1120 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1121 and use an uninitialized immediate. */
1125 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1126 && ! IDENT_CHAR ((unsigned char) src[3]))
1131 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r'
1132 && ! IDENT_CHAR ((unsigned char) src[3]))
1138 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c'
1139 && ! IDENT_CHAR ((unsigned char) src[4]))
1141 if (TOLOWER (src[3]) == 'l')
1146 if (TOLOWER (src[3]) == 'h')
1152 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd'
1153 && ! IDENT_CHAR ((unsigned char) src[3]))
1158 if (l0 == 'f' && l1 == 'r')
1162 if (src[3] >= '0' && src[3] <= '5'
1163 && ! IDENT_CHAR ((unsigned char) src[4]))
1166 *reg = 10 + src[3] - '0';
1170 if (src[2] >= '0' && src[2] <= '9'
1171 && ! IDENT_CHAR ((unsigned char) src[3]))
1174 *reg = (src[2] - '0');
1178 if (l0 == 'd' && l1 == 'r')
1182 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
1183 && ! IDENT_CHAR ((unsigned char) src[4]))
1186 *reg = 10 + src[3] - '0';
1190 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
1191 && ! IDENT_CHAR ((unsigned char) src[3]))
1194 *reg = (src[2] - '0');
1198 if (l0 == 'x' && l1 == 'd')
1202 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
1203 && ! IDENT_CHAR ((unsigned char) src[4]))
1206 *reg = 11 + src[3] - '0';
1210 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
1211 && ! IDENT_CHAR ((unsigned char) src[3]))
1214 *reg = (src[2] - '0') + 1;
1218 if (l0 == 'f' && l1 == 'v')
1220 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
1226 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
1227 && ! IDENT_CHAR ((unsigned char) src[3]))
1230 *reg = (src[2] - '0');
1234 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u'
1235 && TOLOWER (src[3]) == 'l'
1236 && ! IDENT_CHAR ((unsigned char) src[4]))
1242 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's'
1243 && TOLOWER (src[3]) == 'c'
1244 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
1250 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't'
1251 && TOLOWER (src[3]) == 'r'
1252 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
1266 /* JF: '.' is pseudo symbol with value of current location
1267 in current segment. */
1268 fake = FAKE_LABEL_NAME;
1269 return symbol_new (fake,
1271 (valueT) frag_now_fix (),
1278 sh_operand_info *op;
1283 save = input_line_pointer;
1284 input_line_pointer = s;
1285 expression (&op->immediate);
1286 if (op->immediate.X_op == O_absent)
1287 as_bad (_("missing operand"));
1289 else if (op->immediate.X_op == O_PIC_reloc
1290 || sh_PIC_related_p (op->immediate.X_add_symbol)
1291 || sh_PIC_related_p (op->immediate.X_op_symbol))
1292 as_bad (_("misplaced PIC operand"));
1294 new = input_line_pointer;
1295 input_line_pointer = save;
1299 /* The many forms of operand:
1302 @Rn Register indirect
1315 pr, gbr, vbr, macl, mach
1321 sh_operand_info *op;
1328 /* Must be predecrement. */
1331 len = parse_reg (src, &mode, &(op->reg));
1332 if (mode != A_REG_N)
1333 as_bad (_("illegal register after @-"));
1338 else if (src[0] == '(')
1340 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1343 len = parse_reg (src, &mode, &(op->reg));
1344 if (len && mode == A_REG_N)
1349 as_bad (_("must be @(r0,...)"));
1354 /* Now can be rn or gbr. */
1355 len = parse_reg (src, &mode, &(op->reg));
1365 op->type = A_R0_GBR;
1367 else if (mode == A_REG_N)
1369 op->type = A_IND_R0_REG_N;
1373 as_bad (_("syntax error in @(r0,...)"));
1378 as_bad (_("syntax error in @(r0...)"));
1383 /* Must be an @(disp,.. thing). */
1384 src = parse_exp (src, op);
1387 /* Now can be rn, gbr or pc. */
1388 len = parse_reg (src, &mode, &op->reg);
1391 if (mode == A_REG_N)
1393 op->type = A_DISP_REG_N;
1395 else if (mode == A_GBR)
1397 op->type = A_DISP_GBR;
1399 else if (mode == A_PC)
1401 op->type = A_DISP_PC_ABS;
1402 /* Such operands don't get corrected for PC==.+4, so
1403 make the correction here. */
1404 op->immediate.X_add_number -= 4;
1408 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1413 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1418 as_bad (_("expecting )"));
1424 src += parse_reg (src, &mode, &(op->reg));
1425 if (mode != A_REG_N)
1426 as_bad (_("illegal register after @"));
1433 l0 = TOLOWER (src[0]);
1434 l1 = TOLOWER (src[1]);
1436 if ((l0 == 'r' && l1 == '8')
1437 || (l0 == 'i' && (l1 == 'x' || l1 == 's')))
1440 op->type = A_PMOD_N;
1442 else if ( (l0 == 'r' && l1 == '9')
1443 || (l0 == 'i' && l1 == 'y'))
1446 op->type = A_PMODY_N;
1458 get_operand (ptr, op)
1460 sh_operand_info *op;
1469 *ptr = parse_exp (src, op);
1474 else if (src[0] == '@')
1476 *ptr = parse_at (src, op);
1479 len = parse_reg (src, &mode, &(op->reg));
1488 /* Not a reg, the only thing left is a displacement. */
1489 *ptr = parse_exp (src, op);
1490 op->type = A_DISP_PC;
1496 get_operands (info, args, operand)
1497 sh_opcode_info *info;
1499 sh_operand_info *operand;
1504 /* The pre-processor will eliminate whitespace in front of '@'
1505 after the first argument; we may be called multiple times
1506 from assemble_ppi, so don't insist on finding whitespace here. */
1510 get_operand (&ptr, operand + 0);
1517 get_operand (&ptr, operand + 1);
1518 /* ??? Hack: psha/pshl have a varying operand number depending on
1519 the type of the first operand. We handle this by having the
1520 three-operand version first and reducing the number of operands
1521 parsed to two if we see that the first operand is an immediate.
1522 This works because no insn with three operands has an immediate
1523 as first operand. */
1524 if (info->arg[2] && operand[0].type != A_IMM)
1530 get_operand (&ptr, operand + 2);
1534 operand[2].type = 0;
1539 operand[1].type = 0;
1540 operand[2].type = 0;
1545 operand[0].type = 0;
1546 operand[1].type = 0;
1547 operand[2].type = 0;
1552 /* Passed a pointer to a list of opcodes which use different
1553 addressing modes, return the opcode which matches the opcodes
1556 static sh_opcode_info *
1557 get_specific (opcode, operands)
1558 sh_opcode_info *opcode;
1559 sh_operand_info *operands;
1561 sh_opcode_info *this_try = opcode;
1562 char *name = opcode->name;
1565 while (opcode->name)
1567 this_try = opcode++;
1568 if (this_try->name != name)
1570 /* We've looked so far down the table that we've run out of
1571 opcodes with the same name. */
1575 /* Look at both operands needed by the opcodes and provided by
1576 the user - since an arg test will often fail on the same arg
1577 again and again, we'll try and test the last failing arg the
1578 first on each opcode try. */
1579 for (n = 0; this_try->arg[n]; n++)
1581 sh_operand_info *user = operands + n;
1582 sh_arg_type arg = this_try->arg[n];
1587 if (user->type == A_DISP_PC_ABS)
1597 if (user->type != arg)
1601 /* opcode needs r0 */
1602 if (user->type != A_REG_N || user->reg != 0)
1606 if (user->type != A_R0_GBR || user->reg != 0)
1610 if (user->type != F_REG_N || user->reg != 0)
1618 case A_IND_R0_REG_N:
1629 /* Opcode needs rn */
1630 if (user->type != arg)
1635 if (user->type != D_REG_N && user->type != X_REG_N)
1650 if (user->type != arg)
1655 if (user->type != arg)
1664 case A_IND_R0_REG_M:
1667 /* Opcode needs rn */
1668 if (user->type != arg - A_REG_M + A_REG_N)
1674 if (user->type != DSP_REG_N)
1696 if (user->type != DSP_REG_N)
1718 if (user->type != DSP_REG_N)
1740 if (user->type != DSP_REG_N)
1762 if (user->type != DSP_REG_N)
1784 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
1788 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
1792 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
1796 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
1800 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
1810 /* Opcode needs rn */
1811 if (user->type != arg - F_REG_M + F_REG_N)
1816 if (user->type != D_REG_N && user->type != X_REG_N)
1821 if (user->type != XMTRX_M4)
1827 printf (_("unhandled %d\n"), arg);
1831 if ( !(valid_arch & this_try->arch))
1833 valid_arch &= this_try->arch;
1843 insert (where, how, pcrel, op)
1847 sh_operand_info *op;
1849 fix_new_exp (frag_now,
1850 where - frag_now->fr_literal,
1858 build_relax (opcode, op)
1859 sh_opcode_info *opcode;
1860 sh_operand_info *op;
1862 int high_byte = target_big_endian ? 0 : 1;
1865 if (opcode->arg[0] == A_BDISP8)
1867 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
1868 p = frag_var (rs_machine_dependent,
1869 md_relax_table[C (what, COND32)].rlx_length,
1870 md_relax_table[C (what, COND8)].rlx_length,
1872 op->immediate.X_add_symbol,
1873 op->immediate.X_add_number,
1875 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
1877 else if (opcode->arg[0] == A_BDISP12)
1879 p = frag_var (rs_machine_dependent,
1880 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
1881 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
1883 op->immediate.X_add_symbol,
1884 op->immediate.X_add_number,
1886 p[high_byte] = (opcode->nibbles[0] << 4);
1891 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1894 insert_loop_bounds (output, operand)
1896 sh_operand_info *operand;
1901 /* Since the low byte of the opcode will be overwritten by the reloc, we
1902 can just stash the high byte into both bytes and ignore endianness. */
1905 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1906 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1910 static int count = 0;
1912 /* If the last loop insn is a two-byte-insn, it is in danger of being
1913 swapped with the insn after it. To prevent this, create a new
1914 symbol - complete with SH_LABEL reloc - after the last loop insn.
1915 If the last loop insn is four bytes long, the symbol will be
1916 right in the middle, but four byte insns are not swapped anyways. */
1917 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1918 Hence a 9 digit number should be enough to count all REPEATs. */
1920 sprintf (name, "_R%x", count++ & 0x3fffffff);
1921 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag);
1922 /* Make this a local symbol. */
1924 SF_SET_LOCAL (end_sym);
1925 #endif /* OBJ_COFF */
1926 symbol_table_insert (end_sym);
1927 end_sym->sy_value = operand[1].immediate;
1928 end_sym->sy_value.X_add_number += 2;
1929 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
1932 output = frag_more (2);
1935 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1936 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1938 return frag_more (2);
1941 /* Now we know what sort of opcodes it is, let's build the bytes. */
1944 build_Mytes (opcode, operand)
1945 sh_opcode_info *opcode;
1946 sh_operand_info *operand;
1950 char *output = frag_more (2);
1951 unsigned int size = 2;
1952 int low_byte = target_big_endian ? 1 : 0;
1958 for (index = 0; index < 4; index++)
1960 sh_nibble_type i = opcode->nibbles[index];
1970 nbuf[index] = reg_n;
1973 nbuf[index] = reg_m;
1976 if (reg_n < 2 || reg_n > 5)
1977 as_bad (_("Invalid register: 'r%d'"), reg_n);
1978 nbuf[index] = (reg_n & 3) | 4;
1981 nbuf[index] = reg_n | (reg_m >> 2);
1984 nbuf[index] = reg_b | 0x08;
1987 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
1990 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
1993 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
1996 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
1999 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
2002 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
2005 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
2008 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
2011 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
2014 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
2017 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
2020 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
2023 insert (output, BFD_RELOC_SH_PCRELIMM8BY4,
2024 operand->type != A_DISP_PC_ABS, operand);
2027 insert (output, BFD_RELOC_SH_PCRELIMM8BY2,
2028 operand->type != A_DISP_PC_ABS, operand);
2031 output = insert_loop_bounds (output, operand);
2032 nbuf[index] = opcode->nibbles[3];
2036 printf (_("failed for %d\n"), i);
2040 if (!target_big_endian)
2042 output[1] = (nbuf[0] << 4) | (nbuf[1]);
2043 output[0] = (nbuf[2] << 4) | (nbuf[3]);
2047 output[0] = (nbuf[0] << 4) | (nbuf[1]);
2048 output[1] = (nbuf[2] << 4) | (nbuf[3]);
2053 /* Find an opcode at the start of *STR_P in the hash table, and set
2054 *STR_P to the first character after the last one read. */
2056 static sh_opcode_info *
2057 find_cooked_opcode (str_p)
2061 unsigned char *op_start;
2062 unsigned char *op_end;
2066 /* Drop leading whitespace. */
2070 /* Find the op code end.
2071 The pre-processor will eliminate whitespace in front of
2072 any '@' after the first argument; we may be called from
2073 assemble_ppi, so the opcode might be terminated by an '@'. */
2074 for (op_start = op_end = (unsigned char *) (str);
2077 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
2080 unsigned char c = op_start[nlen];
2082 /* The machine independent code will convert CMP/EQ into cmp/EQ
2083 because it thinks the '/' is the end of the symbol. Moreover,
2084 all but the first sub-insn is a parallel processing insn won't
2085 be capitalized. Instead of hacking up the machine independent
2086 code, we just deal with it here. */
2096 as_bad (_("can't find opcode "));
2098 return (sh_opcode_info *) hash_find (opcode_hash_control, name);
2101 /* Assemble a parallel processing insn. */
2102 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2105 assemble_ppi (op_end, opcode)
2107 sh_opcode_info *opcode;
2117 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2118 Make sure we encode a defined insn pattern. */
2124 sh_operand_info operand[3];
2126 if (opcode->arg[0] != A_END)
2127 op_end = get_operands (opcode, op_end, operand);
2128 opcode = get_specific (opcode, operand);
2131 /* Couldn't find an opcode which matched the operands. */
2132 char *where = frag_more (2);
2137 as_bad (_("invalid operands for opcode"));
2141 if (opcode->nibbles[0] != PPI)
2142 as_bad (_("insn can't be combined with parallel processing insn"));
2144 switch (opcode->nibbles[1])
2149 as_bad (_("multiple movx specifications"));
2154 as_bad (_("multiple movy specifications"));
2160 as_bad (_("multiple movx specifications"));
2161 if (reg_n < 4 || reg_n > 5)
2162 as_bad (_("invalid movx address register"));
2163 if (opcode->nibbles[2] & 8)
2165 if (reg_m == A_A1_NUM)
2167 else if (reg_m != A_A0_NUM)
2168 as_bad (_("invalid movx dsp register"));
2173 as_bad (_("invalid movx dsp register"));
2176 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
2181 as_bad (_("multiple movy specifications"));
2182 if (opcode->nibbles[2] & 8)
2184 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2187 if (reg_m == A_A1_NUM)
2189 else if (reg_m != A_A0_NUM)
2190 as_bad (_("invalid movy dsp register"));
2195 as_bad (_("invalid movy dsp register"));
2198 if (reg_n < 6 || reg_n > 7)
2199 as_bad (_("invalid movy address register"));
2200 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
2204 if (operand[0].immediate.X_op != O_constant)
2205 as_bad (_("dsp immediate shift value not constant"));
2206 field_b = ((opcode->nibbles[2] << 12)
2207 | (operand[0].immediate.X_add_number & 127) << 4
2212 as_bad (_("multiple parallel processing specifications"));
2213 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2214 + (reg_x << 6) + (reg_y << 4) + reg_n);
2218 as_bad (_("multiple condition specifications"));
2219 cond = opcode->nibbles[2] << 8;
2221 goto skip_cond_check;
2225 as_bad (_("multiple parallel processing specifications"));
2226 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2227 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
2233 if ((field_b & 0xef00) != 0xa100)
2234 as_bad (_("insn cannot be combined with pmuls"));
2236 switch (field_b & 0xf)
2239 field_b += 0 - A_X0_NUM;
2242 field_b += 1 - A_Y0_NUM;
2245 field_b += 2 - A_A0_NUM;
2248 field_b += 3 - A_A1_NUM;
2251 as_bad (_("bad padd / psub pmuls output operand"));
2254 field_b += 0x4000 + reg_efg;
2261 as_bad (_("condition not followed by conditionalizable insn"));
2267 opcode = find_cooked_opcode (&op_end);
2271 (_("unrecognized characters at end of parallel processing insn")));
2276 move_code = movx | movy;
2279 /* Parallel processing insn. */
2280 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
2282 output = frag_more (4);
2284 if (! target_big_endian)
2286 output[3] = ppi_code >> 8;
2287 output[2] = ppi_code;
2291 output[2] = ppi_code >> 8;
2292 output[3] = ppi_code;
2294 move_code |= 0xf800;
2298 /* Just a double data transfer. */
2299 output = frag_more (2);
2302 if (! target_big_endian)
2304 output[1] = move_code >> 8;
2305 output[0] = move_code;
2309 output[0] = move_code >> 8;
2310 output[1] = move_code;
2315 /* This is the guts of the machine-dependent assembler. STR points to a
2316 machine dependent instruction. This function is supposed to emit
2317 the frags/bytes it assembles to. */
2323 unsigned char *op_end;
2324 sh_operand_info operand[3];
2325 sh_opcode_info *opcode;
2326 unsigned int size = 0;
2329 if (sh64_isa_mode == sh64_isa_shmedia)
2331 shmedia_md_assemble (str);
2336 /* If we've seen pseudo-directives, make sure any emitted data or
2337 frags are marked as data. */
2338 if (seen_insn == false)
2340 sh64_update_contents_mark (true);
2341 sh64_set_contents_type (CRT_SH5_ISA16);
2346 #endif /* HAVE_SH64 */
2348 opcode = find_cooked_opcode (&str);
2353 as_bad (_("unknown opcode"));
2358 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
2360 /* Output a CODE reloc to tell the linker that the following
2361 bytes are instructions, not data. */
2362 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2364 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
2367 if (opcode->nibbles[0] == PPI)
2369 size = assemble_ppi (op_end, opcode);
2373 if (opcode->arg[0] == A_BDISP12
2374 || opcode->arg[0] == A_BDISP8)
2376 parse_exp (op_end + 1, &operand[0]);
2377 build_relax (opcode, &operand[0]);
2381 if (opcode->arg[0] == A_END)
2383 /* Ignore trailing whitespace. If there is any, it has already
2384 been compressed to a single space. */
2390 op_end = get_operands (opcode, op_end, operand);
2392 opcode = get_specific (opcode, operand);
2396 /* Couldn't find an opcode which matched the operands. */
2397 char *where = frag_more (2);
2402 as_bad (_("invalid operands for opcode"));
2407 as_bad (_("excess operands: '%s'"), op_end);
2409 size = build_Mytes (opcode, operand);
2414 #ifdef BFD_ASSEMBLER
2415 dwarf2_emit_insn (size);
2419 /* This routine is called each time a label definition is seen. It
2420 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2425 static fragS *last_label_frag;
2426 static int last_label_offset;
2429 && seg_info (now_seg)->tc_segment_info_data.in_code)
2433 offset = frag_now_fix ();
2434 if (frag_now != last_label_frag
2435 || offset != last_label_offset)
2437 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
2438 last_label_frag = frag_now;
2439 last_label_offset = offset;
2444 /* This routine is called when the assembler is about to output some
2445 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2448 sh_flush_pending_output ()
2451 && seg_info (now_seg)->tc_segment_info_data.in_code)
2453 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2455 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
2460 md_undefined_symbol (name)
2461 char *name ATTRIBUTE_UNUSED;
2467 #ifndef BFD_ASSEMBLER
2470 tc_crawl_symbol_chain (headers)
2471 object_headers *headers;
2473 printf (_("call to tc_crawl_symbol_chain \n"));
2477 tc_headers_hook (headers)
2478 object_headers *headers;
2480 printf (_("call to tc_headers_hook \n"));
2486 /* Various routines to kill one day. */
2487 /* Equal to MAX_PRECISION in atof-ieee.c. */
2488 #define MAX_LITTLENUMS 6
2490 /* Turn a string in input_line_pointer into a floating point constant
2491 of type TYPE, and store the appropriate bytes in *LITP. The number
2492 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2493 returned, or NULL on OK. */
2496 md_atof (type, litP, sizeP)
2502 LITTLENUM_TYPE words[4];
2518 return _("bad call to md_atof");
2521 t = atof_ieee (input_line_pointer, type, words);
2523 input_line_pointer = t;
2527 if (! target_big_endian)
2529 for (i = prec - 1; i >= 0; i--)
2531 md_number_to_chars (litP, (valueT) words[i], 2);
2537 for (i = 0; i < prec; i++)
2539 md_number_to_chars (litP, (valueT) words[i], 2);
2547 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2548 call instruction. It refers to a label of the instruction which
2549 loads the register which the call uses. We use it to generate a
2550 special reloc for the linker. */
2554 int ignore ATTRIBUTE_UNUSED;
2559 as_warn (_(".uses pseudo-op seen when not relaxing"));
2563 if (ex.X_op != O_symbol || ex.X_add_number != 0)
2565 as_bad (_("bad .uses format"));
2566 ignore_rest_of_line ();
2570 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
2572 demand_empty_rest_of_line ();
2575 CONST char *md_shortopts = "";
2576 struct option md_longopts[] =
2578 #define OPTION_RELAX (OPTION_MD_BASE)
2579 #define OPTION_BIG (OPTION_MD_BASE + 1)
2580 #define OPTION_LITTLE (OPTION_BIG + 1)
2581 #define OPTION_SMALL (OPTION_LITTLE + 1)
2582 #define OPTION_DSP (OPTION_SMALL + 1)
2584 {"relax", no_argument, NULL, OPTION_RELAX},
2585 {"big", no_argument, NULL, OPTION_BIG},
2586 {"little", no_argument, NULL, OPTION_LITTLE},
2587 {"small", no_argument, NULL, OPTION_SMALL},
2588 {"dsp", no_argument, NULL, OPTION_DSP},
2590 #define OPTION_ISA (OPTION_DSP + 1)
2591 #define OPTION_ABI (OPTION_ISA + 1)
2592 #define OPTION_NO_MIX (OPTION_ABI + 1)
2593 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
2594 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
2595 #define OPTION_PT32 (OPTION_NO_EXPAND + 1)
2596 {"isa", required_argument, NULL, OPTION_ISA},
2597 {"abi", required_argument, NULL, OPTION_ABI},
2598 {"no-mix", no_argument, NULL, OPTION_NO_MIX},
2599 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE},
2600 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND},
2601 {"expand-pt32", no_argument, NULL, OPTION_PT32},
2602 #endif /* HAVE_SH64 */
2604 {NULL, no_argument, NULL, 0}
2606 size_t md_longopts_size = sizeof (md_longopts);
2609 md_parse_option (c, arg)
2611 char *arg ATTRIBUTE_UNUSED;
2620 target_big_endian = 1;
2624 target_big_endian = 0;
2637 if (strcasecmp (arg, "shmedia") == 0)
2639 if (sh64_isa_mode == sh64_isa_shcompact)
2640 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
2641 sh64_isa_mode = sh64_isa_shmedia;
2643 else if (strcasecmp (arg, "shcompact") == 0)
2645 if (sh64_isa_mode == sh64_isa_shmedia)
2646 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
2647 if (sh64_abi == sh64_abi_64)
2648 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
2649 sh64_isa_mode = sh64_isa_shcompact;
2652 as_bad ("Invalid argument to --isa option: %s", arg);
2656 if (strcmp (arg, "32") == 0)
2658 if (sh64_abi == sh64_abi_64)
2659 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
2660 sh64_abi = sh64_abi_32;
2662 else if (strcmp (arg, "64") == 0)
2664 if (sh64_abi == sh64_abi_32)
2665 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
2666 if (sh64_isa_mode == sh64_isa_shcompact)
2667 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
2668 sh64_abi = sh64_abi_64;
2671 as_bad ("Invalid argument to --abi option: %s", arg);
2678 case OPTION_SHCOMPACT_CONST_CRANGE:
2679 sh64_shcompact_const_crange = true;
2682 case OPTION_NO_EXPAND:
2683 sh64_expand = false;
2689 #endif /* HAVE_SH64 */
2699 md_show_usage (stream)
2702 fprintf (stream, _("\
2704 -little generate little endian code\n\
2705 -big generate big endian code\n\
2706 -relax alter jump instructions for long displacements\n\
2707 -small align sections to 4 byte boundaries, not 16\n\
2708 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
2710 fprintf (stream, _("\
2711 -isa=[shmedia set default instruction set for SH64\n\
2715 -abi=[32|64] set size of expanded SHmedia operands and object\n\
2717 -shcompact-const-crange emit code-range descriptors for constants in\n\
2718 SHcompact code sections\n\
2719 -no-mix disallow SHmedia code in the same section as\n\
2720 constants and SHcompact code\n\
2721 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
2722 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
2724 #endif /* HAVE_SH64 */
2727 /* This struct is used to pass arguments to sh_count_relocs through
2728 bfd_map_over_sections. */
2730 struct sh_count_relocs
2732 /* Symbol we are looking for. */
2734 /* Count of relocs found. */
2738 /* Count the number of fixups in a section which refer to a particular
2739 symbol. When using BFD_ASSEMBLER, this is called via
2740 bfd_map_over_sections. */
2743 sh_count_relocs (abfd, sec, data)
2744 bfd *abfd ATTRIBUTE_UNUSED;
2748 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
2749 segment_info_type *seginfo;
2753 seginfo = seg_info (sec);
2754 if (seginfo == NULL)
2758 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2760 if (fix->fx_addsy == sym)
2768 /* Handle the count relocs for a particular section. When using
2769 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2772 sh_frob_section (abfd, sec, ignore)
2773 bfd *abfd ATTRIBUTE_UNUSED;
2775 PTR ignore ATTRIBUTE_UNUSED;
2777 segment_info_type *seginfo;
2780 seginfo = seg_info (sec);
2781 if (seginfo == NULL)
2784 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2789 struct sh_count_relocs info;
2791 if (fix->fx_r_type != BFD_RELOC_SH_USES)
2794 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2795 symbol in the same section. */
2796 sym = fix->fx_addsy;
2798 || fix->fx_subsy != NULL
2799 || fix->fx_addnumber != 0
2800 || S_GET_SEGMENT (sym) != sec
2801 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2802 || S_GET_STORAGE_CLASS (sym) == C_EXT
2804 || S_IS_EXTERNAL (sym))
2806 as_warn_where (fix->fx_file, fix->fx_line,
2807 _(".uses does not refer to a local symbol in the same section"));
2811 /* Look through the fixups again, this time looking for one
2812 at the same location as sym. */
2813 val = S_GET_VALUE (sym);
2814 for (fscan = seginfo->fix_root;
2816 fscan = fscan->fx_next)
2817 if (val == fscan->fx_frag->fr_address + fscan->fx_where
2818 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
2819 && fscan->fx_r_type != BFD_RELOC_SH_CODE
2820 && fscan->fx_r_type != BFD_RELOC_SH_DATA
2821 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
2825 as_warn_where (fix->fx_file, fix->fx_line,
2826 _("can't find fixup pointed to by .uses"));
2830 if (fscan->fx_tcbit)
2832 /* We've already done this one. */
2836 /* The variable fscan should also be a fixup to a local symbol
2837 in the same section. */
2838 sym = fscan->fx_addsy;
2840 || fscan->fx_subsy != NULL
2841 || fscan->fx_addnumber != 0
2842 || S_GET_SEGMENT (sym) != sec
2843 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2844 || S_GET_STORAGE_CLASS (sym) == C_EXT
2846 || S_IS_EXTERNAL (sym))
2848 as_warn_where (fix->fx_file, fix->fx_line,
2849 _(".uses target does not refer to a local symbol in the same section"));
2853 /* Now we look through all the fixups of all the sections,
2854 counting the number of times we find a reference to sym. */
2857 #ifdef BFD_ASSEMBLER
2858 bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info);
2863 for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
2864 sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info);
2871 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2872 We have already adjusted the value of sym to include the
2873 fragment address, so we undo that adjustment here. */
2874 subseg_change (sec, 0);
2875 fix_new (fscan->fx_frag,
2876 S_GET_VALUE (sym) - fscan->fx_frag->fr_address,
2877 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
2881 /* This function is called after the symbol table has been completed,
2882 but before the relocs or section contents have been written out.
2883 If we have seen any .uses pseudo-ops, they point to an instruction
2884 which loads a register with the address of a function. We look
2885 through the fixups to find where the function address is being
2886 loaded from. We then generate a COUNT reloc giving the number of
2887 times that function address is referred to. The linker uses this
2888 information when doing relaxing, to decide when it can eliminate
2889 the stored function address entirely. */
2895 shmedia_frob_file_before_adjust ();
2901 #ifdef BFD_ASSEMBLER
2902 bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL);
2907 for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
2908 sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL);
2913 /* Called after relaxing. Set the correct sizes of the fragments, and
2914 create relocs so that md_apply_fix3 will fill in the correct values. */
2917 md_convert_frag (headers, seg, fragP)
2918 #ifdef BFD_ASSEMBLER
2919 bfd *headers ATTRIBUTE_UNUSED;
2921 object_headers *headers;
2928 switch (fragP->fr_subtype)
2930 case C (COND_JUMP, COND8):
2931 case C (COND_JUMP_DELAY, COND8):
2932 subseg_change (seg, 0);
2933 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2934 1, BFD_RELOC_SH_PCDISP8BY2);
2939 case C (UNCOND_JUMP, UNCOND12):
2940 subseg_change (seg, 0);
2941 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2942 1, BFD_RELOC_SH_PCDISP12BY2);
2947 case C (UNCOND_JUMP, UNCOND32):
2948 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
2949 if (fragP->fr_symbol == NULL)
2950 as_bad_where (fragP->fr_file, fragP->fr_line,
2951 _("displacement overflows 12-bit field"));
2952 else if (S_IS_DEFINED (fragP->fr_symbol))
2953 as_bad_where (fragP->fr_file, fragP->fr_line,
2954 _("displacement to defined symbol %s overflows 12-bit field"),
2955 S_GET_NAME (fragP->fr_symbol));
2957 as_bad_where (fragP->fr_file, fragP->fr_line,
2958 _("displacement to undefined symbol %s overflows 12-bit field"),
2959 S_GET_NAME (fragP->fr_symbol));
2960 /* Stabilize this frag, so we don't trip an assert. */
2961 fragP->fr_fix += fragP->fr_var;
2965 case C (COND_JUMP, COND12):
2966 case C (COND_JUMP_DELAY, COND12):
2967 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2968 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2969 was due to gas incorrectly relaxing an out-of-range conditional
2970 branch with delay slot. It turned:
2971 bf.s L6 (slot mov.l r12,@(44,r0))
2974 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2976 32: 10 cb mov.l r12,@(44,r0)
2977 Therefore, branches with delay slots have to be handled
2978 differently from ones without delay slots. */
2980 unsigned char *buffer =
2981 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
2982 int highbyte = target_big_endian ? 0 : 1;
2983 int lowbyte = target_big_endian ? 1 : 0;
2984 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
2986 /* Toggle the true/false bit of the bcond. */
2987 buffer[highbyte] ^= 0x2;
2989 /* If this is a delayed branch, we may not put the bra in the
2990 slot. So we change it to a non-delayed branch, like that:
2991 b! cond slot_label; bra disp; slot_label: slot_insn
2992 ??? We should try if swapping the conditional branch and
2993 its delay-slot insn already makes the branch reach. */
2995 /* Build a relocation to six / four bytes farther on. */
2996 subseg_change (seg, 0);
2997 fix_new (fragP, fragP->fr_fix, 2,
2998 #ifdef BFD_ASSEMBLER
2999 section_symbol (seg),
3001 seg_info (seg)->dot,
3003 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
3004 1, BFD_RELOC_SH_PCDISP8BY2);
3006 /* Set up a jump instruction. */
3007 buffer[highbyte + 2] = 0xa0;
3008 buffer[lowbyte + 2] = 0;
3009 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
3010 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
3014 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
3019 /* Fill in a NOP instruction. */
3020 buffer[highbyte + 4] = 0x0;
3021 buffer[lowbyte + 4] = 0x9;
3030 case C (COND_JUMP, COND32):
3031 case C (COND_JUMP_DELAY, COND32):
3032 case C (COND_JUMP, UNDEF_WORD_DISP):
3033 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3034 if (fragP->fr_symbol == NULL)
3035 as_bad_where (fragP->fr_file, fragP->fr_line,
3036 _("displacement overflows 8-bit field"));
3037 else if (S_IS_DEFINED (fragP->fr_symbol))
3038 as_bad_where (fragP->fr_file, fragP->fr_line,
3039 _("displacement to defined symbol %s overflows 8-bit field"),
3040 S_GET_NAME (fragP->fr_symbol));
3042 as_bad_where (fragP->fr_file, fragP->fr_line,
3043 _("displacement to undefined symbol %s overflows 8-bit field "),
3044 S_GET_NAME (fragP->fr_symbol));
3045 /* Stabilize this frag, so we don't trip an assert. */
3046 fragP->fr_fix += fragP->fr_var;
3052 shmedia_md_convert_frag (headers, seg, fragP, true);
3058 if (donerelax && !sh_relax)
3059 as_warn_where (fragP->fr_file, fragP->fr_line,
3060 _("overflow in branch to %s; converted into longer instruction sequence"),
3061 (fragP->fr_symbol != NULL
3062 ? S_GET_NAME (fragP->fr_symbol)
3067 md_section_align (seg, size)
3068 segT seg ATTRIBUTE_UNUSED;
3071 #ifdef BFD_ASSEMBLER
3074 #else /* ! OBJ_ELF */
3075 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
3076 & (-1 << bfd_get_section_alignment (stdoutput, seg)));
3077 #endif /* ! OBJ_ELF */
3078 #else /* ! BFD_ASSEMBLER */
3079 return ((size + (1 << section_alignment[(int) seg]) - 1)
3080 & (-1 << section_alignment[(int) seg]));
3081 #endif /* ! BFD_ASSEMBLER */
3084 /* This static variable is set by s_uacons to tell sh_cons_align that
3085 the expession does not need to be aligned. */
3087 static int sh_no_align_cons = 0;
3089 /* This handles the unaligned space allocation pseudo-ops, such as
3090 .uaword. .uaword is just like .word, but the value does not need
3097 /* Tell sh_cons_align not to align this value. */
3098 sh_no_align_cons = 1;
3102 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3103 aligned correctly. Note that this can cause warnings to be issued
3104 when assembling initialized structured which were declared with the
3105 packed attribute. FIXME: Perhaps we should require an option to
3106 enable this warning? */
3109 sh_cons_align (nbytes)
3115 if (sh_no_align_cons)
3117 /* This is an unaligned pseudo-op. */
3118 sh_no_align_cons = 0;
3123 while ((nbytes & 1) == 0)
3132 if (now_seg == absolute_section)
3134 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
3135 as_warn (_("misaligned data"));
3139 p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
3140 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
3142 record_alignment (now_seg, nalign);
3145 /* When relaxing, we need to output a reloc for any .align directive
3146 that requests alignment to a four byte boundary or larger. This is
3147 also where we check for misaligned data. */
3150 sh_handle_align (frag)
3153 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix;
3155 if (frag->fr_type == rs_align_code)
3157 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
3158 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
3160 char *p = frag->fr_literal + frag->fr_fix;
3169 if (target_big_endian)
3171 memcpy (p, big_nop_pattern, sizeof big_nop_pattern);
3172 frag->fr_var = sizeof big_nop_pattern;
3176 memcpy (p, little_nop_pattern, sizeof little_nop_pattern);
3177 frag->fr_var = sizeof little_nop_pattern;
3180 else if (frag->fr_type == rs_align_test)
3183 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
3187 && (frag->fr_type == rs_align
3188 || frag->fr_type == rs_align_code)
3189 && frag->fr_address + frag->fr_fix > 0
3190 && frag->fr_offset > 1
3191 && now_seg != bss_section)
3192 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
3193 BFD_RELOC_SH_ALIGN);
3196 /* This macro decides whether a particular reloc is an entry in a
3197 switch table. It is used when relaxing, because the linker needs
3198 to know about all such entries so that it can adjust them if
3201 #ifdef BFD_ASSEMBLER
3202 #define SWITCH_TABLE_CONS(fix) (0)
3204 #define SWITCH_TABLE_CONS(fix) \
3205 ((fix)->fx_r_type == 0 \
3206 && ((fix)->fx_size == 2 \
3207 || (fix)->fx_size == 1 \
3208 || (fix)->fx_size == 4))
3211 #define SWITCH_TABLE(fix) \
3212 ((fix)->fx_addsy != NULL \
3213 && (fix)->fx_subsy != NULL \
3214 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
3215 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
3216 && ((fix)->fx_r_type == BFD_RELOC_32 \
3217 || (fix)->fx_r_type == BFD_RELOC_16 \
3218 || (fix)->fx_r_type == BFD_RELOC_8 \
3219 || SWITCH_TABLE_CONS (fix)))
3221 /* See whether we need to force a relocation into the output file.
3222 This is used to force out switch and PC relative relocations when
3226 sh_force_relocation (fix)
3230 if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3231 || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY
3232 || fix->fx_r_type == BFD_RELOC_SH_LOOP_START
3233 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END)
3239 return (fix->fx_pcrel
3240 || SWITCH_TABLE (fix)
3241 || fix->fx_r_type == BFD_RELOC_SH_COUNT
3242 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
3243 || fix->fx_r_type == BFD_RELOC_SH_CODE
3244 || fix->fx_r_type == BFD_RELOC_SH_DATA
3246 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE
3248 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
3253 sh_fix_adjustable (fixP)
3257 if (fixP->fx_addsy == NULL)
3260 if (fixP->fx_r_type == BFD_RELOC_SH_PCDISP8BY2
3261 || fixP->fx_r_type == BFD_RELOC_SH_PCDISP12BY2
3262 || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2
3263 || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4
3264 || fixP->fx_r_type == BFD_RELOC_8_PCREL
3265 || fixP->fx_r_type == BFD_RELOC_SH_SWITCH16
3266 || fixP->fx_r_type == BFD_RELOC_SH_SWITCH32)
3269 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP)
3270 || fixP->fx_r_type == BFD_RELOC_RVA)
3273 /* We need the symbol name for the VTABLE entries */
3274 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3275 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
3282 sh_elf_final_processing ()
3286 /* Set file-specific flags to indicate if this code needs
3287 a processor with the sh-dsp / sh3e ISA to execute. */
3289 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3290 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3291 if (sh64_isa_mode != sh64_isa_unspecified)
3294 #endif /* HAVE_SH64 */
3295 if (valid_arch & arch_sh1)
3297 else if (valid_arch & arch_sh2)
3299 else if (valid_arch & arch_sh_dsp)
3301 else if (valid_arch & arch_sh3)
3303 else if (valid_arch & arch_sh3_dsp)
3305 else if (valid_arch & arch_sh3e)
3307 else if (valid_arch & arch_sh4)
3312 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
3313 elf_elfheader (stdoutput)->e_flags |= val;
3317 /* Apply a fixup to the object file. */
3320 md_apply_fix3 (fixP, valP, seg)
3323 segT seg ATTRIBUTE_UNUSED;
3325 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3326 int lowbyte = target_big_endian ? 1 : 0;
3327 int highbyte = target_big_endian ? 0 : 1;
3328 long val = * (long *) valP;
3332 #ifdef BFD_ASSEMBLER
3333 /* A difference between two symbols, the second of which is in the
3334 current section, is transformed in a PC-relative relocation to
3335 the other symbol. We have to adjust the relocation type here. */
3338 switch (fixP->fx_r_type)
3344 fixP->fx_r_type = BFD_RELOC_32_PCREL;
3347 /* Currently, we only support 32-bit PCREL relocations.
3348 We'd need a new reloc type to handle 16_PCREL, and
3349 8_PCREL is already taken for R_SH_SWITCH8, which
3350 apparently does something completely different than what
3353 bfd_set_error (bfd_error_bad_value);
3357 bfd_set_error (bfd_error_bad_value);
3362 /* The function adjust_reloc_syms won't convert a reloc against a weak
3363 symbol into a reloc against a section, but bfd_install_relocation
3364 will screw up if the symbol is defined, so we have to adjust val here
3365 to avoid the screw up later.
3367 For ordinary relocs, this does not happen for ELF, since for ELF,
3368 bfd_install_relocation uses the "special function" field of the
3369 howto, and does not execute the code that needs to be undone, as long
3370 as the special function does not return bfd_reloc_continue.
3371 It can happen for GOT- and PLT-type relocs the way they are
3372 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3373 doesn't matter here since those relocs don't use VAL; see below. */
3374 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
3375 && fixP->fx_addsy != NULL
3376 && S_IS_WEAK (fixP->fx_addsy))
3377 val -= S_GET_VALUE (fixP->fx_addsy);
3380 #ifndef BFD_ASSEMBLER
3381 if (fixP->fx_r_type == 0)
3383 if (fixP->fx_size == 2)
3384 fixP->fx_r_type = BFD_RELOC_16;
3385 else if (fixP->fx_size == 4)
3386 fixP->fx_r_type = BFD_RELOC_32;
3387 else if (fixP->fx_size == 1)
3388 fixP->fx_r_type = BFD_RELOC_8;
3396 switch (fixP->fx_r_type)
3398 case BFD_RELOC_SH_IMM4:
3400 *buf = (*buf & 0xf0) | (val & 0xf);
3403 case BFD_RELOC_SH_IMM4BY2:
3406 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
3409 case BFD_RELOC_SH_IMM4BY4:
3412 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
3415 case BFD_RELOC_SH_IMM8BY2:
3421 case BFD_RELOC_SH_IMM8BY4:
3428 case BFD_RELOC_SH_IMM8:
3429 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3430 sometimes it is not (e.g., and). We permit any 8 bit value.
3431 Note that adding further restrictions may invalidate
3432 reasonable looking assembly code, such as ``and -0x1,r0''. */
3438 case BFD_RELOC_SH_PCRELIMM8BY4:
3439 /* The lower two bits of the PC are cleared before the
3440 displacement is added in. We can assume that the destination
3441 is on a 4 byte bounday. If this instruction is also on a 4
3442 byte boundary, then we want
3444 and target - here is a multiple of 4.
3445 Otherwise, we are on a 2 byte boundary, and we want
3446 (target - (here - 2)) / 4
3447 and target - here is not a multiple of 4. Computing
3448 (target - (here - 2)) / 4 == (target - here + 2) / 4
3449 works for both cases, since in the first case the addition of
3450 2 will be removed by the division. target - here is in the
3452 val = (val + 2) / 4;
3454 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3458 case BFD_RELOC_SH_PCRELIMM8BY2:
3461 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3465 case BFD_RELOC_SH_PCDISP8BY2:
3467 if (val < -0x80 || val > 0x7f)
3468 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3472 case BFD_RELOC_SH_PCDISP12BY2:
3474 if (val < -0x800 || val > 0x7ff)
3475 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3476 buf[lowbyte] = val & 0xff;
3477 buf[highbyte] |= (val >> 8) & 0xf;
3481 case BFD_RELOC_32_PCREL:
3482 md_number_to_chars (buf, val, 4);
3486 md_number_to_chars (buf, val, 2);
3489 case BFD_RELOC_SH_USES:
3490 /* Pass the value into sh_coff_reloc_mangle. */
3491 fixP->fx_addnumber = val;
3494 case BFD_RELOC_SH_COUNT:
3495 case BFD_RELOC_SH_ALIGN:
3496 case BFD_RELOC_SH_CODE:
3497 case BFD_RELOC_SH_DATA:
3498 case BFD_RELOC_SH_LABEL:
3499 /* Nothing to do here. */
3502 case BFD_RELOC_SH_LOOP_START:
3503 case BFD_RELOC_SH_LOOP_END:
3505 case BFD_RELOC_VTABLE_INHERIT:
3506 case BFD_RELOC_VTABLE_ENTRY:
3511 case BFD_RELOC_32_PLT_PCREL:
3512 /* Make the jump instruction point to the address of the operand. At
3513 runtime we merely add the offset to the actual PLT entry. */
3514 * valP = 0xfffffffc;
3515 val = fixP->fx_addnumber;
3517 val -= S_GET_VALUE (fixP->fx_subsy);
3518 md_number_to_chars (buf, val, 4);
3521 case BFD_RELOC_SH_GOTPC:
3522 /* This is tough to explain. We end up with this one if we have
3523 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3524 The goal here is to obtain the absolute address of the GOT,
3525 and it is strongly preferable from a performance point of
3526 view to avoid using a runtime relocation for this. There are
3527 cases where you have something like:
3529 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3531 and here no correction would be required. Internally in the
3532 assembler we treat operands of this form as not being pcrel
3533 since the '.' is explicitly mentioned, and I wonder whether
3534 it would simplify matters to do it this way. Who knows. In
3535 earlier versions of the PIC patches, the pcrel_adjust field
3536 was used to store the correction, but since the expression is
3537 not pcrel, I felt it would be confusing to do it this way. */
3539 md_number_to_chars (buf, val, 4);
3542 case BFD_RELOC_32_GOT_PCREL:
3543 case BFD_RELOC_SH_GOTPLT32:
3544 * valP = 0; /* Fully resolved at runtime. No addend. */
3545 md_number_to_chars (buf, 0, 4);
3548 case BFD_RELOC_32_GOTOFF:
3549 md_number_to_chars (buf, val, 4);
3555 shmedia_md_apply_fix3 (fixP, valP);
3564 if ((val & ((1 << shift) - 1)) != 0)
3565 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
3569 val = ((val >> shift)
3570 | ((long) -1 & ~ ((long) -1 >> shift)));
3572 if (max != 0 && (val < min || val > max))
3573 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
3575 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
3579 /* Called just before address relaxation. Return the length
3580 by which a fragment must grow to reach it's destination. */
3583 md_estimate_size_before_relax (fragP, segment_type)
3584 register fragS *fragP;
3585 register segT segment_type;
3589 switch (fragP->fr_subtype)
3593 return shmedia_md_estimate_size_before_relax (fragP, segment_type);
3599 case C (UNCOND_JUMP, UNDEF_DISP):
3600 /* Used to be a branch to somewhere which was unknown. */
3601 if (!fragP->fr_symbol)
3603 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
3605 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3607 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
3611 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
3615 case C (COND_JUMP, UNDEF_DISP):
3616 case C (COND_JUMP_DELAY, UNDEF_DISP):
3617 what = GET_WHAT (fragP->fr_subtype);
3618 /* Used to be a branch to somewhere which was unknown. */
3619 if (fragP->fr_symbol
3620 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3622 /* Got a symbol and it's defined in this segment, become byte
3623 sized - maybe it will fix up. */
3624 fragP->fr_subtype = C (what, COND8);
3626 else if (fragP->fr_symbol)
3628 /* Its got a segment, but its not ours, so it will always be long. */
3629 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
3633 /* We know the abs value. */
3634 fragP->fr_subtype = C (what, COND8);
3638 case C (UNCOND_JUMP, UNCOND12):
3639 case C (UNCOND_JUMP, UNCOND32):
3640 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
3641 case C (COND_JUMP, COND8):
3642 case C (COND_JUMP, COND12):
3643 case C (COND_JUMP, COND32):
3644 case C (COND_JUMP, UNDEF_WORD_DISP):
3645 case C (COND_JUMP_DELAY, COND8):
3646 case C (COND_JUMP_DELAY, COND12):
3647 case C (COND_JUMP_DELAY, COND32):
3648 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3649 /* When relaxing a section for the second time, we don't need to
3650 do anything besides return the current size. */
3654 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length;
3655 return fragP->fr_var;
3658 /* Put number into target byte order. */
3661 md_number_to_chars (ptr, use, nbytes)
3667 /* We might need to set the contents type to data. */
3668 sh64_flag_output ();
3671 if (! target_big_endian)
3672 number_to_chars_littleendian (ptr, use, nbytes);
3674 number_to_chars_bigendian (ptr, use, nbytes);
3678 md_pcrel_from_section (fixP, sec)
3682 if (fixP->fx_addsy != (symbolS *) NULL
3683 && (! S_IS_DEFINED (fixP->fx_addsy)
3684 || S_IS_EXTERN (fixP->fx_addsy)
3685 || S_IS_WEAK (fixP->fx_addsy)
3686 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
3688 /* The symbol is undefined (or is defined but not in this section,
3689 or we're not sure about it being the final definition). Let the
3690 linker figure it out. We need to adjust the subtraction of a
3691 symbol to the position of the relocated data, though. */
3692 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0;
3695 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
3701 tc_coff_sizemachdep (frag)
3704 return md_relax_table[frag->fr_subtype].rlx_length;
3707 #endif /* OBJ_COFF */
3709 #ifndef BFD_ASSEMBLER
3712 /* Map BFD relocs to SH COFF relocs. */
3716 bfd_reloc_code_real_type bfd_reloc;
3720 static const struct reloc_map coff_reloc_map[] =
3722 { BFD_RELOC_32, R_SH_IMM32 },
3723 { BFD_RELOC_16, R_SH_IMM16 },
3724 { BFD_RELOC_8, R_SH_IMM8 },
3725 { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 },
3726 { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP },
3727 { BFD_RELOC_SH_IMM4, R_SH_IMM4 },
3728 { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 },
3729 { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 },
3730 { BFD_RELOC_SH_IMM8, R_SH_IMM8 },
3731 { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 },
3732 { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 },
3733 { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 },
3734 { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 },
3735 { BFD_RELOC_8_PCREL, R_SH_SWITCH8 },
3736 { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 },
3737 { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 },
3738 { BFD_RELOC_SH_USES, R_SH_USES },
3739 { BFD_RELOC_SH_COUNT, R_SH_COUNT },
3740 { BFD_RELOC_SH_ALIGN, R_SH_ALIGN },
3741 { BFD_RELOC_SH_CODE, R_SH_CODE },
3742 { BFD_RELOC_SH_DATA, R_SH_DATA },
3743 { BFD_RELOC_SH_LABEL, R_SH_LABEL },
3744 { BFD_RELOC_UNUSED, 0 }
3747 /* Adjust a reloc for the SH. This is similar to the generic code,
3748 but does some minor tweaking. */
3751 sh_coff_reloc_mangle (seg, fix, intr, paddr)
3752 segment_info_type *seg;
3754 struct internal_reloc *intr;
3757 symbolS *symbol_ptr = fix->fx_addsy;
3760 intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where;
3762 if (! SWITCH_TABLE (fix))
3764 const struct reloc_map *rm;
3766 for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++)
3767 if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type)
3769 if (rm->bfd_reloc == BFD_RELOC_UNUSED)
3770 as_bad_where (fix->fx_file, fix->fx_line,
3771 _("Can not represent %s relocation in this object file format"),
3772 bfd_get_reloc_code_name (fix->fx_r_type));
3773 intr->r_type = rm->sh_reloc;
3780 if (fix->fx_r_type == BFD_RELOC_16)
3781 intr->r_type = R_SH_SWITCH16;
3782 else if (fix->fx_r_type == BFD_RELOC_8)
3783 intr->r_type = R_SH_SWITCH8;
3784 else if (fix->fx_r_type == BFD_RELOC_32)
3785 intr->r_type = R_SH_SWITCH32;
3789 /* For a switch reloc, we set r_offset to the difference between
3790 the reloc address and the subtrahend. When the linker is
3791 doing relaxing, it can use the determine the starting and
3792 ending points of the switch difference expression. */
3793 intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy);
3796 /* PC relative relocs are always against the current section. */
3797 if (symbol_ptr == NULL)
3799 switch (fix->fx_r_type)
3801 case BFD_RELOC_SH_PCRELIMM8BY2:
3802 case BFD_RELOC_SH_PCRELIMM8BY4:
3803 case BFD_RELOC_SH_PCDISP8BY2:
3804 case BFD_RELOC_SH_PCDISP12BY2:
3805 case BFD_RELOC_SH_USES:
3806 symbol_ptr = seg->dot;
3813 if (fix->fx_r_type == BFD_RELOC_SH_USES)
3815 /* We can't store the offset in the object file, since this
3816 reloc does not take up any space, so we store it in r_offset.
3817 The fx_addnumber field was set in md_apply_fix3. */
3818 intr->r_offset = fix->fx_addnumber;
3820 else if (fix->fx_r_type == BFD_RELOC_SH_COUNT)
3822 /* We can't store the count in the object file, since this reloc
3823 does not take up any space, so we store it in r_offset. The
3824 fx_offset field was set when the fixup was created in
3825 sh_coff_frob_file. */
3826 intr->r_offset = fix->fx_offset;
3827 /* This reloc is always absolute. */
3830 else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN)
3832 /* Store the alignment in the r_offset field. */
3833 intr->r_offset = fix->fx_offset;
3834 /* This reloc is always absolute. */
3837 else if (fix->fx_r_type == BFD_RELOC_SH_CODE
3838 || fix->fx_r_type == BFD_RELOC_SH_DATA
3839 || fix->fx_r_type == BFD_RELOC_SH_LABEL)
3841 /* These relocs are always absolute. */
3845 /* Turn the segment of the symbol into an offset. */
3846 if (symbol_ptr != NULL)
3848 dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot;
3850 intr->r_symndx = dot->sy_number;
3852 intr->r_symndx = symbol_ptr->sy_number;
3855 intr->r_symndx = -1;
3858 #endif /* OBJ_COFF */
3859 #endif /* ! BFD_ASSEMBLER */
3861 #ifdef BFD_ASSEMBLER
3863 /* Create a reloc. */
3866 tc_gen_reloc (section, fixp)
3867 asection *section ATTRIBUTE_UNUSED;
3871 bfd_reloc_code_real_type r_type;
3873 rel = (arelent *) xmalloc (sizeof (arelent));
3874 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
3875 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
3876 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
3879 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
3881 fixp->fx_addnumber -= S_GET_VALUE (fixp->fx_subsy);
3885 r_type = fixp->fx_r_type;
3887 if (SWITCH_TABLE (fixp))
3889 rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy);
3890 if (r_type == BFD_RELOC_16)
3891 r_type = BFD_RELOC_SH_SWITCH16;
3892 else if (r_type == BFD_RELOC_8)
3893 r_type = BFD_RELOC_8_PCREL;
3894 else if (r_type == BFD_RELOC_32)
3895 r_type = BFD_RELOC_SH_SWITCH32;
3899 else if (r_type == BFD_RELOC_SH_USES)
3900 rel->addend = fixp->fx_addnumber;
3901 else if (r_type == BFD_RELOC_SH_COUNT)
3902 rel->addend = fixp->fx_offset;
3903 else if (r_type == BFD_RELOC_SH_ALIGN)
3904 rel->addend = fixp->fx_offset;
3905 else if (r_type == BFD_RELOC_VTABLE_INHERIT
3906 || r_type == BFD_RELOC_VTABLE_ENTRY)
3907 rel->addend = fixp->fx_offset;
3908 else if (r_type == BFD_RELOC_SH_LOOP_START
3909 || r_type == BFD_RELOC_SH_LOOP_END)
3910 rel->addend = fixp->fx_offset;
3911 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
3914 rel->address = rel->addend = fixp->fx_offset;
3917 else if (shmedia_init_reloc (rel, fixp))
3920 else if (fixp->fx_pcrel)
3921 rel->addend = fixp->fx_addnumber;
3922 else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF)
3923 rel->addend = fixp->fx_addnumber;
3927 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
3928 if (rel->howto == NULL || fixp->fx_subsy)
3930 as_bad_where (fixp->fx_file, fixp->fx_line,
3931 _("Cannot represent relocation type %s"),
3932 bfd_get_reloc_code_name (r_type));
3933 /* Set howto to a garbage value so that we can keep going. */
3934 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3935 assert (rel->howto != NULL);
3942 inline static char *
3943 sh_end_of_match (cont, what)
3946 int len = strlen (what);
3948 if (strncasecmp (cont, what, strlen (what)) == 0
3949 && ! is_part_of_name (cont[len]))
3956 sh_parse_name (name, exprP, nextcharP)
3961 char *next = input_line_pointer;
3966 exprP->X_op_symbol = NULL;
3968 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
3971 GOT_symbol = symbol_find_or_make (name);
3973 exprP->X_add_symbol = GOT_symbol;
3975 /* If we have an absolute symbol or a reg, then we know its
3977 segment = S_GET_SEGMENT (exprP->X_add_symbol);
3978 if (segment == absolute_section)
3980 exprP->X_op = O_constant;
3981 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
3982 exprP->X_add_symbol = NULL;
3984 else if (segment == reg_section)
3986 exprP->X_op = O_register;
3987 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
3988 exprP->X_add_symbol = NULL;
3992 exprP->X_op = O_symbol;
3993 exprP->X_add_number = 0;
3999 exprP->X_add_symbol = symbol_find_or_make (name);
4001 if (*nextcharP != '@')
4003 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF")))
4004 reloc_type = BFD_RELOC_32_GOTOFF;
4005 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT")))
4006 reloc_type = BFD_RELOC_SH_GOTPLT32;
4007 else if ((next_end = sh_end_of_match (next + 1, "GOT")))
4008 reloc_type = BFD_RELOC_32_GOT_PCREL;
4009 else if ((next_end = sh_end_of_match (next + 1, "PLT")))
4010 reloc_type = BFD_RELOC_32_PLT_PCREL;
4014 *input_line_pointer = *nextcharP;
4015 input_line_pointer = next_end;
4016 *nextcharP = *input_line_pointer;
4017 *input_line_pointer = '\0';
4019 exprP->X_op = O_PIC_reloc;
4020 exprP->X_add_number = 0;
4021 exprP->X_md = reloc_type;
4026 #endif /* BFD_ASSEMBLER */